drivers/staging/rtl8192su/r8192U_core.c

   1 /******************************************************************************
   2  * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
   3  * Linux device driver for RTL8192U
   4  *
   5  * Based on the r8187 driver, which is:
   6  * Copyright 2004-2005 Andrea Merello <andreamrl@tiscali.it>, et al.
   7  * This program is free software; you can redistribute it and/or modify it
   8  * under the terms of version 2 of the GNU General Public License as
   9  * published by the Free Software Foundation.
  10  *
  11  * This program is distributed in the hope that it will be useful, but WITHOUT
  12  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  13  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  14  * more details.
  15  *
  16  * You should have received a copy of the GNU General Public License along with
  17  * this program; if not, write to the Free Software Foundation, Inc.,
  18  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  19  *
  20  * The full GNU General Public License is included in this distribution in the
  21  * file called LICENSE.
  22  *
  23  * Contact Information:
  24  * Jerry chuang <wlanfae@realtek.com>
  25  */
  26
  27 #ifndef CONFIG_FORCE_HARD_FLOAT
  28 double __floatsidf (int i) { return i; }
  29 unsigned int __fixunsdfsi (double d) { return d; }
  30 double __adddf3(double a, double b) { return a+b; }
  31 double __addsf3(float a, float b) { return a+b; }
  32 double __subdf3(double a, double b) { return a-b; }
  33 double __extendsfdf2(float a) {return a;}
  34 #endif
  35
  36 #undef LOOP_TEST
  37 #undef DUMP_RX
  38 #undef DUMP_TX
  39 #undef DEBUG_TX_DESC2
  40 #undef RX_DONT_PASS_UL
  41 #undef DEBUG_EPROM
  42 #undef DEBUG_RX_VERBOSE
  43 #undef DUMMY_RX
  44 #undef DEBUG_ZERO_RX
  45 #undef DEBUG_RX_SKB
  46 #undef DEBUG_TX_FRAG
  47 #undef DEBUG_RX_FRAG
  48 #undef DEBUG_TX_FILLDESC
  49 #undef DEBUG_TX
  50 #undef DEBUG_IRQ
  51 #undef DEBUG_RX
  52 #undef DEBUG_RXALLOC
  53 #undef DEBUG_REGISTERS
  54 #undef DEBUG_RING
  55 #undef DEBUG_IRQ_TASKLET
  56 #undef DEBUG_TX_ALLOC
  57 #undef DEBUG_TX_DESC
  58
  59 #define CONFIG_RTL8192_IO_MAP
  60
  61 #ifdef RTL8192SU
  62 #include <asm/uaccess.h>
  63 #include "r8192U.h"
  64 //#include "r8190_rtl8256.h" /* RTL8225 Radio frontend */
  65 #include "r8180_93cx6.h"   /* Card EEPROM */
  66 #include "r8192U_wx.h"
  67
  68 #include "r8192S_rtl8225.h"
  69 #include "r8192S_hw.h"
  70 #include "r8192S_phy.h"
  71 #include "r8192S_phyreg.h"
  72 #include "r8192S_Efuse.h"
  73
  74 #include "r819xU_cmdpkt.h"
  75 #include "r8192U_dm.h"
  76 //#include "r8192xU_phyreg.h"
  77 #include <linux/usb.h>
  78
  79 #include "r8192U_pm.h"
  80
  81 #include "ieee80211/dot11d.h"
  82
  83 #else
  84
  85 #include <asm/uaccess.h>
  86 #include "r8192U_hw.h"
  87 #include "r8192U.h"
  88 #include "r8190_rtl8256.h" /* RTL8225 Radio frontend */
  89 #include "r8180_93cx6.h"   /* Card EEPROM */
  90 #include "r8192U_wx.h"
  91 #include "r819xU_phy.h" //added by WB 4.30.2008
  92 #include "r819xU_phyreg.h"
  93 #include "r819xU_cmdpkt.h"
  94 #include "r8192U_dm.h"
  95 //#include "r8192xU_phyreg.h"
  96 #include <linux/usb.h>
  97
  98 #include "r8192U_pm.h"
  99
 100 #include "ieee80211/dot11d.h"
 101
 102 #endif
 103
 104
 105 #ifdef RTL8192SU
 106 u32 rt_global_debug_component = \
 107 //                              COMP_TRACE      |
 108 //                              COMP_DBG        |
 109 //                              COMP_INIT       |
 110 //                              COMP_RECV       |
 111 //                              COMP_SEND       |
 112 //                              COMP_IO         |
 113                                 COMP_POWER      |
 114 //                              COMP_EPROM      |
 115                                 COMP_SWBW       |
 116                                 COMP_POWER_TRACKING |
 117                                 COMP_TURBO      |
 118                                 COMP_QOS        |
 119 //                              COMP_RATE       |
 120 //                              COMP_RM         |
 121                                 COMP_DIG        |
 122 //                              COMP_EFUSE      |
 123 //                              COMP_CH         |
 124 //                              COMP_TXAGC      |
 125                                 COMP_HIPWR      |
 126 //                              COMP_HALDM      |
 127                                 COMP_SEC        |
 128                                 COMP_LED        |
 129 //                              COMP_RF         |
 130 //                              COMP_RXDESC     |
 131                                 COMP_FIRMWARE   |
 132                                 COMP_HT         |
 133                                 COMP_AMSDU      |
 134                                 COMP_SCAN       |
 135 //                              COMP_CMD        |
 136                                 COMP_DOWN       |
 137                                 COMP_RESET      |
 138                                 COMP_ERR; //always open err flags on
 139 #else
 140 //set here to open your trace code. //WB
 141 u32 rt_global_debug_component = \
 142                         //      COMP_INIT       |
 143 //                              COMP_DBG        |
 144                         //      COMP_EPROM      |
 145 //                              COMP_PHY        |
 146                         //      COMP_RF         |
 147 //                              COMP_FIRMWARE   |
 148 //                              COMP_CH         |
 149                         //      COMP_POWER_TRACKING |
 150 //                              COMP_RATE       |
 151                         //      COMP_TXAGC      |
 152                 //              COMP_TRACE      |
 153                                 COMP_DOWN       |
 154                 //              COMP_RECV       |
 155                 //              COMP_SWBW       |
 156                                 COMP_SEC        |
 157         //                      COMP_RESET      |
 158                 //              COMP_SEND       |
 159                         //      COMP_EVENTS     |
 160                                 COMP_ERR ; //always open err flags on
 161 #endif
 162
 163 #define TOTAL_CAM_ENTRY 32
 164 #define CAM_CONTENT_COUNT 8
 165
 166 static struct usb_device_id rtl8192_usb_id_tbl[] = {
 167         /* Realtek */
 168         {USB_DEVICE(0x0bda, 0x8192)},
 169         {USB_DEVICE(0x0bda, 0x8709)},
 170         /* Corega */
 171         {USB_DEVICE(0x07aa, 0x0043)},
 172         /* Belkin */
 173         {USB_DEVICE(0x050d, 0x805E)},
 174         /* Sitecom */
 175         {USB_DEVICE(0x0df6, 0x0031)},
 176         /* EnGenius */
 177         {USB_DEVICE(0x1740, 0x9201)},
 178         /* Dlink */
 179         {USB_DEVICE(0x2001, 0x3301)},
 180         /* Zinwell */
 181         {USB_DEVICE(0x5a57, 0x0290)},
 182         //92SU
 183         {USB_DEVICE(0x0bda, 0x8172)},
 184         {}
 185 };
 186
 187 MODULE_LICENSE("GPL");
 188 MODULE_VERSION("V 1.1");
 189 MODULE_DEVICE_TABLE(usb, rtl8192_usb_id_tbl);
 190 MODULE_DESCRIPTION("Linux driver for Realtek RTL8192 USB WiFi cards");
 191
 192 static char* ifname = "wlan%d";
 193 #if 0
 194 static int hwseqnum = 0;
 195 static int hwwep = 0;
 196 #endif
 197 static int hwwep = 1;  //default use hw. set 0 to use software security
 198 static int channels = 0x3fff;
 199
 200
 201
 202 module_param(ifname, charp, S_IRUGO|S_IWUSR );
 203 //module_param(hwseqnum,int, S_IRUGO|S_IWUSR);
 204 module_param(hwwep,int, S_IRUGO|S_IWUSR);
 205 module_param(channels,int, S_IRUGO|S_IWUSR);
 206
 207 MODULE_PARM_DESC(ifname," Net interface name, wlan%d=default");
 208 //MODULE_PARM_DESC(hwseqnum," Try to use hardware 802.11 header sequence numbers. Zero=default");
 209 MODULE_PARM_DESC(hwwep," Try to use hardware security support. ");
 210 MODULE_PARM_DESC(channels," Channel bitmask for specific locales. NYI");
 211
 212 static int __devinit rtl8192_usb_probe(struct usb_interface *intf,
 213                          const struct usb_device_id *id);
 214 static void __devexit rtl8192_usb_disconnect(struct usb_interface *intf);
 215
 216 static struct usb_driver rtl8192_usb_driver = {
 217         .name           = RTL819xU_MODULE_NAME,           /* Driver name   */
 218         .id_table       = rtl8192_usb_id_tbl,             /* PCI_ID table  */
 219         .probe          = rtl8192_usb_probe,              /* probe fn      */
 220         .disconnect     = rtl8192_usb_disconnect,         /* remove fn     */
 221         .suspend        = rtl8192U_suspend,               /* PM suspend fn */
 222         .resume         = rtl8192U_resume,                 /* PM resume fn  */
 223         .reset_resume   = rtl8192U_resume,                 /* PM reset resume fn  */
 224 };
 225
 226
 227 #ifdef RTL8192SU
 228 static void     rtl8192SU_read_eeprom_info(struct net_device *dev);
 229 short   rtl8192SU_tx(struct net_device *dev, struct sk_buff* skb);
 230 void    rtl8192SU_rx_nomal(struct sk_buff* skb);
 231 void    rtl8192SU_rx_cmd(struct sk_buff *skb);
 232 bool    rtl8192SU_adapter_start(struct net_device *dev);
 233 short   rtl8192SU_tx_cmd(struct net_device *dev, struct sk_buff *skb);
 234 void    rtl8192SU_link_change(struct net_device *dev);
 235 void    InitialGain8192S(struct net_device *dev,u8 Operation);
 236 void    rtl8192SU_query_rxdesc_status(struct sk_buff *skb, struct ieee80211_rx_stats *stats, bool bIsRxAggrSubframe);
 237
 238 struct rtl819x_ops rtl8192su_ops = {
 239         .nic_type = NIC_8192SU,
 240         .rtl819x_read_eeprom_info = rtl8192SU_read_eeprom_info,
 241         .rtl819x_tx = rtl8192SU_tx,
 242         .rtl819x_tx_cmd = rtl8192SU_tx_cmd,
 243         .rtl819x_rx_nomal = rtl8192SU_rx_nomal,
 244         .rtl819x_rx_cmd = rtl8192SU_rx_cmd,
 245         .rtl819x_adapter_start = rtl8192SU_adapter_start,
 246         .rtl819x_link_change = rtl8192SU_link_change,
 247         .rtl819x_initial_gain = InitialGain8192S,
 248         .rtl819x_query_rxdesc_status = rtl8192SU_query_rxdesc_status,
 249 };
 250 #else
 251 static void     rtl8192_read_eeprom_info(struct net_device *dev);
 252 short   rtl8192_tx(struct net_device *dev, struct sk_buff* skb);
 253 void    rtl8192_rx_nomal(struct sk_buff* skb);
 254 void    rtl8192_rx_cmd(struct sk_buff *skb);
 255 bool    rtl8192_adapter_start(struct net_device *dev);
 256 short   rtl819xU_tx_cmd(struct net_device *dev, struct sk_buff *skb);
 257 void    rtl8192_link_change(struct net_device *dev);
 258 void    InitialGain819xUsb(struct net_device *dev,u8 Operation);
 259 void    query_rxdesc_status(struct sk_buff *skb, struct ieee80211_rx_stats *stats, bool bIsRxAggrSubframe);
 260
 261 struct rtl819x_ops rtl8192u_ops = {
 262         .nic_type = NIC_8192U,
 263         .rtl819x_read_eeprom_info = rtl8192_read_eeprom_info,
 264         .rtl819x_tx = rtl8192_tx,
 265         .rtl819x_tx_cmd = rtl819xU_tx_cmd,
 266         .rtl819x_rx_nomal = rtl8192_rx_nomal,
 267         .rtl819x_rx_cmd = rtl8192_rx_cmd,
 268         .rtl819x_adapter_start = rtl8192_adapter_start,
 269         .rtl819x_link_change = rtl8192_link_change,
 270         .rtl819x_initial_gain = InitialGain819xUsb,
 271         .rtl819x_query_rxdesc_status = query_rxdesc_status,
 272 };
 273 #endif
 274
 275
 276 typedef struct _CHANNEL_LIST
 277 {
 278         u8      Channel[32];
 279         u8      Len;
 280 }CHANNEL_LIST, *PCHANNEL_LIST;
 281
 282 static CHANNEL_LIST ChannelPlan[] = {
 283         {{1,2,3,4,5,6,7,8,9,10,11,36,40,44,48,52,56,60,64,149,153,157,161,165},24},             //FCC
 284         {{1,2,3,4,5,6,7,8,9,10,11},11},                                                 //IC
 285         {{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64},21},   //ETSI
 286         {{1,2,3,4,5,6,7,8,9,10,11,12,13},13},    //Spain. Change to ETSI.
 287         {{1,2,3,4,5,6,7,8,9,10,11,12,13},13},   //France. Change to ETSI.
 288         {{1,2,3,4,5,6,7,8,9,10,11,12,13,14,36,40,44,48,52,56,60,64},22},        //MKK                                   //MKK
 289         {{1,2,3,4,5,6,7,8,9,10,11,12,13,14,36,40,44,48,52,56,60,64},22},//MKK1
 290         {{1,2,3,4,5,6,7,8,9,10,11,12,13},13},   //Israel.
 291         {{1,2,3,4,5,6,7,8,9,10,11,12,13,14,36,40,44,48,52,56,60,64},22},                        // For 11a , TELEC
 292         {{1,2,3,4,5,6,7,8,9,10,11,12,13,14,36,40,44,48,52,56,60,64}, 22},    //MIC
 293         {{1,2,3,4,5,6,7,8,9,10,11,12,13,14},14}                                 //For Global Domain. 1-11:active scan, 12-14 passive scan. //+YJ, 080626
 294 };
 295
 296 static void rtl819x_set_channel_map(u8 channel_plan, struct r8192_priv* priv)
 297 {
 298         int i, max_chan=-1, min_chan=-1;
 299         struct ieee80211_device* ieee = priv->ieee80211;
 300         switch (channel_plan)
 301         {
 302                 case COUNTRY_CODE_FCC:
 303                 case COUNTRY_CODE_IC:
 304                 case COUNTRY_CODE_ETSI:
 305                 case COUNTRY_CODE_SPAIN:
 306                 case COUNTRY_CODE_FRANCE:
 307                 case COUNTRY_CODE_MKK:
 308                 case COUNTRY_CODE_MKK1:
 309                 case COUNTRY_CODE_ISRAEL:
 310                 case COUNTRY_CODE_TELEC:
 311                 case COUNTRY_CODE_MIC:
 312                 {
 313                         Dot11d_Init(ieee);
 314                         ieee->bGlobalDomain = false;
 315                         //acturally 8225 & 8256 rf chip only support B,G,24N mode
 316                         if ((priv->rf_chip == RF_8225) || (priv->rf_chip == RF_8256) || (priv->rf_chip == RF_6052))
 317                         {
 318                                 min_chan = 1;
 319                                 max_chan = 14;
 320                         }
 321                         else
 322                         {
 323                                 RT_TRACE(COMP_ERR, "unknown rf chip, can't set channel map in function:%s()\n", __FUNCTION__);
 324                         }
 325                         if (ChannelPlan[channel_plan].Len != 0){
 326                                 // Clear old channel map
 327                                 memset(GET_DOT11D_INFO(ieee)->channel_map, 0, sizeof(GET_DOT11D_INFO(ieee)->channel_map));
 328                                 // Set new channel map
 329                                 for (i=0;i<ChannelPlan[channel_plan].Len;i++)
 330                                 {
 331                                         if (ChannelPlan[channel_plan].Channel[i] < min_chan || ChannelPlan[channel_plan].Channel[i] > max_chan)
 332                                         break;
 333                                         GET_DOT11D_INFO(ieee)->channel_map[ChannelPlan[channel_plan].Channel[i]] = 1;
 334                                 }
 335                         }
 336                         break;
 337                 }
 338                 case COUNTRY_CODE_GLOBAL_DOMAIN:
 339                 {
 340                         GET_DOT11D_INFO(ieee)->bEnabled = 0;//this flag enabled to follow 11d country IE setting, otherwise, it shall follow global domain settings.
 341                         Dot11d_Reset(ieee);
 342                         ieee->bGlobalDomain = true;
 343                         break;
 344                 }
 345                 default:
 346                         break;
 347         }
 348         return;
 349 }
 350
 351 #define eqMacAddr(a,b) ( ((a)[0]==(b)[0] && (a)[1]==(b)[1] && (a)[2]==(b)[2] && (a)[3]==(b)[3] && (a)[4]==(b)[4] && (a)[5]==(b)[5]) ? 1:0 )
 352
 353 #ifdef RTL8192SU
 354 #define         rx_hal_is_cck_rate(_pDesc)\
 355                         ((_pDesc->RxMCS  == DESC92S_RATE1M ||\
 356                         _pDesc->RxMCS == DESC92S_RATE2M ||\
 357                         _pDesc->RxMCS == DESC92S_RATE5_5M ||\
 358                         _pDesc->RxMCS == DESC92S_RATE11M) &&\
 359                         !_pDesc->RxHT)
 360
 361 #define         tx_hal_is_cck_rate(_DataRate)\
 362                         ( _DataRate == MGN_1M ||\
 363                          _DataRate == MGN_2M ||\
 364                          _DataRate == MGN_5_5M ||\
 365                          _DataRate == MGN_11M )
 366
 367 #else
 368 #define         rx_hal_is_cck_rate(_pdrvinfo)\
 369                         ((_pdrvinfo->RxRate == DESC90_RATE1M ||\
 370                         _pdrvinfo->RxRate == DESC90_RATE2M ||\
 371                         _pdrvinfo->RxRate == DESC90_RATE5_5M ||\
 372                         _pdrvinfo->RxRate == DESC90_RATE11M) &&\
 373                         !_pdrvinfo->RxHT)
 374 #endif
 375
 376
 377
 378 void CamResetAllEntry(struct net_device *dev)
 379 {
 380 #if 1
 381         u32 ulcommand = 0;
 382         //2004/02/11  In static WEP, OID_ADD_KEY or OID_ADD_WEP are set before STA associate to AP.
 383         // However, ResetKey is called on OID_802_11_INFRASTRUCTURE_MODE and MlmeAssociateRequest
 384         // In this condition, Cam can not be reset because upper layer will not set this static key again.
 385         //if(Adapter->EncAlgorithm == WEP_Encryption)
 386         //      return;
 387 //debug
 388         //DbgPrint("========================================\n");
 389         //DbgPrint("                            Call ResetAllEntry                                              \n");
 390         //DbgPrint("========================================\n\n");
 391         ulcommand |= BIT31|BIT30;
 392         write_nic_dword(dev, RWCAM, ulcommand);
 393 #else
 394         for(ucIndex=0;ucIndex<TOTAL_CAM_ENTRY;ucIndex++)
 395                 CAM_mark_invalid(dev, ucIndex);
 396         for(ucIndex=0;ucIndex<TOTAL_CAM_ENTRY;ucIndex++)
 397                 CAM_empty_entry(dev, ucIndex);
 398 #endif
 399
 400 }
 401
 402
 403 void write_cam(struct net_device *dev, u8 addr, u32 data)
 404 {
 405         write_nic_dword(dev, WCAMI, data);
 406         write_nic_dword(dev, RWCAM, BIT31|BIT16|(addr&0xff) );
 407 }
 408
 409 u32 read_cam(struct net_device *dev, u8 addr)
 410 {
 411         write_nic_dword(dev, RWCAM, 0x80000000|(addr&0xff) );
 412         return read_nic_dword(dev, 0xa8);
 413 }
 414
 415 void write_nic_byte_E(struct net_device *dev, int indx, u8 data)
 416 {
 417         int status;
 418         struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
 419         struct usb_device *udev = priv->udev;
 420
 421         status = usb_control_msg(udev, usb_sndctrlpipe(udev, 0),
 422                                RTL8187_REQ_SET_REGS, RTL8187_REQT_WRITE,
 423                                indx|0xfe00, 0, &data, 1, HZ / 2);
 424
 425         if (status < 0)
 426         {
 427                 printk("write_nic_byte_E TimeOut! status:%d\n", status);
 428         }
 429 }
 430
 431 u8 read_nic_byte_E(struct net_device *dev, int indx)
 432 {
 433         int status;
 434         u8 data;
 435         struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
 436         struct usb_device *udev = priv->udev;
 437
 438         status = usb_control_msg(udev, usb_rcvctrlpipe(udev, 0),
 439                                RTL8187_REQ_GET_REGS, RTL8187_REQT_READ,
 440                                indx|0xfe00, 0, &data, 1, HZ / 2);
 441
 442         if (status < 0)
 443         {
 444                 printk("read_nic_byte_E TimeOut! status:%d\n", status);
 445         }
 446
 447         return data;
 448 }
 449 //as 92U has extend page from 4 to 16, so modify functions below.
 450 void write_nic_byte(struct net_device *dev, int indx, u8 data)
 451 {
 452         int status;
 453
 454         struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
 455         struct usb_device *udev = priv->udev;
 456
 457         status = usb_control_msg(udev, usb_sndctrlpipe(udev, 0),
 458                                RTL8187_REQ_SET_REGS, RTL8187_REQT_WRITE,
 459 #ifdef RTL8192SU
 460                                indx, 0, &data, 1, HZ / 2);
 461 #else
 462                                (indx&0xff)|0xff00, (indx>>8)&0x0f, &data, 1, HZ / 2);
 463 #endif
 464
 465         if (status < 0)
 466         {
 467                 printk("write_nic_byte TimeOut! status:%d\n", status);
 468         }
 469
 470
 471 }
 472
 473
 474 void write_nic_word(struct net_device *dev, int indx, u16 data)
 475 {
 476
 477         int status;
 478
 479         struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
 480         struct usb_device *udev = priv->udev;
 481
 482         status = usb_control_msg(udev, usb_sndctrlpipe(udev, 0),
 483                                RTL8187_REQ_SET_REGS, RTL8187_REQT_WRITE,
 484 #ifdef RTL8192SU
 485                                indx, 0, &data, 2, HZ / 2);
 486 #else
 487                                (indx&0xff)|0xff00, (indx>>8)&0x0f, &data, 2, HZ / 2);
 488 #endif
 489
 490         if (status < 0)
 491         {
 492                 printk("write_nic_word TimeOut! status:%d\n", status);
 493         }
 494
 495 }
 496
 497
 498 void write_nic_dword(struct net_device *dev, int indx, u32 data)
 499 {
 500
 501         int status;
 502
 503         struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
 504         struct usb_device *udev = priv->udev;
 505
 506         status = usb_control_msg(udev, usb_sndctrlpipe(udev, 0),
 507                                RTL8187_REQ_SET_REGS, RTL8187_REQT_WRITE,
 508 #ifdef RTL8192SU
 509                                indx, 0, &data, 4, HZ / 2);
 510 #else
 511                                (indx&0xff)|0xff00, (indx>>8)&0x0f, &data, 4, HZ / 2);
 512 #endif
 513
 514
 515         if (status < 0)
 516         {
 517                 printk("write_nic_dword TimeOut! status:%d\n", status);
 518         }
 519
 520 }
 521
 522
 523
 524 u8 read_nic_byte(struct net_device *dev, int indx)
 525 {
 526         u8 data;
 527         int status;
 528         struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
 529         struct usb_device *udev = priv->udev;
 530
 531         status = usb_control_msg(udev, usb_rcvctrlpipe(udev, 0),
 532                                RTL8187_REQ_GET_REGS, RTL8187_REQT_READ,
 533 #ifdef RTL8192SU
 534                                indx, 0, &data, 1, HZ / 2);
 535 #else
 536                                (indx&0xff)|0xff00, (indx>>8)&0x0f, &data, 1, HZ / 2);
 537 #endif
 538
 539         if (status < 0)
 540         {
 541                 printk("read_nic_byte TimeOut! status:%d\n", status);
 542         }
 543
 544         return data;
 545 }
 546
 547
 548
 549 u16 read_nic_word(struct net_device *dev, int indx)
 550 {
 551         u16 data;
 552         int status;
 553         struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
 554         struct usb_device *udev = priv->udev;
 555
 556         status = usb_control_msg(udev, usb_rcvctrlpipe(udev, 0),
 557                                RTL8187_REQ_GET_REGS, RTL8187_REQT_READ,
 558 #ifdef RTL8192SU
 559                                indx, 0, &data, 2, HZ / 2);
 560 #else
 561                                (indx&0xff)|0xff00, (indx>>8)&0x0f, &data, 2, HZ / 2);
 562 #endif
 563
 564         if (status < 0)
 565         {
 566                 printk("read_nic_word TimeOut! status:%d\n", status);
 567         }
 568
 569
 570         return data;
 571 }
 572
 573 u16 read_nic_word_E(struct net_device *dev, int indx)
 574 {
 575         u16 data;
 576         int status;
 577         struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
 578         struct usb_device *udev = priv->udev;
 579
 580         status = usb_control_msg(udev, usb_rcvctrlpipe(udev, 0),
 581                                RTL8187_REQ_GET_REGS, RTL8187_REQT_READ,
 582                                indx|0xfe00, 0, &data, 2, HZ / 2);
 583
 584         if (status < 0)
 585         {
 586                 printk("read_nic_word TimeOut! status:%d\n", status);
 587         }
 588
 589
 590         return data;
 591 }
 592
 593 u32 read_nic_dword(struct net_device *dev, int indx)
 594 {
 595         u32 data;
 596         int status;
 597 //      int result;
 598
 599         struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
 600         struct usb_device *udev = priv->udev;
 601
 602         status = usb_control_msg(udev, usb_rcvctrlpipe(udev, 0),
 603                                RTL8187_REQ_GET_REGS, RTL8187_REQT_READ,
 604 #ifdef RTL8192SU
 605                                indx, 0, &data, 4, HZ / 2);
 606 #else
 607                                (indx&0xff)|0xff00, (indx>>8)&0x0f, &data, 4, HZ / 2);
 608 #endif
 609 //      if(0 != result) {
 610 //        printk(KERN_WARNING "read size of data = %d\, date = %d\n", result, data);
 611 //      }
 612
 613         if (status < 0)
 614         {
 615                 printk("read_nic_dword TimeOut! status:%d\n", status);
 616                 if(status == -ENODEV) {
 617                         priv->usb_error = true;
 618                 }
 619         }
 620
 621
 622
 623         return data;
 624 }
 625
 626
 627 //u8 read_phy_cck(struct net_device *dev, u8 adr);
 628 //u8 read_phy_ofdm(struct net_device *dev, u8 adr);
 629 /* this might still called in what was the PHY rtl8185/rtl8192 common code
 630  * plans are to possibilty turn it again in one common code...
 631  */
 632 inline void force_pci_posting(struct net_device *dev)
 633 {
 634 }
 635
 636
 637 static struct net_device_stats *rtl8192_stats(struct net_device *dev);
 638 void rtl8192_commit(struct net_device *dev);
 639 //void rtl8192_restart(struct net_device *dev);
 640 void rtl8192_restart(struct work_struct *work);
 641 //void rtl8192_rq_tx_ack(struct work_struct *work);
 642
 643 void watch_dog_timer_callback(unsigned long data);
 644
 645 /****************************************************************************
 646    -----------------------------PROCFS STUFF-------------------------
 647 *****************************************************************************/
 648
 649 static struct proc_dir_entry *rtl8192_proc = NULL;
 650
 651
 652
 653 static int proc_get_stats_ap(char *page, char **start,
 654                           off_t offset, int count,
 655                           int *eof, void *data)
 656 {
 657         struct net_device *dev = data;
 658         struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
 659         struct ieee80211_device *ieee = priv->ieee80211;
 660         struct ieee80211_network *target;
 661
 662         int len = 0;
 663
 664         list_for_each_entry(target, &ieee->network_list, list) {
 665
 666                 len += snprintf(page + len, count - len,
 667                 "%s ", target->ssid);
 668
 669                 if(target->wpa_ie_len>0 || target->rsn_ie_len>0){
 670                         len += snprintf(page + len, count - len,
 671                         "WPA\n");
 672                 }
 673                 else{
 674                         len += snprintf(page + len, count - len,
 675                         "non_WPA\n");
 676                 }
 677
 678         }
 679
 680         *eof = 1;
 681         return len;
 682 }
 683
 684 #ifdef RTL8192SU
 685 static int proc_get_registers(char *page, char **start,
 686                           off_t offset, int count,
 687                           int *eof, void *data)
 688 {
 689         struct net_device *dev = data;
 690 //      struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
 691
 692         int len = 0;
 693         int i,n,page0,page1,page2;
 694
 695         int max=0xff;
 696         page0 = 0x000;
 697         page1 = 0x100;
 698         page2 = 0x800;
 699
 700         /* This dump the current register page */
 701         if(!IS_BB_REG_OFFSET_92S(page0)){
 702                 len += snprintf(page + len, count - len,
 703                                 "\n####################page %x##################\n ", (page0>>8));
 704                 for(n=0;n<=max;)
 705                 {
 706                         len += snprintf(page + len, count - len,
 707                                         "\nD:  %2x > ",n);
 708                         for(i=0;i<16 && n<=max;i++,n++)
 709                                 len += snprintf(page + len, count - len,
 710                                                 "%2.2x ",read_nic_byte(dev,(page0|n)));
 711                 }
 712         }else{
 713                 len += snprintf(page + len, count - len,
 714                                 "\n####################page %x##################\n ", (page0>>8));
 715                 for(n=0;n<=max;)
 716                 {
 717                         len += snprintf(page + len, count - len, "\nD:  %2x > ",n);
 718                         for(i=0;i<4 && n<=max;n+=4,i++)
 719                                 len += snprintf(page + len, count - len,
 720                                                 "%8.8x ",rtl8192_QueryBBReg(dev,(page0|n), bMaskDWord));
 721                 }
 722         }
 723         len += snprintf(page + len, count - len,"\n");
 724         *eof = 1;
 725         return len;
 726
 727 }
 728 static int proc_get_registers_1(char *page, char **start,
 729                           off_t offset, int count,
 730                           int *eof, void *data)
 731 {
 732         struct net_device *dev = data;
 733 //      struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
 734
 735         int len = 0;
 736         int i,n,page0;
 737
 738         int max=0xff;
 739         page0 = 0x100;
 740
 741         /* This dump the current register page */
 742                 len += snprintf(page + len, count - len,
 743                                 "\n####################page %x##################\n ", (page0>>8));
 744                 for(n=0;n<=max;)
 745                 {
 746                         len += snprintf(page + len, count - len,
 747                                         "\nD:  %2x > ",n);
 748                         for(i=0;i<16 && n<=max;i++,n++)
 749                                 len += snprintf(page + len, count - len,
 750                                                 "%2.2x ",read_nic_byte(dev,(page0|n)));
 751                 }
 752         len += snprintf(page + len, count - len,"\n");
 753         *eof = 1;
 754         return len;
 755
 756 }
 757 static int proc_get_registers_2(char *page, char **start,
 758                           off_t offset, int count,
 759                           int *eof, void *data)
 760 {
 761         struct net_device *dev = data;
 762 //      struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
 763
 764         int len = 0;
 765         int i,n,page0;
 766
 767         int max=0xff;
 768         page0 = 0x200;
 769
 770         /* This dump the current register page */
 771                 len += snprintf(page + len, count - len,
 772                                 "\n####################page %x##################\n ", (page0>>8));
 773                 for(n=0;n<=max;)
 774                 {
 775                         len += snprintf(page + len, count - len,
 776                                         "\nD:  %2x > ",n);
 777                         for(i=0;i<16 && n<=max;i++,n++)
 778                                 len += snprintf(page + len, count - len,
 779                                                 "%2.2x ",read_nic_byte(dev,(page0|n)));
 780                 }
 781         len += snprintf(page + len, count - len,"\n");
 782         *eof = 1;
 783         return len;
 784
 785 }
 786 static int proc_get_registers_8(char *page, char **start,
 787                           off_t offset, int count,
 788                           int *eof, void *data)
 789 {
 790         struct net_device *dev = data;
 791
 792         int len = 0;
 793         int i,n,page0;
 794
 795         int max=0xff;
 796         page0 = 0x800;
 797
 798         /* This dump the current register page */
 799                 len += snprintf(page + len, count - len,
 800                                 "\n####################page %x##################\n ", (page0>>8));
 801                 for(n=0;n<=max;)
 802                 {
 803                         len += snprintf(page + len, count - len, "\nD:  %2x > ",n);
 804                         for(i=0;i<4 && n<=max;n+=4,i++)
 805                                 len += snprintf(page + len, count - len,
 806                                                 "%8.8x ",rtl8192_QueryBBReg(dev,(page0|n), bMaskDWord));
 807                 }
 808         len += snprintf(page + len, count - len,"\n");
 809         *eof = 1;
 810         return len;
 811
 812         }
 813 static int proc_get_registers_9(char *page, char **start,
 814                           off_t offset, int count,
 815                           int *eof, void *data)
 816 {
 817         struct net_device *dev = data;
 818 //      struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
 819
 820         int len = 0;
 821         int i,n,page0;
 822
 823         int max=0xff;
 824         page0 = 0x900;
 825
 826         /* This dump the current register page */
 827                 len += snprintf(page + len, count - len,
 828                                 "\n####################page %x##################\n ", (page0>>8));
 829                 for(n=0;n<=max;)
 830                 {
 831                         len += snprintf(page + len, count - len, "\nD:  %2x > ",n);
 832                         for(i=0;i<4 && n<=max;n+=4,i++)
 833                         len += snprintf(page + len, count - len,
 834                                                 "%8.8x ",rtl8192_QueryBBReg(dev,(page0|n), bMaskDWord));
 835                 }
 836         len += snprintf(page + len, count - len,"\n");
 837         *eof = 1;
 838         return len;
 839 }
 840 static int proc_get_registers_a(char *page, char **start,
 841                           off_t offset, int count,
 842                           int *eof, void *data)
 843 {
 844         struct net_device *dev = data;
 845 //      struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
 846
 847         int len = 0;
 848         int i,n,page0;
 849
 850         int max=0xff;
 851         page0 = 0xa00;
 852
 853         /* This dump the current register page */
 854                                 len += snprintf(page + len, count - len,
 855                                 "\n####################page %x##################\n ", (page0>>8));
 856                 for(n=0;n<=max;)
 857                 {
 858                         len += snprintf(page + len, count - len, "\nD:  %2x > ",n);
 859                         for(i=0;i<4 && n<=max;n+=4,i++)
 860                                 len += snprintf(page + len, count - len,
 861                                                 "%8.8x ",rtl8192_QueryBBReg(dev,(page0|n), bMaskDWord));
 862                 }
 863         len += snprintf(page + len, count - len,"\n");
 864         *eof = 1;
 865         return len;
 866 }
 867 static int proc_get_registers_b(char *page, char **start,
 868                           off_t offset, int count,
 869                           int *eof, void *data)
 870 {
 871         struct net_device *dev = data;
 872 //      struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
 873
 874         int len = 0;
 875         int i,n,page0;
 876
 877         int max=0xff;
 878         page0 = 0xb00;
 879
 880         /* This dump the current register page */
 881                 len += snprintf(page + len, count - len,
 882                                 "\n####################page %x##################\n ", (page0>>8));
 883                 for(n=0;n<=max;)
 884                 {
 885                         len += snprintf(page + len, count - len, "\nD:  %2x > ",n);
 886                         for(i=0;i<4 && n<=max;n+=4,i++)
 887                                 len += snprintf(page + len, count - len,
 888                                                 "%8.8x ",rtl8192_QueryBBReg(dev,(page0|n), bMaskDWord));
 889                 }
 890         len += snprintf(page + len, count - len,"\n");
 891         *eof = 1;
 892         return len;
 893         }
 894 static int proc_get_registers_c(char *page, char **start,
 895                           off_t offset, int count,
 896                           int *eof, void *data)
 897 {
 898         struct net_device *dev = data;
 899 //      struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
 900
 901         int len = 0;
 902         int i,n,page0;
 903
 904         int max=0xff;
 905         page0 = 0xc00;
 906
 907         /* This dump the current register page */
 908                 len += snprintf(page + len, count - len,
 909                                 "\n####################page %x##################\n ", (page0>>8));
 910                 for(n=0;n<=max;)
 911                 {
 912                         len += snprintf(page + len, count - len, "\nD:  %2x > ",n);
 913                         for(i=0;i<4 && n<=max;n+=4,i++)
 914                                 len += snprintf(page + len, count - len,
 915                                                 "%8.8x ",rtl8192_QueryBBReg(dev,(page0|n), bMaskDWord));
 916                 }
 917         len += snprintf(page + len, count - len,"\n");
 918         *eof = 1;
 919         return len;
 920 }
 921 static int proc_get_registers_d(char *page, char **start,
 922                           off_t offset, int count,
 923                           int *eof, void *data)
 924 {
 925         struct net_device *dev = data;
 926 //      struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
 927
 928         int len = 0;
 929         int i,n,page0;
 930
 931         int max=0xff;
 932         page0 = 0xd00;
 933
 934         /* This dump the current register page */
 935                 len += snprintf(page + len, count - len,
 936                                 "\n####################page %x##################\n ", (page0>>8));
 937                 for(n=0;n<=max;)
 938                 {
 939                         len += snprintf(page + len, count - len, "\nD:  %2x > ",n);
 940                         for(i=0;i<4 && n<=max;n+=4,i++)
 941                                 len += snprintf(page + len, count - len,
 942                                                 "%8.8x ",rtl8192_QueryBBReg(dev,(page0|n), bMaskDWord));
 943                 }
 944         len += snprintf(page + len, count - len,"\n");
 945         *eof = 1;
 946         return len;
 947 }
 948 static int proc_get_registers_e(char *page, char **start,
 949                           off_t offset, int count,
 950                           int *eof, void *data)
 951 {
 952         struct net_device *dev = data;
 953 //      struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
 954
 955         int len = 0;
 956         int i,n,page0;
 957
 958         int max=0xff;
 959         page0 = 0xe00;
 960
 961         /* This dump the current register page */
 962                 len += snprintf(page + len, count - len,
 963                                 "\n####################page %x##################\n ", (page0>>8));
 964                 for(n=0;n<=max;)
 965                 {
 966                         len += snprintf(page + len, count - len, "\nD:  %2x > ",n);
 967                         for(i=0;i<4 && n<=max;n+=4,i++)
 968                                 len += snprintf(page + len, count - len,
 969                                                 "%8.8x ",rtl8192_QueryBBReg(dev,(page0|n), bMaskDWord));
 970                 }
 971         len += snprintf(page + len, count - len,"\n");
 972         *eof = 1;
 973         return len;
 974 }
 975 #else
 976 static int proc_get_registers(char *page, char **start,
 977                           off_t offset, int count,
 978                           int *eof, void *data)
 979 {
 980         struct net_device *dev = data;
 981 //      struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
 982
 983         int len = 0;
 984         int i,n;
 985
 986         int max=0xff;
 987
 988         /* This dump the current register page */
 989 len += snprintf(page + len, count - len,
 990                         "\n####################page 0##################\n ");
 991
 992         for(n=0;n<=max;)
 993         {
 994                 //printk( "\nD: %2x> ", n);
 995                 len += snprintf(page + len, count - len,
 996                         "\nD:  %2x > ",n);
 997
 998                 for(i=0;i<16 && n<=max;i++,n++)
 999                 len += snprintf(page + len, count - len,
1000                         "%2x ",read_nic_byte(dev,0x000|n));
1001
1002                 //      printk("%2x ",read_nic_byte(dev,n));
1003         }
1004 #if 1
1005 len += snprintf(page + len, count - len,
1006                         "\n####################page 1##################\n ");
1007         for(n=0;n<=max;)
1008         {
1009                 //printk( "\nD: %2x> ", n);
1010                 len += snprintf(page + len, count - len,
1011                         "\nD:  %2x > ",n);
1012
1013                 for(i=0;i<16 && n<=max;i++,n++)
1014                 len += snprintf(page + len, count - len,
1015                         "%2x ",read_nic_byte(dev,0x100|n));
1016
1017                 //      printk("%2x ",read_nic_byte(dev,n));
1018         }
1019 len += snprintf(page + len, count - len,
1020                         "\n####################page 3##################\n ");
1021         for(n=0;n<=max;)
1022         {
1023                 //printk( "\nD: %2x> ", n);
1024                 len += snprintf(page + len, count - len,
1025                         "\nD:  %2x > ",n);
1026
1027                 for(i=0;i<16 && n<=max;i++,n++)
1028                 len += snprintf(page + len, count - len,
1029                         "%2x ",read_nic_byte(dev,0x300|n));
1030
1031                 //      printk("%2x ",read_nic_byte(dev,n));
1032         }
1033
1034 #endif
1035
1036         len += snprintf(page + len, count - len,"\n");
1037         *eof = 1;
1038         return len;
1039
1040 }
1041 #endif
1042
1043 #if 0
1044 static int proc_get_cck_reg(char *page, char **start,
1045                           off_t offset, int count,
1046                           int *eof, void *data)
1047 {
1048         struct net_device *dev = data;
1049 //      struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
1050
1051         int len = 0;
1052         int i,n;
1053
1054         int max = 0x5F;
1055
1056         /* This dump the current register page */
1057         for(n=0;n<=max;)
1058         {
1059                 //printk( "\nD: %2x> ", n);
1060                 len += snprintf(page + len, count - len,
1061                         "\nD:  %2x > ",n);
1062
1063                 for(i=0;i<16 && n<=max;i++,n++)
1064                 len += snprintf(page + len, count - len,
1065                         "%2x ",read_phy_cck(dev,n));
1066
1067                 //      printk("%2x ",read_nic_byte(dev,n));
1068         }
1069         len += snprintf(page + len, count - len,"\n");
1070
1071
1072         *eof = 1;
1073         return len;
1074 }
1075
1076 #endif
1077
1078 #if 0
1079 static int proc_get_ofdm_reg(char *page, char **start,
1080                           off_t offset, int count,
1081                           int *eof, void *data)
1082 {
1083         struct net_device *dev = data;
1084 //      struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
1085
1086         int len = 0;
1087         int i,n;
1088
1089         //int max=0xff;
1090         int max = 0x40;
1091
1092         /* This dump the current register page */
1093         for(n=0;n<=max;)
1094         {
1095                 //printk( "\nD: %2x> ", n);
1096                 len += snprintf(page + len, count - len,
1097                         "\nD:  %2x > ",n);
1098
1099                 for(i=0;i<16 && n<=max;i++,n++)
1100                 len += snprintf(page + len, count - len,
1101                         "%2x ",read_phy_ofdm(dev,n));
1102
1103                 //      printk("%2x ",read_nic_byte(dev,n));
1104         }
1105         len += snprintf(page + len, count - len,"\n");
1106
1107
1108
1109         *eof = 1;
1110         return len;
1111 }
1112
1113 #endif
1114
1115 #if 0
1116 static int proc_get_stats_hw(char *page, char **start,
1117                           off_t offset, int count,
1118                           int *eof, void *data)
1119 {
1120         struct net_device *dev = data;
1121         struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
1122
1123         int len = 0;
1124
1125         len += snprintf(page + len, count - len,
1126                 "NIC int: %lu\n"
1127                 "Total int: %lu\n",
1128                 priv->stats.ints,
1129                 priv->stats.shints);
1130
1131         *eof = 1;
1132         return len;
1133 }
1134 #endif
1135
1136 static int proc_get_stats_tx(char *page, char **start,
1137                           off_t offset, int count,
1138                           int *eof, void *data)
1139 {
1140         struct net_device *dev = data;
1141         struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
1142
1143         int len = 0;
1144
1145         len += snprintf(page + len, count - len,
1146                 "TX VI priority ok int: %lu\n"
1147                 "TX VI priority error int: %lu\n"
1148                 "TX VO priority ok int: %lu\n"
1149                 "TX VO priority error int: %lu\n"
1150                 "TX BE priority ok int: %lu\n"
1151                 "TX BE priority error int: %lu\n"
1152                 "TX BK priority ok int: %lu\n"
1153                 "TX BK priority error int: %lu\n"
1154                 "TX MANAGE priority ok int: %lu\n"
1155                 "TX MANAGE priority error int: %lu\n"
1156                 "TX BEACON priority ok int: %lu\n"
1157                 "TX BEACON priority error int: %lu\n"
1158 //              "TX high priority ok int: %lu\n"
1159 //              "TX high priority failed error int: %lu\n"
1160                 "TX queue resume: %lu\n"
1161                 "TX queue stopped?: %d\n"
1162                 "TX fifo overflow: %lu\n"
1163 //              "TX beacon: %lu\n"
1164                 "TX VI queue: %d\n"
1165                 "TX VO queue: %d\n"
1166                 "TX BE queue: %d\n"
1167                 "TX BK queue: %d\n"
1168 //              "TX HW queue: %d\n"
1169                 "TX VI dropped: %lu\n"
1170                 "TX VO dropped: %lu\n"
1171                 "TX BE dropped: %lu\n"
1172                 "TX BK dropped: %lu\n"
1173                 "TX total data packets %lu\n",
1174 //              "TX beacon aborted: %lu\n",
1175                 priv->stats.txviokint,
1176                 priv->stats.txvierr,
1177                 priv->stats.txvookint,
1178                 priv->stats.txvoerr,
1179                 priv->stats.txbeokint,
1180                 priv->stats.txbeerr,
1181                 priv->stats.txbkokint,
1182                 priv->stats.txbkerr,
1183                 priv->stats.txmanageokint,
1184                 priv->stats.txmanageerr,
1185                 priv->stats.txbeaconokint,
1186                 priv->stats.txbeaconerr,
1187 //              priv->stats.txhpokint,
1188 //              priv->stats.txhperr,
1189                 priv->stats.txresumed,
1190                 netif_queue_stopped(dev),
1191                 priv->stats.txoverflow,
1192 //              priv->stats.txbeacon,
1193                 atomic_read(&(priv->tx_pending[VI_PRIORITY])),
1194                 atomic_read(&(priv->tx_pending[VO_PRIORITY])),
1195                 atomic_read(&(priv->tx_pending[BE_PRIORITY])),
1196                 atomic_read(&(priv->tx_pending[BK_PRIORITY])),
1197 //              read_nic_byte(dev, TXFIFOCOUNT),
1198                 priv->stats.txvidrop,
1199                 priv->stats.txvodrop,
1200                 priv->stats.txbedrop,
1201                 priv->stats.txbkdrop,
1202                 priv->stats.txdatapkt
1203 //              priv->stats.txbeaconerr
1204                 );
1205
1206         *eof = 1;
1207         return len;
1208 }
1209
1210
1211
1212 static int proc_get_stats_rx(char *page, char **start,
1213                           off_t offset, int count,
1214                           int *eof, void *data)
1215 {
1216         struct net_device *dev = data;
1217         struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
1218
1219         int len = 0;
1220
1221         len += snprintf(page + len, count - len,
1222                 "RX packets: %lu\n"
1223                 "RX urb status error: %lu\n"
1224                 "RX invalid urb error: %lu\n",
1225                 priv->stats.rxoktotal,
1226                 priv->stats.rxstaterr,
1227                 priv->stats.rxurberr);
1228
1229         *eof = 1;
1230         return len;
1231 }
1232
1233 void rtl8192_proc_module_init(void)
1234 {
1235         RT_TRACE(COMP_INIT, "Initializing proc filesystem");
1236         rtl8192_proc=create_proc_entry(RTL819xU_MODULE_NAME, S_IFDIR, init_net.proc_net);
1237 }
1238
1239
1240 void rtl8192_proc_module_remove(void)
1241 {
1242         remove_proc_entry(RTL819xU_MODULE_NAME, init_net.proc_net);
1243 }
1244
1245
1246 void rtl8192_proc_remove_one(struct net_device *dev)
1247 {
1248         struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
1249
1250
1251         if (priv->dir_dev) {
1252         //      remove_proc_entry("stats-hw", priv->dir_dev);
1253                 remove_proc_entry("stats-tx", priv->dir_dev);
1254                 remove_proc_entry("stats-rx", priv->dir_dev);
1255         //      remove_proc_entry("stats-ieee", priv->dir_dev);
1256                 remove_proc_entry("stats-ap", priv->dir_dev);
1257                 remove_proc_entry("registers", priv->dir_dev);
1258                 remove_proc_entry("registers-1", priv->dir_dev);
1259                 remove_proc_entry("registers-2", priv->dir_dev);
1260                 remove_proc_entry("registers-8", priv->dir_dev);
1261                 remove_proc_entry("registers-9", priv->dir_dev);
1262                 remove_proc_entry("registers-a", priv->dir_dev);
1263                 remove_proc_entry("registers-b", priv->dir_dev);
1264                 remove_proc_entry("registers-c", priv->dir_dev);
1265                 remove_proc_entry("registers-d", priv->dir_dev);
1266                 remove_proc_entry("registers-e", priv->dir_dev);
1267         //      remove_proc_entry("cck-registers",priv->dir_dev);
1268         //      remove_proc_entry("ofdm-registers",priv->dir_dev);
1269                 //remove_proc_entry(dev->name, rtl8192_proc);
1270                 remove_proc_entry("wlan0", rtl8192_proc);
1271                 priv->dir_dev = NULL;
1272         }
1273 }
1274
1275
1276 void rtl8192_proc_init_one(struct net_device *dev)
1277 {
1278         struct proc_dir_entry *e;
1279         struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
1280         priv->dir_dev = create_proc_entry(dev->name,
1281                                           S_IFDIR | S_IRUGO | S_IXUGO,
1282                                           rtl8192_proc);
1283         if (!priv->dir_dev) {
1284                 RT_TRACE(COMP_ERR, "Unable to initialize /proc/net/rtl8192/%s\n",
1285                       dev->name);
1286                 return;
1287         }
1288         #if 0
1289         e = create_proc_read_entry("stats-hw", S_IFREG | S_IRUGO,
1290                                    priv->dir_dev, proc_get_stats_hw, dev);
1291
1292         if (!e) {
1293                 DMESGE("Unable to initialize "
1294                       "/proc/net/rtl8192/%s/stats-hw\n",
1295                       dev->name);
1296         }
1297         #endif
1298         e = create_proc_read_entry("stats-rx", S_IFREG | S_IRUGO,
1299                                    priv->dir_dev, proc_get_stats_rx, dev);
1300
1301         if (!e) {
1302                 RT_TRACE(COMP_ERR,"Unable to initialize "
1303                       "/proc/net/rtl8192/%s/stats-rx\n",
1304                       dev->name);
1305         }
1306
1307
1308         e = create_proc_read_entry("stats-tx", S_IFREG | S_IRUGO,
1309                                    priv->dir_dev, proc_get_stats_tx, dev);
1310
1311         if (!e) {
1312                 RT_TRACE(COMP_ERR, "Unable to initialize "
1313                       "/proc/net/rtl8192/%s/stats-tx\n",
1314                       dev->name);
1315         }
1316         #if 0
1317         e = create_proc_read_entry("stats-ieee", S_IFREG | S_IRUGO,
1318                                    priv->dir_dev, proc_get_stats_ieee, dev);
1319
1320         if (!e) {
1321                 DMESGE("Unable to initialize "
1322                       "/proc/net/rtl8192/%s/stats-ieee\n",
1323                       dev->name);
1324         }
1325
1326         #endif
1327
1328         e = create_proc_read_entry("stats-ap", S_IFREG | S_IRUGO,
1329                                    priv->dir_dev, proc_get_stats_ap, dev);
1330
1331         if (!e) {
1332                 RT_TRACE(COMP_ERR, "Unable to initialize "
1333                       "/proc/net/rtl8192/%s/stats-ap\n",
1334                       dev->name);
1335         }
1336
1337         e = create_proc_read_entry("registers", S_IFREG | S_IRUGO,
1338                                    priv->dir_dev, proc_get_registers, dev);
1339         if (!e) {
1340                 RT_TRACE(COMP_ERR, "Unable to initialize "
1341                       "/proc/net/rtl8192/%s/registers\n",
1342                       dev->name);
1343         }
1344 #ifdef RTL8192SU
1345         e = create_proc_read_entry("registers-1", S_IFREG | S_IRUGO,
1346                                    priv->dir_dev, proc_get_registers_1, dev);
1347         if (!e) {
1348                 RT_TRACE(COMP_ERR, "Unable to initialize "
1349                       "/proc/net/rtl8192/%s/registers-1\n",
1350                       dev->name);
1351         }
1352         e = create_proc_read_entry("registers-2", S_IFREG | S_IRUGO,
1353                                    priv->dir_dev, proc_get_registers_2, dev);
1354         if (!e) {
1355                 RT_TRACE(COMP_ERR, "Unable to initialize "
1356                       "/proc/net/rtl8192/%s/registers-2\n",
1357                       dev->name);
1358         }
1359         e = create_proc_read_entry("registers-8", S_IFREG | S_IRUGO,
1360                                    priv->dir_dev, proc_get_registers_8, dev);
1361         if (!e) {
1362                 RT_TRACE(COMP_ERR, "Unable to initialize "
1363                       "/proc/net/rtl8192/%s/registers-8\n",
1364                       dev->name);
1365         }
1366         e = create_proc_read_entry("registers-9", S_IFREG | S_IRUGO,
1367                                    priv->dir_dev, proc_get_registers_9, dev);
1368         if (!e) {
1369                 RT_TRACE(COMP_ERR, "Unable to initialize "
1370                       "/proc/net/rtl8192/%s/registers-9\n",
1371                       dev->name);
1372         }
1373         e = create_proc_read_entry("registers-a", S_IFREG | S_IRUGO,
1374                                    priv->dir_dev, proc_get_registers_a, dev);
1375         if (!e) {
1376                 RT_TRACE(COMP_ERR, "Unable to initialize "
1377                       "/proc/net/rtl8192/%s/registers-a\n",
1378                       dev->name);
1379         }
1380         e = create_proc_read_entry("registers-b", S_IFREG | S_IRUGO,
1381                                    priv->dir_dev, proc_get_registers_b, dev);
1382         if (!e) {
1383                 RT_TRACE(COMP_ERR, "Unable to initialize "
1384                       "/proc/net/rtl8192/%s/registers-b\n",
1385                       dev->name);
1386         }
1387         e = create_proc_read_entry("registers-c", S_IFREG | S_IRUGO,
1388                                    priv->dir_dev, proc_get_registers_c, dev);
1389         if (!e) {
1390                 RT_TRACE(COMP_ERR, "Unable to initialize "
1391                       "/proc/net/rtl8192/%s/registers-c\n",
1392                       dev->name);
1393         }
1394         e = create_proc_read_entry("registers-d", S_IFREG | S_IRUGO,
1395                                    priv->dir_dev, proc_get_registers_d, dev);
1396         if (!e) {
1397                 RT_TRACE(COMP_ERR, "Unable to initialize "
1398                       "/proc/net/rtl8192/%s/registers-d\n",
1399                       dev->name);
1400         }
1401         e = create_proc_read_entry("registers-e", S_IFREG | S_IRUGO,
1402                                    priv->dir_dev, proc_get_registers_e, dev);
1403         if (!e) {
1404                 RT_TRACE(COMP_ERR, "Unable to initialize "
1405                       "/proc/net/rtl8192/%s/registers-e\n",
1406                       dev->name);
1407         }
1408 #endif
1409 #if 0
1410         e = create_proc_read_entry("cck-registers", S_IFREG | S_IRUGO,
1411                                    priv->dir_dev, proc_get_cck_reg, dev);
1412         if (!e) {
1413                 RT_TRACE(COMP_ERR, "Unable to initialize "
1414                       "/proc/net/rtl8192/%s/cck-registers\n",
1415                       dev->name);
1416         }
1417
1418         e = create_proc_read_entry("ofdm-registers", S_IFREG | S_IRUGO,
1419                                    priv->dir_dev, proc_get_ofdm_reg, dev);
1420         if (!e) {
1421                 RT_TRACE(COMP_ERR, "Unable to initialize "
1422                       "/proc/net/rtl8192/%s/ofdm-registers\n",
1423                       dev->name);
1424         }
1425 #endif
1426 }
1427 /****************************************************************************
1428    -----------------------------MISC STUFF-------------------------
1429 *****************************************************************************/
1430
1431 /* this is only for debugging */
1432 void print_buffer(u32 *buffer, int len)
1433 {
1434         int i;
1435         u8 *buf =(u8*)buffer;
1436
1437         printk("ASCII BUFFER DUMP (len: %x):\n",len);
1438
1439         for(i=0;i<len;i++)
1440                 printk("%c",buf[i]);
1441
1442         printk("\nBINARY BUFFER DUMP (len: %x):\n",len);
1443
1444         for(i=0;i<len;i++)
1445                 printk("%x",buf[i]);
1446
1447         printk("\n");
1448 }
1449
1450 //short check_nic_enough_desc(struct net_device *dev, priority_t priority)
1451 short check_nic_enough_desc(struct net_device *dev,int queue_index)
1452 {
1453         struct r8192_priv *priv = ieee80211_priv(dev);
1454         int used = atomic_read(&priv->tx_pending[queue_index]);
1455
1456         return (used < MAX_TX_URB);
1457 }
1458
1459 void tx_timeout(struct net_device *dev)
1460 {
1461         struct r8192_priv *priv = ieee80211_priv(dev);
1462         //rtl8192_commit(dev);
1463
1464         schedule_work(&priv->reset_wq);
1465         //DMESG("TXTIMEOUT");
1466 }
1467
1468
1469 /* this is only for debug */
1470 void dump_eprom(struct net_device *dev)
1471 {
1472         int i;
1473         for(i=0; i<63; i++)
1474                 RT_TRACE(COMP_EPROM, "EEPROM addr %x : %x", i, eprom_read(dev,i));
1475 }
1476
1477 /* this is only for debug */
1478 void rtl8192_dump_reg(struct net_device *dev)
1479 {
1480         int i;
1481         int n;
1482         int max=0x1ff;
1483
1484         RT_TRACE(COMP_PHY, "Dumping NIC register map");
1485
1486         for(n=0;n<=max;)
1487         {
1488                 printk( "\nD: %2x> ", n);
1489                 for(i=0;i<16 && n<=max;i++,n++)
1490                         printk("%2x ",read_nic_byte(dev,n));
1491         }
1492         printk("\n");
1493 }
1494
1495 /****************************************************************************
1496       ------------------------------HW STUFF---------------------------
1497 *****************************************************************************/
1498
1499 #if 0
1500 void rtl8192_irq_enable(struct net_device *dev)
1501 {
1502         struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
1503         //priv->irq_enabled = 1;
1504 /*
1505         write_nic_word(dev,INTA_MASK,INTA_RXOK | INTA_RXDESCERR | INTA_RXOVERFLOW |\
1506         INTA_TXOVERFLOW | INTA_HIPRIORITYDESCERR | INTA_HIPRIORITYDESCOK |\
1507         INTA_NORMPRIORITYDESCERR | INTA_NORMPRIORITYDESCOK |\
1508         INTA_LOWPRIORITYDESCERR | INTA_LOWPRIORITYDESCOK | INTA_TIMEOUT);
1509 */
1510         write_nic_word(dev,INTA_MASK, priv->irq_mask);
1511 }
1512
1513
1514 void rtl8192_irq_disable(struct net_device *dev)
1515 {
1516 //      struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
1517
1518         write_nic_word(dev,INTA_MASK,0);
1519         force_pci_posting(dev);
1520 //      priv->irq_enabled = 0;
1521 }
1522 #endif
1523
1524 void rtl8192_set_mode(struct net_device *dev,int mode)
1525 {
1526         u8 ecmd;
1527         ecmd=read_nic_byte(dev, EPROM_CMD);
1528         ecmd=ecmd &~ EPROM_CMD_OPERATING_MODE_MASK;
1529         ecmd=ecmd | (mode<<EPROM_CMD_OPERATING_MODE_SHIFT);
1530         ecmd=ecmd &~ (1<<EPROM_CS_SHIFT);
1531         ecmd=ecmd &~ (1<<EPROM_CK_SHIFT);
1532         write_nic_byte(dev, EPROM_CMD, ecmd);
1533 }
1534
1535
1536 void rtl8192_update_msr(struct net_device *dev)
1537 {
1538         struct r8192_priv *priv = ieee80211_priv(dev);
1539         u8 msr;
1540
1541         msr  = read_nic_byte(dev, MSR);
1542         msr &= ~ MSR_LINK_MASK;
1543
1544         /* do not change in link_state != WLAN_LINK_ASSOCIATED.
1545          * msr must be updated if the state is ASSOCIATING.
1546          * this is intentional and make sense for ad-hoc and
1547          * master (see the create BSS/IBSS func)
1548          */
1549         if (priv->ieee80211->state == IEEE80211_LINKED){
1550
1551                 if (priv->ieee80211->iw_mode == IW_MODE_INFRA)
1552                         msr |= (MSR_LINK_MANAGED<<MSR_LINK_SHIFT);
1553                 else if (priv->ieee80211->iw_mode == IW_MODE_ADHOC)
1554                         msr |= (MSR_LINK_ADHOC<<MSR_LINK_SHIFT);
1555                 else if (priv->ieee80211->iw_mode == IW_MODE_MASTER)
1556                         msr |= (MSR_LINK_MASTER<<MSR_LINK_SHIFT);
1557
1558         }else
1559                 msr |= (MSR_LINK_NONE<<MSR_LINK_SHIFT);
1560
1561         write_nic_byte(dev, MSR, msr);
1562 }
1563
1564 void rtl8192_set_chan(struct net_device *dev,short ch)
1565 {
1566         struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
1567 //      u32 tx;
1568         RT_TRACE(COMP_CH, "=====>%s()====ch:%d\n", __FUNCTION__, ch);
1569         //printk("=====>%s()====ch:%d\n", __FUNCTION__, ch);
1570         priv->chan=ch;
1571         #if 0
1572         if(priv->ieee80211->iw_mode == IW_MODE_ADHOC ||
1573                 priv->ieee80211->iw_mode == IW_MODE_MASTER){
1574
1575                         priv->ieee80211->link_state = WLAN_LINK_ASSOCIATED;
1576                         priv->ieee80211->master_chan = ch;
1577                         rtl8192_update_beacon_ch(dev);
1578                 }
1579         #endif
1580
1581         /* this hack should avoid frame TX during channel setting*/
1582
1583
1584 //      tx = read_nic_dword(dev,TX_CONF);
1585 //      tx &= ~TX_LOOPBACK_MASK;
1586
1587 #ifndef LOOP_TEST
1588 //      write_nic_dword(dev,TX_CONF, tx |( TX_LOOPBACK_MAC<<TX_LOOPBACK_SHIFT));
1589
1590         //need to implement rf set channel here WB
1591
1592         if (priv->rf_set_chan)
1593         priv->rf_set_chan(dev,priv->chan);
1594         mdelay(10);
1595 //      write_nic_dword(dev,TX_CONF,tx | (TX_LOOPBACK_NONE<<TX_LOOPBACK_SHIFT));
1596 #endif
1597 }
1598
1599 static void rtl8192_rx_isr(struct urb *urb);
1600
1601 u32 get_rxpacket_shiftbytes_819xusb(struct ieee80211_rx_stats *pstats)
1602 {
1603
1604                 return (sizeof(rx_desc_819x_usb) + pstats->RxDrvInfoSize
1605                                 + pstats->RxBufShift);
1606
1607 }
1608 static int rtl8192_rx_initiate(struct net_device*dev)
1609 {
1610         struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
1611         struct urb *entry;
1612         struct sk_buff *skb;
1613         struct rtl8192_rx_info *info;
1614
1615         /* nomal packet rx procedure */
1616         while (skb_queue_len(&priv->rx_queue) < MAX_RX_URB) {
1617                 skb = __dev_alloc_skb(RX_URB_SIZE, GFP_KERNEL);
1618                 if (!skb)
1619                         break;
1620                 entry = usb_alloc_urb(0, GFP_KERNEL);
1621                 if (!entry) {
1622                         kfree_skb(skb);
1623                         break;
1624                 }
1625 //              printk("nomal packet IN request!\n");
1626                 usb_fill_bulk_urb(entry, priv->udev,
1627                                   usb_rcvbulkpipe(priv->udev, 3), skb->tail,
1628                                   RX_URB_SIZE, rtl8192_rx_isr, skb);
1629                 info = (struct rtl8192_rx_info *) skb->cb;
1630                 info->urb = entry;
1631                 info->dev = dev;
1632                 info->out_pipe = 3; //denote rx normal packet queue
1633                 skb_queue_tail(&priv->rx_queue, skb);
1634                 usb_submit_urb(entry, GFP_KERNEL);
1635         }
1636
1637         /* command packet rx procedure */
1638         while (skb_queue_len(&priv->rx_queue) < MAX_RX_URB + 3) {
1639 //              printk("command packet IN request!\n");
1640                 skb = __dev_alloc_skb(RX_URB_SIZE ,GFP_KERNEL);
1641                 if (!skb)
1642                         break;
1643                 entry = usb_alloc_urb(0, GFP_KERNEL);
1644                 if (!entry) {
1645                         kfree_skb(skb);
1646                         break;
1647                 }
1648                 usb_fill_bulk_urb(entry, priv->udev,
1649                                   usb_rcvbulkpipe(priv->udev, 9), skb->tail,
1650                                   RX_URB_SIZE, rtl8192_rx_isr, skb);
1651                 info = (struct rtl8192_rx_info *) skb->cb;
1652                 info->urb = entry;
1653                 info->dev = dev;
1654                    info->out_pipe = 9; //denote rx cmd packet queue
1655                 skb_queue_tail(&priv->rx_queue, skb);
1656                 usb_submit_urb(entry, GFP_KERNEL);
1657         }
1658
1659         return 0;
1660 }
1661
1662 void rtl8192_set_rxconf(struct net_device *dev)
1663 {
1664         struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
1665         u32 rxconf;
1666
1667         rxconf=read_nic_dword(dev,RCR);
1668         rxconf = rxconf &~ MAC_FILTER_MASK;
1669         rxconf = rxconf | RCR_AMF;
1670         rxconf = rxconf | RCR_ADF;
1671         rxconf = rxconf | RCR_AB;
1672         rxconf = rxconf | RCR_AM;
1673         //rxconf = rxconf | RCR_ACF;
1674
1675         if (dev->flags & IFF_PROMISC) {DMESG ("NIC in promisc mode");}
1676
1677         if(priv->ieee80211->iw_mode == IW_MODE_MONITOR || \
1678            dev->flags & IFF_PROMISC){
1679                 rxconf = rxconf | RCR_AAP;
1680         } /*else if(priv->ieee80211->iw_mode == IW_MODE_MASTER){
1681                 rxconf = rxconf | (1<<ACCEPT_ALLMAC_FRAME_SHIFT);
1682                 rxconf = rxconf | (1<<RX_CHECK_BSSID_SHIFT);
1683         }*/else{
1684                 rxconf = rxconf | RCR_APM;
1685                 rxconf = rxconf | RCR_CBSSID;
1686         }
1687
1688
1689         if(priv->ieee80211->iw_mode == IW_MODE_MONITOR){
1690                 rxconf = rxconf | RCR_AICV;
1691                 rxconf = rxconf | RCR_APWRMGT;
1692         }
1693
1694         if( priv->crcmon == 1 && priv->ieee80211->iw_mode == IW_MODE_MONITOR)
1695                 rxconf = rxconf | RCR_ACRC32;
1696
1697
1698         rxconf = rxconf &~ RX_FIFO_THRESHOLD_MASK;
1699         rxconf = rxconf | (RX_FIFO_THRESHOLD_NONE<<RX_FIFO_THRESHOLD_SHIFT);
1700         rxconf = rxconf &~ MAX_RX_DMA_MASK;
1701         rxconf = rxconf | ((u32)7<<RCR_MXDMA_OFFSET);
1702
1703 //      rxconf = rxconf | (1<<RX_AUTORESETPHY_SHIFT);
1704         rxconf = rxconf | RCR_ONLYERLPKT;
1705
1706 //      rxconf = rxconf &~ RCR_CS_MASK;
1707 //      rxconf = rxconf | (1<<RCR_CS_SHIFT);
1708
1709         write_nic_dword(dev, RCR, rxconf);
1710
1711         #ifdef DEBUG_RX
1712         DMESG("rxconf: %x %x",rxconf ,read_nic_dword(dev,RCR));
1713         #endif
1714 }
1715 //wait to be removed
1716 void rtl8192_rx_enable(struct net_device *dev)
1717 {
1718         //u8 cmd;
1719
1720         //struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
1721
1722         rtl8192_rx_initiate(dev);
1723
1724 //      rtl8192_set_rxconf(dev);
1725 #if 0
1726         if(NIC_8187 == priv->card_8187) {
1727                 cmd=read_nic_byte(dev,CMD);
1728                 write_nic_byte(dev,CMD,cmd | (1<<CMD_RX_ENABLE_SHIFT));
1729         }
1730         else {
1731                 //write_nic_dword(dev, RX_CONF, priv->ReceiveConfig);
1732         }
1733 #endif
1734 }
1735
1736
1737 void rtl8192_tx_enable(struct net_device *dev)
1738 {
1739 #if 0
1740         u8 cmd;
1741         u8 byte;
1742         u32 txconf;
1743         struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
1744         //test loopback
1745         //      priv->TransmitConfig |= (TX_LOOPBACK_BASEBAND<<TX_LOOPBACK_SHIFT);
1746         if(NIC_8187B == priv->card_8187){
1747                 write_nic_dword(dev, TX_CONF, priv->TransmitConfig);
1748                 byte = read_nic_byte(dev, MSR);
1749                 byte |= MSR_LINK_ENEDCA;
1750                 write_nic_byte(dev, MSR, byte);
1751         } else {
1752                 byte = read_nic_byte(dev,CW_CONF);
1753                 byte &= ~(1<<CW_CONF_PERPACKET_CW_SHIFT);
1754                 byte &= ~(1<<CW_CONF_PERPACKET_RETRY_SHIFT);
1755                 write_nic_byte(dev, CW_CONF, byte);
1756
1757                 byte = read_nic_byte(dev, TX_AGC_CTL);
1758                 byte &= ~(1<<TX_AGC_CTL_PERPACKET_GAIN_SHIFT);
1759                 byte &= ~(1<<TX_AGC_CTL_PERPACKET_ANTSEL_SHIFT);
1760                 byte &= ~(1<<TX_AGC_CTL_FEEDBACK_ANT);
1761                 write_nic_byte(dev, TX_AGC_CTL, byte);
1762
1763                 txconf= read_nic_dword(dev,TX_CONF);
1764
1765
1766                 txconf = txconf &~ TX_LOOPBACK_MASK;
1767
1768 #ifndef LOOP_TEST
1769                 txconf = txconf | (TX_LOOPBACK_NONE<<TX_LOOPBACK_SHIFT);
1770 #else
1771                 txconf = txconf | (TX_LOOPBACK_BASEBAND<<TX_LOOPBACK_SHIFT);
1772 #endif
1773                 txconf = txconf &~ TCR_SRL_MASK;
1774                 txconf = txconf &~ TCR_LRL_MASK;
1775
1776                 txconf = txconf | (priv->retry_data<<TX_LRLRETRY_SHIFT); // long
1777                 txconf = txconf | (priv->retry_rts<<TX_SRLRETRY_SHIFT); // short
1778
1779                 txconf = txconf &~ (1<<TX_NOCRC_SHIFT);
1780
1781                 txconf = txconf &~ TCR_MXDMA_MASK;
1782                 txconf = txconf | (TCR_MXDMA_2048<<TCR_MXDMA_SHIFT);
1783
1784                 txconf = txconf | TCR_DISReqQsize;
1785                 txconf = txconf | TCR_DISCW;
1786                 txconf = txconf &~ TCR_SWPLCPLEN;
1787
1788                 txconf=txconf | (1<<TX_NOICV_SHIFT);
1789
1790                 write_nic_dword(dev,TX_CONF,txconf);
1791
1792 #ifdef DEBUG_TX
1793                 DMESG("txconf: %x %x",txconf,read_nic_dword(dev,TX_CONF));
1794 #endif
1795
1796                 cmd=read_nic_byte(dev,CMD);
1797                 write_nic_byte(dev,CMD,cmd | (1<<CMD_TX_ENABLE_SHIFT));
1798         }
1799 #endif
1800 }
1801
1802 #if 0
1803 void rtl8192_beacon_tx_enable(struct net_device *dev)
1804 {
1805         struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
1806         priv->dma_poll_mask &=~(1<<TX_DMA_STOP_BEACON_SHIFT);
1807         rtl8192_set_mode(dev,EPROM_CMD_CONFIG);
1808         write_nic_byte(dev,TX_DMA_POLLING,priv->dma_poll_mask);
1809         rtl8192_set_mode(dev,EPROM_CMD_NORMAL);
1810 }
1811
1812
1813 void rtl8192_
1814 _disable(struct net_device *dev)
1815 {
1816         struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
1817         priv->dma_poll_mask |= (1<<TX_DMA_STOP_BEACON_SHIFT);
1818         rtl8192_set_mode(dev,EPROM_CMD_CONFIG);
1819         write_nic_byte(dev,TX_DMA_POLLING,priv->dma_poll_mask);
1820         rtl8192_set_mode(dev,EPROM_CMD_NORMAL);
1821 }
1822
1823 #endif
1824
1825
1826 void rtl8192_rtx_disable(struct net_device *dev)
1827 {
1828         u8 cmd;
1829         struct r8192_priv *priv = ieee80211_priv(dev);
1830         struct sk_buff *skb;
1831         struct rtl8192_rx_info *info;
1832
1833         cmd=read_nic_byte(dev,CMDR);
1834         write_nic_byte(dev, CMDR, cmd &~ \
1835                 (CR_TE|CR_RE));
1836         force_pci_posting(dev);
1837         mdelay(10);
1838
1839         while ((skb = __skb_dequeue(&priv->rx_queue))) {
1840                 info = (struct rtl8192_rx_info *) skb->cb;
1841                 if (!info->urb)
1842                         continue;
1843
1844                 usb_kill_urb(info->urb);
1845                 kfree_skb(skb);
1846         }
1847
1848         if (skb_queue_len(&priv->skb_queue)) {
1849                 printk(KERN_WARNING "skb_queue not empty\n");
1850         }
1851
1852         skb_queue_purge(&priv->skb_queue);
1853         return;
1854 }
1855
1856
1857 int alloc_tx_beacon_desc_ring(struct net_device *dev, int count)
1858 {
1859         #if 0
1860         int i;
1861         u32 *tmp;
1862         struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
1863
1864         priv->txbeaconring = (u32*)pci_alloc_consistent(priv->pdev,
1865                                           sizeof(u32)*8*count,
1866                                           &priv->txbeaconringdma);
1867         if (!priv->txbeaconring) return -1;
1868         for (tmp=priv->txbeaconring,i=0;i<count;i++){
1869                 *tmp = *tmp &~ (1<<31); // descriptor empty, owned by the drv
1870                 /*
1871                 *(tmp+2) = (u32)dma_tmp;
1872                 *(tmp+3) = bufsize;
1873                 */
1874                 if(i+1<count)
1875                         *(tmp+4) = (u32)priv->txbeaconringdma+((i+1)*8*4);
1876                 else
1877                         *(tmp+4) = (u32)priv->txbeaconringdma;
1878
1879                 tmp=tmp+8;
1880         }
1881         #endif
1882         return 0;
1883 }
1884
1885 #if 0
1886 void rtl8192_reset(struct net_device *dev)
1887 {
1888
1889         //struct r8192_priv *priv = ieee80211_priv(dev);
1890         //u8 cr;
1891
1892
1893         /* make sure the analog power is on before
1894          * reset, otherwise reset may fail
1895          */
1896 #if 0
1897         if(NIC_8187 == priv->card_8187) {
1898                 rtl8192_set_anaparam(dev, RTL8225_ANAPARAM_ON);
1899                 rtl8185_set_anaparam2(dev, RTL8225_ANAPARAM2_ON);
1900                 rtl8192_irq_disable(dev);
1901                 mdelay(200);
1902                 write_nic_byte_E(dev,0x18,0x10);
1903                 write_nic_byte_E(dev,0x18,0x11);
1904                 write_nic_byte_E(dev,0x18,0x00);
1905                 mdelay(200);
1906         }
1907 #endif
1908         printk("=====>reset?\n");
1909 #if 0
1910         cr=read_nic_byte(dev,CMD);
1911         cr = cr & 2;
1912         cr = cr | (1<<CMD_RST_SHIFT);
1913         write_nic_byte(dev,CMD,cr);
1914
1915         force_pci_posting(dev);
1916
1917         mdelay(200);
1918
1919         if(read_nic_byte(dev,CMD) & (1<<CMD_RST_SHIFT))
1920                 RT_TRACE(COMP_ERR, "Card reset timeout!\n");
1921         else
1922                 RT_TRACE(COMP_DOWN, "Card successfully reset\n");
1923 #endif
1924 #if 0
1925         if(NIC_8187 == priv->card_8187) {
1926
1927                 printk("This is RTL8187 Reset procedure\n");
1928                 rtl8192_set_mode(dev,EPROM_CMD_LOAD);
1929                 force_pci_posting(dev);
1930                 mdelay(200);
1931
1932                 /* after the eeprom load cycle, make sure we have
1933                  * correct anaparams
1934                  */
1935                 rtl8192_set_anaparam(dev, RTL8225_ANAPARAM_ON);
1936                 rtl8185_set_anaparam2(dev, RTL8225_ANAPARAM2_ON);
1937         }
1938         else
1939 #endif
1940                 printk("This is RTL8187B Reset procedure\n");
1941
1942 }
1943 #endif
1944 inline u16 ieeerate2rtlrate(int rate)
1945 {
1946         switch(rate){
1947         case 10:
1948         return 0;
1949         case 20:
1950         return 1;
1951         case 55:
1952         return 2;
1953         case 110:
1954         return 3;
1955         case 60:
1956         return 4;
1957         case 90:
1958         return 5;
1959         case 120:
1960         return 6;
1961         case 180:
1962         return 7;
1963         case 240:
1964         return 8;
1965         case 360:
1966         return 9;
1967         case 480:
1968         return 10;
1969         case 540:
1970         return 11;
1971         default:
1972         return 3;
1973
1974         }
1975 }
1976 static u16 rtl_rate[] = {10,20,55,110,60,90,120,180,240,360,480,540};
1977 inline u16 rtl8192_rate2rate(short rate)
1978 {
1979         if (rate >11) return 0;
1980         return rtl_rate[rate];
1981 }
1982
1983 static void rtl8192_rx_isr(struct urb *urb)
1984 {
1985         struct sk_buff *skb = (struct sk_buff *) urb->context;
1986         struct rtl8192_rx_info *info = (struct rtl8192_rx_info *)skb->cb;
1987         struct net_device *dev = info->dev;
1988         struct r8192_priv *priv = ieee80211_priv(dev);
1989         int out_pipe = info->out_pipe;
1990         int err;
1991         if(!priv->up)
1992                 return;
1993         if (unlikely(urb->status)) {
1994                 info->urb = NULL;
1995                 priv->stats.rxstaterr++;
1996                 priv->ieee80211->stats.rx_errors++;
1997                 usb_free_urb(urb);
1998         //      printk("%s():rx status err\n",__FUNCTION__);
1999                 return;
2000         }
2001
2002         skb_unlink(skb, &priv->rx_queue);
2003         skb_put(skb, urb->actual_length);
2004
2005         skb_queue_tail(&priv->skb_queue, skb);
2006         tasklet_schedule(&priv->irq_rx_tasklet);
2007
2008         skb = dev_alloc_skb(RX_URB_SIZE);
2009         if (unlikely(!skb)) {
2010                 usb_free_urb(urb);
2011                 printk("%s():can,t alloc skb\n",__FUNCTION__);
2012                 /* TODO check rx queue length and refill *somewhere* */
2013                 return;
2014         }
2015
2016         usb_fill_bulk_urb(urb, priv->udev,
2017                         usb_rcvbulkpipe(priv->udev, out_pipe), skb->tail,
2018                         RX_URB_SIZE, rtl8192_rx_isr, skb);
2019
2020         info = (struct rtl8192_rx_info *) skb->cb;
2021         info->urb = urb;
2022         info->dev = dev;
2023         info->out_pipe = out_pipe;
2024
2025         urb->transfer_buffer = skb->tail;
2026         urb->context = skb;
2027         skb_queue_tail(&priv->rx_queue, skb);
2028         err = usb_submit_urb(urb, GFP_ATOMIC);
2029         if(err && err != EPERM)
2030                 printk("can not submit rxurb, err is %x,URB status is %x\n",err,urb->status);
2031 }
2032
2033 u32
2034 rtl819xusb_rx_command_packet(
2035         struct net_device *dev,
2036         struct ieee80211_rx_stats *pstats
2037         )
2038 {
2039         u32     status;
2040
2041         //RT_TRACE(COMP_RECV, DBG_TRACE, ("---> RxCommandPacketHandle819xUsb()\n"));
2042
2043         status = cmpk_message_handle_rx(dev, pstats);
2044         if (status)
2045         {
2046                 DMESG("rxcommandpackethandle819xusb: It is a command packet\n");
2047         }
2048         else
2049         {
2050                 //RT_TRACE(COMP_RECV, DBG_TRACE, ("RxCommandPacketHandle819xUsb: It is not a command packet\n"));
2051         }
2052
2053         //RT_TRACE(COMP_RECV, DBG_TRACE, ("<--- RxCommandPacketHandle819xUsb()\n"));
2054         return status;
2055 }
2056
2057 #if 0
2058 void rtl8192_tx_queues_stop(struct net_device *dev)
2059 {
2060         //struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
2061         u8 dma_poll_mask = (1<<TX_DMA_STOP_LOWPRIORITY_SHIFT);
2062         dma_poll_mask |= (1<<TX_DMA_STOP_HIPRIORITY_SHIFT);
2063         dma_poll_mask |= (1<<TX_DMA_STOP_NORMPRIORITY_SHIFT);
2064         dma_poll_mask |= (1<<TX_DMA_STOP_BEACON_SHIFT);
2065
2066         rtl8192_set_mode(dev,EPROM_CMD_CONFIG);
2067         write_nic_byte(dev,TX_DMA_POLLING,dma_poll_mask);
2068         rtl8192_set_mode(dev,EPROM_CMD_NORMAL);
2069 }
2070 #endif
2071
2072 void rtl8192_data_hard_stop(struct net_device *dev)
2073 {
2074         //FIXME !!
2075         #if 0
2076         struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
2077         priv->dma_poll_mask |= (1<<TX_DMA_STOP_LOWPRIORITY_SHIFT);
2078         rtl8192_set_mode(dev,EPROM_CMD_CONFIG);
2079         write_nic_byte(dev,TX_DMA_POLLING,priv->dma_poll_mask);
2080         rtl8192_set_mode(dev,EPROM_CMD_NORMAL);
2081         #endif
2082 }
2083
2084
2085 void rtl8192_data_hard_resume(struct net_device *dev)
2086 {
2087         // FIXME !!
2088         #if 0
2089         struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
2090         priv->dma_poll_mask &= ~(1<<TX_DMA_STOP_LOWPRIORITY_SHIFT);
2091         rtl8192_set_mode(dev,EPROM_CMD_CONFIG);
2092         write_nic_byte(dev,TX_DMA_POLLING,priv->dma_poll_mask);
2093         rtl8192_set_mode(dev,EPROM_CMD_NORMAL);
2094         #endif
2095 }
2096
2097 /* this function TX data frames when the ieee80211 stack requires this.
2098  * It checks also if we need to stop the ieee tx queue, eventually do it
2099  */
2100 void rtl8192_hard_data_xmit(struct sk_buff *skb, struct net_device *dev, int rate)
2101 {
2102         struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
2103         int ret;
2104         unsigned long flags;
2105         cb_desc *tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE);
2106         u8 queue_index = tcb_desc->queue_index;
2107
2108         /* shall not be referred by command packet */
2109         assert(queue_index != TXCMD_QUEUE);
2110
2111         spin_lock_irqsave(&priv->tx_lock,flags);
2112
2113         memcpy((unsigned char *)(skb->cb),&dev,sizeof(dev));
2114 //      tcb_desc->RATRIndex = 7;
2115 //      tcb_desc->bTxDisableRateFallBack = 1;
2116 //      tcb_desc->bTxUseDriverAssingedRate = 1;
2117         tcb_desc->bTxEnableFwCalcDur = 1;
2118         skb_push(skb, priv->ieee80211->tx_headroom);
2119         ret = priv->ops->rtl819x_tx(dev, skb);
2120
2121         //priv->ieee80211->stats.tx_bytes+=(skb->len - priv->ieee80211->tx_headroom);
2122         //priv->ieee80211->stats.tx_packets++;
2123
2124         spin_unlock_irqrestore(&priv->tx_lock,flags);
2125
2126 //      return ret;
2127         return;
2128 }
2129
2130 /* This is a rough attempt to TX a frame
2131  * This is called by the ieee 80211 stack to TX management frames.
2132  * If the ring is full packet are dropped (for data frame the queue
2133  * is stopped before this can happen).
2134  */
2135 int rtl8192_hard_start_xmit(struct sk_buff *skb,struct net_device *dev)
2136 {
2137         struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
2138         int ret;
2139         unsigned long flags;
2140         cb_desc *tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE);
2141         u8 queue_index = tcb_desc->queue_index;
2142
2143
2144         spin_lock_irqsave(&priv->tx_lock,flags);
2145
2146         memcpy((unsigned char *)(skb->cb),&dev,sizeof(dev));
2147         if(queue_index == TXCMD_QUEUE) {
2148                 skb_push(skb, USB_HWDESC_HEADER_LEN);
2149                 priv->ops->rtl819x_tx_cmd(dev, skb);
2150                 ret = 1;
2151                 spin_unlock_irqrestore(&priv->tx_lock,flags);
2152                 return ret;
2153         } else {
2154                 skb_push(skb, priv->ieee80211->tx_headroom);
2155                 ret = priv->ops->rtl819x_tx(dev, skb);
2156         }
2157
2158         spin_unlock_irqrestore(&priv->tx_lock,flags);
2159
2160         return ret;
2161 }
2162
2163
2164 void rtl8192_try_wake_queue(struct net_device *dev, int pri);
2165
2166
2167 static void rtl8192_tx_isr(struct urb *tx_urb)
2168 {
2169         struct sk_buff *skb = (struct sk_buff*)tx_urb->context;
2170         struct net_device *dev = NULL;
2171         struct r8192_priv *priv = NULL;
2172         cb_desc *tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE);
2173         u8  queue_index = tcb_desc->queue_index;
2174 //      bool bToSend0Byte;
2175 //      u16 BufLen = skb->len;
2176
2177         memcpy(&dev,(struct net_device*)(skb->cb),sizeof(struct net_device*));
2178         priv = ieee80211_priv(dev);
2179
2180         if(tcb_desc->queue_index != TXCMD_QUEUE) {
2181                 if(tx_urb->status == 0) {
2182                 //      dev->trans_start = jiffies;
2183                         // As act as station mode, destion shall be  unicast address.
2184                         //priv->ieee80211->stats.tx_bytes+=(skb->len - priv->ieee80211->tx_headroom);
2185                         //priv->ieee80211->stats.tx_packets++;
2186                         priv->stats.txoktotal++;
2187                         priv->ieee80211->LinkDetectInfo.NumTxOkInPeriod++;
2188                         priv->stats.txbytesunicast += (skb->len - priv->ieee80211->tx_headroom);
2189                 } else {
2190                         priv->ieee80211->stats.tx_errors++;
2191                         //priv->stats.txmanageerr++;
2192                         /* TODO */
2193                 }
2194         }
2195
2196         /* free skb and tx_urb */
2197         if(skb != NULL) {
2198                 dev_kfree_skb_any(skb);
2199                 usb_free_urb(tx_urb);
2200                 atomic_dec(&priv->tx_pending[queue_index]);
2201         }
2202
2203 #if 0  //we need to send zero byte packet just after 512 byte(64 byte)packet is transmitted, or we will halt. It will greatly reduced available page in FW, and ruin our throughput. WB 2008.08.27
2204         if(BufLen > 0 && ((BufLen % 512 == 0)||(BufLen % 64 == 0))) {
2205                 bToSend0Byte = true;
2206         }
2207
2208         bToSend0Byte = false;
2209         //
2210         // Note that, we at most handle 1 MPDU to send here, either
2211         // fragment or MPDU in wait queue.
2212         //
2213         if(!bToSend0Byte)
2214 #endif
2215         {
2216                 //
2217                 // Handle HW Beacon:
2218                 // We had transfer our beacon frame to host controler at this moment.
2219                 //
2220 #if 0
2221                 if(tcb_desc->tx_queue == BEACON_QUEUE)
2222                 {
2223                         priv->bSendingBeacon = FALSE;
2224                 }
2225 #endif
2226                 //
2227                 // Caution:
2228                 // Handling the wait queue of command packets.
2229                 // For Tx command packets, we must not do TCB fragment because it is not handled right now.
2230                 // We must cut the packets to match the size of TX_CMD_PKT before we send it.
2231                 //
2232         if (queue_index == MGNT_QUEUE){
2233         if (priv->ieee80211->ack_tx_to_ieee){
2234             if (rtl8192_is_tx_queue_empty(dev)){
2235                 priv->ieee80211->ack_tx_to_ieee = 0;
2236                 ieee80211_ps_tx_ack(priv->ieee80211, 1);
2237             }
2238         }
2239     }
2240                 /* Handle MPDU in wait queue. */
2241                 if(queue_index != BEACON_QUEUE) {
2242                         /* Don't send data frame during scanning.*/
2243                         if((skb_queue_len(&priv->ieee80211->skb_waitQ[queue_index]) != 0)&&\
2244                                         (!(priv->ieee80211->queue_stop))) {
2245                                 if(NULL != (skb = skb_dequeue(&(priv->ieee80211->skb_waitQ[queue_index]))))
2246                                         priv->ieee80211->softmac_hard_start_xmit(skb, dev);
2247
2248                                 return; //modified by david to avoid further processing AMSDU
2249                         }
2250                 }
2251         }
2252
2253 #if 0
2254         else
2255         {
2256                 RT_TRACE( COMP_SEND,"HalUsbOutComplete(%d): bToSend0Byte.\n", PipeIndex);
2257
2258                 //
2259                 // In this case, we don't return skb now.
2260                 // It will be returned when the 0-byte request completed.
2261                 //
2262
2263                 //
2264                 // Bulk out an 0-byte padding transfer.
2265                 //
2266                 HalUsbOut0Byte(pAdapter, PipeIndex, skb);
2267         }
2268
2269 #endif
2270 }
2271
2272 void rtl8192_beacon_stop(struct net_device *dev)
2273 {
2274         u8 msr, msrm, msr2;
2275         struct r8192_priv *priv = ieee80211_priv(dev);
2276
2277         msr  = read_nic_byte(dev, MSR);
2278         msrm = msr & MSR_LINK_MASK;
2279         msr2 = msr & ~MSR_LINK_MASK;
2280
2281         if(NIC_8192U == priv->card_8192) {
2282                 usb_kill_urb(priv->rx_urb[MAX_RX_URB]);
2283         }
2284         if ((msrm == (MSR_LINK_ADHOC<<MSR_LINK_SHIFT) ||
2285                 (msrm == (MSR_LINK_MASTER<<MSR_LINK_SHIFT)))){
2286                 write_nic_byte(dev, MSR, msr2 | MSR_LINK_NONE);
2287                 write_nic_byte(dev, MSR, msr);
2288         }
2289 }
2290
2291 void rtl8192_config_rate(struct net_device* dev, u16* rate_config)
2292 {
2293          struct r8192_priv *priv = ieee80211_priv(dev);
2294          struct ieee80211_network *net;
2295          u8 i=0, basic_rate = 0;
2296          net = & priv->ieee80211->current_network;
2297
2298          for (i=0; i<net->rates_len; i++)
2299          {
2300                  basic_rate = net->rates[i]&0x7f;
2301                  switch(basic_rate)
2302                  {
2303                          case MGN_1M:   *rate_config |= RRSR_1M;        break;
2304                          case MGN_2M:   *rate_config |= RRSR_2M;        break;
2305                          case MGN_5_5M: *rate_config |= RRSR_5_5M;      break;
2306                          case MGN_11M:  *rate_config |= RRSR_11M;       break;
2307                          case MGN_6M:   *rate_config |= RRSR_6M;        break;
2308                          case MGN_9M:   *rate_config |= RRSR_9M;        break;
2309                          case MGN_12M:  *rate_config |= RRSR_12M;       break;
2310                          case MGN_18M:  *rate_config |= RRSR_18M;       break;
2311                          case MGN_24M:  *rate_config |= RRSR_24M;       break;
2312                          case MGN_36M:  *rate_config |= RRSR_36M;       break;
2313                          case MGN_48M:  *rate_config |= RRSR_48M;       break;
2314                          case MGN_54M:  *rate_config |= RRSR_54M;       break;
2315                  }
2316          }
2317          for (i=0; i<net->rates_ex_len; i++)
2318          {
2319                  basic_rate = net->rates_ex[i]&0x7f;
2320                  switch(basic_rate)
2321                  {
2322                          case MGN_1M:   *rate_config |= RRSR_1M;        break;
2323                          case MGN_2M:   *rate_config |= RRSR_2M;        break;
2324                          case MGN_5_5M: *rate_config |= RRSR_5_5M;      break;
2325                          case MGN_11M:  *rate_config |= RRSR_11M;       break;
2326                          case MGN_6M:   *rate_config |= RRSR_6M;        break;
2327                          case MGN_9M:   *rate_config |= RRSR_9M;        break;
2328                          case MGN_12M:  *rate_config |= RRSR_12M;       break;
2329                          case MGN_18M:  *rate_config |= RRSR_18M;       break;
2330                          case MGN_24M:  *rate_config |= RRSR_24M;       break;
2331                          case MGN_36M:  *rate_config |= RRSR_36M;       break;
2332                          case MGN_48M:  *rate_config |= RRSR_48M;       break;
2333                          case MGN_54M:  *rate_config |= RRSR_54M;       break;
2334                  }
2335          }
2336 }
2337
2338
2339 #define SHORT_SLOT_TIME 9
2340 #define NON_SHORT_SLOT_TIME 20
2341
2342 void rtl8192_update_cap(struct net_device* dev, u16 cap)
2343 {
2344         //u32 tmp = 0;
2345         struct r8192_priv *priv = ieee80211_priv(dev);
2346         struct ieee80211_network *net = &priv->ieee80211->current_network;
2347         priv->short_preamble = cap & WLAN_CAPABILITY_SHORT_PREAMBLE;
2348
2349         //LZM MOD 090303 HW_VAR_ACK_PREAMBLE
2350 #ifdef RTL8192SU
2351         if(0)
2352         {
2353                 u8 tmp = 0;
2354                 tmp = ((priv->nCur40MhzPrimeSC) << 5);
2355                 if (priv->short_preamble)
2356                         tmp |= 0x80;
2357                 write_nic_byte(dev, RRSR+2, tmp);
2358         }
2359 #else
2360         {
2361         u32 tmp = 0;
2362         tmp = priv->basic_rate;
2363         if (priv->short_preamble)
2364                 tmp |= BRSR_AckShortPmb;
2365         write_nic_dword(dev, RRSR, tmp);
2366         }
2367 #endif
2368
2369         if (net->mode & (IEEE_G|IEEE_N_24G))
2370         {
2371                 u8 slot_time = 0;
2372                 if ((cap & WLAN_CAPABILITY_SHORT_SLOT)&&(!priv->ieee80211->pHTInfo->bCurrentRT2RTLongSlotTime))
2373                 {//short slot time
2374                         slot_time = SHORT_SLOT_TIME;
2375                 }
2376                 else //long slot time
2377                         slot_time = NON_SHORT_SLOT_TIME;
2378                 priv->slot_time = slot_time;
2379                 write_nic_byte(dev, SLOT_TIME, slot_time);
2380         }
2381
2382 }
2383 void rtl8192_net_update(struct net_device *dev)
2384 {
2385
2386         struct r8192_priv *priv = ieee80211_priv(dev);
2387         struct ieee80211_network *net;
2388         u16 BcnTimeCfg = 0, BcnCW = 6, BcnIFS = 0xf;
2389         u16 rate_config = 0;
2390         net = & priv->ieee80211->current_network;
2391
2392         rtl8192_config_rate(dev, &rate_config);
2393         priv->basic_rate = rate_config &= 0x15f;
2394
2395         write_nic_dword(dev,BSSIDR,((u32*)net->bssid)[0]);
2396         write_nic_word(dev,BSSIDR+4,((u16*)net->bssid)[2]);
2397         //for(i=0;i<ETH_ALEN;i++)
2398         //      write_nic_byte(dev,BSSID+i,net->bssid[i]);
2399
2400         rtl8192_update_msr(dev);
2401 //      rtl8192_update_cap(dev, net->capability);
2402         if (priv->ieee80211->iw_mode == IW_MODE_ADHOC)
2403         {
2404         write_nic_word(dev, ATIMWND, 2);
2405         write_nic_word(dev, BCN_DMATIME, 1023);
2406         write_nic_word(dev, BCN_INTERVAL, net->beacon_interval);
2407 //      write_nic_word(dev, BcnIntTime, 100);
2408         write_nic_word(dev, BCN_DRV_EARLY_INT, 1);
2409         write_nic_byte(dev, BCN_ERR_THRESH, 100);
2410                 BcnTimeCfg |= (BcnCW<<BCN_TCFG_CW_SHIFT);
2411         // TODO: BcnIFS may required to be changed on ASIC
2412                 BcnTimeCfg |= BcnIFS<<BCN_TCFG_IFS;
2413
2414         write_nic_word(dev, BCN_TCFG, BcnTimeCfg);
2415         }
2416
2417
2418
2419 }
2420
2421 //temporary hw beacon is not used any more.
2422 //open it when necessary
2423 #if 1
2424 void rtl819xusb_beacon_tx(struct net_device *dev,u16  tx_rate)
2425 {
2426
2427 #if 0
2428         struct r8192_priv *priv = ieee80211_priv(dev);
2429         struct sk_buff *skb;
2430         int i = 0;
2431         //u8 cr;
2432
2433         rtl8192_net_update(dev);
2434
2435         skb = ieee80211_get_beacon(priv->ieee80211);
2436                 if(!skb){
2437                         DMESG("not enought memory for allocating beacon");
2438                         return;
2439                 }
2440
2441
2442                 write_nic_byte(dev, BQREQ, read_nic_byte(dev, BQREQ) | (1<<7));
2443
2444                 i=0;
2445                 //while(!read_nic_byte(dev,BQREQ & (1<<7)))
2446                 while( (read_nic_byte(dev, BQREQ) & (1<<7)) == 0 )
2447                 {
2448                         msleep_interruptible_rtl(HZ/2);
2449                         if(i++ > 10){
2450                                 DMESGW("get stuck to wait HW beacon to be ready");
2451                                 return ;
2452                         }
2453                 }
2454         skb->cb[0] = NORM_PRIORITY;
2455         skb->cb[1] = 0; //morefragment = 0
2456         skb->cb[2] = ieeerate2rtlrate(tx_rate);
2457
2458         rtl8192_tx(dev,skb);
2459
2460 #endif
2461 }
2462 #endif
2463 inline u8 rtl8192_IsWirelessBMode(u16 rate)
2464 {
2465         if( ((rate <= 110) && (rate != 60) && (rate != 90)) || (rate == 220) )
2466                 return 1;
2467         else return 0;
2468 }
2469
2470 u16 N_DBPSOfRate(u16 DataRate);
2471
2472 u16 ComputeTxTime(
2473         u16             FrameLength,
2474         u16             DataRate,
2475         u8              bManagementFrame,
2476         u8              bShortPreamble
2477 )
2478 {
2479         u16     FrameTime;
2480         u16     N_DBPS;
2481         u16     Ceiling;
2482
2483         if( rtl8192_IsWirelessBMode(DataRate) )
2484         {
2485                 if( bManagementFrame || !bShortPreamble || DataRate == 10 )
2486                 {       // long preamble
2487                         FrameTime = (u16)(144+48+(FrameLength*8/(DataRate/10)));
2488                 }
2489                 else
2490                 {       // Short preamble
2491                         FrameTime = (u16)(72+24+(FrameLength*8/(DataRate/10)));
2492                 }
2493                 if( ( FrameLength*8 % (DataRate/10) ) != 0 ) //Get the Ceilling
2494                                 FrameTime ++;
2495         } else {        //802.11g DSSS-OFDM PLCP length field calculation.
2496                 N_DBPS = N_DBPSOfRate(DataRate);
2497                 Ceiling = (16 + 8*FrameLength + 6) / N_DBPS
2498                                 + (((16 + 8*FrameLength + 6) % N_DBPS) ? 1 : 0);
2499                 FrameTime = (u16)(16 + 4 + 4*Ceiling + 6);
2500         }
2501         return FrameTime;
2502 }
2503
2504 u16 N_DBPSOfRate(u16 DataRate)
2505 {
2506          u16 N_DBPS = 24;
2507
2508          switch(DataRate)
2509          {
2510          case 60:
2511           N_DBPS = 24;
2512           break;
2513
2514          case 90:
2515           N_DBPS = 36;
2516           break;
2517
2518          case 120:
2519           N_DBPS = 48;
2520           break;
2521
2522          case 180:
2523           N_DBPS = 72;
2524           break;
2525
2526          case 240:
2527           N_DBPS = 96;
2528           break;
2529
2530          case 360:
2531           N_DBPS = 144;
2532           break;
2533
2534          case 480:
2535           N_DBPS = 192;
2536           break;
2537
2538          case 540:
2539           N_DBPS = 216;
2540           break;
2541
2542          default:
2543           break;
2544          }
2545
2546          return N_DBPS;
2547 }
2548
2549 void rtl819xU_cmd_isr(struct urb *tx_cmd_urb, struct pt_regs *regs)
2550 {
2551 #if 0
2552         struct net_device *dev = (struct net_device*)tx_cmd_urb->context;
2553         struct r8192_priv *priv = ieee80211_priv(dev);
2554         int                last_init_packet = 0;
2555         u8                 *ptr_cmd_buf;
2556         u16                 cmd_buf_len;
2557
2558         if(tx_cmd_urb->status != 0) {
2559                 priv->pFirmware.firmware_seg_index = 0; //only begin transter, should it can be set to 1
2560         }
2561
2562         /* Free the urb and the corresponding buf for common Tx cmd packet, or
2563          * last segment of each firmware img.
2564          */
2565         if((priv->pFirmware.firmware_seg_index == 0) ||(priv->pFirmware.firmware_seg_index == priv->pFirmware.firmware_seg_maxnum)) {
2566                 priv->pFirmware.firmware_seg_index = 0;//only begin transter, should it can be set to 1
2567         } else {
2568                 /* prepare for last transfer */
2569                 /* update some infomation for */
2570                 /* last segment of the firmware img need indicate to device */
2571                 priv->pFirmware.firmware_seg_index++;
2572                 if(priv->pFirmware.firmware_seg_index == priv->pFirmware.firmware_seg_maxnum) {
2573                         last_init_packet = 1;
2574                 }
2575
2576                 cmd_buf_len = priv->pFirmware.firmware_seg_container[priv->pFirmware.firmware_seg_index-1].seg_size;
2577                 ptr_cmd_buf = priv->pFfirmware.firmware_seg_container[priv->pFfirmware.firmware_seg_index-1].seg_ptr;
2578                 rtl819xU_tx_cmd(dev, ptr_cmd_buf, cmd_buf_len, last_init_packet, DESC_PACKET_TYPE_INIT);
2579         }
2580
2581         kfree(tx_cmd_urb->transfer_buffer);
2582 #endif
2583         usb_free_urb(tx_cmd_urb);
2584 }
2585
2586 unsigned int txqueue2outpipe(struct r8192_priv* priv,unsigned int tx_queue) {
2587
2588         if(tx_queue >= 9)
2589         {
2590                 RT_TRACE(COMP_ERR,"%s():Unknown queue ID!!!\n",__FUNCTION__);
2591                 return 0x04;
2592         }
2593         return priv->txqueue_to_outpipemap[tx_queue];
2594 }
2595
2596 #ifdef RTL8192SU
2597 short rtl8192SU_tx_cmd(struct net_device *dev, struct sk_buff *skb)
2598 {
2599         struct r8192_priv *priv = ieee80211_priv(dev);
2600         int                     status;
2601         struct urb              *tx_urb;
2602         unsigned int            idx_pipe;
2603         tx_desc_cmd_819x_usb *pdesc = (tx_desc_cmd_819x_usb *)skb->data;
2604         cb_desc *tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE);
2605         u8 queue_index = tcb_desc->queue_index;
2606         u32                     PktSize = 0;
2607
2608         //printk("\n %s::::::::::::::::::::::queue_index = %d\n",__FUNCTION__, queue_index);
2609         atomic_inc(&priv->tx_pending[queue_index]);
2610
2611         tx_urb = usb_alloc_urb(0,GFP_ATOMIC);
2612         if(!tx_urb){
2613                 dev_kfree_skb(skb);
2614                 return -ENOMEM;
2615         }
2616
2617         memset(pdesc, 0, USB_HWDESC_HEADER_LEN);
2618
2619         /* Tx descriptor ought to be set according to the skb->cb */
2620         pdesc->LINIP = tcb_desc->bLastIniPkt;
2621         PktSize = (u16)(skb->len - USB_HWDESC_HEADER_LEN);
2622         pdesc->PktSize = PktSize;
2623         //printk("PKTSize = %d %x\n",pdesc->PktSize,pdesc->PktSize);
2624         //----------------------------------------------------------------------------
2625         // Fill up USB_OUT_CONTEXT.
2626         //----------------------------------------------------------------------------
2627         // Get index to out pipe from specified QueueID.
2628         idx_pipe = txqueue2outpipe(priv,queue_index);
2629         //printk("=============>%s queue_index:%d, outpipe:%d\n", __func__,queue_index,priv->RtOutPipes[idx_pipe]);
2630
2631 #ifdef JOHN_DUMP_TXDESC
2632         int i;
2633         printk("Len = %d\n", skb->len);
2634         for (i = 0; i < 8; i++)
2635                 printk("%2.2x ", *((u8*)skb->data+i));
2636         printk("\n");
2637 #endif
2638
2639         usb_fill_bulk_urb(tx_urb,
2640                                     priv->udev,
2641                                     usb_sndbulkpipe(priv->udev,priv->RtOutPipes[idx_pipe]),
2642                                     skb->data,
2643                                     skb->len,
2644                                     rtl8192_tx_isr,
2645                                     skb);
2646
2647         status = usb_submit_urb(tx_urb, GFP_ATOMIC);
2648         if (!status){
2649                 return 0;
2650         }else{
2651                 printk("Error TX CMD URB, error %d",
2652                                 status);
2653                 return -1;
2654         }
2655 }
2656 #else
2657 short rtl819xU_tx_cmd(struct net_device *dev, struct sk_buff *skb)
2658 {
2659         struct r8192_priv *priv = ieee80211_priv(dev);
2660         //u8                    *tx;
2661         int                     status;
2662         struct urb              *tx_urb;
2663         //int                   urb_buf_len;
2664         unsigned int            idx_pipe;
2665         tx_desc_cmd_819x_usb *pdesc = (tx_desc_cmd_819x_usb *)skb->data;
2666         cb_desc *tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE);
2667         u8 queue_index = tcb_desc->queue_index;
2668
2669         //printk("\n %s::queue_index = %d\n",__FUNCTION__, queue_index);
2670         atomic_inc(&priv->tx_pending[queue_index]);
2671
2672         tx_urb = usb_alloc_urb(0,GFP_ATOMIC);
2673         if(!tx_urb){
2674                 dev_kfree_skb(skb);
2675                 return -ENOMEM;
2676         }
2677
2678         memset(pdesc, 0, USB_HWDESC_HEADER_LEN);
2679         /* Tx descriptor ought to be set according to the skb->cb */
2680         pdesc->FirstSeg = 1;//bFirstSeg;
2681         pdesc->LastSeg = 1;//bLastSeg;
2682         pdesc->CmdInit = tcb_desc->bCmdOrInit;
2683         pdesc->TxBufferSize = tcb_desc->txbuf_size;
2684         pdesc->OWN = 1;
2685         pdesc->LINIP = tcb_desc->bLastIniPkt;
2686
2687         //----------------------------------------------------------------------------
2688         // Fill up USB_OUT_CONTEXT.
2689         //----------------------------------------------------------------------------
2690         // Get index to out pipe from specified QueueID.
2691         idx_pipe = txqueue2outpipe(priv,queue_index);
2692 #ifdef JOHN_DUMP_TXDESC
2693         int i;
2694         printk("<Tx descriptor>--rate %x---",rate);
2695         for (i = 0; i < 8; i++)
2696                 printk("%8x ", tx[i]);
2697         printk("\n");
2698 #endif
2699         usb_fill_bulk_urb(tx_urb,priv->udev, usb_sndbulkpipe(priv->udev,idx_pipe), \
2700                         skb->data, skb->len, rtl8192_tx_isr, skb);
2701
2702         status = usb_submit_urb(tx_urb, GFP_ATOMIC);
2703         if (!status){
2704                 return 0;
2705         }else{
2706                 DMESGE("Error TX CMD URB, error %d",
2707                                 status);
2708                 return -1;
2709         }
2710 }
2711 #endif
2712
2713 /*
2714  * Mapping Software/Hardware descriptor queue id to "Queue Select Field"
2715  * in TxFwInfo data structure
2716  * 2006.10.30 by Emily
2717  *
2718  * \param QUEUEID       Software Queue
2719 */
2720 u8 MapHwQueueToFirmwareQueue(u8 QueueID)
2721 {
2722         u8 QueueSelect = 0x0;       //defualt set to
2723
2724         switch(QueueID) {
2725                 case BE_QUEUE:
2726                         QueueSelect = QSLT_BE;  //or QSelect = pTcb->priority;
2727                         break;
2728
2729                 case BK_QUEUE:
2730                         QueueSelect = QSLT_BK;  //or QSelect = pTcb->priority;
2731                         break;
2732
2733                 case VO_QUEUE:
2734                         QueueSelect = QSLT_VO;  //or QSelect = pTcb->priority;
2735                         break;
2736
2737                 case VI_QUEUE:
2738                         QueueSelect = QSLT_VI;  //or QSelect = pTcb->priority;
2739                         break;
2740                 case MGNT_QUEUE:
2741                         QueueSelect = QSLT_MGNT;
2742                         break;
2743
2744                 case BEACON_QUEUE:
2745                         QueueSelect = QSLT_BEACON;
2746                         break;
2747
2748                         // TODO: 2006.10.30 mark other queue selection until we verify it is OK
2749                         // TODO: Remove Assertions
2750 //#if (RTL819X_FPGA_VER & RTL819X_FPGA_GUANGAN_070502)
2751                 case TXCMD_QUEUE:
2752                         QueueSelect = QSLT_CMD;
2753                         break;
2754 //#endif
2755                 case HIGH_QUEUE:
2756                         QueueSelect = QSLT_HIGH;
2757                         break;
2758
2759                 default:
2760                         RT_TRACE(COMP_ERR, "TransmitTCB(): Impossible Queue Selection: %d \n", QueueID);
2761                         break;
2762         }
2763         return QueueSelect;
2764 }
2765
2766 #ifdef RTL8192SU
2767 u8 MRateToHwRate8190Pci(u8 rate)
2768 {
2769         u8      ret = DESC92S_RATE1M;
2770
2771         switch(rate)
2772         {
2773                 // CCK and OFDM non-HT rates
2774         case MGN_1M:            ret = DESC92S_RATE1M;   break;
2775         case MGN_2M:            ret = DESC92S_RATE2M;   break;
2776         case MGN_5_5M:          ret = DESC92S_RATE5_5M; break;
2777         case MGN_11M:           ret = DESC92S_RATE11M;  break;
2778         case MGN_6M:            ret = DESC92S_RATE6M;   break;
2779         case MGN_9M:            ret = DESC92S_RATE9M;   break;
2780         case MGN_12M:           ret = DESC92S_RATE12M;  break;
2781         case MGN_18M:           ret = DESC92S_RATE18M;  break;
2782         case MGN_24M:           ret = DESC92S_RATE24M;  break;
2783         case MGN_36M:           ret = DESC92S_RATE36M;  break;
2784         case MGN_48M:           ret = DESC92S_RATE48M;  break;
2785         case MGN_54M:           ret = DESC92S_RATE54M;  break;
2786
2787                 // HT rates since here
2788         case MGN_MCS0:          ret = DESC92S_RATEMCS0; break;
2789         case MGN_MCS1:          ret = DESC92S_RATEMCS1; break;
2790         case MGN_MCS2:          ret = DESC92S_RATEMCS2; break;
2791         case MGN_MCS3:          ret = DESC92S_RATEMCS3; break;
2792         case MGN_MCS4:          ret = DESC92S_RATEMCS4; break;
2793         case MGN_MCS5:          ret = DESC92S_RATEMCS5; break;
2794         case MGN_MCS6:          ret = DESC92S_RATEMCS6; break;
2795         case MGN_MCS7:          ret = DESC92S_RATEMCS7; break;
2796         case MGN_MCS8:          ret = DESC92S_RATEMCS8; break;
2797         case MGN_MCS9:          ret = DESC92S_RATEMCS9; break;
2798         case MGN_MCS10: ret = DESC92S_RATEMCS10;        break;
2799         case MGN_MCS11: ret = DESC92S_RATEMCS11;        break;
2800         case MGN_MCS12: ret = DESC92S_RATEMCS12;        break;
2801         case MGN_MCS13: ret = DESC92S_RATEMCS13;        break;
2802         case MGN_MCS14: ret = DESC92S_RATEMCS14;        break;
2803         case MGN_MCS15: ret = DESC92S_RATEMCS15;        break;
2804
2805         // Set the highest SG rate
2806         case MGN_MCS0_SG:
2807         case MGN_MCS1_SG:
2808         case MGN_MCS2_SG:
2809         case MGN_MCS3_SG:
2810         case MGN_MCS4_SG:
2811         case MGN_MCS5_SG:
2812         case MGN_MCS6_SG:
2813         case MGN_MCS7_SG:
2814         case MGN_MCS8_SG:
2815         case MGN_MCS9_SG:
2816         case MGN_MCS10_SG:
2817         case MGN_MCS11_SG:
2818         case MGN_MCS12_SG:
2819         case MGN_MCS13_SG:
2820         case MGN_MCS14_SG:
2821         case MGN_MCS15_SG:
2822         {
2823                 ret = DESC92S_RATEMCS15_SG;
2824                 break;
2825         }
2826
2827         default:                break;
2828         }
2829         return ret;
2830 }
2831 #else
2832 u8 MRateToHwRate8190Pci(u8 rate)
2833 {
2834         u8  ret = DESC90_RATE1M;
2835
2836         switch(rate) {
2837                 case MGN_1M:    ret = DESC90_RATE1M;    break;
2838                 case MGN_2M:    ret = DESC90_RATE2M;    break;
2839                 case MGN_5_5M:  ret = DESC90_RATE5_5M;  break;
2840                 case MGN_11M:   ret = DESC90_RATE11M;   break;
2841                 case MGN_6M:    ret = DESC90_RATE6M;    break;
2842                 case MGN_9M:    ret = DESC90_RATE9M;    break;
2843                 case MGN_12M:   ret = DESC90_RATE12M;   break;
2844                 case MGN_18M:   ret = DESC90_RATE18M;   break;
2845                 case MGN_24M:   ret = DESC90_RATE24M;   break;
2846                 case MGN_36M:   ret = DESC90_RATE36M;   break;
2847                 case MGN_48M:   ret = DESC90_RATE48M;   break;
2848                 case MGN_54M:   ret = DESC90_RATE54M;   break;
2849
2850                 // HT rate since here
2851                 case MGN_MCS0:  ret = DESC90_RATEMCS0;  break;
2852                 case MGN_MCS1:  ret = DESC90_RATEMCS1;  break;
2853                 case MGN_MCS2:  ret = DESC90_RATEMCS2;  break;
2854                 case MGN_MCS3:  ret = DESC90_RATEMCS3;  break;
2855                 case MGN_MCS4:  ret = DESC90_RATEMCS4;  break;
2856                 case MGN_MCS5:  ret = DESC90_RATEMCS5;  break;
2857                 case MGN_MCS6:  ret = DESC90_RATEMCS6;  break;
2858                 case MGN_MCS7:  ret = DESC90_RATEMCS7;  break;
2859                 case MGN_MCS8:  ret = DESC90_RATEMCS8;  break;
2860                 case MGN_MCS9:  ret = DESC90_RATEMCS9;  break;
2861                 case MGN_MCS10: ret = DESC90_RATEMCS10; break;
2862                 case MGN_MCS11: ret = DESC90_RATEMCS11; break;
2863                 case MGN_MCS12: ret = DESC90_RATEMCS12; break;
2864                 case MGN_MCS13: ret = DESC90_RATEMCS13; break;
2865                 case MGN_MCS14: ret = DESC90_RATEMCS14; break;
2866                 case MGN_MCS15: ret = DESC90_RATEMCS15; break;
2867                 case (0x80|0x20): ret = DESC90_RATEMCS32; break;
2868
2869                 default:       break;
2870         }
2871         return ret;
2872 }
2873 #endif
2874
2875 u8 QueryIsShort(u8 TxHT, u8 TxRate, cb_desc *tcb_desc)
2876 {
2877         u8   tmp_Short;
2878
2879         tmp_Short = (TxHT==1)?((tcb_desc->bUseShortGI)?1:0):((tcb_desc->bUseShortPreamble)?1:0);
2880
2881         if(TxHT==1 && TxRate != DESC90_RATEMCS15)
2882                 tmp_Short = 0;
2883
2884         return tmp_Short;
2885 }
2886
2887 static void tx_zero_isr(struct urb *tx_urb)
2888 {
2889         return;
2890 }
2891
2892
2893 #ifdef RTL8192SU
2894 /*
2895  * The tx procedure is just as following,  skb->cb will contain all the following
2896  *information: * priority, morefrag, rate, &dev.
2897  * */
2898  //     <Note> Buffer format for 8192S Usb bulk out:
2899 //
2900 //  --------------------------------------------------
2901 //  | 8192S Usb Tx Desc | 802_11_MAC_header |    data          |
2902 //  --------------------------------------------------
2903 //  |  32 bytes                   |       24 bytes             |0-2318 bytes|
2904 //  --------------------------------------------------
2905 //  |<------------ BufferLen ------------------------->|
2906
2907 short rtl8192SU_tx(struct net_device *dev, struct sk_buff* skb)
2908 {
2909         struct r8192_priv *priv = ieee80211_priv(dev);
2910         cb_desc *tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE);
2911         tx_desc_819x_usb *tx_desc = (tx_desc_819x_usb *)skb->data;
2912         //tx_fwinfo_819x_usb *tx_fwinfo = (tx_fwinfo_819x_usb *)(skb->data + USB_HWDESC_HEADER_LEN);//92su del
2913         struct usb_device *udev = priv->udev;
2914         int pend;
2915         int status;
2916         struct urb *tx_urb = NULL, *tx_urb_zero = NULL;
2917         //int urb_len;
2918         unsigned int idx_pipe;
2919         u16             MPDUOverhead = 0;
2920         //RT_DEBUG_DATA(COMP_SEND, tcb_desc, sizeof(cb_desc));
2921
2922 #if 0
2923         /* Added by Annie for filling Len_Adjust field. 2005-12-14. */
2924         RT_ENC_ALG  EncAlg = NO_Encryption;
2925 #endif
2926
2927
2928         pend = atomic_read(&priv->tx_pending[tcb_desc->queue_index]);
2929         /* we are locked here so the two atomic_read and inc are executed
2930          * without interleaves  * !!! For debug purpose           */
2931         if( pend > MAX_TX_URB){
2932                 switch (tcb_desc->queue_index) {
2933                         case VO_PRIORITY:
2934                                 priv->stats.txvodrop++;
2935                                 break;
2936                         case VI_PRIORITY:
2937                                 priv->stats.txvidrop++;
2938                                 break;
2939                         case BE_PRIORITY:
2940                                 priv->stats.txbedrop++;
2941                                 break;
2942                         default://BK_PRIORITY
2943                                 priv->stats.txbkdrop++;
2944                                 break;
2945                 }
2946                 printk("To discard skb packet!\n");
2947                 dev_kfree_skb_any(skb);
2948                 return -1;
2949         }
2950
2951         tx_urb = usb_alloc_urb(0,GFP_ATOMIC);
2952         if(!tx_urb){
2953                 dev_kfree_skb_any(skb);
2954                 return -ENOMEM;
2955         }
2956
2957         memset(tx_desc, 0, sizeof(tx_desc_819x_usb));
2958
2959
2960 #if RTL8192SU_FPGA_UNSPECIFIED_NETWORK
2961                 if(IsQoSDataFrame(skb->data))
2962                 {
2963                         tcb_desc->bAMPDUEnable = TRUE;
2964                         tx_desc->NonQos = 0;
2965                 }
2966                 else
2967                         tcb_desc->bAMPDUEnable = FALSE;
2968
2969                 tcb_desc->bPacketBW = TRUE;
2970                 priv->CurrentChannelBW = HT_CHANNEL_WIDTH_20_40;
2971 #endif
2972
2973 #if (defined (RTL8192SU_FPGA_2MAC_VERIFICATION)||defined (RTL8192SU_ASIC_VERIFICATION))
2974                 tx_desc->NonQos = (IsQoSDataFrame(skb->data)==TRUE)? 0:1;
2975 #endif
2976
2977         /* Fill Tx descriptor */
2978         //memset(tx_fwinfo,0,sizeof(tx_fwinfo_819x_usb));
2979
2980         // This part can just fill to the first descriptor of the frame.
2981         /* DWORD 0 */
2982         tx_desc->TxHT = (tcb_desc->data_rate&0x80)?1:0;
2983
2984
2985         tx_desc->TxRate = MRateToHwRate8190Pci(tcb_desc->data_rate);
2986         //tx_desc->EnableCPUDur = tcb_desc->bTxEnableFwCalcDur;
2987         tx_desc->TxShort = QueryIsShort(tx_desc->TxHT, tx_desc->TxRate, tcb_desc);
2988
2989
2990         // Aggregation related
2991         if(tcb_desc->bAMPDUEnable) {//AMPDU enabled
2992                 tx_desc->AllowAggregation = 1;
2993                 /* DWORD 1 */
2994                 //tx_fwinfo->RxMF = tcb_desc->ampdu_factor;
2995                 //tx_fwinfo->RxAMD = tcb_desc->ampdu_density&0x07;//ampdudensity
2996         } else {
2997                 tx_desc->AllowAggregation = 0;
2998                 /* DWORD 1 */
2999                 //tx_fwinfo->RxMF = 0;
3000                 //tx_fwinfo->RxAMD = 0;
3001         }
3002
3003         //
3004         // <Roger_Notes> For AMPDU case, we must insert SSN into TX_DESC,
3005         // FW according as this SSN to do necessary packet retry.
3006         // 2008.06.06.
3007         //
3008         {
3009                 u8      *pSeq;
3010                 u16     Temp;
3011                 //pSeq = (u8 *)(VirtualAddress+USB_HWDESC_HEADER_LEN + FRAME_OFFSET_SEQUENCE);
3012                 pSeq = (u8 *)(skb->data+USB_HWDESC_HEADER_LEN + 22);
3013                 Temp = pSeq[0];
3014                 Temp <<= 12;
3015                 Temp |= (*(u16 *)pSeq)>>4;
3016                 tx_desc->Seq = Temp;
3017         }
3018
3019         /* Protection mode related */
3020         tx_desc->RTSEn = (tcb_desc->bRTSEnable)?1:0;
3021         tx_desc->CTS2Self = (tcb_desc->bCTSEnable)?1:0;
3022         tx_desc->RTSSTBC = (tcb_desc->bRTSSTBC)?1:0;
3023         tx_desc->RTSHT = (tcb_desc->rts_rate&0x80)?1:0;
3024         tx_desc->RTSRate =  MRateToHwRate8190Pci((u8)tcb_desc->rts_rate);
3025         tx_desc->RTSSubcarrier = (tx_desc->RTSHT==0)?(tcb_desc->RTSSC):0;
3026         tx_desc->RTSBW = (tx_desc->RTSHT==1)?((tcb_desc->bRTSBW)?1:0):0;
3027         tx_desc->RTSShort = (tx_desc->RTSHT==0)?(tcb_desc->bRTSUseShortPreamble?1:0):\
3028                                 (tcb_desc->bRTSUseShortGI?1:0);
3029         //LZM 090219
3030         tx_desc->DisRTSFB = 0;
3031         tx_desc->RTSRateFBLmt = 0xf;
3032
3033         // <Roger_EXP> 2008.09.22. We disable RTS rate fallback temporarily.
3034         //tx_desc->DisRTSFB = 0x01;
3035
3036         /* Set Bandwidth and sub-channel settings. */
3037         if(priv->CurrentChannelBW == HT_CHANNEL_WIDTH_20_40)
3038         {
3039                 if(tcb_desc->bPacketBW) {
3040                         tx_desc->TxBandwidth = 1;
3041                         tx_desc->TxSubCarrier = 0;    //By SD3's Jerry suggestion, use duplicated mode
3042                 } else {
3043                         tx_desc->TxBandwidth = 0;
3044                         tx_desc->TxSubCarrier = priv->nCur40MhzPrimeSC;
3045                 }
3046         } else {
3047                 tx_desc->TxBandwidth = 0;
3048                 tx_desc->TxSubCarrier = 0;
3049         }
3050
3051
3052         //memset(tx_desc, 0, sizeof(tx_desc_819x_usb));
3053         /* DWORD 0 */
3054         tx_desc->LINIP = 0;
3055         //tx_desc->CmdInit = 1; //92su del
3056         tx_desc->Offset =  USB_HWDESC_HEADER_LEN;
3057
3058         {
3059                 tx_desc->PktSize = (skb->len - USB_HWDESC_HEADER_LEN) & 0xffff;
3060         }
3061
3062         /*DWORD 1*/
3063         //tx_desc->SecCAMID= 0;//92su del
3064         tx_desc->RaBRSRID= tcb_desc->RATRIndex;
3065 //#ifdef RTL8192S_PREPARE_FOR_NORMAL_RELEASE
3066 #if 0//LZM 090219
3067         tx_desc->RaBRSRID= 1;
3068 #endif
3069
3070 #if 0
3071         /* Fill security related */
3072         if( pTcb->bEncrypt && !Adapter->MgntInfo.SecurityInfo.SWTxEncryptFlag)
3073         {
3074                 EncAlg = SecGetEncryptionOverhead(
3075                                 Adapter,
3076                                 &EncryptionMPDUHeadOverhead,
3077                                 &EncryptionMPDUTailOverhead,
3078                                 NULL,
3079                                 NULL,
3080                                 FALSE,
3081                                 FALSE);
3082                 //2004/07/22, kcwu, EncryptionMPDUHeadOverhead has been added in previous code
3083                 //MPDUOverhead = EncryptionMPDUHeadOverhead + EncryptionMPDUTailOverhead;
3084                 MPDUOverhead = EncryptionMPDUTailOverhead;
3085                 tx_desc->NoEnc = 0;
3086                 RT_TRACE(COMP_SEC, DBG_LOUD, ("******We in the loop SecCAMID is %d SecDescAssign is %d The Sec is %d********\n",tx_desc->SecCAMID,tx_desc->SecDescAssign,EncAlg));
3087                 //CamDumpAll(Adapter);
3088         }
3089         else
3090 #endif
3091         {
3092                 MPDUOverhead = 0;
3093                 //tx_desc->NoEnc = 1;//92su del
3094         }
3095 #if 0
3096         switch(EncAlg){
3097                 case NO_Encryption:
3098                         tx_desc->SecType = 0x0;
3099                         break;
3100                 case WEP40_Encryption:
3101                 case WEP104_Encryption:
3102                         tx_desc->SecType = 0x1;
3103                         break;
3104                 case TKIP_Encryption:
3105                         tx_desc->SecType = 0x2;
3106                         break;
3107                 case AESCCMP_Encryption:
3108                         tx_desc->SecType = 0x3;
3109                         break;
3110                 default:
3111                         tx_desc->SecType = 0x0;
3112                         break;
3113         }
3114 #else
3115         tx_desc->SecType = 0x0;
3116 #endif
3117                 if (tcb_desc->bHwSec)
3118                         {
3119                                 switch (priv->ieee80211->pairwise_key_type)
3120                                 {
3121                                         case KEY_TYPE_WEP40:
3122                                         case KEY_TYPE_WEP104:
3123                                                  tx_desc->SecType = 0x1;
3124                                                  //tx_desc->NoEnc = 0;//92su del
3125                                                  break;
3126                                         case KEY_TYPE_TKIP:
3127                                                  tx_desc->SecType = 0x2;
3128                                                  //tx_desc->NoEnc = 0;//92su del
3129                                                  break;
3130                                         case KEY_TYPE_CCMP:
3131                                                  tx_desc->SecType = 0x3;
3132                                                  //tx_desc->NoEnc = 0;//92su del
3133                                                  break;
3134                                         case KEY_TYPE_NA:
3135                                                  tx_desc->SecType = 0x0;
3136                                                  //tx_desc->NoEnc = 1;//92su del
3137                                                  break;
3138                                         default:
3139                                                  tx_desc->SecType = 0x0;
3140                                                  //tx_desc->NoEnc = 1;//92su del
3141                                                  break;
3142                                 }
3143                         }
3144
3145         //tx_desc->TxFWInfoSize =  sizeof(tx_fwinfo_819x_usb);//92su del
3146
3147
3148         tx_desc->USERATE = tcb_desc->bTxUseDriverAssingedRate;
3149         tx_desc->DISFB = tcb_desc->bTxDisableRateFallBack;
3150         tx_desc->DataRateFBLmt = 0x1F;// Alwasy enable all rate fallback range
3151
3152         tx_desc->QueueSelect = MapHwQueueToFirmwareQueue(tcb_desc->queue_index);
3153
3154
3155         /* Fill fields that are required to be initialized in all of the descriptors */
3156         //DWORD 0
3157 #if 0
3158         tx_desc->FirstSeg = (tcb_desc->bFirstSeg)? 1:0;
3159         tx_desc->LastSeg = (tcb_desc->bLastSeg)?1:0;
3160 #else
3161         tx_desc->FirstSeg = 1;
3162         tx_desc->LastSeg = 1;
3163 #endif
3164         tx_desc->OWN = 1;
3165
3166         {
3167                 //DWORD 2
3168                 //tx_desc->TxBufferSize = (u32)(skb->len - USB_HWDESC_HEADER_LEN);
3169                 tx_desc->TxBufferSize = (u32)(skb->len);//92su mod FIXLZM
3170         }
3171
3172 #if 0
3173         RT_TRACE(COMP_FPGA, DBG_LOUD, ("(1)TxFillDescriptor8192SUsb(): DataRate(%#x)\n", pTcb->DataRate));
3174         RT_TRACE(COMP_FPGA, DBG_LOUD, ("(2)TxFillDescriptor8192SUsb(): bTxUseDriverAssingedRate(%#x)\n", pTcb->bTxUseDriverAssingedRate));
3175         RT_TRACE(COMP_FPGA, DBG_LOUD, ("(3)TxFillDescriptor8192SUsb(): bAMPDUEnable(%d)\n", pTcb->bAMPDUEnable));
3176         RT_TRACE(COMP_FPGA, DBG_LOUD, ("(4)TxFillDescriptor8192SUsb(): bRTSEnable(%d)\n", pTcb->bRTSEnable));
3177         RT_TRACE(COMP_FPGA, DBG_LOUD, ("(5)TxFillDescriptor8192SUsb(): RTSRate(%#x)\n", pTcb->RTSRate));
3178         RT_TRACE(COMP_FPGA, DBG_LOUD, ("(6)TxFillDescriptor8192SUsb(): bCTSEnable(%d)\n", pTcb->bCTSEnable));
3179         RT_TRACE(COMP_FPGA, DBG_LOUD, ("(7)TxFillDescriptor8192SUsb(): bUseShortGI(%d)\n", pTcb->bUseShortGI));
3180         RT_TRACE(COMP_FPGA, DBG_LOUD, ("(8)TxFillDescriptor8192SUsb(): bPacketBW(%d)\n", pTcb->bPacketBW));
3181         RT_TRACE(COMP_FPGA, DBG_LOUD, ("(9)TxFillDescriptor8192SUsb(): CurrentChannelBW(%d)\n", pHalData->CurrentChannelBW));
3182         RT_TRACE(COMP_FPGA, DBG_LOUD, ("(10)TxFillDescriptor8192SUsb(): bTxDisableRateFallBack(%d)\n", pTcb->bTxDisableRateFallBack));
3183         RT_TRACE(COMP_FPGA, DBG_LOUD, ("(11)TxFillDescriptor8192SUsb(): RATRIndex(%d)\n", pTcb->RATRIndex));
3184 #endif
3185
3186         /* Get index to out pipe from specified QueueID */
3187         idx_pipe = txqueue2outpipe(priv,tcb_desc->queue_index);
3188         //printk("=============>%s queue_index:%d, outpipe:%d\n", __func__,tcb_desc->queue_index,priv->RtOutPipes[idx_pipe]);
3189
3190         //RT_DEBUG_DATA(COMP_SEND,tx_fwinfo,sizeof(tx_fwinfo_819x_usb));
3191         //RT_DEBUG_DATA(COMP_SEND,tx_desc,sizeof(tx_desc_819x_usb));
3192
3193         /* To submit bulk urb */
3194         usb_fill_bulk_urb(tx_urb,
3195                                     udev,
3196                                     usb_sndbulkpipe(udev,priv->RtOutPipes[idx_pipe]),
3197                                     skb->data,
3198                                     skb->len, rtl8192_tx_isr, skb);
3199
3200         status = usb_submit_urb(tx_urb, GFP_ATOMIC);
3201         if (!status){
3202 //we need to send 0 byte packet whenever 512N bytes/64N(HIGN SPEED/NORMAL SPEED) bytes packet has been transmitted. Otherwise, it will be halt to wait for another packet. WB. 2008.08.27
3203                 bool bSend0Byte = false;
3204                 u8 zero = 0;
3205                 if(udev->speed == USB_SPEED_HIGH)
3206                 {
3207                         if (skb->len > 0 && skb->len % 512 == 0)
3208                                 bSend0Byte = true;
3209                 }
3210                 else
3211                 {
3212                         if (skb->len > 0 && skb->len % 64 == 0)
3213                                 bSend0Byte = true;
3214                 }
3215                 if (bSend0Byte)
3216                 {
3217 #if 1
3218                         tx_urb_zero = usb_alloc_urb(0,GFP_ATOMIC);
3219                         if(!tx_urb_zero){
3220                                 RT_TRACE(COMP_ERR, "can't alloc urb for zero byte\n");
3221                                 return -ENOMEM;
3222                         }
3223                         usb_fill_bulk_urb(tx_urb_zero,udev,
3224                                         usb_sndbulkpipe(udev,idx_pipe), &zero,
3225                                         0, tx_zero_isr, dev);
3226                         status = usb_submit_urb(tx_urb_zero, GFP_ATOMIC);
3227                         if (status){
3228                         RT_TRACE(COMP_ERR, "Error TX URB for zero byte %d, error %d", atomic_read(&priv->tx_pending[tcb_desc->queue_index]), status);
3229                         return -1;
3230                         }
3231 #endif
3232                 }
3233                 dev->trans_start = jiffies;
3234                 atomic_inc(&priv->tx_pending[tcb_desc->queue_index]);
3235                 return 0;
3236         }else{
3237                 RT_TRACE(COMP_ERR, "Error TX URB %d, error %d", atomic_read(&priv->tx_pending[tcb_desc->queue_index]),
3238                                 status);
3239                 return -1;
3240         }
3241 }
3242 #else
3243
3244 /*
3245  * The tx procedure is just as following,
3246  * skb->cb will contain all the following information,
3247  * priority, morefrag, rate, &dev.
3248  * */
3249 short rtl8192_tx(struct net_device *dev, struct sk_buff* skb)
3250 {
3251         struct r8192_priv *priv = ieee80211_priv(dev);
3252         cb_desc *tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE);
3253         tx_desc_819x_usb *tx_desc = (tx_desc_819x_usb *)skb->data;
3254         tx_fwinfo_819x_usb *tx_fwinfo = (tx_fwinfo_819x_usb *)(skb->data + USB_HWDESC_HEADER_LEN);
3255         struct usb_device *udev = priv->udev;
3256         int pend;
3257         int status;
3258         struct urb *tx_urb = NULL, *tx_urb_zero = NULL;
3259         //int urb_len;
3260         unsigned int idx_pipe;
3261 //      RT_DEBUG_DATA(COMP_SEND, tcb_desc, sizeof(cb_desc));
3262 #if 0
3263         /* Added by Annie for filling Len_Adjust field. 2005-12-14. */
3264         RT_ENC_ALG  EncAlg = NO_Encryption;
3265 #endif
3266 //      printk("=============> %s\n", __FUNCTION__);
3267         pend = atomic_read(&priv->tx_pending[tcb_desc->queue_index]);
3268         /* we are locked here so the two atomic_read and inc are executed
3269          * without interleaves
3270          * !!! For debug purpose
3271          */
3272         if( pend > MAX_TX_URB){
3273 #if 0
3274                 switch (tcb_desc->queue_index) {
3275                         case VO_PRIORITY:
3276                                 priv->stats.txvodrop++;
3277                                 break;
3278                         case VI_PRIORITY:
3279                                 priv->stats.txvidrop++;
3280                                 break;
3281                         case BE_PRIORITY:
3282                                 priv->stats.txbedrop++;
3283                                 break;
3284                         default://BK_PRIORITY
3285                                 priv->stats.txbkdrop++;
3286                                 break;
3287                 }
3288 #endif
3289                 printk("To discard skb packet!\n");
3290                 dev_kfree_skb_any(skb);
3291                 return -1;
3292         }
3293
3294         tx_urb = usb_alloc_urb(0,GFP_ATOMIC);
3295         if(!tx_urb){
3296                 dev_kfree_skb_any(skb);
3297                 return -ENOMEM;
3298         }
3299
3300         /* Fill Tx firmware info */
3301         memset(tx_fwinfo,0,sizeof(tx_fwinfo_819x_usb));
3302         /* DWORD 0 */
3303         tx_fwinfo->TxHT = (tcb_desc->data_rate&0x80)?1:0;
3304         tx_fwinfo->TxRate = MRateToHwRate8190Pci(tcb_desc->data_rate);
3305         tx_fwinfo->EnableCPUDur = tcb_desc->bTxEnableFwCalcDur;
3306         tx_fwinfo->Short = QueryIsShort(tx_fwinfo->TxHT, tx_fwinfo->TxRate, tcb_desc);
3307         if(tcb_desc->bAMPDUEnable) {//AMPDU enabled
3308                 tx_fwinfo->AllowAggregation = 1;
3309                 /* DWORD 1 */
3310                 tx_fwinfo->RxMF = tcb_desc->ampdu_factor;
3311                 tx_fwinfo->RxAMD = tcb_desc->ampdu_density&0x07;//ampdudensity
3312         } else {
3313                 tx_fwinfo->AllowAggregation = 0;
3314                 /* DWORD 1 */
3315                 tx_fwinfo->RxMF = 0;
3316                 tx_fwinfo->RxAMD = 0;
3317         }
3318
3319         /* Protection mode related */
3320         tx_fwinfo->RtsEnable = (tcb_desc->bRTSEnable)?1:0;
3321         tx_fwinfo->CtsEnable = (tcb_desc->bCTSEnable)?1:0;
3322         tx_fwinfo->RtsSTBC = (tcb_desc->bRTSSTBC)?1:0;
3323         tx_fwinfo->RtsHT = (tcb_desc->rts_rate&0x80)?1:0;
3324         tx_fwinfo->RtsRate =  MRateToHwRate8190Pci((u8)tcb_desc->rts_rate);
3325         tx_fwinfo->RtsSubcarrier = (tx_fwinfo->RtsHT==0)?(tcb_desc->RTSSC):0;
3326         tx_fwinfo->RtsBandwidth = (tx_fwinfo->RtsHT==1)?((tcb_desc->bRTSBW)?1:0):0;
3327         tx_fwinfo->RtsShort = (tx_fwinfo->RtsHT==0)?(tcb_desc->bRTSUseShortPreamble?1:0):\
3328                                 (tcb_desc->bRTSUseShortGI?1:0);
3329
3330         /* Set Bandwidth and sub-channel settings. */
3331         if(priv->CurrentChannelBW == HT_CHANNEL_WIDTH_20_40)
3332         {
3333                 if(tcb_desc->bPacketBW) {
3334                         tx_fwinfo->TxBandwidth = 1;
3335                         tx_fwinfo->TxSubCarrier = 0;    //By SD3's Jerry suggestion, use duplicated mode
3336                 } else {
3337                         tx_fwinfo->TxBandwidth = 0;
3338                         tx_fwinfo->TxSubCarrier = priv->nCur40MhzPrimeSC;
3339                 }
3340         } else {
3341                 tx_fwinfo->TxBandwidth = 0;
3342                 tx_fwinfo->TxSubCarrier = 0;
3343         }
3344
3345         /* Fill Tx descriptor */
3346         memset(tx_desc, 0, sizeof(tx_desc_819x_usb));
3347         /* DWORD 0 */
3348         tx_desc->LINIP = 0;
3349         tx_desc->CmdInit = 1;
3350         tx_desc->Offset =  sizeof(tx_fwinfo_819x_usb) + 8;
3351
3352         {
3353                 tx_desc->PktSize = (skb->len - TX_PACKET_SHIFT_BYTES) & 0xffff;
3354         }
3355
3356         /*DWORD 1*/
3357         tx_desc->SecCAMID= 0;
3358         tx_desc->RATid = tcb_desc->RATRIndex;
3359 #if 0
3360         /* Fill security related */
3361         if( pTcb->bEncrypt && !Adapter->MgntInfo.SecurityInfo.SWTxEncryptFlag)
3362         {
3363                 EncAlg = SecGetEncryptionOverhead(
3364                                 Adapter,
3365                                 &EncryptionMPDUHeadOverhead,
3366                                 &EncryptionMPDUTailOverhead,
3367                                 NULL,
3368                                 NULL,
3369                                 FALSE,
3370                                 FALSE);
3371                 //2004/07/22, kcwu, EncryptionMPDUHeadOverhead has been added in previous code
3372                 //MPDUOverhead = EncryptionMPDUHeadOverhead + EncryptionMPDUTailOverhead;
3373                 MPDUOverhead = EncryptionMPDUTailOverhead;
3374                 tx_desc->NoEnc = 0;
3375                 RT_TRACE(COMP_SEC, DBG_LOUD, ("******We in the loop SecCAMID is %d SecDescAssign is %d The Sec is %d********\n",tx_desc->SecCAMID,tx_desc->SecDescAssign,EncAlg));
3376                 //CamDumpAll(Adapter);
3377         }
3378         else
3379 #endif
3380         {
3381                 //MPDUOverhead = 0;
3382                 tx_desc->NoEnc = 1;
3383         }
3384 #if 0
3385         switch(EncAlg){
3386                 case NO_Encryption:
3387                         tx_desc->SecType = 0x0;
3388                         break;
3389                 case WEP40_Encryption:
3390                 case WEP104_Encryption:
3391                         tx_desc->SecType = 0x1;
3392                         break;
3393                 case TKIP_Encryption:
3394                         tx_desc->SecType = 0x2;
3395                         break;
3396                 case AESCCMP_Encryption:
3397                         tx_desc->SecType = 0x3;
3398                         break;
3399                 default:
3400                         tx_desc->SecType = 0x0;
3401                         break;
3402         }
3403 #else
3404         tx_desc->SecType = 0x0;
3405 #endif
3406                 if (tcb_desc->bHwSec)
3407                         {
3408                                 switch (priv->ieee80211->pairwise_key_type)
3409                                 {
3410                                         case KEY_TYPE_WEP40:
3411                                         case KEY_TYPE_WEP104:
3412                                                  tx_desc->SecType = 0x1;
3413                                                  tx_desc->NoEnc = 0;
3414                                                  break;
3415                                         case KEY_TYPE_TKIP:
3416                                                  tx_desc->SecType = 0x2;
3417                                                  tx_desc->NoEnc = 0;
3418                                                  break;
3419                                         case KEY_TYPE_CCMP:
3420                                                  tx_desc->SecType = 0x3;
3421                                                  tx_desc->NoEnc = 0;
3422                                                  break;
3423                                         case KEY_TYPE_NA:
3424                                                  tx_desc->SecType = 0x0;
3425                                                  tx_desc->NoEnc = 1;
3426                                                  break;
3427                                 }
3428                         }
3429
3430         tx_desc->QueueSelect = MapHwQueueToFirmwareQueue(tcb_desc->queue_index);
3431         tx_desc->TxFWInfoSize =  sizeof(tx_fwinfo_819x_usb);
3432
3433         tx_desc->DISFB = tcb_desc->bTxDisableRateFallBack;
3434         tx_desc->USERATE = tcb_desc->bTxUseDriverAssingedRate;
3435
3436         /* Fill fields that are required to be initialized in all of the descriptors */
3437         //DWORD 0
3438 #if 0
3439         tx_desc->FirstSeg = (tcb_desc->bFirstSeg)? 1:0;
3440         tx_desc->LastSeg = (tcb_desc->bLastSeg)?1:0;
3441 #else
3442         tx_desc->FirstSeg = 1;
3443         tx_desc->LastSeg = 1;
3444 #endif
3445         tx_desc->OWN = 1;
3446
3447         {
3448                 //DWORD 2
3449                 tx_desc->TxBufferSize = (u32)(skb->len - USB_HWDESC_HEADER_LEN);
3450         }
3451         /* Get index to out pipe from specified QueueID */
3452         idx_pipe = txqueue2outpipe(priv,tcb_desc->queue_index);
3453
3454         //RT_DEBUG_DATA(COMP_SEND,tx_fwinfo,sizeof(tx_fwinfo_819x_usb));
3455         //RT_DEBUG_DATA(COMP_SEND,tx_desc,sizeof(tx_desc_819x_usb));
3456
3457         /* To submit bulk urb */
3458         usb_fill_bulk_urb(tx_urb,udev,
3459                         usb_sndbulkpipe(udev,idx_pipe), skb->data,
3460                         skb->len, rtl8192_tx_isr, skb);
3461
3462         status = usb_submit_urb(tx_urb, GFP_ATOMIC);
3463         if (!status){
3464 //we need to send 0 byte packet whenever 512N bytes/64N(HIGN SPEED/NORMAL SPEED) bytes packet has been transmitted. Otherwise, it will be halt to wait for another packet. WB. 2008.08.27
3465                 bool bSend0Byte = false;
3466                 u8 zero = 0;
3467                 if(udev->speed == USB_SPEED_HIGH)
3468                 {
3469                         if (skb->len > 0 && skb->len % 512 == 0)
3470                                 bSend0Byte = true;
3471                 }
3472                 else
3473                 {
3474                         if (skb->len > 0 && skb->len % 64 == 0)
3475                                 bSend0Byte = true;
3476                 }
3477                 if (bSend0Byte)
3478                 {
3479 #if 1
3480                         tx_urb_zero = usb_alloc_urb(0,GFP_ATOMIC);
3481                         if(!tx_urb_zero){
3482                                 RT_TRACE(COMP_ERR, "can't alloc urb for zero byte\n");
3483                                 return -ENOMEM;
3484                         }
3485                         usb_fill_bulk_urb(tx_urb_zero,udev,
3486                                         usb_sndbulkpipe(udev,idx_pipe), &zero,
3487                                         0, tx_zero_isr, dev);
3488                         status = usb_submit_urb(tx_urb_zero, GFP_ATOMIC);
3489                         if (status){
3490                         RT_TRACE(COMP_ERR, "Error TX URB for zero byte %d, error %d", atomic_read(&priv->tx_pending[tcb_desc->queue_index]), status);
3491                         return -1;
3492                         }
3493 #endif
3494                 }
3495                 dev->trans_start = jiffies;
3496                 atomic_inc(&priv->tx_pending[tcb_desc->queue_index]);
3497                 return 0;
3498         }else{
3499                 RT_TRACE(COMP_ERR, "Error TX URB %d, error %d", atomic_read(&priv->tx_pending[tcb_desc->queue_index]),
3500                                 status);
3501                 return -1;
3502         }
3503 }
3504 #endif
3505
3506 #if 0
3507 void rtl8192_set_rate(struct net_device *dev)
3508 {
3509         int i;
3510         u16 word;
3511         int basic_rate,min_rr_rate,max_rr_rate;
3512
3513 //      struct r8192_priv *priv = ieee80211_priv(dev);
3514
3515         //if (ieee80211_is_54g(priv->ieee80211->current_network) &&
3516 //              priv->ieee80211->state == IEEE80211_LINKED){
3517         basic_rate = ieeerate2rtlrate(240);
3518         min_rr_rate = ieeerate2rtlrate(60);
3519         max_rr_rate = ieeerate2rtlrate(240);
3520
3521 //
3522 //      }else{
3523 //              basic_rate = ieeerate2rtlrate(20);
3524 //              min_rr_rate = ieeerate2rtlrate(10);
3525 //              max_rr_rate = ieeerate2rtlrate(110);
3526 //      }
3527
3528         write_nic_byte(dev, RESP_RATE,
3529                         max_rr_rate<<MAX_RESP_RATE_SHIFT| min_rr_rate<<MIN_RESP_RATE_SHIFT);
3530
3531         //word  = read_nic_word(dev, BRSR);
3532         word  = read_nic_word(dev, BRSR_8187);
3533         word &= ~BRSR_MBR_8185;
3534
3535
3536         for(i=0;i<=basic_rate;i++)
3537                 word |= (1<<i);
3538
3539         //write_nic_word(dev, BRSR, word);
3540         write_nic_word(dev, BRSR_8187, word);
3541         //DMESG("RR:%x BRSR: %x", read_nic_byte(dev,RESP_RATE), read_nic_word(dev,BRSR));
3542 }
3543 #endif
3544
3545
3546 #ifdef RTL8192SU
3547 void rtl8192SU_net_update(struct net_device *dev)
3548 {
3549
3550         struct r8192_priv *priv = ieee80211_priv(dev);
3551         struct ieee80211_device* ieee = priv->ieee80211;
3552         struct ieee80211_network *net = &priv->ieee80211->current_network;
3553         //u16 BcnTimeCfg = 0, BcnCW = 6, BcnIFS = 0xf;
3554         u16 rate_config = 0;
3555         u32 regTmp = 0;
3556         u8 rateIndex = 0;
3557         u8      retrylimit = 0x30;
3558         u16 cap = net->capability;
3559
3560         priv->short_preamble = cap & WLAN_CAPABILITY_SHORT_PREAMBLE;
3561
3562 //HW_VAR_BASIC_RATE
3563         //update Basic rate: RR, BRSR
3564         rtl8192_config_rate(dev, &rate_config); //HalSetBrateCfg
3565
3566         priv->basic_rate = rate_config  = rate_config & 0x15f;
3567
3568         // Set RRSR rate table.
3569         write_nic_byte(dev, RRSR, rate_config&0xff);
3570         write_nic_byte(dev, RRSR+1, (rate_config>>8)&0xff);
3571
3572         // Set RTS initial rate
3573         while(rate_config > 0x1)
3574         {
3575                 rate_config = (rate_config>> 1);
3576                 rateIndex++;
3577         }
3578         write_nic_byte(dev, INIRTSMCS_SEL, rateIndex);
3579 //HW_VAR_BASIC_RATE
3580
3581         //set ack preample
3582         regTmp = (priv->nCur40MhzPrimeSC) << 5;
3583         if (priv->short_preamble)
3584                 regTmp |= 0x80;
3585         write_nic_byte(dev, RRSR+2, regTmp);
3586
3587         write_nic_dword(dev,BSSIDR,((u32*)net->bssid)[0]);
3588         write_nic_word(dev,BSSIDR+4,((u16*)net->bssid)[2]);
3589
3590         write_nic_word(dev, BCN_INTERVAL, net->beacon_interval);
3591         //2008.10.24 added by tynli for beacon changed.
3592         PHY_SetBeaconHwReg( dev, net->beacon_interval);
3593
3594         rtl8192_update_cap(dev, cap);
3595
3596         if (ieee->iw_mode == IW_MODE_ADHOC){
3597                 retrylimit = 7;
3598                 //we should enable ibss interrupt here, but disable it temporarily
3599                 if (0){
3600                         priv->irq_mask |= (IMR_BcnInt | IMR_BcnInt | IMR_TBDOK | IMR_TBDER);
3601                         //rtl8192_irq_disable(dev);
3602                         //rtl8192_irq_enable(dev);
3603                 }
3604         }
3605         else{
3606                 if (0){
3607                         priv->irq_mask &= ~(IMR_BcnInt | IMR_BcnInt | IMR_TBDOK | IMR_TBDER);
3608                         //rtl8192_irq_disable(dev);
3609                         //rtl8192_irq_enable(dev);
3610                 }
3611         }
3612
3613         priv->ShortRetryLimit = priv->LongRetryLimit = retrylimit;
3614
3615         write_nic_word(dev,     RETRY_LIMIT,
3616                                 retrylimit << RETRY_LIMIT_SHORT_SHIFT | \
3617                                 retrylimit << RETRY_LIMIT_LONG_SHIFT);
3618 }
3619
3620 void rtl8192SU_update_ratr_table(struct net_device* dev)
3621 {
3622                 struct r8192_priv* priv = ieee80211_priv(dev);
3623         struct ieee80211_device* ieee = priv->ieee80211;
3624         u8* pMcsRate = ieee->dot11HTOperationalRateSet;
3625         //struct ieee80211_network *net = &ieee->current_network;
3626         u32 ratr_value = 0;
3627
3628         u8 rate_index = 0;
3629         int WirelessMode = ieee->mode;
3630         u8 MimoPs = ieee->pHTInfo->PeerMimoPs;
3631
3632         u8 bNMode = 0;
3633
3634         rtl8192_config_rate(dev, (u16*)(&ratr_value));
3635         ratr_value |= (*(u16*)(pMcsRate)) << 12;
3636
3637         //switch (ieee->mode)
3638         switch (WirelessMode)
3639         {
3640                 case IEEE_A:
3641                         ratr_value &= 0x00000FF0;
3642                         break;
3643                 case IEEE_B:
3644                         ratr_value &= 0x0000000D;
3645                         break;
3646                 case IEEE_G:
3647                         ratr_value &= 0x00000FF5;
3648                         break;
3649                 case IEEE_N_24G:
3650                 case IEEE_N_5G:
3651                 {
3652                         bNMode = 1;
3653
3654                         if (MimoPs == 0) //MIMO_PS_STATIC
3655                                         {
3656                                 ratr_value &= 0x0007F005;
3657                         }
3658                         else
3659                         {       // MCS rate only => for 11N mode.
3660                                 u32     ratr_mask;
3661
3662                                 // 1T2R or 1T1R, Spatial Stream 2 should be disabled
3663                                 if (    priv->rf_type == RF_1T2R ||
3664                                         priv->rf_type == RF_1T1R ||
3665                                         (ieee->pHTInfo->IOTAction & HT_IOT_ACT_DISABLE_TX_2SS) )
3666                                                 ratr_mask = 0x000ff005;
3667                                         else
3668                                                 ratr_mask = 0x0f0ff005;
3669
3670                                 if((ieee->pHTInfo->bCurTxBW40MHz) &&
3671                                     !(ieee->pHTInfo->IOTAction & HT_IOT_ACT_DISABLE_TX_40_MHZ))
3672                                         ratr_mask |= 0x00000010; // Set 6MBps
3673
3674                                 // Select rates for rate adaptive mechanism.
3675                                         ratr_value &= ratr_mask;
3676                                         }
3677                         }
3678                         break;
3679                 default:
3680                         if(0)
3681                         {
3682                                 if(priv->rf_type == RF_1T2R)    // 1T2R, Spatial Stream 2 should be disabled
3683                                 {
3684                                 ratr_value &= 0x000ff0f5;
3685                                 }
3686                                 else
3687                                 {
3688                                 ratr_value &= 0x0f0ff0f5;
3689                                 }
3690                         }
3691                         //printk("====>%s(), mode is not correct:%x\n", __FUNCTION__, ieee->mode);
3692                         break;
3693         }
3694
3695         ratr_value &= 0x0FFFFFFF;
3696
3697         // Get MAX MCS available.
3698         if (   (bNMode && ((ieee->pHTInfo->IOTAction & HT_IOT_ACT_DISABLE_SHORT_GI)==0)) &&
3699                 ((ieee->pHTInfo->bCurBW40MHz && ieee->pHTInfo->bCurShortGI40MHz) ||
3700                 (!ieee->pHTInfo->bCurBW40MHz && ieee->pHTInfo->bCurShortGI20MHz)))
3701         {
3702                 u8 shortGI_rate = 0;
3703                 u32 tmp_ratr_value = 0;
3704                 ratr_value |= 0x10000000;//???
3705                 tmp_ratr_value = (ratr_value>>12);
3706                 for(shortGI_rate=15; shortGI_rate>0; shortGI_rate--)
3707                 {
3708                         if((1<<shortGI_rate) & tmp_ratr_value)
3709                                 break;
3710                 }
3711                 shortGI_rate = (shortGI_rate<<12)|(shortGI_rate<<8)|(shortGI_rate<<4)|(shortGI_rate);
3712                 write_nic_byte(dev, SG_RATE, shortGI_rate);
3713                 //printk("==>SG_RATE:%x\n", read_nic_byte(dev, SG_RATE));
3714         }
3715         write_nic_dword(dev, ARFR0+rate_index*4, ratr_value);
3716         printk("=============>ARFR0+rate_index*4:%#x\n", ratr_value);
3717
3718         //2 UFWP
3719         if (ratr_value & 0xfffff000){
3720                 //printk("===>set to N mode\n");
3721                 HalSetFwCmd8192S(dev, FW_CMD_RA_REFRESH_N);
3722         }
3723         else    {
3724                 //printk("===>set to B/G mode\n");
3725                 HalSetFwCmd8192S(dev, FW_CMD_RA_REFRESH_BG);
3726         }
3727 }
3728
3729 void rtl8192SU_link_change(struct net_device *dev)
3730 {
3731         struct r8192_priv *priv = ieee80211_priv(dev);
3732         struct ieee80211_device* ieee = priv->ieee80211;
3733         //unsigned long flags;
3734         u32 reg = 0;
3735
3736         printk("=====>%s 1\n", __func__);
3737         reg = read_nic_dword(dev, RCR);
3738
3739         if (ieee->state == IEEE80211_LINKED)
3740         {
3741
3742                 rtl8192SU_net_update(dev);
3743                 rtl8192SU_update_ratr_table(dev);
3744                 ieee->SetFwCmdHandler(dev, FW_CMD_HIGH_PWR_ENABLE);
3745                 priv->ReceiveConfig = reg |= RCR_CBSSID;
3746
3747         }else{
3748                 priv->ReceiveConfig = reg &= ~RCR_CBSSID;
3749
3750         }
3751
3752         write_nic_dword(dev, RCR, reg);
3753         rtl8192_update_msr(dev);
3754
3755         printk("<=====%s 2\n", __func__);
3756 }
3757 #else
3758 extern void rtl8192_update_ratr_table(struct net_device* dev);
3759 void rtl8192_link_change(struct net_device *dev)
3760 {
3761 //      int i;
3762
3763         struct r8192_priv *priv = ieee80211_priv(dev);
3764         struct ieee80211_device* ieee = priv->ieee80211;
3765         //write_nic_word(dev, BCN_INTR_ITV, net->beacon_interval);
3766         if (ieee->state == IEEE80211_LINKED)
3767         {
3768                 rtl8192_net_update(dev);
3769                 rtl8192_update_ratr_table(dev);
3770 #if 1
3771                 //add this as in pure N mode, wep encryption will use software way, but there is no chance to set this as wep will not set group key in wext. WB.2008.07.08
3772                 if ((KEY_TYPE_WEP40 == ieee->pairwise_key_type) || (KEY_TYPE_WEP104 == ieee->pairwise_key_type))
3773                 EnableHWSecurityConfig8192(dev);
3774 #endif
3775         }
3776         /*update timing params*/
3777 //      RT_TRACE(COMP_CH, "========>%s(), chan:%d\n", __FUNCTION__, priv->chan);
3778 //      rtl8192_set_chan(dev, priv->chan);
3779          if (ieee->iw_mode == IW_MODE_INFRA || ieee->iw_mode == IW_MODE_ADHOC)
3780         {
3781                 u32 reg = 0;
3782                 reg = read_nic_dword(dev, RCR);
3783                 if (priv->ieee80211->state == IEEE80211_LINKED)
3784                         priv->ReceiveConfig = reg |= RCR_CBSSID;
3785                 else
3786                         priv->ReceiveConfig = reg &= ~RCR_CBSSID;
3787                 write_nic_dword(dev, RCR, reg);
3788         }
3789
3790 //      rtl8192_set_rxconf(dev);
3791 }
3792 #endif
3793
3794 static struct ieee80211_qos_parameters def_qos_parameters = {
3795         {3,3,3,3},/* cw_min */
3796         {7,7,7,7},/* cw_max */
3797         {2,2,2,2},/* aifs */
3798         {0,0,0,0},/* flags */
3799         {0,0,0,0} /* tx_op_limit */
3800 };
3801
3802
3803 void rtl8192_update_beacon(struct work_struct * work)
3804 {
3805         struct r8192_priv *priv = container_of(work, struct r8192_priv, update_beacon_wq.work);
3806         struct net_device *dev = priv->ieee80211->dev;
3807         struct ieee80211_device* ieee = priv->ieee80211;
3808         struct ieee80211_network* net = &ieee->current_network;
3809
3810         if (ieee->pHTInfo->bCurrentHTSupport)
3811                 HTUpdateSelfAndPeerSetting(ieee, net);
3812         ieee->pHTInfo->bCurrentRT2RTLongSlotTime = net->bssht.bdRT2RTLongSlotTime;
3813         // Joseph test for turbo mode with AP
3814         ieee->pHTInfo->RT2RT_HT_Mode = net->bssht.RT2RT_HT_Mode;
3815         rtl8192_update_cap(dev, net->capability);
3816 }
3817 /*
3818 * background support to run QoS activate functionality
3819 */
3820 int WDCAPARA_ADD[] = {EDCAPARA_BE,EDCAPARA_BK,EDCAPARA_VI,EDCAPARA_VO};
3821
3822 void rtl8192_qos_activate(struct work_struct * work)
3823 {
3824         struct r8192_priv *priv = container_of(work, struct r8192_priv, qos_activate);
3825         struct net_device *dev = priv->ieee80211->dev;
3826         struct ieee80211_qos_parameters *qos_parameters = &priv->ieee80211->current_network.qos_data.parameters;
3827         u8 mode = priv->ieee80211->current_network.mode;
3828         //u32 size = sizeof(struct ieee80211_qos_parameters);
3829         u8  u1bAIFS;
3830         u32 u4bAcParam;
3831         int i;
3832
3833         if (priv == NULL)
3834                 return;
3835
3836        mutex_lock(&priv->mutex);
3837
3838         if(priv->ieee80211->state != IEEE80211_LINKED)
3839                 goto success;
3840         RT_TRACE(COMP_QOS,"qos active process with associate response received\n");
3841         /* It better set slot time at first */
3842         /* For we just support b/g mode at present, let the slot time at 9/20 selection */
3843         /* update the ac parameter to related registers */
3844         for(i = 0; i <  QOS_QUEUE_NUM; i++) {
3845                 //Mode G/A: slotTimeTimer = 9; Mode B: 20
3846                 u1bAIFS = qos_parameters->aifs[i] * ((mode&(IEEE_G|IEEE_N_24G)) ?9:20) + aSifsTime;
3847                 u4bAcParam = ((((u32)(qos_parameters->tx_op_limit[i]))<< AC_PARAM_TXOP_LIMIT_OFFSET)|
3848                                 (((u32)(qos_parameters->cw_max[i]))<< AC_PARAM_ECW_MAX_OFFSET)|
3849                                 (((u32)(qos_parameters->cw_min[i]))<< AC_PARAM_ECW_MIN_OFFSET)|
3850                                 ((u32)u1bAIFS << AC_PARAM_AIFS_OFFSET));
3851
3852                 write_nic_dword(dev, WDCAPARA_ADD[i], u4bAcParam);
3853                 //write_nic_dword(dev, WDCAPARA_ADD[i], 0x005e4322);
3854         }
3855
3856 success:
3857        mutex_unlock(&priv->mutex);
3858 }
3859
3860 static int rtl8192_qos_handle_probe_response(struct r8192_priv *priv,
3861                 int active_network,
3862                 struct ieee80211_network *network)
3863 {
3864         int ret = 0;
3865         u32 size = sizeof(struct ieee80211_qos_parameters);
3866
3867         if(priv->ieee80211->state !=IEEE80211_LINKED)
3868                 return ret;
3869
3870         if ((priv->ieee80211->iw_mode != IW_MODE_INFRA))
3871                 return ret;
3872
3873         if (network->flags & NETWORK_HAS_QOS_MASK) {
3874                 if (active_network &&
3875                                 (network->flags & NETWORK_HAS_QOS_PARAMETERS))
3876                         network->qos_data.active = network->qos_data.supported;
3877
3878                 if ((network->qos_data.active == 1) && (active_network == 1) &&
3879                                 (network->flags & NETWORK_HAS_QOS_PARAMETERS) &&
3880                                 (network->qos_data.old_param_count !=
3881                                  network->qos_data.param_count)) {
3882                         network->qos_data.old_param_count =
3883                                 network->qos_data.param_count;
3884                         queue_work(priv->priv_wq, &priv->qos_activate);
3885                         RT_TRACE (COMP_QOS, "QoS parameters change call "
3886                                         "qos_activate\n");
3887                 }
3888         } else {
3889                 memcpy(&priv->ieee80211->current_network.qos_data.parameters,\
3890                        &def_qos_parameters, size);
3891
3892                 if ((network->qos_data.active == 1) && (active_network == 1)) {
3893                         queue_work(priv->priv_wq, &priv->qos_activate);
3894                         RT_TRACE(COMP_QOS, "QoS was disabled call qos_activate \n");
3895                 }
3896                 network->qos_data.active = 0;
3897                 network->qos_data.supported = 0;
3898         }
3899
3900         return 0;
3901 }
3902
3903 /* handle manage frame frame beacon and probe response */
3904 static int rtl8192_handle_beacon(struct net_device * dev,
3905                               struct ieee80211_beacon * beacon,
3906                               struct ieee80211_network * network)
3907 {
3908         struct r8192_priv *priv = ieee80211_priv(dev);
3909
3910         rtl8192_qos_handle_probe_response(priv,1,network);
3911         queue_delayed_work(priv->priv_wq, &priv->update_beacon_wq, 0);
3912
3913         return 0;
3914
3915 }
3916
3917 /*
3918 * handling the beaconing responses. if we get different QoS setting
3919 * off the network from the associated setting, adjust the QoS
3920 * setting
3921 */
3922 static int rtl8192_qos_association_resp(struct r8192_priv *priv,
3923                                     struct ieee80211_network *network)
3924 {
3925         int ret = 0;
3926         unsigned long flags;
3927         u32 size = sizeof(struct ieee80211_qos_parameters);
3928         int set_qos_param = 0;
3929
3930         if ((priv == NULL) || (network == NULL))
3931                 return ret;
3932
3933         if(priv->ieee80211->state !=IEEE80211_LINKED)
3934                 return ret;
3935
3936         if ((priv->ieee80211->iw_mode != IW_MODE_INFRA))
3937                 return ret;
3938
3939         spin_lock_irqsave(&priv->ieee80211->lock, flags);
3940         if(network->flags & NETWORK_HAS_QOS_PARAMETERS) {
3941                 memcpy(&priv->ieee80211->current_network.qos_data.parameters,\
3942                          &network->qos_data.parameters,\
3943                         sizeof(struct ieee80211_qos_parameters));
3944                 priv->ieee80211->current_network.qos_data.active = 1;
3945 #if 0
3946                 if((priv->ieee80211->current_network.qos_data.param_count != \
3947                                         network->qos_data.param_count))
3948 #endif
3949                  {
3950                         set_qos_param = 1;
3951                         /* update qos parameter for current network */
3952                         priv->ieee80211->current_network.qos_data.old_param_count = \
3953                                  priv->ieee80211->current_network.qos_data.param_count;
3954                         priv->ieee80211->current_network.qos_data.param_count = \
3955                                  network->qos_data.param_count;
3956                 }
3957         } else {
3958                 memcpy(&priv->ieee80211->current_network.qos_data.parameters,\
3959                        &def_qos_parameters, size);
3960                 priv->ieee80211->current_network.qos_data.active = 0;
3961                 priv->ieee80211->current_network.qos_data.supported = 0;
3962                 set_qos_param = 1;
3963         }
3964
3965         spin_unlock_irqrestore(&priv->ieee80211->lock, flags);
3966
3967         RT_TRACE(COMP_QOS, "%s: network->flags = %d,%d\n",__FUNCTION__,network->flags ,priv->ieee80211->current_network.qos_data.active);
3968         if (set_qos_param == 1)
3969                 queue_work(priv->priv_wq, &priv->qos_activate);
3970
3971         return ret;
3972 }
3973
3974
3975 static int rtl8192_handle_assoc_response(struct net_device *dev,
3976                                      struct ieee80211_assoc_response_frame *resp,
3977                                      struct ieee80211_network *network)
3978 {
3979         struct r8192_priv *priv = ieee80211_priv(dev);
3980         rtl8192_qos_association_resp(priv, network);
3981         return 0;
3982 }
3983
3984
3985 void rtl8192_update_ratr_table(struct net_device* dev)
3986         //      POCTET_STRING   posLegacyRate,
3987         //      u8*                     pMcsRate)
3988         //      PRT_WLAN_STA    pEntry)
3989 {
3990         struct r8192_priv* priv = ieee80211_priv(dev);
3991         struct ieee80211_device* ieee = priv->ieee80211;
3992         u8* pMcsRate = ieee->dot11HTOperationalRateSet;
3993         //struct ieee80211_network *net = &ieee->current_network;
3994         u32 ratr_value = 0;
3995         u8 rate_index = 0;
3996         rtl8192_config_rate(dev, (u16*)(&ratr_value));
3997         ratr_value |= (*(u16*)(pMcsRate)) << 12;
3998 //      switch (net->mode)
3999         switch (ieee->mode)
4000         {
4001                 case IEEE_A:
4002                         ratr_value &= 0x00000FF0;
4003                         break;
4004                 case IEEE_B:
4005                         ratr_value &= 0x0000000F;
4006                         break;
4007                 case IEEE_G:
4008                         ratr_value &= 0x00000FF7;
4009                         break;
4010                 case IEEE_N_24G:
4011                 case IEEE_N_5G:
4012                         if (ieee->pHTInfo->PeerMimoPs == 0) //MIMO_PS_STATIC
4013                                 ratr_value &= 0x0007F007;
4014                         else{
4015                                 if (priv->rf_type == RF_1T2R)
4016                                         ratr_value &= 0x000FF007;
4017                                 else
4018                                         ratr_value &= 0x0F81F007;
4019                         }
4020                         break;
4021                 default:
4022                         break;
4023         }
4024         ratr_value &= 0x0FFFFFFF;
4025         if(ieee->pHTInfo->bCurTxBW40MHz && ieee->pHTInfo->bCurShortGI40MHz){
4026                 ratr_value |= 0x80000000;
4027         }else if(!ieee->pHTInfo->bCurTxBW40MHz && ieee->pHTInfo->bCurShortGI20MHz){
4028                 ratr_value |= 0x80000000;
4029         }
4030         write_nic_dword(dev, RATR0+rate_index*4, ratr_value);
4031         write_nic_byte(dev, UFWP, 1);
4032 }
4033
4034 static u8 ccmp_ie[4] = {0x00,0x50,0xf2,0x04};
4035 static u8 ccmp_rsn_ie[4] = {0x00, 0x0f, 0xac, 0x04};
4036 bool GetNmodeSupportBySecCfg8192(struct net_device*dev)
4037 {
4038 #if 1
4039         struct r8192_priv* priv = ieee80211_priv(dev);
4040         struct ieee80211_device* ieee = priv->ieee80211;
4041         struct ieee80211_network * network = &ieee->current_network;
4042         int wpa_ie_len= ieee->wpa_ie_len;
4043         struct ieee80211_crypt_data* crypt;
4044         int encrypt;
4045 #if (defined (RTL8192SU_FPGA_2MAC_VERIFICATION)||defined (RTL8192SU_ASIC_VERIFICATION))
4046         return TRUE;
4047 #endif
4048
4049         crypt = ieee->crypt[ieee->tx_keyidx];
4050         //we use connecting AP's capability instead of only security config on our driver to distinguish whether it should use N mode or G mode
4051         encrypt = (network->capability & WLAN_CAPABILITY_PRIVACY) || (ieee->host_encrypt && crypt && crypt->ops && (0 == strcmp(crypt->ops->name,"WEP")));
4052
4053         /* simply judge  */
4054         if(encrypt && (wpa_ie_len == 0)) {
4055                 /* wep encryption, no N mode setting */
4056                 return false;
4057 //      } else if((wpa_ie_len != 0)&&(memcmp(&(ieee->wpa_ie[14]),ccmp_ie,4))) {
4058         } else if((wpa_ie_len != 0)) {
4059                 /* parse pairwise key type */
4060                 //if((pairwisekey = WEP40)||(pairwisekey = WEP104)||(pairwisekey = TKIP))
4061                 if (((ieee->wpa_ie[0] == 0xdd) && (!memcmp(&(ieee->wpa_ie[14]),ccmp_ie,4))) || ((ieee->wpa_ie[0] == 0x30) && (!memcmp(&ieee->wpa_ie[10],ccmp_rsn_ie, 4))))
4062                         return true;
4063                 else
4064                         return false;
4065         } else {
4066                 return true;
4067         }
4068
4069 #if 0
4070         //In here we discuss with SD4 David. He think we still can send TKIP in broadcast group key in MCS rate.
4071         //We can't force in G mode if Pairwie key is AES and group key is TKIP
4072         if((pSecInfo->GroupEncAlgorithm == WEP104_Encryption) || (pSecInfo->GroupEncAlgorithm == WEP40_Encryption)  ||
4073            (pSecInfo->PairwiseEncAlgorithm == WEP104_Encryption) ||
4074            (pSecInfo->PairwiseEncAlgorithm == WEP40_Encryption) || (pSecInfo->PairwiseEncAlgorithm == TKIP_Encryption))
4075         {
4076                 return  false;
4077         }
4078         else
4079                 return true;
4080 #endif
4081         return true;
4082 #endif
4083 }
4084
4085 bool GetHalfNmodeSupportByAPs819xUsb(struct net_device* dev)
4086 {
4087         bool                    Reval;
4088         struct r8192_priv* priv = ieee80211_priv(dev);
4089         struct ieee80211_device* ieee = priv->ieee80211;
4090
4091 //      Added by Roger, 2008.08.29.
4092 #ifdef RTL8192SU
4093         return false;
4094 #endif
4095
4096         if(ieee->bHalfWirelessN24GMode == true)
4097                 Reval = true;
4098         else
4099                 Reval =  false;
4100
4101         return Reval;
4102 }
4103
4104 void rtl8192_refresh_supportrate(struct r8192_priv* priv)
4105 {
4106         struct ieee80211_device* ieee = priv->ieee80211;
4107         //we donot consider set support rate for ABG mode, only HT MCS rate is set here.
4108         if (ieee->mode == WIRELESS_MODE_N_24G || ieee->mode == WIRELESS_MODE_N_5G)
4109         {
4110                 memcpy(ieee->Regdot11HTOperationalRateSet, ieee->RegHTSuppRateSet, 16);
4111                 //RT_DEBUG_DATA(COMP_INIT, ieee->RegHTSuppRateSet, 16);
4112                 //RT_DEBUG_DATA(COMP_INIT, ieee->Regdot11HTOperationalRateSet, 16);
4113         }
4114         else
4115                 memset(ieee->Regdot11HTOperationalRateSet, 0, 16);
4116         return;
4117 }
4118
4119 u8 rtl8192_getSupportedWireleeMode(struct net_device*dev)
4120 {
4121         struct r8192_priv *priv = ieee80211_priv(dev);
4122         u8 ret = 0;
4123         switch(priv->rf_chip)
4124         {
4125                 case RF_8225:
4126                 case RF_8256:
4127                 case RF_PSEUDO_11N:
4128                 case RF_6052:
4129                         ret = (WIRELESS_MODE_N_24G|WIRELESS_MODE_G|WIRELESS_MODE_B);
4130                         break;
4131                 case RF_8258:
4132                         ret = (WIRELESS_MODE_A|WIRELESS_MODE_N_5G);
4133                         break;
4134                 default:
4135                         ret = WIRELESS_MODE_B;
4136                         break;
4137         }
4138         return ret;
4139 }
4140 void rtl8192_SetWirelessMode(struct net_device* dev, u8 wireless_mode)
4141 {
4142         struct r8192_priv *priv = ieee80211_priv(dev);
4143         u8 bSupportMode = rtl8192_getSupportedWireleeMode(dev);
4144
4145 #if 1
4146         if ((wireless_mode == WIRELESS_MODE_AUTO) || ((wireless_mode&bSupportMode)==0))
4147         {
4148                 if(bSupportMode & WIRELESS_MODE_N_24G)
4149                 {
4150                         wireless_mode = WIRELESS_MODE_N_24G;
4151                 }
4152                 else if(bSupportMode & WIRELESS_MODE_N_5G)
4153                 {
4154                         wireless_mode = WIRELESS_MODE_N_5G;
4155                 }
4156                 else if((bSupportMode & WIRELESS_MODE_A))
4157                 {
4158                         wireless_mode = WIRELESS_MODE_A;
4159                 }
4160                 else if((bSupportMode & WIRELESS_MODE_G))
4161                 {
4162                         wireless_mode = WIRELESS_MODE_G;
4163                 }
4164                 else if((bSupportMode & WIRELESS_MODE_B))
4165                 {
4166                         wireless_mode = WIRELESS_MODE_B;
4167                 }
4168                 else{
4169                         RT_TRACE(COMP_ERR, "%s(), No valid wireless mode supported, SupportedWirelessMode(%x)!!!\n", __FUNCTION__,bSupportMode);
4170                         wireless_mode = WIRELESS_MODE_B;
4171                 }
4172         }
4173 #ifdef TO_DO_LIST //// TODO: this function doesn't work well at this time, we shoud wait for FPGA
4174         ActUpdateChannelAccessSetting( pAdapter, pHalData->CurrentWirelessMode, &pAdapter->MgntInfo.Info8185.ChannelAccessSetting );
4175 #endif
4176 #ifdef RTL8192SU
4177         //LZM 090306 usb crash here, mark it temp
4178         //write_nic_word(dev, SIFS_OFDM, 0x0e0e);
4179 #endif
4180         priv->ieee80211->mode = wireless_mode;
4181
4182         if ((wireless_mode == WIRELESS_MODE_N_24G) ||  (wireless_mode == WIRELESS_MODE_N_5G))
4183                 priv->ieee80211->pHTInfo->bEnableHT = 1;
4184         else
4185                 priv->ieee80211->pHTInfo->bEnableHT = 0;
4186         RT_TRACE(COMP_INIT, "Current Wireless Mode is %x\n", wireless_mode);
4187         rtl8192_refresh_supportrate(priv);
4188 #endif
4189
4190 }
4191
4192
4193 short rtl8192_is_tx_queue_empty(struct net_device *dev)
4194 {
4195         int i=0;
4196         struct r8192_priv *priv = ieee80211_priv(dev);
4197         //struct ieee80211_device* ieee = priv->ieee80211;
4198         for (i=0; i<=MGNT_QUEUE; i++)
4199         {
4200                 if ((i== TXCMD_QUEUE) || (i == HCCA_QUEUE) )
4201                         continue;
4202                 if (atomic_read(&priv->tx_pending[i]))
4203                 {
4204                         printk("===>tx queue is not empty:%d, %d\n", i, atomic_read(&priv->tx_pending[i]));
4205                         return 0;
4206                 }
4207         }
4208         return 1;
4209 }
4210 #if 0
4211 void rtl8192_rq_tx_ack(struct net_device *dev)
4212 {
4213         struct r8192_priv *priv = ieee80211_priv(dev);
4214         priv->ieee80211->ack_tx_to_ieee = 1;
4215 }
4216 #endif
4217 void rtl8192_hw_sleep_down(struct net_device *dev)
4218 {
4219         RT_TRACE(COMP_POWER, "%s()============>come to sleep down\n", __FUNCTION__);
4220 #ifdef TODO
4221 //      MgntActSet_RF_State(dev, eRfSleep, RF_CHANGE_BY_PS);
4222 #endif
4223 }
4224
4225 void rtl8192_hw_sleep_wq (struct work_struct *work)
4226 {
4227 //      struct r8180_priv *priv = container_of(work, struct r8180_priv, watch_dog_wq);
4228 //      struct ieee80211_device * ieee = (struct ieee80211_device*)
4229 //                                             container_of(work, struct ieee80211_device, watch_dog_wq);
4230         struct delayed_work *dwork = container_of(work,struct delayed_work,work);
4231         struct ieee80211_device *ieee = container_of(dwork,struct ieee80211_device,hw_sleep_wq);
4232         struct net_device *dev = ieee->dev;
4233
4234         //printk("=========>%s()\n", __FUNCTION__);
4235         rtl8192_hw_sleep_down(dev);
4236 }
4237 //      printk("dev is %d\n",dev);
4238 //      printk("&*&(^*(&(&=========>%s()\n", __FUNCTION__);
4239 void rtl8192_hw_wakeup(struct net_device* dev)
4240 {
4241 //      u32 flags = 0;
4242
4243 //      spin_lock_irqsave(&priv->ps_lock,flags);
4244         RT_TRACE(COMP_POWER, "%s()============>come to wake up\n", __FUNCTION__);
4245 #ifdef TODO
4246 //      MgntActSet_RF_State(dev, eRfSleep, RF_CHANGE_BY_PS);
4247 #endif
4248         //FIXME: will we send package stored while nic is sleep?
4249 //      spin_unlock_irqrestore(&priv->ps_lock,flags);
4250 }
4251
4252 void rtl8192_hw_wakeup_wq (struct work_struct *work)
4253 {
4254 //      struct r8180_priv *priv = container_of(work, struct r8180_priv, watch_dog_wq);
4255 //      struct ieee80211_device * ieee = (struct ieee80211_device*)
4256 //                                             container_of(work, struct ieee80211_device, watch_dog_wq);
4257         struct delayed_work *dwork = container_of(work,struct delayed_work,work);
4258         struct ieee80211_device *ieee = container_of(dwork,struct ieee80211_device,hw_wakeup_wq);
4259         struct net_device *dev = ieee->dev;
4260
4261         rtl8192_hw_wakeup(dev);
4262 }
4263
4264 #define MIN_SLEEP_TIME 50
4265 #define MAX_SLEEP_TIME 10000
4266 void rtl8192_hw_to_sleep(struct net_device *dev, u32 th, u32 tl)
4267 {
4268
4269         struct r8192_priv *priv = ieee80211_priv(dev);
4270
4271         u32 rb = jiffies;
4272         unsigned long flags;
4273
4274         spin_lock_irqsave(&priv->ps_lock,flags);
4275
4276         /* Writing HW register with 0 equals to disable
4277          * the timer, that is not really what we want
4278          */
4279         tl -= MSECS(4+16+7);
4280
4281         //if(tl == 0) tl = 1;
4282
4283         /* FIXME HACK FIXME HACK */
4284 //      force_pci_posting(dev);
4285         //mdelay(1);
4286
4287 //      rb = read_nic_dword(dev, TSFTR);
4288
4289         /* If the interval in witch we are requested to sleep is too
4290          * short then give up and remain awake
4291          */
4292         if(((tl>=rb)&& (tl-rb) <= MSECS(MIN_SLEEP_TIME))
4293                 ||((rb>tl)&& (rb-tl) < MSECS(MIN_SLEEP_TIME))) {
4294                 spin_unlock_irqrestore(&priv->ps_lock,flags);
4295                 printk("too short to sleep\n");
4296                 return;
4297         }
4298
4299 //      write_nic_dword(dev, TimerInt, tl);
4300 //      rb = read_nic_dword(dev, TSFTR);
4301         {
4302                 u32 tmp = (tl>rb)?(tl-rb):(rb-tl);
4303         //      if (tl<rb)
4304
4305                 queue_delayed_work(priv->ieee80211->wq, &priv->ieee80211->hw_wakeup_wq, tmp); //as tl may be less than rb
4306         }
4307         /* if we suspect the TimerInt is gone beyond tl
4308          * while setting it, then give up
4309          */
4310 #if 1
4311         if(((tl > rb) && ((tl-rb) > MSECS(MAX_SLEEP_TIME)))||
4312                 ((tl < rb) && ((rb-tl) > MSECS(MAX_SLEEP_TIME)))) {
4313                 printk("========>too long to sleep:%x, %x, %lx\n", tl, rb,  MSECS(MAX_SLEEP_TIME));
4314                 spin_unlock_irqrestore(&priv->ps_lock,flags);
4315                 return;
4316         }
4317 #endif
4318 //      if(priv->rf_sleep)
4319 //              priv->rf_sleep(dev);
4320
4321         //printk("<=========%s()\n", __FUNCTION__);
4322         queue_delayed_work(priv->ieee80211->wq, (void *)&priv->ieee80211->hw_sleep_wq,0);
4323
4324         spin_unlock_irqrestore(&priv->ps_lock,flags);
4325 }
4326 //init priv variables here. only non_zero value should be initialized here.
4327 static void rtl8192_init_priv_variable(struct net_device* dev)
4328 {
4329         struct r8192_priv *priv = ieee80211_priv(dev);
4330         u8 i;
4331         priv->card_8192 = NIC_8192U;
4332         priv->chan = 1; //set to channel 1
4333         priv->ieee80211->mode = WIRELESS_MODE_AUTO; //SET AUTO
4334         priv->ieee80211->iw_mode = IW_MODE_INFRA;
4335         priv->ieee80211->ieee_up=0;
4336         priv->retry_rts = DEFAULT_RETRY_RTS;
4337         priv->retry_data = DEFAULT_RETRY_DATA;
4338         priv->ieee80211->rts = DEFAULT_RTS_THRESHOLD;
4339         priv->ieee80211->rate = 110; //11 mbps
4340         priv->ieee80211->short_slot = 1;
4341         priv->promisc = (dev->flags & IFF_PROMISC) ? 1:0;
4342         priv->CckPwEnl = 6;
4343         //for silent reset
4344         priv->IrpPendingCount = 1;
4345         priv->ResetProgress = RESET_TYPE_NORESET;
4346         priv->bForcedSilentReset = 0;
4347         priv->bDisableNormalResetCheck = false;
4348         priv->force_reset = false;
4349
4350         priv->ieee80211->FwRWRF = 0;    //we don't use FW read/write RF until stable firmware is available.
4351         priv->ieee80211->current_network.beacon_interval = DEFAULT_BEACONINTERVAL;
4352         priv->ieee80211->iw_mode = IW_MODE_INFRA;
4353         priv->ieee80211->softmac_features  = IEEE_SOFTMAC_SCAN |
4354                 IEEE_SOFTMAC_ASSOCIATE | IEEE_SOFTMAC_PROBERQ |
4355                 IEEE_SOFTMAC_PROBERS | IEEE_SOFTMAC_TX_QUEUE |
4356                 IEEE_SOFTMAC_BEACONS;//added by amy 080604 //|  //IEEE_SOFTMAC_SINGLE_QUEUE;
4357
4358         priv->ieee80211->active_scan = 1;
4359         priv->ieee80211->modulation = IEEE80211_CCK_MODULATION | IEEE80211_OFDM_MODULATION;
4360         priv->ieee80211->host_encrypt = 1;
4361         priv->ieee80211->host_decrypt = 1;
4362         priv->ieee80211->start_send_beacons = NULL;//rtl819xusb_beacon_tx;//-by amy 080604
4363         priv->ieee80211->stop_send_beacons = NULL;//rtl8192_beacon_stop;//-by amy 080604
4364         priv->ieee80211->softmac_hard_start_xmit = rtl8192_hard_start_xmit;
4365         priv->ieee80211->set_chan = rtl8192_set_chan;
4366         priv->ieee80211->link_change = priv->ops->rtl819x_link_change;
4367         priv->ieee80211->softmac_data_hard_start_xmit = rtl8192_hard_data_xmit;
4368         priv->ieee80211->data_hard_stop = rtl8192_data_hard_stop;
4369         priv->ieee80211->data_hard_resume = rtl8192_data_hard_resume;
4370         priv->ieee80211->init_wmmparam_flag = 0;
4371         priv->ieee80211->fts = DEFAULT_FRAG_THRESHOLD;
4372         priv->ieee80211->check_nic_enough_desc = check_nic_enough_desc;
4373         priv->ieee80211->tx_headroom = TX_PACKET_SHIFT_BYTES;
4374         priv->ieee80211->qos_support = 1;
4375
4376         //added by WB
4377 //      priv->ieee80211->SwChnlByTimerHandler = rtl8192_phy_SwChnl;
4378         priv->ieee80211->SetBWModeHandler = rtl8192_SetBWMode;
4379         priv->ieee80211->handle_assoc_response = rtl8192_handle_assoc_response;
4380         priv->ieee80211->handle_beacon = rtl8192_handle_beacon;
4381         //for LPS
4382         priv->ieee80211->sta_wake_up = rtl8192_hw_wakeup;
4383 //      priv->ieee80211->ps_request_tx_ack = rtl8192_rq_tx_ack;
4384         priv->ieee80211->enter_sleep_state = rtl8192_hw_to_sleep;
4385         priv->ieee80211->ps_is_queue_empty = rtl8192_is_tx_queue_empty;
4386         //added by david
4387         priv->ieee80211->GetNmodeSupportBySecCfg = GetNmodeSupportBySecCfg8192;
4388         priv->ieee80211->GetHalfNmodeSupportByAPsHandler = GetHalfNmodeSupportByAPs819xUsb;
4389         priv->ieee80211->SetWirelessMode = rtl8192_SetWirelessMode;
4390         //added by amy
4391         priv->ieee80211->InitialGainHandler = priv->ops->rtl819x_initial_gain;
4392         priv->card_type = USB;
4393
4394 #ifdef RTL8192SU
4395 //1 RTL8192SU/
4396         priv->ieee80211->current_network.beacon_interval = DEFAULT_BEACONINTERVAL;
4397         priv->ieee80211->SetFwCmdHandler = HalSetFwCmd8192S;
4398         priv->bRFSiOrPi = 0;//o=si,1=pi;
4399         //lzm add
4400         priv->bInHctTest = false;
4401
4402         priv->MidHighPwrTHR_L1 = 0x3B;
4403         priv->MidHighPwrTHR_L2 = 0x40;
4404
4405         if(priv->bInHctTest)
4406         {
4407                 priv->ShortRetryLimit = HAL_RETRY_LIMIT_AP_ADHOC;
4408                 priv->LongRetryLimit = HAL_RETRY_LIMIT_AP_ADHOC;
4409         }
4410         else
4411         {
4412                 priv->ShortRetryLimit = HAL_RETRY_LIMIT_INFRA;
4413                 priv->LongRetryLimit = HAL_RETRY_LIMIT_INFRA;
4414         }
4415
4416         priv->SetFwCmdInProgress = false; //is set FW CMD in Progress? 92S only
4417         priv->CurrentFwCmdIO = 0;
4418
4419         priv->MinSpaceCfg = 0;
4420
4421         priv->EarlyRxThreshold = 7;
4422         priv->enable_gpio0 = 0;
4423         priv->TransmitConfig    =
4424                                 ((u32)TCR_MXDMA_2048<<TCR_MXDMA_OFFSET) |       // Max DMA Burst Size per Tx DMA Burst, 7: reservied.
4425                                 (priv->ShortRetryLimit<<TCR_SRL_OFFSET) |       // Short retry limit
4426                                 (priv->LongRetryLimit<<TCR_LRL_OFFSET) |        // Long retry limit
4427                                 (false ? TCR_SAT : 0);  // FALSE: HW provies PLCP length and LENGEXT, TURE: SW proiveds them
4428         if(priv->bInHctTest)
4429                 priv->ReceiveConfig     =       //priv->CSMethod |
4430                                                                 RCR_AMF | RCR_ADF |     //RCR_AAP |     //accept management/data
4431                                                                         RCR_ACF |RCR_APPFCS|                                            //accept control frame for SW AP needs PS-poll, 2005.07.07, by rcnjko.
4432                                                                 RCR_AB | RCR_AM | RCR_APM |             //accept BC/MC/UC
4433                                                                 RCR_AICV | RCR_ACRC32 |                 //accept ICV/CRC error packet
4434                                                                 RCR_APP_PHYST_STAFF | RCR_APP_PHYST_RXFF |      // Accept PHY status
4435                                                                 ((u32)7<<RCR_MXDMA_OFFSET) | // Max DMA Burst Size per Rx DMA Burst, 7: unlimited.
4436                                                                 (priv->EarlyRxThreshold<<RCR_FIFO_OFFSET) | // Rx FIFO Threshold, 7: No Rx threshold.
4437                                                                 (priv->EarlyRxThreshold == 7 ? RCR_OnlyErlPkt:0);
4438         else
4439                 priv->ReceiveConfig     =       //priv->CSMethod |
4440                                                                         RCR_AMF | RCR_ADF | RCR_AB |
4441                                                                         RCR_AM | RCR_APM |RCR_AAP |RCR_ADD3|RCR_APP_ICV|
4442                                                                 RCR_APP_PHYST_STAFF | RCR_APP_PHYST_RXFF |      // Accept PHY status
4443                                                                         RCR_APP_MIC | RCR_APPFCS;
4444
4445         // <Roger_EXP> 2008.06.16.
4446         priv->IntrMask          =       (u16)(IMR_ROK | IMR_VODOK | IMR_VIDOK | IMR_BEDOK | IMR_BKDOK |         \
4447                                                                 IMR_HCCADOK | IMR_MGNTDOK | IMR_COMDOK | IMR_HIGHDOK |                                  \
4448                                                                 IMR_BDOK | IMR_RXCMDOK | /*IMR_TIMEOUT0 |*/ IMR_RDU | IMR_RXFOVW        |                       \
4449                                                                 IMR_TXFOVW | IMR_BcnInt | IMR_TBDOK | IMR_TBDER);
4450
4451 //1 End
4452
4453 #else
4454
4455 #ifdef TO_DO_LIST
4456         if(Adapter->bInHctTest)
4457         {
4458                 pHalData->ShortRetryLimit = 7;
4459                 pHalData->LongRetryLimit = 7;
4460         }
4461 #endif
4462         {
4463                 priv->ShortRetryLimit = 0x30;
4464                 priv->LongRetryLimit = 0x30;
4465         }
4466         priv->EarlyRxThreshold = 7;
4467         priv->enable_gpio0 = 0;
4468         priv->TransmitConfig =
4469         //      TCR_DurProcMode |       //for RTL8185B, duration setting by HW
4470         //?     TCR_DISReqQsize |
4471                 (TCR_MXDMA_2048<<TCR_MXDMA_OFFSET)|  // Max DMA Burst Size per Tx DMA Burst, 7: reservied.
4472                 (priv->ShortRetryLimit<<TCR_SRL_OFFSET)|        // Short retry limit
4473                 (priv->LongRetryLimit<<TCR_LRL_OFFSET) |        // Long retry limit
4474                 (false ? TCR_SAT: 0);   // FALSE: HW provies PLCP length and LENGEXT, TURE: SW proiveds them
4475 #ifdef TO_DO_LIST
4476         if(Adapter->bInHctTest)
4477                 pHalData->ReceiveConfig =       pHalData->CSMethod |
4478                                                 RCR_AMF | RCR_ADF |     //RCR_AAP |     //accept management/data
4479                                                 //guangan200710
4480                                                 RCR_ACF |       //accept control frame for SW AP needs PS-poll, 2005.07.07, by rcnjko.
4481                                                 RCR_AB | RCR_AM | RCR_APM |             //accept BC/MC/UC
4482                                                 RCR_AICV | RCR_ACRC32 |                 //accept ICV/CRC error packet
4483                                                 ((u32)7<<RCR_MXDMA_OFFSET) | // Max DMA Burst Size per Rx DMA Burst, 7: unlimited.
4484                                                 (pHalData->EarlyRxThreshold<<RCR_FIFO_OFFSET) | // Rx FIFO Threshold, 7: No Rx threshold.
4485                                                 (pHalData->EarlyRxThreshold == 7 ? RCR_OnlyErlPkt:0);
4486         else
4487
4488 #endif
4489         priv->ReceiveConfig     =
4490                 RCR_AMF | RCR_ADF |             //accept management/data
4491                 RCR_ACF |                       //accept control frame for SW AP needs PS-poll, 2005.07.07, by rcnjko.
4492                 RCR_AB | RCR_AM | RCR_APM |     //accept BC/MC/UC
4493                 //RCR_AICV | RCR_ACRC32 |       //accept ICV/CRC error packet
4494                 ((u32)7<<RCR_MXDMA_OFFSET)| // Max DMA Burst Size per Rx DMA Burst, 7: unlimited.
4495                 (priv->EarlyRxThreshold<<RX_FIFO_THRESHOLD_SHIFT) | // Rx FIFO Threshold, 7: No Rx threshold.
4496                 (priv->EarlyRxThreshold == 7 ? RCR_ONLYERLPKT:0);
4497 #endif
4498
4499         priv->AcmControl = 0;
4500         priv->pFirmware = (rt_firmware*)vmalloc(sizeof(rt_firmware));
4501         if (priv->pFirmware)
4502         memset(priv->pFirmware, 0, sizeof(rt_firmware));
4503
4504         /* rx related queue */
4505         skb_queue_head_init(&priv->rx_queue);
4506         skb_queue_head_init(&priv->skb_queue);
4507
4508         /* Tx related queue */
4509         for(i = 0; i < MAX_QUEUE_SIZE; i++) {
4510                 skb_queue_head_init(&priv->ieee80211->skb_waitQ [i]);
4511         }
4512         for(i = 0; i < MAX_QUEUE_SIZE; i++) {
4513                 skb_queue_head_init(&priv->ieee80211->skb_aggQ [i]);
4514         }
4515         for(i = 0; i < MAX_QUEUE_SIZE; i++) {
4516                 skb_queue_head_init(&priv->ieee80211->skb_drv_aggQ [i]);
4517         }
4518         priv->rf_set_chan = rtl8192_phy_SwChnl;
4519 }
4520
4521 //init lock here
4522 static void rtl8192_init_priv_lock(struct r8192_priv* priv)
4523 {
4524         spin_lock_init(&priv->tx_lock);
4525         spin_lock_init(&priv->irq_lock);//added by thomas
4526         //spin_lock_init(&priv->rf_lock);//use rf_sem, or will crash in some OS.
4527         sema_init(&priv->wx_sem,1);
4528         sema_init(&priv->rf_sem,1);
4529         spin_lock_init(&priv->ps_lock);
4530         mutex_init(&priv->mutex);
4531 }
4532
4533 extern  void    rtl819x_watchdog_wqcallback(struct work_struct *work);
4534
4535 void rtl8192_irq_rx_tasklet(struct r8192_priv *priv);
4536 //init tasklet and wait_queue here. only 2.6 above kernel is considered
4537 #define DRV_NAME "wlan0"
4538 static void rtl8192_init_priv_task(struct net_device* dev)
4539 {
4540         struct r8192_priv *priv = ieee80211_priv(dev);
4541
4542 #ifdef PF_SYNCTHREAD
4543         priv->priv_wq = create_workqueue(DRV_NAME,0);
4544 #else
4545         priv->priv_wq = create_workqueue(DRV_NAME);
4546 #endif
4547
4548         INIT_WORK(&priv->reset_wq, rtl8192_restart);
4549
4550         //INIT_DELAYED_WORK(&priv->watch_dog_wq, hal_dm_watchdog);
4551         INIT_DELAYED_WORK(&priv->watch_dog_wq, rtl819x_watchdog_wqcallback);
4552         INIT_DELAYED_WORK(&priv->txpower_tracking_wq,  dm_txpower_trackingcallback);
4553 //      INIT_DELAYED_WORK(&priv->gpio_change_rf_wq,  dm_gpio_change_rf_callback);
4554         INIT_DELAYED_WORK(&priv->rfpath_check_wq,  dm_rf_pathcheck_workitemcallback);
4555         INIT_DELAYED_WORK(&priv->update_beacon_wq, rtl8192_update_beacon);
4556         INIT_DELAYED_WORK(&priv->initialgain_operate_wq, InitialGainOperateWorkItemCallBack);
4557         //INIT_WORK(&priv->SwChnlWorkItem,  rtl8192_SwChnl_WorkItem);
4558         //INIT_WORK(&priv->SetBWModeWorkItem,  rtl8192_SetBWModeWorkItem);
4559         INIT_WORK(&priv->qos_activate, rtl8192_qos_activate);
4560         INIT_DELAYED_WORK(&priv->ieee80211->hw_wakeup_wq,(void*) rtl8192_hw_wakeup_wq);
4561         INIT_DELAYED_WORK(&priv->ieee80211->hw_sleep_wq,(void*) rtl8192_hw_sleep_wq);
4562
4563         tasklet_init(&priv->irq_rx_tasklet,
4564              (void(*)(unsigned long))rtl8192_irq_rx_tasklet,
4565              (unsigned long)priv);
4566 }
4567
4568 static void rtl8192_get_eeprom_size(struct net_device* dev)
4569 {
4570         u16 curCR = 0;
4571         struct r8192_priv *priv = ieee80211_priv(dev);
4572         RT_TRACE(COMP_EPROM, "===========>%s()\n", __FUNCTION__);
4573         curCR = read_nic_word_E(dev,EPROM_CMD);
4574         RT_TRACE(COMP_EPROM, "read from Reg EPROM_CMD(%x):%x\n", EPROM_CMD, curCR);
4575         //whether need I consider BIT5?
4576         priv->epromtype = (curCR & Cmd9346CR_9356SEL) ? EPROM_93c56 : EPROM_93c46;
4577         RT_TRACE(COMP_EPROM, "<===========%s(), epromtype:%d\n", __FUNCTION__, priv->epromtype);
4578 }
4579
4580 //used to swap endian. as ntohl & htonl are not neccessary to swap endian, so use this instead.
4581 static inline u16 endian_swap(u16* data)
4582 {
4583         u16 tmp = *data;
4584         *data = (tmp >> 8) | (tmp << 8);
4585         return *data;
4586 }
4587
4588 #ifdef RTL8192SU
4589 u8 rtl8192SU_UsbOptionToEndPointNumber(u8 UsbOption)
4590 {
4591         u8      nEndPoint = 0;
4592         switch(UsbOption)
4593         {
4594                 case 0:
4595                         nEndPoint = 6;
4596                         break;
4597                 case 1:
4598                         nEndPoint = 11;
4599                         break;
4600                 case 2:
4601                         nEndPoint = 4;
4602                         break;
4603                 default:
4604                         RT_TRACE(COMP_INIT, "UsbOptionToEndPointNumber(): Invalid UsbOption(%#x)\n", UsbOption);
4605                         break;
4606         }
4607         return nEndPoint;
4608 }
4609
4610 u8 rtl8192SU_BoardTypeToRFtype(struct net_device* dev,  u8 Boardtype)
4611 {
4612         u8      RFtype = RF_1T2R;
4613
4614         switch(Boardtype)
4615         {
4616                 case 0:
4617                         RFtype = RF_1T1R;
4618                         break;
4619                 case 1:
4620                         RFtype = RF_1T2R;
4621                         break;
4622                 case 2:
4623                         RFtype = RF_2T2R;
4624                         break;
4625                 case 3:
4626                         RFtype = RF_2T2R_GREEN;
4627                         break;
4628                 default:
4629                         break;
4630         }
4631
4632         return RFtype;
4633 }
4634
4635 //
4636 //      Description:
4637 //              Config HW adapter information into initial value.
4638 //
4639 //      Assumption:
4640 //              1. After Auto load fail(i.e, check CR9346 fail)
4641 //
4642 //      Created by Roger, 2008.10.21.
4643 //
4644 void
4645 rtl8192SU_ConfigAdapterInfo8192SForAutoLoadFail(struct net_device* dev)
4646 {
4647         struct r8192_priv       *priv = ieee80211_priv(dev);
4648         //u16                   i,usValue;
4649         //u8 sMacAddr[6] = {0x00, 0xE0, 0x4C, 0x81, 0x92, 0x00};
4650         u8              rf_path, index; // For EEPROM/EFUSE After V0.6_1117
4651         int     i;
4652
4653         RT_TRACE(COMP_INIT, "====> ConfigAdapterInfo8192SForAutoLoadFail\n");
4654
4655         write_nic_byte(dev, SYS_ISO_CTRL+1, 0xE8); // Isolation signals from Loader
4656         //PlatformStallExecution(10000);
4657         mdelay(10);
4658         write_nic_byte(dev, PMC_FSM, 0x02); // Enable Loader Data Keep
4659
4660         //RT_ASSERT(priv->AutoloadFailFlag==TRUE, ("ReadAdapterInfo8192SEEPROM(): AutoloadFailFlag !=TRUE\n"));
4661
4662         // Initialize IC Version && Channel Plan
4663         priv->eeprom_vid = 0;
4664         priv->eeprom_pid = 0;
4665         priv->card_8192_version = 0;
4666         priv->eeprom_ChannelPlan = 0;
4667         priv->eeprom_CustomerID = 0;
4668         priv->eeprom_SubCustomerID = 0;
4669         priv->bIgnoreDiffRateTxPowerOffset = false;
4670
4671         RT_TRACE(COMP_INIT, "EEPROM VID = 0x%4x\n", priv->eeprom_vid);
4672         RT_TRACE(COMP_INIT, "EEPROM PID = 0x%4x\n", priv->eeprom_pid);
4673         RT_TRACE(COMP_INIT, "EEPROM Customer ID: 0x%2x\n", priv->eeprom_CustomerID);
4674         RT_TRACE(COMP_INIT, "EEPROM SubCustomer ID: 0x%2x\n", priv->eeprom_SubCustomerID);
4675         RT_TRACE(COMP_INIT, "EEPROM ChannelPlan = 0x%4x\n", priv->eeprom_ChannelPlan);
4676         RT_TRACE(COMP_INIT, "IgnoreDiffRateTxPowerOffset = %d\n", priv->bIgnoreDiffRateTxPowerOffset);
4677
4678
4679
4680         priv->EEPROMUsbOption = EEPROM_USB_Default_OPTIONAL_FUNC;
4681         RT_TRACE(COMP_INIT, "USB Option = %#x\n", priv->EEPROMUsbOption);
4682
4683         for(i=0; i<5; i++)
4684                 priv->EEPROMUsbPhyParam[i] = EEPROM_USB_Default_PHY_PARAM;
4685
4686         //RT_PRINT_DATA(COMP_INIT|COMP_EFUSE, DBG_LOUD, ("EFUSE USB PHY Param: \n"), priv->EEPROMUsbPhyParam, 5);
4687
4688         {
4689         //<Roger_Notes> In this case, we random assigh MAC address here. 2008.10.15.
4690                 static u8 sMacAddr[6] = {0x00, 0xE0, 0x4C, 0x81, 0x92, 0x00};
4691                 u8      i;
4692
4693                 //sMacAddr[5] = (u8)GetRandomNumber(1, 254);
4694
4695                 for(i = 0; i < 6; i++)
4696                         dev->dev_addr[i] = sMacAddr[i];
4697         }
4698         //NicIFSetMacAddress(Adapter, Adapter->PermanentAddress);
4699         write_nic_dword(dev, IDR0, ((u32*)dev->dev_addr)[0]);
4700         write_nic_word(dev, IDR4, ((u16*)(dev->dev_addr + 4))[0]);
4701
4702         RT_TRACE(COMP_INIT, "ReadAdapterInfo8192SEFuse(), Permanent Address = %02x-%02x-%02x-%02x-%02x-%02x\n",
4703                         dev->dev_addr[0], dev->dev_addr[1],
4704                         dev->dev_addr[2], dev->dev_addr[3],
4705                         dev->dev_addr[4], dev->dev_addr[5]);
4706
4707         priv->EEPROMBoardType = EEPROM_Default_BoardType;
4708         priv->rf_type = RF_1T2R; //RF_2T2R
4709         priv->EEPROMTxPowerDiff = EEPROM_Default_PwDiff;
4710         priv->EEPROMThermalMeter = EEPROM_Default_ThermalMeter;
4711         priv->EEPROMCrystalCap = EEPROM_Default_CrystalCap;
4712         priv->EEPROMTxPwrBase = EEPROM_Default_TxPowerBase;
4713         priv->EEPROMTSSI_A = EEPROM_Default_TSSI;
4714         priv->EEPROMTSSI_B = EEPROM_Default_TSSI;
4715         priv->EEPROMTxPwrTkMode = EEPROM_Default_TxPwrTkMode;
4716
4717
4718
4719         for (rf_path = 0; rf_path < 2; rf_path++)
4720         {
4721                 for (i = 0; i < 3; i++)
4722                 {
4723                         // Read CCK RF A & B Tx power
4724                         priv->RfCckChnlAreaTxPwr[rf_path][i] =
4725                         priv->RfOfdmChnlAreaTxPwr1T[rf_path][i] =
4726                         priv->RfOfdmChnlAreaTxPwr2T[rf_path][i] =
4727                         (u8)(EEPROM_Default_TxPower & 0xff);
4728                 }
4729         }
4730
4731         for (i = 0; i < 3; i++)
4732         {
4733                 //RT_TRACE((COMP_EFUSE), "CCK RF-%d CHan_Area-%d = 0x%x\n",  rf_path, i,
4734                 //priv->RfCckChnlAreaTxPwr[rf_path][i]);
4735                 //RT_TRACE((COMP_EFUSE), "OFDM-1T RF-%d CHan_Area-%d = 0x%x\n",  rf_path, i,
4736                 //priv->RfOfdmChnlAreaTxPwr1T[rf_path][i]);
4737                 //RT_TRACE((COMP_EFUSE), "OFDM-2T RF-%d CHan_Area-%d = 0x%x\n",  rf_path, i,
4738                 //priv->RfOfdmChnlAreaTxPwr2T[rf_path][i]);
4739         }
4740
4741         // Assign dedicated channel tx power
4742         for(i=0; i<14; i++)     // channel 1~3 use the same Tx Power Level.
4743                 {
4744                 if (i < 3)                      // Cjanel 1-3
4745                         index = 0;
4746                 else if (i < 9)         // Channel 4-9
4747                         index = 1;
4748                 else                            // Channel 10-14
4749                         index = 2;
4750
4751                 // Record A & B CCK /OFDM - 1T/2T Channel area tx power
4752                 priv->RfTxPwrLevelCck[rf_path][i]  =
4753                 priv->RfCckChnlAreaTxPwr[rf_path][index];
4754                 priv->RfTxPwrLevelOfdm1T[rf_path][i]  =
4755                 priv->RfOfdmChnlAreaTxPwr1T[rf_path][index];
4756                 priv->RfTxPwrLevelOfdm2T[rf_path][i]  =
4757                 priv->RfOfdmChnlAreaTxPwr2T[rf_path][index];
4758                 }
4759
4760                 for(i=0; i<14; i++)
4761                 {
4762                 //RT_TRACE((COMP_EFUSE), "Rf-%d TxPwr CH-%d CCK OFDM_1T OFDM_2T= 0x%x/0x%x/0x%x\n",
4763                 //rf_path, i, priv->RfTxPwrLevelCck[0][i],
4764                 //priv->RfTxPwrLevelOfdm1T[0][i] ,
4765                 //priv->RfTxPwrLevelOfdm2T[0][i] );
4766                 }
4767
4768         //
4769         // Update remained HAL variables.
4770         //
4771         priv->TSSI_13dBm = priv->EEPROMThermalMeter *100;
4772         priv->LegacyHTTxPowerDiff = priv->EEPROMTxPowerDiff;//new
4773         priv->TxPowerDiff = priv->EEPROMTxPowerDiff;
4774         //priv->AntennaTxPwDiff[0] = (priv->EEPROMTxPowerDiff & 0xf);// Antenna B gain offset to antenna A, bit0~3
4775         //priv->AntennaTxPwDiff[1] = ((priv->EEPROMTxPowerDiff & 0xf0)>>4);// Antenna C gain offset to antenna A, bit4~7
4776         priv->CrystalCap = priv->EEPROMCrystalCap;      // CrystalCap, bit12~15
4777         priv->ThermalMeter[0] = priv->EEPROMThermalMeter;// ThermalMeter, bit0~3 for RFIC1, bit4~7 for RFIC2
4778         priv->LedStrategy = SW_LED_MODE0;
4779
4780         init_rate_adaptive(dev);
4781
4782         RT_TRACE(COMP_INIT, "<==== ConfigAdapterInfo8192SForAutoLoadFail\n");
4783
4784 }
4785
4786 #if 0
4787 static void rtl8192SU_ReadAdapterInfo8192SEEPROM(struct net_device* dev)
4788 {
4789         u16                             EEPROMId = 0;
4790         u8                              bLoad_From_EEPOM = false;
4791         struct r8192_priv       *priv = ieee80211_priv(dev);
4792         u16                             tmpValue = 0;
4793         u8                              tmpBuffer[30];
4794         int i;
4795
4796         RT_TRACE(COMP_EPROM, "===========>%s()\n", __FUNCTION__);
4797
4798
4799         write_nic_byte(dev, SYS_ISO_CTRL+1, 0xE8); // Isolation signals from Loader
4800         udelay(10000);
4801         write_nic_byte(dev, PMC_FSM, 0x02); // Enable Loader Data Keep
4802
4803
4804         EEPROMId = eprom_read(dev, 0); //first read EEPROM ID out;
4805         RT_TRACE(COMP_EPROM, "EEPROM ID is 0x%x\n", EEPROMId);
4806
4807         if (EEPROMId != RTL8190_EEPROM_ID)
4808         {
4809                 priv->AutoloadFailFlag = true;
4810                 RT_TRACE(COMP_ERR, "EEPROM ID is invalid(is 0x%x(should be 0x%x)\n", EEPROMId, RTL8190_EEPROM_ID);
4811         }
4812         else
4813         {
4814                 priv->AutoloadFailFlag = false;
4815                 bLoad_From_EEPOM = true;
4816         }
4817
4818         if (bLoad_From_EEPOM)
4819         {
4820                 tmpValue = eprom_read(dev, (EEPROM_VID>>1));
4821                 priv->eeprom_vid = endian_swap(&tmpValue);
4822                 priv->eeprom_pid = eprom_read(dev, (EEPROM_PID>>1));
4823
4824                 // Version ID, Channel plan
4825                 tmpValue = eprom_read(dev, (EEPROM_Version>>1));
4826                 //pHalData->card_8192_version = (VERSION_8192S)((usValue&0x00ff));
4827                 priv->eeprom_ChannelPlan =(tmpValue&0xff00)>>8;
4828                 priv->bTXPowerDataReadFromEEPORM = true;
4829
4830                 // Customer ID, 0x00 and 0xff are reserved for Realtek.
4831                 tmpValue = eprom_read(dev, (u16)(EEPROM_CustomID>>1)) ;
4832                 priv->eeprom_CustomerID = (u8)( tmpValue & 0xff);
4833                 priv->eeprom_SubCustomerID = (u8)((tmpValue & 0xff00)>>8);
4834         }
4835         else
4836         {
4837                 priv->eeprom_vid = 0;
4838                 priv->eeprom_pid = 0;
4839                 //priv->card_8192_version = VERSION_8192SU_A;
4840                 priv->eeprom_ChannelPlan = 0;
4841                 priv->eeprom_CustomerID = 0;
4842                 priv->eeprom_SubCustomerID = 0;
4843         }
4844         RT_TRACE(COMP_EPROM, "vid:0x%4x, pid:0x%4x, CustomID:0x%2x, ChanPlan:0x%x\n", priv->eeprom_vid, priv->eeprom_pid, priv->eeprom_CustomerID, priv->eeprom_ChannelPlan);
4845         //set channelplan from eeprom
4846         priv->ChannelPlan = priv->eeprom_ChannelPlan;// FIXLZM
4847
4848         RT_TRACE(COMP_INIT, "EEPROMId = 0x%4x\n", EEPROMId);
4849         RT_TRACE(COMP_INIT, "EEPROM VID = 0x%4x\n", priv->eeprom_vid);
4850         RT_TRACE(COMP_INIT, "EEPROM PID = 0x%4x\n", priv->eeprom_pid);
4851         //RT_TRACE(COMP_INIT, DBG_LOUD, ("EEPROM Version ID: 0x%2x\n", pHalData->VersionID));
4852         RT_TRACE(COMP_INIT, "EEPROM Customer ID: 0x%2x\n", priv->eeprom_CustomerID);
4853         RT_TRACE(COMP_INIT, "EEPROM SubCustomer ID: 0x%2x\n", priv->eeprom_SubCustomerID);
4854         RT_TRACE(COMP_INIT, "EEPROM ChannelPlan = 0x%4x\n", priv->eeprom_ChannelPlan);
4855
4856         // Read USB optional function.
4857         if(bLoad_From_EEPOM)
4858         {
4859                 tmpValue = eprom_read(dev, (EEPROM_USB_OPTIONAL>>1));
4860                 priv->EEPROMUsbOption = (u8)(tmpValue&0xff);
4861         }
4862         else
4863         {
4864                 priv->EEPROMUsbOption = EEPROM_USB_Default_OPTIONAL_FUNC;
4865         }
4866
4867         RT_TRACE(COMP_INIT, "USB Option = %#x\n", priv->EEPROMUsbOption);
4868
4869
4870         if (bLoad_From_EEPOM)
4871         {
4872                 int i;
4873                 for (i=0; i<6; i+=2)
4874                 {
4875                         u16 tmp = 0;
4876                         tmp = eprom_read(dev, (u16)((EEPROM_NODE_ADDRESS_BYTE_0 + i)>>1));
4877                         *(u16*)(&dev->dev_addr[i]) = tmp;
4878                 }
4879         }
4880         else
4881         {
4882                 //<Roger_Notes> In this case, we random assigh MAC address here. 2008.10.15.
4883                 static u8 sMacAddr[6] = {0x00, 0xE0, 0x4C, 0x81, 0x92, 0x00};
4884                 u8      i;
4885
4886                 //sMacAddr[5] = (u8)GetRandomNumber(1, 254);
4887
4888                 for(i = 0; i < 6; i++)
4889                         dev->dev_addr[i] = sMacAddr[i];
4890
4891                 //memcpy(dev->dev_addr, sMacAddr, 6);
4892                 //should I set IDR0 here?
4893         }
4894         write_nic_dword(dev, IDR0, ((u32*)dev->dev_addr)[0]);
4895         write_nic_word(dev, IDR4, ((u16*)(dev->dev_addr + 4))[0]);
4896         RT_TRACE(COMP_EPROM, "MAC addr:"MAC_FMT"\n", MAC_ARG(dev->dev_addr));
4897
4898         priv->rf_type = RTL819X_DEFAULT_RF_TYPE; //default 1T2R
4899 #if (defined (RTL8192SU_FPGA_2MAC_VERIFICATION)||defined (RTL8192SU_ASIC_VERIFICATION))
4900         priv->rf_chip = RF_6052;
4901         priv->rf_type = RTL819X_DEFAULT_RF_TYPE;
4902         //priv->card_8192_version = VERSION_8192SU_A; //Over write for temporally experiment. 2008.10.16. By Roger.
4903 #else
4904         priv->rf_chip = RF_8256;
4905 #endif
4906
4907         {
4908 #if 0
4909                 if(bLoad_From_EEPOM)
4910                 {
4911                         tempval = (ReadEEprom(Adapter, (EEPROM_RFInd_PowerDiff>>1))) & 0xff;
4912                         if (tempval&0x80)       //RF-indication, bit[7]
4913                                 pHalData->RF_Type = RF_1T2R;
4914                         else
4915                                 pHalData->RF_Type = RF_2T4R;
4916                 }
4917 #endif
4918
4919                 priv->EEPROMTxPowerDiff = EEPROM_Default_TxPowerDiff;
4920                 RT_TRACE(COMP_INIT, "TxPowerDiff = %#x\n", priv->EEPROMTxPowerDiff);
4921
4922
4923                 //
4924                 // Read antenna tx power offset of B/C/D to A  from EEPROM
4925                 // and read ThermalMeter from EEPROM
4926                 //
4927                 if(bLoad_From_EEPOM)
4928                 {
4929                         tmpValue = eprom_read(dev, (EEPROM_PwDiff>>1));
4930                         priv->EEPROMPwDiff = tmpValue&0x00ff;
4931                         priv->EEPROMThermalMeter = (tmpValue&0xff00)>>8;
4932                 }
4933                 else
4934                 {
4935                         priv->EEPROMPwDiff = EEPROM_Default_PwDiff;
4936                         priv->EEPROMThermalMeter = EEPROM_Default_ThermalMeter;
4937                 }
4938                 RT_TRACE(COMP_INIT, "PwDiff = %#x\n", priv->EEPROMPwDiff);
4939                 RT_TRACE(COMP_INIT, "ThermalMeter = %#x\n", priv->EEPROMThermalMeter);
4940
4941                 priv->TSSI_13dBm = priv->EEPROMThermalMeter *100;
4942
4943
4944                 // Read CrystalCap from EEPROM
4945                 if(bLoad_From_EEPOM)
4946                 {
4947                         priv->EEPROMCrystalCap =(u8) (((eprom_read(dev, (EEPROM_CrystalCap>>1)))&0xf000)>>12);
4948                 }
4949                 else
4950                 {
4951                         priv->EEPROMCrystalCap = EEPROM_Default_CrystalCap;
4952                 }
4953                 RT_TRACE(COMP_INIT, "CrystalCap = %#x\n", priv->EEPROMCrystalCap);
4954
4955
4956                 //if(pHalData->EEPROM_Def_Ver == 0)     // old eeprom definition
4957                 {
4958
4959                         //
4960                         // Get Tx Power Base.//===>
4961                         //
4962                         if(bLoad_From_EEPOM)
4963                         {
4964                                 priv->EEPROMTxPwrBase =(u8) ((eprom_read(dev, (EEPROM_TxPowerBase>>1)))&0xff);
4965                         }
4966                         else
4967                         {
4968                                 priv->EEPROMTxPwrBase = EEPROM_Default_TxPowerBase;
4969                         }
4970
4971                         RT_TRACE(COMP_INIT, "TxPwrBase = %#x\n", priv->EEPROMTxPwrBase);
4972
4973                         //
4974                         // Get CustomerID(Boad Type)
4975                         // i.e., 0x0: RTL8188SU, 0x1: RTL8191SU, 0x2: RTL8192SU, 0x3: RTL8191GU.
4976                         // Others: Reserved. Default is 0x2: RTL8192SU.
4977                         //
4978                         if(bLoad_From_EEPOM)
4979                         {
4980                                 tmpValue = eprom_read(dev, (u16) (EEPROM_BoardType>>1));
4981                                 priv->EEPROMBoardType = (u8)(tmpValue&0xff);
4982                         }
4983                         else
4984                         {
4985                                 priv->EEPROMBoardType = EEPROM_Default_BoardType;
4986                         }
4987
4988                         RT_TRACE(COMP_INIT, "BoardType = %#x\n", priv->EEPROMBoardType);
4989
4990                         // Please add code in the section!!!!
4991                         // And merge tx power difference section.
4992
4993                         //
4994                         // Get TSSI value for each path.
4995                         //
4996                         if(bLoad_From_EEPOM)
4997                         {
4998                                 tmpValue = eprom_read(dev, (u16) ((EEPROM_TSSI_A)>>1));
4999                                 priv->EEPROMTSSI_A = (u8)((tmpValue&0xff00)>>8);
5000                         }
5001                         else
5002                         { // Default setting for Empty EEPROM
5003                                 priv->EEPROMTSSI_A = EEPROM_Default_TSSI;
5004                         }
5005
5006                         if(bLoad_From_EEPOM)
5007                         {
5008                                 tmpValue = eprom_read(dev, (u16) ((EEPROM_TSSI_B)>>1));
5009                                 priv->EEPROMTSSI_B = (u8)(tmpValue&0xff);
5010                                 priv->EEPROMTxPwrTkMode = (u8)((tmpValue&0xff00)>>8);
5011                         }
5012                         else
5013                         { // Default setting for Empty EEPROM
5014                                 priv->EEPROMTSSI_B = EEPROM_Default_TSSI;
5015                                 priv->EEPROMTxPwrTkMode = EEPROM_Default_TxPwrTkMode;
5016                         }
5017
5018                         RT_TRACE(COMP_INIT, "TSSI_A = %#x, TSSI_B = %#x\n", priv->EEPROMTSSI_A, priv->EEPROMTSSI_B);
5019                         RT_TRACE(COMP_INIT, "TxPwrTkMod = %#x\n", priv->EEPROMTxPwrTkMode);
5020
5021
5022                 }
5023
5024
5025                 priv->TxPowerDiff = priv->EEPROMPwDiff;
5026                 // Antenna B gain offset to antenna A, bit0~3
5027                 priv->AntennaTxPwDiff[0] = (priv->EEPROMTxPowerDiff & 0xf);
5028                 // Antenna C gain offset to antenna A, bit4~7
5029                 priv->AntennaTxPwDiff[1] = ((priv->EEPROMTxPowerDiff & 0xf0)>>4);
5030                 // CrystalCap, bit12~15
5031                 priv->CrystalCap = priv->EEPROMCrystalCap;
5032                 // ThermalMeter, bit0~3 for RFIC1, bit4~7 for RFIC2
5033                 // 92U does not enable TX power tracking.
5034                 priv->ThermalMeter[0] = priv->EEPROMThermalMeter;
5035         }
5036
5037         priv->LedStrategy = SW_LED_MODE0;
5038
5039         if(priv->rf_type == RF_1T2R)
5040         {
5041                 RT_TRACE(COMP_EPROM, "\n1T2R config\n");
5042         }
5043         else
5044         {
5045                 RT_TRACE(COMP_EPROM, "\n2T4R config\n");
5046         }
5047
5048         // 2008/01/16 MH We can only know RF type in the function. So we have to init
5049         // DIG RATR table again.
5050         init_rate_adaptive(dev);
5051         //we need init DIG RATR table here again.
5052
5053         RT_TRACE(COMP_EPROM, "<===========%s()\n", __FUNCTION__);
5054         return;
5055 }
5056
5057 //
5058 //      Description:
5059 //              1. Read HW adapter information by E-Fuse.
5060 //              2. Refered from SD1 Richard.
5061 //
5062 //      Assumption:
5063 //              1. Boot from E-Fuse and CR9346 regiser has verified.
5064 //              2. PASSIVE_LEVEL (USB interface)
5065 //
5066 //      Created by Roger, 2008.10.21.
5067 //
5068 void
5069 rtl8192SU_ReadAdapterInfo8192SEFuse(struct net_device* dev)
5070 {
5071         struct r8192_priv       *priv = ieee80211_priv(dev);
5072         u16                     i,usValue;
5073         u16                     EEPROMId;
5074         u8                      readbyte;
5075         u8                      OFDMTxPwr[14];
5076         u8                      CCKTxPwr[14];
5077         u8                      HT2T_TxPwr[6];
5078         u8                      UsbPhyParam[5];
5079         u8                      hwinfo[HWSET_MAX_SIZE_92S];
5080
5081
5082         RT_TRACE(COMP_INIT, "====> ReadAdapterInfo8192SEFuse\n");
5083
5084         //
5085         // <Roger_Notes> We set Isolation signals from Loader and reset EEPROM after system resuming
5086         // from suspend mode.
5087         // 2008.10.21.
5088         //
5089         write_nic_byte(dev, SYS_ISO_CTRL+1, 0xE8); // Isolation signals from Loader
5090         //PlatformStallExecution(10000);
5091         mdelay(10);
5092         write_nic_byte(dev, SYS_FUNC_EN+1, 0x40);
5093         write_nic_byte(dev, SYS_FUNC_EN+1, 0x50);
5094
5095         readbyte = read_nic_byte(dev, EFUSE_TEST+3);
5096         write_nic_byte(dev, EFUSE_TEST+3, (readbyte | 0x80));
5097         write_nic_byte(dev, EFUSE_TEST+3, 0x72);
5098         write_nic_byte(dev, EFUSE_CLK, 0x03);
5099
5100         //
5101         // Dump EFUSe at init time for later use
5102         //
5103         // Read EFUSE real map to shadow!!
5104         EFUSE_ShadowMapUpdate(dev);
5105
5106         memcpy(hwinfo, (void*)&priv->EfuseMap[EFUSE_INIT_MAP][0], HWSET_MAX_SIZE_92S);
5107         //RT_PRINT_DATA(COMP_INIT, DBG_LOUD, ("MAP \n"), hwinfo, HWSET_MAX_SIZE_92S);
5108
5109         //
5110         // <Roger_Notes> Event though CR9346 regiser can verify whether Autoload is success or not, but we still
5111         // double check ID codes for 92S here(e.g., due to HW GPIO polling fail issue).
5112         // 2008.10.21.
5113         //
5114         ReadEFuse(dev, 0, 2, (unsigned char*) &EEPROMId);
5115
5116         if( EEPROMId != RTL8190_EEPROM_ID )
5117         {
5118                 RT_TRACE(COMP_INIT, "EEPROM ID(%#x) is invalid!!\n", EEPROMId);
5119                 priv->AutoloadFailFlag=true;
5120         }
5121         else
5122         {
5123                 priv->AutoloadFailFlag=false;
5124         }
5125
5126        // Read IC Version && Channel Plan
5127         if(!priv->AutoloadFailFlag)
5128         {
5129
5130                 // VID, PID
5131                 ReadEFuse(dev, EEPROM_VID, 2, (unsigned char*) &priv->eeprom_vid);
5132                 ReadEFuse(dev, EEPROM_PID, 2, (unsigned char*) &priv->eeprom_pid);
5133
5134                 // Version ID, Channel plan
5135                 ReadEFuse(dev, EEPROM_Version, 2, (unsigned char*) &usValue);
5136                 //pHalData->VersionID = (VERSION_8192S)(usValue&0x00ff);
5137                 priv->eeprom_ChannelPlan = (usValue&0xff00>>8);
5138                 priv->bTXPowerDataReadFromEEPORM = true;
5139
5140                 // Customer ID, 0x00 and 0xff are reserved for Realtek.
5141                 ReadEFuse(dev, EEPROM_CustomID, 2, (unsigned char*) &usValue);
5142                 priv->eeprom_CustomerID = (u8)( usValue & 0xff);
5143                 priv->eeprom_SubCustomerID = (u8)((usValue & 0xff00)>>8);
5144         }
5145         else
5146         {
5147                 priv->eeprom_vid = 0;
5148                 priv->eeprom_pid = 0;
5149                 priv->eeprom_ChannelPlan = 0;
5150                 priv->eeprom_CustomerID = 0;
5151                 priv->eeprom_SubCustomerID = 0;
5152         }
5153
5154         RT_TRACE(COMP_INIT, "EEPROM Id = 0x%4x\n", EEPROMId);
5155         RT_TRACE(COMP_INIT, "EEPROM VID = 0x%4x\n", priv->eeprom_vid);
5156         RT_TRACE(COMP_INIT, "EEPROM PID = 0x%4x\n", priv->eeprom_pid);
5157         //RT_TRACE(COMP_INIT, DBG_LOUD, ("EEPROM Version ID: 0x%2x\n", pHalData->VersionID));
5158         RT_TRACE(COMP_INIT, "EEPROM Customer ID: 0x%2x\n", priv->eeprom_CustomerID);
5159         RT_TRACE(COMP_INIT, "EEPROM SubCustomer ID: 0x%2x\n", priv->eeprom_SubCustomerID);
5160         RT_TRACE(COMP_INIT, "EEPROM ChannelPlan = 0x%4x\n", priv->eeprom_ChannelPlan);
5161
5162
5163         // Read USB optional function.
5164         if(!priv->AutoloadFailFlag)
5165         {
5166                 ReadEFuse(dev, EEPROM_USB_OPTIONAL, 1, (unsigned char*) &priv->EEPROMUsbOption);
5167         }
5168         else
5169         {
5170                 priv->EEPROMUsbOption = EEPROM_USB_Default_OPTIONAL_FUNC;
5171         }
5172
5173         RT_TRACE(COMP_INIT, "USB Option = %#x\n", priv->EEPROMUsbOption);
5174
5175
5176         // Read USB PHY parameters.
5177         if(!priv->AutoloadFailFlag)
5178         {
5179                 ReadEFuse(dev, EEPROM_USB_PHY_PARA1, 5, (unsigned char*)UsbPhyParam);
5180                 for(i=0; i<5; i++)
5181                 {
5182                         priv->EEPROMUsbPhyParam[i] = UsbPhyParam[i];
5183                         RT_TRACE(COMP_INIT, "USB Param = index(%d) = %#x\n", i, priv->EEPROMUsbPhyParam[i]);
5184                 }
5185         }
5186         else
5187         {
5188                 for(i=0; i<5; i++)
5189                 {
5190                         priv->EEPROMUsbPhyParam[i] = EEPROM_USB_Default_PHY_PARAM;
5191                         RT_TRACE(COMP_INIT, "USB Param = index(%d) = %#x\n", i, priv->EEPROMUsbPhyParam[i]);
5192                 }
5193         }
5194
5195
5196        //Read Permanent MAC address
5197         if(!priv->AutoloadFailFlag)
5198         {
5199                 u8                      macaddr[6] = {0x00, 0xe1, 0x86, 0x4c, 0x92, 0x00};
5200
5201                 ReadEFuse(dev, EEPROM_NODE_ADDRESS_BYTE_0, 6, (unsigned char*)macaddr);
5202                 for(i=0; i<6; i++)
5203                         dev->dev_addr[i] = macaddr[i];
5204         }
5205         else
5206         {//Auto load fail
5207
5208                 //<Roger_Notes> In this case, we random assigh MAC address here. 2008.10.15.
5209                 static u8 sMacAddr[6] = {0x00, 0xE0, 0x4C, 0x81, 0x92, 0x00};
5210                 u8      i;
5211
5212                 //if(!Adapter->bInHctTest)
5213                     //sMacAddr[5] = (u8)GetRandomNumber(1, 254);
5214
5215                 for(i = 0; i < 6; i++)
5216                         dev->dev_addr[i] = sMacAddr[i];
5217         }
5218
5219         //NicIFSetMacAddress(Adapter, Adapter->PermanentAddress);
5220         write_nic_dword(dev, IDR0, ((u32*)dev->dev_addr)[0]);
5221         write_nic_word(dev, IDR4, ((u16*)(dev->dev_addr + 4))[0]);
5222
5223         RT_TRACE(COMP_INIT, "ReadAdapterInfo8192SEFuse(), Permanent Address = %02x-%02x-%02x-%02x-%02x-%02x\n",
5224                         dev->dev_addr[0], dev->dev_addr[1],
5225                         dev->dev_addr[2], dev->dev_addr[3],
5226                         dev->dev_addr[4], dev->dev_addr[5]);
5227
5228         // 2007/11/15 MH For RTL8192USB we assign as 1T2R now.
5229         priv->rf_type = RTL819X_DEFAULT_RF_TYPE;        // default : 1T2R
5230
5231 #if (defined (RTL8192SU_FPGA_2MAC_VERIFICATION)||defined (RTL8192SU_ASIC_VERIFICATION))
5232         priv->rf_chip = RF_6052;
5233         priv->rf_type = RTL819X_DEFAULT_RF_TYPE;
5234 #else
5235         priv->rf_chip = RF_8256;
5236 #endif
5237
5238         {
5239                 //
5240                 // Read antenna tx power offset of B/C/D to A  from EEPROM
5241                 // and read ThermalMeter from EEPROM
5242                 //
5243                 if(!priv->AutoloadFailFlag)
5244                 {
5245                         ReadEFuse(dev, EEPROM_PwDiff, 2, (unsigned char*) &usValue);
5246                         priv->EEPROMPwDiff = usValue&0x00ff;
5247                         priv->EEPROMThermalMeter = (usValue&0xff00)>>8;
5248                 }
5249                 else
5250                 {
5251                         priv->EEPROMPwDiff = EEPROM_Default_PwDiff;
5252                         priv->EEPROMThermalMeter = EEPROM_Default_ThermalMeter;
5253                 }
5254
5255                 RT_TRACE(COMP_INIT, "PwDiff = %#x\n", priv->EEPROMPwDiff);
5256                 RT_TRACE(COMP_INIT, "ThermalMeter = %#x\n", priv->EEPROMThermalMeter);
5257
5258                 priv->TSSI_13dBm = priv->EEPROMThermalMeter *100;
5259
5260                 //
5261                 // Read Tx Power gain offset of legacy OFDM to HT rate.
5262                 // Read CrystalCap from EEPROM
5263                 //
5264                 if(!priv->AutoloadFailFlag)
5265                 {
5266                         ReadEFuse(dev, EEPROM_CrystalCap, 1, (unsigned char*) &usValue);
5267                         priv->EEPROMCrystalCap = (u8)((usValue&0xf0)>>4);
5268                 }
5269                 else
5270                 {
5271                         priv->EEPROMCrystalCap = EEPROM_Default_CrystalCap;
5272                 }
5273
5274                 RT_TRACE(COMP_INIT, "CrystalCap = %#x\n", priv->EEPROMCrystalCap);
5275
5276                 priv->EEPROMTxPowerDiff = EEPROM_Default_TxPowerDiff;
5277                 RT_TRACE(COMP_INIT, "TxPowerDiff = %d\n", priv->EEPROMTxPowerDiff);
5278
5279
5280                 //
5281                 // Get Tx Power Base.
5282                 //
5283                 if(!priv->AutoloadFailFlag)
5284                 {
5285                         ReadEFuse(dev, EEPROM_TxPowerBase, 1, (unsigned char*) &priv->EEPROMTxPwrBase );
5286                 }
5287                 else
5288                 {
5289                         priv->EEPROMTxPwrBase = EEPROM_Default_TxPowerBase;
5290                 }
5291
5292                 RT_TRACE(COMP_INIT, "TxPwrBase = %#x\n", priv->EEPROMTxPwrBase);
5293
5294                 //
5295                 // Get CustomerID(Boad Type)
5296                 // i.e., 0x0: RTL8188SU, 0x1: RTL8191SU, 0x2: RTL8192SU, 0x3: RTL8191GU.
5297                 // Others: Reserved. Default is 0x2: RTL8192SU.
5298                 //
5299                 if(!priv->AutoloadFailFlag)
5300                 {
5301                         ReadEFuse(dev, EEPROM_BoardType, 1, (unsigned char*) &priv->EEPROMBoardType );
5302                 }
5303                 else
5304                 {
5305                         priv->EEPROMBoardType = EEPROM_Default_BoardType;
5306                 }
5307
5308                 RT_TRACE(COMP_INIT, "BoardType = %#x\n", priv->EEPROMBoardType);
5309
5310                 //if(pHalData->EEPROM_Def_Ver == 0)
5311                 {
5312                         // Please add code in the section!!!!
5313                         // And merge tx power difference section.
5314
5315                         //
5316                         // Get TSSI value for each path.
5317                         //
5318                         if(!priv->AutoloadFailFlag)
5319                         {
5320                                 ReadEFuse(dev, EEPROM_TSSI_A, 2, (unsigned char*)&usValue);
5321                                 priv->EEPROMTSSI_A = (u8)(usValue&0xff);
5322                                 priv->EEPROMTSSI_B = (u8)((usValue&0xff00)>>8);
5323                         }
5324                         else
5325                         { // Default setting for Empty EEPROM
5326                                 priv->EEPROMTSSI_A = EEPROM_Default_TSSI;
5327                                 priv->EEPROMTSSI_B = EEPROM_Default_TSSI;
5328                         }
5329
5330                         RT_TRACE(COMP_INIT, "TSSI_A = %#x, TSSI_B = %#x\n",
5331                                         priv->EEPROMTSSI_A, priv->EEPROMTSSI_B);
5332
5333                         //
5334                         // Get Tx Power tracking mode.
5335                         //
5336                         if(!priv->AutoloadFailFlag)
5337                         {
5338                                 ReadEFuse(dev, EEPROM_TxPwTkMode, 1, (unsigned char*)&priv->EEPROMTxPwrTkMode);
5339                         }
5340                         else
5341                         { // Default setting for Empty EEPROM
5342                                 priv->EEPROMTxPwrTkMode = EEPROM_Default_TxPwrTkMode;
5343                         }
5344
5345                         RT_TRACE(COMP_INIT, "TxPwrTkMod = %#x\n", priv->EEPROMTxPwrTkMode);
5346
5347
5348                         // TODO: The following HT 2T Path A and B Power Index should be updated.!! Added by Roger, 2008.20.23.
5349
5350                         //
5351                         // Get HT 2T Path A and B Power Index.
5352                         //
5353                         if(!priv->AutoloadFailFlag)
5354                         {
5355                                 ReadEFuse(dev, EEPROM_HT2T_CH1_A, 6, (unsigned char*)HT2T_TxPwr);
5356                                 for(i=0; i<6; i++)
5357                                 {
5358                                         priv->EEPROMHT2T_TxPwr[i] = HT2T_TxPwr[i];
5359                                 }
5360                         }
5361                         else
5362                         { // Default setting for Empty EEPROM
5363                                 for(i=0; i<6; i++)
5364                                 {
5365                                         priv->EEPROMHT2T_TxPwr[i] = EEPROM_Default_HT2T_TxPwr;
5366                                 }
5367                         }
5368
5369                         for(i=0; i<6; i++)
5370                         {
5371                                 RT_TRACE(COMP_INIT, "EEPROMHT2T_TxPwr, Index %d = 0x%02x\n",
5372                                                 i, priv->EEPROMHT2T_TxPwr[i]);
5373                         }
5374                 }
5375
5376
5377                 priv->TxPowerDiff = priv->EEPROMPwDiff;
5378                 // Antenna B gain offset to antenna A, bit0~3
5379                 priv->AntennaTxPwDiff[0] = (priv->EEPROMTxPowerDiff & 0xf);
5380                 // Antenna C gain offset to antenna A, bit4~7
5381                 priv->AntennaTxPwDiff[1] = ((priv->EEPROMTxPowerDiff & 0xf0)>>4);
5382                 // CrystalCap, bit12~15
5383                 priv->CrystalCap = priv->EEPROMCrystalCap;
5384                 // ThermalMeter, bit0~3 for RFIC1, bit4~7 for RFIC2
5385                 // 92U does not enable TX power tracking.
5386                 priv->ThermalMeter[0] = priv->EEPROMThermalMeter;
5387         }
5388
5389         priv->LedStrategy = SW_LED_MODE0;
5390
5391         init_rate_adaptive(dev);
5392
5393         RT_TRACE(COMP_INIT, "<==== ReadAdapterInfo8192SEFuse\n");
5394
5395 }
5396 #endif
5397
5398 //
5399 //      Description:
5400 //              Read HW adapter information by E-Fuse or EEPROM according CR9346 reported.
5401 //
5402 //      Assumption:
5403 //              1. CR9346 regiser has verified.
5404 //              2. PASSIVE_LEVEL (USB interface)
5405 //
5406 //      Created by Roger, 2008.10.21.
5407 //
5408 void
5409 rtl8192SU_ReadAdapterInfo8192SUsb(struct net_device* dev)
5410 {
5411         struct r8192_priv       *priv = ieee80211_priv(dev);
5412         u16                     i,usValue;
5413         u8                      tmpU1b, tempval;
5414         u16                     EEPROMId;
5415         u8                      hwinfo[HWSET_MAX_SIZE_92S];
5416         u8                      rf_path, index; // For EEPROM/EFUSE After V0.6_1117
5417
5418
5419         RT_TRACE(COMP_INIT, "====> ReadAdapterInfo8192SUsb\n");
5420
5421         //
5422         // <Roger_Note> The following operation are prevent Efuse leakage by turn on 2.5V.
5423         // 2008.11.25.
5424         //
5425         tmpU1b = read_nic_byte(dev, EFUSE_TEST+3);
5426         write_nic_byte(dev, EFUSE_TEST+3, tmpU1b|0x80);
5427         //PlatformStallExecution(1000);
5428         mdelay(10);
5429         write_nic_byte(dev, EFUSE_TEST+3, (tmpU1b&(~BIT7)));
5430
5431         // Retrieve Chip version.
5432         priv->card_8192_version = (VERSION_8192S)((read_nic_dword(dev, PMC_FSM)>>16)&0xF);
5433         RT_TRACE(COMP_INIT, "Chip Version ID: 0x%2x\n", priv->card_8192_version);
5434
5435         switch(priv->card_8192_version)
5436         {
5437                 case 0:
5438                         RT_TRACE(COMP_INIT, "Chip Version ID: VERSION_8192S_ACUT.\n");
5439                         break;
5440                 case 1:
5441                         RT_TRACE(COMP_INIT, "Chip Version ID: VERSION_8192S_BCUT.\n");
5442                         break;
5443                 case 2:
5444                         RT_TRACE(COMP_INIT, "Chip Version ID: VERSION_8192S_CCUT.\n");
5445                         break;
5446                 default:
5447                         RT_TRACE(COMP_INIT, "Unknown Chip Version!!\n");
5448                         priv->card_8192_version = VERSION_8192S_BCUT;
5449                         break;
5450         }
5451
5452         //if (IS_BOOT_FROM_EEPROM(Adapter))
5453         if(priv->EepromOrEfuse)
5454         {       // Read frin EEPROM
5455                 write_nic_byte(dev, SYS_ISO_CTRL+1, 0xE8); // Isolation signals from Loader
5456                 //PlatformStallExecution(10000);
5457                 mdelay(10);
5458                 write_nic_byte(dev, PMC_FSM, 0x02); // Enable Loader Data Keep
5459                 // Read all Content from EEPROM or EFUSE.
5460                 for(i = 0; i < HWSET_MAX_SIZE_92S; i += 2)
5461                 {
5462                         usValue = eprom_read(dev, (u16) (i>>1));
5463                         *((u16*)(&hwinfo[i])) = usValue;
5464                 }
5465         }
5466         else if (!(priv->EepromOrEfuse))
5467         {       // Read from EFUSE
5468
5469                 //
5470                 // <Roger_Notes> We set Isolation signals from Loader and reset EEPROM after system resuming
5471                 // from suspend mode.
5472                 // 2008.10.21.
5473                 //
5474                 //PlatformEFIOWrite1Byte(Adapter, SYS_ISO_CTRL+1, 0xE8); // Isolation signals from Loader
5475                 //PlatformStallExecution(10000);
5476                 //PlatformEFIOWrite1Byte(Adapter, SYS_FUNC_EN+1, 0x40);
5477                 //PlatformEFIOWrite1Byte(Adapter, SYS_FUNC_EN+1, 0x50);
5478
5479                 //tmpU1b = PlatformEFIORead1Byte(Adapter, EFUSE_TEST+3);
5480                 //PlatformEFIOWrite1Byte(Adapter, EFUSE_TEST+3, (tmpU1b | 0x80));
5481                 //PlatformEFIOWrite1Byte(Adapter, EFUSE_TEST+3, 0x72);
5482                 //PlatformEFIOWrite1Byte(Adapter, EFUSE_CLK, 0x03);
5483
5484                 // Read EFUSE real map to shadow.
5485                 EFUSE_ShadowMapUpdate(dev);
5486                 memcpy(hwinfo, &priv->EfuseMap[EFUSE_INIT_MAP][0], HWSET_MAX_SIZE_92S);
5487         }
5488         else
5489         {
5490                 RT_TRACE(COMP_INIT, "ReadAdapterInfo8192SUsb(): Invalid boot type!!\n");
5491         }
5492
5493         //YJ,test,090106
5494         //dump_buf(hwinfo,HWSET_MAX_SIZE_92S);
5495         //
5496         // <Roger_Notes> The following are EFUSE/EEPROM independent operations!!
5497         //
5498         //RT_PRINT_DATA(COMP_EFUSE, DBG_LOUD, ("MAP: \n"), hwinfo, HWSET_MAX_SIZE_92S);
5499
5500         //
5501         // <Roger_Notes> Event though CR9346 regiser can verify whether Autoload is success or not, but we still
5502         // double check ID codes for 92S here(e.g., due to HW GPIO polling fail issue).
5503         // 2008.10.21.
5504         //
5505         EEPROMId = *((u16 *)&hwinfo[0]);
5506
5507         if( EEPROMId != RTL8190_EEPROM_ID )
5508         {
5509                 RT_TRACE(COMP_INIT, "ID(%#x) is invalid!!\n", EEPROMId);
5510                 priv->bTXPowerDataReadFromEEPORM = FALSE;
5511                 priv->AutoloadFailFlag=TRUE;
5512         }
5513         else
5514         {
5515                 priv->AutoloadFailFlag=FALSE;
5516 #if RTL8192SU_USE_PARAM_TXPWR
5517                 priv->bTXPowerDataReadFromEEPORM = FALSE;
5518 #else
5519                 priv->bTXPowerDataReadFromEEPORM = TRUE;
5520 #endif
5521
5522         }
5523        // Read IC Version && Channel Plan
5524         if(!priv->AutoloadFailFlag)
5525         {
5526                 // VID, PID
5527                 priv->eeprom_vid = *(u16 *)&hwinfo[EEPROM_VID];
5528                 priv->eeprom_pid = *(u16 *)&hwinfo[EEPROM_PID];
5529                 priv->bIgnoreDiffRateTxPowerOffset = false;     //cosa for test
5530
5531
5532                 // EEPROM Version ID, Channel plan
5533                 priv->EEPROMVersion = *(u8 *)&hwinfo[EEPROM_Version];
5534                 priv->eeprom_ChannelPlan = *(u8 *)&hwinfo[EEPROM_ChannelPlan];
5535
5536                 // Customer ID, 0x00 and 0xff are reserved for Realtek.
5537                 priv->eeprom_CustomerID = *(u8 *)&hwinfo[EEPROM_CustomID];
5538                 priv->eeprom_SubCustomerID = *(u8 *)&hwinfo[EEPROM_SubCustomID];
5539         }
5540         else
5541         {
5542                 //priv->eeprom_vid = 0;
5543                 //priv->eeprom_pid = 0;
5544                 //priv->EEPROMVersion = 0;
5545                 //priv->eeprom_ChannelPlan = 0;
5546                 //priv->eeprom_CustomerID = 0;
5547                 //priv->eeprom_SubCustomerID = 0;
5548
5549                 rtl8192SU_ConfigAdapterInfo8192SForAutoLoadFail(dev);
5550                 return;
5551         }
5552
5553
5554         RT_TRACE(COMP_INIT, "EEPROM Id = 0x%4x\n", EEPROMId);
5555         RT_TRACE(COMP_INIT, "EEPROM VID = 0x%4x\n", priv->eeprom_vid);
5556         RT_TRACE(COMP_INIT, "EEPROM PID = 0x%4x\n", priv->eeprom_pid);
5557         RT_TRACE(COMP_INIT, "EEPROM Version ID: 0x%2x\n", priv->EEPROMVersion);
5558         RT_TRACE(COMP_INIT, "EEPROM Customer ID: 0x%2x\n", priv->eeprom_CustomerID);
5559         RT_TRACE(COMP_INIT, "EEPROM SubCustomer ID: 0x%2x\n", priv->eeprom_SubCustomerID);
5560         RT_TRACE(COMP_INIT, "EEPROM ChannelPlan = 0x%4x\n", priv->eeprom_ChannelPlan);
5561         RT_TRACE(COMP_INIT, "bIgnoreDiffRateTxPowerOffset = %d\n", priv->bIgnoreDiffRateTxPowerOffset);
5562
5563
5564         // Read USB optional function.
5565         if(!priv->AutoloadFailFlag)
5566         {
5567                 priv->EEPROMUsbOption = *(u8 *)&hwinfo[EEPROM_USB_OPTIONAL];
5568         }
5569         else
5570         {
5571                 priv->EEPROMUsbOption = EEPROM_USB_Default_OPTIONAL_FUNC;
5572         }
5573
5574
5575         priv->EEPROMUsbEndPointNumber = rtl8192SU_UsbOptionToEndPointNumber((priv->EEPROMUsbOption&EEPROM_EP_NUMBER)>>3);
5576
5577         RT_TRACE(COMP_INIT, "USB Option = %#x\n", priv->EEPROMUsbOption);
5578         RT_TRACE(COMP_INIT, "EndPoint Number = %#x\n", priv->EEPROMUsbEndPointNumber);
5579
5580 #ifdef TO_DO_LIST
5581         //
5582         //  Decide CustomerID according to VID/DID or EEPROM
5583         //
5584         switch(pHalData->EEPROMCustomerID)
5585         {
5586                 case EEPROM_CID_ALPHA:
5587                         pMgntInfo->CustomerID = RT_CID_819x_ALPHA;
5588                         break;
5589
5590                 case EEPROM_CID_CAMEO:
5591                         pMgntInfo->CustomerID = RT_CID_819x_CAMEO;
5592                         break;
5593
5594                 case EEPROM_CID_SITECOM:
5595                         pMgntInfo->CustomerID = RT_CID_819x_Sitecom;
5596                         RT_TRACE(COMP_INIT, DBG_LOUD, ("CustomerID = 0x%4x\n", pMgntInfo->CustomerID));
5597
5598                         break;
5599
5600                 case EEPROM_CID_WHQL:
5601                         Adapter->bInHctTest = TRUE;
5602
5603                         pMgntInfo->bSupportTurboMode = FALSE;
5604                         pMgntInfo->bAutoTurboBy8186 = FALSE;
5605
5606                         pMgntInfo->PowerSaveControl.bInactivePs = FALSE;
5607                         pMgntInfo->PowerSaveControl.bIPSModeBackup = FALSE;
5608                         pMgntInfo->PowerSaveControl.bLeisurePs = FALSE;
5609                         pMgntInfo->keepAliveLevel = 0;
5610                         break;
5611
5612                 default:
5613                         pMgntInfo->CustomerID = RT_CID_DEFAULT;
5614                         break;
5615
5616         }
5617
5618         //
5619         // Led mode
5620         //
5621         switch(pMgntInfo->CustomerID)
5622         {
5623                 case RT_CID_DEFAULT:
5624                 case RT_CID_819x_ALPHA:
5625                         pHalData->LedStrategy = SW_LED_MODE1;
5626                         pHalData->bRegUseLed = TRUE;
5627                         pHalData->SwLed1.bLedOn = TRUE;
5628                         break;
5629                 case RT_CID_819x_CAMEO:
5630                         pHalData->LedStrategy = SW_LED_MODE1;
5631                         pHalData->bRegUseLed = TRUE;
5632                         break;
5633
5634                 case RT_CID_819x_Sitecom:
5635                         pHalData->LedStrategy = SW_LED_MODE2;
5636                         pHalData->bRegUseLed = TRUE;
5637                         break;
5638
5639                 default:
5640                         pHalData->LedStrategy = SW_LED_MODE0;
5641                         break;
5642         }
5643 #endif
5644
5645         // Read USB PHY parameters.
5646         for(i=0; i<5; i++)
5647                 priv->EEPROMUsbPhyParam[i] = *(u8 *)&hwinfo[EEPROM_USB_PHY_PARA1+i];
5648
5649         //RT_PRINT_DATA(COMP_EFUSE, DBG_LOUD, ("USB PHY Param: \n"), pHalData->EEPROMUsbPhyParam, 5);
5650
5651
5652        //Read Permanent MAC address
5653         for(i=0; i<6; i++)
5654                 dev->dev_addr[i] =  *(u8 *)&hwinfo[EEPROM_NODE_ADDRESS_BYTE_0+i];
5655
5656         //NicIFSetMacAddress(Adapter, Adapter->PermanentAddress);
5657         write_nic_dword(dev, IDR0, ((u32*)dev->dev_addr)[0]);
5658         write_nic_word(dev, IDR4, ((u16*)(dev->dev_addr + 4))[0]);
5659
5660         RT_TRACE(COMP_INIT, "ReadAdapterInfo8192SEFuse(), Permanent Address = %02x-%02x-%02x-%02x-%02x-%02x\n",
5661                         dev->dev_addr[0], dev->dev_addr[1],
5662                         dev->dev_addr[2], dev->dev_addr[3],
5663                         dev->dev_addr[4], dev->dev_addr[5]);
5664
5665         //
5666         // Get CustomerID(Boad Type)
5667         // i.e., 0x0: RTL8188SU, 0x1: RTL8191SU, 0x2: RTL8192SU, 0x3: RTL8191GU.
5668         // Others: Reserved. Default is 0x2: RTL8192SU.
5669         //
5670         //if(!priv->AutoloadFailFlag)
5671         //{
5672                 priv->EEPROMBoardType = *(u8 *)&hwinfo[EEPROM_BoardType];
5673                 priv->rf_type = rtl8192SU_BoardTypeToRFtype(dev, priv->EEPROMBoardType);
5674         //}
5675         //else
5676         //{
5677         //      priv->EEPROMBoardType = EEPROM_Default_BoardType;
5678         //      priv->rf_type = RF_1T2R;
5679         //}
5680
5681 #if (defined (RTL8192SU_FPGA_2MAC_VERIFICATION)||defined (RTL8192SU_ASIC_VERIFICATION))
5682         priv->rf_chip = RF_6052;
5683 #else
5684         priv->rf_chip = RF_8256;
5685 #endif
5686
5687         priv->rf_chip = RF_6052;//lzm test
5688         RT_TRACE(COMP_INIT, "BoardType = 0x%2x\n", priv->EEPROMBoardType);
5689         RT_TRACE(COMP_INIT, "RF_Type = 0x%2x\n", priv->rf_type);
5690
5691         //
5692         // Read antenna tx power offset of B/C/D to A  from EEPROM
5693         // and read ThermalMeter from EEPROM
5694         //
5695         //if(!priv->AutoloadFailFlag)
5696         {
5697                 priv->EEPROMTxPowerDiff = *(u8 *)&hwinfo[EEPROM_PwDiff];
5698                 priv->EEPROMThermalMeter = *(u8 *)&hwinfo[EEPROM_ThermalMeter];
5699         }
5700         //else
5701         //{
5702         //      priv->EEPROMTxPowerDiff = EEPROM_Default_PwDiff;
5703         //      priv->EEPROMThermalMeter = EEPROM_Default_ThermalMeter;
5704         //}
5705
5706         RT_TRACE(COMP_INIT, "PwDiff = %#x\n", priv->EEPROMTxPowerDiff);
5707         RT_TRACE(COMP_INIT, "ThermalMeter = %#x\n", priv->EEPROMThermalMeter);
5708
5709         //
5710         // Read Tx Power gain offset of legacy OFDM to HT rate.
5711         // Read CrystalCap from EEPROM
5712         //
5713         //if(!priv->AutoloadFailFlag)
5714         {
5715                 priv->EEPROMCrystalCap = *(u8 *)&hwinfo[EEPROM_CrystalCap];
5716         }
5717         //else
5718         //{
5719         //      priv->EEPROMCrystalCap = EEPROM_Default_CrystalCap;
5720         //}
5721
5722         RT_TRACE(COMP_INIT, "CrystalCap = %#x\n", priv->EEPROMCrystalCap);
5723
5724         //
5725         // Get Tx Power Base.
5726         //
5727         //if(!priv->AutoloadFailFlag)
5728         {
5729                 priv->EEPROMTxPwrBase = *(u8 *)&hwinfo[EEPROM_TxPowerBase];
5730         }
5731         //else
5732         //{
5733         //      priv->EEPROMTxPwrBase = EEPROM_Default_TxPowerBase;
5734         //}
5735
5736         RT_TRACE(COMP_INIT, "TxPwrBase = %#x\n", priv->EEPROMTxPwrBase);
5737
5738
5739         //
5740         // Get TSSI value for each path.
5741         //
5742         //if(!priv->AutoloadFailFlag)
5743         {
5744                 priv->EEPROMTSSI_A = *(u8 *)&hwinfo[EEPROM_TSSI_A];
5745                 priv->EEPROMTSSI_B = *(u8 *)&hwinfo[EEPROM_TSSI_B];
5746         }
5747         //else
5748         //{ // Default setting for Empty EEPROM
5749         //      priv->EEPROMTSSI_A = EEPROM_Default_TSSI;
5750         //      priv->EEPROMTSSI_B = EEPROM_Default_TSSI;
5751         //}
5752
5753         RT_TRACE(COMP_INIT, "TSSI_A = %#x, TSSI_B = %#x\n", priv->EEPROMTSSI_A, priv->EEPROMTSSI_B);
5754
5755         //
5756         // Get Tx Power tracking mode.
5757         //
5758         //if(!priv->AutoloadFailFlag)
5759         {
5760                 priv->EEPROMTxPwrTkMode = *(u8 *)&hwinfo[EEPROM_TxPwTkMode];
5761         }
5762
5763         RT_TRACE(COMP_INIT, "TxPwrTkMod = %#x\n", priv->EEPROMTxPwrTkMode);
5764
5765
5766         {
5767                 //
5768                 // Buffer TxPwIdx(i.e., from offset 0x55~0x66, total 18Bytes)
5769                 // Update CCK, OFDM (1T/2T)Tx Power Index from above buffer.
5770                 //
5771
5772                 //
5773                 // Get Tx Power Level by Channel
5774                 //
5775                 //if(!priv->AutoloadFailFlag)
5776                 {
5777                         // Read Tx power of Channel 1 ~ 14 from EFUSE.
5778                         // 92S suupport RF A & B
5779                         for (rf_path = 0; rf_path < 2; rf_path++)
5780                         {
5781                                 for (i = 0; i < 3; i++)
5782                                 {
5783                                         // Read CCK RF A & B Tx power
5784                                         priv->RfCckChnlAreaTxPwr[rf_path][i] =
5785                                         hwinfo[EEPROM_TxPwIndex+rf_path*3+i];
5786
5787                                         // Read OFDM RF A & B Tx power for 1T
5788                                         priv->RfOfdmChnlAreaTxPwr1T[rf_path][i] =
5789                                         hwinfo[EEPROM_TxPwIndex+6+rf_path*3+i];
5790
5791                                         // Read OFDM RF A & B Tx power for 2T
5792                                         priv->RfOfdmChnlAreaTxPwr2T[rf_path][i] =
5793                                         hwinfo[EEPROM_TxPwIndex+12+rf_path*3+i];
5794                                 }
5795                         }
5796
5797                 }
5798 //
5799                 // Update Tx Power HAL variables.
5800 //
5801                 for (rf_path = 0; rf_path < 2; rf_path++)
5802                 {
5803                         for (i = 0; i < 3; i++)
5804                         {
5805                                 RT_TRACE((COMP_INIT),  "CCK RF-%d CHan_Area-%d = 0x%x\n",  rf_path, i,
5806                                 priv->RfCckChnlAreaTxPwr[rf_path][i]);
5807                                 RT_TRACE((COMP_INIT), "OFDM-1T RF-%d CHan_Area-%d = 0x%x\n",  rf_path, i,
5808                                 priv->RfOfdmChnlAreaTxPwr1T[rf_path][i]);
5809                                 RT_TRACE((COMP_INIT), "OFDM-2T RF-%d CHan_Area-%d = 0x%x\n",  rf_path, i, priv->RfOfdmChnlAreaTxPwr2T[rf_path][i]);
5810                         }
5811
5812                         // Assign dedicated channel tx power
5813                         for(i=0; i<14; i++)     // channel 1~3 use the same Tx Power Level.
5814                         {
5815                                 if (i < 3)                      // Cjanel 1-3
5816                                         index = 0;
5817                                 else if (i < 9)         // Channel 4-9
5818                                         index = 1;
5819                                 else                            // Channel 10-14
5820                                         index = 2;
5821
5822                                 // Record A & B CCK /OFDM - 1T/2T Channel area tx power
5823                                 priv->RfTxPwrLevelCck[rf_path][i]  =
5824                                 priv->RfCckChnlAreaTxPwr[rf_path][index];
5825                                 priv->RfTxPwrLevelOfdm1T[rf_path][i]  =
5826                                 priv->RfOfdmChnlAreaTxPwr1T[rf_path][index];
5827                                 priv->RfTxPwrLevelOfdm2T[rf_path][i]  =
5828                                 priv->RfOfdmChnlAreaTxPwr2T[rf_path][index];
5829                                 if (rf_path == 0)
5830                                 {
5831                                         priv->TxPowerLevelOFDM24G[i] = priv->RfTxPwrLevelOfdm1T[rf_path][i] ;
5832                                         priv->TxPowerLevelCCK[i] = priv->RfTxPwrLevelCck[rf_path][i];
5833                                 }
5834                         }
5835
5836                         for(i=0; i<14; i++)
5837                         {
5838                                 RT_TRACE((COMP_INIT),
5839                                 "Rf-%d TxPwr CH-%d CCK OFDM_1T OFDM_2T= 0x%x/0x%x/0x%x\n",
5840                                 rf_path, i, priv->RfTxPwrLevelCck[rf_path][i],
5841                                 priv->RfTxPwrLevelOfdm1T[rf_path][i] ,
5842                                 priv->RfTxPwrLevelOfdm2T[rf_path][i] );
5843                         }
5844                 }
5845         }
5846
5847         //
5848         // 2009/02/09 Cosa add for new EEPROM format
5849         //
5850         for(i=0; i<14; i++)     // channel 1~3 use the same Tx Power Level.
5851         {
5852                 // Read tx power difference between HT OFDM 20/40 MHZ
5853                 if (i < 3)                      // Cjanel 1-3
5854                         index = 0;
5855                 else if (i < 9)         // Channel 4-9
5856                         index = 1;
5857                 else                            // Channel 10-14
5858                         index = 2;
5859
5860                 tempval = (*(u8 *)&hwinfo[EEPROM_TX_PWR_HT20_DIFF+index])&0xff;
5861                 priv->TxPwrHt20Diff[RF90_PATH_A][i] = (tempval&0xF);
5862                 priv->TxPwrHt20Diff[RF90_PATH_B][i] = ((tempval>>4)&0xF);
5863
5864                 // Read OFDM<->HT tx power diff
5865                 if (i < 3)                      // Cjanel 1-3
5866                         tempval = (*(u8 *)&hwinfo[EEPROM_TX_PWR_OFDM_DIFF])&0xff;
5867                 else if (i < 9)         // Channel 4-9
5868                         tempval = (*(u8 *)&hwinfo[EEPROM_PwDiff])&0xff;
5869                 else                            // Channel 10-14
5870                         tempval = (*(u8 *)&hwinfo[EEPROM_TX_PWR_OFDM_DIFF+1])&0xff;
5871
5872                 //cosa tempval = (*(u1Byte *)&hwinfo[EEPROM_TX_PWR_OFDM_DIFF+index])&0xff;
5873                 priv->TxPwrLegacyHtDiff[RF90_PATH_A][i] = (tempval&0xF);
5874                 priv->TxPwrLegacyHtDiff[RF90_PATH_B][i] = ((tempval>>4)&0xF);
5875
5876                 //
5877                 // Read Band Edge tx power offset and check if user enable the ability
5878                 //
5879                 // HT 40 band edge channel
5880                 tempval = (*(u8 *)&hwinfo[EEPROM_TX_PWR_BAND_EDGE])&0xff;
5881                 priv->TxPwrbandEdgeHt40[RF90_PATH_A][0] = (tempval&0xF);                // Band edge low channel
5882                 priv->TxPwrbandEdgeHt40[RF90_PATH_A][1] =  ((tempval>>4)&0xF);  // Band edge high channel
5883                 tempval = (*(u8 *)&hwinfo[EEPROM_TX_PWR_BAND_EDGE+1])&0xff;
5884                 priv->TxPwrbandEdgeHt40[RF90_PATH_B][0] = (tempval&0xF);                // Band edge low channel
5885                 priv->TxPwrbandEdgeHt40[RF90_PATH_B][1] =  ((tempval>>4)&0xF);  // Band edge high channel
5886                 // HT 20 band edge channel
5887                 tempval = (*(u8 *)&hwinfo[EEPROM_TX_PWR_BAND_EDGE+2])&0xff;
5888                 priv->TxPwrbandEdgeHt20[RF90_PATH_A][0] = (tempval&0xF);                // Band edge low channel
5889                 priv->TxPwrbandEdgeHt20[RF90_PATH_A][1] =  ((tempval>>4)&0xF);  // Band edge high channel
5890                 tempval = (*(u8 *)&hwinfo[EEPROM_TX_PWR_BAND_EDGE+3])&0xff;
5891                 priv->TxPwrbandEdgeHt20[RF90_PATH_B][0] = (tempval&0xF);                // Band edge low channel
5892                 priv->TxPwrbandEdgeHt20[RF90_PATH_B][1] =  ((tempval>>4)&0xF);  // Band edge high channel
5893                 // OFDM band edge channel
5894                 tempval = (*(u8 *)&hwinfo[EEPROM_TX_PWR_BAND_EDGE+4])&0xff;
5895                 priv->TxPwrbandEdgeLegacyOfdm[RF90_PATH_A][0] = (tempval&0xF);          // Band edge low channel
5896                 priv->TxPwrbandEdgeLegacyOfdm[RF90_PATH_A][1] =  ((tempval>>4)&0xF);    // Band edge high channel
5897                 tempval = (*(u8 *)&hwinfo[EEPROM_TX_PWR_BAND_EDGE+5])&0xff;
5898                 priv->TxPwrbandEdgeLegacyOfdm[RF90_PATH_B][0] = (tempval&0xF);          // Band edge low channel
5899                 priv->TxPwrbandEdgeLegacyOfdm[RF90_PATH_B][1] =  ((tempval>>4)&0xF);    // Band edge high channel
5900
5901                 priv->TxPwrbandEdgeFlag = (*(u8 *)&hwinfo[TX_PWR_BAND_EDGE_CHK]);
5902         }
5903
5904         for(i=0; i<14; i++)
5905                 RT_TRACE(COMP_INIT, "RF-A Ht20 to HT40 Diff[%d] = 0x%x\n", i, priv->TxPwrHt20Diff[RF90_PATH_A][i]);
5906         for(i=0; i<14; i++)
5907                 RT_TRACE(COMP_INIT,  "RF-A Legacy to Ht40 Diff[%d] = 0x%x\n", i, priv->TxPwrLegacyHtDiff[RF90_PATH_A][i]);
5908         for(i=0; i<14; i++)
5909                 RT_TRACE(COMP_INIT,  "RF-B Ht20 to HT40 Diff[%d] = 0x%x\n", i, priv->TxPwrHt20Diff[RF90_PATH_B][i]);
5910         for(i=0; i<14; i++)
5911                 RT_TRACE(COMP_INIT,  "RF-B Legacy to HT40 Diff[%d] = 0x%x\n", i, priv->TxPwrLegacyHtDiff[RF90_PATH_B][i]);
5912         RT_TRACE(COMP_INIT, "RF-A HT40 band-edge low/high power diff = 0x%x/0x%x\n",
5913                 priv->TxPwrbandEdgeHt40[RF90_PATH_A][0],
5914                 priv->TxPwrbandEdgeHt40[RF90_PATH_A][1]);
5915         RT_TRACE((COMP_INIT&COMP_DBG), "RF-B HT40 band-edge low/high power diff = 0x%x/0x%x\n",
5916                 priv->TxPwrbandEdgeHt40[RF90_PATH_B][0],
5917                 priv->TxPwrbandEdgeHt40[RF90_PATH_B][1]);
5918
5919         RT_TRACE((COMP_INIT&COMP_DBG), "RF-A HT20 band-edge low/high power diff = 0x%x/0x%x\n",
5920                 priv->TxPwrbandEdgeHt20[RF90_PATH_A][0],
5921                 priv->TxPwrbandEdgeHt20[RF90_PATH_A][1]);
5922         RT_TRACE((COMP_INIT&COMP_DBG), "RF-B HT20 band-edge low/high power diff = 0x%x/0x%x\n",
5923                 priv->TxPwrbandEdgeHt20[RF90_PATH_B][0],
5924                 priv->TxPwrbandEdgeHt20[RF90_PATH_B][1]);
5925
5926         RT_TRACE((COMP_INIT&COMP_DBG), "RF-A OFDM band-edge low/high power diff = 0x%x/0x%x\n",
5927                 priv->TxPwrbandEdgeLegacyOfdm[RF90_PATH_A][0],
5928                 priv->TxPwrbandEdgeLegacyOfdm[RF90_PATH_A][1]);
5929         RT_TRACE((COMP_INIT&COMP_DBG), "RF-B OFDM band-edge low/high power diff = 0x%x/0x%x\n",
5930                 priv->TxPwrbandEdgeLegacyOfdm[RF90_PATH_B][0],
5931                 priv->TxPwrbandEdgeLegacyOfdm[RF90_PATH_B][1]);
5932         RT_TRACE((COMP_INIT&COMP_DBG), "Band-edge enable flag = %d\n", priv->TxPwrbandEdgeFlag);
5933
5934         //
5935         // Update remained HAL variables.
5936         //
5937         priv->TSSI_13dBm = priv->EEPROMThermalMeter *100;
5938         priv->LegacyHTTxPowerDiff = priv->EEPROMTxPowerDiff;
5939         priv->TxPowerDiff = priv->EEPROMTxPowerDiff;
5940         //priv->AntennaTxPwDiff[0] = (priv->EEPROMTxPowerDiff & 0xf);// Antenna B gain offset to antenna A, bit[3:0]
5941         //priv->AntennaTxPwDiff[1] = ((priv->EEPROMTxPowerDiff & 0xf0)>>4);// Antenna C gain offset to antenna A, bit[7:4]
5942         priv->CrystalCap = priv->EEPROMCrystalCap;      // CrystalCap, bit[15:12]
5943         priv->ThermalMeter[0] = (priv->EEPROMThermalMeter&0x1f);// ThermalMeter, bit0~3 for RFIC1, bit4~7 for RFIC2
5944         priv->LedStrategy = SW_LED_MODE0;
5945
5946         init_rate_adaptive(dev);
5947
5948         RT_TRACE(COMP_INIT, "<==== ReadAdapterInfo8192SUsb\n");
5949
5950         //return RT_STATUS_SUCCESS;
5951 }
5952
5953
5954 //
5955 //      Description:
5956 //              Read HW adapter information by E-Fuse or EEPROM according CR9346 reported.
5957 //
5958 //      Assumption:
5959 //              1. CR9346 regiser has verified.
5960 //              2. PASSIVE_LEVEL (USB interface)
5961 //
5962 //      Created by Roger, 2008.10.21.
5963 //
5964 static void rtl8192SU_read_eeprom_info(struct net_device *dev)
5965 {
5966         struct r8192_priv       *priv = ieee80211_priv(dev);
5967         u8                      tmpU1b;
5968
5969         RT_TRACE(COMP_INIT, "====> ReadAdapterInfo8192SUsb\n");
5970
5971         // Retrieve Chip version.
5972         priv->card_8192_version = (VERSION_8192S)((read_nic_dword(dev, PMC_FSM)>>16)&0xF);
5973         RT_TRACE(COMP_INIT, "Chip Version ID: 0x%2x\n", priv->card_8192_version);
5974
5975         tmpU1b = read_nic_byte(dev, EPROM_CMD);//CR9346
5976
5977         // To check system boot selection.
5978         if (tmpU1b & CmdEERPOMSEL)
5979         {
5980                 RT_TRACE(COMP_INIT, "Boot from EEPROM\n");
5981                 priv->EepromOrEfuse = TRUE;
5982         }
5983         else
5984         {
5985                 RT_TRACE(COMP_INIT, "Boot from EFUSE\n");
5986                 priv->EepromOrEfuse = FALSE;
5987         }
5988
5989         // To check autoload success or not.
5990         if (tmpU1b & CmdEEPROM_En)
5991         {
5992                 RT_TRACE(COMP_INIT, "Autoload OK!!\n");
5993                 priv->AutoloadFailFlag=FALSE;
5994                 rtl8192SU_ReadAdapterInfo8192SUsb(dev);//eeprom or e-fuse
5995         }
5996         else
5997         { // Auto load fail.
5998                 RT_TRACE(COMP_INIT, "AutoLoad Fail reported from CR9346!!\n");
5999                 priv->AutoloadFailFlag=TRUE;
6000                 rtl8192SU_ConfigAdapterInfo8192SForAutoLoadFail(dev);
6001
6002                 //if (IS_BOOT_FROM_EFUSE(Adapter))
6003                 if(!priv->EepromOrEfuse)
6004                 {
6005                         RT_TRACE(COMP_INIT, "Update shadow map for EFuse future use!!\n");
6006                         EFUSE_ShadowMapUpdate(dev);
6007                 }
6008         }
6009 #ifdef TO_DO_LIST
6010         if((priv->RegChannelPlan >= RT_CHANNEL_DOMAIN_MAX) || (pHalData->EEPROMChannelPlan & EEPROM_CHANNEL_PLAN_BY_HW_MASK))
6011         {
6012                 pMgntInfo->ChannelPlan = HalMapChannelPlan8192S(Adapter, (pHalData->EEPROMChannelPlan & (~(EEPROM_CHANNEL_PLAN_BY_HW_MASK))));
6013                 pMgntInfo->bChnlPlanFromHW = (pHalData->EEPROMChannelPlan & EEPROM_CHANNEL_PLAN_BY_HW_MASK) ? TRUE : FALSE; // User cannot change  channel plan.
6014         }
6015         else
6016         {
6017                 pMgntInfo->ChannelPlan = (RT_CHANNEL_DOMAIN)pMgntInfo->RegChannelPlan;
6018         }
6019
6020         switch(pMgntInfo->ChannelPlan)
6021         {
6022                 case RT_CHANNEL_DOMAIN_GLOBAL_DOAMIN:
6023                 {
6024                         PRT_DOT11D_INFO pDot11dInfo = GET_DOT11D_INFO(pMgntInfo);
6025
6026                         pDot11dInfo->bEnabled = TRUE;
6027                 }
6028                 RT_TRACE(COMP_INIT, DBG_LOUD, ("ReadAdapterInfo8187(): Enable dot11d when RT_CHANNEL_DOMAIN_GLOBAL_DOAMIN!\n"));
6029                 break;
6030         }
6031
6032         RT_TRACE(COMP_INIT, DBG_LOUD, ("RegChannelPlan(%d) EEPROMChannelPlan(%d)", pMgntInfo->RegChannelPlan, pHalData->EEPROMChannelPlan));
6033         RT_TRACE(COMP_INIT, DBG_LOUD, ("ChannelPlan = %d\n" , pMgntInfo->ChannelPlan));
6034
6035         RT_TRACE(COMP_INIT, DBG_LOUD, ("<==== ReadAdapterInfo8192S\n"));
6036 #endif
6037
6038         RT_TRACE(COMP_INIT, "<==== ReadAdapterInfo8192SUsb\n");
6039
6040         //return RT_STATUS_SUCCESS;
6041 }
6042 #else
6043 static void rtl8192_read_eeprom_info(struct net_device* dev)
6044 {
6045         u16 wEPROM_ID = 0;
6046         u8 bMac_Tmp_Addr[6] = {0x00, 0xe0, 0x4c, 0x00, 0x00, 0x02};
6047         u8 bLoad_From_EEPOM = false;
6048         struct r8192_priv *priv = ieee80211_priv(dev);
6049         u16 tmpValue = 0;
6050         RT_TRACE(COMP_EPROM, "===========>%s()\n", __FUNCTION__);
6051         wEPROM_ID = eprom_read(dev, 0); //first read EEPROM ID out;
6052         RT_TRACE(COMP_EPROM, "EEPROM ID is 0x%x\n", wEPROM_ID);
6053
6054         if (wEPROM_ID != RTL8190_EEPROM_ID)
6055         {
6056                 RT_TRACE(COMP_ERR, "EEPROM ID is invalid(is 0x%x(should be 0x%x)\n", wEPROM_ID, RTL8190_EEPROM_ID);
6057         }
6058         else
6059                 bLoad_From_EEPOM = true;
6060
6061         if (bLoad_From_EEPOM)
6062         {
6063                 tmpValue = eprom_read(dev, (EEPROM_VID>>1));
6064                 priv->eeprom_vid = endian_swap(&tmpValue);
6065                 priv->eeprom_pid = eprom_read(dev, (EEPROM_PID>>1));
6066                 tmpValue = eprom_read(dev, (EEPROM_ChannelPlan>>1));
6067                 priv->eeprom_ChannelPlan =((tmpValue&0xff00)>>8);
6068                 priv->btxpowerdata_readfromEEPORM = true;
6069                 priv->eeprom_CustomerID = eprom_read(dev, (EEPROM_Customer_ID>>1)) >>8;
6070         }
6071         else
6072         {
6073                 priv->eeprom_vid = 0;
6074                 priv->eeprom_pid = 0;
6075                 priv->card_8192_version = VERSION_819xU_B;
6076                 priv->eeprom_ChannelPlan = 0;
6077                 priv->eeprom_CustomerID = 0;
6078         }
6079         RT_TRACE(COMP_EPROM, "vid:0x%4x, pid:0x%4x, CustomID:0x%2x, ChanPlan:0x%x\n", priv->eeprom_vid, priv->eeprom_pid, priv->eeprom_CustomerID, priv->eeprom_ChannelPlan);
6080         //set channelplan from eeprom
6081         priv->ChannelPlan = priv->eeprom_ChannelPlan;
6082         if (bLoad_From_EEPOM)
6083         {
6084                 int i;
6085                 for (i=0; i<6; i+=2)
6086                 {
6087                         u16 tmp = 0;
6088                         tmp = eprom_read(dev, (u16)((EEPROM_NODE_ADDRESS_BYTE_0 + i)>>1));
6089                         *(u16*)(&dev->dev_addr[i]) = tmp;
6090                 }
6091         }
6092         else
6093         {
6094                 memcpy(dev->dev_addr, bMac_Tmp_Addr, 6);
6095                 //should I set IDR0 here?
6096         }
6097         RT_TRACE(COMP_EPROM, "MAC addr:"MAC_FMT"\n", MAC_ARG(dev->dev_addr));
6098         priv->rf_type = RTL819X_DEFAULT_RF_TYPE; //default 1T2R
6099         priv->rf_chip = RF_8256;
6100
6101         if (priv->card_8192_version == (u8)VERSION_819xU_A)
6102         {
6103                 //read Tx power gain offset of legacy OFDM to HT rate
6104                 if (bLoad_From_EEPOM)
6105                         priv->EEPROMTxPowerDiff = (eprom_read(dev, (EEPROM_TxPowerDiff>>1))&0xff00) >> 8;
6106                 else
6107                         priv->EEPROMTxPowerDiff = EEPROM_Default_TxPower;
6108                 RT_TRACE(COMP_EPROM, "TxPowerDiff:%d\n", priv->EEPROMTxPowerDiff);
6109                 //read ThermalMeter from EEPROM
6110                 if (bLoad_From_EEPOM)
6111                         priv->EEPROMThermalMeter = (u8)(eprom_read(dev, (EEPROM_ThermalMeter>>1))&0x00ff);
6112                 else
6113                         priv->EEPROMThermalMeter = EEPROM_Default_ThermalMeter;
6114                 RT_TRACE(COMP_EPROM, "ThermalMeter:%d\n", priv->EEPROMThermalMeter);
6115                 //vivi, for tx power track
6116                 priv->TSSI_13dBm = priv->EEPROMThermalMeter *100;
6117                 //read antenna tx power offset of B/C/D to A from EEPROM
6118                 if (bLoad_From_EEPOM)
6119                         priv->EEPROMPwDiff = (eprom_read(dev, (EEPROM_PwDiff>>1))&0x0f00)>>8;
6120                 else
6121                         priv->EEPROMPwDiff = EEPROM_Default_PwDiff;
6122                 RT_TRACE(COMP_EPROM, "TxPwDiff:%d\n", priv->EEPROMPwDiff);
6123                 // Read CrystalCap from EEPROM
6124                 if (bLoad_From_EEPOM)
6125                         priv->EEPROMCrystalCap = (eprom_read(dev, (EEPROM_CrystalCap>>1))&0x0f);
6126                 else
6127                         priv->EEPROMCrystalCap = EEPROM_Default_CrystalCap;
6128                 RT_TRACE(COMP_EPROM, "CrystalCap = %d\n", priv->EEPROMCrystalCap);
6129                 //get per-channel Tx power level
6130                 if (bLoad_From_EEPOM)
6131                         priv->EEPROM_Def_Ver = (eprom_read(dev, (EEPROM_TxPwIndex_Ver>>1))&0xff00)>>8;
6132                 else
6133                         priv->EEPROM_Def_Ver = 1;
6134                 RT_TRACE(COMP_EPROM, "EEPROM_DEF_VER:%d\n", priv->EEPROM_Def_Ver);
6135                 if (priv->EEPROM_Def_Ver == 0) //old eeprom definition
6136                 {
6137                         int i;
6138                         if (bLoad_From_EEPOM)
6139                                 priv->EEPROMTxPowerLevelCCK = (eprom_read(dev, (EEPROM_TxPwIndex_CCK>>1))&0xff) >> 8;
6140                         else
6141                                 priv->EEPROMTxPowerLevelCCK = 0x10;
6142                         RT_TRACE(COMP_EPROM, "CCK Tx Power Levl: 0x%02x\n", priv->EEPROMTxPowerLevelCCK);
6143                         for (i=0; i<3; i++)
6144                         {
6145                                 if (bLoad_From_EEPOM)
6146                                 {
6147                                         tmpValue = eprom_read(dev, (EEPROM_TxPwIndex_OFDM_24G+i)>>1);
6148                                         if (((EEPROM_TxPwIndex_OFDM_24G+i) % 2) == 0)
6149                                                 tmpValue = tmpValue & 0x00ff;
6150                                         else
6151                                                 tmpValue = (tmpValue & 0xff00) >> 8;
6152                                 }
6153                                 else
6154                                         tmpValue = 0x10;
6155                                 priv->EEPROMTxPowerLevelOFDM24G[i] = (u8) tmpValue;
6156                                 RT_TRACE(COMP_EPROM, "OFDM 2.4G Tx Power Level, Index %d = 0x%02x\n", i, priv->EEPROMTxPowerLevelCCK);
6157                         }
6158                 }//end if EEPROM_DEF_VER == 0
6159                 else if (priv->EEPROM_Def_Ver == 1)
6160                 {
6161                         if (bLoad_From_EEPOM)
6162                         {
6163                                 tmpValue = eprom_read(dev, (EEPROM_TxPwIndex_CCK_V1>>1));
6164                                 tmpValue = (tmpValue & 0xff00) >> 8;
6165                         }
6166                         else
6167                                 tmpValue = 0x10;
6168                         priv->EEPROMTxPowerLevelCCK_V1[0] = (u8)tmpValue;
6169
6170                         if (bLoad_From_EEPOM)
6171                                 tmpValue = eprom_read(dev, (EEPROM_TxPwIndex_CCK_V1 + 2)>>1);
6172                         else
6173                                 tmpValue = 0x1010;
6174                         *((u16*)(&priv->EEPROMTxPowerLevelCCK_V1[1])) = tmpValue;
6175                         if (bLoad_From_EEPOM)
6176                                 tmpValue = eprom_read(dev, (EEPROM_TxPwIndex_OFDM_24G_V1>>1));
6177                         else
6178                                 tmpValue = 0x1010;
6179                         *((u16*)(&priv->EEPROMTxPowerLevelOFDM24G[0])) = tmpValue;
6180                         if (bLoad_From_EEPOM)
6181                                 tmpValue = eprom_read(dev, (EEPROM_TxPwIndex_OFDM_24G_V1+2)>>1);
6182                         else
6183                                 tmpValue = 0x10;
6184                         priv->EEPROMTxPowerLevelOFDM24G[2] = (u8)tmpValue;
6185                 }//endif EEPROM_Def_Ver == 1
6186
6187                 //update HAL variables
6188                 //
6189                 {
6190                         int i;
6191                         for (i=0; i<14; i++)
6192                         {
6193                                 if (i<=3)
6194                                         priv->TxPowerLevelOFDM24G[i] = priv->EEPROMTxPowerLevelOFDM24G[0];
6195                                 else if (i>=4 && i<=9)
6196                                         priv->TxPowerLevelOFDM24G[i] = priv->EEPROMTxPowerLevelOFDM24G[1];
6197                                 else
6198                                         priv->TxPowerLevelOFDM24G[i] = priv->EEPROMTxPowerLevelOFDM24G[2];
6199                         }
6200
6201                         for (i=0; i<14; i++)
6202                         {
6203                                 if (priv->EEPROM_Def_Ver == 0)
6204                                 {
6205                                         if (i<=3)
6206                                                 priv->TxPowerLevelCCK[i] = priv->EEPROMTxPowerLevelOFDM24G[0] + (priv->EEPROMTxPowerLevelCCK - priv->EEPROMTxPowerLevelOFDM24G[1]);
6207                                         else if (i>=4 && i<=9)
6208                                                 priv->TxPowerLevelCCK[i] = priv->EEPROMTxPowerLevelCCK;
6209                                         else
6210                                                 priv->TxPowerLevelCCK[i] = priv->EEPROMTxPowerLevelOFDM24G[2] + (priv->EEPROMTxPowerLevelCCK - priv->EEPROMTxPowerLevelOFDM24G[1]);
6211                                 }
6212                                 else if (priv->EEPROM_Def_Ver == 1)
6213                                 {
6214                                         if (i<=3)
6215                                                 priv->TxPowerLevelCCK[i] = priv->EEPROMTxPowerLevelCCK_V1[0];
6216                                         else if (i>=4 && i<=9)
6217                                                 priv->TxPowerLevelCCK[i] = priv->EEPROMTxPowerLevelCCK_V1[1];
6218                                         else
6219                                                 priv->TxPowerLevelCCK[i] = priv->EEPROMTxPowerLevelCCK_V1[2];
6220                                 }
6221                         }
6222                 }//end update HAL variables
6223                 priv->TxPowerDiff = priv->EEPROMPwDiff;
6224 // Antenna B gain offset to antenna A, bit0~3
6225                 priv->AntennaTxPwDiff[0] = (priv->EEPROMTxPowerDiff & 0xf);
6226                 // Antenna C gain offset to antenna A, bit4~7
6227                 priv->AntennaTxPwDiff[1] = ((priv->EEPROMTxPowerDiff & 0xf0)>>4);
6228                 // CrystalCap, bit12~15
6229                 priv->CrystalCap = priv->EEPROMCrystalCap;
6230                 // ThermalMeter, bit0~3 for RFIC1, bit4~7 for RFIC2
6231                 // 92U does not enable TX power tracking.
6232                 priv->ThermalMeter[0] = priv->EEPROMThermalMeter;
6233         }//end if VersionID == VERSION_819xU_A
6234
6235 //added by vivi, for dlink led, 20080416
6236         switch(priv->eeprom_CustomerID)
6237         {
6238                 case EEPROM_CID_RUNTOP:
6239                         priv->CustomerID = RT_CID_819x_RUNTOP;
6240                         break;
6241
6242                 case EEPROM_CID_DLINK:
6243                         priv->CustomerID = RT_CID_DLINK;
6244                         break;
6245
6246                 default:
6247                         priv->CustomerID = RT_CID_DEFAULT;
6248                         break;
6249
6250         }
6251
6252         switch(priv->CustomerID)
6253         {
6254                 case RT_CID_819x_RUNTOP:
6255                         priv->LedStrategy = SW_LED_MODE2;
6256                         break;
6257
6258                 case RT_CID_DLINK:
6259                         priv->LedStrategy = SW_LED_MODE4;
6260                         break;
6261
6262                 default:
6263                         priv->LedStrategy = SW_LED_MODE0;
6264                         break;
6265
6266         }
6267
6268
6269         if(priv->rf_type == RF_1T2R)
6270         {
6271                 RT_TRACE(COMP_EPROM, "\n1T2R config\n");
6272         }
6273         else
6274         {
6275                 RT_TRACE(COMP_EPROM, "\n2T4R config\n");
6276         }
6277
6278         // 2008/01/16 MH We can only know RF type in the function. So we have to init
6279         // DIG RATR table again.
6280         init_rate_adaptive(dev);
6281         //we need init DIG RATR table here again.
6282
6283         RT_TRACE(COMP_EPROM, "<===========%s()\n", __FUNCTION__);
6284         return;
6285 }
6286 #endif
6287
6288 short rtl8192_get_channel_map(struct net_device * dev)
6289 {
6290         struct r8192_priv *priv = ieee80211_priv(dev);
6291         if(priv->ChannelPlan > COUNTRY_CODE_GLOBAL_DOMAIN){
6292                 printk("rtl8180_init:Error channel plan! Set to default.\n");
6293                 priv->ChannelPlan= 0;
6294         }
6295         RT_TRACE(COMP_INIT, "Channel plan is %d\n",priv->ChannelPlan);
6296
6297         rtl819x_set_channel_map(priv->ChannelPlan, priv);
6298         return 0;
6299 }
6300
6301 short rtl8192_init(struct net_device *dev)
6302 {
6303
6304         struct r8192_priv *priv = ieee80211_priv(dev);
6305
6306 #ifndef RTL8192SU
6307         memset(&(priv->stats),0,sizeof(struct Stats));
6308         memset(priv->txqueue_to_outpipemap,0,9);
6309 #ifdef PIPE12
6310         {
6311                 int i=0;
6312                 u8 queuetopipe[]={3,2,1,0,4,8,7,6,5};
6313                 memcpy(priv->txqueue_to_outpipemap,queuetopipe,9);
6314 /*              for(i=0;i<9;i++)
6315                         printk("%d ",priv->txqueue_to_outpipemap[i]);
6316                 printk("\n");*/
6317         }
6318 #else
6319         {
6320                 u8 queuetopipe[]={3,2,1,0,4,4,0,4,4};
6321                 memcpy(priv->txqueue_to_outpipemap,queuetopipe,9);
6322 /*              for(i=0;i<9;i++)
6323                         printk("%d ",priv->txqueue_to_outpipemap[i]);
6324                 printk("\n");*/
6325         }
6326 #endif
6327 #endif
6328         rtl8192_init_priv_variable(dev);
6329         rtl8192_init_priv_lock(priv);
6330         rtl8192_init_priv_task(dev);
6331         rtl8192_get_eeprom_size(dev);
6332         priv->ops->rtl819x_read_eeprom_info(dev);
6333         rtl8192_get_channel_map(dev);
6334         init_hal_dm(dev);
6335         init_timer(&priv->watch_dog_timer);
6336         priv->watch_dog_timer.data = (unsigned long)dev;
6337         priv->watch_dog_timer.function = watch_dog_timer_callback;
6338
6339         //rtl8192_adapter_start(dev);
6340 #ifdef DEBUG_EPROM
6341         dump_eprom(dev);
6342 #endif
6343         return 0;
6344 }
6345
6346 /******************************************************************************
6347  *function:  This function actually only set RRSR, RATR and BW_OPMODE registers
6348  *           not to do all the hw config as its name says
6349  *   input:  net_device dev
6350  *  output:  none
6351  *  return:  none
6352  *  notice:  This part need to modified according to the rate set we filtered
6353  * ****************************************************************************/
6354 void rtl8192_hwconfig(struct net_device* dev)
6355 {
6356         u32 regRATR = 0, regRRSR = 0;
6357         u8 regBwOpMode = 0, regTmp = 0;
6358         struct r8192_priv *priv = ieee80211_priv(dev);
6359
6360 // Set RRSR, RATR, and BW_OPMODE registers
6361         //
6362         switch(priv->ieee80211->mode)
6363         {
6364         case WIRELESS_MODE_B:
6365                 regBwOpMode = BW_OPMODE_20MHZ;
6366                 regRATR = RATE_ALL_CCK;
6367                 regRRSR = RATE_ALL_CCK;
6368                 break;
6369         case WIRELESS_MODE_A:
6370                 regBwOpMode = BW_OPMODE_5G |BW_OPMODE_20MHZ;
6371                 regRATR = RATE_ALL_OFDM_AG;
6372                 regRRSR = RATE_ALL_OFDM_AG;
6373                 break;
6374         case WIRELESS_MODE_G:
6375                 regBwOpMode = BW_OPMODE_20MHZ;
6376                 regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
6377                 regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
6378                 break;
6379         case WIRELESS_MODE_AUTO:
6380 #ifdef TO_DO_LIST
6381                 if (Adapter->bInHctTest)
6382                 {
6383                     regBwOpMode = BW_OPMODE_20MHZ;
6384                     regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
6385                     regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
6386                 }
6387                 else
6388 #endif
6389                 {
6390                     regBwOpMode = BW_OPMODE_20MHZ;
6391                     regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG | RATE_ALL_OFDM_1SS | RATE_ALL_OFDM_2SS;
6392                     regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
6393                 }
6394                 break;
6395         case WIRELESS_MODE_N_24G:
6396                 // It support CCK rate by default.
6397                 // CCK rate will be filtered out only when associated AP does not support it.
6398                 regBwOpMode = BW_OPMODE_20MHZ;
6399                         regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG | RATE_ALL_OFDM_1SS | RATE_ALL_OFDM_2SS;
6400                         regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
6401                 break;
6402         case WIRELESS_MODE_N_5G:
6403                 regBwOpMode = BW_OPMODE_5G;
6404                 regRATR = RATE_ALL_OFDM_AG | RATE_ALL_OFDM_1SS | RATE_ALL_OFDM_2SS;
6405                 regRRSR = RATE_ALL_OFDM_AG;
6406                 break;
6407         }
6408
6409         write_nic_byte(dev, BW_OPMODE, regBwOpMode);
6410         {
6411                 u32 ratr_value = 0;
6412                 ratr_value = regRATR;
6413                 if (priv->rf_type == RF_1T2R)
6414                 {
6415                         ratr_value &= ~(RATE_ALL_OFDM_2SS);
6416                 }
6417                 write_nic_dword(dev, RATR0, ratr_value);
6418                 write_nic_byte(dev, UFWP, 1);
6419         }
6420         regTmp = read_nic_byte(dev, 0x313);
6421         regRRSR = ((regTmp) << 24) | (regRRSR & 0x00ffffff);
6422         write_nic_dword(dev, RRSR, regRRSR);
6423
6424         //
6425         // Set Retry Limit here
6426         //
6427         write_nic_word(dev, RETRY_LIMIT,
6428                         priv->ShortRetryLimit << RETRY_LIMIT_SHORT_SHIFT | \
6429                         priv->LongRetryLimit << RETRY_LIMIT_LONG_SHIFT);
6430         // Set Contention Window here
6431
6432         // Set Tx AGC
6433
6434         // Set Tx Antenna including Feedback control
6435
6436         // Set Auto Rate fallback control
6437
6438
6439 }
6440
6441 #ifdef RTL8192SU
6442
6443 //
6444 //      Description:
6445 //              Initial HW relted registers.
6446 //
6447 //      Assumption:
6448 //              Config RTL8192S USB MAC, we should config MAC before download FW.
6449 //
6450 //      2008.09.03, Added by Roger.
6451 //
6452 static void rtl8192SU_MacConfigBeforeFwDownloadASIC(struct net_device *dev)
6453 {
6454         u8                              tmpU1b;// i;
6455 //      u16                             tmpU2b;
6456 //      u32                             tmpU4b;
6457         u8                              PollingCnt = 20;
6458
6459         RT_TRACE(COMP_INIT, "--->MacConfigBeforeFwDownloadASIC()\n");
6460
6461         //2MAC Initialization for power on sequence, Revised by Roger. 2008.09.03.
6462
6463         //
6464         //<Roger_Notes> Set control path switch to HW control and reset Digital Core,  CPU Core and
6465         // MAC I/O to solve FW download fail when system from resume sate.
6466         // 2008.11.04.
6467         //
6468        tmpU1b = read_nic_byte(dev, SYS_CLKR+1);
6469        if(tmpU1b & 0x80)
6470         {
6471         tmpU1b &= 0x3f;
6472               write_nic_byte(dev, SYS_CLKR+1, tmpU1b);
6473        }
6474         // Clear FW RPWM for FW control LPS. by tynli. 2009.02.23
6475         write_nic_byte(dev, RPWM, 0x0);
6476
6477        tmpU1b = read_nic_byte(dev, SYS_FUNC_EN+1);
6478        tmpU1b &= 0x73;
6479        write_nic_byte(dev, SYS_FUNC_EN+1, tmpU1b);
6480        udelay(1000);
6481
6482         //Revised POS, suggested by SD1 Alex, 2008.09.27.
6483         write_nic_byte(dev, SPS0_CTRL+1, 0x53);
6484         write_nic_byte(dev, SPS0_CTRL, 0x57);
6485
6486         //Enable AFE Macro Block's Bandgap adn Enable AFE Macro Block's Mbias
6487         tmpU1b = read_nic_byte(dev, AFE_MISC);
6488         write_nic_byte(dev, AFE_MISC, (tmpU1b|AFE_BGEN|AFE_MBEN));
6489
6490         //Enable PLL Power (LDOA15V)
6491         tmpU1b = read_nic_byte(dev, LDOA15_CTRL);
6492         write_nic_byte(dev, LDOA15_CTRL, (tmpU1b|LDA15_EN));
6493
6494         //Enable LDOV12D block
6495         tmpU1b = read_nic_byte(dev, LDOV12D_CTRL);
6496         write_nic_byte(dev, LDOV12D_CTRL, (tmpU1b|LDV12_EN));
6497
6498         //mpU1b = read_nic_byte(Adapter, SPS1_CTRL);
6499         //write_nic_byte(dev, SPS1_CTRL, (tmpU1b|SPS1_LDEN));
6500
6501         //PlatformSleepUs(2000);
6502
6503         //Enable Switch Regulator Block
6504         //tmpU1b = read_nic_byte(Adapter, SPS1_CTRL);
6505         //write_nic_byte(dev, SPS1_CTRL, (tmpU1b|SPS1_SWEN));
6506
6507         //write_nic_dword(Adapter, SPS1_CTRL, 0x00a7b267);
6508
6509         tmpU1b = read_nic_byte(dev, SYS_ISO_CTRL+1);
6510         write_nic_byte(dev, SYS_ISO_CTRL+1, (tmpU1b|0x08));
6511
6512         //Engineer Packet CP test Enable
6513         tmpU1b = read_nic_byte(dev, SYS_FUNC_EN+1);
6514         write_nic_byte(dev, SYS_FUNC_EN+1, (tmpU1b|0x20));
6515
6516         //Support 64k IMEM, suggested by SD1 Alex.
6517         tmpU1b = read_nic_byte(dev, SYS_ISO_CTRL+1);
6518         write_nic_byte(dev, SYS_ISO_CTRL+1, (tmpU1b& 0x68));
6519
6520         //Enable AFE clock
6521         tmpU1b = read_nic_byte(dev, AFE_XTAL_CTRL+1);
6522         write_nic_byte(dev, AFE_XTAL_CTRL+1, (tmpU1b& 0xfb));
6523
6524         //Enable AFE PLL Macro Block
6525         tmpU1b = read_nic_byte(dev, AFE_PLL_CTRL);
6526         write_nic_byte(dev, AFE_PLL_CTRL, (tmpU1b|0x11));
6527
6528         //Attatch AFE PLL to MACTOP/BB/PCIe Digital
6529         tmpU1b = read_nic_byte(dev, SYS_ISO_CTRL);
6530         write_nic_byte(dev, SYS_ISO_CTRL, (tmpU1b&0xEE));
6531
6532         // Switch to 40M clock
6533         write_nic_byte(dev, SYS_CLKR, 0x00);
6534
6535         //SSC Disable
6536         tmpU1b = read_nic_byte(dev, SYS_CLKR);
6537         //write_nic_byte(dev, SYS_CLKR, (tmpU1b&0x5f));
6538         write_nic_byte(dev, SYS_CLKR, (tmpU1b|0xa0));
6539
6540         //Enable MAC clock
6541         tmpU1b = read_nic_byte(dev, SYS_CLKR+1);
6542         write_nic_byte(dev, SYS_CLKR+1, (tmpU1b|0x18));
6543
6544         //Revised POS, suggested by SD1 Alex, 2008.09.27.
6545         write_nic_byte(dev, PMC_FSM, 0x02);
6546
6547         //Enable Core digital and enable IOREG R/W
6548         tmpU1b = read_nic_byte(dev, SYS_FUNC_EN+1);
6549         write_nic_byte(dev, SYS_FUNC_EN+1, (tmpU1b|0x08));
6550
6551         //Enable REG_EN
6552         tmpU1b = read_nic_byte(dev, SYS_FUNC_EN+1);
6553         write_nic_byte(dev, SYS_FUNC_EN+1, (tmpU1b|0x80));
6554
6555         //Switch the control path to FW
6556         tmpU1b = read_nic_byte(dev, SYS_CLKR+1);
6557         write_nic_byte(dev, SYS_CLKR+1, (tmpU1b|0x80)& 0xBF);
6558
6559         write_nic_byte(dev, CMDR, 0xFC);
6560         write_nic_byte(dev, CMDR+1, 0x37);
6561
6562         //Fix the RX FIFO issue(usb error), 970410
6563         tmpU1b = read_nic_byte_E(dev, 0x5c);
6564         write_nic_byte_E(dev, 0x5c, (tmpU1b|BIT7));
6565
6566          //For power save, used this in the bit file after 970621
6567         tmpU1b = read_nic_byte(dev, SYS_CLKR);
6568         write_nic_byte(dev, SYS_CLKR, tmpU1b&(~SYS_CPU_CLKSEL));
6569
6570         // Revised for 8051 ROM code wrong operation. Added by Roger. 2008.10.16.
6571         write_nic_byte_E(dev, 0x1c, 0x80);
6572
6573         //
6574         // <Roger_EXP> To make sure that TxDMA can ready to download FW.
6575         // We should reset TxDMA if IMEM RPT was not ready.
6576         // Suggested by SD1 Alex. 2008.10.23.
6577         //
6578         do
6579         {
6580                 tmpU1b = read_nic_byte(dev, TCR);
6581                 if((tmpU1b & TXDMA_INIT_VALUE) == TXDMA_INIT_VALUE)
6582                         break;
6583                 //PlatformStallExecution(5);
6584                 udelay(5);
6585         }while(PollingCnt--);   // Delay 1ms
6586
6587         if(PollingCnt <= 0 )
6588         {
6589                 RT_TRACE(COMP_INIT, "MacConfigBeforeFwDownloadASIC(): Polling TXDMA_INIT_VALUE timeout!! Current TCR(%#x)\n", tmpU1b);
6590                 tmpU1b = read_nic_byte(dev, CMDR);
6591                 write_nic_byte(dev, CMDR, tmpU1b&(~TXDMA_EN));
6592                 udelay(2);
6593                 write_nic_byte(dev, CMDR, tmpU1b|TXDMA_EN);// Reset TxDMA
6594         }
6595
6596
6597         RT_TRACE(COMP_INIT, "<---MacConfigBeforeFwDownloadASIC()\n");
6598 }
6599
6600
6601 #if 0
6602 static void rtl8192SU_SetHwRegAmpduMinSpace(struct net_device *dev, u8 MinSpaceCfg)
6603 {
6604         struct r8192_priv *priv = ieee80211_priv((struct net_device *)dev);
6605         struct ieee80211_device* ieee = priv->ieee80211;
6606         u8      MinSpacingToSet;
6607         u8      SecMinSpace;
6608
6609 #ifdef RTL8192S_PREPARE_FOR_NORMAL_RELEASE
6610         MinSpacingToSet = MinSpaceCfg;
6611         if(MinSpacingToSet <= 7)
6612         {
6613                 switch(ieee->pairwise_key_type)
6614                 {
6615                         case    KEY_TYPE_NA:                    SecMinSpace = 0;                break;
6616                         case    KEY_TYPE_CCMP:
6617                         case    KEY_TYPE_WEP40:
6618                         case    KEY_TYPE_WEP104:
6619                         case    KEY_TYPE_TKIP:          SecMinSpace = 6;                break;
6620                         default:                                        SecMinSpace = 7;                break;
6621                 }
6622
6623                 if(MinSpacingToSet < SecMinSpace)
6624                         MinSpacingToSet = SecMinSpace;
6625                 priv->MinSpaceCfg = ((priv->MinSpaceCfg&0xf8) |MinSpacingToSet);
6626                 RT_TRACE(COMP_SEC, "Set AMPDU_MIN_SPACE: %x\n", priv->MinSpaceCfg);
6627                 write_nic_byte(dev, AMPDU_MIN_SPACE, priv->MinSpaceCfg);
6628         }
6629
6630 #else
6631         MinSpacingToSet = MinSpaceCfg;
6632         MinSpacingToSet &= 0x07; // We only care about bit[2:0]
6633         priv->MinSpaceCfg |= MinSpacingToSet;
6634         RT_TRACE(COMP_SEC, "Set AMPDU_MIN_SPACE: %x\n", priv->MinSpaceCfg);
6635         write_nic_byte(dev, AMPDU_MIN_SPACE, priv->MinSpaceCfg);//FIXLZM
6636 #endif
6637 }
6638 #endif
6639
6640 //
6641 //      Description:
6642 //              Initial HW relted registers.
6643 //
6644 //      Assumption:
6645 //              1. This function is only invoked at driver intialization once.
6646 //              2. PASSIVE LEVEL.
6647 //
6648 //      2008.06.10, Added by Roger.
6649 //
6650 static void rtl8192SU_MacConfigAfterFwDownload(struct net_device *dev)
6651 {
6652         struct r8192_priv *priv = ieee80211_priv((struct net_device *)dev);
6653         //PRT_HIGH_THROUGHPUT   pHTInfo = priv->ieee80211->pHTInfo;
6654         //u8    tmpU1b, RxPageCfg, i;
6655         u16     tmpU2b;
6656         u8      tmpU1b;//, i;
6657
6658
6659         RT_TRACE(COMP_INIT, "--->MacConfigAfterFwDownload()\n");
6660
6661         // Enable Tx/Rx
6662         tmpU2b = (BBRSTn|BB_GLB_RSTn|SCHEDULE_EN|MACRXEN|MACTXEN|DDMA_EN|
6663                          FW2HW_EN|RXDMA_EN|TXDMA_EN|HCI_RXDMA_EN|HCI_TXDMA_EN);         //3
6664         //Adapter->HalFunc.SetHwRegHandler( Adapter, HW_VAR_COMMAND, &tmpU1b );
6665         write_nic_word(dev, CMDR, tmpU2b); //LZM REGISTER COM 090305
6666
6667         // Loopback mode or not
6668         priv->LoopbackMode = RTL8192SU_NO_LOOPBACK; // Set no loopback as default.
6669         if(priv->LoopbackMode == RTL8192SU_NO_LOOPBACK)
6670                 tmpU1b = LBK_NORMAL;
6671         else if (priv->LoopbackMode == RTL8192SU_MAC_LOOPBACK )
6672                 tmpU1b = LBK_MAC_DLB;
6673         else
6674                 RT_TRACE(COMP_INIT, "Serious error: wrong loopback mode setting\n");
6675
6676         //Adapter->HalFunc.SetHwRegHandler( Adapter, HW_VAR_LBK_MODE, &tmpU1b);
6677         write_nic_byte(dev, LBKMD_SEL, tmpU1b);
6678
6679         // Set RCR
6680         write_nic_dword(dev, RCR, priv->ReceiveConfig);
6681         RT_TRACE(COMP_INIT, "MacConfigAfterFwDownload(): Current RCR settings(%#x)\n", priv->ReceiveConfig);
6682
6683
6684         // Set RQPN
6685         //
6686         // <Roger_Notes> 2008.08.18.
6687         // 6 endpoints:
6688         // (1) Page number on CMDQ is 0x03.
6689         // (2) Page number on BCNQ, HQ and MGTQ is 0.
6690         // (3) Page number on BKQ, BEQ, VIQ and VOQ are 0x07.
6691         // (4) Page number on PUBQ is 0xdd
6692         //
6693         // 11 endpoints:
6694         // (1) Page number on CMDQ is 0x00.
6695         // (2) Page number on BCNQ is 0x02, HQ and MGTQ are 0x03.
6696         // (3) Page number on BKQ, BEQ, VIQ and VOQ are 0x07.
6697         // (4) Page number on PUBQ is 0xd8
6698         //
6699         //write_nic_dword(Adapter, 0xa0, 0x07070707); //BKQ, BEQ, VIQ and VOQ
6700         //write_nic_byte(dev, 0xa4, 0x00); // HCCAQ
6701 #if 0    //LZM 090219
6702 #ifdef USE_SIX_USB_ENDPOINT
6703         //write_nic_dword(Adapter, 0xa5, 0x00000003); //CMDQ, MGTQ, HQ and BCNQ
6704         //write_nic_byte(dev, 0xa9, 0xdd); // PUBQ
6705         tmpU1b = read_nic_byte(dev, 0xab); // RQPN
6706         write_nic_byte(dev, 0xab, tmpU1b|BIT7|BIT6);// reduce to 6 endpoints.
6707 #else
6708         write_nic_dword(dev, 0xa5, 0x02030300); //CMDQ, MGTQ, HQ and BCNQ
6709         write_nic_byte(dev, 0xa9, 0xd8); // PUBQ
6710         tmpU1b = read_nic_byte(dev, 0xab); // RQPN
6711         write_nic_byte(dev, 0xab, (tmpU1b&(~BIT6))|BIT7); // Disable reduced endpoint.
6712 #endif
6713 #endif
6714
6715
6716         // Fix the RX FIFO issue(USB error), Rivesed by Roger, 2008-06-14
6717         tmpU1b = read_nic_byte_E(dev, 0x5C);
6718         write_nic_byte_E(dev, 0x5C, tmpU1b|BIT7);
6719
6720         //
6721         // Revise USB PHY to solve the issue of Rx payload error, Rivesed by Roger,  2008-04-10
6722         // Suggest by SD1 Alex.
6723         //
6724         // <Roger_Notes> The following operation are ONLY for USB PHY test chip.
6725         // 2008.10.07.
6726         //
6727 #if RTL8192SU_USB_PHY_TEST
6728         write_nic_byte(dev, 0x41,0xf4);
6729         write_nic_byte(dev, 0x40,0x00);
6730         write_nic_byte(dev, 0x42,0x00);
6731         write_nic_byte(dev, 0x42,0x01);
6732         write_nic_byte(dev, 0x40,0x0f);
6733         write_nic_byte(dev, 0x42,0x00);
6734         write_nic_byte(dev, 0x42,0x01);
6735 #endif
6736
6737 #if 0 //LZM 090219
6738         //
6739         // Suggested by SD1 Alex, 2008-06-14.
6740         //
6741         write_nic_byte(dev, TXOP_STALL_CTRL, 0x80);//NAV
6742
6743
6744         //
6745         // Set Data Auto Rate Fallback Retry Count register.
6746         //
6747         write_nic_dword(dev, DARFRC, 0x04010000);
6748         write_nic_dword(dev, DARFRC+4, 0x09070605);
6749         write_nic_dword(dev, RARFRC, 0x04010000);
6750         write_nic_dword(dev, RARFRC+4, 0x09070605);
6751
6752         // Set Data Auto Rate Fallback Reg. Added by Roger, 2008.09.22.
6753         for (i = 0; i < 8; i++)
6754                 write_nic_dword(dev, ARFR0+i*4, 0x1f0ffff0);
6755
6756         //
6757         // Set driver info, we only accept PHY status now.
6758         //
6759         //write_nic_byte(dev, RXDRVINFO_SZ, 4);
6760
6761         //
6762         // Aggregation length limit. Revised by Roger. 2008.09.22.
6763         //
6764         write_nic_dword(dev, AGGLEN_LMT_L, 0x66666666); // Long GI
6765         write_nic_byte(dev, AGGLEN_LMT_H, 0x06);        // Set AMPDU length to 12Kbytes for ShortGI case.
6766
6767         //
6768         // For Min Spacing configuration.
6769         //
6770         //Adapter->HalFunc.SetHwRegHandler(Adapter, HW_VAR_AMPDU_MIN_SPACE, (u8*)(&Adapter->MgntInfo.MinSpaceCfg));
6771         rtl8192SU_SetHwRegAmpduMinSpace(dev,priv->MinSpaceCfg);
6772 #endif
6773
6774         // For EFUSE init configuration.
6775         //if (IS_BOOT_FROM_EFUSE(Adapter))      // We may R/W EFUSE in EFUSE mode
6776         if (priv->bBootFromEfuse)
6777         {
6778                 u8      tempval;
6779
6780                 tempval = read_nic_byte(dev, SYS_ISO_CTRL+1);
6781                 tempval &= 0xFE;
6782                 write_nic_byte(dev, SYS_ISO_CTRL+1, tempval);
6783
6784                 // Enable LDO 2.5V for write action
6785                 //tempval = read_nic_byte(Adapter, EFUSE_TEST+3);
6786                 //write_nic_byte(Adapter, EFUSE_TEST+3, (tempval | 0x80));
6787
6788                 // Change Efuse Clock for write action
6789                 //write_nic_byte(Adapter, EFUSE_CLK, 0x03);
6790
6791                 // Change Program timing
6792                 write_nic_byte(dev, EFUSE_CTRL+3, 0x72);
6793                 //printk("!!!!!!!!!!!!!!!!!!!!!%s: write 0x33 with 0x72\n",__FUNCTION__);
6794                 RT_TRACE(COMP_INIT, "EFUSE CONFIG OK\n");
6795         }
6796
6797
6798         RT_TRACE(COMP_INIT, "<---MacConfigAfterFwDownload()\n");
6799 }
6800
6801 void rtl8192SU_HwConfigureRTL8192SUsb(struct net_device *dev)
6802 {
6803
6804         struct r8192_priv *priv = ieee80211_priv(dev);
6805         u8                      regBwOpMode = 0;
6806         u32                     regRATR = 0, regRRSR = 0;
6807         u8                      regTmp = 0;
6808         u32                     i = 0;
6809
6810         //1 This part need to modified according to the rate set we filtered!!
6811         //
6812         // Set RRSR, RATR, and BW_OPMODE registers
6813         //
6814         switch(priv->ieee80211->mode)
6815         {
6816         case WIRELESS_MODE_B:
6817                 regBwOpMode = BW_OPMODE_20MHZ;
6818                 regRATR = RATE_ALL_CCK;
6819                 regRRSR = RATE_ALL_CCK;
6820                 break;
6821         case WIRELESS_MODE_A:
6822                 regBwOpMode = BW_OPMODE_5G |BW_OPMODE_20MHZ;
6823                 regRATR = RATE_ALL_OFDM_AG;
6824                 regRRSR = RATE_ALL_OFDM_AG;
6825                 break;
6826         case WIRELESS_MODE_G:
6827                 regBwOpMode = BW_OPMODE_20MHZ;
6828                 regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
6829                 regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
6830                 break;
6831         case WIRELESS_MODE_AUTO:
6832                 if (priv->bInHctTest)
6833                 {
6834                     regBwOpMode = BW_OPMODE_20MHZ;
6835                     regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
6836                     regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
6837                 }
6838                 else
6839                 {
6840                     regBwOpMode = BW_OPMODE_20MHZ;
6841                     regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG | RATE_ALL_OFDM_1SS | RATE_ALL_OFDM_2SS;
6842                     regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
6843                 }
6844                 break;
6845         case WIRELESS_MODE_N_24G:
6846                 // It support CCK rate by default.
6847                 // CCK rate will be filtered out only when associated AP does not support it.
6848                 regBwOpMode = BW_OPMODE_20MHZ;
6849                         regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG | RATE_ALL_OFDM_1SS | RATE_ALL_OFDM_2SS;
6850                         regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
6851                 break;
6852         case WIRELESS_MODE_N_5G:
6853                 regBwOpMode = BW_OPMODE_5G;
6854                 regRATR = RATE_ALL_OFDM_AG | RATE_ALL_OFDM_1SS | RATE_ALL_OFDM_2SS;
6855                 regRRSR = RATE_ALL_OFDM_AG;
6856                 break;
6857         }
6858
6859         //
6860         // <Roger_Notes> We disable CCK response rate until FIB CCK rate IC's back.
6861         // 2008.09.23.
6862         //
6863         regTmp = read_nic_byte(dev, INIRTSMCS_SEL);
6864         regRRSR = ((regRRSR & 0x000fffff)<<8) | regTmp;
6865
6866         //
6867         // Update SIFS timing.
6868         //
6869         //priv->SifsTime = 0x0e0e0a0a;
6870         //Adapter->HalFunc.SetHwRegHandler( Adapter, HW_VAR_SIFS,  (pu1Byte)&pHalData->SifsTime);
6871         {       u8 val[4] = {0x0e, 0x0e, 0x0a, 0x0a};
6872                 // SIFS for CCK Data ACK
6873                 write_nic_byte(dev, SIFS_CCK, val[0]);
6874                 // SIFS for CCK consecutive tx like CTS data!
6875                 write_nic_byte(dev, SIFS_CCK+1, val[1]);
6876
6877                 // SIFS for OFDM Data ACK
6878                 write_nic_byte(dev, SIFS_OFDM, val[2]);
6879                 // SIFS for OFDM consecutive tx like CTS data!
6880                 write_nic_byte(dev, SIFS_OFDM+1, val[3]);
6881         }
6882
6883         write_nic_dword(dev, INIRTSMCS_SEL, regRRSR);
6884         write_nic_byte(dev, BW_OPMODE, regBwOpMode);
6885
6886         //
6887         // Suggested by SD1 Alex, 2008-06-14.
6888         //
6889         //PlatformEFIOWrite1Byte(Adapter, TXOP_STALL_CTRL, 0x80);//NAV to protect all TXOP.
6890
6891         //
6892         // Set Data Auto Rate Fallback Retry Count register.
6893         //
6894         write_nic_dword(dev, DARFRC, 0x02010000);
6895         write_nic_dword(dev, DARFRC+4, 0x06050403);
6896         write_nic_dword(dev, RARFRC, 0x02010000);
6897         write_nic_dword(dev, RARFRC+4, 0x06050403);
6898
6899         // Set Data Auto Rate Fallback Reg. Added by Roger, 2008.09.22.
6900         for (i = 0; i < 8; i++)
6901                 write_nic_dword(dev, ARFR0+i*4, 0x1f0ffff0);
6902
6903         //
6904         // Aggregation length limit. Revised by Roger. 2008.09.22.
6905         //
6906         write_nic_byte(dev, AGGLEN_LMT_H, 0x0f);        // Set AMPDU length to 12Kbytes for ShortGI case.
6907         write_nic_dword(dev, AGGLEN_LMT_L, 0xddd77442); // Long GI
6908         write_nic_dword(dev, AGGLEN_LMT_L+4, 0xfffdd772);
6909
6910         // Set NAV protection length
6911         write_nic_word(dev, NAV_PROT_LEN, 0x0080);
6912
6913         // Set TXOP stall control for several queue/HI/BCN/MGT/
6914         write_nic_byte(dev, TXOP_STALL_CTRL, 0x00); // NAV Protect next packet.
6915
6916         // Set MSDU lifetime.
6917         write_nic_byte(dev, MLT, 0x8f);
6918
6919         // Set CCK/OFDM SIFS
6920         write_nic_word(dev, SIFS_CCK, 0x0a0a); // CCK SIFS shall always be 10us.
6921         write_nic_word(dev, SIFS_OFDM, 0x0e0e);
6922
6923         write_nic_byte(dev, ACK_TIMEOUT, 0x40);
6924
6925         // CF-END Threshold
6926         write_nic_byte(dev, CFEND_TH, 0xFF);
6927
6928         //
6929         // For Min Spacing configuration.
6930         //
6931         switch(priv->rf_type)
6932         {
6933                 case RF_1T2R:
6934                 case RF_1T1R:
6935                         RT_TRACE(COMP_INIT, "Initializeadapter: RF_Type%s\n", (priv->rf_type==RF_1T1R? "(1T1R)":"(1T2R)"));
6936                         priv->MinSpaceCfg = (MAX_MSS_DENSITY_1T<<3);
6937                         break;
6938                 case RF_2T2R:
6939                 case RF_2T2R_GREEN:
6940                         RT_TRACE(COMP_INIT, "Initializeadapter:RF_Type(2T2R)\n");
6941                         priv->MinSpaceCfg = (MAX_MSS_DENSITY_2T<<3);
6942                         break;
6943         }
6944         write_nic_byte(dev, AMPDU_MIN_SPACE, priv->MinSpaceCfg);
6945
6946         //LZM 090219
6947         //
6948         // For Min Spacing configuration.
6949         //
6950         //priv->MinSpaceCfg = 0x00;
6951         //rtl8192SU_SetHwRegAmpduMinSpace(dev, priv->MinSpaceCfg);
6952 }
6953
6954 #endif
6955
6956 #ifdef RTL8192SU
6957 //      Description:    Initial HW relted registers.
6958 //
6959 //      Assumption:     This function is only invoked at driver intialization once.
6960 //
6961 //      2008.06.10, Added by Roger.
6962 bool rtl8192SU_adapter_start(struct net_device *dev)
6963 {
6964         struct r8192_priv *priv = ieee80211_priv(dev);
6965         //u32                                   dwRegRead = 0;
6966         //bool                                  init_status = true;
6967         //u32                                   ulRegRead;
6968         bool                                            rtStatus = true;
6969         //u8                                    PipeIndex;
6970         //u8                                    eRFPath, tmpU1b;
6971         u8 fw_download_times = 1;
6972
6973
6974         RT_TRACE(COMP_INIT, "--->InitializeAdapter8192SUsb()\n");
6975
6976         //pHalData->bGPIOChangeRF = FALSE;
6977
6978
6979         //
6980         // <Roger_Notes> 2008.06.15.
6981         //
6982         // Initialization Steps on RTL8192SU:
6983         // a. MAC initialization prior to sending down firmware code.
6984         // b. Download firmware code step by step(i.e., IMEM, EMEM, DMEM).
6985         // c. MAC configuration after firmware has been download successfully.
6986         // d. Initialize BB related configurations.
6987         // e. Initialize RF related configurations.
6988         // f.  Start to BulkIn transfer.
6989         //
6990
6991         //
6992         //a. MAC initialization prior to send down firmware code.
6993         //
6994 start:
6995         rtl8192SU_MacConfigBeforeFwDownloadASIC(dev);
6996
6997         //
6998         //b. Download firmware code step by step(i.e., IMEM, EMEM, DMEM).
6999         //
7000         rtStatus = FirmwareDownload92S(dev);
7001         if(rtStatus != true)
7002         {
7003                 if(fw_download_times == 1){
7004                         RT_TRACE(COMP_INIT, "InitializeAdapter8192SUsb(): Download Firmware failed once, Download again!!\n");
7005                         fw_download_times = fw_download_times + 1;
7006                         goto start;
7007                 }else{
7008                         RT_TRACE(COMP_INIT, "InitializeAdapter8192SUsb(): Download Firmware failed twice, end!!\n");
7009                 goto end;
7010         }
7011         }
7012         //
7013         //c. MAC configuration after firmware has been download successfully.
7014         //
7015         rtl8192SU_MacConfigAfterFwDownload(dev);
7016
7017         //priv->bLbusEnable = TRUE;
7018         //if(priv->RegRfOff == TRUE)
7019         //      priv->eRFPowerState = eRfOff;
7020
7021         // Save target channel
7022         // <Roger_Notes> Current Channel will be updated again later.
7023         //priv->CurrentChannel = Channel;
7024         rtStatus = PHY_MACConfig8192S(dev);//===>ok
7025         if(rtStatus != true)
7026         {
7027                 RT_TRACE(COMP_INIT, "InitializeAdapter8192SUsb(): Fail to configure MAC!!\n");
7028                 goto end;
7029         }
7030         if (1){
7031                 int i;
7032                 for (i=0; i<4; i++)
7033                         write_nic_dword(dev,WDCAPARA_ADD[i], 0x5e4322);
7034                 write_nic_byte(dev,AcmHwCtrl, 0x01);
7035         }
7036
7037
7038         //
7039         //d. Initialize BB related configurations.
7040         //
7041
7042         rtStatus = PHY_BBConfig8192S(dev);//===>ok
7043         if(rtStatus != true)
7044         {
7045                 RT_TRACE(COMP_INIT, "InitializeAdapter8192SUsb(): Fail to configure BB!!\n");
7046                 goto end;
7047         }
7048
7049         rtl8192_setBBreg(dev, rFPGA0_AnalogParameter2, 0xff, 0x58);//===>ok
7050
7051         //
7052         // e. Initialize RF related configurations.
7053         //
7054         // 2007/11/02 MH Before initalizing RF. We can not use FW to do RF-R/W.
7055         priv->Rf_Mode = RF_OP_By_SW_3wire;
7056
7057         // For RF test only from Scott's suggestion
7058         //write_nic_byte(dev, 0x27, 0xDB);
7059         //write_nic_byte(dev, 0x1B, 0x07);
7060
7061
7062         write_nic_byte(dev, AFE_XTAL_CTRL+1, 0xDB);
7063
7064         // <Roger_Notes> The following IOs are configured for each RF modules.
7065         // Enable RF module and reset RF and SDM module. 2008.11.17.
7066         if(priv->card_8192_version == VERSION_8192S_ACUT)
7067                 write_nic_byte(dev, SPS1_CTRL+3, (u8)(RF_EN|RF_RSTB|RF_SDMRSTB)); // Fix A-Cut bug.
7068         else
7069                 write_nic_byte(dev, RF_CTRL, (u8)(RF_EN|RF_RSTB|RF_SDMRSTB));
7070
7071         rtStatus = PHY_RFConfig8192S(dev);//===>ok
7072         if(rtStatus != true)
7073         {
7074                 RT_TRACE(COMP_INIT, "InitializeAdapter8192SUsb(): Fail to configure RF!!\n");
7075                 goto end;
7076         }
7077
7078
7079         // Set CCK and OFDM Block "ON"
7080         rtl8192_setBBreg(dev, rFPGA0_RFMOD, bCCKEn, 0x1);
7081         rtl8192_setBBreg(dev, rFPGA0_RFMOD, bOFDMEn, 0x1);
7082
7083         //
7084         // Turn off Radio B while RF type is 1T1R by SD3 Wilsion's request.
7085         // Revised by Roger, 2008.12.18.
7086         //
7087         if(priv->rf_type == RF_1T1R)
7088         {
7089                 // This is needed for PHY_REG after 20081219
7090                 rtl8192_setBBreg(dev, rFPGA0_RFMOD, 0xff000000, 0x03);
7091                 // This is needed for PHY_REG before 20081219
7092                 //PHY_SetBBReg(Adapter, rOFDM0_TRxPathEnable, bMaskByte0, 0x11);
7093         }
7094
7095 #if (RTL8192SU_DISABLE_IQK==0)
7096                 // For 1T2R IQK only currently.
7097                 if (priv->card_8192_version == VERSION_8192S_BCUT)
7098                 {
7099                         PHY_IQCalibrateBcut(dev);
7100                 }
7101                 else if (priv->card_8192_version == VERSION_8192S_ACUT)
7102                 {
7103                         PHY_IQCalibrate(dev);
7104                 }
7105 #endif
7106
7107         //LZM 090219
7108         // Set CCK and OFDM Block "ON"
7109         //rtl8192_setBBreg(dev, rFPGA0_RFMOD, bCCKEn, 0x1);
7110         //rtl8192_setBBreg(dev, rFPGA0_RFMOD, bOFDMEn, 0x1);
7111
7112
7113         //3//Get hardware version, do it in read eeprom?
7114         //GetHardwareVersion819xUsb(Adapter);
7115
7116         //3//
7117         //3 //Set Hardware
7118         //3//
7119         rtl8192SU_HwConfigureRTL8192SUsb(dev);//==>ok
7120
7121         //
7122         // <Roger_Notes> We set MAC address here if autoload was failed before,
7123         // otherwise IDR0 will NOT contain any value.
7124         //
7125         write_nic_dword(dev, IDR0, ((u32*)dev->dev_addr)[0]);
7126         write_nic_word(dev, IDR4, ((u16*)(dev->dev_addr + 4))[0]);
7127         if(!priv->bInHctTest)
7128         {
7129                 if(priv->ResetProgress == RESET_TYPE_NORESET)
7130                 {
7131                         //RT_TRACE(COMP_MLME, DBG_LOUD, ("Initializeadapter8192SUsb():RegWirelessMode(%#x) \n", Adapter->RegWirelessMode));
7132                         //Adapter->HalFunc.SetWirelessModeHandler(Adapter, Adapter->RegWirelessMode);
7133                         rtl8192_SetWirelessMode(dev, priv->ieee80211->mode);//===>ok
7134                 }
7135         }
7136         else
7137         {
7138                 priv->ieee80211->mode = WIRELESS_MODE_G;
7139                 rtl8192_SetWirelessMode(dev, WIRELESS_MODE_G);
7140         }
7141
7142         //Security related.
7143         //-----------------------------------------------------------------------------
7144         // Set up security related. 070106, by rcnjko:
7145         // 1. Clear all H/W keys.
7146         // 2. Enable H/W encryption/decryption.
7147         //-----------------------------------------------------------------------------
7148         //CamResetAllEntry(Adapter);
7149         //Adapter->HalFunc.EnableHWSecCfgHandler(Adapter);
7150
7151         //SecClearAllKeys(Adapter);
7152         CamResetAllEntry(dev);
7153         //SecInit(Adapter);
7154         {
7155                 u8 SECR_value = 0x0;
7156                 SECR_value |= SCR_TxEncEnable;
7157                 SECR_value |= SCR_RxDecEnable;
7158                 SECR_value |= SCR_NoSKMC;
7159                 write_nic_byte(dev, SECR, SECR_value);
7160         }
7161
7162 #if 0
7163
7164         if(pHalData->VersionID == VERSION_8192SU_A)
7165         {
7166                 // cosa add for tx power level initialization.
7167                 GetTxPowerOriginalOffset(Adapter);
7168                 SetTxPowerLevel819xUsb(Adapter, Channel);
7169         }
7170 #endif
7171
7172
7173 #ifdef TO_DO_LIST
7174
7175         //PHY_UpdateInitialGain(dev);
7176
7177         if(priv->RegRfOff == true)
7178         { // User disable RF via registry.
7179                 u8 eRFPath = 0;
7180
7181                 RT_TRACE((COMP_INIT|COMP_RF), "InitializeAdapter8192SUsb(): Turn off RF for RegRfOff ----------\n");
7182                 MgntActSet_RF_State(dev, eRfOff, RF_CHANGE_BY_SW);
7183                 // Those action will be discard in MgntActSet_RF_State because off the same state
7184                 for(eRFPath = 0; eRFPath <priv->NumTotalRFPath; eRFPath++)
7185                         rtl8192_setBBreg(dev, (RF90_RADIO_PATH_E)eRFPath, 0x4, 0xC00, 0x0);
7186         }
7187         else if(priv->RfOffReason > RF_CHANGE_BY_PS)
7188         { // H/W or S/W RF OFF before sleep.
7189                 RT_TRACE((COMP_INIT|COMP_RF), "InitializeAdapter8192SUsb(): Turn off RF for RfOffReason(%d) ----------\n", priv->RfOffReason);
7190                 MgntActSet_RF_State(dev, eRfOff, priv->RfOffReason);
7191         }
7192         else
7193         {
7194                 priv->eRFPowerState = eRfOn;
7195                 priv->RfOffReason = 0;
7196                 RT_TRACE((COMP_INIT|COMP_RF), "InitializeAdapter8192SUsb(): RF is on ----------\n");
7197         }
7198
7199 #endif
7200
7201
7202 //
7203 // f. Start to BulkIn transfer.
7204 //
7205 #ifdef TO_DO_LIST
7206
7207 #ifndef UNDER_VISTA
7208         {
7209                 u8      i;
7210                 PlatformAcquireSpinLock(Adapter, RT_RX_SPINLOCK);
7211
7212                 for(PipeIndex=0; PipeIndex < MAX_RX_QUEUE; PipeIndex++)
7213                 {
7214                         if (PipeIndex == 0)
7215                         {
7216                                 for(i=0; i<32; i++)
7217                                 HalUsbInMpdu(Adapter, PipeIndex);
7218                         }
7219                         else
7220                         {
7221                                 //HalUsbInMpdu(Adapter, PipeIndex);
7222                                 //HalUsbInMpdu(Adapter, PipeIndex);
7223                                 //HalUsbInMpdu(Adapter, PipeIndex);
7224                         }
7225                 }
7226                 PlatformReleaseSpinLock(Adapter, RT_RX_SPINLOCK);
7227         }
7228 #else
7229                 // Joseph add to 819X code base for Vista USB platform.
7230                 // This part may need to be add to Hal819xU code base. too.
7231                 PlatformUsbEnableInPipes(Adapter);
7232 #endif
7233
7234         RT_TRACE(COMP_INIT, "HighestOperaRate = %x\n", Adapter->MgntInfo.HighestOperaRate);
7235
7236         PlatformStartWorkItem( &(pHalData->RtUsbCheckForHangWorkItem) );
7237
7238         //
7239         // <Roger_EXP> The following  configurations are for ASIC verification temporally.
7240         // 2008.07.10.
7241         //
7242
7243 #endif
7244
7245         //
7246         // Read EEPROM TX power index and PHY_REG_PG.txt to capture correct
7247         // TX power index for different rate set.
7248         //
7249         //if(priv->card_8192_version >= VERSION_8192S_ACUT)
7250         {
7251                 // Get original hw reg values
7252                 PHY_GetHWRegOriginalValue(dev);
7253
7254                 // Write correct tx power index//FIXLZM
7255                 PHY_SetTxPowerLevel8192S(dev, priv->chan);
7256         }
7257
7258         {
7259         u8  tmpU1b = 0;
7260         // EEPROM R/W workaround
7261         tmpU1b = read_nic_byte(dev, MAC_PINMUX_CFG);
7262         write_nic_byte(dev, MAC_PINMUX_CFG, tmpU1b&(~GPIOMUX_EN));
7263         }
7264
7265 //
7266 //<Roger_Notes> 2008.08.19.
7267 // We return status here for temporal FPGA verification, 2008.08.19.
7268
7269 #ifdef RTL8192SU_FW_IQK
7270         write_nic_dword(dev, WFM5, FW_IQK_ENABLE);
7271         ChkFwCmdIoDone(dev);
7272 #endif
7273
7274         //
7275         // <Roger_Notes> We enable high power mechanism after NIC initialized.
7276         // 2008.11.27.
7277         //
7278         write_nic_dword(dev, WFM5, FW_RA_RESET);
7279         ChkFwCmdIoDone(dev);
7280         write_nic_dword(dev, WFM5, FW_RA_ACTIVE);
7281         ChkFwCmdIoDone(dev);
7282         write_nic_dword(dev, WFM5, FW_RA_REFRESH);
7283         ChkFwCmdIoDone(dev);
7284         write_nic_dword(dev, WFM5, FW_BB_RESET_ENABLE);
7285
7286 // <Roger_Notes> We return status here for temporal FPGA verification. 2008.05.12.
7287 //
7288 #if RTL8192SU_FPGA_UNSPECIFIED_NETWORK
7289         //
7290         // To send specific number of packets to verify MAC Lookback mode.
7291         //
7292         //SendRandomTxPkt(Adapter, 0); // Burst mode for verification.
7293         //rtStatus = RT_STATUS_FAILURE;
7294         rtStatus = true;
7295         goto end;
7296 #endif
7297
7298 // The following IO was for FPGA verification purpose. Added by Roger, 2008.09.11.
7299 #if 0
7300         // 2008/08/19 MH From SD1 Jong, we must write some register for true PHY/MAC FPGA.
7301         write_nic_byte(dev, rOFDM0_XAAGCCore1, 0x30);
7302         write_nic_byte(dev, rOFDM0_XBAGCCore1, 0x30);
7303
7304         write_nic_byte(dev, rOFDM0_RxDetector1, 0x42);
7305
7306         //write_nic_dword(Adapter, RCR, 0x817FF02F);
7307
7308         write_nic_dword(Adapter, rTxAGC_Mcs15_Mcs12, 0x06060606);
7309 #endif
7310 end:
7311 return rtStatus;
7312 }
7313
7314 #else
7315
7316 //InitializeAdapter and PhyCfg
7317 bool rtl8192_adapter_start(struct net_device *dev)
7318 {
7319         struct r8192_priv *priv = ieee80211_priv(dev);
7320         u32 dwRegRead = 0;
7321         bool init_status = true;
7322         RT_TRACE(COMP_INIT, "====>%s()\n", __FUNCTION__);
7323         priv->Rf_Mode = RF_OP_By_SW_3wire;
7324         //for ASIC power on sequence
7325         write_nic_byte_E(dev, 0x5f, 0x80);
7326         mdelay(50);
7327         write_nic_byte_E(dev, 0x5f, 0xf0);
7328         write_nic_byte_E(dev, 0x5d, 0x00);
7329         write_nic_byte_E(dev, 0x5e, 0x80);
7330         write_nic_byte(dev, 0x17, 0x37);
7331         mdelay(10);
7332 //#ifdef TO_DO_LIST
7333         priv->pFirmware->firmware_status = FW_STATUS_0_INIT;
7334         //config CPUReset Register
7335         //Firmware Reset or not?
7336         dwRegRead = read_nic_dword(dev, CPU_GEN);
7337         if (priv->pFirmware->firmware_status == FW_STATUS_0_INIT)
7338                 dwRegRead |= CPU_GEN_SYSTEM_RESET; //do nothing here?
7339         else if (priv->pFirmware->firmware_status == FW_STATUS_5_READY)
7340                 dwRegRead |= CPU_GEN_FIRMWARE_RESET;
7341         else
7342                 RT_TRACE(COMP_ERR, "ERROR in %s(): undefined firmware state(%d)\n", __FUNCTION__,   priv->pFirmware->firmware_status);
7343
7344         write_nic_dword(dev, CPU_GEN, dwRegRead);
7345         //mdelay(30);
7346         //config BB.
7347         rtl8192_BBConfig(dev);
7348
7349 #if 1
7350         //Loopback mode or not
7351         priv->LoopbackMode = RTL819xU_NO_LOOPBACK;
7352 //      priv->LoopbackMode = RTL819xU_MAC_LOOPBACK;
7353
7354         dwRegRead = read_nic_dword(dev, CPU_GEN);
7355         if (priv->LoopbackMode == RTL819xU_NO_LOOPBACK)
7356                 dwRegRead = ((dwRegRead & CPU_GEN_NO_LOOPBACK_MSK) | CPU_GEN_NO_LOOPBACK_SET);
7357         else if (priv->LoopbackMode == RTL819xU_MAC_LOOPBACK)
7358                 dwRegRead |= CPU_CCK_LOOPBACK;
7359         else
7360                 RT_TRACE(COMP_ERR, "Serious error in %s(): wrong loopback mode setting(%d)\n", __FUNCTION__,  priv->LoopbackMode);
7361
7362         write_nic_dword(dev, CPU_GEN, dwRegRead);
7363
7364         //after reset cpu, we need wait for a seconds to write in register.
7365         udelay(500);
7366
7367         //xiong add for new bitfile:usb suspend reset pin set to 1. //do we need?
7368         write_nic_byte_E(dev, 0x5f, (read_nic_byte_E(dev, 0x5f)|0x20));
7369
7370         //Set Hardware
7371         rtl8192_hwconfig(dev);
7372
7373         //turn on Tx/Rx
7374         write_nic_byte(dev, CMDR, CR_RE|CR_TE);
7375
7376         //set IDR0 here
7377         write_nic_dword(dev, MAC0, ((u32*)dev->dev_addr)[0]);
7378         write_nic_word(dev, MAC4, ((u16*)(dev->dev_addr + 4))[0]);
7379
7380         //set RCR
7381         write_nic_dword(dev, RCR, priv->ReceiveConfig);
7382
7383         //Initialize Number of Reserved Pages in Firmware Queue
7384         write_nic_dword(dev, RQPN1,  NUM_OF_PAGE_IN_FW_QUEUE_BK << RSVD_FW_QUEUE_PAGE_BK_SHIFT |\
7385                                                 NUM_OF_PAGE_IN_FW_QUEUE_BE << RSVD_FW_QUEUE_PAGE_BE_SHIFT | \
7386                                                 NUM_OF_PAGE_IN_FW_QUEUE_VI << RSVD_FW_QUEUE_PAGE_VI_SHIFT | \
7387                                                 NUM_OF_PAGE_IN_FW_QUEUE_VO <<RSVD_FW_QUEUE_PAGE_VO_SHIFT);
7388         write_nic_dword(dev, RQPN2, NUM_OF_PAGE_IN_FW_QUEUE_MGNT << RSVD_FW_QUEUE_PAGE_MGNT_SHIFT |\
7389                                                 NUM_OF_PAGE_IN_FW_QUEUE_CMD << RSVD_FW_QUEUE_PAGE_CMD_SHIFT);
7390         write_nic_dword(dev, RQPN3, APPLIED_RESERVED_QUEUE_IN_FW| \
7391                                                 NUM_OF_PAGE_IN_FW_QUEUE_BCN<<RSVD_FW_QUEUE_PAGE_BCN_SHIFT
7392 //                                              | NUM_OF_PAGE_IN_FW_QUEUE_PUB<<RSVD_FW_QUEUE_PAGE_PUB_SHIFT
7393                                                 );
7394         write_nic_dword(dev, RATR0+4*7, (RATE_ALL_OFDM_AG | RATE_ALL_CCK));
7395
7396         //Set AckTimeout
7397         // TODO: (it value is only for FPGA version). need to be changed!!2006.12.18, by Emily
7398         write_nic_byte(dev, ACK_TIMEOUT, 0x30);
7399
7400 //      RT_TRACE(COMP_INIT, "%s():priv->ResetProgress is %d\n", __FUNCTION__,priv->ResetProgress);
7401         if(priv->ResetProgress == RESET_TYPE_NORESET)
7402         rtl8192_SetWirelessMode(dev, priv->ieee80211->mode);
7403         if(priv->ResetProgress == RESET_TYPE_NORESET){
7404         CamResetAllEntry(dev);
7405         {
7406                 u8 SECR_value = 0x0;
7407                 SECR_value |= SCR_TxEncEnable;
7408                 SECR_value |= SCR_RxDecEnable;
7409                 SECR_value |= SCR_NoSKMC;
7410                 write_nic_byte(dev, SECR, SECR_value);
7411         }
7412         }
7413
7414         //Beacon related
7415         write_nic_word(dev, ATIMWND, 2);
7416         write_nic_word(dev, BCN_INTERVAL, 100);
7417
7418         {
7419 #define DEFAULT_EDCA 0x005e4332
7420                 int i;
7421                 for (i=0; i<QOS_QUEUE_NUM; i++)
7422                 write_nic_dword(dev, WDCAPARA_ADD[i], DEFAULT_EDCA);
7423         }
7424
7425         rtl8192_phy_configmac(dev);
7426
7427         if (priv->card_8192_version == (u8) VERSION_819xU_A)
7428         {
7429                 rtl8192_phy_getTxPower(dev);
7430                 rtl8192_phy_setTxPower(dev, priv->chan);
7431         }
7432
7433
7434         priv->usb_error = false;
7435         //Firmware download
7436         init_status = init_firmware(dev);
7437         if(!init_status)
7438         {
7439                 RT_TRACE(COMP_ERR,"ERR!!! %s(): Firmware download is failed\n", __FUNCTION__);
7440                 return init_status;
7441         }
7442         RT_TRACE(COMP_INIT, "%s():after firmware download\n", __FUNCTION__);
7443         //
7444 #ifdef TO_DO_LIST
7445 if(Adapter->ResetProgress == RESET_TYPE_NORESET)
7446         {
7447                 if(pMgntInfo->RegRfOff == TRUE)
7448                 { // User disable RF via registry.
7449                         RT_TRACE((COMP_INIT|COMP_RF), DBG_LOUD, ("InitializeAdapter819xUsb(): Turn off RF for RegRfOff ----------\n"));
7450                         MgntActSet_RF_State(Adapter, eRfOff, RF_CHANGE_BY_SW);
7451                         // Those action will be discard in MgntActSet_RF_State because off the same state
7452                         for(eRFPath = 0; eRFPath <pHalData->NumTotalRFPath; eRFPath++)
7453                                 PHY_SetRFReg(Adapter, (RF90_RADIO_PATH_E)eRFPath, 0x4, 0xC00, 0x0);
7454                 }
7455                 else if(pMgntInfo->RfOffReason > RF_CHANGE_BY_PS)
7456                 { // H/W or S/W RF OFF before sleep.
7457                         RT_TRACE((COMP_INIT|COMP_RF), DBG_LOUD, ("InitializeAdapter819xUsb(): Turn off RF for RfOffReason(%d) ----------\n", pMgntInfo->RfOffReason));
7458                         MgntActSet_RF_State(Adapter, eRfOff, pMgntInfo->RfOffReason);
7459                 }
7460                 else
7461                 {
7462                         pHalData->eRFPowerState = eRfOn;
7463                         pMgntInfo->RfOffReason = 0;
7464                         RT_TRACE((COMP_INIT|COMP_RF), DBG_LOUD, ("InitializeAdapter819xUsb(): RF is on ----------\n"));
7465                 }
7466         }
7467         else
7468         {
7469                 if(pHalData->eRFPowerState == eRfOff)
7470                 {
7471                         MgntActSet_RF_State(Adapter, eRfOff, pMgntInfo->RfOffReason);
7472                         // Those action will be discard in MgntActSet_RF_State because off the same state
7473                         for(eRFPath = 0; eRFPath <pHalData->NumTotalRFPath; eRFPath++)
7474                                 PHY_SetRFReg(Adapter, (RF90_RADIO_PATH_E)eRFPath, 0x4, 0xC00, 0x0);
7475                 }
7476         }
7477 #endif
7478         //config RF.
7479         if(priv->ResetProgress == RESET_TYPE_NORESET){
7480         rtl8192_phy_RFConfig(dev);
7481         RT_TRACE(COMP_INIT, "%s():after phy RF config\n", __FUNCTION__);
7482         }
7483
7484
7485         if(priv->ieee80211->FwRWRF)
7486                 // We can force firmware to do RF-R/W
7487                 priv->Rf_Mode = RF_OP_By_FW;
7488         else
7489                 priv->Rf_Mode = RF_OP_By_SW_3wire;
7490
7491
7492         rtl8192_phy_updateInitGain(dev);
7493         /*--set CCK and OFDM Block "ON"--*/
7494         rtl8192_setBBreg(dev, rFPGA0_RFMOD, bCCKEn, 0x1);
7495         rtl8192_setBBreg(dev, rFPGA0_RFMOD, bOFDMEn, 0x1);
7496
7497         if(priv->ResetProgress == RESET_TYPE_NORESET)
7498         {
7499                 //if D or C cut
7500                 u8 tmpvalue = read_nic_byte(dev, 0x301);
7501                 if(tmpvalue ==0x03)
7502                 {
7503                         priv->bDcut = TRUE;
7504                         RT_TRACE(COMP_POWER_TRACKING, "D-cut\n");
7505                 }
7506                 else
7507                 {
7508                         priv->bDcut = FALSE;
7509                         RT_TRACE(COMP_POWER_TRACKING, "C-cut\n");
7510                 }
7511                 dm_initialize_txpower_tracking(dev);
7512
7513                 if(priv->bDcut == TRUE)
7514                 {
7515                         u32 i, TempCCk;
7516                         u32 tmpRegA= rtl8192_QueryBBReg(dev,rOFDM0_XATxIQImbalance,bMaskDWord);
7517                 //      u32 tmpRegC= rtl8192_QueryBBReg(dev,rOFDM0_XCTxIQImbalance,bMaskDWord);
7518                         for(i = 0; i<TxBBGainTableLength; i++)
7519                         {
7520                                 if(tmpRegA == priv->txbbgain_table[i].txbbgain_value)
7521                                 {
7522                                         priv->rfa_txpowertrackingindex= (u8)i;
7523                                         priv->rfa_txpowertrackingindex_real= (u8)i;
7524                                         priv->rfa_txpowertracking_default= priv->rfa_txpowertrackingindex;
7525                                         break;
7526                                 }
7527                         }
7528
7529                         TempCCk = rtl8192_QueryBBReg(dev, rCCK0_TxFilter1, bMaskByte2);
7530
7531                         for(i=0 ; i<CCKTxBBGainTableLength ; i++)
7532                         {
7533
7534                                 if(TempCCk == priv->cck_txbbgain_table[i].ccktxbb_valuearray[0])
7535                                 {
7536                                         priv->cck_present_attentuation_20Mdefault=(u8) i;
7537                                         break;
7538                                 }
7539                         }
7540                         priv->cck_present_attentuation_40Mdefault= 0;
7541                         priv->cck_present_attentuation_difference= 0;
7542                         priv->cck_present_attentuation = priv->cck_present_attentuation_20Mdefault;
7543
7544         //              pMgntInfo->bTXPowerTracking = FALSE;//TEMPLY DISABLE
7545                 }
7546         }
7547         write_nic_byte(dev, 0x87, 0x0);
7548
7549
7550 #endif
7551         return init_status;
7552 }
7553
7554 #endif
7555 /* this configures registers for beacon tx and enables it via
7556  * rtl8192_beacon_tx_enable(). rtl8192_beacon_tx_disable() might
7557  * be used to stop beacon transmission
7558  */
7559 #if 0
7560 void rtl8192_start_tx_beacon(struct net_device *dev)
7561 {
7562         int i;
7563         struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
7564         u16 word;
7565         DMESG("Enabling beacon TX");
7566         //write_nic_byte(dev, TX_CONF,0xe6);// TX_CONF
7567         //rtl8192_init_beacon(dev);
7568         //set_nic_txring(dev);
7569 //      rtl8192_prepare_beacon(dev);
7570         rtl8192_irq_disable(dev);
7571 //      rtl8192_beacon_tx_enable(dev);
7572         rtl8192_set_mode(dev,EPROM_CMD_CONFIG);
7573         //write_nic_byte(dev,0x9d,0x20); //DMA Poll
7574         //write_nic_word(dev,0x7a,0);
7575         //write_nic_word(dev,0x7a,0x8000);
7576
7577
7578         word  = read_nic_word(dev, BcnItv);
7579         word &= ~BcnItv_BcnItv; // clear Bcn_Itv
7580         write_nic_word(dev, BcnItv, word);
7581
7582         write_nic_word(dev, AtimWnd,
7583                        read_nic_word(dev, AtimWnd) &~ AtimWnd_AtimWnd);
7584
7585         word  = read_nic_word(dev, BCN_INTR_ITV);
7586         word &= ~BCN_INTR_ITV_MASK;
7587
7588         //word |= priv->ieee80211->beacon_interval *
7589         //      ((priv->txbeaconcount > 1)?(priv->txbeaconcount-1):1);
7590         // FIXME:FIXME check if correct ^^ worked with 0x3e8;
7591
7592         write_nic_word(dev, BCN_INTR_ITV, word);
7593
7594         //write_nic_word(dev,0x2e,0xe002);
7595         //write_nic_dword(dev,0x30,0xb8c7832e);
7596         for(i=0; i<ETH_ALEN; i++)
7597                 write_nic_byte(dev, BSSID+i, priv->ieee80211->beacon_cell_ssid[i]);
7598
7599 //      rtl8192_update_msr(dev);
7600
7601
7602         //write_nic_byte(dev,CONFIG4,3); /* !!!!!!!!!! */
7603
7604         rtl8192_set_mode(dev, EPROM_CMD_NORMAL);
7605
7606         rtl8192_irq_enable(dev);
7607
7608         /* VV !!!!!!!!!! VV*/
7609         /*
7610         rtl8192_set_mode(dev,EPROM_CMD_CONFIG);
7611         write_nic_byte(dev,0x9d,0x00);
7612         rtl8192_set_mode(dev,EPROM_CMD_NORMAL);
7613 */
7614 }
7615 #endif
7616 /***************************************************************************
7617     -------------------------------NET STUFF---------------------------
7618 ***************************************************************************/
7619
7620 static struct net_device_stats *rtl8192_stats(struct net_device *dev)
7621 {
7622         struct r8192_priv *priv = ieee80211_priv(dev);
7623
7624         return &priv->ieee80211->stats;
7625 }
7626
7627 bool
7628 HalTxCheckStuck819xUsb(
7629         struct net_device *dev
7630         )
7631 {
7632         struct r8192_priv *priv = ieee80211_priv(dev);
7633         u16             RegTxCounter = read_nic_word(dev, 0x128);
7634         bool            bStuck = FALSE;
7635         RT_TRACE(COMP_RESET,"%s():RegTxCounter is %d,TxCounter is %d\n",__FUNCTION__,RegTxCounter,priv->TxCounter);
7636         if(priv->TxCounter==RegTxCounter)
7637                 bStuck = TRUE;
7638
7639         priv->TxCounter = RegTxCounter;
7640
7641         return bStuck;
7642 }
7643
7644 /*
7645 *       <Assumption: RT_TX_SPINLOCK is acquired.>
7646 *       First added: 2006.11.19 by emily
7647 */
7648 RESET_TYPE
7649 TxCheckStuck(struct net_device *dev)
7650 {
7651         struct r8192_priv *priv = ieee80211_priv(dev);
7652         u8                      QueueID;
7653 //      PRT_TCB                 pTcb;
7654 //      u8                      ResetThreshold;
7655         bool                    bCheckFwTxCnt = false;
7656         //unsigned long flags;
7657
7658         //
7659         // Decide Stuch threshold according to current power save mode
7660         //
7661
7662 //     RT_TRACE(COMP_RESET, " ==> TxCheckStuck()\n");
7663 //           PlatformAcquireSpinLock(Adapter, RT_TX_SPINLOCK);
7664 //           spin_lock_irqsave(&priv->ieee80211->lock,flags);
7665              for (QueueID = 0; QueueID<=BEACON_QUEUE;QueueID ++)
7666              {
7667                         if(QueueID == TXCMD_QUEUE)
7668                          continue;
7669 #if 1
7670                         if((skb_queue_len(&priv->ieee80211->skb_waitQ[QueueID]) == 0)  && (skb_queue_len(&priv->ieee80211->skb_aggQ[QueueID]) == 0))
7671                                 continue;
7672 #endif
7673
7674                      bCheckFwTxCnt = true;
7675              }
7676 //           PlatformReleaseSpinLock(Adapter, RT_TX_SPINLOCK);
7677 //      spin_unlock_irqrestore(&priv->ieee80211->lock,flags);
7678 //      RT_TRACE(COMP_RESET,"bCheckFwTxCnt is %d\n",bCheckFwTxCnt);
7679 #if 1
7680         if(bCheckFwTxCnt)
7681         {
7682                 if(HalTxCheckStuck819xUsb(dev))
7683                 {
7684                         RT_TRACE(COMP_RESET, "TxCheckStuck(): Fw indicates no Tx condition! \n");
7685                         return RESET_TYPE_SILENT;
7686                 }
7687         }
7688 #endif
7689         return RESET_TYPE_NORESET;
7690 }
7691
7692 bool
7693 HalRxCheckStuck819xUsb(struct net_device *dev)
7694 {
7695         u16     RegRxCounter = read_nic_word(dev, 0x130);
7696         struct r8192_priv *priv = ieee80211_priv(dev);
7697         bool bStuck = FALSE;
7698 //#ifdef RTL8192SU
7699
7700 //#else
7701         static u8       rx_chk_cnt = 0;
7702         RT_TRACE(COMP_RESET,"%s(): RegRxCounter is %d,RxCounter is %d\n",__FUNCTION__,RegRxCounter,priv->RxCounter);
7703         // If rssi is small, we should check rx for long time because of bad rx.
7704         // or maybe it will continuous silent reset every 2 seconds.
7705         rx_chk_cnt++;
7706         if(priv->undecorated_smoothed_pwdb >= (RateAdaptiveTH_High+5))
7707         {
7708                 rx_chk_cnt = 0; //high rssi, check rx stuck right now.
7709         }
7710         else if(priv->undecorated_smoothed_pwdb < (RateAdaptiveTH_High+5) &&
7711                 ((priv->CurrentChannelBW!=HT_CHANNEL_WIDTH_20&&priv->undecorated_smoothed_pwdb>=RateAdaptiveTH_Low_40M) ||
7712                 (priv->CurrentChannelBW==HT_CHANNEL_WIDTH_20&&priv->undecorated_smoothed_pwdb>=RateAdaptiveTH_Low_20M)) )
7713         {
7714                 if(rx_chk_cnt < 2)
7715                 {
7716                         return bStuck;
7717                 }
7718                 else
7719                 {
7720                         rx_chk_cnt = 0;
7721                 }
7722         }
7723         else if(((priv->CurrentChannelBW!=HT_CHANNEL_WIDTH_20&&priv->undecorated_smoothed_pwdb<RateAdaptiveTH_Low_40M) ||
7724                 (priv->CurrentChannelBW==HT_CHANNEL_WIDTH_20&&priv->undecorated_smoothed_pwdb<RateAdaptiveTH_Low_20M)) &&
7725                 priv->undecorated_smoothed_pwdb >= VeryLowRSSI)
7726         {
7727                 if(rx_chk_cnt < 4)
7728                 {
7729                         //DbgPrint("RSSI < %d && RSSI >= %d, no check this time \n", RateAdaptiveTH_Low, VeryLowRSSI);
7730                         return bStuck;
7731                 }
7732                 else
7733                 {
7734                         rx_chk_cnt = 0;
7735                         //DbgPrint("RSSI < %d && RSSI >= %d, check this time \n", RateAdaptiveTH_Low, VeryLowRSSI);
7736                 }
7737         }
7738         else
7739         {
7740                 if(rx_chk_cnt < 8)
7741                 {
7742                         //DbgPrint("RSSI <= %d, no check this time \n", VeryLowRSSI);
7743                         return bStuck;
7744                 }
7745                 else
7746                 {
7747                         rx_chk_cnt = 0;
7748                         //DbgPrint("RSSI <= %d, check this time \n", VeryLowRSSI);
7749                 }
7750         }
7751 //#endif
7752
7753         if(priv->RxCounter==RegRxCounter)
7754                 bStuck = TRUE;
7755
7756         priv->RxCounter = RegRxCounter;
7757
7758         return bStuck;
7759 }
7760
7761 RESET_TYPE
7762 RxCheckStuck(struct net_device *dev)
7763 {
7764         struct r8192_priv *priv = ieee80211_priv(dev);
7765         //int                     i;
7766         bool        bRxCheck = FALSE;
7767
7768 //       RT_TRACE(COMP_RESET," ==> RxCheckStuck()\n");
7769         //PlatformAcquireSpinLock(Adapter, RT_RX_SPINLOCK);
7770
7771          if(priv->IrpPendingCount > 1)
7772                 bRxCheck = TRUE;
7773        //PlatformReleaseSpinLock(Adapter, RT_RX_SPINLOCK);
7774
7775 //       RT_TRACE(COMP_RESET,"bRxCheck is %d \n",bRxCheck);
7776         if(bRxCheck)
7777         {
7778                 if(HalRxCheckStuck819xUsb(dev))
7779                 {
7780                         RT_TRACE(COMP_RESET, "RxStuck Condition\n");
7781                         return RESET_TYPE_SILENT;
7782                 }
7783         }
7784         return RESET_TYPE_NORESET;
7785 }
7786
7787
7788 /**
7789 *       This function is called by Checkforhang to check whether we should ask OS to reset driver
7790 *
7791 *       \param pAdapter The adapter context for this miniport
7792 *
7793 *       Note:NIC with USB interface sholud not call this function because we cannot scan descriptor
7794 *       to judge whether there is tx stuck.
7795 *       Note: This function may be required to be rewrite for Vista OS.
7796 *       <<<Assumption: Tx spinlock has been acquired >>>
7797 *
7798 *       8185 and 8185b does not implement this function. This is added by Emily at 2006.11.24
7799 */
7800 RESET_TYPE
7801 rtl819x_ifcheck_resetornot(struct net_device *dev)
7802 {
7803         struct r8192_priv *priv = ieee80211_priv(dev);
7804         RESET_TYPE      TxResetType = RESET_TYPE_NORESET;
7805         RESET_TYPE      RxResetType = RESET_TYPE_NORESET;
7806         RT_RF_POWER_STATE       rfState;
7807
7808 #if (defined (RTL8192SU_FPGA_2MAC_VERIFICATION)||defined (RTL8192SU_ASIC_VERIFICATION))
7809         return RESET_TYPE_NORESET;
7810 #endif
7811
7812         rfState = priv->ieee80211->eRFPowerState;
7813
7814         TxResetType = TxCheckStuck(dev);
7815 #if 1
7816         if( rfState != eRfOff ||
7817                 /*ADAPTER_TEST_STATUS_FLAG(Adapter, ADAPTER_STATUS_FW_DOWNLOAD_FAILURE)) &&*/
7818                 (priv->ieee80211->iw_mode != IW_MODE_ADHOC))
7819         {
7820                 // If driver is in the status of firmware download failure , driver skips RF initialization and RF is
7821                 // in turned off state. Driver should check whether Rx stuck and do silent reset. And
7822                 // if driver is in firmware download failure status, driver should initialize RF in the following
7823                 // silent reset procedure Emily, 2008.01.21
7824
7825                 // Driver should not check RX stuck in IBSS mode because it is required to
7826                 // set Check BSSID in order to send beacon, however, if check BSSID is
7827                 // set, STA cannot hear any packet a all. Emily, 2008.04.12
7828                 RxResetType = RxCheckStuck(dev);
7829         }
7830 #endif
7831         if(TxResetType==RESET_TYPE_NORMAL || RxResetType==RESET_TYPE_NORMAL)
7832                 return RESET_TYPE_NORMAL;
7833         else if(TxResetType==RESET_TYPE_SILENT || RxResetType==RESET_TYPE_SILENT){
7834                 RT_TRACE(COMP_RESET,"%s():silent reset\n",__FUNCTION__);
7835                 return RESET_TYPE_SILENT;
7836         }
7837         else
7838                 return RESET_TYPE_NORESET;
7839
7840 }
7841
7842 void rtl8192_cancel_deferred_work(struct r8192_priv* priv);
7843 int _rtl8192_up(struct net_device *dev);
7844 int rtl8192_close(struct net_device *dev);
7845
7846
7847
7848 void
7849 CamRestoreAllEntry(     struct net_device *dev)
7850 {
7851         u8 EntryId = 0;
7852         struct r8192_priv *priv = ieee80211_priv(dev);
7853         u8*     MacAddr = priv->ieee80211->current_network.bssid;
7854
7855         static u8       CAM_CONST_ADDR[4][6] = {
7856                 {0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
7857                 {0x00, 0x00, 0x00, 0x00, 0x00, 0x01},
7858                 {0x00, 0x00, 0x00, 0x00, 0x00, 0x02},
7859                 {0x00, 0x00, 0x00, 0x00, 0x00, 0x03}};
7860         static u8       CAM_CONST_BROAD[] =
7861                 {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
7862
7863         RT_TRACE(COMP_SEC, "CamRestoreAllEntry: \n");
7864
7865
7866         if ((priv->ieee80211->pairwise_key_type == KEY_TYPE_WEP40)||
7867             (priv->ieee80211->pairwise_key_type == KEY_TYPE_WEP104))
7868         {
7869
7870                 for(EntryId=0; EntryId<4; EntryId++)
7871                 {
7872                         {
7873                                 MacAddr = CAM_CONST_ADDR[EntryId];
7874                                 setKey(dev,
7875                                                 EntryId ,
7876                                                 EntryId,
7877                                                 priv->ieee80211->pairwise_key_type,
7878                                                 MacAddr,
7879                                                 0,
7880                                                 NULL);
7881                         }
7882                 }
7883
7884         }
7885         else if(priv->ieee80211->pairwise_key_type == KEY_TYPE_TKIP)
7886         {
7887
7888                 {
7889                         if(priv->ieee80211->iw_mode == IW_MODE_ADHOC)
7890                                 setKey(dev,
7891                                                 4,
7892                                                 0,
7893                                                 priv->ieee80211->pairwise_key_type,
7894                                                 (u8*)dev->dev_addr,
7895                                                 0,
7896                                                 NULL);
7897                         else
7898                                 setKey(dev,
7899                                                 4,
7900                                                 0,
7901                                                 priv->ieee80211->pairwise_key_type,
7902                                                 MacAddr,
7903                                                 0,
7904                                                 NULL);
7905                 }
7906         }
7907         else if(priv->ieee80211->pairwise_key_type == KEY_TYPE_CCMP)
7908         {
7909
7910                 {
7911                         if(priv->ieee80211->iw_mode == IW_MODE_ADHOC)
7912                                 setKey(dev,
7913                                                 4,
7914                                                 0,
7915                                                 priv->ieee80211->pairwise_key_type,
7916                                                 (u8*)dev->dev_addr,
7917                                                 0,
7918                                                 NULL);
7919                         else
7920                                 setKey(dev,
7921                                                 4,
7922                                                 0,
7923                                                 priv->ieee80211->pairwise_key_type,
7924                                                 MacAddr,
7925                                                 0,
7926                                                 NULL);
7927                 }
7928         }
7929
7930
7931
7932         if(priv->ieee80211->group_key_type == KEY_TYPE_TKIP)
7933         {
7934                 MacAddr = CAM_CONST_BROAD;
7935                 for(EntryId=1 ; EntryId<4 ; EntryId++)
7936                 {
7937                         {
7938                                 setKey(dev,
7939                                                 EntryId,
7940                                                 EntryId,
7941                                                 priv->ieee80211->group_key_type,
7942                                                 MacAddr,
7943                                                 0,
7944                                                 NULL);
7945                         }
7946                 }
7947                 if(priv->ieee80211->iw_mode == IW_MODE_ADHOC)
7948                                 setKey(dev,
7949                                                 0,
7950                                                 0,
7951                                                 priv->ieee80211->group_key_type,
7952                                                 CAM_CONST_ADDR[0],
7953                                                 0,
7954                                                 NULL);
7955         }
7956         else if(priv->ieee80211->group_key_type == KEY_TYPE_CCMP)
7957         {
7958                 MacAddr = CAM_CONST_BROAD;
7959                 for(EntryId=1; EntryId<4 ; EntryId++)
7960                 {
7961                         {
7962                                 setKey(dev,
7963                                                 EntryId ,
7964                                                 EntryId,
7965                                                 priv->ieee80211->group_key_type,
7966                                                 MacAddr,
7967                                                 0,
7968                                                 NULL);
7969                         }
7970                 }
7971
7972                 if(priv->ieee80211->iw_mode == IW_MODE_ADHOC)
7973                                 setKey(dev,
7974                                                 0 ,
7975                                                 0,
7976                                                 priv->ieee80211->group_key_type,
7977                                                 CAM_CONST_ADDR[0],
7978                                                 0,
7979                                                 NULL);
7980         }
7981 }
7982 //////////////////////////////////////////////////////////////
7983 // This function is used to fix Tx/Rx stop bug temporarily.
7984 // This function will do "system reset" to NIC when Tx or Rx is stuck.
7985 // The method checking Tx/Rx stuck of this function is supported by FW,
7986 // which reports Tx and Rx counter to register 0x128 and 0x130.
7987 //////////////////////////////////////////////////////////////
7988 void
7989 rtl819x_ifsilentreset(struct net_device *dev)
7990 {
7991         //OCTET_STRING asocpdu;
7992         struct r8192_priv *priv = ieee80211_priv(dev);
7993         u8      reset_times = 0;
7994         int reset_status = 0;
7995         struct ieee80211_device *ieee = priv->ieee80211;
7996
7997
7998         // 2007.07.20. If we need to check CCK stop, please uncomment this line.
7999         //bStuck = Adapter->HalFunc.CheckHWStopHandler(Adapter);
8000
8001         if(priv->ResetProgress==RESET_TYPE_NORESET)
8002         {
8003 RESET_START:
8004
8005                 RT_TRACE(COMP_RESET,"=========>Reset progress!! \n");
8006
8007                 // Set the variable for reset.
8008                 priv->ResetProgress = RESET_TYPE_SILENT;
8009 //              rtl8192_close(dev);
8010 #if 1
8011                 down(&priv->wx_sem);
8012                 if(priv->up == 0)
8013                 {
8014                         RT_TRACE(COMP_ERR,"%s():the driver is not up! return\n",__FUNCTION__);
8015                         up(&priv->wx_sem);
8016                         return ;
8017                 }
8018                 priv->up = 0;
8019                 RT_TRACE(COMP_RESET,"%s():======>start to down the driver\n",__FUNCTION__);
8020 //              if(!netif_queue_stopped(dev))
8021 //                      netif_stop_queue(dev);
8022
8023                 rtl8192_rtx_disable(dev);
8024                 rtl8192_cancel_deferred_work(priv);
8025                 deinit_hal_dm(dev);
8026                 del_timer_sync(&priv->watch_dog_timer);
8027
8028                 ieee->sync_scan_hurryup = 1;
8029                 if(ieee->state == IEEE80211_LINKED)
8030                 {
8031                         down(&ieee->wx_sem);
8032                         printk("ieee->state is IEEE80211_LINKED\n");
8033                         ieee80211_stop_send_beacons(priv->ieee80211);
8034                         del_timer_sync(&ieee->associate_timer);
8035                         cancel_delayed_work(&ieee->associate_retry_wq);
8036                         ieee80211_stop_scan(ieee);
8037                         netif_carrier_off(dev);
8038                         up(&ieee->wx_sem);
8039                 }
8040                 else{
8041                         printk("ieee->state is NOT LINKED\n");
8042                         ieee80211_softmac_stop_protocol(priv->ieee80211);                       }
8043                 up(&priv->wx_sem);
8044                 RT_TRACE(COMP_RESET,"%s():<==========down process is finished\n",__FUNCTION__);
8045         //rtl8192_irq_disable(dev);
8046                 RT_TRACE(COMP_RESET,"%s():===========>start to up the driver\n",__FUNCTION__);
8047                 reset_status = _rtl8192_up(dev);
8048
8049                 RT_TRACE(COMP_RESET,"%s():<===========up process is finished\n",__FUNCTION__);
8050                 if(reset_status == -EAGAIN)
8051                 {
8052                         if(reset_times < 3)
8053                         {
8054                                 reset_times++;
8055                                 goto RESET_START;
8056                         }
8057                         else
8058                         {
8059                                 RT_TRACE(COMP_ERR," ERR!!! %s():  Reset Failed!!\n", __FUNCTION__);
8060                         }
8061                 }
8062 #endif
8063                 ieee->is_silent_reset = 1;
8064 #if 1
8065                 EnableHWSecurityConfig8192(dev);
8066 #if 1
8067                 if(ieee->state == IEEE80211_LINKED && ieee->iw_mode == IW_MODE_INFRA)
8068                 {
8069                         ieee->set_chan(ieee->dev, ieee->current_network.channel);
8070
8071 #if 1
8072                         queue_work(ieee->wq, &ieee->associate_complete_wq);
8073 #endif
8074
8075                 }
8076                 else if(ieee->state == IEEE80211_LINKED && ieee->iw_mode == IW_MODE_ADHOC)
8077                 {
8078                         ieee->set_chan(ieee->dev, ieee->current_network.channel);
8079                         ieee->link_change(ieee->dev);
8080
8081                 //      notify_wx_assoc_event(ieee);
8082
8083                         ieee80211_start_send_beacons(ieee);
8084
8085                         if (ieee->data_hard_resume)
8086                                 ieee->data_hard_resume(ieee->dev);
8087                         netif_carrier_on(ieee->dev);
8088                 }
8089 #endif
8090
8091                 CamRestoreAllEntry(dev);
8092
8093                 priv->ResetProgress = RESET_TYPE_NORESET;
8094                 priv->reset_count++;
8095
8096                 priv->bForcedSilentReset =false;
8097                 priv->bResetInProgress = false;
8098
8099                 // For test --> force write UFWP.
8100                 write_nic_byte(dev, UFWP, 1);
8101                 RT_TRACE(COMP_RESET, "Reset finished!! ====>[%d]\n", priv->reset_count);
8102 #endif
8103         }
8104 }
8105
8106 void CAM_read_entry(
8107         struct net_device *dev,
8108         u32                     iIndex
8109 )
8110 {
8111         u32 target_command=0;
8112          u32 target_content=0;
8113          u8 entry_i=0;
8114          u32 ulStatus;
8115         s32 i=100;
8116 //      printk("=======>start read CAM\n");
8117         for(entry_i=0;entry_i<CAM_CONTENT_COUNT;entry_i++)
8118         {
8119         // polling bit, and No Write enable, and address
8120                 target_command= entry_i+CAM_CONTENT_COUNT*iIndex;
8121                 target_command= target_command | BIT31;
8122
8123         //Check polling bit is clear
8124 //      mdelay(1);
8125 #if 1
8126                 while((i--)>=0)
8127                 {
8128                         ulStatus = read_nic_dword(dev, RWCAM);
8129                         if(ulStatus & BIT31){
8130                                 continue;
8131                         }
8132                         else{
8133                                 break;
8134                         }
8135                 }
8136 #endif
8137                 write_nic_dword(dev, RWCAM, target_command);
8138                 RT_TRACE(COMP_SEC,"CAM_read_entry(): WRITE A0: %x \n",target_command);
8139          //     printk("CAM_read_entry(): WRITE A0: %lx \n",target_command);
8140                 target_content = read_nic_dword(dev, RCAMO);
8141                 RT_TRACE(COMP_SEC, "CAM_read_entry(): WRITE A8: %x \n",target_content);
8142          //     printk("CAM_read_entry(): WRITE A8: %lx \n",target_content);
8143         }
8144         printk("\n");
8145 }
8146
8147 void rtl819x_update_rxcounts(
8148         struct r8192_priv *priv,
8149         u32* TotalRxBcnNum,
8150         u32* TotalRxDataNum
8151 )
8152 {
8153         u16                     SlotIndex;
8154         u8                      i;
8155
8156         *TotalRxBcnNum = 0;
8157         *TotalRxDataNum = 0;
8158
8159         SlotIndex = (priv->ieee80211->LinkDetectInfo.SlotIndex++)%(priv->ieee80211->LinkDetectInfo.SlotNum);
8160         priv->ieee80211->LinkDetectInfo.RxBcnNum[SlotIndex] = priv->ieee80211->LinkDetectInfo.NumRecvBcnInPeriod;
8161         priv->ieee80211->LinkDetectInfo.RxDataNum[SlotIndex] = priv->ieee80211->LinkDetectInfo.NumRecvDataInPeriod;
8162         for( i=0; i<priv->ieee80211->LinkDetectInfo.SlotNum; i++ ){
8163                 *TotalRxBcnNum += priv->ieee80211->LinkDetectInfo.RxBcnNum[i];
8164                 *TotalRxDataNum += priv->ieee80211->LinkDetectInfo.RxDataNum[i];
8165         }
8166 }
8167
8168 extern  void    rtl819x_watchdog_wqcallback(struct work_struct *work)
8169 {
8170         struct delayed_work *dwork = container_of(work,struct delayed_work,work);
8171        struct r8192_priv *priv = container_of(dwork,struct r8192_priv,watch_dog_wq);
8172        struct net_device *dev = priv->ieee80211->dev;
8173         struct ieee80211_device* ieee = priv->ieee80211;
8174         RESET_TYPE      ResetType = RESET_TYPE_NORESET;
8175         static u8       check_reset_cnt=0;
8176         bool bBusyTraffic = false;
8177
8178         if(!priv->up)
8179                 return;
8180         hal_dm_watchdog(dev);
8181
8182         {//to get busy traffic condition
8183                 if(ieee->state == IEEE80211_LINKED)
8184                 {
8185                         //windows mod 666 to 100.
8186                         //if(   ieee->LinkDetectInfo.NumRxOkInPeriod> 666 ||
8187                         //      ieee->LinkDetectInfo.NumTxOkInPeriod> 666 ) {
8188                         if(     ieee->LinkDetectInfo.NumRxOkInPeriod> 100 ||
8189                                 ieee->LinkDetectInfo.NumTxOkInPeriod> 100 ) {
8190                                 bBusyTraffic = true;
8191                         }
8192                         ieee->LinkDetectInfo.NumRxOkInPeriod = 0;
8193                         ieee->LinkDetectInfo.NumTxOkInPeriod = 0;
8194                         ieee->LinkDetectInfo.bBusyTraffic = bBusyTraffic;
8195                 }
8196         }
8197         //added by amy for AP roaming
8198         {
8199                 if(priv->ieee80211->state == IEEE80211_LINKED && priv->ieee80211->iw_mode == IW_MODE_INFRA)
8200                 {
8201                         u32     TotalRxBcnNum = 0;
8202                         u32     TotalRxDataNum = 0;
8203
8204                         rtl819x_update_rxcounts(priv, &TotalRxBcnNum, &TotalRxDataNum);
8205                         if((TotalRxBcnNum+TotalRxDataNum) == 0)
8206                         {
8207                                 #ifdef TODO
8208                                 if(rfState == eRfOff)
8209                                         RT_TRACE(COMP_ERR,"========>%s()\n",__FUNCTION__);
8210                                 #endif
8211                                 printk("===>%s(): AP is power off,connect another one\n",__FUNCTION__);
8212                         //      Dot11d_Reset(dev);
8213                                 priv->ieee80211->state = IEEE80211_ASSOCIATING;
8214                                 notify_wx_assoc_event(priv->ieee80211);
8215                                 RemovePeerTS(priv->ieee80211,priv->ieee80211->current_network.bssid);
8216                                 ieee->is_roaming = true;
8217                                 priv->ieee80211->link_change(dev);
8218                                 queue_work(priv->ieee80211->wq, &priv->ieee80211->associate_procedure_wq);
8219                         }
8220                 }
8221                 priv->ieee80211->LinkDetectInfo.NumRecvBcnInPeriod=0;
8222                 priv->ieee80211->LinkDetectInfo.NumRecvDataInPeriod=0;
8223         }
8224 //      CAM_read_entry(dev,4);
8225         //check if reset the driver
8226         if(check_reset_cnt++ >= 3 && !ieee->is_roaming)
8227         {
8228                 ResetType = rtl819x_ifcheck_resetornot(dev);
8229                 check_reset_cnt = 3;
8230                 //DbgPrint("Start to check silent reset\n");
8231         }
8232         //      RT_TRACE(COMP_RESET,"%s():priv->force_reset is %d,priv->ResetProgress is %d, priv->bForcedSilentReset is %d,priv->bDisableNormalResetCheck is %d,ResetType is %d\n",__FUNCTION__,priv->force_reset,priv->ResetProgress,priv->bForcedSilentReset,priv->bDisableNormalResetCheck,ResetType);
8233 #if 1
8234         if( (priv->force_reset) || (priv->ResetProgress==RESET_TYPE_NORESET &&
8235                 (priv->bForcedSilentReset ||
8236                 (!priv->bDisableNormalResetCheck && ResetType==RESET_TYPE_SILENT)))) // This is control by OID set in Pomelo
8237         {
8238                 RT_TRACE(COMP_RESET,"%s():priv->force_reset is %d,priv->ResetProgress is %d, priv->bForcedSilentReset is %d,priv->bDisableNormalResetCheck is %d,ResetType is %d\n",__FUNCTION__,priv->force_reset,priv->ResetProgress,priv->bForcedSilentReset,priv->bDisableNormalResetCheck,ResetType);
8239                 rtl819x_ifsilentreset(dev);
8240         }
8241 #endif
8242         priv->force_reset = false;
8243         priv->bForcedSilentReset = false;
8244         priv->bResetInProgress = false;
8245         RT_TRACE(COMP_TRACE, " <==RtUsbCheckForHangWorkItemCallback()\n");
8246
8247 }
8248
8249 void watch_dog_timer_callback(unsigned long data)
8250 {
8251         struct r8192_priv *priv = ieee80211_priv((struct net_device *) data);
8252         //printk("===============>watch_dog  timer\n");
8253         queue_delayed_work(priv->priv_wq,&priv->watch_dog_wq, 0);
8254         mod_timer(&priv->watch_dog_timer, jiffies + MSECS(IEEE80211_WATCH_DOG_TIME));
8255 #if 0
8256         priv->watch_dog_timer.expires = jiffies + MSECS(IEEE80211_WATCH_DOG_TIME);
8257         add_timer(&priv->watch_dog_timer);
8258 #endif
8259 }
8260 int _rtl8192_up(struct net_device *dev)
8261 {
8262         struct r8192_priv *priv = ieee80211_priv(dev);
8263         //int i;
8264         int init_status = 0;
8265         priv->up=1;
8266         priv->ieee80211->ieee_up=1;
8267         RT_TRACE(COMP_INIT, "Bringing up iface");
8268         init_status = priv->ops->rtl819x_adapter_start(dev);
8269         if(!init_status)
8270         {
8271                 RT_TRACE(COMP_ERR,"ERR!!! %s(): initialization is failed!\n", __FUNCTION__);
8272                 priv->up=priv->ieee80211->ieee_up = 0;
8273                 return -EAGAIN;
8274         }
8275         RT_TRACE(COMP_INIT, "start adapter finished\n");
8276         rtl8192_rx_enable(dev);
8277 //      rtl8192_tx_enable(dev);
8278         if(priv->ieee80211->state != IEEE80211_LINKED)
8279         ieee80211_softmac_start_protocol(priv->ieee80211);
8280         ieee80211_reset_queue(priv->ieee80211);
8281         watch_dog_timer_callback((unsigned long) dev);
8282         if(!netif_queue_stopped(dev))
8283                 netif_start_queue(dev);
8284         else
8285                 netif_wake_queue(dev);
8286
8287         /*
8288          * Make sure that drop_unencrypted is initialized as "0"
8289          * No packets will be sent in non-security mode if we had set drop_unencrypted.
8290          * ex, After kill wpa_supplicant process, make the driver up again.
8291          * drop_unencrypted remains as "1", which is set by wpa_supplicant. 2008/12/04.john
8292          */
8293         priv->ieee80211->drop_unencrypted = 0;
8294
8295         return 0;
8296 }
8297
8298
8299 int rtl8192_open(struct net_device *dev)
8300 {
8301         struct r8192_priv *priv = ieee80211_priv(dev);
8302         int ret;
8303         down(&priv->wx_sem);
8304         ret = rtl8192_up(dev);
8305         up(&priv->wx_sem);
8306         return ret;
8307
8308 }
8309
8310
8311 int rtl8192_up(struct net_device *dev)
8312 {
8313         struct r8192_priv *priv = ieee80211_priv(dev);
8314
8315         if (priv->up == 1) return -1;
8316
8317         return _rtl8192_up(dev);
8318 }
8319
8320
8321 int rtl8192_close(struct net_device *dev)
8322 {
8323         struct r8192_priv *priv = ieee80211_priv(dev);
8324         int ret;
8325
8326         down(&priv->wx_sem);
8327
8328         ret = rtl8192_down(dev);
8329
8330         up(&priv->wx_sem);
8331
8332         return ret;
8333
8334 }
8335
8336 int rtl8192_down(struct net_device *dev)
8337 {
8338         struct r8192_priv *priv = ieee80211_priv(dev);
8339         int i;
8340
8341         if (priv->up == 0) return -1;
8342
8343         priv->up=0;
8344         priv->ieee80211->ieee_up = 0;
8345         RT_TRACE(COMP_DOWN, "==========>%s()\n", __FUNCTION__);
8346 /* FIXME */
8347         if (!netif_queue_stopped(dev))
8348                 netif_stop_queue(dev);
8349
8350         rtl8192_rtx_disable(dev);
8351         //rtl8192_irq_disable(dev);
8352
8353  /* Tx related queue release */
8354         for(i = 0; i < MAX_QUEUE_SIZE; i++) {
8355                 skb_queue_purge(&priv->ieee80211->skb_waitQ [i]);
8356         }
8357         for(i = 0; i < MAX_QUEUE_SIZE; i++) {
8358                 skb_queue_purge(&priv->ieee80211->skb_aggQ [i]);
8359         }
8360
8361         for(i = 0; i < MAX_QUEUE_SIZE; i++) {
8362                 skb_queue_purge(&priv->ieee80211->skb_drv_aggQ [i]);
8363         }
8364
8365         //as cancel_delayed_work will del work->timer, so if work is not definedas struct delayed_work, it will corrupt
8366 //      flush_scheduled_work();
8367         rtl8192_cancel_deferred_work(priv);
8368         deinit_hal_dm(dev);
8369         del_timer_sync(&priv->watch_dog_timer);
8370
8371
8372         ieee80211_softmac_stop_protocol(priv->ieee80211);
8373         memset(&priv->ieee80211->current_network, 0 , offsetof(struct ieee80211_network, list));
8374         RT_TRACE(COMP_DOWN, "<==========%s()\n", __FUNCTION__);
8375
8376                 return 0;
8377 }
8378
8379
8380 void rtl8192_commit(struct net_device *dev)
8381 {
8382         struct r8192_priv *priv = ieee80211_priv(dev);
8383         int reset_status = 0;
8384         //u8 reset_times = 0;
8385         if (priv->up == 0) return ;
8386         priv->up = 0;
8387
8388         rtl8192_cancel_deferred_work(priv);
8389         del_timer_sync(&priv->watch_dog_timer);
8390         //cancel_delayed_work(&priv->SwChnlWorkItem);
8391
8392         ieee80211_softmac_stop_protocol(priv->ieee80211);
8393
8394         //rtl8192_irq_disable(dev);
8395         rtl8192_rtx_disable(dev);
8396         reset_status = _rtl8192_up(dev);
8397
8398 }
8399
8400 /*
8401 void rtl8192_restart(struct net_device *dev)
8402 {
8403         struct r8192_priv *priv = ieee80211_priv(dev);
8404 */
8405 void rtl8192_restart(struct work_struct *work)
8406 {
8407         struct r8192_priv *priv = container_of(work, struct r8192_priv, reset_wq);
8408         struct net_device *dev = priv->ieee80211->dev;
8409
8410         down(&priv->wx_sem);
8411
8412         rtl8192_commit(dev);
8413
8414         up(&priv->wx_sem);
8415 }
8416
8417 static void r8192_set_multicast(struct net_device *dev)
8418 {
8419         struct r8192_priv *priv = ieee80211_priv(dev);
8420         short promisc;
8421
8422         //down(&priv->wx_sem);
8423
8424         /* FIXME FIXME */
8425
8426         promisc = (dev->flags & IFF_PROMISC) ? 1:0;
8427
8428         if (promisc != priv->promisc)
8429         //      rtl8192_commit(dev);
8430
8431         priv->promisc = promisc;
8432
8433         //schedule_work(&priv->reset_wq);
8434         //up(&priv->wx_sem);
8435 }
8436
8437
8438 int r8192_set_mac_adr(struct net_device *dev, void *mac)
8439 {
8440         struct r8192_priv *priv = ieee80211_priv(dev);
8441         struct sockaddr *addr = mac;
8442
8443         down(&priv->wx_sem);
8444
8445         memcpy(dev->dev_addr, addr->sa_data, ETH_ALEN);
8446
8447         schedule_work(&priv->reset_wq);
8448
8449         up(&priv->wx_sem);
8450
8451         return 0;
8452 }
8453
8454 /* based on ipw2200 driver */
8455 int rtl8192_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
8456 {
8457         struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
8458         struct iwreq *wrq = (struct iwreq *)rq;
8459         int ret=-1;
8460         struct ieee80211_device *ieee = priv->ieee80211;
8461         u32 key[4];
8462         u8 broadcast_addr[6] = {0xff,0xff,0xff,0xff,0xff,0xff};
8463         u8 zero_addr[6] = {0};
8464         struct iw_point *p = &wrq->u.data;
8465         struct ieee_param *ipw = NULL;//(struct ieee_param *)wrq->u.data.pointer;
8466
8467         down(&priv->wx_sem);
8468
8469
8470      if (p->length < sizeof(struct ieee_param) || !p->pointer){
8471              ret = -EINVAL;
8472              goto out;
8473         }
8474
8475      ipw = (struct ieee_param *)kmalloc(p->length, GFP_KERNEL);
8476      if (ipw == NULL){
8477              ret = -ENOMEM;
8478              goto out;
8479      }
8480      if (copy_from_user(ipw, p->pointer, p->length)) {
8481                 kfree(ipw);
8482             ret = -EFAULT;
8483             goto out;
8484         }
8485
8486         switch (cmd) {
8487             case RTL_IOCTL_WPA_SUPPLICANT:
8488         //parse here for HW security
8489                         if (ipw->cmd == IEEE_CMD_SET_ENCRYPTION)
8490                         {
8491                                 if (ipw->u.crypt.set_tx)
8492                                 {
8493                                         if (strcmp(ipw->u.crypt.alg, "CCMP") == 0)
8494                                                 ieee->pairwise_key_type = KEY_TYPE_CCMP;
8495                                         else if (strcmp(ipw->u.crypt.alg, "TKIP") == 0)
8496                                                 ieee->pairwise_key_type = KEY_TYPE_TKIP;
8497                                         else if (strcmp(ipw->u.crypt.alg, "WEP") == 0)
8498                                         {
8499                                                 if (ipw->u.crypt.key_len == 13)
8500                                                         ieee->pairwise_key_type = KEY_TYPE_WEP104;
8501                                                 else if (ipw->u.crypt.key_len == 5)
8502                                                         ieee->pairwise_key_type = KEY_TYPE_WEP40;
8503                                         }
8504                                         else
8505                                                 ieee->pairwise_key_type = KEY_TYPE_NA;
8506
8507                                         if (ieee->pairwise_key_type)
8508                                         {
8509                                 //      FIXME:these two lines below just to fix ipw interface bug, that is, it will never set mode down to driver. So treat it as ADHOC mode, if no association procedure. WB. 2009.02.04
8510                                                 if (memcmp(ieee->ap_mac_addr, zero_addr, 6) == 0)
8511                                                         ieee->iw_mode = IW_MODE_ADHOC;
8512                                                 memcpy((u8*)key, ipw->u.crypt.key, 16);
8513                                                 EnableHWSecurityConfig8192(dev);
8514                                         //we fill both index entry and 4th entry for pairwise key as in IPW interface, adhoc will only get here, so we need index entry for its default key serching!
8515                                         //added by WB.
8516                                                 setKey(dev, 4, ipw->u.crypt.idx, ieee->pairwise_key_type, (u8*)ieee->ap_mac_addr, 0, key);
8517                                                 if (ieee->iw_mode == IW_MODE_ADHOC)
8518                                                 setKey(dev, ipw->u.crypt.idx, ipw->u.crypt.idx, ieee->pairwise_key_type, (u8*)ieee->ap_mac_addr, 0, key);
8519                                         }
8520                                 }
8521                                 else //if (ipw->u.crypt.idx) //group key use idx > 0
8522                                 {
8523                                         memcpy((u8*)key, ipw->u.crypt.key, 16);
8524                                         if (strcmp(ipw->u.crypt.alg, "CCMP") == 0)
8525                                                 ieee->group_key_type= KEY_TYPE_CCMP;
8526                                         else if (strcmp(ipw->u.crypt.alg, "TKIP") == 0)
8527                                                 ieee->group_key_type = KEY_TYPE_TKIP;
8528                                         else if (strcmp(ipw->u.crypt.alg, "WEP") == 0)
8529                                         {
8530                                                 if (ipw->u.crypt.key_len == 13)
8531                                                         ieee->group_key_type = KEY_TYPE_WEP104;
8532                                                 else if (ipw->u.crypt.key_len == 5)
8533                                                         ieee->group_key_type = KEY_TYPE_WEP40;
8534                                         }
8535                                         else
8536                                                 ieee->group_key_type = KEY_TYPE_NA;
8537
8538                                         if (ieee->group_key_type)
8539                                         {
8540                                                         setKey( dev,
8541                                                                 ipw->u.crypt.idx,
8542                                                                 ipw->u.crypt.idx,               //KeyIndex
8543                                                                 ieee->group_key_type,   //KeyType
8544                                                                 broadcast_addr, //MacAddr
8545                                                                 0,              //DefaultKey
8546                                                                 key);           //KeyContent
8547                                         }
8548                                 }
8549                         }
8550 #ifdef JOHN_HWSEC_DEBUG
8551                 //john's test 0711
8552                 printk("@@ wrq->u pointer = ");
8553                 for(i=0;i<wrq->u.data.length;i++){
8554                         if(i%10==0) printk("\n");
8555                         printk( "%8x|", ((u32*)wrq->u.data.pointer)[i] );
8556                 }
8557                 printk("\n");
8558 #endif /*JOHN_HWSEC_DEBUG*/
8559                 ret = ieee80211_wpa_supplicant_ioctl(priv->ieee80211, &wrq->u.data);
8560                 break;
8561
8562             default:
8563                 ret = -EOPNOTSUPP;
8564                 break;
8565         }
8566         kfree(ipw);
8567         ipw = NULL;
8568 out:
8569         up(&priv->wx_sem);
8570         return ret;
8571 }
8572
8573 #ifdef RTL8192SU
8574 u8 rtl8192SU_HwRateToMRate(bool bIsHT, u8 rate,bool bFirstAMPDU)
8575 {
8576
8577         u8      ret_rate = 0x02;
8578
8579         if( bFirstAMPDU )
8580         {
8581         if(!bIsHT)
8582         {
8583                 switch(rate)
8584                 {
8585
8586                         case DESC92S_RATE1M:            ret_rate = MGN_1M;              break;
8587                         case DESC92S_RATE2M:            ret_rate = MGN_2M;              break;
8588                         case DESC92S_RATE5_5M:          ret_rate = MGN_5_5M;            break;
8589                         case DESC92S_RATE11M:           ret_rate = MGN_11M;             break;
8590                         case DESC92S_RATE6M:            ret_rate = MGN_6M;              break;
8591                         case DESC92S_RATE9M:            ret_rate = MGN_9M;              break;
8592                         case DESC92S_RATE12M:           ret_rate = MGN_12M;             break;
8593                         case DESC92S_RATE18M:           ret_rate = MGN_18M;             break;
8594                         case DESC92S_RATE24M:           ret_rate = MGN_24M;             break;
8595                         case DESC92S_RATE36M:           ret_rate = MGN_36M;             break;
8596                         case DESC92S_RATE48M:           ret_rate = MGN_48M;             break;
8597                         case DESC92S_RATE54M:           ret_rate = MGN_54M;             break;
8598
8599                         default:
8600                                 RT_TRACE(COMP_RECV, "HwRateToMRate90(): Non supported Rate [%x], bIsHT = %d!!!\n", rate, bIsHT);
8601                                         break;
8602         }
8603                 }
8604                 else
8605         {
8606                 switch(rate)
8607                 {
8608
8609                         case DESC92S_RATEMCS0:  ret_rate = MGN_MCS0;            break;
8610                         case DESC92S_RATEMCS1:  ret_rate = MGN_MCS1;            break;
8611                         case DESC92S_RATEMCS2:  ret_rate = MGN_MCS2;            break;
8612                         case DESC92S_RATEMCS3:  ret_rate = MGN_MCS3;            break;
8613                         case DESC92S_RATEMCS4:  ret_rate = MGN_MCS4;            break;
8614                         case DESC92S_RATEMCS5:  ret_rate = MGN_MCS5;            break;
8615                         case DESC92S_RATEMCS6:  ret_rate = MGN_MCS6;            break;
8616                         case DESC92S_RATEMCS7:  ret_rate = MGN_MCS7;            break;
8617                         case DESC92S_RATEMCS8:  ret_rate = MGN_MCS8;            break;
8618                         case DESC92S_RATEMCS9:  ret_rate = MGN_MCS9;            break;
8619                         case DESC92S_RATEMCS10: ret_rate = MGN_MCS10;   break;
8620                         case DESC92S_RATEMCS11: ret_rate = MGN_MCS11;   break;
8621                         case DESC92S_RATEMCS12: ret_rate = MGN_MCS12;   break;
8622                         case DESC92S_RATEMCS13: ret_rate = MGN_MCS13;   break;
8623                         case DESC92S_RATEMCS14: ret_rate = MGN_MCS14;   break;
8624                         case DESC92S_RATEMCS15: ret_rate = MGN_MCS15;   break;
8625                         case DESC92S_RATEMCS32: ret_rate = (0x80|0x20); break;
8626
8627                         default:
8628                                         RT_TRACE(COMP_RECV, "HwRateToMRate92S(): Non supported Rate [%x], bIsHT = %d!!!\n",rate, bIsHT );
8629                                 break;
8630                 }
8631
8632         }
8633         }
8634         else
8635         {
8636                 switch(rate)
8637                 {
8638
8639                         case DESC92S_RATE1M:    ret_rate = MGN_1M;              break;
8640                         case DESC92S_RATE2M:    ret_rate = MGN_2M;              break;
8641                         case DESC92S_RATE5_5M:  ret_rate = MGN_5_5M;            break;
8642                         case DESC92S_RATE11M:   ret_rate = MGN_11M;             break;
8643                         case DESC92S_RATE6M:    ret_rate = MGN_6M;              break;
8644                         case DESC92S_RATE9M:    ret_rate = MGN_9M;              break;
8645                         case DESC92S_RATE12M:   ret_rate = MGN_12M;             break;
8646                         case DESC92S_RATE18M:   ret_rate = MGN_18M;             break;
8647                         case DESC92S_RATE24M:   ret_rate = MGN_24M;             break;
8648                         case DESC92S_RATE36M:   ret_rate = MGN_36M;             break;
8649                         case DESC92S_RATE48M:   ret_rate = MGN_48M;             break;
8650                         case DESC92S_RATE54M:   ret_rate = MGN_54M;             break;
8651                         case DESC92S_RATEMCS0:  ret_rate = MGN_MCS0;            break;
8652                         case DESC92S_RATEMCS1:  ret_rate = MGN_MCS1;            break;
8653                         case DESC92S_RATEMCS2:  ret_rate = MGN_MCS2;            break;
8654                         case DESC92S_RATEMCS3:  ret_rate = MGN_MCS3;            break;
8655                         case DESC92S_RATEMCS4:  ret_rate = MGN_MCS4;            break;
8656                         case DESC92S_RATEMCS5:  ret_rate = MGN_MCS5;            break;
8657                         case DESC92S_RATEMCS6:  ret_rate = MGN_MCS6;            break;
8658                         case DESC92S_RATEMCS7:  ret_rate = MGN_MCS7;            break;
8659                         case DESC92S_RATEMCS8:  ret_rate = MGN_MCS8;            break;
8660                         case DESC92S_RATEMCS9:  ret_rate = MGN_MCS9;            break;
8661                         case DESC92S_RATEMCS10: ret_rate = MGN_MCS10;   break;
8662                         case DESC92S_RATEMCS11: ret_rate = MGN_MCS11;   break;
8663                         case DESC92S_RATEMCS12: ret_rate = MGN_MCS12;   break;
8664                         case DESC92S_RATEMCS13: ret_rate = MGN_MCS13;   break;
8665                         case DESC92S_RATEMCS14: ret_rate = MGN_MCS14;   break;
8666                         case DESC92S_RATEMCS15: ret_rate = MGN_MCS15;   break;
8667                         case DESC92S_RATEMCS32: ret_rate = (0x80|0x20); break;
8668
8669                         default:
8670                                 RT_TRACE(COMP_RECV, "HwRateToMRate92S(): Non supported Rate [%x], bIsHT = %d!!!\n",rate, bIsHT );
8671                                 break;
8672                         }
8673         }
8674         return ret_rate;
8675 }
8676 #endif
8677
8678 u8 HwRateToMRate90(bool bIsHT, u8 rate)
8679 {
8680         u8  ret_rate = 0xff;
8681
8682         if(!bIsHT) {
8683                 switch(rate) {
8684                         case DESC90_RATE1M:   ret_rate = MGN_1M;         break;
8685                         case DESC90_RATE2M:   ret_rate = MGN_2M;         break;
8686                         case DESC90_RATE5_5M: ret_rate = MGN_5_5M;       break;
8687                         case DESC90_RATE11M:  ret_rate = MGN_11M;        break;
8688                         case DESC90_RATE6M:   ret_rate = MGN_6M;         break;
8689                         case DESC90_RATE9M:   ret_rate = MGN_9M;         break;
8690                         case DESC90_RATE12M:  ret_rate = MGN_12M;        break;
8691                         case DESC90_RATE18M:  ret_rate = MGN_18M;        break;
8692                         case DESC90_RATE24M:  ret_rate = MGN_24M;        break;
8693                         case DESC90_RATE36M:  ret_rate = MGN_36M;        break;
8694                         case DESC90_RATE48M:  ret_rate = MGN_48M;        break;
8695                         case DESC90_RATE54M:  ret_rate = MGN_54M;        break;
8696
8697                         default:
8698                                 ret_rate = 0xff;
8699                                 RT_TRACE(COMP_RECV, "HwRateToMRate90(): Non supported Rate [%x], bIsHT = %d!!!\n", rate, bIsHT);
8700                                 break;
8701                 }
8702
8703         } else {
8704                 switch(rate) {
8705                         case DESC90_RATEMCS0:   ret_rate = MGN_MCS0;    break;
8706                         case DESC90_RATEMCS1:   ret_rate = MGN_MCS1;    break;
8707                         case DESC90_RATEMCS2:   ret_rate = MGN_MCS2;    break;
8708                         case DESC90_RATEMCS3:   ret_rate = MGN_MCS3;    break;
8709                         case DESC90_RATEMCS4:   ret_rate = MGN_MCS4;    break;
8710                         case DESC90_RATEMCS5:   ret_rate = MGN_MCS5;    break;
8711                         case DESC90_RATEMCS6:   ret_rate = MGN_MCS6;    break;
8712                         case DESC90_RATEMCS7:   ret_rate = MGN_MCS7;    break;
8713                         case DESC90_RATEMCS8:   ret_rate = MGN_MCS8;    break;
8714                         case DESC90_RATEMCS9:   ret_rate = MGN_MCS9;    break;
8715                         case DESC90_RATEMCS10:  ret_rate = MGN_MCS10;   break;
8716                         case DESC90_RATEMCS11:  ret_rate = MGN_MCS11;   break;
8717                         case DESC90_RATEMCS12:  ret_rate = MGN_MCS12;   break;
8718                         case DESC90_RATEMCS13:  ret_rate = MGN_MCS13;   break;
8719                         case DESC90_RATEMCS14:  ret_rate = MGN_MCS14;   break;
8720                         case DESC90_RATEMCS15:  ret_rate = MGN_MCS15;   break;
8721                         case DESC90_RATEMCS32:  ret_rate = (0x80|0x20); break;
8722
8723                         default:
8724                                 ret_rate = 0xff;
8725                                 RT_TRACE(COMP_RECV, "HwRateToMRate90(): Non supported Rate [%x], bIsHT = %d!!!\n",rate, bIsHT);
8726                                 break;
8727                 }
8728         }
8729
8730         return ret_rate;
8731 }
8732
8733 /**
8734  * Function:     UpdateRxPktTimeStamp
8735  * Overview:     Recored down the TSF time stamp when receiving a packet
8736  *
8737  * Input:
8738  *       PADAPTER        Adapter
8739  *       PRT_RFD         pRfd,
8740  *
8741  * Output:
8742  *       PRT_RFD         pRfd
8743  *                               (pRfd->Status.TimeStampHigh is updated)
8744  *                               (pRfd->Status.TimeStampLow is updated)
8745  * Return:
8746  *               None
8747  */
8748 void UpdateRxPktTimeStamp8190 (struct net_device *dev, struct ieee80211_rx_stats *stats)
8749 {
8750         struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
8751
8752         if(stats->bIsAMPDU && !stats->bFirstMPDU) {
8753                 stats->mac_time[0] = priv->LastRxDescTSFLow;
8754                 stats->mac_time[1] = priv->LastRxDescTSFHigh;
8755         } else {
8756                 priv->LastRxDescTSFLow = stats->mac_time[0];
8757                 priv->LastRxDescTSFHigh = stats->mac_time[1];
8758         }
8759 }
8760
8761 //by amy 080606
8762
8763 long rtl819x_translate_todbm(u8 signal_strength_index   )// 0-100 index.
8764 {
8765         long    signal_power; // in dBm.
8766
8767         // Translate to dBm (x=0.5y-95).
8768         signal_power = (long)((signal_strength_index + 1) >> 1);
8769         signal_power -= 95;
8770
8771         return signal_power;
8772 }
8773
8774
8775 /* 2008/01/22 MH We can not delcare RSSI/EVM total value of sliding window to
8776     be a local static. Otherwise, it may increase when we return from S3/S4. The
8777     value will be kept in memory or disk. We must delcare the value in adapter
8778     and it will be reinitialized when return from S3/S4. */
8779 void rtl8192_process_phyinfo(struct r8192_priv * priv,u8* buffer, struct ieee80211_rx_stats * pprevious_stats, struct ieee80211_rx_stats * pcurrent_stats)
8780 {
8781         bool bcheck = false;
8782         u8      rfpath;
8783         u32     nspatial_stream, tmp_val;
8784         //u8    i;
8785         static u32 slide_rssi_index=0, slide_rssi_statistics=0;
8786         static u32 slide_evm_index=0, slide_evm_statistics=0;
8787         static u32 last_rssi=0, last_evm=0;
8788
8789         static u32 slide_beacon_adc_pwdb_index=0, slide_beacon_adc_pwdb_statistics=0;
8790         static u32 last_beacon_adc_pwdb=0;
8791
8792         struct ieee80211_hdr_3addr *hdr;
8793         u16 sc ;
8794         unsigned int frag,seq;
8795         hdr = (struct ieee80211_hdr_3addr *)buffer;
8796         sc = le16_to_cpu(hdr->seq_ctl);
8797         frag = WLAN_GET_SEQ_FRAG(sc);
8798         seq = WLAN_GET_SEQ_SEQ(sc);
8799         //cosa add 04292008 to record the sequence number
8800         pcurrent_stats->Seq_Num = seq;
8801         //
8802         // Check whether we should take the previous packet into accounting
8803         //
8804         if(!pprevious_stats->bIsAMPDU)
8805         {
8806                 // if previous packet is not aggregated packet
8807                 bcheck = true;
8808         }else
8809         {
8810         #if 0
8811                 // if previous packet is aggregated packet, and current packet
8812                 //  (1) is not AMPDU
8813                 //  (2) is the first packet of one AMPDU
8814                 // that means the previous packet is the last one aggregated packet
8815                 if( !pcurrent_stats->bIsAMPDU || pcurrent_stats->bFirstMPDU)
8816                         bcheck = true;
8817         #endif
8818         }
8819
8820
8821         if(slide_rssi_statistics++ >= PHY_RSSI_SLID_WIN_MAX)
8822         {
8823                 slide_rssi_statistics = PHY_RSSI_SLID_WIN_MAX;
8824                 last_rssi = priv->stats.slide_signal_strength[slide_rssi_index];
8825                 priv->stats.slide_rssi_total -= last_rssi;
8826         }
8827         priv->stats.slide_rssi_total += pprevious_stats->SignalStrength;
8828
8829         priv->stats.slide_signal_strength[slide_rssi_index++] = pprevious_stats->SignalStrength;
8830         if(slide_rssi_index >= PHY_RSSI_SLID_WIN_MAX)
8831                 slide_rssi_index = 0;
8832
8833         // <1> Showed on UI for user, in dbm
8834         tmp_val = priv->stats.slide_rssi_total/slide_rssi_statistics;
8835         priv->stats.signal_strength = rtl819x_translate_todbm((u8)tmp_val);
8836         pcurrent_stats->rssi = priv->stats.signal_strength;
8837         //
8838         // If the previous packet does not match the criteria, neglect it
8839         //
8840         if(!pprevious_stats->bPacketMatchBSSID)
8841         {
8842                 if(!pprevious_stats->bToSelfBA)
8843                         return;
8844         }
8845
8846         if(!bcheck)
8847                 return;
8848
8849
8850         //rtl8190_process_cck_rxpathsel(priv,pprevious_stats);//only rtl8190 supported
8851
8852         //
8853         // Check RSSI
8854         //
8855         priv->stats.num_process_phyinfo++;
8856
8857         /* record the general signal strength to the sliding window. */
8858
8859
8860         // <2> Showed on UI for engineering
8861         // hardware does not provide rssi information for each rf path in CCK
8862         if(!pprevious_stats->bIsCCK && (pprevious_stats->bPacketToSelf || pprevious_stats->bToSelfBA))
8863         {
8864                 for (rfpath = RF90_PATH_A; rfpath < priv->NumTotalRFPath; rfpath++)
8865                 {
8866                      if (!rtl8192_phy_CheckIsLegalRFPath(priv->ieee80211->dev, rfpath))
8867                                  continue;
8868
8869                         //Fixed by Jacken 2008-03-20
8870                         if(priv->stats.rx_rssi_percentage[rfpath] == 0)
8871                         {
8872                                 priv->stats.rx_rssi_percentage[rfpath] = pprevious_stats->RxMIMOSignalStrength[rfpath];
8873                                 //DbgPrint("MIMO RSSI initialize \n");
8874                         }
8875                         if(pprevious_stats->RxMIMOSignalStrength[rfpath]  > priv->stats.rx_rssi_percentage[rfpath])
8876                         {
8877                                 priv->stats.rx_rssi_percentage[rfpath] =
8878                                         ( (priv->stats.rx_rssi_percentage[rfpath]*(Rx_Smooth_Factor-1)) +
8879                                         (pprevious_stats->RxMIMOSignalStrength[rfpath])) /(Rx_Smooth_Factor);
8880                                 priv->stats.rx_rssi_percentage[rfpath] = priv->stats.rx_rssi_percentage[rfpath]  + 1;
8881                         }
8882                         else
8883                         {
8884                                 priv->stats.rx_rssi_percentage[rfpath] =
8885                                         ( (priv->stats.rx_rssi_percentage[rfpath]*(Rx_Smooth_Factor-1)) +
8886                                         (pprevious_stats->RxMIMOSignalStrength[rfpath])) /(Rx_Smooth_Factor);
8887                         }
8888                         RT_TRACE(COMP_DBG,"priv->stats.rx_rssi_percentage[rfPath]  = %d \n" ,priv->stats.rx_rssi_percentage[rfpath] );
8889                 }
8890         }
8891
8892
8893         //
8894         // Check PWDB.
8895         //
8896         RT_TRACE(COMP_RXDESC, "Smooth %s PWDB = %d\n",
8897                                 pprevious_stats->bIsCCK? "CCK": "OFDM",
8898                                 pprevious_stats->RxPWDBAll);
8899
8900         if(pprevious_stats->bPacketBeacon)
8901         {
8902 /* record the beacon pwdb to the sliding window. */
8903                 if(slide_beacon_adc_pwdb_statistics++ >= PHY_Beacon_RSSI_SLID_WIN_MAX)
8904                 {
8905                         slide_beacon_adc_pwdb_statistics = PHY_Beacon_RSSI_SLID_WIN_MAX;
8906                         last_beacon_adc_pwdb = priv->stats.Slide_Beacon_pwdb[slide_beacon_adc_pwdb_index];
8907                         priv->stats.Slide_Beacon_Total -= last_beacon_adc_pwdb;
8908                         //DbgPrint("slide_beacon_adc_pwdb_index = %d, last_beacon_adc_pwdb = %d, Adapter->RxStats.Slide_Beacon_Total = %d\n",
8909                         //      slide_beacon_adc_pwdb_index, last_beacon_adc_pwdb, Adapter->RxStats.Slide_Beacon_Total);
8910                 }
8911                 priv->stats.Slide_Beacon_Total += pprevious_stats->RxPWDBAll;
8912                 priv->stats.Slide_Beacon_pwdb[slide_beacon_adc_pwdb_index] = pprevious_stats->RxPWDBAll;
8913                 //DbgPrint("slide_beacon_adc_pwdb_index = %d, pPreviousRfd->Status.RxPWDBAll = %d\n", slide_beacon_adc_pwdb_index, pPreviousRfd->Status.RxPWDBAll);
8914                 slide_beacon_adc_pwdb_index++;
8915                 if(slide_beacon_adc_pwdb_index >= PHY_Beacon_RSSI_SLID_WIN_MAX)
8916                         slide_beacon_adc_pwdb_index = 0;
8917                 pprevious_stats->RxPWDBAll = priv->stats.Slide_Beacon_Total/slide_beacon_adc_pwdb_statistics;
8918                 if(pprevious_stats->RxPWDBAll >= 3)
8919                         pprevious_stats->RxPWDBAll -= 3;
8920         }
8921
8922         RT_TRACE(COMP_RXDESC, "Smooth %s PWDB = %d\n",
8923                                 pprevious_stats->bIsCCK? "CCK": "OFDM",
8924                                 pprevious_stats->RxPWDBAll);
8925
8926
8927         if(pprevious_stats->bPacketToSelf || pprevious_stats->bPacketBeacon || pprevious_stats->bToSelfBA)
8928         {
8929                 if(priv->undecorated_smoothed_pwdb < 0) // initialize
8930                 {
8931                         priv->undecorated_smoothed_pwdb = pprevious_stats->RxPWDBAll;
8932                         //DbgPrint("First pwdb initialize \n");
8933                 }
8934 #if 1
8935                 if(pprevious_stats->RxPWDBAll > (u32)priv->undecorated_smoothed_pwdb)
8936                 {
8937                         priv->undecorated_smoothed_pwdb =
8938                                         ( ((priv->undecorated_smoothed_pwdb)*(Rx_Smooth_Factor-1)) +
8939                                         (pprevious_stats->RxPWDBAll)) /(Rx_Smooth_Factor);
8940                         priv->undecorated_smoothed_pwdb = priv->undecorated_smoothed_pwdb + 1;
8941                 }
8942                 else
8943                 {
8944                         priv->undecorated_smoothed_pwdb =
8945                                         ( ((priv->undecorated_smoothed_pwdb)*(Rx_Smooth_Factor-1)) +
8946                                         (pprevious_stats->RxPWDBAll)) /(Rx_Smooth_Factor);
8947                 }
8948 #else
8949                 //Fixed by Jacken 2008-03-20
8950                 if(pPreviousRfd->Status.RxPWDBAll > (u32)pHalData->UndecoratedSmoothedPWDB)
8951                 {
8952                         pHalData->UndecoratedSmoothedPWDB =
8953                                         ( ((pHalData->UndecoratedSmoothedPWDB)* 5) + (pPreviousRfd->Status.RxPWDBAll)) / 6;
8954                         pHalData->UndecoratedSmoothedPWDB = pHalData->UndecoratedSmoothedPWDB + 1;
8955                 }
8956                 else
8957                 {
8958                         pHalData->UndecoratedSmoothedPWDB =
8959                                         ( ((pHalData->UndecoratedSmoothedPWDB)* 5) + (pPreviousRfd->Status.RxPWDBAll)) / 6;
8960                 }
8961 #endif
8962
8963         }
8964
8965         //
8966         // Check EVM
8967         //
8968         /* record the general EVM to the sliding window. */
8969         if(pprevious_stats->SignalQuality == 0)
8970         {
8971         }
8972         else
8973         {
8974                 if(pprevious_stats->bPacketToSelf || pprevious_stats->bPacketBeacon || pprevious_stats->bToSelfBA){
8975                         if(slide_evm_statistics++ >= PHY_RSSI_SLID_WIN_MAX){
8976                                 slide_evm_statistics = PHY_RSSI_SLID_WIN_MAX;
8977                                 last_evm = priv->stats.slide_evm[slide_evm_index];
8978                                 priv->stats.slide_evm_total -= last_evm;
8979                         }
8980
8981                         priv->stats.slide_evm_total += pprevious_stats->SignalQuality;
8982
8983                         priv->stats.slide_evm[slide_evm_index++] = pprevious_stats->SignalQuality;
8984                         if(slide_evm_index >= PHY_RSSI_SLID_WIN_MAX)
8985                                 slide_evm_index = 0;
8986
8987                         // <1> Showed on UI for user, in percentage.
8988                         tmp_val = priv->stats.slide_evm_total/slide_evm_statistics;
8989                         priv->stats.signal_quality = tmp_val;
8990                         //cosa add 10/11/2007, Showed on UI for user in Windows Vista, for Link quality.
8991                         priv->stats.last_signal_strength_inpercent = tmp_val;
8992                 }
8993
8994                 // <2> Showed on UI for engineering
8995                 if(pprevious_stats->bPacketToSelf || pprevious_stats->bPacketBeacon || pprevious_stats->bToSelfBA)
8996                 {
8997                         for(nspatial_stream = 0; nspatial_stream<2 ; nspatial_stream++) // 2 spatial stream
8998                         {
8999                                 if(pprevious_stats->RxMIMOSignalQuality[nspatial_stream] != -1)
9000                                 {
9001                                         if(priv->stats.rx_evm_percentage[nspatial_stream] == 0) // initialize
9002                                         {
9003                                                 priv->stats.rx_evm_percentage[nspatial_stream] = pprevious_stats->RxMIMOSignalQuality[nspatial_stream];
9004                                         }
9005                                         priv->stats.rx_evm_percentage[nspatial_stream] =
9006                                                 ( (priv->stats.rx_evm_percentage[nspatial_stream]* (Rx_Smooth_Factor-1)) +
9007                                                 (pprevious_stats->RxMIMOSignalQuality[nspatial_stream]* 1)) / (Rx_Smooth_Factor);
9008                                 }
9009                         }
9010                 }
9011         }
9012
9013
9014 }
9015
9016 /*-----------------------------------------------------------------------------
9017  * Function:    rtl819x_query_rxpwrpercentage()
9018  *
9019  * Overview:
9020  *
9021  * Input:               char            antpower
9022  *
9023  * Output:              NONE
9024  *
9025  * Return:              0-100 percentage
9026  *
9027  * Revised History:
9028  *      When            Who             Remark
9029  *      05/26/2008      amy             Create Version 0 porting from windows code.
9030  *
9031  *---------------------------------------------------------------------------*/
9032 static u8 rtl819x_query_rxpwrpercentage(
9033         char            antpower
9034         )
9035 {
9036         if ((antpower <= -100) || (antpower >= 20))
9037         {
9038                 return  0;
9039         }
9040         else if (antpower >= 0)
9041         {
9042                 return  100;
9043         }
9044         else
9045         {
9046                 return  (100+antpower);
9047         }
9048
9049 }       /* QueryRxPwrPercentage */
9050
9051 static u8
9052 rtl819x_evm_dbtopercentage(
9053     char value
9054     )
9055 {
9056     char ret_val;
9057
9058     ret_val = value;
9059
9060     if(ret_val >= 0)
9061         ret_val = 0;
9062     if(ret_val <= -33)
9063         ret_val = -33;
9064     ret_val = 0 - ret_val;
9065     ret_val*=3;
9066         if(ret_val == 99)
9067                 ret_val = 100;
9068     return(ret_val);
9069 }
9070 //
9071 //      Description:
9072 //      We want good-looking for signal strength/quality
9073 //      2007/7/19 01:09, by cosa.
9074 //
9075 long
9076 rtl819x_signal_scale_mapping(
9077         long currsig
9078         )
9079 {
9080         long retsig;
9081
9082         // Step 1. Scale mapping.
9083         if(currsig >= 61 && currsig <= 100)
9084         {
9085                 retsig = 90 + ((currsig - 60) / 4);
9086         }
9087         else if(currsig >= 41 && currsig <= 60)
9088         {
9089                 retsig = 78 + ((currsig - 40) / 2);
9090         }
9091         else if(currsig >= 31 && currsig <= 40)
9092         {
9093                 retsig = 66 + (currsig - 30);
9094         }
9095         else if(currsig >= 21 && currsig <= 30)
9096         {
9097                 retsig = 54 + (currsig - 20);
9098         }
9099         else if(currsig >= 5 && currsig <= 20)
9100         {
9101                 retsig = 42 + (((currsig - 5) * 2) / 3);
9102         }
9103         else if(currsig == 4)
9104         {
9105                 retsig = 36;
9106         }
9107         else if(currsig == 3)
9108         {
9109                 retsig = 27;
9110         }
9111         else if(currsig == 2)
9112         {
9113                 retsig = 18;
9114         }
9115         else if(currsig == 1)
9116         {
9117                 retsig = 9;
9118         }
9119         else
9120         {
9121                 retsig = currsig;
9122         }
9123
9124         return retsig;
9125 }
9126
9127 #ifdef RTL8192SU
9128 /*-----------------------------------------------------------------------------
9129  * Function:    QueryRxPhyStatus8192S()
9130  *
9131  * Overview:
9132  *
9133  * Input:               NONE
9134  *
9135  * Output:              NONE
9136  *
9137  * Return:              NONE
9138  *
9139  * Revised History:
9140  *      When            Who             Remark
9141  *      06/01/2007      MHC             Create Version 0.
9142  *      06/05/2007      MHC             Accordign to HW's new data sheet, we add CCK and OFDM
9143  *                                              descriptor definition.
9144  *      07/04/2007      MHC             According to Jerry and Bryant's document. We read
9145  *                                              ir_isolation and ext_lna for RF's init value and use
9146  *                                              to compensate RSSI after receiving packets.
9147  *      09/10/2008      MHC             Modify name and PHY status field for 92SE.
9148  *      09/19/2008      MHC             Add CCK/OFDM SS/SQ for 92S series.
9149  *
9150  *---------------------------------------------------------------------------*/
9151 static void rtl8192SU_query_rxphystatus(
9152         struct r8192_priv * priv,
9153         struct ieee80211_rx_stats * pstats,
9154         rx_desc_819x_usb        *pDesc,
9155         rx_drvinfo_819x_usb  * pdrvinfo,
9156         struct ieee80211_rx_stats * precord_stats,
9157         bool bpacket_match_bssid,
9158         bool bpacket_toself,
9159         bool bPacketBeacon,
9160         bool bToSelfBA
9161         )
9162 {
9163         //PRT_RFD_STATUS                pRtRfdStatus = &(pRfd->Status);
9164         //PHY_STS_CCK_8192S_T   *pCck_buf;
9165         phy_sts_cck_819xusb_t   *       pcck_buf;
9166         phy_ofdm_rx_status_rxsc_sgien_exintfflag* prxsc;
9167         //u8                            *prxpkt;
9168         //u8                            i, max_spatial_stream, tmp_rxsnr, tmp_rxevm, rxsc_sgien_exflg;
9169         u8                              i, max_spatial_stream, rxsc_sgien_exflg;
9170         char                            rx_pwr[4], rx_pwr_all=0;
9171         //long                          rx_avg_pwr = 0;
9172         //char                          rx_snrX, rx_evmX;
9173         u8                              evm, pwdb_all;
9174         u32                             RSSI, total_rssi=0;//, total_evm=0;
9175 //      long                            signal_strength_index = 0;
9176         u8                              is_cck_rate=0;
9177         u8                              rf_rx_num = 0;
9178
9179
9180
9181         priv->stats.numqry_phystatus++;
9182
9183         is_cck_rate = rx_hal_is_cck_rate(pDesc);
9184
9185         // Record it for next packet processing
9186         memset(precord_stats, 0, sizeof(struct ieee80211_rx_stats));
9187         pstats->bPacketMatchBSSID = precord_stats->bPacketMatchBSSID = bpacket_match_bssid;
9188         pstats->bPacketToSelf = precord_stats->bPacketToSelf = bpacket_toself;
9189         pstats->bIsCCK = precord_stats->bIsCCK = is_cck_rate;//RX_HAL_IS_CCK_RATE(pDrvInfo);
9190         pstats->bPacketBeacon = precord_stats->bPacketBeacon = bPacketBeacon;
9191         pstats->bToSelfBA = precord_stats->bToSelfBA = bToSelfBA;
9192
9193 #ifndef RTL8192SU
9194         phy_sts_ofdm_819xusb_t* pofdm_buf = NULL;
9195         prxpkt = (u8*)pdrvinfo;
9196
9197         /* Move pointer to the 16th bytes. Phy status start address. */
9198         prxpkt += sizeof(rx_drvinfo_819x_usb);
9199
9200         /* Initial the cck and ofdm buffer pointer */
9201         pcck_buf = (phy_sts_cck_819xusb_t *)prxpkt;
9202         pofdm_buf = (phy_sts_ofdm_819xusb_t *)prxpkt;
9203 #endif
9204
9205         pstats->RxMIMOSignalQuality[0] = -1;
9206         pstats->RxMIMOSignalQuality[1] = -1;
9207         precord_stats->RxMIMOSignalQuality[0] = -1;
9208         precord_stats->RxMIMOSignalQuality[1] = -1;
9209
9210         if(is_cck_rate)
9211         {
9212                 u8 report;//, tmp_pwdb;
9213                 //char cck_adc_pwdb[4];
9214
9215                 // CCK Driver info Structure is not the same as OFDM packet.
9216                 pcck_buf = (phy_sts_cck_819xusb_t *)pdrvinfo;
9217
9218                 //
9219                 // (1)Hardware does not provide RSSI for CCK
9220                 //
9221
9222                 //
9223                 // (2)PWDB, Average PWDB cacluated by hardware (for rate adaptive)
9224                 //
9225
9226                 priv->stats.numqry_phystatusCCK++;
9227
9228                 if(!priv->bCckHighPower)
9229                 {
9230                         report = pcck_buf->cck_agc_rpt & 0xc0;
9231                         report = report>>6;
9232                         switch(report)
9233                         {
9234                                 //Fixed by Jacken from Bryant 2008-03-20
9235                                 //Original value is -38 , -26 , -14 , -2
9236                                 //Fixed value is -35 , -23 , -11 , 6
9237                                 case 0x3:
9238                                         rx_pwr_all = -35 - (pcck_buf->cck_agc_rpt & 0x3e);
9239                                         break;
9240                                 case 0x2:
9241                                         rx_pwr_all = -23 - (pcck_buf->cck_agc_rpt & 0x3e);
9242                                         break;
9243                                 case 0x1:
9244                                         rx_pwr_all = -11 - (pcck_buf->cck_agc_rpt & 0x3e);
9245                                         break;
9246                                 case 0x0:
9247                                         rx_pwr_all = 8 - (pcck_buf->cck_agc_rpt & 0x3e);//6->8
9248                                         break;
9249                         }
9250                 }
9251                 else
9252                 {
9253                         report = pdrvinfo->cfosho[0] & 0x60;
9254                         report = report>>5;
9255                         switch(report)
9256                         {
9257                                 case 0x3:
9258                                         rx_pwr_all = -35 - ((pcck_buf->cck_agc_rpt & 0x1f)<<1) ;
9259                                         break;
9260                                 case 0x2:
9261                                         rx_pwr_all = -23 - ((pcck_buf->cck_agc_rpt & 0x1f)<<1);
9262                                         break;
9263                                 case 0x1:
9264                                         rx_pwr_all = -11 - ((pcck_buf->cck_agc_rpt & 0x1f)<<1) ;
9265                                         break;
9266                                 case 0x0:
9267                                         rx_pwr_all = -8 - ((pcck_buf->cck_agc_rpt & 0x1f)<<1) ;//6->-8
9268                                         break;
9269                         }
9270                 }
9271
9272                 pwdb_all = rtl819x_query_rxpwrpercentage(rx_pwr_all);//check it
9273                 pstats->RxPWDBAll = precord_stats->RxPWDBAll = pwdb_all;
9274                 //pstats->RecvSignalPower = pwdb_all;
9275                 pstats->RecvSignalPower = rx_pwr_all;
9276
9277                 //
9278                 // (3) Get Signal Quality (EVM)
9279                 //
9280         //if(bpacket_match_bssid)
9281         {
9282                         u8      sq;
9283
9284                         if(pstats->RxPWDBAll > 40)
9285                         {
9286                                 sq = 100;
9287                         }else
9288                         {
9289                                 sq = pcck_buf->sq_rpt;
9290
9291                                 if(pcck_buf->sq_rpt > 64)
9292                                         sq = 0;
9293                                 else if (pcck_buf->sq_rpt < 20)
9294                                         sq = 100;
9295                                 else
9296                                         sq = ((64-sq) * 100) / 44;
9297                         }
9298                         pstats->SignalQuality = precord_stats->SignalQuality = sq;
9299                         pstats->RxMIMOSignalQuality[0] = precord_stats->RxMIMOSignalQuality[0] = sq;
9300                         pstats->RxMIMOSignalQuality[1] = precord_stats->RxMIMOSignalQuality[1] = -1;
9301                 }
9302         }
9303         else
9304         {
9305                 priv->stats.numqry_phystatusHT++;
9306
9307                 // 2008/09/19 MH For 92S debug, RX RF path always enable!!
9308                 priv->brfpath_rxenable[0] = priv->brfpath_rxenable[1] = TRUE;
9309
9310                 //
9311                 // (1)Get RSSI for HT rate
9312                 //
9313                 //for(i=RF90_PATH_A; i<priv->NumTotalRFPath; i++)
9314                 for(i=RF90_PATH_A; i<RF90_PATH_MAX; i++)
9315                 {
9316                         // 2008/01/30 MH we will judge RF RX path now.
9317                         if (priv->brfpath_rxenable[i])
9318                                 rf_rx_num++;
9319                         //else
9320                         //      continue;
9321
9322                 //if (!rtl8192_phy_CheckIsLegalRFPath(priv->ieee80211->dev, i))
9323                 //              continue;
9324
9325                         //Fixed by Jacken from Bryant 2008-03-20
9326                         //Original value is 106
9327                         //rx_pwr[i] = ((pofdm_buf->trsw_gain_X[i]&0x3F)*2) - 106;
9328                         rx_pwr[i] = ((pdrvinfo->gain_trsw[i]&0x3F)*2) - 110;
9329
9330                         /* Translate DBM to percentage. */
9331                         RSSI = rtl819x_query_rxpwrpercentage(rx_pwr[i]);        //check ok
9332                         total_rssi += RSSI;
9333                         RT_TRACE(COMP_RF, "RF-%d RXPWR=%x RSSI=%d\n", i, rx_pwr[i], RSSI);
9334
9335                         //Get Rx snr value in DB
9336                         //tmp_rxsnr =   pofdm_buf->rxsnr_X[i];
9337                         //rx_snrX = (char)(tmp_rxsnr);
9338                         //rx_snrX /= 2;
9339                         //priv->stats.rxSNRdB[i] = (long)rx_snrX;
9340                         priv->stats.rxSNRdB[i] = (long)(pdrvinfo->rxsnr[i]/2);
9341
9342                         /* Translate DBM to percentage. */
9343                         //RSSI = rtl819x_query_rxpwrpercentage(rx_pwr[i]);
9344                         //total_rssi += RSSI;
9345
9346                         /* Record Signal Strength for next packet */
9347                         //if(bpacket_match_bssid)
9348                         {
9349                                 pstats->RxMIMOSignalStrength[i] =(u8) RSSI;
9350                                 precord_stats->RxMIMOSignalStrength[i] =(u8) RSSI;
9351                         }
9352                 }
9353
9354
9355                 //
9356                 // (2)PWDB, Average PWDB cacluated by hardware (for rate adaptive)
9357                 //
9358                 //Fixed by Jacken from Bryant 2008-03-20
9359                 //Original value is 106
9360                 //rx_pwr_all = (((pofdm_buf->pwdb_all ) >> 1 )& 0x7f) -106;
9361                 rx_pwr_all = (((pdrvinfo->pwdb_all ) >> 1 )& 0x7f) -106;
9362                 pwdb_all = rtl819x_query_rxpwrpercentage(rx_pwr_all);
9363
9364                 pstats->RxPWDBAll = precord_stats->RxPWDBAll = pwdb_all;
9365                 pstats->RxPower = precord_stats->RxPower =  rx_pwr_all;
9366                 pstats->RecvSignalPower = rx_pwr_all;
9367
9368                 //
9369                 // (3)EVM of HT rate
9370                 //
9371                 //if(pdrvinfo->RxHT && pdrvinfo->RxRate>=DESC90_RATEMCS8 &&
9372                  //     pdrvinfo->RxRate<=DESC90_RATEMCS15)
9373                  if(pDesc->RxHT && pDesc->RxMCS>=DESC92S_RATEMCS8 &&
9374                         pDesc->RxMCS<=DESC92S_RATEMCS15)
9375                         max_spatial_stream = 2; //both spatial stream make sense
9376                 else
9377                         max_spatial_stream = 1; //only spatial stream 1 makes sense
9378
9379                 for(i=0; i<max_spatial_stream; i++)
9380                 {
9381                         //tmp_rxevm =   pofdm_buf->rxevm_X[i];
9382                         //rx_evmX = (char)(tmp_rxevm);
9383
9384                         // Do not use shift operation like "rx_evmX >>= 1" because the compilor of free build environment
9385                         // fill most significant bit to "zero" when doing shifting operation which may change a negative
9386                         // value to positive one, then the dbm value (which is supposed to be negative)  is not correct anymore.
9387                         //rx_evmX /= 2; //dbm
9388
9389                         //evm = rtl819x_evm_dbtopercentage(rx_evmX);
9390                         evm = rtl819x_evm_dbtopercentage( (pdrvinfo->rxevm[i] /*/ 2*/));        //dbm
9391                         RT_TRACE(COMP_RF, "RXRATE=%x RXEVM=%x EVM=%s%d\n", pDesc->RxMCS, pdrvinfo->rxevm[i], "%", evm);
9392 #if 0
9393                         EVM = SignalScaleMapping(EVM);//make it good looking, from 0~100//=====>from here
9394 #endif
9395
9396                         //if(bpacket_match_bssid)
9397                         {
9398                                 if(i==0) // Fill value in RFD, Get the first spatial stream only
9399                                         pstats->SignalQuality = precord_stats->SignalQuality = (u8)(evm & 0xff);
9400                                 pstats->RxMIMOSignalQuality[i] = precord_stats->RxMIMOSignalQuality[i] = (u8)(evm & 0xff);
9401                         }
9402                 }
9403
9404
9405                 /* record rx statistics for debug */
9406                 //rxsc_sgien_exflg = pofdm_buf->rxsc_sgien_exflg;
9407                 prxsc = (phy_ofdm_rx_status_rxsc_sgien_exintfflag *)&rxsc_sgien_exflg;
9408                 //if(pdrvinfo->BW)      //40M channel
9409                 if(pDesc->BW)   //40M channel
9410                         priv->stats.received_bwtype[1+pdrvinfo->rxsc]++;
9411                 else                            //20M channel
9412                         priv->stats.received_bwtype[0]++;
9413         }
9414
9415         //UI BSS List signal strength(in percentage), make it good looking, from 0~100.
9416         //It is assigned to the BSS List in GetValueFromBeaconOrProbeRsp().
9417         if(is_cck_rate)
9418         {
9419                 pstats->SignalStrength = precord_stats->SignalStrength = (u8)(rtl819x_signal_scale_mapping((long)pwdb_all));//PWDB_ALL;//check ok
9420
9421         }
9422         else
9423         {
9424                 //pRfd->Status.SignalStrength = pRecordRfd->Status.SignalStrength = (u8)(SignalScaleMapping(total_rssi/=RF90_PATH_MAX));//(u8)(total_rssi/=RF90_PATH_MAX);
9425                 // We can judge RX path number now.
9426                 if (rf_rx_num != 0)
9427                         pstats->SignalStrength = precord_stats->SignalStrength = (u8)(rtl819x_signal_scale_mapping((long)(total_rssi/=rf_rx_num)));
9428         }
9429 }/* QueryRxPhyStatus8192S */
9430 #else
9431 static void rtl8192_query_rxphystatus(
9432         struct r8192_priv * priv,
9433         struct ieee80211_rx_stats * pstats,
9434         rx_drvinfo_819x_usb  * pdrvinfo,
9435         struct ieee80211_rx_stats * precord_stats,
9436         bool bpacket_match_bssid,
9437         bool bpacket_toself,
9438         bool bPacketBeacon,
9439         bool bToSelfBA
9440         )
9441 {
9442         //PRT_RFD_STATUS                pRtRfdStatus = &(pRfd->Status);
9443         phy_sts_ofdm_819xusb_t* pofdm_buf;
9444         phy_sts_cck_819xusb_t   *       pcck_buf;
9445         phy_ofdm_rx_status_rxsc_sgien_exintfflag* prxsc;
9446         u8                              *prxpkt;
9447         u8                              i, max_spatial_stream, tmp_rxsnr, tmp_rxevm, rxsc_sgien_exflg;
9448         char                            rx_pwr[4], rx_pwr_all=0;
9449         //long                          rx_avg_pwr = 0;
9450         char                            rx_snrX, rx_evmX;
9451         u8                              evm, pwdb_all;
9452         u32                             RSSI, total_rssi=0;//, total_evm=0;
9453 //      long                            signal_strength_index = 0;
9454         u8                              is_cck_rate=0;
9455         u8                              rf_rx_num = 0;
9456
9457
9458         priv->stats.numqry_phystatus++;
9459
9460         is_cck_rate = rx_hal_is_cck_rate(pdrvinfo);
9461
9462         // Record it for next packet processing
9463         memset(precord_stats, 0, sizeof(struct ieee80211_rx_stats));
9464         pstats->bPacketMatchBSSID = precord_stats->bPacketMatchBSSID = bpacket_match_bssid;
9465         pstats->bPacketToSelf = precord_stats->bPacketToSelf = bpacket_toself;
9466         pstats->bIsCCK = precord_stats->bIsCCK = is_cck_rate;//RX_HAL_IS_CCK_RATE(pDrvInfo);
9467         pstats->bPacketBeacon = precord_stats->bPacketBeacon = bPacketBeacon;
9468         pstats->bToSelfBA = precord_stats->bToSelfBA = bToSelfBA;
9469
9470         prxpkt = (u8*)pdrvinfo;
9471
9472         /* Move pointer to the 16th bytes. Phy status start address. */
9473         prxpkt += sizeof(rx_drvinfo_819x_usb);
9474
9475         /* Initial the cck and ofdm buffer pointer */
9476         pcck_buf = (phy_sts_cck_819xusb_t *)prxpkt;
9477         pofdm_buf = (phy_sts_ofdm_819xusb_t *)prxpkt;
9478
9479         pstats->RxMIMOSignalQuality[0] = -1;
9480         pstats->RxMIMOSignalQuality[1] = -1;
9481         precord_stats->RxMIMOSignalQuality[0] = -1;
9482         precord_stats->RxMIMOSignalQuality[1] = -1;
9483
9484         if(is_cck_rate)
9485         {
9486                 //
9487                 // (1)Hardware does not provide RSSI for CCK
9488                 //
9489
9490                 //
9491                 // (2)PWDB, Average PWDB cacluated by hardware (for rate adaptive)
9492                 //
9493                 u8 report;//, cck_agc_rpt;
9494
9495                 priv->stats.numqry_phystatusCCK++;
9496
9497                 if(!priv->bCckHighPower)
9498                 {
9499                         report = pcck_buf->cck_agc_rpt & 0xc0;
9500                         report = report>>6;
9501                         switch(report)
9502                         {
9503                                 //Fixed by Jacken from Bryant 2008-03-20
9504                                 //Original value is -38 , -26 , -14 , -2
9505                                 //Fixed value is -35 , -23 , -11 , 6
9506                                 case 0x3:
9507                                         rx_pwr_all = -35 - (pcck_buf->cck_agc_rpt & 0x3e);
9508                                         break;
9509                                 case 0x2:
9510                                         rx_pwr_all = -23 - (pcck_buf->cck_agc_rpt & 0x3e);
9511                                         break;
9512                                 case 0x1:
9513                                         rx_pwr_all = -11 - (pcck_buf->cck_agc_rpt & 0x3e);
9514                                         break;
9515                                 case 0x0:
9516                                         rx_pwr_all = 6 - (pcck_buf->cck_agc_rpt & 0x3e);
9517                                         break;
9518                         }
9519                 }
9520                 else
9521                 {
9522                         report = pcck_buf->cck_agc_rpt & 0x60;
9523                         report = report>>5;
9524                         switch(report)
9525                         {
9526                                 case 0x3:
9527                                         rx_pwr_all = -35 - ((pcck_buf->cck_agc_rpt & 0x1f)<<1) ;
9528                                         break;
9529                                 case 0x2:
9530                                         rx_pwr_all = -23 - ((pcck_buf->cck_agc_rpt & 0x1f)<<1);
9531                                         break;
9532                                 case 0x1:
9533                                         rx_pwr_all = -11 - ((pcck_buf->cck_agc_rpt & 0x1f)<<1) ;
9534                                         break;
9535                                 case 0x0:
9536                                         rx_pwr_all = 6 - ((pcck_buf->cck_agc_rpt & 0x1f)<<1) ;
9537                                         break;
9538                         }
9539                 }
9540
9541                 pwdb_all = rtl819x_query_rxpwrpercentage(rx_pwr_all);
9542                 pstats->RxPWDBAll = precord_stats->RxPWDBAll = pwdb_all;
9543                 pstats->RecvSignalPower = pwdb_all;
9544
9545                 //
9546                 // (3) Get Signal Quality (EVM)
9547                 //
9548                 //if(bpacket_match_bssid)
9549                 {
9550                         u8      sq;
9551
9552                         if(pstats->RxPWDBAll > 40)
9553                         {
9554                                 sq = 100;
9555                         }else
9556                         {
9557                                 sq = pcck_buf->sq_rpt;
9558
9559                                 if(pcck_buf->sq_rpt > 64)
9560                                         sq = 0;
9561                                 else if (pcck_buf->sq_rpt < 20)
9562                                         sq = 100;
9563                                 else
9564                                         sq = ((64-sq) * 100) / 44;
9565                         }
9566                         pstats->SignalQuality = precord_stats->SignalQuality = sq;
9567                         pstats->RxMIMOSignalQuality[0] = precord_stats->RxMIMOSignalQuality[0] = sq;
9568                         pstats->RxMIMOSignalQuality[1] = precord_stats->RxMIMOSignalQuality[1] = -1;
9569                 }
9570         }
9571         else
9572         {
9573                 priv->stats.numqry_phystatusHT++;
9574                 //
9575                 // (1)Get RSSI for HT rate
9576                 //
9577                 for(i=RF90_PATH_A; i<priv->NumTotalRFPath; i++)
9578                 {
9579                         // 2008/01/30 MH we will judge RF RX path now.
9580                         if (priv->brfpath_rxenable[i])
9581                                 rf_rx_num++;
9582                         else
9583                                 continue;
9584
9585                 if (!rtl8192_phy_CheckIsLegalRFPath(priv->ieee80211->dev, i))
9586                                 continue;
9587
9588                         //Fixed by Jacken from Bryant 2008-03-20
9589                         //Original value is 106
9590                         rx_pwr[i] = ((pofdm_buf->trsw_gain_X[i]&0x3F)*2) - 106;
9591
9592                         //Get Rx snr value in DB
9593                         tmp_rxsnr =     pofdm_buf->rxsnr_X[i];
9594                         rx_snrX = (char)(tmp_rxsnr);
9595                         //rx_snrX >>= 1;;
9596                         rx_snrX /= 2;
9597                         priv->stats.rxSNRdB[i] = (long)rx_snrX;
9598
9599                         /* Translate DBM to percentage. */
9600                         RSSI = rtl819x_query_rxpwrpercentage(rx_pwr[i]);
9601                         total_rssi += RSSI;
9602
9603                         /* Record Signal Strength for next packet */
9604                         //if(bpacket_match_bssid)
9605                         {
9606                                 pstats->RxMIMOSignalStrength[i] =(u8) RSSI;
9607                                 precord_stats->RxMIMOSignalStrength[i] =(u8) RSSI;
9608                         }
9609                 }
9610
9611
9612                 //
9613                 // (2)PWDB, Average PWDB cacluated by hardware (for rate adaptive)
9614                 //
9615                 //Fixed by Jacken from Bryant 2008-03-20
9616                 //Original value is 106
9617                 rx_pwr_all = (((pofdm_buf->pwdb_all ) >> 1 )& 0x7f) -106;
9618                 pwdb_all = rtl819x_query_rxpwrpercentage(rx_pwr_all);
9619
9620                 pstats->RxPWDBAll = precord_stats->RxPWDBAll = pwdb_all;
9621                 pstats->RxPower = precord_stats->RxPower =  rx_pwr_all;
9622
9623                 //
9624                 // (3)EVM of HT rate
9625                 //
9626                 if(pdrvinfo->RxHT && pdrvinfo->RxRate>=DESC90_RATEMCS8 &&
9627                         pdrvinfo->RxRate<=DESC90_RATEMCS15)
9628                         max_spatial_stream = 2; //both spatial stream make sense
9629                 else
9630                         max_spatial_stream = 1; //only spatial stream 1 makes sense
9631
9632                 for(i=0; i<max_spatial_stream; i++)
9633                 {
9634                         tmp_rxevm =     pofdm_buf->rxevm_X[i];
9635                         rx_evmX = (char)(tmp_rxevm);
9636
9637                         // Do not use shift operation like "rx_evmX >>= 1" because the compilor of free build environment
9638                         // fill most significant bit to "zero" when doing shifting operation which may change a negative
9639                         // value to positive one, then the dbm value (which is supposed to be negative)  is not correct anymore.
9640                         rx_evmX /= 2;   //dbm
9641
9642                         evm = rtl819x_evm_dbtopercentage(rx_evmX);
9643 #if 0
9644                         EVM = SignalScaleMapping(EVM);//make it good looking, from 0~100
9645 #endif
9646                         //if(bpacket_match_bssid)
9647                         {
9648                                 if(i==0) // Fill value in RFD, Get the first spatial stream only
9649                                         pstats->SignalQuality = precord_stats->SignalQuality = (u8)(evm & 0xff);
9650                                 pstats->RxMIMOSignalQuality[i] = precord_stats->RxMIMOSignalQuality[i] = (u8)(evm & 0xff);
9651                         }
9652                 }
9653
9654
9655                 /* record rx statistics for debug */
9656                 rxsc_sgien_exflg = pofdm_buf->rxsc_sgien_exflg;
9657                 prxsc = (phy_ofdm_rx_status_rxsc_sgien_exintfflag *)&rxsc_sgien_exflg;
9658                 if(pdrvinfo->BW)        //40M channel
9659                         priv->stats.received_bwtype[1+prxsc->rxsc]++;
9660                 else                            //20M channel
9661                         priv->stats.received_bwtype[0]++;
9662         }
9663
9664         //UI BSS List signal strength(in percentage), make it good looking, from 0~100.
9665         //It is assigned to the BSS List in GetValueFromBeaconOrProbeRsp().
9666         if(is_cck_rate)
9667         {
9668                 pstats->SignalStrength = precord_stats->SignalStrength = (u8)(rtl819x_signal_scale_mapping((long)pwdb_all));//PWDB_ALL;
9669
9670         }
9671         else
9672         {
9673                 //pRfd->Status.SignalStrength = pRecordRfd->Status.SignalStrength = (u8)(SignalScaleMapping(total_rssi/=RF90_PATH_MAX));//(u8)(total_rssi/=RF90_PATH_MAX);
9674                 // We can judge RX path number now.
9675                 if (rf_rx_num != 0)
9676                         pstats->SignalStrength = precord_stats->SignalStrength = (u8)(rtl819x_signal_scale_mapping((long)(total_rssi/=rf_rx_num)));
9677         }
9678 }       /* QueryRxPhyStatus8190Pci */
9679 #endif
9680
9681 void
9682 rtl8192_record_rxdesc_forlateruse(
9683         struct ieee80211_rx_stats *     psrc_stats,
9684         struct ieee80211_rx_stats *     ptarget_stats
9685 )
9686 {
9687         ptarget_stats->bIsAMPDU = psrc_stats->bIsAMPDU;
9688         ptarget_stats->bFirstMPDU = psrc_stats->bFirstMPDU;
9689         ptarget_stats->Seq_Num = psrc_stats->Seq_Num;
9690 }
9691
9692 #ifdef RTL8192SU
9693 static void rtl8192SU_query_rxphystatus(
9694         struct r8192_priv * priv,
9695         struct ieee80211_rx_stats * pstats,
9696         rx_desc_819x_usb        *pDesc,
9697         rx_drvinfo_819x_usb  * pdrvinfo,
9698         struct ieee80211_rx_stats * precord_stats,
9699         bool bpacket_match_bssid,
9700         bool bpacket_toself,
9701         bool bPacketBeacon,
9702         bool bToSelfBA
9703         );
9704 void rtl8192SU_TranslateRxSignalStuff(struct sk_buff *skb,
9705                                    struct ieee80211_rx_stats * pstats,
9706                                    rx_desc_819x_usb     *pDesc,
9707                                    rx_drvinfo_819x_usb  *pdrvinfo)
9708 {
9709         // TODO: We must only check packet for current MAC address. Not finish
9710         rtl8192_rx_info *info = (struct rtl8192_rx_info *)skb->cb;
9711         struct net_device *dev=info->dev;
9712         struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
9713         bool bpacket_match_bssid, bpacket_toself;
9714         bool bPacketBeacon=FALSE, bToSelfBA=FALSE;
9715         static struct ieee80211_rx_stats  previous_stats;
9716         struct ieee80211_hdr_3addr *hdr;//by amy
9717        u16 fc,type;
9718
9719         // Get Signal Quality for only RX data queue (but not command queue)
9720
9721         u8* tmp_buf;
9722         //u16 tmp_buf_len = 0;
9723         u8  *praddr;
9724
9725         /* Get MAC frame start address. */
9726         tmp_buf = (u8*)skb->data;// + get_rxpacket_shiftbytes_819xusb(pstats);
9727
9728         hdr = (struct ieee80211_hdr_3addr *)tmp_buf;
9729         fc = le16_to_cpu(hdr->frame_ctl);
9730         type = WLAN_FC_GET_TYPE(fc);
9731         praddr = hdr->addr1;
9732
9733         /* Check if the received packet is acceptabe. */
9734         bpacket_match_bssid = ((IEEE80211_FTYPE_CTL != type) &&
9735                                                         (eqMacAddr(priv->ieee80211->current_network.bssid,  (fc & IEEE80211_FCTL_TODS)? hdr->addr1 : (fc & IEEE80211_FCTL_FROMDS )? hdr->addr2 : hdr->addr3))
9736                                                                  && (!pstats->bHwError) && (!pstats->bCRC)&& (!pstats->bICV));
9737         bpacket_toself =  bpacket_match_bssid & (eqMacAddr(praddr, priv->ieee80211->dev->dev_addr));
9738
9739 #if 1//cosa
9740                 if(WLAN_FC_GET_FRAMETYPE(fc)== IEEE80211_STYPE_BEACON)
9741                 {
9742                         bPacketBeacon = true;
9743                         //DbgPrint("Beacon 2, MatchBSSID = %d, ToSelf = %d \n", bPacketMatchBSSID, bPacketToSelf);
9744                 }
9745                 if(WLAN_FC_GET_FRAMETYPE(fc) == IEEE80211_STYPE_BLOCKACK)
9746                 {
9747                         if((eqMacAddr(praddr,dev->dev_addr)))
9748                                 bToSelfBA = true;
9749                                 //DbgPrint("BlockAck, MatchBSSID = %d, ToSelf = %d \n", bPacketMatchBSSID, bPacketToSelf);
9750                 }
9751
9752 #endif
9753
9754
9755         if(bpacket_match_bssid)
9756         {
9757                 priv->stats.numpacket_matchbssid++;
9758         }
9759         if(bpacket_toself){
9760                 priv->stats.numpacket_toself++;
9761         }
9762         //
9763         // Process PHY information for previous packet (RSSI/PWDB/EVM)
9764         //
9765         // Because phy information is contained in the last packet of AMPDU only, so driver
9766         // should process phy information of previous packet
9767         rtl8192_process_phyinfo(priv, tmp_buf, &previous_stats, pstats);
9768         rtl8192SU_query_rxphystatus(priv, pstats, pDesc, pdrvinfo, &previous_stats, bpacket_match_bssid,bpacket_toself,bPacketBeacon,bToSelfBA);
9769         rtl8192_record_rxdesc_forlateruse(pstats, &previous_stats);
9770
9771 }
9772 #else
9773 void TranslateRxSignalStuff819xUsb(struct sk_buff *skb,
9774                                    struct ieee80211_rx_stats * pstats,
9775                                    rx_drvinfo_819x_usb  *pdrvinfo)
9776 {
9777         // TODO: We must only check packet for current MAC address. Not finish
9778         rtl8192_rx_info *info = (struct rtl8192_rx_info *)skb->cb;
9779         struct net_device *dev=info->dev;
9780         struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
9781         bool bpacket_match_bssid, bpacket_toself;
9782         bool bPacketBeacon=FALSE, bToSelfBA=FALSE;
9783         static struct ieee80211_rx_stats  previous_stats;
9784         struct ieee80211_hdr_3addr *hdr;//by amy
9785        u16 fc,type;
9786
9787         // Get Signal Quality for only RX data queue (but not command queue)
9788
9789         u8* tmp_buf;
9790         //u16 tmp_buf_len = 0;
9791         u8  *praddr;
9792
9793         /* Get MAC frame start address. */
9794         tmp_buf = (u8*)skb->data;// + get_rxpacket_shiftbytes_819xusb(pstats);
9795
9796         hdr = (struct ieee80211_hdr_3addr *)tmp_buf;
9797         fc = le16_to_cpu(hdr->frame_ctl);
9798         type = WLAN_FC_GET_TYPE(fc);
9799         praddr = hdr->addr1;
9800
9801         /* Check if the received packet is acceptabe. */
9802         bpacket_match_bssid = ((IEEE80211_FTYPE_CTL != type) &&
9803                                                         (eqMacAddr(priv->ieee80211->current_network.bssid,  (fc & IEEE80211_FCTL_TODS)? hdr->addr1 : (fc & IEEE80211_FCTL_FROMDS )? hdr->addr2 : hdr->addr3))
9804                                                                  && (!pstats->bHwError) && (!pstats->bCRC)&& (!pstats->bICV));
9805         bpacket_toself =  bpacket_match_bssid & (eqMacAddr(praddr, priv->ieee80211->dev->dev_addr));
9806
9807 #if 1//cosa
9808                 if(WLAN_FC_GET_FRAMETYPE(fc)== IEEE80211_STYPE_BEACON)
9809                 {
9810                         bPacketBeacon = true;
9811                         //DbgPrint("Beacon 2, MatchBSSID = %d, ToSelf = %d \n", bPacketMatchBSSID, bPacketToSelf);
9812                 }
9813                 if(WLAN_FC_GET_FRAMETYPE(fc) == IEEE80211_STYPE_BLOCKACK)
9814                 {
9815                         if((eqMacAddr(praddr,dev->dev_addr)))
9816                                 bToSelfBA = true;
9817                                 //DbgPrint("BlockAck, MatchBSSID = %d, ToSelf = %d \n", bPacketMatchBSSID, bPacketToSelf);
9818                 }
9819
9820 #endif
9821
9822
9823         if(bpacket_match_bssid)
9824         {
9825                 priv->stats.numpacket_matchbssid++;
9826         }
9827         if(bpacket_toself){
9828                 priv->stats.numpacket_toself++;
9829         }
9830         //
9831         // Process PHY information for previous packet (RSSI/PWDB/EVM)
9832         //
9833         // Because phy information is contained in the last packet of AMPDU only, so driver
9834         // should process phy information of previous packet
9835         rtl8192_process_phyinfo(priv, tmp_buf, &previous_stats, pstats);
9836         rtl8192_query_rxphystatus(priv, pstats, pdrvinfo, &previous_stats, bpacket_match_bssid,bpacket_toself,bPacketBeacon,bToSelfBA);
9837         rtl8192_record_rxdesc_forlateruse(pstats, &previous_stats);
9838
9839 }
9840 #endif
9841
9842 /**
9843 * Function:     UpdateReceivedRateHistogramStatistics
9844 * Overview:     Recored down the received data rate
9845 *
9846 * Input:
9847 *       struct net_device *dev
9848 *       struct ieee80211_rx_stats *stats
9849 *
9850 * Output:
9851 *
9852 *                       (priv->stats.ReceivedRateHistogram[] is updated)
9853 * Return:
9854 *               None
9855 */
9856 void
9857 UpdateReceivedRateHistogramStatistics8190(
9858         struct net_device *dev,
9859         struct ieee80211_rx_stats *stats
9860         )
9861 {
9862         struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
9863         u32 rcvType=1;   //0: Total, 1:OK, 2:CRC, 3:ICV
9864         u32 rateIndex;
9865         u32 preamble_guardinterval;  //1: short preamble/GI, 0: long preamble/GI
9866
9867
9868         if(stats->bCRC)
9869         rcvType = 2;
9870         else if(stats->bICV)
9871         rcvType = 3;
9872
9873         if(stats->bShortPreamble)
9874         preamble_guardinterval = 1;// short
9875         else
9876         preamble_guardinterval = 0;// long
9877
9878         switch(stats->rate)
9879         {
9880                 //
9881                 // CCK rate
9882                 //
9883                 case MGN_1M:    rateIndex = 0;  break;
9884                 case MGN_2M:    rateIndex = 1;  break;
9885                 case MGN_5_5M:  rateIndex = 2;  break;
9886                 case MGN_11M:   rateIndex = 3;  break;
9887                 //
9888                 // Legacy OFDM rate
9889                 //
9890                 case MGN_6M:    rateIndex = 4;  break;
9891                 case MGN_9M:    rateIndex = 5;  break;
9892                 case MGN_12M:   rateIndex = 6;  break;
9893                 case MGN_18M:   rateIndex = 7;  break;
9894                 case MGN_24M:   rateIndex = 8;  break;
9895                 case MGN_36M:   rateIndex = 9;  break;
9896                 case MGN_48M:   rateIndex = 10; break;
9897                 case MGN_54M:   rateIndex = 11; break;
9898                 //
9899                 // 11n High throughput rate
9900                 //
9901                 case MGN_MCS0:  rateIndex = 12; break;
9902                 case MGN_MCS1:  rateIndex = 13; break;
9903                 case MGN_MCS2:  rateIndex = 14; break;
9904                 case MGN_MCS3:  rateIndex = 15; break;
9905                 case MGN_MCS4:  rateIndex = 16; break;
9906                 case MGN_MCS5:  rateIndex = 17; break;
9907                 case MGN_MCS6:  rateIndex = 18; break;
9908                 case MGN_MCS7:  rateIndex = 19; break;
9909                 case MGN_MCS8:  rateIndex = 20; break;
9910                 case MGN_MCS9:  rateIndex = 21; break;
9911                 case MGN_MCS10: rateIndex = 22; break;
9912                 case MGN_MCS11: rateIndex = 23; break;
9913                 case MGN_MCS12: rateIndex = 24; break;
9914                 case MGN_MCS13: rateIndex = 25; break;
9915                 case MGN_MCS14: rateIndex = 26; break;
9916                 case MGN_MCS15: rateIndex = 27; break;
9917                 default:        rateIndex = 28; break;
9918         }
9919     priv->stats.received_preamble_GI[preamble_guardinterval][rateIndex]++;
9920     priv->stats.received_rate_histogram[0][rateIndex]++; //total
9921     priv->stats.received_rate_histogram[rcvType][rateIndex]++;
9922 }
9923
9924 #ifdef RTL8192SU
9925 void rtl8192SU_query_rxdesc_status(struct sk_buff *skb, struct ieee80211_rx_stats *stats, bool bIsRxAggrSubframe)
9926 {
9927         rtl8192_rx_info *info = (struct rtl8192_rx_info *)skb->cb;
9928         struct net_device *dev=info->dev;
9929         struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
9930         //rx_desc_819x_usb *desc = (rx_desc_819x_usb *)skb->data;
9931         rx_drvinfo_819x_usb  *driver_info = NULL;
9932
9933         //PRT_RFD_STATUS                                pRtRfdStatus = &pRfd->Status;
9934         //PHAL_DATA_8192SUSB                    pHalData = GET_HAL_DATA(Adapter);
9935         //pu1Byte               pDesc = (pu1Byte)pDescIn;
9936         //PRX_DRIVER_INFO_8192S         pDrvInfo;
9937
9938         rx_desc_819x_usb *desc = (rx_desc_819x_usb *)skb->data;
9939
9940         if(0)
9941         {
9942                 int m = 0;
9943                 printk("========================");
9944                 for(m=0; m<skb->len; m++){
9945                         if((m%32) == 0)
9946                                 printk("\n");
9947                         printk("%2x ",((u8*)skb->data)[m]);
9948                 }
9949                 printk("\n========================\n");
9950
9951         }
9952
9953
9954         //
9955         //Get Rx Descriptor Raw Information
9956         //
9957         stats->Length = desc->Length ;
9958         stats->RxDrvInfoSize = desc->RxDrvInfoSize*RX_DRV_INFO_SIZE_UNIT;
9959         stats->RxBufShift = (desc->Shift)&0x03;
9960         stats->bICV = desc->ICV;
9961         stats->bCRC = desc->CRC32;
9962         stats->bHwError = stats->bCRC|stats->bICV;
9963         stats->Decrypted = !desc->SWDec;//RTL8190 set this bit to indicate that Hw does not decrypt packet
9964         stats->bIsAMPDU = (desc->AMSDU==1);
9965         stats->bFirstMPDU = (desc->PAGGR==1) && (desc->FAGGR==1);
9966         stats->bShortPreamble = desc->SPLCP;
9967         stats->RxIs40MHzPacket = (desc->BW==1);
9968         stats->TimeStampLow = desc->TSFL;
9969
9970         if((desc->FAGGR==1) || (desc->PAGGR==1))
9971         {// Rx A-MPDU
9972                 RT_TRACE(COMP_RXDESC, "FirstAGGR = %d, PartAggr = %d\n", desc->FAGGR, desc->PAGGR);
9973         }
9974 //YJ,test,090310
9975 if(stats->bHwError)
9976 {
9977         if(stats->bICV)
9978                 printk("%s: Receive ICV error!!!!!!!!!!!!!!!!!!!!!!\n", __FUNCTION__);
9979         if(stats->bCRC)
9980                 printk("%s: Receive CRC error!!!!!!!!!!!!!!!!!!!!!!\n", __FUNCTION__);
9981 }
9982
9983         if(IS_UNDER_11N_AES_MODE(priv->ieee80211))
9984         {
9985                 // Always received ICV error packets in AES mode.
9986                 // This fixed HW later MIC write bug.
9987                 if(stats->bICV && !stats->bCRC)
9988                 {
9989                         stats->bICV = FALSE;
9990                         stats->bHwError = FALSE;
9991                 }
9992         }
9993
9994         // Transform HwRate to MRate
9995         if(!stats->bHwError)
9996                 //stats->DataRate = HwRateToMRate(
9997                 //      (BOOLEAN)GET_RX_DESC_RXHT(pDesc),
9998                 //      (u1Byte)GET_RX_DESC_RXMCS(pDesc),
9999                 //      (BOOLEAN)GET_RX_DESC_PAGGR(pDesc));
10000                 stats->rate = rtl8192SU_HwRateToMRate(desc->RxHT, desc->RxMCS, desc->PAGGR);
10001         else
10002                 stats->rate = MGN_1M;
10003
10004         //
10005         // Collect Rx rate/AMPDU/TSFL
10006         //
10007         //UpdateRxdRateHistogramStatistics8192S(Adapter, pRfd);
10008         //UpdateRxAMPDUHistogramStatistics8192S(Adapter, pRfd);
10009         //UpdateRxPktTimeStamp8192S(Adapter, pRfd);
10010         UpdateReceivedRateHistogramStatistics8190(dev, stats);
10011         //UpdateRxAMPDUHistogramStatistics8192S(dev, stats);    //FIXLZM
10012         UpdateRxPktTimeStamp8190(dev, stats);
10013
10014         //
10015         // Get PHY Status and RSVD parts.
10016         // <Roger_Notes> It only appears on last aggregated packet.
10017         //
10018         if (desc->PHYStatus)
10019         {
10020                 //driver_info = (rx_drvinfo_819x_usb *)(skb->data + RX_DESC_SIZE + stats->RxBufShift);
10021                 driver_info = (rx_drvinfo_819x_usb *)(skb->data + sizeof(rx_desc_819x_usb) + \
10022                                 stats->RxBufShift);
10023                 if(0)
10024                 {
10025                         int m = 0;
10026                         printk("========================\n");
10027                         printk("RX_DESC_SIZE:%d, RxBufShift:%d, RxDrvInfoSize:%d\n",
10028                                         RX_DESC_SIZE, stats->RxBufShift, stats->RxDrvInfoSize);
10029                         for(m=0; m<32; m++){
10030                                printk("%2x ",((u8*)driver_info)[m]);
10031                         }
10032                         printk("\n========================\n");
10033
10034                 }
10035
10036         }
10037
10038         //YJ,add,090107
10039         skb_pull(skb, sizeof(rx_desc_819x_usb));
10040         //YJ,add,090107,end
10041
10042         //
10043         // Get Total offset of MPDU Frame Body
10044         //
10045         if((stats->RxBufShift + stats->RxDrvInfoSize) > 0)
10046         {
10047                 stats->bShift = 1;
10048                 //YJ,add,090107
10049                 skb_pull(skb, stats->RxBufShift + stats->RxDrvInfoSize);
10050                 //YJ,add,090107,end
10051         }
10052
10053         //
10054         // Get PHY Status and RSVD parts.
10055         // <Roger_Notes> It only appears on last aggregated packet.
10056         //
10057         if (desc->PHYStatus)
10058         {
10059                 rtl8192SU_TranslateRxSignalStuff(skb, stats, desc, driver_info);
10060         }
10061 }
10062 #else
10063 void query_rxdesc_status(struct sk_buff *skb, struct ieee80211_rx_stats *stats, bool bIsRxAggrSubframe)
10064 {
10065         rtl8192_rx_info *info = (struct rtl8192_rx_info *)skb->cb;
10066         struct net_device *dev=info->dev;
10067         struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
10068         //rx_desc_819x_usb *desc = (rx_desc_819x_usb *)skb->data;
10069         rx_drvinfo_819x_usb  *driver_info = NULL;
10070
10071         //
10072         //Get Rx Descriptor Information
10073         //
10074         {
10075                 rx_desc_819x_usb *desc = (rx_desc_819x_usb *)skb->data;
10076
10077                 stats->Length = desc->Length;
10078                 stats->RxDrvInfoSize = desc->RxDrvInfoSize;
10079                 stats->RxBufShift = 0;//desc->Shift&0x03;
10080                 stats->bICV = desc->ICV;
10081                 stats->bCRC = desc->CRC32;
10082                 stats->bHwError = stats->bCRC|stats->bICV;
10083                 //RTL8190 set this bit to indicate that Hw does not decrypt packet
10084                 stats->Decrypted = !desc->SWDec;
10085         }
10086
10087         if((priv->ieee80211->pHTInfo->bCurrentHTSupport == true) && (priv->ieee80211->pairwise_key_type == KEY_TYPE_CCMP))
10088         {
10089                 stats->bHwError = false;
10090         }
10091         else
10092         {
10093                 stats->bHwError = stats->bCRC|stats->bICV;
10094         }
10095
10096         if(stats->Length < 24 || stats->Length > MAX_8192U_RX_SIZE)
10097                 stats->bHwError |= 1;
10098         //
10099         //Get Driver Info
10100         //
10101         // TODO: Need to verify it on FGPA platform
10102         //Driver info are written to the RxBuffer following rx desc
10103         if (stats->RxDrvInfoSize != 0) {
10104                 driver_info = (rx_drvinfo_819x_usb *)(skb->data + sizeof(rx_desc_819x_usb) + \
10105                                 stats->RxBufShift);
10106                 /* unit: 0.5M */
10107                 /* TODO */
10108                 if(!stats->bHwError){
10109                         u8      ret_rate;
10110                         ret_rate = HwRateToMRate90(driver_info->RxHT, driver_info->RxRate);
10111                         if(ret_rate == 0xff)
10112                         {
10113                                 // Abnormal Case: Receive CRC OK packet with Rx descriptor indicating non supported rate.
10114                                 // Special Error Handling here, 2008.05.16, by Emily
10115
10116                                 stats->bHwError = 1;
10117                                 stats->rate = MGN_1M;   //Set 1M rate by default
10118                         }else
10119                         {
10120                                 stats->rate = ret_rate;
10121                         }
10122                 }
10123                 else
10124                         stats->rate = 0x02;
10125
10126                 stats->bShortPreamble = driver_info->SPLCP;
10127
10128
10129                 UpdateReceivedRateHistogramStatistics8190(dev, stats);
10130
10131                 stats->bIsAMPDU = (driver_info->PartAggr==1);
10132                 stats->bFirstMPDU = (driver_info->PartAggr==1) && (driver_info->FirstAGGR==1);
10133 #if 0
10134                 // TODO: it is debug only. It should be disabled in released driver. 2007.1.12 by Joseph
10135                 UpdateRxAMPDUHistogramStatistics8190(Adapter, pRfd);
10136 #endif
10137                 stats->TimeStampLow = driver_info->TSFL;
10138                 // xiong mask it, 070514
10139                 //pRfd->Status.TimeStampHigh = PlatformEFIORead4Byte(Adapter, TSFR+4);
10140                 // stats->TimeStampHigh = read_nic_dword(dev,  TSFR+4);
10141
10142                 UpdateRxPktTimeStamp8190(dev, stats);
10143
10144                 //
10145                 // Rx A-MPDU
10146                 //
10147                 if(driver_info->FirstAGGR==1 || driver_info->PartAggr == 1)
10148                         RT_TRACE(COMP_RXDESC, "driver_info->FirstAGGR = %d, driver_info->PartAggr = %d\n",
10149                                         driver_info->FirstAGGR, driver_info->PartAggr);
10150
10151         }
10152
10153         skb_pull(skb,sizeof(rx_desc_819x_usb));
10154         //
10155         // Get Total offset of MPDU Frame Body
10156         //
10157         if((stats->RxBufShift + stats->RxDrvInfoSize) > 0) {
10158                 stats->bShift = 1;
10159                 skb_pull(skb,stats->RxBufShift + stats->RxDrvInfoSize);
10160         }
10161
10162         /* for debug 2008.5.29 */
10163 #if 0
10164         {
10165                 int i;
10166                 printk("\n>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>\n");
10167                 for(i = 0; i < skb->len; i++) {
10168                         if(i % 10 == 0) printk("\n");
10169                         printk("%02x ", skb->data[i]);
10170                 }
10171                 printk("\n<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<\n");
10172         }
10173 #endif
10174
10175         //added by vivi, for MP, 20080108
10176         stats->RxIs40MHzPacket = driver_info->BW;
10177         if(stats->RxDrvInfoSize != 0)
10178                 TranslateRxSignalStuff819xUsb(skb, stats, driver_info);
10179
10180 }
10181 #endif
10182
10183 #ifdef RTL8192SU
10184 #if 0
10185 /*-----------------------------------------------------------------------------
10186  * Function:    UpdateRxAMPDUHistogramStatistics8192S
10187  *
10188  * Overview:    Recored down the received A-MPDU aggregation size and pkt number
10189  *
10190  * Input:       Adapter
10191  *
10192  * Output:      Adapter
10193  *                              (Adapter->RxStats.RxAMPDUSizeHistogram[] is updated)
10194  *                              (Adapter->RxStats.RxAMPDUNumHistogram[] is updated)
10195  *
10196  * Return:      NONE
10197  *
10198  * Revised History:
10199  * When                 Who             Remark
10200  * 09/18/2008   MHC             Create Version 0.
10201  *
10202  *---------------------------------------------------------------------------*/
10203 static  void
10204 UpdateRxAMPDUHistogramStatistics8192S(
10205         struct net_device *dev,
10206         struct ieee80211_rx_stats *stats
10207         )
10208 {
10209         //HAL_DATA_TYPE                 *pHalData = GET_HAL_DATA(Adapter);
10210         u8      size_index;
10211         u8      num_index;
10212         u16     update_size = 0;
10213         u8      update_num = 0;
10214
10215         if(stats->bIsAMPDU)
10216         {
10217                 if(stats->bFirstMPDU)
10218                 {
10219                         if(stats->nRxAMPDU_Size!=0 && stats->nRxAMPDU_AggrNum!=0)
10220                         {
10221                                 update_size = stats->nRxAMPDU_Size;
10222                                 update_num = stats->nRxAMPDU_AggrNum;
10223                         }
10224                         stats->nRxAMPDU_Size = stats->Length;
10225                         stats->nRxAMPDU_AggrNum = 1;
10226                 }
10227                 else
10228                 {
10229                         stats->nRxAMPDU_Size += stats->Length;
10230                         stats->nRxAMPDU_AggrNum++;
10231                 }
10232         }
10233         else
10234         {
10235                 if(stats->nRxAMPDU_Size!=0 && stats->nRxAMPDU_AggrNum!=0)
10236                 {
10237                         update_size = stats->nRxAMPDU_Size;
10238                         update_num = stats->nRxAMPDU_AggrNum;
10239                 }
10240                 stats->nRxAMPDU_Size = 0;
10241                 stats->nRxAMPDU_AggrNum = 0;
10242         }
10243
10244         if(update_size!=0 && update_num!= 0)
10245         {
10246                 if(update_size < 4096)
10247                         size_index = 0;
10248                 else if(update_size < 8192)
10249                         size_index = 1;
10250                 else if(update_size < 16384)
10251                         size_index = 2;
10252                 else if(update_size < 32768)
10253                         size_index = 3;
10254                 else if(update_size < 65536)
10255                         size_index = 4;
10256                 else
10257                 {
10258                         RT_TRACE(COMP_RXDESC,
10259                         ("UpdateRxAMPDUHistogramStatistics8192S(): A-MPDU too large\n");
10260                 }
10261
10262                 Adapter->RxStats.RxAMPDUSizeHistogram[size_index]++;
10263
10264                 if(update_num < 5)
10265                         num_index = 0;
10266                 else if(update_num < 10)
10267                         num_index = 1;
10268                 else if(update_num < 20)
10269                         num_index = 2;
10270                 else if(update_num < 40)
10271                         num_index = 3;
10272                 else
10273                         num_index = 4;
10274
10275                 Adapter->RxStats.RxAMPDUNumHistogram[num_index]++;
10276         }
10277 }       // UpdateRxAMPDUHistogramStatistics8192S
10278 #endif
10279
10280 #endif
10281
10282
10283 #ifdef RTL8192SU
10284 //
10285 // Description:
10286 //      The strarting address of wireless lan header will shift 1 or 2 or 3 or "more" bytes for the following reason :
10287 //      (1) QoS control : shift 2 bytes
10288 //      (2) Mesh Network : shift 1 or 3 bytes
10289 //      (3) RxDriverInfo occupies  the front parts of Rx Packets buffer(shift units is in 8Bytes)
10290 //
10291 //      It is because Lextra CPU used by 8186 or 865x series assert exception if the statrting address
10292 //      of IP header is not double word alignment.
10293 //      This features is supported in 818xb and 8190 only, but not 818x.
10294 //
10295 //      parameter: PRT_RFD, Pointer of Reeceive frame descriptor which is initialized according to
10296 //                                           Rx Descriptor
10297 //      return value: unsigned int,  number of total shifted bytes
10298 //
10299 //      Notes: 2008/06/28, created by Roger
10300 //
10301 u32 GetRxPacketShiftBytes8192SU(struct ieee80211_rx_stats  *Status, bool bIsRxAggrSubframe)
10302 {
10303         //PRT_RFD_STATUS        pRtRfdStatus = &pRfd->Status;
10304
10305         return (sizeof(rx_desc_819x_usb) + Status->RxDrvInfoSize + Status->RxBufShift);
10306 }
10307
10308 void rtl8192SU_rx_nomal(struct sk_buff* skb)
10309 {
10310         rtl8192_rx_info *info = (struct rtl8192_rx_info *)skb->cb;
10311         struct net_device *dev=info->dev;
10312         struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
10313         struct ieee80211_rx_stats stats = {
10314                 .signal = 0,
10315                 .noise = -98,
10316                 .rate = 0,
10317                 //      .mac_time = jiffies,
10318                 .freq = IEEE80211_24GHZ_BAND,
10319         };
10320         u32 rx_pkt_len = 0;
10321         struct ieee80211_hdr_1addr *ieee80211_hdr = NULL;
10322         bool unicast_packet = false;
10323
10324         //printk("**********skb->len = %d\n", skb->len);
10325         /* 20 is for ps-poll */
10326         if((skb->len >=(20 + sizeof(rx_desc_819x_usb))) && (skb->len < RX_URB_SIZE)) {
10327
10328                 /* first packet should not contain Rx aggregation header */
10329                 rtl8192SU_query_rxdesc_status(skb, &stats, false);
10330                 /* TODO */
10331
10332                 /* hardware related info */
10333                 priv->stats.rxoktotal++;  //YJ,test,090108
10334
10335                 /* Process the MPDU recevied */
10336                 skb_trim(skb, skb->len - 4/*sCrcLng*/);//FIXLZM
10337
10338                 rx_pkt_len = skb->len;
10339                 ieee80211_hdr = (struct ieee80211_hdr_1addr *)skb->data;
10340                 unicast_packet = false;
10341                 if(is_broadcast_ether_addr(ieee80211_hdr->addr1)) {
10342                         //TODO
10343                 }else if(is_multicast_ether_addr(ieee80211_hdr->addr1)){
10344                         //TODO
10345                 }else {
10346                         /* unicast packet */
10347                         unicast_packet = true;
10348                 }
10349
10350                 if(!ieee80211_rx(priv->ieee80211,skb, &stats)) {
10351                         dev_kfree_skb_any(skb);
10352                 } else {
10353                 //      priv->stats.rxoktotal++;  //YJ,test,090108
10354                         if(unicast_packet) {
10355                                 priv->stats.rxbytesunicast += rx_pkt_len;
10356                         }
10357                 }
10358
10359                 //up is firs pkt, follow is next and next
10360         }
10361         else
10362         {
10363                 priv->stats.rxurberr++;
10364                 printk("actual_length:%d\n", skb->len);
10365                 dev_kfree_skb_any(skb);
10366         }
10367
10368 }
10369 #else
10370 u32 GetRxPacketShiftBytes819xUsb(struct ieee80211_rx_stats  *Status, bool bIsRxAggrSubframe)
10371 {
10372                 return (sizeof(rx_desc_819x_usb) + Status->RxDrvInfoSize
10373                                 + Status->RxBufShift);
10374 }
10375
10376 void rtl8192_rx_nomal(struct sk_buff* skb)
10377 {
10378         rtl8192_rx_info *info = (struct rtl8192_rx_info *)skb->cb;
10379         struct net_device *dev=info->dev;
10380         struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
10381         struct ieee80211_rx_stats stats = {
10382                 .signal = 0,
10383                 .noise = -98,
10384                 .rate = 0,
10385                 //      .mac_time = jiffies,
10386                 .freq = IEEE80211_24GHZ_BAND,
10387         };
10388         u32 rx_pkt_len = 0;
10389         struct ieee80211_hdr_1addr *ieee80211_hdr = NULL;
10390         bool unicast_packet = false;
10391
10392         /* 20 is for ps-poll */
10393         if((skb->len >=(20 + sizeof(rx_desc_819x_usb))) && (skb->len < RX_URB_SIZE)) {
10394                 /* first packet should not contain Rx aggregation header */
10395                 query_rxdesc_status(skb, &stats, false);
10396                 /* TODO */
10397                 /* hardware related info */
10398                 /* Process the MPDU recevied */
10399                 skb_trim(skb, skb->len - 4/*sCrcLng*/);
10400
10401                 rx_pkt_len = skb->len;
10402                 ieee80211_hdr = (struct ieee80211_hdr_1addr *)skb->data;
10403                 unicast_packet = false;
10404                 if(is_broadcast_ether_addr(ieee80211_hdr->addr1)) {
10405                         //TODO
10406                 }else if(is_multicast_ether_addr(ieee80211_hdr->addr1)){
10407                         //TODO
10408                 }else {
10409                         /* unicast packet */
10410                         unicast_packet = true;
10411                 }
10412
10413                 if(!ieee80211_rx(priv->ieee80211,skb, &stats)) {
10414                         dev_kfree_skb_any(skb);
10415                 } else {
10416                         priv->stats.rxoktotal++;
10417                         if(unicast_packet) {
10418                                 priv->stats.rxbytesunicast += rx_pkt_len;
10419                         }
10420                 }
10421         } else {
10422                 priv->stats.rxurberr++;
10423                 printk("actual_length:%d\n", skb->len);
10424                 dev_kfree_skb_any(skb);
10425         }
10426
10427 }
10428
10429 #endif
10430
10431 void
10432 rtl819xusb_process_received_packet(
10433         struct net_device *dev,
10434         struct ieee80211_rx_stats *pstats
10435         )
10436 {
10437 //      bool bfreerfd=false, bqueued=false;
10438         u8*     frame;
10439         u16     frame_len=0;
10440         struct r8192_priv *priv = ieee80211_priv(dev);
10441 //      u8                      index = 0;
10442 //      u8                      TID = 0;
10443         //u16                   seqnum = 0;
10444         //PRX_TS_RECORD pts = NULL;
10445
10446         // Get shifted bytes of Starting address of 802.11 header. 2006.09.28, by Emily
10447         //porting by amy 080508
10448         pstats->virtual_address += get_rxpacket_shiftbytes_819xusb(pstats);
10449         frame = pstats->virtual_address;
10450         frame_len = pstats->packetlength;
10451 #ifdef TODO     // by amy about HCT
10452         if(!Adapter->bInHctTest)
10453                 CountRxErrStatistics(Adapter, pRfd);
10454 #endif
10455         {
10456         #ifdef ENABLE_PS  //by amy for adding ps function in future
10457                 RT_RF_POWER_STATE rtState;
10458                 // When RF is off, we should not count the packet for hw/sw synchronize
10459                 // reason, ie. there may be a duration while sw switch is changed and hw
10460                 // switch is being changed. 2006.12.04, by shien chang.
10461                 Adapter->HalFunc.GetHwRegHandler(Adapter, HW_VAR_RF_STATE, (u8* )(&rtState));
10462                 if (rtState == eRfOff)
10463                 {
10464                         return;
10465                 }
10466         #endif
10467         priv->stats.rxframgment++;
10468
10469         }
10470 #ifdef TODO
10471         RmMonitorSignalStrength(Adapter, pRfd);
10472 #endif
10473         /* 2007/01/16 MH Add RX command packet handle here. */
10474         /* 2007/03/01 MH We have to release RFD and return if rx pkt is cmd pkt. */
10475         if (rtl819xusb_rx_command_packet(dev, pstats))
10476         {
10477                 return;
10478         }
10479
10480 #ifdef SW_CRC_CHECK
10481         SwCrcCheck();
10482 #endif
10483
10484
10485 }
10486
10487 void query_rx_cmdpkt_desc_status(struct sk_buff *skb, struct ieee80211_rx_stats *stats)
10488 {
10489 //      rtl8192_rx_info *info = (struct rtl8192_rx_info *)skb->cb;
10490 //      struct net_device *dev=info->dev;
10491 //      struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
10492         rx_desc_819x_usb *desc = (rx_desc_819x_usb *)skb->data;
10493 //      rx_drvinfo_819x_usb  *driver_info;
10494
10495         //
10496         //Get Rx Descriptor Information
10497         //
10498         stats->virtual_address = (u8*)skb->data;
10499         stats->Length = desc->Length;
10500         stats->RxDrvInfoSize = 0;
10501         stats->RxBufShift = 0;
10502         stats->packetlength = stats->Length-scrclng;
10503         stats->fraglength = stats->packetlength;
10504         stats->fragoffset = 0;
10505         stats->ntotalfrag = 1;
10506 }
10507
10508 #ifdef RTL8192SU
10509 void rtl8192SU_rx_cmd(struct sk_buff *skb)
10510 {
10511         struct rtl8192_rx_info *info = (struct rtl8192_rx_info *)skb->cb;
10512         struct net_device *dev = info->dev;
10513
10514         /* TODO */
10515         struct ieee80211_rx_stats stats = {
10516                 .signal = 0,
10517                 .noise = -98,
10518                 .rate = 0,
10519                 //      .mac_time = jiffies,
10520                 .freq = IEEE80211_24GHZ_BAND,
10521         };
10522
10523         //
10524         // Check buffer length to determine if this is a valid MPDU.
10525         //
10526         if( (skb->len >= sizeof(rx_desc_819x_usb)) && (skb->len <= RX_URB_SIZE) )//&&
10527                 //(pHalData->SwChnlInProgress == FALSE))
10528         {
10529                 //
10530                 // Collection information in Rx descriptor.
10531                 //
10532 #if 0
10533                 pRxDesc = pContext->Buffer;
10534
10535                 pRfd->Buffer.VirtualAddress = pContext->Buffer; // 061109, rcnjko, for multi-platform consideration..
10536
10537                 pRtRfdStatus->Length = (u2Byte)GET_RX_DESC_PKT_LEN(pRxDesc);
10538                 pRtRfdStatus->RxDrvInfoSize = 0;
10539                 pRtRfdStatus->RxBufShift = 0;
10540
10541                 pRfd->PacketLength      = pRfd->Status.Length - sCrcLng;
10542                 pRfd->FragLength        = pRfd->PacketLength;
10543                 pRfd->FragOffset        = 0;
10544                 pRfd->nTotalFrag        = 1;
10545                 pRfd->queue_id = PipeIndex;
10546 #endif
10547                 query_rx_cmdpkt_desc_status(skb,&stats);
10548                 // this is to be done by amy 080508     prfd->queue_id = 1;
10549
10550                 //
10551                 // Process the MPDU recevied.
10552                 //
10553                 rtl819xusb_process_received_packet(dev,&stats);
10554
10555                 dev_kfree_skb_any(skb);
10556         }
10557         else
10558         {
10559                 //RTInsertTailListWithCnt(&pAdapter->RfdIdleQueue, &pRfd->List, &pAdapter->NumIdleRfd);
10560                 //RT_ASSERT(pAdapter->NumIdleRfd <= pAdapter->NumRfd, ("HalUsbInCommandComplete8192SUsb(): Adapter->NumIdleRfd(%d)\n", pAdapter->NumIdleRfd));
10561                 //RT_TRACE(COMP_RECV, DBG_LOUD, ("HalUsbInCommandComplete8192SUsb(): NOT enough Resources!! BufLenUsed(%d), NumIdleRfd(%d)\n",
10562                         //pContext->BufLenUsed, pAdapter->NumIdleRfd));
10563         }
10564
10565         //
10566         // Reuse USB_IN_CONTEXT since we had finished processing the
10567         // buffer in USB_IN_CONTEXT.
10568         //
10569         //HalUsbReturnInContext(pAdapter, pContext);
10570
10571         //
10572         // Issue another bulk IN transfer.
10573         //
10574         //HalUsbInMpdu(pAdapter, PipeIndex);
10575
10576         RT_TRACE(COMP_RECV, "<--- HalUsbInCommandComplete8192SUsb()\n");
10577
10578 }
10579 #else
10580 void rtl8192_rx_cmd(struct sk_buff *skb)
10581 {
10582         struct rtl8192_rx_info *info = (struct rtl8192_rx_info *)skb->cb;
10583         struct net_device *dev = info->dev;
10584         //int ret;
10585 //      struct urb *rx_urb = info->urb;
10586         /* TODO */
10587         struct ieee80211_rx_stats stats = {
10588                 .signal = 0,
10589                 .noise = -98,
10590                 .rate = 0,
10591                 //      .mac_time = jiffies,
10592                 .freq = IEEE80211_24GHZ_BAND,
10593         };
10594
10595         if((skb->len >=(20 + sizeof(rx_desc_819x_usb))) && (skb->len < RX_URB_SIZE))
10596         {
10597
10598                 query_rx_cmdpkt_desc_status(skb,&stats);
10599                 // this is to be done by amy 080508     prfd->queue_id = 1;
10600
10601
10602                 //
10603                 //  Process the command packet received.
10604                 //
10605
10606                 rtl819xusb_process_received_packet(dev,&stats);
10607
10608                 dev_kfree_skb_any(skb);
10609         }
10610         else
10611                 ;
10612
10613
10614 #if 0
10615         desc = (u32*)(skb->data);
10616         cmd = (desc[0] >> 30) & 0x03;
10617
10618         if(cmd == 0x00) {//beacon interrupt
10619                 //send beacon packet
10620                 skb = ieee80211_get_beacon(priv->ieee80211);
10621
10622                 if(!skb){
10623                         DMESG("not enought memory for allocating beacon");
10624                         return;
10625                 }
10626                 skb->cb[0] = BEACON_PRIORITY;
10627                 skb->cb[1] = 0;
10628                 skb->cb[2] = ieeerate2rtlrate(priv->ieee80211->basic_rate);
10629                 ret = rtl8192_tx(dev, skb);
10630
10631                 if( ret != 0 ){
10632                         printk(KERN_ALERT "tx beacon packet error : %d !\n", ret);
10633                 }
10634                 dev_kfree_skb_any(skb);
10635         } else {//0x00
10636                 //{ log the device information
10637                 // At present, It is not implemented just now.
10638                 //}
10639         }
10640 #endif
10641 }
10642 #endif
10643
10644 void rtl8192_irq_rx_tasklet(struct r8192_priv *priv)
10645 {
10646         struct sk_buff *skb;
10647         struct rtl8192_rx_info *info;
10648
10649         while (NULL != (skb = skb_dequeue(&priv->skb_queue))) {
10650                 info = (struct rtl8192_rx_info *)skb->cb;
10651                 switch (info->out_pipe) {
10652                 /* Nomal packet pipe */
10653                         case 3:
10654                                 //RT_TRACE(COMP_RECV, "normal in-pipe index(%d)\n",info->out_pipe);
10655                                 priv->IrpPendingCount--;
10656                                 priv->ops->rtl819x_rx_nomal(skb);
10657                                 break;
10658
10659                                 /* Command packet pipe */
10660                         case 9:
10661                                 RT_TRACE(COMP_RECV, "command in-pipe index(%d)\n",\
10662                                                 info->out_pipe);
10663                                 priv->ops->rtl819x_rx_cmd(skb);
10664                                 break;
10665
10666                         default: /* should never get here! */
10667                                 RT_TRACE(COMP_ERR, "Unknown in-pipe index(%d)\n",\
10668                                                 info->out_pipe);
10669                                 dev_kfree_skb(skb);
10670                                 break;
10671
10672                 }
10673         }
10674 }
10675
10676
10677
10678 /****************************************************************************
10679      ---------------------------- USB_STUFF---------------------------
10680 *****************************************************************************/
10681 //LZM Merge from windows HalUsbSetQueuePipeMapping8192SUsb 090319
10682 static void HalUsbSetQueuePipeMapping8192SUsb(struct usb_interface *intf, struct net_device *dev)
10683 {
10684         struct r8192_priv *priv = ieee80211_priv(dev);
10685         struct usb_host_interface *iface_desc;
10686         struct usb_endpoint_descriptor *endpoint;
10687         u8 i = 0;
10688
10689         priv->ep_in_num = 0;
10690         priv->ep_out_num = 0;
10691         memset(priv->RtOutPipes,0,16);
10692         memset(priv->RtInPipes,0,16);
10693
10694         iface_desc = intf->cur_altsetting;
10695         priv->ep_num = iface_desc->desc.bNumEndpoints;
10696
10697         for (i = 0; i < priv->ep_num; ++i) {
10698                 endpoint = &iface_desc->endpoint[i].desc;
10699                 if (usb_endpoint_is_bulk_in(endpoint)) {
10700                         priv->RtInPipes[priv->ep_in_num] = usb_endpoint_num(endpoint);
10701                         priv->ep_in_num ++;
10702                         //printk("in_endpoint_idx = %d\n", usb_endpoint_num(endpoint));
10703                 } else if (usb_endpoint_is_bulk_out(endpoint)) {
10704                         priv->RtOutPipes[priv->ep_out_num] = usb_endpoint_num(endpoint);
10705                         priv->ep_out_num ++;
10706                         //printk("out_endpoint_idx = %d\n", usb_endpoint_num(endpoint));
10707                 }
10708         }
10709         {
10710                 memset(priv->txqueue_to_outpipemap,0,9);
10711                 if (priv->ep_num == 6) {
10712                         // BK, BE, VI, VO, HCCA, TXCMD, MGNT, HIGH, BEACON
10713                         u8 queuetopipe[] = {3, 2, 1, 0, 4, 4, 4, 4, 4};
10714
10715                         memcpy(priv->txqueue_to_outpipemap,queuetopipe,9);
10716                 } else if (priv->ep_num == 4) {
10717                         // BK, BE, VI, VO, HCCA, TXCMD, MGNT, HIGH, BEACON
10718                         u8 queuetopipe[] = {1, 1, 0, 0, 2, 2, 2, 2, 2};
10719
10720                         memcpy(priv->txqueue_to_outpipemap,queuetopipe,9);
10721                 } else if (priv->ep_num > 9) {
10722                         // BK, BE, VI, VO, HCCA, TXCMD, MGNT, HIGH, BEACON
10723                         u8 queuetopipe[] = {3, 2, 1, 0, 4, 8, 7, 6, 5};
10724
10725                         memcpy(priv->txqueue_to_outpipemap,queuetopipe,9);
10726                 } else {//use sigle pipe
10727                         // BK, BE, VI, VO, HCCA, TXCMD, MGNT, HIGH, BEACON
10728                         u8 queuetopipe[] = {0, 0, 0, 0, 0, 0, 0, 0, 0};
10729                         memcpy(priv->txqueue_to_outpipemap,queuetopipe,9);
10730                 }
10731         }
10732         printk("==>ep_num:%d, in_ep_num:%d, out_ep_num:%d\n", priv->ep_num, priv->ep_in_num, priv->ep_out_num);
10733
10734         printk("==>RtInPipes:");
10735         for(i=0; i < priv->ep_in_num; i++)
10736                 printk("%d  ", priv->RtInPipes[i]);
10737         printk("\n");
10738
10739         printk("==>RtOutPipes:");
10740         for(i=0; i < priv->ep_out_num; i++)
10741                 printk("%d  ", priv->RtOutPipes[i]);
10742         printk("\n");
10743
10744         printk("==>txqueue_to_outpipemap for BK, BE, VI, VO, HCCA, TXCMD, MGNT, HIGH, BEACON:\n");
10745         for(i=0; i < 9; i++)
10746                 printk("%d  ", priv->txqueue_to_outpipemap[i]);
10747         printk("\n");
10748
10749         return;
10750 }
10751
10752 static const struct net_device_ops rtl8192_netdev_ops = {
10753         .ndo_open               = rtl8192_open,
10754         .ndo_stop               = rtl8192_close,
10755         .ndo_get_stats          = rtl8192_stats,
10756         .ndo_tx_timeout         = tx_timeout,
10757         .ndo_do_ioctl           = rtl8192_ioctl,
10758         .ndo_set_multicast_list = r8192_set_multicast,
10759         .ndo_set_mac_address    = r8192_set_mac_adr,
10760         .ndo_validate_addr      = eth_validate_addr,
10761         .ndo_change_mtu         = eth_change_mtu,
10762         .ndo_start_xmit         = rtl8192_ieee80211_xmit,
10763 };
10764
10765 static int __devinit rtl8192_usb_probe(struct usb_interface *intf,
10766                          const struct usb_device_id *id)
10767 {
10768 //      unsigned long ioaddr = 0;
10769         struct net_device *dev = NULL;
10770         struct r8192_priv *priv= NULL;
10771         struct usb_device *udev = interface_to_usbdev(intf);
10772
10773         RT_TRACE(COMP_INIT, "Oops: i'm coming\n");
10774
10775         dev = alloc_ieee80211(sizeof(struct r8192_priv));
10776
10777         usb_set_intfdata(intf, dev);
10778         SET_NETDEV_DEV(dev, &intf->dev);
10779         priv = ieee80211_priv(dev);
10780         priv->ieee80211 = netdev_priv(dev);
10781         priv->udev=udev;
10782
10783 #ifdef RTL8192SU
10784         HalUsbSetQueuePipeMapping8192SUsb(intf, dev);
10785 #endif
10786
10787 #ifdef RTL8192SU
10788         //printk("===============>NIC 8192SU\n");
10789         priv->ops = &rtl8192su_ops;
10790 #else
10791         //printk("===============>NIC 8192U\n");
10792         priv->ops = &rtl8192u_ops;
10793 #endif
10794
10795         dev->netdev_ops = &rtl8192_netdev_ops;
10796
10797          //DMESG("Oops: i'm coming\n");
10798         dev->wireless_handlers = (struct iw_handler_def *) &r8192_wx_handlers_def;
10799
10800         dev->type=ARPHRD_ETHER;
10801
10802         dev->watchdog_timeo = HZ*3;     //modified by john, 0805
10803
10804         if (dev_alloc_name(dev, ifname) < 0){
10805                 RT_TRACE(COMP_INIT, "Oops: devname already taken! Trying wlan%%d...\n");
10806                 ifname = "wlan%d";
10807                 dev_alloc_name(dev, ifname);
10808         }
10809
10810         RT_TRACE(COMP_INIT, "Driver probe completed1\n");
10811 #if 1
10812         if(rtl8192_init(dev)!=0){
10813                 RT_TRACE(COMP_ERR, "Initialization failed");
10814                 goto fail;
10815         }
10816 #endif
10817         netif_carrier_off(dev);
10818         netif_stop_queue(dev);
10819
10820         register_netdev(dev);
10821         RT_TRACE(COMP_INIT, "dev name=======> %s\n",dev->name);
10822         rtl8192_proc_init_one(dev);
10823
10824
10825         RT_TRACE(COMP_INIT, "Driver probe completed\n");
10826         return 0;
10827 fail:
10828         free_ieee80211(dev);
10829
10830         RT_TRACE(COMP_ERR, "wlan driver load failed\n");
10831         return -ENODEV;
10832 }
10833
10834 //detach all the work and timer structure declared or inititialize in r8192U_init function.
10835 void rtl8192_cancel_deferred_work(struct r8192_priv* priv)
10836 {
10837         cancel_work_sync(&priv->reset_wq);
10838         cancel_work_sync(&priv->qos_activate);
10839         cancel_delayed_work(&priv->watch_dog_wq);
10840         cancel_delayed_work(&priv->update_beacon_wq);
10841         cancel_delayed_work(&priv->ieee80211->hw_wakeup_wq);
10842         cancel_delayed_work(&priv->ieee80211->hw_sleep_wq);
10843         //cancel_work_sync(&priv->SetBWModeWorkItem);
10844         //cancel_work_sync(&priv->SwChnlWorkItem);
10845 }
10846
10847 static void __devexit rtl8192_usb_disconnect(struct usb_interface *intf)
10848 {
10849         struct net_device *dev = usb_get_intfdata(intf);
10850         struct r8192_priv *priv = ieee80211_priv(dev);
10851         if(dev){
10852
10853                 unregister_netdev(dev);
10854
10855                 RT_TRACE(COMP_DOWN, "=============>wlan driver to be removed\n");
10856                 rtl8192_proc_remove_one(dev);
10857
10858                         rtl8192_down(dev);
10859                 if (priv->pFirmware)
10860                 {
10861                         vfree(priv->pFirmware);
10862                         priv->pFirmware = NULL;
10863                 }
10864         //      priv->rf_close(dev);
10865 //              rtl8192_SetRFPowerState(dev, eRfOff);
10866                 destroy_workqueue(priv->priv_wq);
10867                 //rtl8192_irq_disable(dev);
10868                 //rtl8192_reset(dev);
10869                 mdelay(10);
10870
10871         }
10872         free_ieee80211(dev);
10873         RT_TRACE(COMP_DOWN, "wlan driver removed\n");
10874 }
10875
10876 static int __init rtl8192_usb_module_init(void)
10877 {
10878         printk(KERN_INFO "\nLinux kernel driver for RTL8192 based WLAN cards\n");
10879         printk(KERN_INFO "Copyright (c) 2007-2008, Realsil Wlan\n");
10880         RT_TRACE(COMP_INIT, "Initializing module");
10881         RT_TRACE(COMP_INIT, "Wireless extensions version %d", WIRELESS_EXT);
10882         rtl8192_proc_module_init();
10883         return usb_register(&rtl8192_usb_driver);
10884 }
10885
10886
10887 static void __exit rtl8192_usb_module_exit(void)
10888 {
10889         usb_deregister(&rtl8192_usb_driver);
10890
10891         RT_TRACE(COMP_DOWN, "Exiting");
10892         rtl8192_proc_module_remove();
10893 }
10894
10895
10896 void rtl8192_try_wake_queue(struct net_device *dev, int pri)
10897 {
10898         unsigned long flags;
10899         short enough_desc;
10900         struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
10901
10902         spin_lock_irqsave(&priv->tx_lock,flags);
10903         enough_desc = check_nic_enough_desc(dev,pri);
10904         spin_unlock_irqrestore(&priv->tx_lock,flags);
10905
10906         if(enough_desc)
10907                 ieee80211_wake_queue(priv->ieee80211);
10908 }
10909
10910 #if 0
10911 void DisableHWSecurityConfig8192SUsb(struct net_device *dev)
10912 {
10913         u8 SECR_value = 0x0;
10914         write_nic_byte(dev, SECR,  SECR_value);//SECR_value |  SCR_UseDK );
10915 }
10916 #endif
10917
10918 void EnableHWSecurityConfig8192(struct net_device *dev)
10919 {
10920         u8 SECR_value = 0x0;
10921         struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
10922          struct ieee80211_device* ieee = priv->ieee80211;
10923
10924         SECR_value = SCR_TxEncEnable | SCR_RxDecEnable;
10925 #if 1
10926         if (((KEY_TYPE_WEP40 == ieee->pairwise_key_type) || (KEY_TYPE_WEP104 == ieee->pairwise_key_type)) && (priv->ieee80211->auth_mode != 2))
10927         {
10928                 SECR_value |= SCR_RxUseDK;
10929                 SECR_value |= SCR_TxUseDK;
10930         }
10931         else if ((ieee->iw_mode == IW_MODE_ADHOC) && (ieee->pairwise_key_type & (KEY_TYPE_CCMP | KEY_TYPE_TKIP)))
10932         {
10933                 SECR_value |= SCR_RxUseDK;
10934                 SECR_value |= SCR_TxUseDK;
10935         }
10936 #endif
10937         //add HWSec active enable here.
10938 //default using hwsec. when peer AP is in N mode only and pairwise_key_type is none_aes(which HT_IOT_ACT_PURE_N_MODE indicates it), use software security. when peer AP is in b,g,n mode mixed and pairwise_key_type is none_aes, use g mode hw security. WB on 2008.7.4
10939
10940         ieee->hwsec_active = 1;
10941
10942         if ((ieee->pHTInfo->IOTAction&HT_IOT_ACT_PURE_N_MODE) || !hwwep)//!ieee->hwsec_support) //add hwsec_support flag to totol control hw_sec on/off
10943         {
10944                 ieee->hwsec_active = 0;
10945                 SECR_value &= ~SCR_RxDecEnable;
10946         }
10947
10948         RT_TRACE(COMP_SEC,"%s:, hwsec:%d, pairwise_key:%d, SECR_value:%x\n", __FUNCTION__, \
10949                         ieee->hwsec_active, ieee->pairwise_key_type, SECR_value);
10950         {
10951                 write_nic_byte(dev, SECR,  SECR_value);//SECR_value |  SCR_UseDK );
10952         }
10953 }
10954
10955
10956 void setKey(    struct net_device *dev,
10957                 u8 EntryNo,
10958                 u8 KeyIndex,
10959                 u16 KeyType,
10960                 u8 *MacAddr,
10961                 u8 DefaultKey,
10962                 u32 *KeyContent )
10963 {
10964         u32 TargetCommand = 0;
10965         u32 TargetContent = 0;
10966         u16 usConfig = 0;
10967         u8 i;
10968         if (EntryNo >= TOTAL_CAM_ENTRY)
10969                 RT_TRACE(COMP_ERR, "cam entry exceeds in setKey()\n");
10970
10971         RT_TRACE(COMP_SEC, "====>to setKey(), dev:%p, EntryNo:%d, KeyIndex:%d, KeyType:%d, MacAddr"MAC_FMT"\n", dev,EntryNo, KeyIndex, KeyType, MAC_ARG(MacAddr));
10972
10973         if (DefaultKey)
10974                 usConfig |= BIT15 | (KeyType<<2);
10975         else
10976                 usConfig |= BIT15 | (KeyType<<2) | KeyIndex;
10977 //      usConfig |= BIT15 | (KeyType<<2) | (DefaultKey<<5) | KeyIndex;
10978
10979
10980         for(i=0 ; i<CAM_CONTENT_COUNT; i++){
10981                 TargetCommand  = i+CAM_CONTENT_COUNT*EntryNo;
10982                 TargetCommand |= BIT31|BIT16;
10983
10984                 if(i==0){//MAC|Config
10985                         TargetContent = (u32)(*(MacAddr+0)) << 16|
10986                                         (u32)(*(MacAddr+1)) << 24|
10987                                         (u32)usConfig;
10988
10989                         write_nic_dword(dev, WCAMI, TargetContent);
10990                         write_nic_dword(dev, RWCAM, TargetCommand);
10991         //              printk("setkey cam =%8x\n", read_cam(dev, i+6*EntryNo));
10992                 }
10993                 else if(i==1){//MAC
10994                         TargetContent = (u32)(*(MacAddr+2))      |
10995                                         (u32)(*(MacAddr+3)) <<  8|
10996                                         (u32)(*(MacAddr+4)) << 16|
10997                                         (u32)(*(MacAddr+5)) << 24;
10998                         write_nic_dword(dev, WCAMI, TargetContent);
10999                         write_nic_dword(dev, RWCAM, TargetCommand);
11000                 }
11001                 else {
11002                         //Key Material
11003                         if(KeyContent !=NULL){
11004                         write_nic_dword(dev, WCAMI, (u32)(*(KeyContent+i-2)) );
11005                         write_nic_dword(dev, RWCAM, TargetCommand);
11006                 }
11007         }
11008         }
11009
11010 }
11011
11012 /***************************************************************************
11013      ------------------- module init / exit stubs ----------------
11014 ****************************************************************************/
11015 module_init(rtl8192_usb_module_init);
11016 module_exit(rtl8192_usb_module_exit);