2 Copyright-c Realtek Semiconductor Corp. All rights reserved.
12 ---------- --------------- -------------------------------
13 2008-05-14 amy create version 0 porting from windows code.
17 #include "r8192U_dm.h"
18 #include "r8192U_hw.h"
19 #include "r819xU_phy.h"
20 #include "r819xU_phyreg.h"
21 #include "r8190_rtl8256.h"
22 #include "r819xU_cmdpkt.h"
23 /*---------------------------Define Local Constant---------------------------*/
24 /* Indicate different AP vendor for IOT issue. */
25 static u32 edca_setting_DL[HT_IOT_PEER_MAX] = {
26 0x5e4322, 0x5e4322, 0x5e4322, 0x604322, 0x00a44f, 0x5ea44f
28 static u32 edca_setting_UL[HT_IOT_PEER_MAX] = {
29 0x5e4322, 0x00a44f, 0x5e4322, 0x604322, 0x5ea44f, 0x5ea44f
32 #define RTK_UL_EDCA 0xa44f
33 #define RTK_DL_EDCA 0x5e4322
34 /*---------------------------Define Local Constant---------------------------*/
37 /*------------------------Define global variable-----------------------------*/
38 /* Debug variable ? */
40 /* Store current software write register content for MAC PHY. */
41 u8 dm_shadow[16][256] = { {0} };
42 /* For Dynamic Rx Path Selection by Signal Strength */
43 DRxPathSel DM_RxPathSelTable;
44 /*------------------------Define global variable-----------------------------*/
47 /*------------------------Define local variable------------------------------*/
48 /*------------------------Define local variable------------------------------*/
51 /*--------------------Define export function prototype-----------------------*/
52 extern void dm_check_fsync(struct net_device *dev);
54 /*--------------------Define export function prototype-----------------------*/
57 /*---------------------Define local function prototype-----------------------*/
58 /* DM --> Rate Adaptive */
59 static void dm_check_rate_adaptive(struct net_device *dev);
61 /* DM --> Bandwidth switch */
62 static void dm_init_bandwidth_autoswitch(struct net_device *dev);
63 static void dm_bandwidth_autoswitch(struct net_device *dev);
65 /* DM --> TX power control */
66 /*static void dm_initialize_txpower_tracking(struct net_device *dev);*/
68 static void dm_check_txpower_tracking(struct net_device *dev);
70 /*static void dm_txpower_reset_recovery(struct net_device *dev);*/
72 /* DM --> Dynamic Init Gain by RSSI */
73 static void dm_dig_init(struct net_device *dev);
74 static void dm_ctrl_initgain_byrssi(struct net_device *dev);
75 static void dm_ctrl_initgain_byrssi_highpwr(struct net_device *dev);
76 static void dm_ctrl_initgain_byrssi_by_driverrssi(struct net_device *dev);
77 static void dm_ctrl_initgain_byrssi_by_fwfalse_alarm(struct net_device *dev);
78 static void dm_initial_gain(struct net_device *dev);
79 static void dm_pd_th(struct net_device *dev);
80 static void dm_cs_ratio(struct net_device *dev);
82 static void dm_init_ctstoself(struct net_device *dev);
83 /* DM --> EDCA turbo mode control */
84 static void dm_check_edca_turbo(struct net_device *dev);
86 /*static void dm_gpio_change_rf(struct net_device *dev);*/
87 /* DM --> Check PBC */
88 static void dm_check_pbc_gpio(struct net_device *dev);
90 /* DM --> Check current RX RF path state */
91 static void dm_check_rx_path_selection(struct net_device *dev);
92 static void dm_init_rxpath_selection(struct net_device *dev);
93 static void dm_rxpath_sel_byrssi(struct net_device *dev);
95 /* DM --> Fsync for broadcom ap */
96 static void dm_init_fsync(struct net_device *dev);
97 static void dm_deInit_fsync(struct net_device *dev);
99 /* Added by vivi, 20080522 */
100 static void dm_check_txrateandretrycount(struct net_device *dev);
102 /*---------------------Define local function prototype-----------------------*/
104 /*---------------------Define of Tx Power Control For Near/Far Range --------*/ /*Add by Jacken 2008/02/18 */
105 static void dm_init_dynamic_txpower(struct net_device *dev);
106 static void dm_dynamic_txpower(struct net_device *dev);
108 /* DM --> For rate adaptive and DIG, we must send RSSI to firmware */
109 static void dm_send_rssi_tofw(struct net_device *dev);
110 static void dm_ctstoself(struct net_device *dev);
111 /*---------------------------Define function prototype------------------------*/
113 * ================================================================================
114 * HW Dynamic mechanism interface.
115 * ================================================================================
119 * Prepare SW resource for HW dynamic mechanism.
122 * This function is only invoked at driver intialization once.
124 void init_hal_dm(struct net_device *dev)
126 struct r8192_priv *priv = ieee80211_priv(dev);
128 /* Undecorated Smoothed Signal Strength, it can utilized to dynamic mechanism. */
129 priv->undecorated_smoothed_pwdb = -1;
131 /* Initial TX Power Control for near/far range , add by amy 2008/05/15, porting from windows code. */
132 dm_init_dynamic_txpower(dev);
133 init_rate_adaptive(dev);
134 /*dm_initialize_txpower_tracking(dev);*/
136 dm_init_edca_turbo(dev);
137 dm_init_bandwidth_autoswitch(dev);
139 dm_init_rxpath_selection(dev);
140 dm_init_ctstoself(dev);
144 void deinit_hal_dm(struct net_device *dev)
146 dm_deInit_fsync(dev);
149 #ifdef USB_RX_AGGREGATION_SUPPORT
150 void dm_CheckRxAggregation(struct net_device *dev)
152 struct r8192_priv *priv = ieee80211_priv((struct net_device *)dev);
153 PRT_HIGH_THROUGHPUT pHTInfo = priv->ieee80211->pHTInfo;
154 static unsigned long lastTxOkCnt;
155 static unsigned long lastRxOkCnt;
156 unsigned long curTxOkCnt = 0;
157 unsigned long curRxOkCnt = 0;
160 if (pHalData->bForcedUsbRxAggr) {
161 if (pHalData->ForcedUsbRxAggrInfo == 0) {
162 if (pHalData->bCurrentRxAggrEnable) {
163 Adapter->HalFunc.HalUsbRxAggrHandler(Adapter, FALSE);
166 if (!pHalData->bCurrentRxAggrEnable || (pHalData->ForcedUsbRxAggrInfo != pHalData->LastUsbRxAggrInfoSetting)) {
167 Adapter->HalFunc.HalUsbRxAggrHandler(Adapter, TRUE);
174 curTxOkCnt = priv->stats.txbytesunicast - lastTxOkCnt;
175 curRxOkCnt = priv->stats.rxbytesunicast - lastRxOkCnt;
177 if ((curTxOkCnt + curRxOkCnt) < 15000000)
180 if (curTxOkCnt > 4*curRxOkCnt) {
181 if (priv->bCurrentRxAggrEnable) {
182 write_nic_dword(dev, 0x1a8, 0);
183 priv->bCurrentRxAggrEnable = false;
186 if (!priv->bCurrentRxAggrEnable && !pHTInfo->bCurrentRT2RTAggregation) {
189 ulValue = (pHTInfo->UsbRxFwAggrEn<<24) | (pHTInfo->UsbRxFwAggrPageNum<<16) |
190 (pHTInfo->UsbRxFwAggrPacketNum<<8) | (pHTInfo->UsbRxFwAggrTimeout);
192 * If usb rx firmware aggregation is enabled,
193 * when anyone of three threshold conditions above is reached,
194 * firmware will send aggregated packet to driver.
196 write_nic_dword(dev, 0x1a8, ulValue);
197 priv->bCurrentRxAggrEnable = true;
201 lastTxOkCnt = priv->stats.txbytesunicast;
202 lastRxOkCnt = priv->stats.rxbytesunicast;
203 } /* dm_CheckEdcaTurbo */
206 void hal_dm_watchdog(struct net_device *dev)
208 /*struct r8192_priv *priv = ieee80211_priv(dev);*/
210 /*static u8 previous_bssid[6] ={0};*/
212 /*Add by amy 2008/05/15 ,porting from windows code.*/
213 dm_check_rate_adaptive(dev);
214 dm_dynamic_txpower(dev);
215 dm_check_txrateandretrycount(dev);
216 dm_check_txpower_tracking(dev);
217 dm_ctrl_initgain_byrssi(dev);
218 dm_check_edca_turbo(dev);
219 dm_bandwidth_autoswitch(dev);
220 dm_check_rx_path_selection(dev);
223 /* Add by amy 2008-05-15 porting from windows code. */
224 dm_check_pbc_gpio(dev);
225 dm_send_rssi_tofw(dev);
227 #ifdef USB_RX_AGGREGATION_SUPPORT
228 dm_CheckRxAggregation(dev);
230 } /* HalDmWatchDog */
233 * Decide Rate Adaptive Set according to distance (signal strength)
234 * 01/11/2008 MHC Modify input arguments and RATR table level.
235 * 01/16/2008 MHC RF_Type is assigned in ReadAdapterInfo(). We must call
236 * the function after making sure RF_Type.
238 void init_rate_adaptive(struct net_device *dev)
240 struct r8192_priv *priv = ieee80211_priv(dev);
241 prate_adaptive pra = (prate_adaptive)&priv->rate_adaptive;
243 pra->ratr_state = DM_RATR_STA_MAX;
244 pra->high2low_rssi_thresh_for_ra = RateAdaptiveTH_High;
245 pra->low2high_rssi_thresh_for_ra20M = RateAdaptiveTH_Low_20M+5;
246 pra->low2high_rssi_thresh_for_ra40M = RateAdaptiveTH_Low_40M+5;
248 pra->high_rssi_thresh_for_ra = RateAdaptiveTH_High+5;
249 pra->low_rssi_thresh_for_ra20M = RateAdaptiveTH_Low_20M;
250 pra->low_rssi_thresh_for_ra40M = RateAdaptiveTH_Low_40M;
252 if (priv->CustomerID == RT_CID_819x_Netcore)
253 pra->ping_rssi_enable = 1;
255 pra->ping_rssi_enable = 0;
256 pra->ping_rssi_thresh_for_ra = 15;
258 if (priv->rf_type == RF_2T4R) {
260 * 07/10/08 MH Modify for RA smooth scheme.
261 * 2008/01/11 MH Modify 2T RATR table for different RSSI. 080515 porting by amy from windows code.
263 pra->upper_rssi_threshold_ratr = 0x8f0f0000;
264 pra->middle_rssi_threshold_ratr = 0x8f0ff000;
265 pra->low_rssi_threshold_ratr = 0x8f0ff001;
266 pra->low_rssi_threshold_ratr_40M = 0x8f0ff005;
267 pra->low_rssi_threshold_ratr_20M = 0x8f0ff001;
268 pra->ping_rssi_ratr = 0x0000000d;/* cosa add for test */
269 } else if (priv->rf_type == RF_1T2R) {
270 pra->upper_rssi_threshold_ratr = 0x000f0000;
271 pra->middle_rssi_threshold_ratr = 0x000ff000;
272 pra->low_rssi_threshold_ratr = 0x000ff001;
273 pra->low_rssi_threshold_ratr_40M = 0x000ff005;
274 pra->low_rssi_threshold_ratr_20M = 0x000ff001;
275 pra->ping_rssi_ratr = 0x0000000d;/* cosa add for test */
278 } /* InitRateAdaptive */
280 /*-----------------------------------------------------------------------------
281 * Function: dm_check_rate_adaptive()
293 * 05/26/08 amy Create version 0 porting from windows code.
295 *---------------------------------------------------------------------------*/
296 static void dm_check_rate_adaptive(struct net_device *dev)
298 struct r8192_priv *priv = ieee80211_priv(dev);
299 PRT_HIGH_THROUGHPUT pHTInfo = priv->ieee80211->pHTInfo;
300 prate_adaptive pra = (prate_adaptive)&priv->rate_adaptive;
301 u32 currentRATR, targetRATR = 0;
302 u32 LowRSSIThreshForRA = 0, HighRSSIThreshForRA = 0;
303 bool bshort_gi_enabled = false;
304 static u8 ping_rssi_state;
307 RT_TRACE(COMP_RATE, "<---- dm_check_rate_adaptive(): driver is going to unload\n");
311 if (pra->rate_adaptive_disabled) /* this variable is set by ioctl. */
314 /* TODO: Only 11n mode is implemented currently, */
315 if (!(priv->ieee80211->mode == WIRELESS_MODE_N_24G ||
316 priv->ieee80211->mode == WIRELESS_MODE_N_5G))
319 if (priv->ieee80211->state == IEEE80211_LINKED) {
320 /*RT_TRACE(COMP_RATE, "dm_CheckRateAdaptive(): \t");*/
322 /* Check whether Short GI is enabled */
323 bshort_gi_enabled = (pHTInfo->bCurTxBW40MHz && pHTInfo->bCurShortGI40MHz) ||
324 (!pHTInfo->bCurTxBW40MHz && pHTInfo->bCurShortGI20MHz);
326 pra->upper_rssi_threshold_ratr =
327 (pra->upper_rssi_threshold_ratr & (~BIT31)) | ((bshort_gi_enabled) ? BIT31:0);
329 pra->middle_rssi_threshold_ratr =
330 (pra->middle_rssi_threshold_ratr & (~BIT31)) | ((bshort_gi_enabled) ? BIT31:0);
332 if (priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20) {
333 pra->low_rssi_threshold_ratr =
334 (pra->low_rssi_threshold_ratr_40M & (~BIT31)) | ((bshort_gi_enabled) ? BIT31:0);
336 pra->low_rssi_threshold_ratr =
337 (pra->low_rssi_threshold_ratr_20M & (~BIT31)) | ((bshort_gi_enabled) ? BIT31:0);
339 /* cosa add for test */
340 pra->ping_rssi_ratr =
341 (pra->ping_rssi_ratr & (~BIT31)) | ((bshort_gi_enabled) ? BIT31:0);
343 /* 2007/10/08 MH We support RA smooth scheme now. When it is the first
344 time to link with AP. We will not change upper/lower threshold. If
345 STA stay in high or low level, we must change two different threshold
346 to prevent jumping frequently. */
347 if (pra->ratr_state == DM_RATR_STA_HIGH) {
348 HighRSSIThreshForRA = pra->high2low_rssi_thresh_for_ra;
349 LowRSSIThreshForRA = (priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20) ?
350 (pra->low_rssi_thresh_for_ra40M):(pra->low_rssi_thresh_for_ra20M);
351 } else if (pra->ratr_state == DM_RATR_STA_LOW) {
352 HighRSSIThreshForRA = pra->high_rssi_thresh_for_ra;
353 LowRSSIThreshForRA = (priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20) ?
354 (pra->low2high_rssi_thresh_for_ra40M):(pra->low2high_rssi_thresh_for_ra20M);
356 HighRSSIThreshForRA = pra->high_rssi_thresh_for_ra;
357 LowRSSIThreshForRA = (priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20) ?
358 (pra->low_rssi_thresh_for_ra40M):(pra->low_rssi_thresh_for_ra20M);
361 /*DbgPrint("[DM] THresh H/L=%d/%d\n\r", RATR.HighRSSIThreshForRA, RATR.LowRSSIThreshForRA);*/
362 if (priv->undecorated_smoothed_pwdb >= (long)HighRSSIThreshForRA) {
363 /*DbgPrint("[DM] RSSI=%d STA=HIGH\n\r", pHalData->UndecoratedSmoothedPWDB);*/
364 pra->ratr_state = DM_RATR_STA_HIGH;
365 targetRATR = pra->upper_rssi_threshold_ratr;
366 } else if (priv->undecorated_smoothed_pwdb >= (long)LowRSSIThreshForRA) {
367 /*DbgPrint("[DM] RSSI=%d STA=Middle\n\r", pHalData->UndecoratedSmoothedPWDB);*/
368 pra->ratr_state = DM_RATR_STA_MIDDLE;
369 targetRATR = pra->middle_rssi_threshold_ratr;
371 /*DbgPrint("[DM] RSSI=%d STA=LOW\n\r", pHalData->UndecoratedSmoothedPWDB);*/
372 pra->ratr_state = DM_RATR_STA_LOW;
373 targetRATR = pra->low_rssi_threshold_ratr;
376 /* cosa add for test */
377 if (pra->ping_rssi_enable) {
378 /*pHalData->UndecoratedSmoothedPWDB = 19;*/
379 if (priv->undecorated_smoothed_pwdb < (long)(pra->ping_rssi_thresh_for_ra+5)) {
380 if ((priv->undecorated_smoothed_pwdb < (long)pra->ping_rssi_thresh_for_ra) ||
382 /*DbgPrint("TestRSSI = %d, set RATR to 0x%x\n", pHalData->UndecoratedSmoothedPWDB, pRA->TestRSSIRATR);*/
383 pra->ratr_state = DM_RATR_STA_LOW;
384 targetRATR = pra->ping_rssi_ratr;
388 DbgPrint("TestRSSI is between the range.\n");*/
390 /*DbgPrint("TestRSSI Recover to 0x%x\n", targetRATR);*/
397 * For RTL819X, if pairwisekey = wep/tkip, we support only MCS0~7.
399 if (priv->ieee80211->GetHalfNmodeSupportByAPsHandler(dev))
400 targetRATR &= 0xf00fffff;
402 /* Check whether updating of RATR0 is required */
403 read_nic_dword(dev, RATR0, ¤tRATR);
404 if (targetRATR != currentRATR) {
407 ratr_value = targetRATR;
408 RT_TRACE(COMP_RATE, "currentRATR = %x, targetRATR = %x\n", currentRATR, targetRATR);
409 if (priv->rf_type == RF_1T2R)
410 ratr_value &= ~(RATE_ALL_OFDM_2SS);
411 write_nic_dword(dev, RATR0, ratr_value);
412 write_nic_byte(dev, UFWP, 1);
414 pra->last_ratr = targetRATR;
418 pra->ratr_state = DM_RATR_STA_MAX;
421 } /* dm_CheckRateAdaptive */
423 static void dm_init_bandwidth_autoswitch(struct net_device *dev)
425 struct r8192_priv *priv = ieee80211_priv(dev);
427 priv->ieee80211->bandwidth_auto_switch.threshold_20Mhzto40Mhz = BW_AUTO_SWITCH_LOW_HIGH;
428 priv->ieee80211->bandwidth_auto_switch.threshold_40Mhzto20Mhz = BW_AUTO_SWITCH_HIGH_LOW;
429 priv->ieee80211->bandwidth_auto_switch.bforced_tx20Mhz = false;
430 priv->ieee80211->bandwidth_auto_switch.bautoswitch_enable = false;
432 } /* dm_init_bandwidth_autoswitch */
434 static void dm_bandwidth_autoswitch(struct net_device *dev)
436 struct r8192_priv *priv = ieee80211_priv(dev);
438 if (priv->CurrentChannelBW == HT_CHANNEL_WIDTH_20 || !priv->ieee80211->bandwidth_auto_switch.bautoswitch_enable)
440 if (priv->ieee80211->bandwidth_auto_switch.bforced_tx20Mhz == false) { /* If send packets in 40 Mhz in 20/40 */
441 if (priv->undecorated_smoothed_pwdb <= priv->ieee80211->bandwidth_auto_switch.threshold_40Mhzto20Mhz)
442 priv->ieee80211->bandwidth_auto_switch.bforced_tx20Mhz = true;
443 } else { /* in force send packets in 20 Mhz in 20/40 */
444 if (priv->undecorated_smoothed_pwdb >= priv->ieee80211->bandwidth_auto_switch.threshold_20Mhzto40Mhz)
445 priv->ieee80211->bandwidth_auto_switch.bforced_tx20Mhz = false;
447 } /* dm_BandwidthAutoSwitch */
449 /* OFDM default at 0db, index=6. */
450 static u32 OFDMSwingTable[OFDM_Table_Length] = {
451 0x7f8001fe, /* 0, +6db */
452 0x71c001c7, /* 1, +5db */
453 0x65400195, /* 2, +4db */
454 0x5a400169, /* 3, +3db */
455 0x50800142, /* 4, +2db */
456 0x47c0011f, /* 5, +1db */
457 0x40000100, /* 6, +0db ===> default, upper for higher temperature, lower for low temperature */
458 0x390000e4, /* 7, -1db */
459 0x32c000cb, /* 8, -2db */
460 0x2d4000b5, /* 9, -3db */
461 0x288000a2, /* 10, -4db */
462 0x24000090, /* 11, -5db */
463 0x20000080, /* 12, -6db */
464 0x1c800072, /* 13, -7db */
465 0x19800066, /* 14, -8db */
466 0x26c0005b, /* 15, -9db */
467 0x24400051, /* 16, -10db */
468 0x12000048, /* 17, -11db */
469 0x10000040 /* 18, -12db */
472 static u8 CCKSwingTable_Ch1_Ch13[CCK_Table_length][8] = {
473 {0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04}, /* 0, +0db ===> CCK40M default */
474 {0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03}, /* 1, -1db */
475 {0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03}, /* 2, -2db */
476 {0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03}, /* 3, -3db */
477 {0x22, 0x21, 0x1d, 0x18, 0x11, 0x0b, 0x06, 0x02}, /* 4, -4db */
478 {0x1f, 0x1e, 0x1a, 0x15, 0x10, 0x0a, 0x05, 0x02}, /* 5, -5db */
479 {0x1b, 0x1a, 0x17, 0x13, 0x0e, 0x09, 0x04, 0x02}, /* 6, -6db ===> CCK20M default */
480 {0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02}, /* 7, -7db */
481 {0x16, 0x15, 0x12, 0x0f, 0x0b, 0x07, 0x04, 0x01}, /* 8, -8db */
482 {0x13, 0x13, 0x10, 0x0d, 0x0a, 0x06, 0x03, 0x01}, /* 9, -9db */
483 {0x11, 0x11, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, /* 10, -10db */
484 {0x0f, 0x0f, 0x0d, 0x0b, 0x08, 0x05, 0x03, 0x01} /* 11, -11db */
487 static u8 CCKSwingTable_Ch14[CCK_Table_length][8] = {
488 {0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00}, /* 0, +0db ===> CCK40M default */
489 {0x30, 0x2f, 0x29, 0x18, 0x00, 0x00, 0x00, 0x00}, /* 1, -1db */
490 {0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00}, /* 2, -2db */
491 {0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00}, /* 3, -3db */
492 {0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00}, /* 4, -4db */
493 {0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00}, /* 5, -5db */
494 {0x1b, 0x1a, 0x17, 0x0e, 0x00, 0x00, 0x00, 0x00}, /* 6, -6db ===> CCK20M default */
495 {0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00}, /* 7, -7db */
496 {0x16, 0x15, 0x12, 0x0b, 0x00, 0x00, 0x00, 0x00}, /* 8, -8db */
497 {0x13, 0x13, 0x10, 0x0a, 0x00, 0x00, 0x00, 0x00}, /* 9, -9db */
498 {0x11, 0x11, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, /* 10, -10db */
499 {0x0f, 0x0f, 0x0d, 0x08, 0x00, 0x00, 0x00, 0x00} /* 11, -11db */
502 static void dm_TXPowerTrackingCallback_TSSI(struct net_device *dev)
504 struct r8192_priv *priv = ieee80211_priv(dev);
505 bool bHighpowerstate, viviflag = FALSE;
507 u8 powerlevelOFDM24G;
508 int i = 0, j = 0, k = 0;
509 u8 RF_Type, tmp_report[5] = {0, 0, 0, 0, 0};
512 u16 Avg_TSSI_Meas, TSSI_13dBm, Avg_TSSI_Meas_from_driver = 0;
513 /*RT_STATUS rtStatus = RT_STATUS_SUCCESS;*/
514 bool rtStatus = true;
517 write_nic_byte(dev, 0x1ba, 0);
519 priv->ieee80211->bdynamic_txpower_enable = false;
520 bHighpowerstate = priv->bDynamicTxHighPower;
522 powerlevelOFDM24G = (u8)(priv->Pwr_Track>>24);
523 RF_Type = priv->rf_type;
524 Value = (RF_Type<<8) | powerlevelOFDM24G;
526 RT_TRACE(COMP_POWER_TRACKING, "powerlevelOFDM24G = %x\n", powerlevelOFDM24G);
528 for (j = 0; j <= 30; j++) { /* fill tx_cmd */
529 tx_cmd.Op = TXCMD_SET_TX_PWR_TRACKING;
531 tx_cmd.Value = Value;
532 rtStatus = SendTxCommandPacket(dev, &tx_cmd, 12);
533 if (rtStatus == RT_STATUS_FAILURE)
534 RT_TRACE(COMP_POWER_TRACKING, "Set configuration with tx cmd queue fail!\n");
536 /*DbgPrint("hi, vivi, strange\n");*/
537 for (i = 0; i <= 30; i++) {
538 read_nic_byte(dev, 0x1ba, &Pwr_Flag);
544 read_nic_word(dev, 0x13c, &Avg_TSSI_Meas);
545 if (Avg_TSSI_Meas == 0) {
546 write_nic_byte(dev, 0x1ba, 0);
550 for (k = 0; k < 5; k++) {
552 read_nic_byte(dev, 0x134+k, &tmp_report[k]);
554 read_nic_byte(dev, 0x13e, &tmp_report[k]);
555 RT_TRACE(COMP_POWER_TRACKING, "TSSI_report_value = %d\n", tmp_report[k]);
558 /* check if the report value is right */
559 for (k = 0; k < 5; k++) {
560 if (tmp_report[k] <= 20) {
565 if (viviflag == TRUE) {
566 write_nic_byte(dev, 0x1ba, 0);
568 RT_TRACE(COMP_POWER_TRACKING, "we filtered the data\n");
569 for (k = 0; k < 5; k++)
574 for (k = 0; k < 5; k++)
575 Avg_TSSI_Meas_from_driver += tmp_report[k];
577 Avg_TSSI_Meas_from_driver = Avg_TSSI_Meas_from_driver*100/5;
578 RT_TRACE(COMP_POWER_TRACKING, "Avg_TSSI_Meas_from_driver = %d\n", Avg_TSSI_Meas_from_driver);
579 TSSI_13dBm = priv->TSSI_13dBm;
580 RT_TRACE(COMP_POWER_TRACKING, "TSSI_13dBm = %d\n", TSSI_13dBm);
582 /*if (abs(Avg_TSSI_Meas_from_driver - TSSI_13dBm) <= E_FOR_TX_POWER_TRACK)*/
583 /* For MacOS-compatible */
584 if (Avg_TSSI_Meas_from_driver > TSSI_13dBm)
585 delta = Avg_TSSI_Meas_from_driver - TSSI_13dBm;
587 delta = TSSI_13dBm - Avg_TSSI_Meas_from_driver;
589 if (delta <= E_FOR_TX_POWER_TRACK) {
590 priv->ieee80211->bdynamic_txpower_enable = TRUE;
591 write_nic_byte(dev, 0x1ba, 0);
592 RT_TRACE(COMP_POWER_TRACKING, "tx power track is done\n");
593 RT_TRACE(COMP_POWER_TRACKING, "priv->rfa_txpowertrackingindex = %d\n", priv->rfa_txpowertrackingindex);
594 RT_TRACE(COMP_POWER_TRACKING, "priv->rfa_txpowertrackingindex_real = %d\n", priv->rfa_txpowertrackingindex_real);
595 RT_TRACE(COMP_POWER_TRACKING, "priv->cck_present_attentuation_difference = %d\n", priv->cck_present_attentuation_difference);
596 RT_TRACE(COMP_POWER_TRACKING, "priv->cck_present_attentuation = %d\n", priv->cck_present_attentuation);
599 if (Avg_TSSI_Meas_from_driver < TSSI_13dBm - E_FOR_TX_POWER_TRACK) {
600 if (priv->rfa_txpowertrackingindex > 0) {
601 priv->rfa_txpowertrackingindex--;
602 if (priv->rfa_txpowertrackingindex_real > 4) {
603 priv->rfa_txpowertrackingindex_real--;
604 rtl8192_setBBreg(dev, rOFDM0_XATxIQImbalance, bMaskDWord, priv->txbbgain_table[priv->rfa_txpowertrackingindex_real].txbbgain_value);
608 if (priv->rfa_txpowertrackingindex < 36) {
609 priv->rfa_txpowertrackingindex++;
610 priv->rfa_txpowertrackingindex_real++;
611 rtl8192_setBBreg(dev, rOFDM0_XATxIQImbalance, bMaskDWord, priv->txbbgain_table[priv->rfa_txpowertrackingindex_real].txbbgain_value);
615 priv->cck_present_attentuation_difference
616 = priv->rfa_txpowertrackingindex - priv->rfa_txpowertracking_default;
618 if (priv->CurrentChannelBW == HT_CHANNEL_WIDTH_20)
619 priv->cck_present_attentuation
620 = priv->cck_present_attentuation_20Mdefault + priv->cck_present_attentuation_difference;
622 priv->cck_present_attentuation
623 = priv->cck_present_attentuation_40Mdefault + priv->cck_present_attentuation_difference;
625 if (priv->cck_present_attentuation > -1 && priv->cck_present_attentuation < 23) {
626 if (priv->ieee80211->current_network.channel == 14 && !priv->bcck_in_ch14) {
627 priv->bcck_in_ch14 = TRUE;
628 dm_cck_txpower_adjust(dev, priv->bcck_in_ch14);
629 } else if (priv->ieee80211->current_network.channel != 14 && priv->bcck_in_ch14) {
630 priv->bcck_in_ch14 = FALSE;
631 dm_cck_txpower_adjust(dev, priv->bcck_in_ch14);
633 dm_cck_txpower_adjust(dev, priv->bcck_in_ch14);
635 RT_TRACE(COMP_POWER_TRACKING, "priv->rfa_txpowertrackingindex = %d\n", priv->rfa_txpowertrackingindex);
636 RT_TRACE(COMP_POWER_TRACKING, "priv->rfa_txpowertrackingindex_real = %d\n", priv->rfa_txpowertrackingindex_real);
637 RT_TRACE(COMP_POWER_TRACKING, "priv->cck_present_attentuation_difference = %d\n", priv->cck_present_attentuation_difference);
638 RT_TRACE(COMP_POWER_TRACKING, "priv->cck_present_attentuation = %d\n", priv->cck_present_attentuation);
640 if (priv->cck_present_attentuation_difference <= -12 || priv->cck_present_attentuation_difference >= 24) {
641 priv->ieee80211->bdynamic_txpower_enable = TRUE;
642 write_nic_byte(dev, 0x1ba, 0);
643 RT_TRACE(COMP_POWER_TRACKING, "tx power track--->limited\n");
647 write_nic_byte(dev, 0x1ba, 0);
648 Avg_TSSI_Meas_from_driver = 0;
649 for (k = 0; k < 5; k++)
654 priv->ieee80211->bdynamic_txpower_enable = TRUE;
655 write_nic_byte(dev, 0x1ba, 0);
658 static void dm_TXPowerTrackingCallback_ThermalMeter(struct net_device *dev)
660 #define ThermalMeterVal 9
661 struct r8192_priv *priv = ieee80211_priv(dev);
662 u32 tmpRegA, TempCCk;
663 u8 tmpOFDMindex, tmpCCKindex, tmpCCK20Mindex, tmpCCK40Mindex, tmpval;
664 int i = 0, CCKSwingNeedUpdate = 0;
666 if (!priv->btxpower_trackingInit) {
667 /* Query OFDM default setting */
668 tmpRegA = rtl8192_QueryBBReg(dev, rOFDM0_XATxIQImbalance, bMaskDWord);
669 for (i = 0; i < OFDM_Table_Length; i++) { /* find the index */
670 if (tmpRegA == OFDMSwingTable[i]) {
671 priv->OFDM_index = (u8)i;
672 RT_TRACE(COMP_POWER_TRACKING, "Initial reg0x%x = 0x%x, OFDM_index=0x%x\n",
673 rOFDM0_XATxIQImbalance, tmpRegA, priv->OFDM_index);
677 /* Query CCK default setting From 0xa22 */
678 TempCCk = rtl8192_QueryBBReg(dev, rCCK0_TxFilter1, bMaskByte2);
679 for (i = 0; i < CCK_Table_length; i++) {
680 if (TempCCk == (u32)CCKSwingTable_Ch1_Ch13[i][0]) {
681 priv->CCK_index = (u8) i;
682 RT_TRACE(COMP_POWER_TRACKING, "Initial reg0x%x = 0x%x, CCK_index=0x%x\n",
683 rCCK0_TxFilter1, TempCCk, priv->CCK_index);
687 priv->btxpower_trackingInit = TRUE;
688 /*pHalData->TXPowercount = 0;*/
693 * ==========================
694 * this is only for test, should be masked
695 * ==========================
698 /* read and filter out unreasonable value */
699 tmpRegA = rtl8192_phy_QueryRFReg(dev, RF90_PATH_A, 0x12, 0x078); /* 0x12: RF Reg[10:7] */
700 RT_TRACE(COMP_POWER_TRACKING, "Readback ThermalMeterA = %d\n", tmpRegA);
701 if (tmpRegA < 3 || tmpRegA > 13)
703 if (tmpRegA >= 12) /* if over 12, TP will be bad when high temperature */
705 RT_TRACE(COMP_POWER_TRACKING, "Valid ThermalMeterA = %d\n", tmpRegA);
706 priv->ThermalMeter[0] = ThermalMeterVal; /* We use fixed value by Bryant's suggestion */
707 priv->ThermalMeter[1] = ThermalMeterVal; /* We use fixed value by Bryant's suggestion */
709 /* Get current RF-A temperature index */
710 if (priv->ThermalMeter[0] >= (u8)tmpRegA) { /* lower temperature */
711 tmpOFDMindex = tmpCCK20Mindex = 6+(priv->ThermalMeter[0]-(u8)tmpRegA);
712 tmpCCK40Mindex = tmpCCK20Mindex - 6;
713 if (tmpOFDMindex >= OFDM_Table_Length)
714 tmpOFDMindex = OFDM_Table_Length-1;
715 if (tmpCCK20Mindex >= CCK_Table_length)
716 tmpCCK20Mindex = CCK_Table_length-1;
717 if (tmpCCK40Mindex >= CCK_Table_length)
718 tmpCCK40Mindex = CCK_Table_length-1;
720 tmpval = ((u8)tmpRegA - priv->ThermalMeter[0]);
722 if (tmpval >= 6) /* higher temperature */
723 tmpOFDMindex = tmpCCK20Mindex = 0; /* max to +6dB */
725 tmpOFDMindex = tmpCCK20Mindex = 6 - tmpval;
728 /*DbgPrint("%ddb, tmpOFDMindex = %d, tmpCCK20Mindex = %d, tmpCCK40Mindex = %d",
729 ((u1Byte)tmpRegA - pHalData->ThermalMeter[0]),
730 tmpOFDMindex, tmpCCK20Mindex, tmpCCK40Mindex);*/
731 if (priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20) /* 40M */
732 tmpCCKindex = tmpCCK40Mindex;
734 tmpCCKindex = tmpCCK20Mindex;
736 if (priv->ieee80211->current_network.channel == 14 && !priv->bcck_in_ch14) {
737 priv->bcck_in_ch14 = TRUE;
738 CCKSwingNeedUpdate = 1;
739 } else if (priv->ieee80211->current_network.channel != 14 && priv->bcck_in_ch14) {
740 priv->bcck_in_ch14 = FALSE;
741 CCKSwingNeedUpdate = 1;
744 if (priv->CCK_index != tmpCCKindex) {
745 priv->CCK_index = tmpCCKindex;
746 CCKSwingNeedUpdate = 1;
749 if (CCKSwingNeedUpdate) {
750 /*DbgPrint("Update CCK Swing, CCK_index = %d\n", pHalData->CCK_index);*/
751 dm_cck_txpower_adjust(dev, priv->bcck_in_ch14);
753 if (priv->OFDM_index != tmpOFDMindex) {
754 priv->OFDM_index = tmpOFDMindex;
755 rtl8192_setBBreg(dev, rOFDM0_XATxIQImbalance, bMaskDWord, OFDMSwingTable[priv->OFDM_index]);
756 RT_TRACE(COMP_POWER_TRACKING, "Update OFDMSwing[%d] = 0x%x\n",
757 priv->OFDM_index, OFDMSwingTable[priv->OFDM_index]);
759 priv->txpower_count = 0;
762 void dm_txpower_trackingcallback(struct work_struct *work)
764 struct delayed_work *dwork = container_of(work, struct delayed_work, work);
765 struct r8192_priv *priv = container_of(dwork, struct r8192_priv, txpower_tracking_wq);
766 struct net_device *dev = priv->ieee80211->dev;
768 if (priv->bDcut == TRUE)
769 dm_TXPowerTrackingCallback_TSSI(dev);
771 dm_TXPowerTrackingCallback_ThermalMeter(dev);
774 static void dm_InitializeTXPowerTracking_TSSI(struct net_device *dev)
776 struct r8192_priv *priv = ieee80211_priv(dev);
778 /* Initial the Tx BB index and mapping value */
779 priv->txbbgain_table[0].txbb_iq_amplifygain = 12;
780 priv->txbbgain_table[0].txbbgain_value = 0x7f8001fe;
781 priv->txbbgain_table[1].txbb_iq_amplifygain = 11;
782 priv->txbbgain_table[1].txbbgain_value = 0x788001e2;
783 priv->txbbgain_table[2].txbb_iq_amplifygain = 10;
784 priv->txbbgain_table[2].txbbgain_value = 0x71c001c7;
785 priv->txbbgain_table[3].txbb_iq_amplifygain = 9;
786 priv->txbbgain_table[3].txbbgain_value = 0x6b8001ae;
787 priv->txbbgain_table[4].txbb_iq_amplifygain = 8;
788 priv->txbbgain_table[4].txbbgain_value = 0x65400195;
789 priv->txbbgain_table[5].txbb_iq_amplifygain = 7;
790 priv->txbbgain_table[5].txbbgain_value = 0x5fc0017f;
791 priv->txbbgain_table[6].txbb_iq_amplifygain = 6;
792 priv->txbbgain_table[6].txbbgain_value = 0x5a400169;
793 priv->txbbgain_table[7].txbb_iq_amplifygain = 5;
794 priv->txbbgain_table[7].txbbgain_value = 0x55400155;
795 priv->txbbgain_table[8].txbb_iq_amplifygain = 4;
796 priv->txbbgain_table[8].txbbgain_value = 0x50800142;
797 priv->txbbgain_table[9].txbb_iq_amplifygain = 3;
798 priv->txbbgain_table[9].txbbgain_value = 0x4c000130;
799 priv->txbbgain_table[10].txbb_iq_amplifygain = 2;
800 priv->txbbgain_table[10].txbbgain_value = 0x47c0011f;
801 priv->txbbgain_table[11].txbb_iq_amplifygain = 1;
802 priv->txbbgain_table[11].txbbgain_value = 0x43c0010f;
803 priv->txbbgain_table[12].txbb_iq_amplifygain = 0;
804 priv->txbbgain_table[12].txbbgain_value = 0x40000100;
805 priv->txbbgain_table[13].txbb_iq_amplifygain = -1;
806 priv->txbbgain_table[13].txbbgain_value = 0x3c8000f2;
807 priv->txbbgain_table[14].txbb_iq_amplifygain = -2;
808 priv->txbbgain_table[14].txbbgain_value = 0x390000e4;
809 priv->txbbgain_table[15].txbb_iq_amplifygain = -3;
810 priv->txbbgain_table[15].txbbgain_value = 0x35c000d7;
811 priv->txbbgain_table[16].txbb_iq_amplifygain = -4;
812 priv->txbbgain_table[16].txbbgain_value = 0x32c000cb;
813 priv->txbbgain_table[17].txbb_iq_amplifygain = -5;
814 priv->txbbgain_table[17].txbbgain_value = 0x300000c0;
815 priv->txbbgain_table[18].txbb_iq_amplifygain = -6;
816 priv->txbbgain_table[18].txbbgain_value = 0x2d4000b5;
817 priv->txbbgain_table[19].txbb_iq_amplifygain = -7;
818 priv->txbbgain_table[19].txbbgain_value = 0x2ac000ab;
819 priv->txbbgain_table[20].txbb_iq_amplifygain = -8;
820 priv->txbbgain_table[20].txbbgain_value = 0x288000a2;
821 priv->txbbgain_table[21].txbb_iq_amplifygain = -9;
822 priv->txbbgain_table[21].txbbgain_value = 0x26000098;
823 priv->txbbgain_table[22].txbb_iq_amplifygain = -10;
824 priv->txbbgain_table[22].txbbgain_value = 0x24000090;
825 priv->txbbgain_table[23].txbb_iq_amplifygain = -11;
826 priv->txbbgain_table[23].txbbgain_value = 0x22000088;
827 priv->txbbgain_table[24].txbb_iq_amplifygain = -12;
828 priv->txbbgain_table[24].txbbgain_value = 0x20000080;
829 priv->txbbgain_table[25].txbb_iq_amplifygain = -13;
830 priv->txbbgain_table[25].txbbgain_value = 0x1a00006c;
831 priv->txbbgain_table[26].txbb_iq_amplifygain = -14;
832 priv->txbbgain_table[26].txbbgain_value = 0x1c800072;
833 priv->txbbgain_table[27].txbb_iq_amplifygain = -15;
834 priv->txbbgain_table[27].txbbgain_value = 0x18000060;
835 priv->txbbgain_table[28].txbb_iq_amplifygain = -16;
836 priv->txbbgain_table[28].txbbgain_value = 0x19800066;
837 priv->txbbgain_table[29].txbb_iq_amplifygain = -17;
838 priv->txbbgain_table[29].txbbgain_value = 0x15800056;
839 priv->txbbgain_table[30].txbb_iq_amplifygain = -18;
840 priv->txbbgain_table[30].txbbgain_value = 0x26c0005b;
841 priv->txbbgain_table[31].txbb_iq_amplifygain = -19;
842 priv->txbbgain_table[31].txbbgain_value = 0x14400051;
843 priv->txbbgain_table[32].txbb_iq_amplifygain = -20;
844 priv->txbbgain_table[32].txbbgain_value = 0x24400051;
845 priv->txbbgain_table[33].txbb_iq_amplifygain = -21;
846 priv->txbbgain_table[33].txbbgain_value = 0x1300004c;
847 priv->txbbgain_table[34].txbb_iq_amplifygain = -22;
848 priv->txbbgain_table[34].txbbgain_value = 0x12000048;
849 priv->txbbgain_table[35].txbb_iq_amplifygain = -23;
850 priv->txbbgain_table[35].txbbgain_value = 0x11000044;
851 priv->txbbgain_table[36].txbb_iq_amplifygain = -24;
852 priv->txbbgain_table[36].txbbgain_value = 0x10000040;
855 * ccktxbb_valuearray[0] is 0xA22 [1] is 0xA24 ...[7] is 0xA29
856 * This Table is for CH1~CH13
858 priv->cck_txbbgain_table[0].ccktxbb_valuearray[0] = 0x36;
859 priv->cck_txbbgain_table[0].ccktxbb_valuearray[1] = 0x35;
860 priv->cck_txbbgain_table[0].ccktxbb_valuearray[2] = 0x2e;
861 priv->cck_txbbgain_table[0].ccktxbb_valuearray[3] = 0x25;
862 priv->cck_txbbgain_table[0].ccktxbb_valuearray[4] = 0x1c;
863 priv->cck_txbbgain_table[0].ccktxbb_valuearray[5] = 0x12;
864 priv->cck_txbbgain_table[0].ccktxbb_valuearray[6] = 0x09;
865 priv->cck_txbbgain_table[0].ccktxbb_valuearray[7] = 0x04;
867 priv->cck_txbbgain_table[1].ccktxbb_valuearray[0] = 0x33;
868 priv->cck_txbbgain_table[1].ccktxbb_valuearray[1] = 0x32;
869 priv->cck_txbbgain_table[1].ccktxbb_valuearray[2] = 0x2b;
870 priv->cck_txbbgain_table[1].ccktxbb_valuearray[3] = 0x23;
871 priv->cck_txbbgain_table[1].ccktxbb_valuearray[4] = 0x1a;
872 priv->cck_txbbgain_table[1].ccktxbb_valuearray[5] = 0x11;
873 priv->cck_txbbgain_table[1].ccktxbb_valuearray[6] = 0x08;
874 priv->cck_txbbgain_table[1].ccktxbb_valuearray[7] = 0x04;
876 priv->cck_txbbgain_table[2].ccktxbb_valuearray[0] = 0x30;
877 priv->cck_txbbgain_table[2].ccktxbb_valuearray[1] = 0x2f;
878 priv->cck_txbbgain_table[2].ccktxbb_valuearray[2] = 0x29;
879 priv->cck_txbbgain_table[2].ccktxbb_valuearray[3] = 0x21;
880 priv->cck_txbbgain_table[2].ccktxbb_valuearray[4] = 0x19;
881 priv->cck_txbbgain_table[2].ccktxbb_valuearray[5] = 0x10;
882 priv->cck_txbbgain_table[2].ccktxbb_valuearray[6] = 0x08;
883 priv->cck_txbbgain_table[2].ccktxbb_valuearray[7] = 0x03;
885 priv->cck_txbbgain_table[3].ccktxbb_valuearray[0] = 0x2d;
886 priv->cck_txbbgain_table[3].ccktxbb_valuearray[1] = 0x2d;
887 priv->cck_txbbgain_table[3].ccktxbb_valuearray[2] = 0x27;
888 priv->cck_txbbgain_table[3].ccktxbb_valuearray[3] = 0x1f;
889 priv->cck_txbbgain_table[3].ccktxbb_valuearray[4] = 0x18;
890 priv->cck_txbbgain_table[3].ccktxbb_valuearray[5] = 0x0f;
891 priv->cck_txbbgain_table[3].ccktxbb_valuearray[6] = 0x08;
892 priv->cck_txbbgain_table[3].ccktxbb_valuearray[7] = 0x03;
894 priv->cck_txbbgain_table[4].ccktxbb_valuearray[0] = 0x2b;
895 priv->cck_txbbgain_table[4].ccktxbb_valuearray[1] = 0x2a;
896 priv->cck_txbbgain_table[4].ccktxbb_valuearray[2] = 0x25;
897 priv->cck_txbbgain_table[4].ccktxbb_valuearray[3] = 0x1e;
898 priv->cck_txbbgain_table[4].ccktxbb_valuearray[4] = 0x16;
899 priv->cck_txbbgain_table[4].ccktxbb_valuearray[5] = 0x0e;
900 priv->cck_txbbgain_table[4].ccktxbb_valuearray[6] = 0x07;
901 priv->cck_txbbgain_table[4].ccktxbb_valuearray[7] = 0x03;
903 priv->cck_txbbgain_table[5].ccktxbb_valuearray[0] = 0x28;
904 priv->cck_txbbgain_table[5].ccktxbb_valuearray[1] = 0x28;
905 priv->cck_txbbgain_table[5].ccktxbb_valuearray[2] = 0x22;
906 priv->cck_txbbgain_table[5].ccktxbb_valuearray[3] = 0x1c;
907 priv->cck_txbbgain_table[5].ccktxbb_valuearray[4] = 0x15;
908 priv->cck_txbbgain_table[5].ccktxbb_valuearray[5] = 0x0d;
909 priv->cck_txbbgain_table[5].ccktxbb_valuearray[6] = 0x07;
910 priv->cck_txbbgain_table[5].ccktxbb_valuearray[7] = 0x03;
912 priv->cck_txbbgain_table[6].ccktxbb_valuearray[0] = 0x26;
913 priv->cck_txbbgain_table[6].ccktxbb_valuearray[1] = 0x25;
914 priv->cck_txbbgain_table[6].ccktxbb_valuearray[2] = 0x21;
915 priv->cck_txbbgain_table[6].ccktxbb_valuearray[3] = 0x1b;
916 priv->cck_txbbgain_table[6].ccktxbb_valuearray[4] = 0x14;
917 priv->cck_txbbgain_table[6].ccktxbb_valuearray[5] = 0x0d;
918 priv->cck_txbbgain_table[6].ccktxbb_valuearray[6] = 0x06;
919 priv->cck_txbbgain_table[6].ccktxbb_valuearray[7] = 0x03;
921 priv->cck_txbbgain_table[7].ccktxbb_valuearray[0] = 0x24;
922 priv->cck_txbbgain_table[7].ccktxbb_valuearray[1] = 0x23;
923 priv->cck_txbbgain_table[7].ccktxbb_valuearray[2] = 0x1f;
924 priv->cck_txbbgain_table[7].ccktxbb_valuearray[3] = 0x19;
925 priv->cck_txbbgain_table[7].ccktxbb_valuearray[4] = 0x13;
926 priv->cck_txbbgain_table[7].ccktxbb_valuearray[5] = 0x0c;
927 priv->cck_txbbgain_table[7].ccktxbb_valuearray[6] = 0x06;
928 priv->cck_txbbgain_table[7].ccktxbb_valuearray[7] = 0x03;
930 priv->cck_txbbgain_table[8].ccktxbb_valuearray[0] = 0x22;
931 priv->cck_txbbgain_table[8].ccktxbb_valuearray[1] = 0x21;
932 priv->cck_txbbgain_table[8].ccktxbb_valuearray[2] = 0x1d;
933 priv->cck_txbbgain_table[8].ccktxbb_valuearray[3] = 0x18;
934 priv->cck_txbbgain_table[8].ccktxbb_valuearray[4] = 0x11;
935 priv->cck_txbbgain_table[8].ccktxbb_valuearray[5] = 0x0b;
936 priv->cck_txbbgain_table[8].ccktxbb_valuearray[6] = 0x06;
937 priv->cck_txbbgain_table[8].ccktxbb_valuearray[7] = 0x02;
939 priv->cck_txbbgain_table[9].ccktxbb_valuearray[0] = 0x20;
940 priv->cck_txbbgain_table[9].ccktxbb_valuearray[1] = 0x20;
941 priv->cck_txbbgain_table[9].ccktxbb_valuearray[2] = 0x1b;
942 priv->cck_txbbgain_table[9].ccktxbb_valuearray[3] = 0x16;
943 priv->cck_txbbgain_table[9].ccktxbb_valuearray[4] = 0x11;
944 priv->cck_txbbgain_table[9].ccktxbb_valuearray[5] = 0x08;
945 priv->cck_txbbgain_table[9].ccktxbb_valuearray[6] = 0x05;
946 priv->cck_txbbgain_table[9].ccktxbb_valuearray[7] = 0x02;
948 priv->cck_txbbgain_table[10].ccktxbb_valuearray[0] = 0x1f;
949 priv->cck_txbbgain_table[10].ccktxbb_valuearray[1] = 0x1e;
950 priv->cck_txbbgain_table[10].ccktxbb_valuearray[2] = 0x1a;
951 priv->cck_txbbgain_table[10].ccktxbb_valuearray[3] = 0x15;
952 priv->cck_txbbgain_table[10].ccktxbb_valuearray[4] = 0x10;
953 priv->cck_txbbgain_table[10].ccktxbb_valuearray[5] = 0x0a;
954 priv->cck_txbbgain_table[10].ccktxbb_valuearray[6] = 0x05;
955 priv->cck_txbbgain_table[10].ccktxbb_valuearray[7] = 0x02;
957 priv->cck_txbbgain_table[11].ccktxbb_valuearray[0] = 0x1d;
958 priv->cck_txbbgain_table[11].ccktxbb_valuearray[1] = 0x1c;
959 priv->cck_txbbgain_table[11].ccktxbb_valuearray[2] = 0x18;
960 priv->cck_txbbgain_table[11].ccktxbb_valuearray[3] = 0x14;
961 priv->cck_txbbgain_table[11].ccktxbb_valuearray[4] = 0x0f;
962 priv->cck_txbbgain_table[11].ccktxbb_valuearray[5] = 0x0a;
963 priv->cck_txbbgain_table[11].ccktxbb_valuearray[6] = 0x05;
964 priv->cck_txbbgain_table[11].ccktxbb_valuearray[7] = 0x02;
966 priv->cck_txbbgain_table[12].ccktxbb_valuearray[0] = 0x1b;
967 priv->cck_txbbgain_table[12].ccktxbb_valuearray[1] = 0x1a;
968 priv->cck_txbbgain_table[12].ccktxbb_valuearray[2] = 0x17;
969 priv->cck_txbbgain_table[12].ccktxbb_valuearray[3] = 0x13;
970 priv->cck_txbbgain_table[12].ccktxbb_valuearray[4] = 0x0e;
971 priv->cck_txbbgain_table[12].ccktxbb_valuearray[5] = 0x09;
972 priv->cck_txbbgain_table[12].ccktxbb_valuearray[6] = 0x04;
973 priv->cck_txbbgain_table[12].ccktxbb_valuearray[7] = 0x02;
975 priv->cck_txbbgain_table[13].ccktxbb_valuearray[0] = 0x1a;
976 priv->cck_txbbgain_table[13].ccktxbb_valuearray[1] = 0x19;
977 priv->cck_txbbgain_table[13].ccktxbb_valuearray[2] = 0x16;
978 priv->cck_txbbgain_table[13].ccktxbb_valuearray[3] = 0x12;
979 priv->cck_txbbgain_table[13].ccktxbb_valuearray[4] = 0x0d;
980 priv->cck_txbbgain_table[13].ccktxbb_valuearray[5] = 0x09;
981 priv->cck_txbbgain_table[13].ccktxbb_valuearray[6] = 0x04;
982 priv->cck_txbbgain_table[13].ccktxbb_valuearray[7] = 0x02;
984 priv->cck_txbbgain_table[14].ccktxbb_valuearray[0] = 0x18;
985 priv->cck_txbbgain_table[14].ccktxbb_valuearray[1] = 0x17;
986 priv->cck_txbbgain_table[14].ccktxbb_valuearray[2] = 0x15;
987 priv->cck_txbbgain_table[14].ccktxbb_valuearray[3] = 0x11;
988 priv->cck_txbbgain_table[14].ccktxbb_valuearray[4] = 0x0c;
989 priv->cck_txbbgain_table[14].ccktxbb_valuearray[5] = 0x08;
990 priv->cck_txbbgain_table[14].ccktxbb_valuearray[6] = 0x04;
991 priv->cck_txbbgain_table[14].ccktxbb_valuearray[7] = 0x02;
993 priv->cck_txbbgain_table[15].ccktxbb_valuearray[0] = 0x17;
994 priv->cck_txbbgain_table[15].ccktxbb_valuearray[1] = 0x16;
995 priv->cck_txbbgain_table[15].ccktxbb_valuearray[2] = 0x13;
996 priv->cck_txbbgain_table[15].ccktxbb_valuearray[3] = 0x10;
997 priv->cck_txbbgain_table[15].ccktxbb_valuearray[4] = 0x0c;
998 priv->cck_txbbgain_table[15].ccktxbb_valuearray[5] = 0x08;
999 priv->cck_txbbgain_table[15].ccktxbb_valuearray[6] = 0x04;
1000 priv->cck_txbbgain_table[15].ccktxbb_valuearray[7] = 0x02;
1002 priv->cck_txbbgain_table[16].ccktxbb_valuearray[0] = 0x16;
1003 priv->cck_txbbgain_table[16].ccktxbb_valuearray[1] = 0x15;
1004 priv->cck_txbbgain_table[16].ccktxbb_valuearray[2] = 0x12;
1005 priv->cck_txbbgain_table[16].ccktxbb_valuearray[3] = 0x0f;
1006 priv->cck_txbbgain_table[16].ccktxbb_valuearray[4] = 0x0b;
1007 priv->cck_txbbgain_table[16].ccktxbb_valuearray[5] = 0x07;
1008 priv->cck_txbbgain_table[16].ccktxbb_valuearray[6] = 0x04;
1009 priv->cck_txbbgain_table[16].ccktxbb_valuearray[7] = 0x01;
1011 priv->cck_txbbgain_table[17].ccktxbb_valuearray[0] = 0x14;
1012 priv->cck_txbbgain_table[17].ccktxbb_valuearray[1] = 0x14;
1013 priv->cck_txbbgain_table[17].ccktxbb_valuearray[2] = 0x11;
1014 priv->cck_txbbgain_table[17].ccktxbb_valuearray[3] = 0x0e;
1015 priv->cck_txbbgain_table[17].ccktxbb_valuearray[4] = 0x0b;
1016 priv->cck_txbbgain_table[17].ccktxbb_valuearray[5] = 0x07;
1017 priv->cck_txbbgain_table[17].ccktxbb_valuearray[6] = 0x03;
1018 priv->cck_txbbgain_table[17].ccktxbb_valuearray[7] = 0x02;
1020 priv->cck_txbbgain_table[18].ccktxbb_valuearray[0] = 0x13;
1021 priv->cck_txbbgain_table[18].ccktxbb_valuearray[1] = 0x13;
1022 priv->cck_txbbgain_table[18].ccktxbb_valuearray[2] = 0x10;
1023 priv->cck_txbbgain_table[18].ccktxbb_valuearray[3] = 0x0d;
1024 priv->cck_txbbgain_table[18].ccktxbb_valuearray[4] = 0x0a;
1025 priv->cck_txbbgain_table[18].ccktxbb_valuearray[5] = 0x06;
1026 priv->cck_txbbgain_table[18].ccktxbb_valuearray[6] = 0x03;
1027 priv->cck_txbbgain_table[18].ccktxbb_valuearray[7] = 0x01;
1029 priv->cck_txbbgain_table[19].ccktxbb_valuearray[0] = 0x12;
1030 priv->cck_txbbgain_table[19].ccktxbb_valuearray[1] = 0x12;
1031 priv->cck_txbbgain_table[19].ccktxbb_valuearray[2] = 0x0f;
1032 priv->cck_txbbgain_table[19].ccktxbb_valuearray[3] = 0x0c;
1033 priv->cck_txbbgain_table[19].ccktxbb_valuearray[4] = 0x09;
1034 priv->cck_txbbgain_table[19].ccktxbb_valuearray[5] = 0x06;
1035 priv->cck_txbbgain_table[19].ccktxbb_valuearray[6] = 0x03;
1036 priv->cck_txbbgain_table[19].ccktxbb_valuearray[7] = 0x01;
1038 priv->cck_txbbgain_table[20].ccktxbb_valuearray[0] = 0x11;
1039 priv->cck_txbbgain_table[20].ccktxbb_valuearray[1] = 0x11;
1040 priv->cck_txbbgain_table[20].ccktxbb_valuearray[2] = 0x0f;
1041 priv->cck_txbbgain_table[20].ccktxbb_valuearray[3] = 0x0c;
1042 priv->cck_txbbgain_table[20].ccktxbb_valuearray[4] = 0x09;
1043 priv->cck_txbbgain_table[20].ccktxbb_valuearray[5] = 0x06;
1044 priv->cck_txbbgain_table[20].ccktxbb_valuearray[6] = 0x03;
1045 priv->cck_txbbgain_table[20].ccktxbb_valuearray[7] = 0x01;
1047 priv->cck_txbbgain_table[21].ccktxbb_valuearray[0] = 0x10;
1048 priv->cck_txbbgain_table[21].ccktxbb_valuearray[1] = 0x10;
1049 priv->cck_txbbgain_table[21].ccktxbb_valuearray[2] = 0x0e;
1050 priv->cck_txbbgain_table[21].ccktxbb_valuearray[3] = 0x0b;
1051 priv->cck_txbbgain_table[21].ccktxbb_valuearray[4] = 0x08;
1052 priv->cck_txbbgain_table[21].ccktxbb_valuearray[5] = 0x05;
1053 priv->cck_txbbgain_table[21].ccktxbb_valuearray[6] = 0x03;
1054 priv->cck_txbbgain_table[21].ccktxbb_valuearray[7] = 0x01;
1056 priv->cck_txbbgain_table[22].ccktxbb_valuearray[0] = 0x0f;
1057 priv->cck_txbbgain_table[22].ccktxbb_valuearray[1] = 0x0f;
1058 priv->cck_txbbgain_table[22].ccktxbb_valuearray[2] = 0x0d;
1059 priv->cck_txbbgain_table[22].ccktxbb_valuearray[3] = 0x0b;
1060 priv->cck_txbbgain_table[22].ccktxbb_valuearray[4] = 0x08;
1061 priv->cck_txbbgain_table[22].ccktxbb_valuearray[5] = 0x05;
1062 priv->cck_txbbgain_table[22].ccktxbb_valuearray[6] = 0x03;
1063 priv->cck_txbbgain_table[22].ccktxbb_valuearray[7] = 0x01;
1066 * ccktxbb_valuearray[0] is 0xA22 [1] is 0xA24 ...[7] is 0xA29
1067 * This Table is for CH14
1069 priv->cck_txbbgain_ch14_table[0].ccktxbb_valuearray[0] = 0x36;
1070 priv->cck_txbbgain_ch14_table[0].ccktxbb_valuearray[1] = 0x35;
1071 priv->cck_txbbgain_ch14_table[0].ccktxbb_valuearray[2] = 0x2e;
1072 priv->cck_txbbgain_ch14_table[0].ccktxbb_valuearray[3] = 0x1b;
1073 priv->cck_txbbgain_ch14_table[0].ccktxbb_valuearray[4] = 0x00;
1074 priv->cck_txbbgain_ch14_table[0].ccktxbb_valuearray[5] = 0x00;
1075 priv->cck_txbbgain_ch14_table[0].ccktxbb_valuearray[6] = 0x00;
1076 priv->cck_txbbgain_ch14_table[0].ccktxbb_valuearray[7] = 0x00;
1078 priv->cck_txbbgain_ch14_table[1].ccktxbb_valuearray[0] = 0x33;
1079 priv->cck_txbbgain_ch14_table[1].ccktxbb_valuearray[1] = 0x32;
1080 priv->cck_txbbgain_ch14_table[1].ccktxbb_valuearray[2] = 0x2b;
1081 priv->cck_txbbgain_ch14_table[1].ccktxbb_valuearray[3] = 0x19;
1082 priv->cck_txbbgain_ch14_table[1].ccktxbb_valuearray[4] = 0x00;
1083 priv->cck_txbbgain_ch14_table[1].ccktxbb_valuearray[5] = 0x00;
1084 priv->cck_txbbgain_ch14_table[1].ccktxbb_valuearray[6] = 0x00;
1085 priv->cck_txbbgain_ch14_table[1].ccktxbb_valuearray[7] = 0x00;
1087 priv->cck_txbbgain_ch14_table[2].ccktxbb_valuearray[0] = 0x30;
1088 priv->cck_txbbgain_ch14_table[2].ccktxbb_valuearray[1] = 0x2f;
1089 priv->cck_txbbgain_ch14_table[2].ccktxbb_valuearray[2] = 0x29;
1090 priv->cck_txbbgain_ch14_table[2].ccktxbb_valuearray[3] = 0x18;
1091 priv->cck_txbbgain_ch14_table[2].ccktxbb_valuearray[4] = 0x00;
1092 priv->cck_txbbgain_ch14_table[2].ccktxbb_valuearray[5] = 0x00;
1093 priv->cck_txbbgain_ch14_table[2].ccktxbb_valuearray[6] = 0x00;
1094 priv->cck_txbbgain_ch14_table[2].ccktxbb_valuearray[7] = 0x00;
1096 priv->cck_txbbgain_ch14_table[3].ccktxbb_valuearray[0] = 0x2d;
1097 priv->cck_txbbgain_ch14_table[3].ccktxbb_valuearray[1] = 0x2d;
1098 priv->cck_txbbgain_ch14_table[3].ccktxbb_valuearray[2] = 0x27;
1099 priv->cck_txbbgain_ch14_table[3].ccktxbb_valuearray[3] = 0x17;
1100 priv->cck_txbbgain_ch14_table[3].ccktxbb_valuearray[4] = 0x00;
1101 priv->cck_txbbgain_ch14_table[3].ccktxbb_valuearray[5] = 0x00;
1102 priv->cck_txbbgain_ch14_table[3].ccktxbb_valuearray[6] = 0x00;
1103 priv->cck_txbbgain_ch14_table[3].ccktxbb_valuearray[7] = 0x00;
1105 priv->cck_txbbgain_ch14_table[4].ccktxbb_valuearray[0] = 0x2b;
1106 priv->cck_txbbgain_ch14_table[4].ccktxbb_valuearray[1] = 0x2a;
1107 priv->cck_txbbgain_ch14_table[4].ccktxbb_valuearray[2] = 0x25;
1108 priv->cck_txbbgain_ch14_table[4].ccktxbb_valuearray[3] = 0x15;
1109 priv->cck_txbbgain_ch14_table[4].ccktxbb_valuearray[4] = 0x00;
1110 priv->cck_txbbgain_ch14_table[4].ccktxbb_valuearray[5] = 0x00;
1111 priv->cck_txbbgain_ch14_table[4].ccktxbb_valuearray[6] = 0x00;
1112 priv->cck_txbbgain_ch14_table[4].ccktxbb_valuearray[7] = 0x00;
1114 priv->cck_txbbgain_ch14_table[5].ccktxbb_valuearray[0] = 0x28;
1115 priv->cck_txbbgain_ch14_table[5].ccktxbb_valuearray[1] = 0x28;
1116 priv->cck_txbbgain_ch14_table[5].ccktxbb_valuearray[2] = 0x22;
1117 priv->cck_txbbgain_ch14_table[5].ccktxbb_valuearray[3] = 0x14;
1118 priv->cck_txbbgain_ch14_table[5].ccktxbb_valuearray[4] = 0x00;
1119 priv->cck_txbbgain_ch14_table[5].ccktxbb_valuearray[5] = 0x00;
1120 priv->cck_txbbgain_ch14_table[5].ccktxbb_valuearray[6] = 0x00;
1121 priv->cck_txbbgain_ch14_table[5].ccktxbb_valuearray[7] = 0x00;
1123 priv->cck_txbbgain_ch14_table[6].ccktxbb_valuearray[0] = 0x26;
1124 priv->cck_txbbgain_ch14_table[6].ccktxbb_valuearray[1] = 0x25;
1125 priv->cck_txbbgain_ch14_table[6].ccktxbb_valuearray[2] = 0x21;
1126 priv->cck_txbbgain_ch14_table[6].ccktxbb_valuearray[3] = 0x13;
1127 priv->cck_txbbgain_ch14_table[6].ccktxbb_valuearray[4] = 0x00;
1128 priv->cck_txbbgain_ch14_table[6].ccktxbb_valuearray[5] = 0x00;
1129 priv->cck_txbbgain_ch14_table[6].ccktxbb_valuearray[6] = 0x00;
1130 priv->cck_txbbgain_ch14_table[6].ccktxbb_valuearray[7] = 0x00;
1132 priv->cck_txbbgain_ch14_table[7].ccktxbb_valuearray[0] = 0x24;
1133 priv->cck_txbbgain_ch14_table[7].ccktxbb_valuearray[1] = 0x23;
1134 priv->cck_txbbgain_ch14_table[7].ccktxbb_valuearray[2] = 0x1f;
1135 priv->cck_txbbgain_ch14_table[7].ccktxbb_valuearray[3] = 0x12;
1136 priv->cck_txbbgain_ch14_table[7].ccktxbb_valuearray[4] = 0x00;
1137 priv->cck_txbbgain_ch14_table[7].ccktxbb_valuearray[5] = 0x00;
1138 priv->cck_txbbgain_ch14_table[7].ccktxbb_valuearray[6] = 0x00;
1139 priv->cck_txbbgain_ch14_table[7].ccktxbb_valuearray[7] = 0x00;
1141 priv->cck_txbbgain_ch14_table[8].ccktxbb_valuearray[0] = 0x22;
1142 priv->cck_txbbgain_ch14_table[8].ccktxbb_valuearray[1] = 0x21;
1143 priv->cck_txbbgain_ch14_table[8].ccktxbb_valuearray[2] = 0x1d;
1144 priv->cck_txbbgain_ch14_table[8].ccktxbb_valuearray[3] = 0x11;
1145 priv->cck_txbbgain_ch14_table[8].ccktxbb_valuearray[4] = 0x00;
1146 priv->cck_txbbgain_ch14_table[8].ccktxbb_valuearray[5] = 0x00;
1147 priv->cck_txbbgain_ch14_table[8].ccktxbb_valuearray[6] = 0x00;
1148 priv->cck_txbbgain_ch14_table[8].ccktxbb_valuearray[7] = 0x00;
1150 priv->cck_txbbgain_ch14_table[9].ccktxbb_valuearray[0] = 0x20;
1151 priv->cck_txbbgain_ch14_table[9].ccktxbb_valuearray[1] = 0x20;
1152 priv->cck_txbbgain_ch14_table[9].ccktxbb_valuearray[2] = 0x1b;
1153 priv->cck_txbbgain_ch14_table[9].ccktxbb_valuearray[3] = 0x10;
1154 priv->cck_txbbgain_ch14_table[9].ccktxbb_valuearray[4] = 0x00;
1155 priv->cck_txbbgain_ch14_table[9].ccktxbb_valuearray[5] = 0x00;
1156 priv->cck_txbbgain_ch14_table[9].ccktxbb_valuearray[6] = 0x00;
1157 priv->cck_txbbgain_ch14_table[9].ccktxbb_valuearray[7] = 0x00;
1159 priv->cck_txbbgain_ch14_table[10].ccktxbb_valuearray[0] = 0x1f;
1160 priv->cck_txbbgain_ch14_table[10].ccktxbb_valuearray[1] = 0x1e;
1161 priv->cck_txbbgain_ch14_table[10].ccktxbb_valuearray[2] = 0x1a;
1162 priv->cck_txbbgain_ch14_table[10].ccktxbb_valuearray[3] = 0x0f;
1163 priv->cck_txbbgain_ch14_table[10].ccktxbb_valuearray[4] = 0x00;
1164 priv->cck_txbbgain_ch14_table[10].ccktxbb_valuearray[5] = 0x00;
1165 priv->cck_txbbgain_ch14_table[10].ccktxbb_valuearray[6] = 0x00;
1166 priv->cck_txbbgain_ch14_table[10].ccktxbb_valuearray[7] = 0x00;
1168 priv->cck_txbbgain_ch14_table[11].ccktxbb_valuearray[0] = 0x1d;
1169 priv->cck_txbbgain_ch14_table[11].ccktxbb_valuearray[1] = 0x1c;
1170 priv->cck_txbbgain_ch14_table[11].ccktxbb_valuearray[2] = 0x18;
1171 priv->cck_txbbgain_ch14_table[11].ccktxbb_valuearray[3] = 0x0e;
1172 priv->cck_txbbgain_ch14_table[11].ccktxbb_valuearray[4] = 0x00;
1173 priv->cck_txbbgain_ch14_table[11].ccktxbb_valuearray[5] = 0x00;
1174 priv->cck_txbbgain_ch14_table[11].ccktxbb_valuearray[6] = 0x00;
1175 priv->cck_txbbgain_ch14_table[11].ccktxbb_valuearray[7] = 0x00;
1177 priv->cck_txbbgain_ch14_table[12].ccktxbb_valuearray[0] = 0x1b;
1178 priv->cck_txbbgain_ch14_table[12].ccktxbb_valuearray[1] = 0x1a;
1179 priv->cck_txbbgain_ch14_table[12].ccktxbb_valuearray[2] = 0x17;
1180 priv->cck_txbbgain_ch14_table[12].ccktxbb_valuearray[3] = 0x0e;
1181 priv->cck_txbbgain_ch14_table[12].ccktxbb_valuearray[4] = 0x00;
1182 priv->cck_txbbgain_ch14_table[12].ccktxbb_valuearray[5] = 0x00;
1183 priv->cck_txbbgain_ch14_table[12].ccktxbb_valuearray[6] = 0x00;
1184 priv->cck_txbbgain_ch14_table[12].ccktxbb_valuearray[7] = 0x00;
1186 priv->cck_txbbgain_ch14_table[13].ccktxbb_valuearray[0] = 0x1a;
1187 priv->cck_txbbgain_ch14_table[13].ccktxbb_valuearray[1] = 0x19;
1188 priv->cck_txbbgain_ch14_table[13].ccktxbb_valuearray[2] = 0x16;
1189 priv->cck_txbbgain_ch14_table[13].ccktxbb_valuearray[3] = 0x0d;
1190 priv->cck_txbbgain_ch14_table[13].ccktxbb_valuearray[4] = 0x00;
1191 priv->cck_txbbgain_ch14_table[13].ccktxbb_valuearray[5] = 0x00;
1192 priv->cck_txbbgain_ch14_table[13].ccktxbb_valuearray[6] = 0x00;
1193 priv->cck_txbbgain_ch14_table[13].ccktxbb_valuearray[7] = 0x00;
1195 priv->cck_txbbgain_ch14_table[14].ccktxbb_valuearray[0] = 0x18;
1196 priv->cck_txbbgain_ch14_table[14].ccktxbb_valuearray[1] = 0x17;
1197 priv->cck_txbbgain_ch14_table[14].ccktxbb_valuearray[2] = 0x15;
1198 priv->cck_txbbgain_ch14_table[14].ccktxbb_valuearray[3] = 0x0c;
1199 priv->cck_txbbgain_ch14_table[14].ccktxbb_valuearray[4] = 0x00;
1200 priv->cck_txbbgain_ch14_table[14].ccktxbb_valuearray[5] = 0x00;
1201 priv->cck_txbbgain_ch14_table[14].ccktxbb_valuearray[6] = 0x00;
1202 priv->cck_txbbgain_ch14_table[14].ccktxbb_valuearray[7] = 0x00;
1204 priv->cck_txbbgain_ch14_table[15].ccktxbb_valuearray[0] = 0x17;
1205 priv->cck_txbbgain_ch14_table[15].ccktxbb_valuearray[1] = 0x16;
1206 priv->cck_txbbgain_ch14_table[15].ccktxbb_valuearray[2] = 0x13;
1207 priv->cck_txbbgain_ch14_table[15].ccktxbb_valuearray[3] = 0x0b;
1208 priv->cck_txbbgain_ch14_table[15].ccktxbb_valuearray[4] = 0x00;
1209 priv->cck_txbbgain_ch14_table[15].ccktxbb_valuearray[5] = 0x00;
1210 priv->cck_txbbgain_ch14_table[15].ccktxbb_valuearray[6] = 0x00;
1211 priv->cck_txbbgain_ch14_table[15].ccktxbb_valuearray[7] = 0x00;
1213 priv->cck_txbbgain_ch14_table[16].ccktxbb_valuearray[0] = 0x16;
1214 priv->cck_txbbgain_ch14_table[16].ccktxbb_valuearray[1] = 0x15;
1215 priv->cck_txbbgain_ch14_table[16].ccktxbb_valuearray[2] = 0x12;
1216 priv->cck_txbbgain_ch14_table[16].ccktxbb_valuearray[3] = 0x0b;
1217 priv->cck_txbbgain_ch14_table[16].ccktxbb_valuearray[4] = 0x00;
1218 priv->cck_txbbgain_ch14_table[16].ccktxbb_valuearray[5] = 0x00;
1219 priv->cck_txbbgain_ch14_table[16].ccktxbb_valuearray[6] = 0x00;
1220 priv->cck_txbbgain_ch14_table[16].ccktxbb_valuearray[7] = 0x00;
1222 priv->cck_txbbgain_ch14_table[17].ccktxbb_valuearray[0] = 0x14;
1223 priv->cck_txbbgain_ch14_table[17].ccktxbb_valuearray[1] = 0x14;
1224 priv->cck_txbbgain_ch14_table[17].ccktxbb_valuearray[2] = 0x11;
1225 priv->cck_txbbgain_ch14_table[17].ccktxbb_valuearray[3] = 0x0a;
1226 priv->cck_txbbgain_ch14_table[17].ccktxbb_valuearray[4] = 0x00;
1227 priv->cck_txbbgain_ch14_table[17].ccktxbb_valuearray[5] = 0x00;
1228 priv->cck_txbbgain_ch14_table[17].ccktxbb_valuearray[6] = 0x00;
1229 priv->cck_txbbgain_ch14_table[17].ccktxbb_valuearray[7] = 0x00;
1231 priv->cck_txbbgain_ch14_table[18].ccktxbb_valuearray[0] = 0x13;
1232 priv->cck_txbbgain_ch14_table[18].ccktxbb_valuearray[1] = 0x13;
1233 priv->cck_txbbgain_ch14_table[18].ccktxbb_valuearray[2] = 0x10;
1234 priv->cck_txbbgain_ch14_table[18].ccktxbb_valuearray[3] = 0x0a;
1235 priv->cck_txbbgain_ch14_table[18].ccktxbb_valuearray[4] = 0x00;
1236 priv->cck_txbbgain_ch14_table[18].ccktxbb_valuearray[5] = 0x00;
1237 priv->cck_txbbgain_ch14_table[18].ccktxbb_valuearray[6] = 0x00;
1238 priv->cck_txbbgain_ch14_table[18].ccktxbb_valuearray[7] = 0x00;
1240 priv->cck_txbbgain_ch14_table[19].ccktxbb_valuearray[0] = 0x12;
1241 priv->cck_txbbgain_ch14_table[19].ccktxbb_valuearray[1] = 0x12;
1242 priv->cck_txbbgain_ch14_table[19].ccktxbb_valuearray[2] = 0x0f;
1243 priv->cck_txbbgain_ch14_table[19].ccktxbb_valuearray[3] = 0x09;
1244 priv->cck_txbbgain_ch14_table[19].ccktxbb_valuearray[4] = 0x00;
1245 priv->cck_txbbgain_ch14_table[19].ccktxbb_valuearray[5] = 0x00;
1246 priv->cck_txbbgain_ch14_table[19].ccktxbb_valuearray[6] = 0x00;
1247 priv->cck_txbbgain_ch14_table[19].ccktxbb_valuearray[7] = 0x00;
1249 priv->cck_txbbgain_ch14_table[20].ccktxbb_valuearray[0] = 0x11;
1250 priv->cck_txbbgain_ch14_table[20].ccktxbb_valuearray[1] = 0x11;
1251 priv->cck_txbbgain_ch14_table[20].ccktxbb_valuearray[2] = 0x0f;
1252 priv->cck_txbbgain_ch14_table[20].ccktxbb_valuearray[3] = 0x09;
1253 priv->cck_txbbgain_ch14_table[20].ccktxbb_valuearray[4] = 0x00;
1254 priv->cck_txbbgain_ch14_table[20].ccktxbb_valuearray[5] = 0x00;
1255 priv->cck_txbbgain_ch14_table[20].ccktxbb_valuearray[6] = 0x00;
1256 priv->cck_txbbgain_ch14_table[20].ccktxbb_valuearray[7] = 0x00;
1258 priv->cck_txbbgain_ch14_table[21].ccktxbb_valuearray[0] = 0x10;
1259 priv->cck_txbbgain_ch14_table[21].ccktxbb_valuearray[1] = 0x10;
1260 priv->cck_txbbgain_ch14_table[21].ccktxbb_valuearray[2] = 0x0e;
1261 priv->cck_txbbgain_ch14_table[21].ccktxbb_valuearray[3] = 0x08;
1262 priv->cck_txbbgain_ch14_table[21].ccktxbb_valuearray[4] = 0x00;
1263 priv->cck_txbbgain_ch14_table[21].ccktxbb_valuearray[5] = 0x00;
1264 priv->cck_txbbgain_ch14_table[21].ccktxbb_valuearray[6] = 0x00;
1265 priv->cck_txbbgain_ch14_table[21].ccktxbb_valuearray[7] = 0x00;
1267 priv->cck_txbbgain_ch14_table[22].ccktxbb_valuearray[0] = 0x0f;
1268 priv->cck_txbbgain_ch14_table[22].ccktxbb_valuearray[1] = 0x0f;
1269 priv->cck_txbbgain_ch14_table[22].ccktxbb_valuearray[2] = 0x0d;
1270 priv->cck_txbbgain_ch14_table[22].ccktxbb_valuearray[3] = 0x08;
1271 priv->cck_txbbgain_ch14_table[22].ccktxbb_valuearray[4] = 0x00;
1272 priv->cck_txbbgain_ch14_table[22].ccktxbb_valuearray[5] = 0x00;
1273 priv->cck_txbbgain_ch14_table[22].ccktxbb_valuearray[6] = 0x00;
1274 priv->cck_txbbgain_ch14_table[22].ccktxbb_valuearray[7] = 0x00;
1276 priv->btxpower_tracking = TRUE;
1277 priv->txpower_count = 0;
1278 priv->btxpower_trackingInit = FALSE;
1282 static void dm_InitializeTXPowerTracking_ThermalMeter(struct net_device *dev)
1284 struct r8192_priv *priv = ieee80211_priv(dev);
1287 * Tx Power tracking by Thermal Meter requires Firmware R/W 3-wire. This mechanism
1288 * can be enabled only when Firmware R/W 3-wire is enabled. Otherwise, frequent r/w
1289 * 3-wire by driver causes RF to go into a wrong state.
1291 if (priv->ieee80211->FwRWRF)
1292 priv->btxpower_tracking = TRUE;
1294 priv->btxpower_tracking = FALSE;
1295 priv->txpower_count = 0;
1296 priv->btxpower_trackingInit = FALSE;
1299 void dm_initialize_txpower_tracking(struct net_device *dev)
1301 struct r8192_priv *priv = ieee80211_priv(dev);
1303 if (priv->bDcut == TRUE)
1304 dm_InitializeTXPowerTracking_TSSI(dev);
1306 dm_InitializeTXPowerTracking_ThermalMeter(dev);
1307 } /* dm_InitializeTXPowerTracking */
1309 static void dm_CheckTXPowerTracking_TSSI(struct net_device *dev)
1311 struct r8192_priv *priv = ieee80211_priv(dev);
1312 static u32 tx_power_track_counter;
1314 if (!priv->btxpower_tracking)
1316 if ((tx_power_track_counter % 30 == 0) && (tx_power_track_counter != 0))
1317 queue_delayed_work(priv->priv_wq, &priv->txpower_tracking_wq, 0);
1318 tx_power_track_counter++;
1321 static void dm_CheckTXPowerTracking_ThermalMeter(struct net_device *dev)
1323 struct r8192_priv *priv = ieee80211_priv(dev);
1324 static u8 TM_Trigger;
1325 /*DbgPrint("dm_CheckTXPowerTracking()\n");*/
1326 if (!priv->btxpower_tracking)
1328 if (priv->txpower_count <= 2) {
1329 priv->txpower_count++;
1335 * Attention!! You have to write all 12bits of data to RF, or it may cause RF to crash
1336 * actually write reg0x02 bit1=0, then bit1=1.
1337 * DbgPrint("Trigger ThermalMeter, write RF reg0x2 = 0x4d to 0x4f\n");
1339 rtl8192_phy_SetRFReg(dev, RF90_PATH_A, 0x02, bMask12Bits, 0x4d);
1340 rtl8192_phy_SetRFReg(dev, RF90_PATH_A, 0x02, bMask12Bits, 0x4f);
1341 rtl8192_phy_SetRFReg(dev, RF90_PATH_A, 0x02, bMask12Bits, 0x4d);
1342 rtl8192_phy_SetRFReg(dev, RF90_PATH_A, 0x02, bMask12Bits, 0x4f);
1346 /*DbgPrint("Schedule TxPowerTrackingWorkItem\n");*/
1347 queue_delayed_work(priv->priv_wq, &priv->txpower_tracking_wq, 0);
1351 static void dm_check_txpower_tracking(struct net_device *dev)
1353 struct r8192_priv *priv = ieee80211_priv(dev);
1354 /*static u32 tx_power_track_counter = 0;*/
1357 dm_CheckTXPowerTracking_TSSI(dev);
1359 if (priv->bDcut == TRUE)
1360 dm_CheckTXPowerTracking_TSSI(dev);
1362 dm_CheckTXPowerTracking_ThermalMeter(dev);
1365 } /* dm_CheckTXPowerTracking */
1367 static void dm_CCKTxPowerAdjust_TSSI(struct net_device *dev, bool bInCH14)
1370 struct r8192_priv *priv = ieee80211_priv(dev);
1372 /* Write 0xa22 0xa23 */
1375 /* Write 0xa22 0xa23 */
1376 TempVal = priv->cck_txbbgain_table[priv->cck_present_attentuation].ccktxbb_valuearray[0] +
1377 (priv->cck_txbbgain_table[priv->cck_present_attentuation].ccktxbb_valuearray[1]<<8);
1379 rtl8192_setBBreg(dev, rCCK0_TxFilter1, bMaskHWord, TempVal);
1380 /* Write 0xa24 ~ 0xa27 */
1381 TempVal = priv->cck_txbbgain_table[priv->cck_present_attentuation].ccktxbb_valuearray[2] +
1382 (priv->cck_txbbgain_table[priv->cck_present_attentuation].ccktxbb_valuearray[3]<<8) +
1383 (priv->cck_txbbgain_table[priv->cck_present_attentuation].ccktxbb_valuearray[4]<<16)+
1384 (priv->cck_txbbgain_table[priv->cck_present_attentuation].ccktxbb_valuearray[5]<<24);
1385 rtl8192_setBBreg(dev, rCCK0_TxFilter2, bMaskDWord, TempVal);
1386 /* Write 0xa28 0xa29 */
1387 TempVal = priv->cck_txbbgain_table[priv->cck_present_attentuation].ccktxbb_valuearray[6] +
1388 (priv->cck_txbbgain_table[priv->cck_present_attentuation].ccktxbb_valuearray[7]<<8);
1390 rtl8192_setBBreg(dev, rCCK0_DebugPort, bMaskLWord, TempVal);
1392 TempVal = priv->cck_txbbgain_ch14_table[priv->cck_present_attentuation].ccktxbb_valuearray[0] +
1393 (priv->cck_txbbgain_ch14_table[priv->cck_present_attentuation].ccktxbb_valuearray[1]<<8);
1395 rtl8192_setBBreg(dev, rCCK0_TxFilter1, bMaskHWord, TempVal);
1396 /* Write 0xa24 ~ 0xa27 */
1397 TempVal = priv->cck_txbbgain_ch14_table[priv->cck_present_attentuation].ccktxbb_valuearray[2] +
1398 (priv->cck_txbbgain_ch14_table[priv->cck_present_attentuation].ccktxbb_valuearray[3]<<8) +
1399 (priv->cck_txbbgain_ch14_table[priv->cck_present_attentuation].ccktxbb_valuearray[4]<<16)+
1400 (priv->cck_txbbgain_ch14_table[priv->cck_present_attentuation].ccktxbb_valuearray[5]<<24);
1401 rtl8192_setBBreg(dev, rCCK0_TxFilter2, bMaskDWord, TempVal);
1402 /* Write 0xa28 0xa29 */
1403 TempVal = priv->cck_txbbgain_ch14_table[priv->cck_present_attentuation].ccktxbb_valuearray[6] +
1404 (priv->cck_txbbgain_ch14_table[priv->cck_present_attentuation].ccktxbb_valuearray[7]<<8);
1406 rtl8192_setBBreg(dev, rCCK0_DebugPort, bMaskLWord, TempVal);
1410 static void dm_CCKTxPowerAdjust_ThermalMeter(struct net_device *dev, bool bInCH14)
1413 struct r8192_priv *priv = ieee80211_priv(dev);
1417 /* Write 0xa22 0xa23 */
1418 TempVal = CCKSwingTable_Ch1_Ch13[priv->CCK_index][0] +
1419 (CCKSwingTable_Ch1_Ch13[priv->CCK_index][1]<<8);
1420 rtl8192_setBBreg(dev, rCCK0_TxFilter1, bMaskHWord, TempVal);
1421 RT_TRACE(COMP_POWER_TRACKING, "CCK not chnl 14, reg 0x%x = 0x%x\n",
1422 rCCK0_TxFilter1, TempVal);
1423 /* Write 0xa24 ~ 0xa27 */
1424 TempVal = CCKSwingTable_Ch1_Ch13[priv->CCK_index][2] +
1425 (CCKSwingTable_Ch1_Ch13[priv->CCK_index][3]<<8) +
1426 (CCKSwingTable_Ch1_Ch13[priv->CCK_index][4]<<16)+
1427 (CCKSwingTable_Ch1_Ch13[priv->CCK_index][5]<<24);
1428 rtl8192_setBBreg(dev, rCCK0_TxFilter2, bMaskDWord, TempVal);
1429 RT_TRACE(COMP_POWER_TRACKING, "CCK not chnl 14, reg 0x%x = 0x%x\n",
1430 rCCK0_TxFilter2, TempVal);
1431 /* Write 0xa28 0xa29 */
1432 TempVal = CCKSwingTable_Ch1_Ch13[priv->CCK_index][6] +
1433 (CCKSwingTable_Ch1_Ch13[priv->CCK_index][7]<<8);
1435 rtl8192_setBBreg(dev, rCCK0_DebugPort, bMaskLWord, TempVal);
1436 RT_TRACE(COMP_POWER_TRACKING, "CCK not chnl 14, reg 0x%x = 0x%x\n",
1437 rCCK0_DebugPort, TempVal);
1439 /*priv->CCKTxPowerAdjustCntNotCh14++; cosa add for debug.*/
1440 /* Write 0xa22 0xa23 */
1441 TempVal = CCKSwingTable_Ch14[priv->CCK_index][0] +
1442 (CCKSwingTable_Ch14[priv->CCK_index][1]<<8);
1444 rtl8192_setBBreg(dev, rCCK0_TxFilter1, bMaskHWord, TempVal);
1445 RT_TRACE(COMP_POWER_TRACKING, "CCK chnl 14, reg 0x%x = 0x%x\n",
1446 rCCK0_TxFilter1, TempVal);
1447 /* Write 0xa24 ~ 0xa27 */
1448 TempVal = CCKSwingTable_Ch14[priv->CCK_index][2] +
1449 (CCKSwingTable_Ch14[priv->CCK_index][3]<<8) +
1450 (CCKSwingTable_Ch14[priv->CCK_index][4]<<16)+
1451 (CCKSwingTable_Ch14[priv->CCK_index][5]<<24);
1452 rtl8192_setBBreg(dev, rCCK0_TxFilter2, bMaskDWord, TempVal);
1453 RT_TRACE(COMP_POWER_TRACKING, "CCK chnl 14, reg 0x%x = 0x%x\n",
1454 rCCK0_TxFilter2, TempVal);
1455 /* Write 0xa28 0xa29 */
1456 TempVal = CCKSwingTable_Ch14[priv->CCK_index][6] +
1457 (CCKSwingTable_Ch14[priv->CCK_index][7]<<8);
1459 rtl8192_setBBreg(dev, rCCK0_DebugPort, bMaskLWord, TempVal);
1460 RT_TRACE(COMP_POWER_TRACKING, "CCK chnl 14, reg 0x%x = 0x%x\n",
1461 rCCK0_DebugPort, TempVal);
1465 void dm_cck_txpower_adjust(struct net_device *dev, bool binch14)
1466 { /* dm_CCKTxPowerAdjust */
1467 struct r8192_priv *priv = ieee80211_priv(dev);
1469 if (priv->bDcut == TRUE)
1470 dm_CCKTxPowerAdjust_TSSI(dev, binch14);
1472 dm_CCKTxPowerAdjust_ThermalMeter(dev, binch14);
1476 static void dm_txpower_reset_recovery(
1477 struct net_device *dev
1480 struct r8192_priv *priv = ieee80211_priv(dev);
1482 RT_TRACE(COMP_POWER_TRACKING, "Start Reset Recovery ==>\n");
1483 rtl8192_setBBreg(dev, rOFDM0_XATxIQImbalance, bMaskDWord, priv->txbbgain_table[priv->rfa_txpowertrackingindex].txbbgain_value);
1484 RT_TRACE(COMP_POWER_TRACKING, "Reset Recovery: Fill in 0xc80 is %08x\n", priv->txbbgain_table[priv->rfa_txpowertrackingindex].txbbgain_value);
1485 RT_TRACE(COMP_POWER_TRACKING, "Reset Recovery: Fill in RFA_txPowerTrackingIndex is %x\n", priv->rfa_txpowertrackingindex);
1486 RT_TRACE(COMP_POWER_TRACKING, "Reset Recovery : RF A I/Q Amplify Gain is %ld\n", priv->txbbgain_table[priv->rfa_txpowertrackingindex].txbb_iq_amplifygain);
1487 RT_TRACE(COMP_POWER_TRACKING, "Reset Recovery: CCK Attenuation is %d dB\n", priv->cck_present_attentuation);
1488 dm_cck_txpower_adjust(dev, priv->bcck_in_ch14);
1490 rtl8192_setBBreg(dev, rOFDM0_XCTxIQImbalance, bMaskDWord, priv->txbbgain_table[priv->rfc_txpowertrackingindex].txbbgain_value);
1491 RT_TRACE(COMP_POWER_TRACKING, "Reset Recovery: Fill in 0xc90 is %08x\n", priv->txbbgain_table[priv->rfc_txpowertrackingindex].txbbgain_value);
1492 RT_TRACE(COMP_POWER_TRACKING, "Reset Recovery: Fill in RFC_txPowerTrackingIndex is %x\n", priv->rfc_txpowertrackingindex);
1493 RT_TRACE(COMP_POWER_TRACKING, "Reset Recovery : RF C I/Q Amplify Gain is %ld\n", priv->txbbgain_table[priv->rfc_txpowertrackingindex].txbb_iq_amplifygain);
1495 } /* dm_TXPowerResetRecovery */
1497 void dm_restore_dynamic_mechanism_state(struct net_device *dev)
1499 struct r8192_priv *priv = ieee80211_priv(dev);
1500 u32 reg_ratr = priv->rate_adaptive.last_ratr;
1503 RT_TRACE(COMP_RATE, "<---- dm_restore_dynamic_mechanism_state(): driver is going to unload\n");
1507 /* Restore previous state for rate adaptive */
1508 if (priv->rate_adaptive.rate_adaptive_disabled)
1510 /* TODO: Only 11n mode is implemented currently, */
1511 if (!(priv->ieee80211->mode == WIRELESS_MODE_N_24G ||
1512 priv->ieee80211->mode == WIRELESS_MODE_N_5G))
1516 /* 2007/11/15 MH Copy from 8190PCI. */
1519 ratr_value = reg_ratr;
1520 if (priv->rf_type == RF_1T2R) { /* 1T2R, Spatial Stream 2 should be disabled */
1521 ratr_value &= ~(RATE_ALL_OFDM_2SS);
1522 /*DbgPrint("HW_VAR_TATR_0 from 0x%x ==> 0x%x\n", ((pu4Byte)(val))[0], ratr_value);*/
1524 /*DbgPrint("set HW_VAR_TATR_0 = 0x%x\n", ratr_value);*/
1525 /*cosa PlatformEFIOWrite4Byte(Adapter, RATR0, ((pu4Byte)(val))[0]);*/
1526 write_nic_dword(dev, RATR0, ratr_value);
1527 write_nic_byte(dev, UFWP, 1);
1529 /* Restore TX Power Tracking Index */
1530 if (priv->btxpower_trackingInit && priv->btxpower_tracking)
1531 dm_txpower_reset_recovery(dev);
1533 /* Restore BB Initial Gain */
1534 dm_bb_initialgain_restore(dev);
1536 } /* DM_RestoreDynamicMechanismState */
1538 static void dm_bb_initialgain_restore(struct net_device *dev)
1540 struct r8192_priv *priv = ieee80211_priv(dev);
1541 u32 bit_mask = 0x7f; /* Bit0~ Bit6 */
1543 if (dm_digtable.dig_algorithm == DIG_ALGO_BY_RSSI)
1546 /* Disable Initial Gain */
1547 /*PHY_SetBBReg(Adapter, UFWP, bMaskLWord, 0x800);*/
1548 rtl8192_setBBreg(dev, UFWP, bMaskByte1, 0x8); /* Only clear byte 1 and rewrite. */
1549 rtl8192_setBBreg(dev, rOFDM0_XAAGCCore1, bit_mask, (u32)priv->initgain_backup.xaagccore1);
1550 rtl8192_setBBreg(dev, rOFDM0_XBAGCCore1, bit_mask, (u32)priv->initgain_backup.xbagccore1);
1551 rtl8192_setBBreg(dev, rOFDM0_XCAGCCore1, bit_mask, (u32)priv->initgain_backup.xcagccore1);
1552 rtl8192_setBBreg(dev, rOFDM0_XDAGCCore1, bit_mask, (u32)priv->initgain_backup.xdagccore1);
1553 bit_mask = bMaskByte2;
1554 rtl8192_setBBreg(dev, rCCK0_CCA, bit_mask, (u32)priv->initgain_backup.cca);
1556 RT_TRACE(COMP_DIG, "dm_BBInitialGainRestore 0xc50 is %x\n", priv->initgain_backup.xaagccore1);
1557 RT_TRACE(COMP_DIG, "dm_BBInitialGainRestore 0xc58 is %x\n", priv->initgain_backup.xbagccore1);
1558 RT_TRACE(COMP_DIG, "dm_BBInitialGainRestore 0xc60 is %x\n", priv->initgain_backup.xcagccore1);
1559 RT_TRACE(COMP_DIG, "dm_BBInitialGainRestore 0xc68 is %x\n", priv->initgain_backup.xdagccore1);
1560 RT_TRACE(COMP_DIG, "dm_BBInitialGainRestore 0xa0a is %x\n", priv->initgain_backup.cca);
1561 /* Enable Initial Gain */
1562 /*PHY_SetBBReg(Adapter, UFWP, bMaskLWord, 0x100);*/
1563 rtl8192_setBBreg(dev, UFWP, bMaskByte1, 0x1); /* Only clear byte 1 and rewrite. */
1565 } /* dm_BBInitialGainRestore */
1567 void dm_backup_dynamic_mechanism_state(struct net_device *dev)
1569 struct r8192_priv *priv = ieee80211_priv(dev);
1571 /* Fsync to avoid reset */
1572 priv->bswitch_fsync = false;
1573 priv->bfsync_processing = false;
1574 /* Backup BB InitialGain */
1575 dm_bb_initialgain_backup(dev);
1577 } /* DM_BackupDynamicMechanismState */
1579 static void dm_bb_initialgain_backup(struct net_device *dev)
1581 struct r8192_priv *priv = ieee80211_priv(dev);
1582 u32 bit_mask = bMaskByte0; /* Bit0~ Bit6 */
1584 if (dm_digtable.dig_algorithm == DIG_ALGO_BY_RSSI)
1587 /*PHY_SetBBReg(Adapter, UFWP, bMaskLWord, 0x800);*/
1588 rtl8192_setBBreg(dev, UFWP, bMaskByte1, 0x8); /* Only clear byte 1 and rewrite. */
1589 priv->initgain_backup.xaagccore1 = (u8)rtl8192_QueryBBReg(dev, rOFDM0_XAAGCCore1, bit_mask);
1590 priv->initgain_backup.xbagccore1 = (u8)rtl8192_QueryBBReg(dev, rOFDM0_XBAGCCore1, bit_mask);
1591 priv->initgain_backup.xcagccore1 = (u8)rtl8192_QueryBBReg(dev, rOFDM0_XCAGCCore1, bit_mask);
1592 priv->initgain_backup.xdagccore1 = (u8)rtl8192_QueryBBReg(dev, rOFDM0_XDAGCCore1, bit_mask);
1593 bit_mask = bMaskByte2;
1594 priv->initgain_backup.cca = (u8)rtl8192_QueryBBReg(dev, rCCK0_CCA, bit_mask);
1596 RT_TRACE(COMP_DIG, "BBInitialGainBackup 0xc50 is %x\n", priv->initgain_backup.xaagccore1);
1597 RT_TRACE(COMP_DIG, "BBInitialGainBackup 0xc58 is %x\n", priv->initgain_backup.xbagccore1);
1598 RT_TRACE(COMP_DIG, "BBInitialGainBackup 0xc60 is %x\n", priv->initgain_backup.xcagccore1);
1599 RT_TRACE(COMP_DIG, "BBInitialGainBackup 0xc68 is %x\n", priv->initgain_backup.xdagccore1);
1600 RT_TRACE(COMP_DIG, "BBInitialGainBackup 0xa0a is %x\n", priv->initgain_backup.cca);
1602 } /* dm_BBInitialGainBakcup */
1605 /*-----------------------------------------------------------------------------
1606 * Function: dm_change_dynamic_initgain_thresh()
1618 * 05/29/2008 amy Create Version 0 porting from windows code.
1620 *---------------------------------------------------------------------------*/
1622 void dm_change_dynamic_initgain_thresh(struct net_device *dev, u32 dm_type,
1625 if (dm_type == DIG_TYPE_THRESH_HIGH) {
1626 dm_digtable.rssi_high_thresh = dm_value;
1627 } else if (dm_type == DIG_TYPE_THRESH_LOW) {
1628 dm_digtable.rssi_low_thresh = dm_value;
1629 } else if (dm_type == DIG_TYPE_THRESH_HIGHPWR_HIGH) {
1630 dm_digtable.rssi_high_power_highthresh = dm_value;
1631 } else if (dm_type == DIG_TYPE_THRESH_HIGHPWR_HIGH) {
1632 dm_digtable.rssi_high_power_highthresh = dm_value;
1633 } else if (dm_type == DIG_TYPE_ENABLE) {
1634 dm_digtable.dig_state = DM_STA_DIG_MAX;
1635 dm_digtable.dig_enable_flag = true;
1636 } else if (dm_type == DIG_TYPE_DISABLE) {
1637 dm_digtable.dig_state = DM_STA_DIG_MAX;
1638 dm_digtable.dig_enable_flag = false;
1639 } else if (dm_type == DIG_TYPE_DBG_MODE) {
1640 if (dm_value >= DM_DBG_MAX)
1641 dm_value = DM_DBG_OFF;
1642 dm_digtable.dbg_mode = (u8)dm_value;
1643 } else if (dm_type == DIG_TYPE_RSSI) {
1646 dm_digtable.rssi_val = (long)dm_value;
1647 } else if (dm_type == DIG_TYPE_ALGORITHM) {
1648 if (dm_value >= DIG_ALGO_MAX)
1649 dm_value = DIG_ALGO_BY_FALSE_ALARM;
1650 if (dm_digtable.dig_algorithm != (u8)dm_value)
1651 dm_digtable.dig_algorithm_switch = 1;
1652 dm_digtable.dig_algorithm = (u8)dm_value;
1653 } else if (dm_type == DIG_TYPE_BACKOFF) {
1656 dm_digtable.backoff_val = (u8)dm_value;
1657 } else if (dm_type == DIG_TYPE_RX_GAIN_MIN) {
1660 dm_digtable.rx_gain_range_min = (u8)dm_value;
1661 } else if (dm_type == DIG_TYPE_RX_GAIN_MAX) {
1662 if (dm_value > 0x50)
1664 dm_digtable.rx_gain_range_max = (u8)dm_value;
1666 } /* DM_ChangeDynamicInitGainThresh */
1668 /*-----------------------------------------------------------------------------
1669 * Function: dm_dig_init()
1671 * Overview: Set DIG scheme init value.
1681 * 05/15/2008 amy Create Version 0 porting from windows code.
1683 *---------------------------------------------------------------------------*/
1684 static void dm_dig_init(struct net_device *dev)
1686 struct r8192_priv *priv = ieee80211_priv(dev);
1687 /* 2007/10/05 MH Disable DIG scheme now. Not tested. */
1688 dm_digtable.dig_enable_flag = true;
1689 dm_digtable.dig_algorithm = DIG_ALGO_BY_RSSI;
1690 dm_digtable.dbg_mode = DM_DBG_OFF; /* off=by real rssi value, on=by DM_DigTable.Rssi_val for new dig */
1691 dm_digtable.dig_algorithm_switch = 0;
1693 /* 2007/10/04 MH Define init gain threshold. */
1694 dm_digtable.dig_state = DM_STA_DIG_MAX;
1695 dm_digtable.dig_highpwr_state = DM_STA_DIG_MAX;
1696 dm_digtable.initialgain_lowerbound_state = false;
1698 dm_digtable.rssi_low_thresh = DM_DIG_THRESH_LOW;
1699 dm_digtable.rssi_high_thresh = DM_DIG_THRESH_HIGH;
1701 dm_digtable.rssi_high_power_lowthresh = DM_DIG_HIGH_PWR_THRESH_LOW;
1702 dm_digtable.rssi_high_power_highthresh = DM_DIG_HIGH_PWR_THRESH_HIGH;
1704 dm_digtable.rssi_val = 50; /* for new dig debug rssi value */
1705 dm_digtable.backoff_val = DM_DIG_BACKOFF;
1706 dm_digtable.rx_gain_range_max = DM_DIG_MAX;
1707 if (priv->CustomerID == RT_CID_819x_Netcore)
1708 dm_digtable.rx_gain_range_min = DM_DIG_MIN_Netcore;
1710 dm_digtable.rx_gain_range_min = DM_DIG_MIN;
1714 /*-----------------------------------------------------------------------------
1715 * Function: dm_ctrl_initgain_byrssi()
1717 * Overview: Driver must monitor RSSI and notify firmware to change initial
1718 * gain according to different threshold. BB team provide the
1719 * suggested solution.
1721 * Input: struct net_device *dev
1729 * 05/27/2008 amy Create Version 0 porting from windows code.
1730 *---------------------------------------------------------------------------*/
1731 static void dm_ctrl_initgain_byrssi(struct net_device *dev)
1733 if (dm_digtable.dig_enable_flag == false)
1736 if (dm_digtable.dig_algorithm == DIG_ALGO_BY_FALSE_ALARM)
1737 dm_ctrl_initgain_byrssi_by_fwfalse_alarm(dev);
1738 else if (dm_digtable.dig_algorithm == DIG_ALGO_BY_RSSI)
1739 dm_ctrl_initgain_byrssi_by_driverrssi(dev);
1745 static void dm_ctrl_initgain_byrssi_by_driverrssi(
1746 struct net_device *dev)
1748 struct r8192_priv *priv = ieee80211_priv(dev);
1752 if (dm_digtable.dig_enable_flag == false)
1755 /*DbgPrint("Dig by Sw Rssi\n");*/
1756 if (dm_digtable.dig_algorithm_switch) /* if switched algorithm, we have to disable FW Dig. */
1759 if (fw_dig <= 3) { /* execute several times to make sure the FW Dig is disabled */
1761 for (i = 0; i < 3; i++)
1762 rtl8192_setBBreg(dev, UFWP, bMaskByte1, 0x8); /* Only clear byte 1 and rewrite. */
1764 dm_digtable.dig_state = DM_STA_DIG_OFF; /* fw dig off. */
1767 if (priv->ieee80211->state == IEEE80211_LINKED)
1768 dm_digtable.cur_connect_state = DIG_CONNECT;
1770 dm_digtable.cur_connect_state = DIG_DISCONNECT;
1772 /*DbgPrint("DM_DigTable.PreConnectState = %d, DM_DigTable.CurConnectState = %d\n",
1773 DM_DigTable.PreConnectState, DM_DigTable.CurConnectState);*/
1775 if (dm_digtable.dbg_mode == DM_DBG_OFF)
1776 dm_digtable.rssi_val = priv->undecorated_smoothed_pwdb;
1777 /*DbgPrint("DM_DigTable.Rssi_val = %d\n", DM_DigTable.Rssi_val);*/
1778 dm_initial_gain(dev);
1781 if (dm_digtable.dig_algorithm_switch)
1782 dm_digtable.dig_algorithm_switch = 0;
1783 dm_digtable.pre_connect_state = dm_digtable.cur_connect_state;
1785 } /* dm_CtrlInitGainByRssi */
1787 static void dm_ctrl_initgain_byrssi_by_fwfalse_alarm(
1788 struct net_device *dev)
1790 struct r8192_priv *priv = ieee80211_priv(dev);
1791 static u32 reset_cnt;
1794 if (dm_digtable.dig_enable_flag == false)
1797 if (dm_digtable.dig_algorithm_switch) {
1798 dm_digtable.dig_state = DM_STA_DIG_MAX;
1800 for (i = 0; i < 3; i++)
1801 rtl8192_setBBreg(dev, UFWP, bMaskByte1, 0x1); /* Only clear byte 1 and rewrite.*/
1802 dm_digtable.dig_algorithm_switch = 0;
1805 if (priv->ieee80211->state != IEEE80211_LINKED)
1808 /* For smooth, we can not change DIG state. */
1809 if ((priv->undecorated_smoothed_pwdb > dm_digtable.rssi_low_thresh) &&
1810 (priv->undecorated_smoothed_pwdb < dm_digtable.rssi_high_thresh))
1813 /*DbgPrint("Dig by Fw False Alarm\n");*/
1814 /*if (DM_DigTable.Dig_State == DM_STA_DIG_OFF)*/
1815 /*DbgPrint("DIG Check\n\r RSSI=%d LOW=%d HIGH=%d STATE=%d",
1816 pHalData->UndecoratedSmoothedPWDB, DM_DigTable.RssiLowThresh,
1817 DM_DigTable.RssiHighThresh, DM_DigTable.Dig_State);*/
1818 /* 1. When RSSI decrease, We have to judge if it is smaller than a threshold
1819 and then execute the step below. */
1820 if (priv->undecorated_smoothed_pwdb <= dm_digtable.rssi_low_thresh) {
1821 /* 2008/02/05 MH When we execute silent reset, the DIG PHY parameters
1822 will be reset to init value. We must prevent the condition. */
1823 if (dm_digtable.dig_state == DM_STA_DIG_OFF &&
1824 (priv->reset_count == reset_cnt)) {
1827 reset_cnt = priv->reset_count;
1829 /* If DIG is off, DIG high power state must reset. */
1830 dm_digtable.dig_highpwr_state = DM_STA_DIG_MAX;
1831 dm_digtable.dig_state = DM_STA_DIG_OFF;
1834 rtl8192_setBBreg(dev, UFWP, bMaskByte1, 0x8); /* Only clear byte 1 and rewrite. */
1836 /* 1.2 Set initial gain. */
1837 write_nic_byte(dev, rOFDM0_XAAGCCore1, 0x17);
1838 write_nic_byte(dev, rOFDM0_XBAGCCore1, 0x17);
1839 write_nic_byte(dev, rOFDM0_XCAGCCore1, 0x17);
1840 write_nic_byte(dev, rOFDM0_XDAGCCore1, 0x17);
1842 /* 1.3 Lower PD_TH for OFDM. */
1843 if (priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20) {
1845 * 2008/01/11 MH 40MHZ 90/92 register are not the same.
1846 * 2008/02/05 MH SD3-Jerry 92U/92E PD_TH are the same.
1848 write_nic_byte(dev, (rOFDM0_XATxAFE+3), 0x00);
1849 /*else if (priv->card_8192 == HARDWARE_TYPE_RTL8190P)
1850 write_nic_byte(pAdapter, rOFDM0_RxDetector1, 0x40);
1851 else if (pAdapter->HardwareType == HARDWARE_TYPE_RTL8192E)
1853 PlatformEFIOWrite1Byte(pAdapter, rOFDM0_RxDetector1, 0x40);
1856 write_nic_byte(dev, rOFDM0_RxDetector1, 0x42);
1858 /* 1.4 Lower CS ratio for CCK. */
1859 write_nic_byte(dev, 0xa0a, 0x08);
1861 /* 1.5 Higher EDCCA. */
1862 /*PlatformEFIOWrite4Byte(pAdapter, rOFDM0_ECCAThreshold, 0x325);*/
1867 /* 2. When RSSI increase, We have to judge if it is larger than a threshold
1868 and then execute the step below. */
1869 if (priv->undecorated_smoothed_pwdb >= dm_digtable.rssi_high_thresh) {
1872 if (dm_digtable.dig_state == DM_STA_DIG_ON &&
1873 (priv->reset_count == reset_cnt)) {
1874 dm_ctrl_initgain_byrssi_highpwr(dev);
1877 if (priv->reset_count != reset_cnt)
1880 reset_cnt = priv->reset_count;
1882 dm_digtable.dig_state = DM_STA_DIG_ON;
1883 /*DbgPrint("DIG ON\n\r");*/
1886 * 2.1 Set initial gain.
1887 * 2008/02/26 MH SD3-Jerry suggest to prevent dirty environment.
1889 if (reset_flag == 1) {
1890 write_nic_byte(dev, rOFDM0_XAAGCCore1, 0x2c);
1891 write_nic_byte(dev, rOFDM0_XBAGCCore1, 0x2c);
1892 write_nic_byte(dev, rOFDM0_XCAGCCore1, 0x2c);
1893 write_nic_byte(dev, rOFDM0_XDAGCCore1, 0x2c);
1895 write_nic_byte(dev, rOFDM0_XAAGCCore1, 0x20);
1896 write_nic_byte(dev, rOFDM0_XBAGCCore1, 0x20);
1897 write_nic_byte(dev, rOFDM0_XCAGCCore1, 0x20);
1898 write_nic_byte(dev, rOFDM0_XDAGCCore1, 0x20);
1901 /* 2.2 Higher PD_TH for OFDM. */
1902 if (priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20) {
1904 * 2008/01/11 MH 40MHZ 90/92 register are not the same.
1905 * 2008/02/05 MH SD3-Jerry 92U/92E PD_TH are the same.
1907 write_nic_byte(dev, (rOFDM0_XATxAFE+3), 0x20);
1909 else if (priv->card_8192 == HARDWARE_TYPE_RTL8190P)
1910 write_nic_byte(dev, rOFDM0_RxDetector1, 0x42);
1911 else if (pAdapter->HardwareType == HARDWARE_TYPE_RTL8192E)
1913 PlatformEFIOWrite1Byte(pAdapter, rOFDM0_RxDetector1, 0x42);
1916 write_nic_byte(dev, rOFDM0_RxDetector1, 0x44);
1918 /* 2.3 Higher CS ratio for CCK. */
1919 write_nic_byte(dev, 0xa0a, 0xcd);
1923 * 2008/01/11 MH 90/92 series are the same.
1925 /*PlatformEFIOWrite4Byte(pAdapter, rOFDM0_ECCAThreshold, 0x346);*/
1928 rtl8192_setBBreg(dev, UFWP, bMaskByte1, 0x1); /* Only clear byte 1 and rewrite. */
1932 dm_ctrl_initgain_byrssi_highpwr(dev);
1934 } /* dm_CtrlInitGainByRssi */
1936 /*-----------------------------------------------------------------------------
1937 * Function: dm_ctrl_initgain_byrssi_highpwr()
1949 * 05/28/2008 amy Create Version 0 porting from windows code.
1951 *---------------------------------------------------------------------------*/
1952 static void dm_ctrl_initgain_byrssi_highpwr(
1953 struct net_device *dev)
1955 struct r8192_priv *priv = ieee80211_priv(dev);
1956 static u32 reset_cnt_highpwr;
1958 /* For smooth, we can not change high power DIG state in the range. */
1959 if ((priv->undecorated_smoothed_pwdb > dm_digtable.rssi_high_power_lowthresh) &&
1960 (priv->undecorated_smoothed_pwdb < dm_digtable.rssi_high_power_highthresh))
1964 * 3. When RSSI >75% or <70%, it is a high power issue. We have to judge if
1965 * it is larger than a threshold and then execute the step below.
1967 * 2008/02/05 MH SD3-Jerry Modify PD_TH for high power issue.
1969 if (priv->undecorated_smoothed_pwdb >= dm_digtable.rssi_high_power_highthresh) {
1970 if (dm_digtable.dig_highpwr_state == DM_STA_DIG_ON &&
1971 (priv->reset_count == reset_cnt_highpwr))
1973 dm_digtable.dig_highpwr_state = DM_STA_DIG_ON;
1975 /* 3.1 Higher PD_TH for OFDM for high power state. */
1976 if (priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20) {
1977 write_nic_byte(dev, (rOFDM0_XATxAFE+3), 0x10);
1979 /*else if (priv->card_8192 == HARDWARE_TYPE_RTL8190P)
1980 write_nic_byte(dev, rOFDM0_RxDetector1, 0x41);
1984 write_nic_byte(dev, rOFDM0_RxDetector1, 0x43);
1986 if (dm_digtable.dig_highpwr_state == DM_STA_DIG_OFF &&
1987 (priv->reset_count == reset_cnt_highpwr))
1989 dm_digtable.dig_highpwr_state = DM_STA_DIG_OFF;
1991 if (priv->undecorated_smoothed_pwdb < dm_digtable.rssi_high_power_lowthresh &&
1992 priv->undecorated_smoothed_pwdb >= dm_digtable.rssi_high_thresh) {
1993 /* 3.2 Recover PD_TH for OFDM for normal power region. */
1994 if (priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20) {
1995 write_nic_byte(dev, (rOFDM0_XATxAFE+3), 0x20);
1996 /*else if (priv->card_8192 == HARDWARE_TYPE_RTL8190P)
1997 write_nic_byte(dev, rOFDM0_RxDetector1, 0x42);
2001 write_nic_byte(dev, rOFDM0_RxDetector1, 0x44);
2005 reset_cnt_highpwr = priv->reset_count;
2007 } /* dm_CtrlInitGainByRssiHighPwr */
2009 static void dm_initial_gain(
2010 struct net_device *dev)
2012 struct r8192_priv *priv = ieee80211_priv(dev);
2013 u8 initial_gain = 0;
2014 static u8 initialized, force_write;
2015 static u32 reset_cnt;
2018 if (dm_digtable.dig_algorithm_switch) {
2023 if (dm_digtable.pre_connect_state == dm_digtable.cur_connect_state) {
2024 if (dm_digtable.cur_connect_state == DIG_CONNECT) {
2025 if ((dm_digtable.rssi_val+10-dm_digtable.backoff_val) > dm_digtable.rx_gain_range_max)
2026 dm_digtable.cur_ig_value = dm_digtable.rx_gain_range_max;
2027 else if ((dm_digtable.rssi_val+10-dm_digtable.backoff_val) < dm_digtable.rx_gain_range_min)
2028 dm_digtable.cur_ig_value = dm_digtable.rx_gain_range_min;
2030 dm_digtable.cur_ig_value = dm_digtable.rssi_val+10-dm_digtable.backoff_val;
2031 } else { /* current state is disconnected */
2032 if (dm_digtable.cur_ig_value == 0)
2033 dm_digtable.cur_ig_value = priv->DefaultInitialGain[0];
2035 dm_digtable.cur_ig_value = dm_digtable.pre_ig_value;
2037 } else { /* disconnected -> connected or connected -> disconnected */
2038 dm_digtable.cur_ig_value = priv->DefaultInitialGain[0];
2039 dm_digtable.pre_ig_value = 0;
2041 /*DbgPrint("DM_DigTable.CurIGValue = 0x%x, DM_DigTable.PreIGValue = 0x%x\n", DM_DigTable.CurIGValue, DM_DigTable.PreIGValue);*/
2043 /* if silent reset happened, we should rewrite the values back */
2044 if (priv->reset_count != reset_cnt) {
2046 reset_cnt = priv->reset_count;
2049 read_nic_byte(dev, rOFDM0_XAAGCCore1, &tmp);
2050 if (dm_digtable.pre_ig_value != tmp)
2054 if ((dm_digtable.pre_ig_value != dm_digtable.cur_ig_value)
2055 || !initialized || force_write) {
2056 initial_gain = (u8)dm_digtable.cur_ig_value;
2057 /*DbgPrint("Write initial gain = 0x%x\n", initial_gain);*/
2058 /* Set initial gain. */
2059 write_nic_byte(dev, rOFDM0_XAAGCCore1, initial_gain);
2060 write_nic_byte(dev, rOFDM0_XBAGCCore1, initial_gain);
2061 write_nic_byte(dev, rOFDM0_XCAGCCore1, initial_gain);
2062 write_nic_byte(dev, rOFDM0_XDAGCCore1, initial_gain);
2063 dm_digtable.pre_ig_value = dm_digtable.cur_ig_value;
2070 static void dm_pd_th(
2071 struct net_device *dev)
2073 struct r8192_priv *priv = ieee80211_priv(dev);
2074 static u8 initialized, force_write;
2075 static u32 reset_cnt;
2077 if (dm_digtable.dig_algorithm_switch) {
2082 if (dm_digtable.pre_connect_state == dm_digtable.cur_connect_state) {
2083 if (dm_digtable.cur_connect_state == DIG_CONNECT) {
2084 if (dm_digtable.rssi_val >= dm_digtable.rssi_high_power_highthresh)
2085 dm_digtable.curpd_thstate = DIG_PD_AT_HIGH_POWER;
2086 else if (dm_digtable.rssi_val <= dm_digtable.rssi_low_thresh)
2087 dm_digtable.curpd_thstate = DIG_PD_AT_LOW_POWER;
2088 else if ((dm_digtable.rssi_val >= dm_digtable.rssi_high_thresh) &&
2089 (dm_digtable.rssi_val < dm_digtable.rssi_high_power_lowthresh))
2090 dm_digtable.curpd_thstate = DIG_PD_AT_NORMAL_POWER;
2092 dm_digtable.curpd_thstate = dm_digtable.prepd_thstate;
2094 dm_digtable.curpd_thstate = DIG_PD_AT_LOW_POWER;
2096 } else { /* disconnected -> connected or connected -> disconnected */
2097 dm_digtable.curpd_thstate = DIG_PD_AT_LOW_POWER;
2100 /* if silent reset happened, we should rewrite the values back */
2101 if (priv->reset_count != reset_cnt) {
2103 reset_cnt = priv->reset_count;
2107 if ((dm_digtable.prepd_thstate != dm_digtable.curpd_thstate) ||
2108 (initialized <= 3) || force_write) {
2109 /*DbgPrint("Write PD_TH state = %d\n", DM_DigTable.CurPD_THState);*/
2110 if (dm_digtable.curpd_thstate == DIG_PD_AT_LOW_POWER) {
2111 /* Lower PD_TH for OFDM. */
2112 if (priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20) {
2114 * 2008/01/11 MH 40MHZ 90/92 register are not the same.
2115 * 2008/02/05 MH SD3-Jerry 92U/92E PD_TH are the same.
2117 write_nic_byte(dev, (rOFDM0_XATxAFE+3), 0x00);
2118 /*else if (priv->card_8192 == HARDWARE_TYPE_RTL8190P)
2119 write_nic_byte(dev, rOFDM0_RxDetector1, 0x40);
2122 write_nic_byte(dev, rOFDM0_RxDetector1, 0x42);
2123 } else if (dm_digtable.curpd_thstate == DIG_PD_AT_NORMAL_POWER) {
2124 /* Higher PD_TH for OFDM. */
2125 if (priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20) {
2127 * 2008/01/11 MH 40MHZ 90/92 register are not the same.
2128 * 2008/02/05 MH SD3-Jerry 92U/92E PD_TH are the same.
2130 write_nic_byte(dev, (rOFDM0_XATxAFE+3), 0x20);
2131 /*else if (priv->card_8192 == HARDWARE_TYPE_RTL8190P)
2132 write_nic_byte(dev, rOFDM0_RxDetector1, 0x42);
2135 write_nic_byte(dev, rOFDM0_RxDetector1, 0x44);
2136 } else if (dm_digtable.curpd_thstate == DIG_PD_AT_HIGH_POWER) {
2137 /* Higher PD_TH for OFDM for high power state. */
2138 if (priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20) {
2139 write_nic_byte(dev, (rOFDM0_XATxAFE+3), 0x10);
2140 /*else if (priv->card_8192 == HARDWARE_TYPE_RTL8190P)
2141 write_nic_byte(dev, rOFDM0_RxDetector1, 0x41);
2144 write_nic_byte(dev, rOFDM0_RxDetector1, 0x43);
2146 dm_digtable.prepd_thstate = dm_digtable.curpd_thstate;
2147 if (initialized <= 3)
2154 static void dm_cs_ratio(
2155 struct net_device *dev)
2157 struct r8192_priv *priv = ieee80211_priv(dev);
2158 static u8 initialized, force_write;
2159 static u32 reset_cnt;
2161 if (dm_digtable.dig_algorithm_switch) {
2166 if (dm_digtable.pre_connect_state == dm_digtable.cur_connect_state) {
2167 if (dm_digtable.cur_connect_state == DIG_CONNECT) {
2168 if (dm_digtable.rssi_val <= dm_digtable.rssi_low_thresh)
2169 dm_digtable.curcs_ratio_state = DIG_CS_RATIO_LOWER;
2170 else if (dm_digtable.rssi_val >= dm_digtable.rssi_high_thresh)
2171 dm_digtable.curcs_ratio_state = DIG_CS_RATIO_HIGHER;
2173 dm_digtable.curcs_ratio_state = dm_digtable.precs_ratio_state;
2175 dm_digtable.curcs_ratio_state = DIG_CS_RATIO_LOWER;
2177 } else /* disconnected -> connected or connected -> disconnected */
2178 dm_digtable.curcs_ratio_state = DIG_CS_RATIO_LOWER;
2180 /* if silent reset happened, we should rewrite the values back */
2181 if (priv->reset_count != reset_cnt) {
2183 reset_cnt = priv->reset_count;
2187 if ((dm_digtable.precs_ratio_state != dm_digtable.curcs_ratio_state) ||
2188 !initialized || force_write) {
2189 /*DbgPrint("Write CS_ratio state = %d\n", DM_DigTable.CurCS_ratioState);*/
2190 if (dm_digtable.curcs_ratio_state == DIG_CS_RATIO_LOWER) {
2191 /* Lower CS ratio for CCK. */
2192 write_nic_byte(dev, 0xa0a, 0x08);
2193 } else if (dm_digtable.curcs_ratio_state == DIG_CS_RATIO_HIGHER) {
2194 /* Higher CS ratio for CCK. */
2195 write_nic_byte(dev, 0xa0a, 0xcd);
2197 dm_digtable.precs_ratio_state = dm_digtable.curcs_ratio_state;
2204 void dm_init_edca_turbo(struct net_device *dev)
2206 struct r8192_priv *priv = ieee80211_priv(dev);
2208 priv->bcurrent_turbo_EDCA = false;
2209 priv->ieee80211->bis_any_nonbepkts = false;
2210 priv->bis_cur_rdlstate = false;
2211 } /* dm_init_edca_turbo */
2213 static void dm_check_edca_turbo(
2214 struct net_device *dev)
2216 struct r8192_priv *priv = ieee80211_priv(dev);
2217 PRT_HIGH_THROUGHPUT pHTInfo = priv->ieee80211->pHTInfo;
2218 /*PSTA_QOS pStaQos = pMgntInfo->pStaQos;*/
2220 /* Keep past Tx/Rx packet count for RT-to-RT EDCA turbo. */
2221 static unsigned long lastTxOkCnt;
2222 static unsigned long lastRxOkCnt;
2223 unsigned long curTxOkCnt = 0;
2224 unsigned long curRxOkCnt = 0;
2227 * Do not be Turbo if it's under WiFi config and Qos Enabled, because the EDCA parameters
2228 * should follow the settings from QAP. By Bruce, 2007-12-07.
2230 if (priv->ieee80211->state != IEEE80211_LINKED)
2231 goto dm_CheckEdcaTurbo_EXIT;
2232 /* We do not turn on EDCA turbo mode for some AP that has IOT issue */
2233 if (priv->ieee80211->pHTInfo->IOTAction & HT_IOT_ACT_DISABLE_EDCA_TURBO)
2234 goto dm_CheckEdcaTurbo_EXIT;
2236 /*printk("========>%s():bis_any_nonbepkts is %d\n", __func__, priv->bis_any_nonbepkts);*/
2237 /* Check the status for current condition. */
2238 if (!priv->ieee80211->bis_any_nonbepkts) {
2239 curTxOkCnt = priv->stats.txbytesunicast - lastTxOkCnt;
2240 curRxOkCnt = priv->stats.rxbytesunicast - lastRxOkCnt;
2241 /* For RT-AP, we needs to turn it on when Rx>Tx */
2242 if (curRxOkCnt > 4*curTxOkCnt) {
2243 /*printk("%s():curRxOkCnt > 4*curTxOkCnt\n");*/
2244 if (!priv->bis_cur_rdlstate || !priv->bcurrent_turbo_EDCA) {
2245 write_nic_dword(dev, EDCAPARA_BE, edca_setting_DL[pHTInfo->IOTPeer]);
2246 priv->bis_cur_rdlstate = true;
2249 /*printk("%s():curRxOkCnt < 4*curTxOkCnt\n");*/
2250 if (priv->bis_cur_rdlstate || !priv->bcurrent_turbo_EDCA) {
2251 write_nic_dword(dev, EDCAPARA_BE, edca_setting_UL[pHTInfo->IOTPeer]);
2252 priv->bis_cur_rdlstate = false;
2257 priv->bcurrent_turbo_EDCA = true;
2260 * Turn Off EDCA turbo here.
2261 * Restore original EDCA according to the declaration of AP.
2263 if (priv->bcurrent_turbo_EDCA) {
2267 struct ieee80211_qos_parameters *qos_parameters = &priv->ieee80211->current_network.qos_data.parameters;
2268 u8 mode = priv->ieee80211->mode;
2270 /* For Each time updating EDCA parameter, reset EDCA turbo mode status. */
2271 dm_init_edca_turbo(dev);
2272 u1bAIFS = qos_parameters->aifs[0] * ((mode&(IEEE_G|IEEE_N_24G)) ? 9 : 20) + aSifsTime;
2273 u4bAcParam = ((((u32)(qos_parameters->tx_op_limit[0])) << AC_PARAM_TXOP_LIMIT_OFFSET)|
2274 (((u32)(qos_parameters->cw_max[0])) << AC_PARAM_ECW_MAX_OFFSET)|
2275 (((u32)(qos_parameters->cw_min[0])) << AC_PARAM_ECW_MIN_OFFSET)|
2276 ((u32)u1bAIFS << AC_PARAM_AIFS_OFFSET));
2277 /*write_nic_dword(dev, WDCAPARA_ADD[i], u4bAcParam);*/
2278 write_nic_dword(dev, EDCAPARA_BE, u4bAcParam);
2282 * If it is set, immediately set ACM control bit to downgrading AC for passing WMM testplan. Annie, 2005-12-13.
2285 /* TODO: Modified this part and try to set acm control in only 1 IO processing!! */
2287 PACI_AIFSN pAciAifsn = (PACI_AIFSN)&(qos_parameters->aifs[0]);
2290 read_nic_byte(dev, AcmHwCtrl, &AcmCtrl);
2292 if (pAciAifsn->f.ACM) { /* ACM bit is 1. */
2293 AcmCtrl |= AcmHw_BeqEn;
2294 } else { /* ACM bit is 0. */
2295 AcmCtrl &= (~AcmHw_BeqEn);
2298 RT_TRACE(COMP_QOS, "SetHwReg8190pci(): [HW_VAR_ACM_CTRL] Write 0x%X\n", AcmCtrl);
2299 write_nic_byte(dev, AcmHwCtrl, AcmCtrl);
2302 priv->bcurrent_turbo_EDCA = false;
2306 dm_CheckEdcaTurbo_EXIT:
2307 /* Set variables for next time. */
2308 priv->ieee80211->bis_any_nonbepkts = false;
2309 lastTxOkCnt = priv->stats.txbytesunicast;
2310 lastRxOkCnt = priv->stats.rxbytesunicast;
2311 } /* dm_CheckEdcaTurbo */
2313 static void dm_init_ctstoself(struct net_device *dev)
2315 struct r8192_priv *priv = ieee80211_priv((struct net_device *)dev);
2317 priv->ieee80211->bCTSToSelfEnable = TRUE;
2318 priv->ieee80211->CTSToSelfTH = CTSToSelfTHVal;
2321 static void dm_ctstoself(struct net_device *dev)
2323 struct r8192_priv *priv = ieee80211_priv((struct net_device *)dev);
2324 PRT_HIGH_THROUGHPUT pHTInfo = priv->ieee80211->pHTInfo;
2325 static unsigned long lastTxOkCnt;
2326 static unsigned long lastRxOkCnt;
2327 unsigned long curTxOkCnt = 0;
2328 unsigned long curRxOkCnt = 0;
2330 if (priv->ieee80211->bCTSToSelfEnable != TRUE) {
2331 pHTInfo->IOTAction &= ~HT_IOT_ACT_FORCED_CTS2SELF;
2336 2. Linksys350/Linksys300N
2337 3. <50 disable, >55 enable
2340 if (pHTInfo->IOTPeer == HT_IOT_PEER_BROADCOM) {
2341 curTxOkCnt = priv->stats.txbytesunicast - lastTxOkCnt;
2342 curRxOkCnt = priv->stats.rxbytesunicast - lastRxOkCnt;
2343 if (curRxOkCnt > 4*curTxOkCnt) { /* downlink, disable CTS to self */
2344 pHTInfo->IOTAction &= ~HT_IOT_ACT_FORCED_CTS2SELF;
2345 /*DbgPrint("dm_CTSToSelf() ==> CTS to self disabled -- downlink\n");*/
2346 } else { /* uplink */
2347 pHTInfo->IOTAction |= HT_IOT_ACT_FORCED_CTS2SELF;
2350 lastTxOkCnt = priv->stats.txbytesunicast;
2351 lastRxOkCnt = priv->stats.rxbytesunicast;
2355 /*-----------------------------------------------------------------------------
2356 * Function: dm_check_pbc_gpio()
2358 * Overview: Check if PBC button is pressed.
2368 * 05/28/2008 amy Create Version 0 porting from windows code.
2370 *---------------------------------------------------------------------------*/
2371 static void dm_check_pbc_gpio(struct net_device *dev)
2373 struct r8192_priv *priv = ieee80211_priv(dev);
2376 read_nic_byte(dev, GPI, &tmp1byte);
2377 if (tmp1byte == 0xff)
2380 if (tmp1byte&BIT6 || tmp1byte&BIT0) {
2382 * Here we only set bPbcPressed to TRUE
2383 * After trigger PBC, the variable will be set to FALSE
2385 RT_TRACE(COMP_IO, "CheckPbcGPIO - PBC is pressed\n");
2386 priv->bpbc_pressed = true;
2391 /*-----------------------------------------------------------------------------
2392 * Function: DM_RFPathCheckWorkItemCallBack()
2394 * Overview: Check if Current RF RX path is enabled
2404 * 01/30/2008 MHC Create Version 0.
2406 *---------------------------------------------------------------------------*/
2407 void dm_rf_pathcheck_workitemcallback(struct work_struct *work)
2409 struct delayed_work *dwork = container_of(work, struct delayed_work, work);
2410 struct r8192_priv *priv = container_of(dwork, struct r8192_priv, rfpath_check_wq);
2411 struct net_device *dev = priv->ieee80211->dev;
2412 /*bool bactually_set = false;*/
2415 /* 2008/01/30 MH After discussing with SD3 Jerry, 0xc04/0xd04 register will
2416 always be the same. We only read 0xc04 now. */
2417 read_nic_byte(dev, 0xc04, &rfpath);
2419 /* Check Bit 0-3, it means if RF A-D is enabled. */
2420 for (i = 0; i < RF90_PATH_MAX; i++) {
2421 if (rfpath & (0x01<<i))
2422 priv->brfpath_rxenable[i] = 1;
2424 priv->brfpath_rxenable[i] = 0;
2426 if (!DM_RxPathSelTable.Enable)
2429 dm_rxpath_sel_byrssi(dev);
2430 } /* DM_RFPathCheckWorkItemCallBack */
2432 static void dm_init_rxpath_selection(struct net_device *dev)
2435 struct r8192_priv *priv = ieee80211_priv(dev);
2437 DM_RxPathSelTable.Enable = 1; /* default enabled */
2438 DM_RxPathSelTable.SS_TH_low = RxPathSelection_SS_TH_low;
2439 DM_RxPathSelTable.diff_TH = RxPathSelection_diff_TH;
2440 if (priv->CustomerID == RT_CID_819x_Netcore)
2441 DM_RxPathSelTable.cck_method = CCK_Rx_Version_2;
2443 DM_RxPathSelTable.cck_method = CCK_Rx_Version_1;
2444 DM_RxPathSelTable.DbgMode = DM_DBG_OFF;
2445 DM_RxPathSelTable.disabledRF = 0;
2446 for (i = 0; i < 4; i++) {
2447 DM_RxPathSelTable.rf_rssi[i] = 50;
2448 DM_RxPathSelTable.cck_pwdb_sta[i] = -64;
2449 DM_RxPathSelTable.rf_enable_rssi_th[i] = 100;
2453 static void dm_rxpath_sel_byrssi(struct net_device *dev)
2455 struct r8192_priv *priv = ieee80211_priv(dev);
2456 u8 i, max_rssi_index = 0, min_rssi_index = 0, sec_rssi_index = 0, rf_num = 0;
2457 u8 tmp_max_rssi = 0, tmp_min_rssi = 0, tmp_sec_rssi = 0;
2458 u8 cck_default_Rx = 0x2; /* RF-C */
2459 u8 cck_optional_Rx = 0x3; /* RF-D */
2460 long tmp_cck_max_pwdb = 0, tmp_cck_min_pwdb = 0, tmp_cck_sec_pwdb = 0;
2461 u8 cck_rx_ver2_max_index = 0, cck_rx_ver2_min_index = 0, cck_rx_ver2_sec_index = 0;
2464 static u8 disabled_rf_cnt, cck_Rx_Path_initialized;
2465 u8 update_cck_rx_path;
2467 if (priv->rf_type != RF_2T4R)
2470 if (!cck_Rx_Path_initialized) {
2471 read_nic_byte(dev, 0xa07, &DM_RxPathSelTable.cck_Rx_path);
2472 DM_RxPathSelTable.cck_Rx_path &= 0xf;
2473 cck_Rx_Path_initialized = 1;
2476 read_nic_byte(dev, 0xc04, &DM_RxPathSelTable.disabledRF);
2477 DM_RxPathSelTable.disabledRF = ~DM_RxPathSelTable.disabledRF & 0xf;
2479 if (priv->ieee80211->mode == WIRELESS_MODE_B) {
2480 DM_RxPathSelTable.cck_method = CCK_Rx_Version_2; /* pure B mode, fixed cck version2 */
2481 /*DbgPrint("Pure B mode, use cck rx version2\n");*/
2484 /* decide max/sec/min rssi index */
2485 for (i = 0; i < RF90_PATH_MAX; i++) {
2486 if (!DM_RxPathSelTable.DbgMode)
2487 DM_RxPathSelTable.rf_rssi[i] = priv->stats.rx_rssi_percentage[i];
2489 if (priv->brfpath_rxenable[i]) {
2491 cur_rf_rssi = DM_RxPathSelTable.rf_rssi[i];
2493 if (rf_num == 1) { /* find first enabled rf path and the rssi values */
2494 /* initialize, set all rssi index to the same one */
2495 max_rssi_index = min_rssi_index = sec_rssi_index = i;
2496 tmp_max_rssi = tmp_min_rssi = tmp_sec_rssi = cur_rf_rssi;
2497 } else if (rf_num == 2) { /* we pick up the max index first, and let sec and min to be the same one */
2498 if (cur_rf_rssi >= tmp_max_rssi) {
2499 tmp_max_rssi = cur_rf_rssi;
2502 tmp_sec_rssi = tmp_min_rssi = cur_rf_rssi;
2503 sec_rssi_index = min_rssi_index = i;
2506 if (cur_rf_rssi > tmp_max_rssi) {
2507 tmp_sec_rssi = tmp_max_rssi;
2508 sec_rssi_index = max_rssi_index;
2509 tmp_max_rssi = cur_rf_rssi;
2511 } else if (cur_rf_rssi == tmp_max_rssi) { /* let sec and min point to the different index */
2512 tmp_sec_rssi = cur_rf_rssi;
2514 } else if ((cur_rf_rssi < tmp_max_rssi) && (cur_rf_rssi > tmp_sec_rssi)) {
2515 tmp_sec_rssi = cur_rf_rssi;
2517 } else if (cur_rf_rssi == tmp_sec_rssi) {
2518 if (tmp_sec_rssi == tmp_min_rssi) {
2519 /* let sec and min point to the different index */
2520 tmp_sec_rssi = cur_rf_rssi;
2523 /* This case we don't need to set any index */
2525 } else if ((cur_rf_rssi < tmp_sec_rssi) && (cur_rf_rssi > tmp_min_rssi)) {
2526 /* This case we don't need to set any index */
2527 } else if (cur_rf_rssi == tmp_min_rssi) {
2528 if (tmp_sec_rssi == tmp_min_rssi) {
2529 /* let sec and min point to the different index */
2530 tmp_min_rssi = cur_rf_rssi;
2533 /* This case we don't need to set any index */
2535 } else if (cur_rf_rssi < tmp_min_rssi) {
2536 tmp_min_rssi = cur_rf_rssi;
2544 /* decide max/sec/min cck pwdb index */
2545 if (DM_RxPathSelTable.cck_method == CCK_Rx_Version_2) {
2546 for (i = 0; i < RF90_PATH_MAX; i++) {
2547 if (priv->brfpath_rxenable[i]) {
2549 cur_cck_pwdb = DM_RxPathSelTable.cck_pwdb_sta[i];
2551 if (rf_num == 1) { /* find first enabled rf path and the rssi values */
2552 /* initialize, set all rssi index to the same one */
2553 cck_rx_ver2_max_index = cck_rx_ver2_min_index = cck_rx_ver2_sec_index = i;
2554 tmp_cck_max_pwdb = tmp_cck_min_pwdb = tmp_cck_sec_pwdb = cur_cck_pwdb;
2555 } else if (rf_num == 2) { /* we pick up the max index first, and let sec and min to be the same one */
2556 if (cur_cck_pwdb >= tmp_cck_max_pwdb) {
2557 tmp_cck_max_pwdb = cur_cck_pwdb;
2558 cck_rx_ver2_max_index = i;
2560 tmp_cck_sec_pwdb = tmp_cck_min_pwdb = cur_cck_pwdb;
2561 cck_rx_ver2_sec_index = cck_rx_ver2_min_index = i;
2564 if (cur_cck_pwdb > tmp_cck_max_pwdb) {
2565 tmp_cck_sec_pwdb = tmp_cck_max_pwdb;
2566 cck_rx_ver2_sec_index = cck_rx_ver2_max_index;
2567 tmp_cck_max_pwdb = cur_cck_pwdb;
2568 cck_rx_ver2_max_index = i;
2569 } else if (cur_cck_pwdb == tmp_cck_max_pwdb) {
2570 /* let sec and min point to the different index */
2571 tmp_cck_sec_pwdb = cur_cck_pwdb;
2572 cck_rx_ver2_sec_index = i;
2573 } else if ((cur_cck_pwdb < tmp_cck_max_pwdb) && (cur_cck_pwdb > tmp_cck_sec_pwdb)) {
2574 tmp_cck_sec_pwdb = cur_cck_pwdb;
2575 cck_rx_ver2_sec_index = i;
2576 } else if (cur_cck_pwdb == tmp_cck_sec_pwdb && tmp_cck_sec_pwdb == tmp_cck_min_pwdb) {
2577 /* let sec and min point to the different index */
2578 tmp_cck_sec_pwdb = cur_cck_pwdb;
2579 cck_rx_ver2_sec_index = i;
2580 /* otherwise we don't need to set any index */
2581 } else if ((cur_cck_pwdb < tmp_cck_sec_pwdb) && (cur_cck_pwdb > tmp_cck_min_pwdb)) {
2582 /* This case we don't need to set any index */
2583 } else if (cur_cck_pwdb == tmp_cck_min_pwdb && tmp_cck_sec_pwdb == tmp_cck_min_pwdb) {
2584 /* let sec and min point to the different index */
2585 tmp_cck_min_pwdb = cur_cck_pwdb;
2586 cck_rx_ver2_min_index = i;
2587 /* otherwise we don't need to set any index */
2588 } else if (cur_cck_pwdb < tmp_cck_min_pwdb) {
2589 tmp_cck_min_pwdb = cur_cck_pwdb;
2590 cck_rx_ver2_min_index = i;
2600 * reg0xA07[3:2]=cck default rx path, reg0xa07[1:0]=cck optional rx path.
2602 update_cck_rx_path = 0;
2603 if (DM_RxPathSelTable.cck_method == CCK_Rx_Version_2) {
2604 cck_default_Rx = cck_rx_ver2_max_index;
2605 cck_optional_Rx = cck_rx_ver2_sec_index;
2606 if (tmp_cck_max_pwdb != -64)
2607 update_cck_rx_path = 1;
2610 if (tmp_min_rssi < DM_RxPathSelTable.SS_TH_low && disabled_rf_cnt < 2) {
2611 if ((tmp_max_rssi - tmp_min_rssi) >= DM_RxPathSelTable.diff_TH) {
2612 /* record the enabled rssi threshold */
2613 DM_RxPathSelTable.rf_enable_rssi_th[min_rssi_index] = tmp_max_rssi+5;
2614 /* disable the BB Rx path, OFDM */
2615 rtl8192_setBBreg(dev, rOFDM0_TRxPathEnable, 0x1<<min_rssi_index, 0x0); /* 0xc04[3:0] */
2616 rtl8192_setBBreg(dev, rOFDM1_TRxPathEnable, 0x1<<min_rssi_index, 0x0); /* 0xd04[3:0] */
2619 if (DM_RxPathSelTable.cck_method == CCK_Rx_Version_1) {
2620 cck_default_Rx = max_rssi_index;
2621 cck_optional_Rx = sec_rssi_index;
2623 update_cck_rx_path = 1;
2627 if (update_cck_rx_path) {
2628 DM_RxPathSelTable.cck_Rx_path = (cck_default_Rx<<2)|(cck_optional_Rx);
2629 rtl8192_setBBreg(dev, rCCK0_AFESetting, 0x0f000000, DM_RxPathSelTable.cck_Rx_path);
2632 if (DM_RxPathSelTable.disabledRF) {
2633 for (i = 0; i < 4; i++) {
2634 if ((DM_RxPathSelTable.disabledRF>>i) & 0x1) { /* disabled rf */
2635 if (tmp_max_rssi >= DM_RxPathSelTable.rf_enable_rssi_th[i]) {
2636 /* enable the BB Rx path */
2637 /*DbgPrint("RF-%d is enabled.\n", 0x1<<i);*/
2638 rtl8192_setBBreg(dev, rOFDM0_TRxPathEnable, 0x1<<i, 0x1); /* 0xc04[3:0] */
2639 rtl8192_setBBreg(dev, rOFDM1_TRxPathEnable, 0x1<<i, 0x1); /* 0xd04[3:0] */
2640 DM_RxPathSelTable.rf_enable_rssi_th[i] = 100;
2648 /*-----------------------------------------------------------------------------
2649 * Function: dm_check_rx_path_selection()
2651 * Overview: Call a workitem to check current RXRF path and Rx Path selection by RSSI.
2661 * 05/28/2008 amy Create Version 0 porting from windows code.
2663 *---------------------------------------------------------------------------*/
2664 static void dm_check_rx_path_selection(struct net_device *dev)
2666 struct r8192_priv *priv = ieee80211_priv(dev);
2668 queue_delayed_work(priv->priv_wq, &priv->rfpath_check_wq, 0);
2669 } /* dm_CheckRxRFPath */
2671 static void dm_init_fsync(struct net_device *dev)
2673 struct r8192_priv *priv = ieee80211_priv(dev);
2675 priv->ieee80211->fsync_time_interval = 500;
2676 priv->ieee80211->fsync_rate_bitmap = 0x0f000800;
2677 priv->ieee80211->fsync_rssi_threshold = 30;
2678 priv->ieee80211->bfsync_enable = false;
2679 priv->ieee80211->fsync_multiple_timeinterval = 3;
2680 priv->ieee80211->fsync_firstdiff_ratethreshold = 100;
2681 priv->ieee80211->fsync_seconddiff_ratethreshold = 200;
2682 priv->ieee80211->fsync_state = Default_Fsync;
2683 priv->framesyncMonitor = 1; /* current default 0xc38 monitor on */
2685 init_timer(&priv->fsync_timer);
2686 priv->fsync_timer.data = (unsigned long)dev;
2687 priv->fsync_timer.function = dm_fsync_timer_callback;
2690 static void dm_deInit_fsync(struct net_device *dev)
2692 struct r8192_priv *priv = ieee80211_priv(dev);
2694 del_timer_sync(&priv->fsync_timer);
2697 void dm_fsync_timer_callback(unsigned long data)
2699 struct net_device *dev = (struct net_device *)data;
2700 struct r8192_priv *priv = ieee80211_priv((struct net_device *)data);
2701 u32 rate_index, rate_count = 0, rate_count_diff = 0;
2702 bool bSwitchFromCountDiff = false;
2703 bool bDoubleTimeInterval = false;
2705 if (priv->ieee80211->state == IEEE80211_LINKED &&
2706 priv->ieee80211->bfsync_enable &&
2707 (priv->ieee80211->pHTInfo->IOTAction & HT_IOT_ACT_CDD_FSYNC)) {
2708 /* Count rate 54, MCS [7], [12, 13, 14, 15] */
2711 for (rate_index = 0; rate_index <= 27; rate_index++) {
2712 rate_bitmap = 1 << rate_index;
2713 if (priv->ieee80211->fsync_rate_bitmap & rate_bitmap)
2714 rate_count += priv->stats.received_rate_histogram[1][rate_index];
2717 if (rate_count < priv->rate_record)
2718 rate_count_diff = 0xffffffff - rate_count + priv->rate_record;
2720 rate_count_diff = rate_count - priv->rate_record;
2721 if (rate_count_diff < priv->rateCountDiffRecord) {
2722 u32 DiffNum = priv->rateCountDiffRecord - rate_count_diff;
2723 /* Continue count */
2724 if (DiffNum >= priv->ieee80211->fsync_seconddiff_ratethreshold)
2725 priv->ContinueDiffCount++;
2727 priv->ContinueDiffCount = 0;
2729 /* Continue count over */
2730 if (priv->ContinueDiffCount >= 2) {
2731 bSwitchFromCountDiff = true;
2732 priv->ContinueDiffCount = 0;
2735 /* Stop the continued count */
2736 priv->ContinueDiffCount = 0;
2739 /* If Count diff <= FsyncRateCountThreshold */
2740 if (rate_count_diff <= priv->ieee80211->fsync_firstdiff_ratethreshold) {
2741 bSwitchFromCountDiff = true;
2742 priv->ContinueDiffCount = 0;
2744 priv->rate_record = rate_count;
2745 priv->rateCountDiffRecord = rate_count_diff;
2746 RT_TRACE(COMP_HALDM, "rateRecord %d rateCount %d, rateCountdiff %d bSwitchFsync %d\n", priv->rate_record, rate_count, rate_count_diff, priv->bswitch_fsync);
2747 /* if we never receive those mcs rate and rssi > 30 % then switch fsyn */
2748 if (priv->undecorated_smoothed_pwdb > priv->ieee80211->fsync_rssi_threshold && bSwitchFromCountDiff) {
2749 bDoubleTimeInterval = true;
2750 priv->bswitch_fsync = !priv->bswitch_fsync;
2751 if (priv->bswitch_fsync) {
2752 write_nic_byte(dev, 0xC36, 0x1c);
2753 write_nic_byte(dev, 0xC3e, 0x90);
2755 write_nic_byte(dev, 0xC36, 0x5c);
2756 write_nic_byte(dev, 0xC3e, 0x96);
2758 } else if (priv->undecorated_smoothed_pwdb <= priv->ieee80211->fsync_rssi_threshold) {
2759 if (priv->bswitch_fsync) {
2760 priv->bswitch_fsync = false;
2761 write_nic_byte(dev, 0xC36, 0x5c);
2762 write_nic_byte(dev, 0xC3e, 0x96);
2765 if (bDoubleTimeInterval) {
2766 if (timer_pending(&priv->fsync_timer))
2767 del_timer_sync(&priv->fsync_timer);
2768 priv->fsync_timer.expires = jiffies + MSECS(priv->ieee80211->fsync_time_interval*priv->ieee80211->fsync_multiple_timeinterval);
2769 add_timer(&priv->fsync_timer);
2771 if (timer_pending(&priv->fsync_timer))
2772 del_timer_sync(&priv->fsync_timer);
2773 priv->fsync_timer.expires = jiffies + MSECS(priv->ieee80211->fsync_time_interval);
2774 add_timer(&priv->fsync_timer);
2777 /* Let Register return to default value; */
2778 if (priv->bswitch_fsync) {
2779 priv->bswitch_fsync = false;
2780 write_nic_byte(dev, 0xC36, 0x5c);
2781 write_nic_byte(dev, 0xC3e, 0x96);
2783 priv->ContinueDiffCount = 0;
2784 write_nic_dword(dev, rOFDM0_RxDetector2, 0x465c52cd);
2786 RT_TRACE(COMP_HALDM, "ContinueDiffCount %d\n", priv->ContinueDiffCount);
2787 RT_TRACE(COMP_HALDM, "rateRecord %d rateCount %d, rateCountdiff %d bSwitchFsync %d\n", priv->rate_record, rate_count, rate_count_diff, priv->bswitch_fsync);
2790 static void dm_StartHWFsync(struct net_device *dev)
2792 RT_TRACE(COMP_HALDM, "%s\n", __func__);
2793 write_nic_dword(dev, rOFDM0_RxDetector2, 0x465c12cf);
2794 write_nic_byte(dev, 0xc3b, 0x41);
2797 static void dm_EndSWFsync(struct net_device *dev)
2799 struct r8192_priv *priv = ieee80211_priv(dev);
2801 RT_TRACE(COMP_HALDM, "%s\n", __func__);
2802 del_timer_sync(&(priv->fsync_timer));
2804 /* Let Register return to default value; */
2805 if (priv->bswitch_fsync) {
2806 priv->bswitch_fsync = false;
2808 write_nic_byte(dev, 0xC36, 0x5c);
2810 write_nic_byte(dev, 0xC3e, 0x96);
2813 priv->ContinueDiffCount = 0;
2814 write_nic_dword(dev, rOFDM0_RxDetector2, 0x465c52cd);
2818 static void dm_StartSWFsync(struct net_device *dev)
2820 struct r8192_priv *priv = ieee80211_priv(dev);
2824 RT_TRACE(COMP_HALDM, "%s\n", __func__);
2825 /* Initial rate record to zero, start to record. */
2826 priv->rate_record = 0;
2827 /* Initialize continue diff count to zero, start to record. */
2828 priv->ContinueDiffCount = 0;
2829 priv->rateCountDiffRecord = 0;
2830 priv->bswitch_fsync = false;
2832 if (priv->ieee80211->mode == WIRELESS_MODE_N_24G) {
2833 priv->ieee80211->fsync_firstdiff_ratethreshold = 600;
2834 priv->ieee80211->fsync_seconddiff_ratethreshold = 0xffff;
2836 priv->ieee80211->fsync_firstdiff_ratethreshold = 200;
2837 priv->ieee80211->fsync_seconddiff_ratethreshold = 200;
2839 for (rateIndex = 0; rateIndex <= 27; rateIndex++) {
2840 rateBitmap = 1 << rateIndex;
2841 if (priv->ieee80211->fsync_rate_bitmap & rateBitmap)
2842 priv->rate_record += priv->stats.received_rate_histogram[1][rateIndex];
2844 if (timer_pending(&priv->fsync_timer))
2845 del_timer_sync(&priv->fsync_timer);
2846 priv->fsync_timer.expires = jiffies + MSECS(priv->ieee80211->fsync_time_interval);
2847 add_timer(&priv->fsync_timer);
2849 write_nic_dword(dev, rOFDM0_RxDetector2, 0x465c12cd);
2853 static void dm_EndHWFsync(struct net_device *dev)
2855 RT_TRACE(COMP_HALDM, "%s\n", __func__);
2856 write_nic_dword(dev, rOFDM0_RxDetector2, 0x465c52cd);
2857 write_nic_byte(dev, 0xc3b, 0x49);
2861 void dm_check_fsync(struct net_device *dev)
2863 #define RegC38_Default 0
2864 #define RegC38_NonFsync_Other_AP 1
2865 #define RegC38_Fsync_AP_BCM 2
2866 struct r8192_priv *priv = ieee80211_priv(dev);
2867 /*u32 framesyncC34;*/
2868 static u8 reg_c38_State = RegC38_Default;
2869 static u32 reset_cnt;
2871 RT_TRACE(COMP_HALDM, "RSSI %d TimeInterval %d MultipleTimeInterval %d\n", priv->ieee80211->fsync_rssi_threshold, priv->ieee80211->fsync_time_interval, priv->ieee80211->fsync_multiple_timeinterval);
2872 RT_TRACE(COMP_HALDM, "RateBitmap 0x%x FirstDiffRateThreshold %d SecondDiffRateThreshold %d\n", priv->ieee80211->fsync_rate_bitmap, priv->ieee80211->fsync_firstdiff_ratethreshold, priv->ieee80211->fsync_seconddiff_ratethreshold);
2874 if (priv->ieee80211->state == IEEE80211_LINKED &&
2875 (priv->ieee80211->pHTInfo->IOTAction & HT_IOT_ACT_CDD_FSYNC)) {
2876 if (priv->ieee80211->bfsync_enable == 0) {
2877 switch (priv->ieee80211->fsync_state) {
2879 dm_StartHWFsync(dev);
2880 priv->ieee80211->fsync_state = HW_Fsync;
2884 dm_StartHWFsync(dev);
2885 priv->ieee80211->fsync_state = HW_Fsync;
2892 switch (priv->ieee80211->fsync_state) {
2894 dm_StartSWFsync(dev);
2895 priv->ieee80211->fsync_state = SW_Fsync;
2899 dm_StartSWFsync(dev);
2900 priv->ieee80211->fsync_state = SW_Fsync;
2907 if (priv->framesyncMonitor) {
2908 if (reg_c38_State != RegC38_Fsync_AP_BCM) {
2909 /* For broadcom AP we write different default value */
2910 write_nic_byte(dev, rOFDM0_RxDetector3, 0x95);
2912 reg_c38_State = RegC38_Fsync_AP_BCM;
2916 switch (priv->ieee80211->fsync_state) {
2919 priv->ieee80211->fsync_state = Default_Fsync;
2923 priv->ieee80211->fsync_state = Default_Fsync;
2930 if (priv->framesyncMonitor) {
2931 if (priv->ieee80211->state == IEEE80211_LINKED) {
2932 if (priv->undecorated_smoothed_pwdb <= RegC38_TH) {
2933 if (reg_c38_State != RegC38_NonFsync_Other_AP) {
2934 write_nic_byte(dev, rOFDM0_RxDetector3, 0x90);
2936 reg_c38_State = RegC38_NonFsync_Other_AP;
2938 } else if (priv->undecorated_smoothed_pwdb >= (RegC38_TH+5)) {
2939 if (reg_c38_State) {
2940 write_nic_byte(dev, rOFDM0_RxDetector3, priv->framesync);
2941 reg_c38_State = RegC38_Default;
2942 /*DbgPrint("Fsync is idle, rssi>=40, write 0xc38 = 0x%x\n", pHalData->framesync);*/
2946 if (reg_c38_State) {
2947 write_nic_byte(dev, rOFDM0_RxDetector3, priv->framesync);
2948 reg_c38_State = RegC38_Default;
2949 /*DbgPrint("Fsync is idle, not connected, write 0xc38 = 0x%x\n", pHalData->framesync);*/
2954 if (priv->framesyncMonitor) {
2955 if (priv->reset_count != reset_cnt) { /* After silent reset, the reg_c38_State will be returned to default value */
2956 write_nic_byte(dev, rOFDM0_RxDetector3, priv->framesync);
2957 reg_c38_State = RegC38_Default;
2958 reset_cnt = priv->reset_count;
2959 /*DbgPrint("reg_c38_State = 0 for silent reset.\n");*/
2962 if (reg_c38_State) {
2963 write_nic_byte(dev, rOFDM0_RxDetector3, priv->framesync);
2964 reg_c38_State = RegC38_Default;
2965 /*DbgPrint("framesync no monitor, write 0xc38 = 0x%x\n", pHalData->framesync);*/
2970 /*-----------------------------------------------------------------------------
2971 * Function: dm_shadow_init()
2973 * Overview: Store all NIC MAC/BB register content.
2983 * 05/29/2008 amy Create Version 0 porting from windows code.
2985 *---------------------------------------------------------------------------*/
2986 void dm_shadow_init(struct net_device *dev)
2991 for (page = 0; page < 5; page++)
2992 for (offset = 0; offset < 256; offset++) {
2993 read_nic_byte(dev, offset+page*256, &dm_shadow[page][offset]);
2994 /*DbgPrint("P-%d/O-%02x=%02x\r\n", page, offset, DM_Shadow[page][offset]);*/
2997 for (page = 8; page < 11; page++)
2998 for (offset = 0; offset < 256; offset++)
2999 read_nic_byte(dev, offset+page*256, &dm_shadow[page][offset]);
3001 for (page = 12; page < 15; page++)
3002 for (offset = 0; offset < 256; offset++)
3003 read_nic_byte(dev, offset+page*256, &dm_shadow[page][offset]);
3005 } /* dm_shadow_init */
3007 /*---------------------------Define function prototype------------------------*/
3008 /*-----------------------------------------------------------------------------
3009 * Function: DM_DynamicTxPower()
3011 * Overview: Detect Signal strength to control TX Registry
3012 Tx Power Control For Near/Far Range
3022 * 03/06/2008 Jacken Create Version 0.
3024 *---------------------------------------------------------------------------*/
3025 static void dm_init_dynamic_txpower(struct net_device *dev)
3027 struct r8192_priv *priv = ieee80211_priv(dev);
3029 /* Initial TX Power Control for near/far range , add by amy 2008/05/15, porting from windows code. */
3030 priv->ieee80211->bdynamic_txpower_enable = true; /* Default to enable Tx Power Control */
3031 priv->bLastDTPFlag_High = false;
3032 priv->bLastDTPFlag_Low = false;
3033 priv->bDynamicTxHighPower = false;
3034 priv->bDynamicTxLowPower = false;
3037 static void dm_dynamic_txpower(struct net_device *dev)
3039 struct r8192_priv *priv = ieee80211_priv(dev);
3040 unsigned int txhipower_threshhold = 0;
3041 unsigned int txlowpower_threshold = 0;
3043 if (priv->ieee80211->bdynamic_txpower_enable != true) {
3044 priv->bDynamicTxHighPower = false;
3045 priv->bDynamicTxLowPower = false;
3048 /*printk("priv->ieee80211->current_network.unknown_cap_exist is %d , priv->ieee80211->current_network.broadcom_cap_exist is %d\n", priv->ieee80211->current_network.unknown_cap_exist, priv->ieee80211->current_network.broadcom_cap_exist);*/
3049 if ((priv->ieee80211->current_network.atheros_cap_exist) && (priv->ieee80211->mode == IEEE_G)) {
3050 txhipower_threshhold = TX_POWER_ATHEROAP_THRESH_HIGH;
3051 txlowpower_threshold = TX_POWER_ATHEROAP_THRESH_LOW;
3053 txhipower_threshhold = TX_POWER_NEAR_FIELD_THRESH_HIGH;
3054 txlowpower_threshold = TX_POWER_NEAR_FIELD_THRESH_LOW;
3057 /*printk("=======>%s(): txhipower_threshhold is %d, txlowpower_threshold is %d\n", __func__, txhipower_threshhold, txlowpower_threshold);*/
3058 RT_TRACE(COMP_TXAGC, "priv->undecorated_smoothed_pwdb = %ld\n", priv->undecorated_smoothed_pwdb);
3060 if (priv->ieee80211->state == IEEE80211_LINKED) {
3061 if (priv->undecorated_smoothed_pwdb >= txhipower_threshhold) {
3062 priv->bDynamicTxHighPower = true;
3063 priv->bDynamicTxLowPower = false;
3065 /* high power state check */
3066 if (priv->undecorated_smoothed_pwdb < txlowpower_threshold && priv->bDynamicTxHighPower == true)
3067 priv->bDynamicTxHighPower = false;
3069 /* low power state check */
3070 if (priv->undecorated_smoothed_pwdb < 35)
3071 priv->bDynamicTxLowPower = true;
3072 else if (priv->undecorated_smoothed_pwdb >= 40)
3073 priv->bDynamicTxLowPower = false;
3076 /*pHalData->bTXPowerCtrlforNearFarRange = !pHalData->bTXPowerCtrlforNearFarRange;*/
3077 priv->bDynamicTxHighPower = false;
3078 priv->bDynamicTxLowPower = false;
3081 if ((priv->bDynamicTxHighPower != priv->bLastDTPFlag_High) ||
3082 (priv->bDynamicTxLowPower != priv->bLastDTPFlag_Low)) {
3083 RT_TRACE(COMP_TXAGC, "SetTxPowerLevel8190() channel = %d\n", priv->ieee80211->current_network.channel);
3085 #if defined(RTL8190P) || defined(RTL8192E)
3086 SetTxPowerLevel8190(Adapter, pHalData->CurrentChannel);
3089 rtl8192_phy_setTxPower(dev, priv->ieee80211->current_network.channel);
3090 /*pHalData->bStartTxCtrlByTPCNFR = FALSE; Clear th flag of Set TX Power from Sitesurvey*/
3092 priv->bLastDTPFlag_High = priv->bDynamicTxHighPower;
3093 priv->bLastDTPFlag_Low = priv->bDynamicTxLowPower;
3095 } /* dm_dynamic_txpower */
3097 /* added by vivi, for read tx rate and retrycount */
3098 static void dm_check_txrateandretrycount(struct net_device *dev)
3100 struct r8192_priv *priv = ieee80211_priv(dev);
3101 struct ieee80211_device *ieee = priv->ieee80211;
3102 /* for 11n tx rate */
3103 /*priv->stats.CurrentShowTxate = read_nic_byte(dev, Current_Tx_Rate_Reg);*/
3104 read_nic_byte(dev, Current_Tx_Rate_Reg, &ieee->softmac_stats.CurrentShowTxate);
3105 /*printk("=============>tx_rate_reg:%x\n", ieee->softmac_stats.CurrentShowTxate);*/
3106 /* for initial tx rate */
3107 /*priv->stats.last_packet_rate = read_nic_byte(dev, Initial_Tx_Rate_Reg);*/
3108 read_nic_byte(dev, Initial_Tx_Rate_Reg, &ieee->softmac_stats.last_packet_rate);
3109 /* for tx tx retry count */
3110 /*priv->stats.txretrycount = read_nic_dword(dev, Tx_Retry_Count_Reg);*/
3111 read_nic_dword(dev, Tx_Retry_Count_Reg, &ieee->softmac_stats.txretrycount);
3114 static void dm_send_rssi_tofw(struct net_device *dev)
3116 struct r8192_priv *priv = ieee80211_priv(dev);
3119 * If we test chariot, we should stop the TX command ?
3120 * Because 92E will always silent reset when we send tx command. We use register
3121 * 0x1e0(byte) to notify driver.
3123 write_nic_byte(dev, DRIVER_RSSI, (u8)priv->undecorated_smoothed_pwdb);
3126 /*---------------------------Define function prototype------------------------*/