1 #ifndef R819XUSB_CMDPKT_H
2 #define R819XUSB_CMDPKT_H
3 /* Different command packet have dedicated message length and definition. */
4 #define CMPK_RX_TX_FB_SIZE sizeof(cmpk_txfb_t) //20
5 #define CMPK_TX_SET_CONFIG_SIZE sizeof(cmpk_set_cfg_t) //16
6 #define CMPK_BOTH_QUERY_CONFIG_SIZE sizeof(cmpk_set_cfg_t) //16
7 #define CMPK_RX_TX_STS_SIZE sizeof(cmpk_tx_status_t)//
8 #define CMPK_RX_DBG_MSG_SIZE sizeof(cmpk_rx_dbginfo_t)//
9 #define CMPK_TX_RAHIS_SIZE sizeof(cmpk_tx_rahis_t)
11 /* 2008/05/08 amy For USB constant. */
12 #define ISR_TxBcnOk BIT27 // Transmit Beacon OK
13 #define ISR_TxBcnErr BIT26 // Transmit Beacon Error
14 #define ISR_BcnTimerIntr BIT13 // Beacon Timer Interrupt
17 /* Define element ID of command packet. */
19 /*------------------------------Define structure----------------------------*/
20 /* Define different command packet structure. */
21 /* 1. RX side: TX feedback packet. */
22 typedef struct tag_cmd_pkt_tx_feedback {
24 u8 element_id; /* Command packet type. */
25 u8 length; /* Command packet length. */
26 /* 2007/07/05 MH Change tx feedback info field. */
27 /*------TX Feedback Info Field */
29 u8 fail_reason:3; /* */
30 u8 tok:1; /* Transmit ok. */
38 /*------TX Feedback Info Field */
44 u8 s_rate; /* Start rate. */
45 u8 f_rate; /* Final rate. */
57 /* 2. RX side: Interrupt status packet. It includes Beacon State,
58 Beacon Timer Interrupt and other useful informations in MAC ISR Reg. */
59 typedef struct tag_cmd_pkt_interrupt_status {
60 u8 element_id; /* Command packet type. */
61 u8 length; /* Command packet length. */
63 u32 interrupt_status; /* Interrupt Status. */
67 /* 3. TX side: Set configuration packet. */
68 typedef struct tag_cmd_pkt_set_configuration {
69 u8 element_id; /* Command packet type. */
70 u8 length; /* Command packet length. */
73 u8 cfg_size:2; /* Configuration info. */
74 u8 cfg_type:2; /* Configuration info. */
75 u8 cfg_action:1; /* Configuration info. */
76 u8 cfg_reserve2; /* Configuration info. */
77 u8 cfg_page:4; /* Configuration info. */
78 u8 cfg_reserve3:4; /* Configuration info. */
79 u8 cfg_offset; /* Configuration info. */
84 /* 4. Both side : TX/RX query configuraton packet. The query structure is the
85 same as set configuration. */
86 #define cmpk_query_cfg_t cmpk_set_cfg_t
88 /* 5. Multi packet feedback status. */
89 typedef struct tag_tx_stats_feedback { // PJ quick rxcmd 09042007
90 // For endian transfer --> Driver will not the same as firmware structure.
93 u8 length; // Command packet length
94 u8 element_id; // Command packet type
97 u16 txfail; // Tx Fail count
98 u16 txok; // Tx ok count
101 u16 txmcok; // tx multicast
102 u16 txretry; // Tx Retry count
105 u16 txucok; // tx unicast
106 u16 txbcok; // tx broadcast
125 }__attribute__((packed)) cmpk_tx_status_t;
127 /* 6. Debug feedback message. */
128 /* 2007/10/23 MH Define RX debug message */
129 typedef struct tag_rx_debug_message_feedback {
130 // For endian transfer --> for driver
133 u8 length; // Command packet length
134 u8 element_id; // Command packet type
137 // Variable debug message.
141 /* 2008/03/20 MH Define transmit rate history. For big endian format. */
142 typedef struct tag_tx_rate_history {
143 // For endian transfer --> for driver
145 u8 element_id; // Command packet type
146 u8 length; // Command packet length
149 // DW 1-2 CCK rate counter
156 //UINT16 MCS_BW0_SG0[16];
159 //UINT16 MCS_BW1_SG0[16];
162 //UINT16 MCS_BW0_SG1[16];
165 //UINT16 MCS_BW1_SG1[16];
168 // DW 15-22 BW=1 SG=0
169 // DW 23-30 BW=0 SG=1
170 // DW 31-38 BW=1 SG=1
173 }__attribute__((packed)) cmpk_tx_rahis_t;
175 typedef enum tag_command_packet_directories
178 RX_INTERRUPT_STATUS = 1,
180 BOTH_QUERY_CONFIG = 3,
182 RX_DBGINFO_FEEDBACK = 5,
183 RX_TX_PER_PKT_FEEDBACK = 6,
184 RX_TX_RATE_HISTORY = 7,
188 typedef enum _rt_status{
193 }rt_status,*prt_status;
195 extern u32 cmpk_message_handle_rx(struct net_device *dev, struct ieee80211_rx_stats *pstats);
196 extern rt_status SendTxCommandPacket( struct net_device *dev, void *pData, u32 DataLen);