1 /* Driver for Realtek PCI-Express card reader
3 * Copyright(c) 2009-2013 Realtek Semiconductor Corp. All rights reserved.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License as published by the
7 * Free Software Foundation; either version 2, or (at your option) any
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 * General Public License for more details.
15 * You should have received a copy of the GNU General Public License along
16 * with this program; if not, see <http://www.gnu.org/licenses/>.
19 * Wei WANG (wei_wang@realsil.com.cn)
20 * Micky Ching (micky_ching@realsil.com.cn)
23 #include <linux/blkdev.h>
24 #include <linux/kthread.h>
25 #include <linux/sched.h>
26 #include <linux/vmalloc.h>
31 static inline void ms_set_err_code(struct rtsx_chip *chip, u8 err_code)
33 struct ms_info *ms_card = &chip->ms_card;
35 ms_card->err_code = err_code;
38 static inline int ms_check_err_code(struct rtsx_chip *chip, u8 err_code)
40 struct ms_info *ms_card = &chip->ms_card;
42 return (ms_card->err_code == err_code);
45 static int ms_parse_err_code(struct rtsx_chip *chip)
51 static int ms_transfer_tpc(struct rtsx_chip *chip, u8 trans_mode,
52 u8 tpc, u8 cnt, u8 cfg)
54 struct ms_info *ms_card = &chip->ms_card;
58 dev_dbg(rtsx_dev(chip), "%s: tpc = 0x%x\n", __func__, tpc);
62 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TPC, 0xFF, tpc);
63 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_BYTE_CNT, 0xFF, cnt);
64 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANS_CFG, 0xFF, cfg);
65 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE,
66 0x01, PINGPONG_BUFFER);
68 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANSFER,
69 0xFF, MS_TRANSFER_START | trans_mode);
70 rtsx_add_cmd(chip, CHECK_REG_CMD, MS_TRANSFER,
71 MS_TRANSFER_END, MS_TRANSFER_END);
73 rtsx_add_cmd(chip, READ_REG_CMD, MS_TRANS_CFG, 0, 0);
75 retval = rtsx_send_cmd(chip, MS_CARD, 5000);
77 rtsx_clear_ms_error(chip);
78 ms_set_err_code(chip, MS_TO_ERROR);
80 return ms_parse_err_code(chip);
83 ptr = rtsx_get_cmd_data(chip) + 1;
85 if (!(tpc & 0x08)) { /* Read Packet */
86 if (*ptr & MS_CRC16_ERR) {
87 ms_set_err_code(chip, MS_CRC16_ERROR);
89 return ms_parse_err_code(chip);
91 } else { /* Write Packet */
92 if (CHK_MSPRO(ms_card) && !(*ptr & 0x80)) {
93 if (*ptr & (MS_INT_ERR | MS_INT_CMDNK)) {
94 ms_set_err_code(chip, MS_CMD_NK);
96 return ms_parse_err_code(chip);
101 if (*ptr & MS_RDY_TIMEOUT) {
102 rtsx_clear_ms_error(chip);
103 ms_set_err_code(chip, MS_TO_ERROR);
105 return ms_parse_err_code(chip);
108 return STATUS_SUCCESS;
111 static int ms_transfer_data(struct rtsx_chip *chip, u8 trans_mode,
112 u8 tpc, u16 sec_cnt, u8 cfg, bool mode_2k,
113 int use_sg, void *buf, int buf_len)
116 u8 val, err_code = 0;
117 enum dma_data_direction dir;
119 if (!buf || !buf_len) {
124 if (trans_mode == MS_TM_AUTO_READ) {
125 dir = DMA_FROM_DEVICE;
126 err_code = MS_FLASH_READ_ERROR;
127 } else if (trans_mode == MS_TM_AUTO_WRITE) {
129 err_code = MS_FLASH_WRITE_ERROR;
137 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TPC, 0xFF, tpc);
138 rtsx_add_cmd(chip, WRITE_REG_CMD,
139 MS_SECTOR_CNT_H, 0xFF, (u8)(sec_cnt >> 8));
140 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_SECTOR_CNT_L, 0xFF, (u8)sec_cnt);
141 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANS_CFG, 0xFF, cfg);
144 rtsx_add_cmd(chip, WRITE_REG_CMD,
145 MS_CFG, MS_2K_SECTOR_MODE, MS_2K_SECTOR_MODE);
147 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_CFG, MS_2K_SECTOR_MODE, 0);
150 trans_dma_enable(dir, chip, sec_cnt * 512, DMA_512);
152 rtsx_add_cmd(chip, WRITE_REG_CMD,
153 MS_TRANSFER, 0xFF, MS_TRANSFER_START | trans_mode);
154 rtsx_add_cmd(chip, CHECK_REG_CMD,
155 MS_TRANSFER, MS_TRANSFER_END, MS_TRANSFER_END);
157 rtsx_send_cmd_no_wait(chip);
159 retval = rtsx_transfer_data(chip, MS_CARD, buf, buf_len,
160 use_sg, dir, chip->mspro_timeout);
162 ms_set_err_code(chip, err_code);
163 if (retval == -ETIMEDOUT)
164 retval = STATUS_TIMEDOUT;
166 retval = STATUS_FAIL;
172 retval = rtsx_read_register(chip, MS_TRANS_CFG, &val);
177 if (val & (MS_INT_CMDNK | MS_INT_ERR | MS_CRC16_ERR | MS_RDY_TIMEOUT)) {
182 return STATUS_SUCCESS;
185 static int ms_write_bytes(struct rtsx_chip *chip,
186 u8 tpc, u8 cnt, u8 cfg, u8 *data, int data_len)
188 struct ms_info *ms_card = &chip->ms_card;
191 if (!data || (data_len < cnt)) {
198 for (i = 0; i < cnt; i++) {
199 rtsx_add_cmd(chip, WRITE_REG_CMD,
200 PPBUF_BASE2 + i, 0xFF, data[i]);
203 rtsx_add_cmd(chip, WRITE_REG_CMD, PPBUF_BASE2 + i, 0xFF, 0xFF);
205 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TPC, 0xFF, tpc);
206 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_BYTE_CNT, 0xFF, cnt);
207 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANS_CFG, 0xFF, cfg);
208 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE,
209 0x01, PINGPONG_BUFFER);
211 rtsx_add_cmd(chip, WRITE_REG_CMD,
212 MS_TRANSFER, 0xFF, MS_TRANSFER_START | MS_TM_WRITE_BYTES);
213 rtsx_add_cmd(chip, CHECK_REG_CMD,
214 MS_TRANSFER, MS_TRANSFER_END, MS_TRANSFER_END);
216 retval = rtsx_send_cmd(chip, MS_CARD, 5000);
220 rtsx_read_register(chip, MS_TRANS_CFG, &val);
221 dev_dbg(rtsx_dev(chip), "MS_TRANS_CFG: 0x%02x\n", val);
223 rtsx_clear_ms_error(chip);
226 if (val & MS_CRC16_ERR) {
227 ms_set_err_code(chip, MS_CRC16_ERROR);
229 return ms_parse_err_code(chip);
232 if (CHK_MSPRO(ms_card) && !(val & 0x80)) {
233 if (val & (MS_INT_ERR | MS_INT_CMDNK)) {
234 ms_set_err_code(chip, MS_CMD_NK);
236 return ms_parse_err_code(chip);
241 if (val & MS_RDY_TIMEOUT) {
242 ms_set_err_code(chip, MS_TO_ERROR);
244 return ms_parse_err_code(chip);
247 ms_set_err_code(chip, MS_TO_ERROR);
249 return ms_parse_err_code(chip);
252 return STATUS_SUCCESS;
255 static int ms_read_bytes(struct rtsx_chip *chip,
256 u8 tpc, u8 cnt, u8 cfg, u8 *data, int data_len)
258 struct ms_info *ms_card = &chip->ms_card;
269 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TPC, 0xFF, tpc);
270 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_BYTE_CNT, 0xFF, cnt);
271 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANS_CFG, 0xFF, cfg);
272 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE,
273 0x01, PINGPONG_BUFFER);
275 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANSFER, 0xFF,
276 MS_TRANSFER_START | MS_TM_READ_BYTES);
277 rtsx_add_cmd(chip, CHECK_REG_CMD, MS_TRANSFER,
278 MS_TRANSFER_END, MS_TRANSFER_END);
280 for (i = 0; i < data_len - 1; i++)
281 rtsx_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2 + i, 0, 0);
284 rtsx_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2 + data_len, 0, 0);
286 rtsx_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2 + data_len - 1,
289 retval = rtsx_send_cmd(chip, MS_CARD, 5000);
293 rtsx_read_register(chip, MS_TRANS_CFG, &val);
294 rtsx_clear_ms_error(chip);
297 if (val & MS_CRC16_ERR) {
298 ms_set_err_code(chip, MS_CRC16_ERROR);
300 return ms_parse_err_code(chip);
303 if (CHK_MSPRO(ms_card) && !(val & 0x80)) {
304 if (val & (MS_INT_ERR | MS_INT_CMDNK)) {
305 ms_set_err_code(chip, MS_CMD_NK);
307 return ms_parse_err_code(chip);
312 if (val & MS_RDY_TIMEOUT) {
313 ms_set_err_code(chip, MS_TO_ERROR);
315 return ms_parse_err_code(chip);
318 ms_set_err_code(chip, MS_TO_ERROR);
320 return ms_parse_err_code(chip);
323 ptr = rtsx_get_cmd_data(chip) + 1;
325 for (i = 0; i < data_len; i++)
328 if ((tpc == PRO_READ_SHORT_DATA) && (data_len == 8)) {
329 dev_dbg(rtsx_dev(chip), "Read format progress:\n");
330 print_hex_dump_bytes(KBUILD_MODNAME ": ", DUMP_PREFIX_NONE, ptr,
334 return STATUS_SUCCESS;
337 static int ms_set_rw_reg_addr(struct rtsx_chip *chip, u8 read_start,
338 u8 read_cnt, u8 write_start, u8 write_cnt)
343 data[0] = read_start;
345 data[2] = write_start;
348 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
349 retval = ms_write_bytes(chip, SET_RW_REG_ADRS, 4,
350 NO_WAIT_INT, data, 4);
351 if (retval == STATUS_SUCCESS)
352 return STATUS_SUCCESS;
353 rtsx_clear_ms_error(chip);
360 static int ms_send_cmd(struct rtsx_chip *chip, u8 cmd, u8 cfg)
367 return ms_write_bytes(chip, PRO_SET_CMD, 1, cfg, data, 1);
370 static int ms_set_init_para(struct rtsx_chip *chip)
372 struct ms_info *ms_card = &chip->ms_card;
375 if (CHK_HG8BIT(ms_card)) {
377 ms_card->ms_clock = chip->asic_ms_hg_clk;
379 ms_card->ms_clock = chip->fpga_ms_hg_clk;
381 } else if (CHK_MSPRO(ms_card) || CHK_MS4BIT(ms_card)) {
383 ms_card->ms_clock = chip->asic_ms_4bit_clk;
385 ms_card->ms_clock = chip->fpga_ms_4bit_clk;
389 ms_card->ms_clock = chip->asic_ms_1bit_clk;
391 ms_card->ms_clock = chip->fpga_ms_1bit_clk;
394 retval = switch_clock(chip, ms_card->ms_clock);
395 if (retval != STATUS_SUCCESS) {
400 retval = select_card(chip, MS_CARD);
401 if (retval != STATUS_SUCCESS) {
406 return STATUS_SUCCESS;
409 static int ms_switch_clock(struct rtsx_chip *chip)
411 struct ms_info *ms_card = &chip->ms_card;
414 retval = select_card(chip, MS_CARD);
415 if (retval != STATUS_SUCCESS) {
420 retval = switch_clock(chip, ms_card->ms_clock);
421 if (retval != STATUS_SUCCESS) {
426 return STATUS_SUCCESS;
429 static int ms_pull_ctl_disable(struct rtsx_chip *chip)
433 if (CHECK_PID(chip, 0x5208)) {
434 retval = rtsx_write_register(chip, CARD_PULL_CTL1, 0xFF,
435 MS_D1_PD | MS_D2_PD | MS_CLK_PD |
441 retval = rtsx_write_register(chip, CARD_PULL_CTL2, 0xFF,
442 MS_D3_PD | MS_D0_PD | MS_BS_PD |
448 retval = rtsx_write_register(chip, CARD_PULL_CTL3, 0xFF,
449 MS_D7_PD | XD_CE_PD | XD_CLE_PD |
455 retval = rtsx_write_register(chip, CARD_PULL_CTL4, 0xFF,
456 XD_RDY_PD | SD_D3_PD | SD_D2_PD |
462 retval = rtsx_write_register(chip, CARD_PULL_CTL5, 0xFF,
463 MS_INS_PU | SD_WP_PD | SD_CD_PU |
469 retval = rtsx_write_register(chip, CARD_PULL_CTL6, 0xFF,
470 MS_D5_PD | MS_D4_PD);
475 } else if (CHECK_PID(chip, 0x5288)) {
476 if (CHECK_BARO_PKG(chip, QFN)) {
477 retval = rtsx_write_register(chip, CARD_PULL_CTL1,
483 retval = rtsx_write_register(chip, CARD_PULL_CTL2,
489 retval = rtsx_write_register(chip, CARD_PULL_CTL3,
495 retval = rtsx_write_register(chip, CARD_PULL_CTL4,
504 return STATUS_SUCCESS;
507 static int ms_pull_ctl_enable(struct rtsx_chip *chip)
513 if (CHECK_PID(chip, 0x5208)) {
514 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL1, 0xFF,
515 MS_D1_PD | MS_D2_PD | MS_CLK_NP | MS_D6_PD);
516 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL2, 0xFF,
517 MS_D3_PD | MS_D0_PD | MS_BS_NP | XD_D4_PD);
518 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL3, 0xFF,
519 MS_D7_PD | XD_CE_PD | XD_CLE_PD | XD_CD_PU);
520 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL4, 0xFF,
521 XD_RDY_PD | SD_D3_PD | SD_D2_PD | XD_ALE_PD);
522 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL5, 0xFF,
523 MS_INS_PU | SD_WP_PD | SD_CD_PU | SD_CMD_PD);
524 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL6, 0xFF,
525 MS_D5_PD | MS_D4_PD);
526 } else if (CHECK_PID(chip, 0x5288)) {
527 if (CHECK_BARO_PKG(chip, QFN)) {
528 rtsx_add_cmd(chip, WRITE_REG_CMD,
529 CARD_PULL_CTL1, 0xFF, 0x55);
530 rtsx_add_cmd(chip, WRITE_REG_CMD,
531 CARD_PULL_CTL2, 0xFF, 0x45);
532 rtsx_add_cmd(chip, WRITE_REG_CMD,
533 CARD_PULL_CTL3, 0xFF, 0x4B);
534 rtsx_add_cmd(chip, WRITE_REG_CMD,
535 CARD_PULL_CTL4, 0xFF, 0x29);
539 retval = rtsx_send_cmd(chip, MS_CARD, 100);
545 return STATUS_SUCCESS;
548 static int ms_prepare_reset(struct rtsx_chip *chip)
550 struct ms_info *ms_card = &chip->ms_card;
554 ms_card->ms_type = 0;
555 ms_card->check_ms_flow = 0;
556 ms_card->switch_8bit_fail = 0;
557 ms_card->delay_write.delay_write_flag = 0;
559 ms_card->pro_under_formatting = 0;
561 retval = ms_power_off_card3v3(chip);
562 if (retval != STATUS_SUCCESS) {
567 if (!chip->ft2_fast_mode)
570 retval = enable_card_clock(chip, MS_CARD);
571 if (retval != STATUS_SUCCESS) {
576 if (chip->asic_code) {
577 retval = ms_pull_ctl_enable(chip);
578 if (retval != STATUS_SUCCESS) {
583 retval = rtsx_write_register(chip, FPGA_PULL_CTL,
584 FPGA_MS_PULL_CTL_BIT | 0x20, 0);
591 if (!chip->ft2_fast_mode) {
592 retval = card_power_on(chip, MS_CARD);
593 if (retval != STATUS_SUCCESS) {
601 if (CHECK_LUN_MODE(chip, SD_MS_2LUN))
602 oc_mask = MS_OC_NOW | MS_OC_EVER;
604 oc_mask = SD_OC_NOW | SD_OC_EVER;
606 if (chip->ocp_stat & oc_mask) {
607 dev_dbg(rtsx_dev(chip), "Over current, OCPSTAT is 0x%x\n",
615 retval = rtsx_write_register(chip, CARD_OE, MS_OUTPUT_EN,
622 if (chip->asic_code) {
623 retval = rtsx_write_register(chip, MS_CFG, 0xFF,
633 retval = rtsx_write_register(chip, MS_CFG, 0xFF,
634 SAMPLE_TIME_FALLING |
643 retval = rtsx_write_register(chip, MS_TRANS_CFG, 0xFF,
644 NO_WAIT_INT | NO_AUTO_READ_INT_REG);
649 retval = rtsx_write_register(chip, CARD_STOP, MS_STOP | MS_CLR_ERR,
650 MS_STOP | MS_CLR_ERR);
656 retval = ms_set_init_para(chip);
657 if (retval != STATUS_SUCCESS) {
662 return STATUS_SUCCESS;
665 static int ms_identify_media_type(struct rtsx_chip *chip, int switch_8bit_bus)
667 struct ms_info *ms_card = &chip->ms_card;
671 retval = ms_set_rw_reg_addr(chip, Pro_StatusReg, 6, SystemParm, 1);
672 if (retval != STATUS_SUCCESS) {
677 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
678 retval = ms_transfer_tpc(chip, MS_TM_READ_BYTES, READ_REG,
680 if (retval == STATUS_SUCCESS)
683 if (i == MS_MAX_RETRY_COUNT) {
688 retval = rtsx_read_register(chip, PPBUF_BASE2 + 2, &val);
693 dev_dbg(rtsx_dev(chip), "Type register: 0x%x\n", val);
696 ms_card->check_ms_flow = 1;
702 retval = rtsx_read_register(chip, PPBUF_BASE2 + 4, &val);
707 dev_dbg(rtsx_dev(chip), "Category register: 0x%x\n", val);
709 ms_card->check_ms_flow = 1;
714 retval = rtsx_read_register(chip, PPBUF_BASE2 + 5, &val);
719 dev_dbg(rtsx_dev(chip), "Class register: 0x%x\n", val);
721 retval = rtsx_read_register(chip, PPBUF_BASE2, &val);
727 chip->card_wp |= MS_CARD;
729 chip->card_wp &= ~MS_CARD;
731 } else if ((val == 0x01) || (val == 0x02) || (val == 0x03)) {
732 chip->card_wp |= MS_CARD;
734 ms_card->check_ms_flow = 1;
739 ms_card->ms_type |= TYPE_MSPRO;
741 retval = rtsx_read_register(chip, PPBUF_BASE2 + 3, &val);
746 dev_dbg(rtsx_dev(chip), "IF Mode register: 0x%x\n", val);
748 ms_card->ms_type &= 0x0F;
749 } else if (val == 7) {
751 ms_card->ms_type |= MS_HG;
753 ms_card->ms_type &= 0x0F;
760 return STATUS_SUCCESS;
763 static int ms_confirm_cpu_startup(struct rtsx_chip *chip)
768 /* Confirm CPU StartUp */
771 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
772 ms_set_err_code(chip, MS_NO_CARD);
777 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
778 retval = ms_read_bytes(chip, GET_INT, 1,
779 NO_WAIT_INT, &val, 1);
780 if (retval == STATUS_SUCCESS)
783 if (i == MS_MAX_RETRY_COUNT) {
795 } while (!(val & INT_REG_CED));
797 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
798 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
799 if (retval == STATUS_SUCCESS)
802 if (i == MS_MAX_RETRY_COUNT) {
807 if (val & INT_REG_ERR) {
808 if (val & INT_REG_CMDNK) {
809 chip->card_wp |= (MS_CARD);
815 /* -- end confirm CPU startup */
817 return STATUS_SUCCESS;
820 static int ms_switch_parallel_bus(struct rtsx_chip *chip)
825 data[0] = PARALLEL_4BIT_IF;
827 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
828 retval = ms_write_bytes(chip, WRITE_REG, 1, NO_WAIT_INT,
830 if (retval == STATUS_SUCCESS)
833 if (retval != STATUS_SUCCESS) {
838 return STATUS_SUCCESS;
841 static int ms_switch_8bit_bus(struct rtsx_chip *chip)
843 struct ms_info *ms_card = &chip->ms_card;
847 data[0] = PARALLEL_8BIT_IF;
849 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
850 retval = ms_write_bytes(chip, WRITE_REG, 1,
851 NO_WAIT_INT, data, 2);
852 if (retval == STATUS_SUCCESS)
855 if (retval != STATUS_SUCCESS) {
860 retval = rtsx_write_register(chip, MS_CFG, 0x98,
861 MS_BUS_WIDTH_8 | SAMPLE_TIME_FALLING);
866 ms_card->ms_type |= MS_8BIT;
867 retval = ms_set_init_para(chip);
868 if (retval != STATUS_SUCCESS) {
873 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
874 retval = ms_transfer_tpc(chip, MS_TM_READ_BYTES, GET_INT,
876 if (retval != STATUS_SUCCESS) {
882 return STATUS_SUCCESS;
885 static int ms_pro_reset_flow(struct rtsx_chip *chip, int switch_8bit_bus)
887 struct ms_info *ms_card = &chip->ms_card;
890 for (i = 0; i < 3; i++) {
891 retval = ms_prepare_reset(chip);
892 if (retval != STATUS_SUCCESS) {
897 retval = ms_identify_media_type(chip, switch_8bit_bus);
898 if (retval != STATUS_SUCCESS) {
903 retval = ms_confirm_cpu_startup(chip);
904 if (retval != STATUS_SUCCESS) {
909 retval = ms_switch_parallel_bus(chip);
910 if (retval != STATUS_SUCCESS) {
911 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
912 ms_set_err_code(chip, MS_NO_CARD);
922 if (retval != STATUS_SUCCESS) {
927 /* Switch MS-PRO into Parallel mode */
928 retval = rtsx_write_register(chip, MS_CFG, 0x18, MS_BUS_WIDTH_4);
933 retval = rtsx_write_register(chip, MS_CFG, PUSH_TIME_ODD,
940 retval = ms_set_init_para(chip);
941 if (retval != STATUS_SUCCESS) {
946 /* If MSPro HG Card, We shall try to switch to 8-bit bus */
947 if (CHK_MSHG(ms_card) && chip->support_ms_8bit && switch_8bit_bus) {
948 retval = ms_switch_8bit_bus(chip);
949 if (retval != STATUS_SUCCESS) {
950 ms_card->switch_8bit_fail = 1;
956 return STATUS_SUCCESS;
960 static int msxc_change_power(struct rtsx_chip *chip, u8 mode)
965 ms_cleanup_work(chip);
967 retval = ms_set_rw_reg_addr(chip, 0, 0, Pro_DataCount1, 6);
968 if (retval != STATUS_SUCCESS) {
980 retval = ms_write_bytes(chip, PRO_WRITE_REG, 6, NO_WAIT_INT, buf, 6);
981 if (retval != STATUS_SUCCESS) {
986 retval = ms_send_cmd(chip, XC_CHG_POWER, WAIT_INT);
987 if (retval != STATUS_SUCCESS) {
992 retval = rtsx_read_register(chip, MS_TRANS_CFG, buf);
997 if (buf[0] & (MS_INT_CMDNK | MS_INT_ERR)) {
1002 return STATUS_SUCCESS;
1006 static int ms_read_attribute_info(struct rtsx_chip *chip)
1008 struct ms_info *ms_card = &chip->ms_card;
1010 u8 val, *buf, class_code, device_type, sub_class, data[16];
1011 u16 total_blk = 0, blk_size = 0;
1013 u32 xc_total_blk = 0, xc_blk_size = 0;
1015 u32 sys_info_addr = 0, sys_info_size;
1016 #ifdef SUPPORT_PCGL_1P18
1017 u32 model_name_addr = 0, model_name_size;
1018 int found_sys_info = 0, found_model_name = 0;
1021 retval = ms_set_rw_reg_addr(chip, Pro_IntReg, 2, Pro_SystemParm, 7);
1022 if (retval != STATUS_SUCCESS) {
1027 if (CHK_MS8BIT(ms_card))
1028 data[0] = PARALLEL_8BIT_IF;
1030 data[0] = PARALLEL_4BIT_IF;
1041 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
1042 retval = ms_write_bytes(chip, PRO_WRITE_REG, 7, NO_WAIT_INT,
1044 if (retval == STATUS_SUCCESS)
1047 if (retval != STATUS_SUCCESS) {
1052 buf = kmalloc(64 * 512, GFP_KERNEL);
1055 return STATUS_ERROR;
1058 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
1059 retval = ms_send_cmd(chip, PRO_READ_ATRB, WAIT_INT);
1060 if (retval != STATUS_SUCCESS)
1063 retval = rtsx_read_register(chip, MS_TRANS_CFG, &val);
1064 if (retval != STATUS_SUCCESS) {
1069 if (!(val & MS_INT_BREQ)) {
1074 retval = ms_transfer_data(chip, MS_TM_AUTO_READ,
1075 PRO_READ_LONG_DATA, 0x40, WAIT_INT,
1076 0, 0, buf, 64 * 512);
1077 if (retval == STATUS_SUCCESS)
1080 rtsx_clear_ms_error(chip);
1082 if (retval != STATUS_SUCCESS) {
1090 retval = rtsx_read_register(chip, MS_TRANS_CFG, &val);
1091 if (retval != STATUS_SUCCESS) {
1097 if ((val & MS_INT_CED) || !(val & MS_INT_BREQ))
1100 retval = ms_transfer_tpc(chip, MS_TM_NORMAL_READ,
1101 PRO_READ_LONG_DATA, 0, WAIT_INT);
1102 if (retval != STATUS_SUCCESS) {
1111 if (retval != STATUS_SUCCESS) {
1117 if ((buf[0] != 0xa5) && (buf[1] != 0xc3)) {
1118 /* Signature code is wrong */
1124 if ((buf[4] < 1) || (buf[4] > 12)) {
1130 for (i = 0; i < buf[4]; i++) {
1131 int cur_addr_off = 16 + i * 12;
1134 if ((buf[cur_addr_off + 8] == 0x10) ||
1135 (buf[cur_addr_off + 8] == 0x13)) {
1137 if (buf[cur_addr_off + 8] == 0x10) {
1139 sys_info_addr = ((u32)buf[cur_addr_off + 0] << 24) |
1140 ((u32)buf[cur_addr_off + 1] << 16) |
1141 ((u32)buf[cur_addr_off + 2] << 8) |
1142 buf[cur_addr_off + 3];
1143 sys_info_size = ((u32)buf[cur_addr_off + 4] << 24) |
1144 ((u32)buf[cur_addr_off + 5] << 16) |
1145 ((u32)buf[cur_addr_off + 6] << 8) |
1146 buf[cur_addr_off + 7];
1147 dev_dbg(rtsx_dev(chip), "sys_info_addr = 0x%x, sys_info_size = 0x%x\n",
1148 sys_info_addr, sys_info_size);
1149 if (sys_info_size != 96) {
1154 if (sys_info_addr < 0x1A0) {
1159 if ((sys_info_size + sys_info_addr) > 0x8000) {
1166 if (buf[cur_addr_off + 8] == 0x13)
1167 ms_card->ms_type |= MS_XC;
1169 #ifdef SUPPORT_PCGL_1P18
1175 #ifdef SUPPORT_PCGL_1P18
1176 if (buf[cur_addr_off + 8] == 0x15) {
1177 model_name_addr = ((u32)buf[cur_addr_off + 0] << 24) |
1178 ((u32)buf[cur_addr_off + 1] << 16) |
1179 ((u32)buf[cur_addr_off + 2] << 8) |
1180 buf[cur_addr_off + 3];
1181 model_name_size = ((u32)buf[cur_addr_off + 4] << 24) |
1182 ((u32)buf[cur_addr_off + 5] << 16) |
1183 ((u32)buf[cur_addr_off + 6] << 8) |
1184 buf[cur_addr_off + 7];
1185 dev_dbg(rtsx_dev(chip), "model_name_addr = 0x%x, model_name_size = 0x%x\n",
1186 model_name_addr, model_name_size);
1187 if (model_name_size != 48) {
1192 if (model_name_addr < 0x1A0) {
1197 if ((model_name_size + model_name_addr) > 0x8000) {
1203 found_model_name = 1;
1206 if (found_sys_info && found_model_name)
1217 class_code = buf[sys_info_addr + 0];
1218 device_type = buf[sys_info_addr + 56];
1219 sub_class = buf[sys_info_addr + 46];
1221 if (CHK_MSXC(ms_card)) {
1222 xc_total_blk = ((u32)buf[sys_info_addr + 6] << 24) |
1223 ((u32)buf[sys_info_addr + 7] << 16) |
1224 ((u32)buf[sys_info_addr + 8] << 8) |
1225 buf[sys_info_addr + 9];
1226 xc_blk_size = ((u32)buf[sys_info_addr + 32] << 24) |
1227 ((u32)buf[sys_info_addr + 33] << 16) |
1228 ((u32)buf[sys_info_addr + 34] << 8) |
1229 buf[sys_info_addr + 35];
1230 dev_dbg(rtsx_dev(chip), "xc_total_blk = 0x%x, xc_blk_size = 0x%x\n",
1231 xc_total_blk, xc_blk_size);
1233 total_blk = ((u16)buf[sys_info_addr + 6] << 8) |
1234 buf[sys_info_addr + 7];
1235 blk_size = ((u16)buf[sys_info_addr + 2] << 8) |
1236 buf[sys_info_addr + 3];
1237 dev_dbg(rtsx_dev(chip), "total_blk = 0x%x, blk_size = 0x%x\n",
1238 total_blk, blk_size);
1241 total_blk = ((u16)buf[sys_info_addr + 6] << 8) | buf[sys_info_addr + 7];
1242 blk_size = ((u16)buf[sys_info_addr + 2] << 8) | buf[sys_info_addr + 3];
1243 dev_dbg(rtsx_dev(chip), "total_blk = 0x%x, blk_size = 0x%x\n",
1244 total_blk, blk_size);
1247 dev_dbg(rtsx_dev(chip), "class_code = 0x%x, device_type = 0x%x, sub_class = 0x%x\n",
1248 class_code, device_type, sub_class);
1250 memcpy(ms_card->raw_sys_info, buf + sys_info_addr, 96);
1251 #ifdef SUPPORT_PCGL_1P18
1252 memcpy(ms_card->raw_model_name, buf + model_name_addr, 48);
1258 if (CHK_MSXC(ms_card)) {
1259 if (class_code != 0x03) {
1264 if (class_code != 0x02) {
1270 if (class_code != 0x02) {
1276 if (device_type != 0x00) {
1277 if ((device_type == 0x01) || (device_type == 0x02) ||
1278 (device_type == 0x03)) {
1279 chip->card_wp |= MS_CARD;
1286 if (sub_class & 0xC0) {
1291 dev_dbg(rtsx_dev(chip), "class_code: 0x%x, device_type: 0x%x, sub_class: 0x%x\n",
1292 class_code, device_type, sub_class);
1295 if (CHK_MSXC(ms_card)) {
1296 chip->capacity[chip->card2lun[MS_CARD]] =
1297 ms_card->capacity = xc_total_blk * xc_blk_size;
1299 chip->capacity[chip->card2lun[MS_CARD]] =
1300 ms_card->capacity = total_blk * blk_size;
1303 ms_card->capacity = total_blk * blk_size;
1304 chip->capacity[chip->card2lun[MS_CARD]] = ms_card->capacity;
1307 return STATUS_SUCCESS;
1310 #ifdef SUPPORT_MAGIC_GATE
1311 static int mg_set_tpc_para_sub(struct rtsx_chip *chip,
1312 int type, u8 mg_entry_num);
1315 static int reset_ms_pro(struct rtsx_chip *chip)
1317 struct ms_info *ms_card = &chip->ms_card;
1319 #ifdef XC_POWERCLASS
1320 u8 change_power_class;
1322 if (chip->ms_power_class_en & 0x02)
1323 change_power_class = 2;
1324 else if (chip->ms_power_class_en & 0x01)
1325 change_power_class = 1;
1327 change_power_class = 0;
1330 #ifdef XC_POWERCLASS
1333 retval = ms_pro_reset_flow(chip, 1);
1334 if (retval != STATUS_SUCCESS) {
1335 if (ms_card->switch_8bit_fail) {
1336 retval = ms_pro_reset_flow(chip, 0);
1337 if (retval != STATUS_SUCCESS) {
1347 retval = ms_read_attribute_info(chip);
1348 if (retval != STATUS_SUCCESS) {
1353 #ifdef XC_POWERCLASS
1354 if (CHK_HG8BIT(ms_card))
1355 change_power_class = 0;
1357 if (change_power_class && CHK_MSXC(ms_card)) {
1358 u8 power_class_en = chip->ms_power_class_en;
1360 dev_dbg(rtsx_dev(chip), "power_class_en = 0x%x\n",
1362 dev_dbg(rtsx_dev(chip), "change_power_class = %d\n",
1363 change_power_class);
1365 if (change_power_class)
1366 power_class_en &= (1 << (change_power_class - 1));
1370 if (power_class_en) {
1371 u8 power_class_mode =
1372 (ms_card->raw_sys_info[46] & 0x18) >> 3;
1373 dev_dbg(rtsx_dev(chip), "power_class_mode = 0x%x",
1375 if (change_power_class > power_class_mode)
1376 change_power_class = power_class_mode;
1377 if (change_power_class) {
1378 retval = msxc_change_power(chip,
1379 change_power_class);
1380 if (retval != STATUS_SUCCESS) {
1381 change_power_class--;
1389 #ifdef SUPPORT_MAGIC_GATE
1390 retval = mg_set_tpc_para_sub(chip, 0, 0);
1391 if (retval != STATUS_SUCCESS) {
1397 if (CHK_HG8BIT(ms_card))
1398 chip->card_bus_width[chip->card2lun[MS_CARD]] = 8;
1400 chip->card_bus_width[chip->card2lun[MS_CARD]] = 4;
1402 return STATUS_SUCCESS;
1405 static int ms_read_status_reg(struct rtsx_chip *chip)
1410 retval = ms_set_rw_reg_addr(chip, StatusReg0, 2, 0, 0);
1411 if (retval != STATUS_SUCCESS) {
1416 retval = ms_read_bytes(chip, READ_REG, 2, NO_WAIT_INT, val, 2);
1417 if (retval != STATUS_SUCCESS) {
1422 if (val[1] & (STS_UCDT | STS_UCEX | STS_UCFG)) {
1423 ms_set_err_code(chip, MS_FLASH_READ_ERROR);
1428 return STATUS_SUCCESS;
1431 static int ms_read_extra_data(struct rtsx_chip *chip,
1432 u16 block_addr, u8 page_num, u8 *buf, int buf_len)
1434 struct ms_info *ms_card = &chip->ms_card;
1438 retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE,
1440 if (retval != STATUS_SUCCESS) {
1445 if (CHK_MS4BIT(ms_card)) {
1446 /* Parallel interface */
1449 /* Serial interface */
1453 data[2] = (u8)(block_addr >> 8);
1454 data[3] = (u8)block_addr;
1458 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
1459 retval = ms_write_bytes(chip, WRITE_REG, 6, NO_WAIT_INT,
1461 if (retval == STATUS_SUCCESS)
1464 if (i == MS_MAX_RETRY_COUNT) {
1469 ms_set_err_code(chip, MS_NO_ERROR);
1471 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
1472 retval = ms_send_cmd(chip, BLOCK_READ, WAIT_INT);
1473 if (retval == STATUS_SUCCESS)
1476 if (i == MS_MAX_RETRY_COUNT) {
1481 ms_set_err_code(chip, MS_NO_ERROR);
1482 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
1483 if (retval != STATUS_SUCCESS) {
1488 if (val & INT_REG_CMDNK) {
1489 ms_set_err_code(chip, MS_CMD_NK);
1493 if (val & INT_REG_CED) {
1494 if (val & INT_REG_ERR) {
1495 retval = ms_read_status_reg(chip);
1496 if (retval != STATUS_SUCCESS) {
1501 retval = ms_set_rw_reg_addr(chip, OverwriteFlag,
1502 MS_EXTRA_SIZE, SystemParm,
1504 if (retval != STATUS_SUCCESS) {
1511 retval = ms_read_bytes(chip, READ_REG, MS_EXTRA_SIZE, NO_WAIT_INT,
1512 data, MS_EXTRA_SIZE);
1513 if (retval != STATUS_SUCCESS) {
1518 if (buf && buf_len) {
1519 if (buf_len > MS_EXTRA_SIZE)
1520 buf_len = MS_EXTRA_SIZE;
1521 memcpy(buf, data, buf_len);
1524 return STATUS_SUCCESS;
1527 static int ms_write_extra_data(struct rtsx_chip *chip, u16 block_addr,
1528 u8 page_num, u8 *buf, int buf_len)
1530 struct ms_info *ms_card = &chip->ms_card;
1534 if (!buf || (buf_len < MS_EXTRA_SIZE)) {
1539 retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE,
1540 SystemParm, 6 + MS_EXTRA_SIZE);
1541 if (retval != STATUS_SUCCESS) {
1546 if (CHK_MS4BIT(ms_card))
1552 data[2] = (u8)(block_addr >> 8);
1553 data[3] = (u8)block_addr;
1557 for (i = 6; i < MS_EXTRA_SIZE + 6; i++)
1558 data[i] = buf[i - 6];
1560 retval = ms_write_bytes(chip, WRITE_REG, (6 + MS_EXTRA_SIZE),
1561 NO_WAIT_INT, data, 16);
1562 if (retval != STATUS_SUCCESS) {
1567 retval = ms_send_cmd(chip, BLOCK_WRITE, WAIT_INT);
1568 if (retval != STATUS_SUCCESS) {
1573 ms_set_err_code(chip, MS_NO_ERROR);
1574 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
1575 if (retval != STATUS_SUCCESS) {
1580 if (val & INT_REG_CMDNK) {
1581 ms_set_err_code(chip, MS_CMD_NK);
1585 if (val & INT_REG_CED) {
1586 if (val & INT_REG_ERR) {
1587 ms_set_err_code(chip, MS_FLASH_WRITE_ERROR);
1593 return STATUS_SUCCESS;
1596 static int ms_read_page(struct rtsx_chip *chip, u16 block_addr, u8 page_num)
1598 struct ms_info *ms_card = &chip->ms_card;
1602 retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE,
1604 if (retval != STATUS_SUCCESS) {
1609 if (CHK_MS4BIT(ms_card))
1615 data[2] = (u8)(block_addr >> 8);
1616 data[3] = (u8)block_addr;
1620 retval = ms_write_bytes(chip, WRITE_REG, 6, NO_WAIT_INT, data, 6);
1621 if (retval != STATUS_SUCCESS) {
1626 retval = ms_send_cmd(chip, BLOCK_READ, WAIT_INT);
1627 if (retval != STATUS_SUCCESS) {
1632 ms_set_err_code(chip, MS_NO_ERROR);
1633 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
1634 if (retval != STATUS_SUCCESS) {
1639 if (val & INT_REG_CMDNK) {
1640 ms_set_err_code(chip, MS_CMD_NK);
1645 if (val & INT_REG_CED) {
1646 if (val & INT_REG_ERR) {
1647 if (!(val & INT_REG_BREQ)) {
1648 ms_set_err_code(chip, MS_FLASH_READ_ERROR);
1652 retval = ms_read_status_reg(chip);
1653 if (retval != STATUS_SUCCESS)
1654 ms_set_err_code(chip, MS_FLASH_WRITE_ERROR);
1657 if (!(val & INT_REG_BREQ)) {
1658 ms_set_err_code(chip, MS_BREQ_ERROR);
1665 retval = ms_transfer_tpc(chip, MS_TM_NORMAL_READ, READ_PAGE_DATA,
1667 if (retval != STATUS_SUCCESS) {
1672 if (ms_check_err_code(chip, MS_FLASH_WRITE_ERROR)) {
1677 return STATUS_SUCCESS;
1680 static int ms_set_bad_block(struct rtsx_chip *chip, u16 phy_blk)
1682 struct ms_info *ms_card = &chip->ms_card;
1684 u8 val, data[8], extra[MS_EXTRA_SIZE];
1686 retval = ms_read_extra_data(chip, phy_blk, 0, extra, MS_EXTRA_SIZE);
1687 if (retval != STATUS_SUCCESS) {
1692 retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE,
1694 if (retval != STATUS_SUCCESS) {
1699 ms_set_err_code(chip, MS_NO_ERROR);
1701 if (CHK_MS4BIT(ms_card))
1707 data[2] = (u8)(phy_blk >> 8);
1708 data[3] = (u8)phy_blk;
1711 data[6] = extra[0] & 0x7F;
1714 retval = ms_write_bytes(chip, WRITE_REG, 7, NO_WAIT_INT, data, 7);
1715 if (retval != STATUS_SUCCESS) {
1720 retval = ms_send_cmd(chip, BLOCK_WRITE, WAIT_INT);
1721 if (retval != STATUS_SUCCESS) {
1726 ms_set_err_code(chip, MS_NO_ERROR);
1727 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
1728 if (retval != STATUS_SUCCESS) {
1733 if (val & INT_REG_CMDNK) {
1734 ms_set_err_code(chip, MS_CMD_NK);
1739 if (val & INT_REG_CED) {
1740 if (val & INT_REG_ERR) {
1741 ms_set_err_code(chip, MS_FLASH_WRITE_ERROR);
1747 return STATUS_SUCCESS;
1750 static int ms_erase_block(struct rtsx_chip *chip, u16 phy_blk)
1752 struct ms_info *ms_card = &chip->ms_card;
1756 retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE,
1758 if (retval != STATUS_SUCCESS) {
1763 ms_set_err_code(chip, MS_NO_ERROR);
1765 if (CHK_MS4BIT(ms_card))
1771 data[2] = (u8)(phy_blk >> 8);
1772 data[3] = (u8)phy_blk;
1776 retval = ms_write_bytes(chip, WRITE_REG, 6, NO_WAIT_INT, data, 6);
1777 if (retval != STATUS_SUCCESS) {
1783 retval = ms_send_cmd(chip, BLOCK_ERASE, WAIT_INT);
1784 if (retval != STATUS_SUCCESS) {
1789 ms_set_err_code(chip, MS_NO_ERROR);
1790 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
1791 if (retval != STATUS_SUCCESS) {
1796 if (val & INT_REG_CMDNK) {
1802 ms_set_err_code(chip, MS_CMD_NK);
1803 ms_set_bad_block(chip, phy_blk);
1808 if (val & INT_REG_CED) {
1809 if (val & INT_REG_ERR) {
1810 ms_set_err_code(chip, MS_FLASH_WRITE_ERROR);
1816 return STATUS_SUCCESS;
1819 static void ms_set_page_status(u16 log_blk, u8 type, u8 *extra, int extra_len)
1821 if (!extra || (extra_len < MS_EXTRA_SIZE))
1824 memset(extra, 0xFF, MS_EXTRA_SIZE);
1826 if (type == setPS_NG) {
1827 /* set page status as 1:NG,and block status keep 1:OK */
1830 /* set page status as 0:Data Error,and block status keep 1:OK */
1834 extra[2] = (u8)(log_blk >> 8);
1835 extra[3] = (u8)log_blk;
1838 static int ms_init_page(struct rtsx_chip *chip, u16 phy_blk, u16 log_blk,
1839 u8 start_page, u8 end_page)
1842 u8 extra[MS_EXTRA_SIZE], i;
1844 memset(extra, 0xff, MS_EXTRA_SIZE);
1846 extra[0] = 0xf8; /* Block, page OK, data erased */
1848 extra[2] = (u8)(log_blk >> 8);
1849 extra[3] = (u8)log_blk;
1851 for (i = start_page; i < end_page; i++) {
1852 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
1853 ms_set_err_code(chip, MS_NO_CARD);
1858 retval = ms_write_extra_data(chip, phy_blk, i,
1859 extra, MS_EXTRA_SIZE);
1860 if (retval != STATUS_SUCCESS) {
1866 return STATUS_SUCCESS;
1869 static int ms_copy_page(struct rtsx_chip *chip, u16 old_blk, u16 new_blk,
1870 u16 log_blk, u8 start_page, u8 end_page)
1872 struct ms_info *ms_card = &chip->ms_card;
1873 bool uncorrect_flag = false;
1874 int retval, rty_cnt;
1875 u8 extra[MS_EXTRA_SIZE], val, i, j, data[16];
1877 dev_dbg(rtsx_dev(chip), "Copy page from 0x%x to 0x%x, logical block is 0x%x\n",
1878 old_blk, new_blk, log_blk);
1879 dev_dbg(rtsx_dev(chip), "start_page = %d, end_page = %d\n",
1880 start_page, end_page);
1882 retval = ms_read_extra_data(chip, new_blk, 0, extra, MS_EXTRA_SIZE);
1883 if (retval != STATUS_SUCCESS) {
1888 retval = ms_read_status_reg(chip);
1889 if (retval != STATUS_SUCCESS) {
1894 retval = rtsx_read_register(chip, PPBUF_BASE2, &val);
1900 if (val & BUF_FULL) {
1901 retval = ms_send_cmd(chip, CLEAR_BUF, WAIT_INT);
1902 if (retval != STATUS_SUCCESS) {
1907 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
1908 if (retval != STATUS_SUCCESS) {
1913 if (!(val & INT_REG_CED)) {
1914 ms_set_err_code(chip, MS_FLASH_WRITE_ERROR);
1920 for (i = start_page; i < end_page; i++) {
1921 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
1922 ms_set_err_code(chip, MS_NO_CARD);
1927 ms_read_extra_data(chip, old_blk, i, extra, MS_EXTRA_SIZE);
1929 retval = ms_set_rw_reg_addr(chip, OverwriteFlag,
1930 MS_EXTRA_SIZE, SystemParm, 6);
1931 if (retval != STATUS_SUCCESS) {
1936 ms_set_err_code(chip, MS_NO_ERROR);
1938 if (CHK_MS4BIT(ms_card))
1944 data[2] = (u8)(old_blk >> 8);
1945 data[3] = (u8)old_blk;
1949 retval = ms_write_bytes(chip, WRITE_REG, 6, NO_WAIT_INT,
1951 if (retval != STATUS_SUCCESS) {
1956 retval = ms_send_cmd(chip, BLOCK_READ, WAIT_INT);
1957 if (retval != STATUS_SUCCESS) {
1962 ms_set_err_code(chip, MS_NO_ERROR);
1963 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
1964 if (retval != STATUS_SUCCESS) {
1969 if (val & INT_REG_CMDNK) {
1970 ms_set_err_code(chip, MS_CMD_NK);
1975 if (val & INT_REG_CED) {
1976 if (val & INT_REG_ERR) {
1977 retval = ms_read_status_reg(chip);
1978 if (retval != STATUS_SUCCESS) {
1979 uncorrect_flag = true;
1980 dev_dbg(rtsx_dev(chip), "Uncorrectable error\n");
1982 uncorrect_flag = false;
1985 retval = ms_transfer_tpc(chip,
1989 if (retval != STATUS_SUCCESS) {
1994 if (uncorrect_flag) {
1995 ms_set_page_status(log_blk, setPS_NG,
2001 ms_write_extra_data(chip, old_blk, i,
2004 dev_dbg(rtsx_dev(chip), "page %d : extra[0] = 0x%x\n",
2006 MS_SET_BAD_BLOCK_FLG(ms_card);
2008 ms_set_page_status(log_blk, setPS_Error,
2011 ms_write_extra_data(chip, new_blk, i,
2017 for (rty_cnt = 0; rty_cnt < MS_MAX_RETRY_COUNT;
2019 retval = ms_transfer_tpc(
2024 if (retval == STATUS_SUCCESS)
2027 if (rty_cnt == MS_MAX_RETRY_COUNT) {
2033 if (!(val & INT_REG_BREQ)) {
2034 ms_set_err_code(chip, MS_BREQ_ERROR);
2040 retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE,
2041 SystemParm, (6 + MS_EXTRA_SIZE));
2043 ms_set_err_code(chip, MS_NO_ERROR);
2045 if (CHK_MS4BIT(ms_card))
2051 data[2] = (u8)(new_blk >> 8);
2052 data[3] = (u8)new_blk;
2056 if ((extra[0] & 0x60) != 0x60)
2062 data[6 + 2] = (u8)(log_blk >> 8);
2063 data[6 + 3] = (u8)log_blk;
2065 for (j = 4; j <= MS_EXTRA_SIZE; j++)
2068 retval = ms_write_bytes(chip, WRITE_REG, (6 + MS_EXTRA_SIZE),
2069 NO_WAIT_INT, data, 16);
2070 if (retval != STATUS_SUCCESS) {
2075 retval = ms_send_cmd(chip, BLOCK_WRITE, WAIT_INT);
2076 if (retval != STATUS_SUCCESS) {
2081 ms_set_err_code(chip, MS_NO_ERROR);
2082 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
2083 if (retval != STATUS_SUCCESS) {
2088 if (val & INT_REG_CMDNK) {
2089 ms_set_err_code(chip, MS_CMD_NK);
2094 if (val & INT_REG_CED) {
2095 if (val & INT_REG_ERR) {
2096 ms_set_err_code(chip, MS_FLASH_WRITE_ERROR);
2103 retval = ms_set_rw_reg_addr(chip, OverwriteFlag,
2104 MS_EXTRA_SIZE, SystemParm,
2106 if (retval != STATUS_SUCCESS) {
2111 ms_set_err_code(chip, MS_NO_ERROR);
2113 if (CHK_MS4BIT(ms_card))
2119 data[2] = (u8)(old_blk >> 8);
2120 data[3] = (u8)old_blk;
2126 retval = ms_write_bytes(chip, WRITE_REG, 7,
2127 NO_WAIT_INT, data, 8);
2128 if (retval != STATUS_SUCCESS) {
2133 retval = ms_send_cmd(chip, BLOCK_WRITE, WAIT_INT);
2134 if (retval != STATUS_SUCCESS) {
2139 ms_set_err_code(chip, MS_NO_ERROR);
2140 retval = ms_read_bytes(chip, GET_INT, 1,
2141 NO_WAIT_INT, &val, 1);
2142 if (retval != STATUS_SUCCESS) {
2147 if (val & INT_REG_CMDNK) {
2148 ms_set_err_code(chip, MS_CMD_NK);
2153 if (val & INT_REG_CED) {
2154 if (val & INT_REG_ERR) {
2155 ms_set_err_code(chip,
2156 MS_FLASH_WRITE_ERROR);
2164 return STATUS_SUCCESS;
2167 static int reset_ms(struct rtsx_chip *chip)
2169 struct ms_info *ms_card = &chip->ms_card;
2171 u16 i, reg_addr, block_size;
2172 u8 val, extra[MS_EXTRA_SIZE], j, *ptr;
2173 #ifndef SUPPORT_MAGIC_GATE
2177 retval = ms_prepare_reset(chip);
2178 if (retval != STATUS_SUCCESS) {
2183 ms_card->ms_type |= TYPE_MS;
2185 retval = ms_send_cmd(chip, MS_RESET, NO_WAIT_INT);
2186 if (retval != STATUS_SUCCESS) {
2191 retval = ms_read_status_reg(chip);
2192 if (retval != STATUS_SUCCESS) {
2197 retval = rtsx_read_register(chip, PPBUF_BASE2, &val);
2202 if (val & WRT_PRTCT)
2203 chip->card_wp |= MS_CARD;
2205 chip->card_wp &= ~MS_CARD;
2210 /* Search Boot Block */
2211 while (i < (MAX_DEFECTIVE_BLOCK + 2)) {
2212 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
2213 ms_set_err_code(chip, MS_NO_CARD);
2218 retval = ms_read_extra_data(chip, i, 0, extra, MS_EXTRA_SIZE);
2219 if (retval != STATUS_SUCCESS) {
2224 if (extra[0] & BLOCK_OK) {
2225 if (!(extra[1] & NOT_BOOT_BLOCK)) {
2226 ms_card->boot_block = i;
2233 if (i == (MAX_DEFECTIVE_BLOCK + 2)) {
2234 dev_dbg(rtsx_dev(chip), "No boot block found!");
2239 for (j = 0; j < 3; j++) {
2240 retval = ms_read_page(chip, ms_card->boot_block, j);
2241 if (retval != STATUS_SUCCESS) {
2242 if (ms_check_err_code(chip, MS_FLASH_WRITE_ERROR)) {
2243 i = ms_card->boot_block + 1;
2244 ms_set_err_code(chip, MS_NO_ERROR);
2250 retval = ms_read_page(chip, ms_card->boot_block, 0);
2251 if (retval != STATUS_SUCCESS) {
2256 /* Read MS system information as sys_info */
2257 rtsx_init_cmd(chip);
2259 for (i = 0; i < 96; i++)
2260 rtsx_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2 + 0x1A0 + i, 0, 0);
2262 retval = rtsx_send_cmd(chip, MS_CARD, 100);
2268 ptr = rtsx_get_cmd_data(chip);
2269 memcpy(ms_card->raw_sys_info, ptr, 96);
2271 /* Read useful block contents */
2272 rtsx_init_cmd(chip);
2274 rtsx_add_cmd(chip, READ_REG_CMD, HEADER_ID0, 0, 0);
2275 rtsx_add_cmd(chip, READ_REG_CMD, HEADER_ID1, 0, 0);
2277 for (reg_addr = DISABLED_BLOCK0; reg_addr <= DISABLED_BLOCK3;
2279 rtsx_add_cmd(chip, READ_REG_CMD, reg_addr, 0, 0);
2281 for (reg_addr = BLOCK_SIZE_0; reg_addr <= PAGE_SIZE_1; reg_addr++)
2282 rtsx_add_cmd(chip, READ_REG_CMD, reg_addr, 0, 0);
2284 rtsx_add_cmd(chip, READ_REG_CMD, MS_Device_Type, 0, 0);
2285 rtsx_add_cmd(chip, READ_REG_CMD, MS_4bit_Support, 0, 0);
2287 retval = rtsx_send_cmd(chip, MS_CARD, 100);
2293 ptr = rtsx_get_cmd_data(chip);
2295 dev_dbg(rtsx_dev(chip), "Boot block data:\n");
2296 dev_dbg(rtsx_dev(chip), "%*ph\n", 16, ptr);
2299 * HEADER_ID0, HEADER_ID1
2301 if (ptr[0] != 0x00 || ptr[1] != 0x01) {
2302 i = ms_card->boot_block + 1;
2307 * PAGE_SIZE_0, PAGE_SIZE_1
2309 if (ptr[12] != 0x02 || ptr[13] != 0x00) {
2310 i = ms_card->boot_block + 1;
2314 if ((ptr[14] == 1) || (ptr[14] == 3))
2315 chip->card_wp |= MS_CARD;
2317 /* BLOCK_SIZE_0, BLOCK_SIZE_1 */
2318 block_size = ((u16)ptr[6] << 8) | ptr[7];
2319 if (block_size == 0x0010) {
2320 /* Block size 16KB */
2321 ms_card->block_shift = 5;
2322 ms_card->page_off = 0x1F;
2323 } else if (block_size == 0x0008) {
2324 /* Block size 8KB */
2325 ms_card->block_shift = 4;
2326 ms_card->page_off = 0x0F;
2329 /* BLOCK_COUNT_0, BLOCK_COUNT_1 */
2330 ms_card->total_block = ((u16)ptr[8] << 8) | ptr[9];
2332 #ifdef SUPPORT_MAGIC_GATE
2335 if (ms_card->block_shift == 4) { /* 4MB or 8MB */
2336 if (j < 2) { /* Effective block for 4MB: 0x1F0 */
2337 ms_card->capacity = 0x1EE0;
2338 } else { /* Effective block for 8MB: 0x3E0 */
2339 ms_card->capacity = 0x3DE0;
2341 } else { /* 16MB, 32MB, 64MB or 128MB */
2342 if (j < 5) { /* Effective block for 16MB: 0x3E0 */
2343 ms_card->capacity = 0x7BC0;
2344 } else if (j < 0xA) { /* Effective block for 32MB: 0x7C0 */
2345 ms_card->capacity = 0xF7C0;
2346 } else if (j < 0x11) { /* Effective block for 64MB: 0xF80 */
2347 ms_card->capacity = 0x1EF80;
2348 } else { /* Effective block for 128MB: 0x1F00 */
2349 ms_card->capacity = 0x3DF00;
2353 /* EBLOCK_COUNT_0, EBLOCK_COUNT_1 */
2354 eblock_cnt = ((u16)ptr[10] << 8) | ptr[11];
2356 ms_card->capacity = ((u32)eblock_cnt - 2) << ms_card->block_shift;
2359 chip->capacity[chip->card2lun[MS_CARD]] = ms_card->capacity;
2361 /* Switch I/F Mode */
2363 retval = ms_set_rw_reg_addr(chip, 0, 0, SystemParm, 1);
2364 if (retval != STATUS_SUCCESS) {
2369 retval = rtsx_write_register(chip, PPBUF_BASE2, 0xFF, 0x88);
2374 retval = rtsx_write_register(chip, PPBUF_BASE2 + 1, 0xFF, 0);
2380 retval = ms_transfer_tpc(chip, MS_TM_WRITE_BYTES, WRITE_REG, 1,
2382 if (retval != STATUS_SUCCESS) {
2387 retval = rtsx_write_register(chip, MS_CFG,
2388 0x58 | MS_NO_CHECK_INT,
2397 ms_card->ms_type |= MS_4BIT;
2400 if (CHK_MS4BIT(ms_card))
2401 chip->card_bus_width[chip->card2lun[MS_CARD]] = 4;
2403 chip->card_bus_width[chip->card2lun[MS_CARD]] = 1;
2405 return STATUS_SUCCESS;
2408 static int ms_init_l2p_tbl(struct rtsx_chip *chip)
2410 struct ms_info *ms_card = &chip->ms_card;
2411 int size, i, seg_no, retval;
2412 u16 defect_block, reg_addr;
2415 ms_card->segment_cnt = ms_card->total_block >> 9;
2416 dev_dbg(rtsx_dev(chip), "ms_card->segment_cnt = %d\n",
2417 ms_card->segment_cnt);
2419 size = ms_card->segment_cnt * sizeof(struct zone_entry);
2420 ms_card->segment = vzalloc(size);
2421 if (!ms_card->segment) {
2426 retval = ms_read_page(chip, ms_card->boot_block, 1);
2427 if (retval != STATUS_SUCCESS) {
2432 reg_addr = PPBUF_BASE2;
2433 for (i = 0; i < (((ms_card->total_block >> 9) * 10) + 1); i++) {
2436 retval = rtsx_read_register(chip, reg_addr++, &val1);
2437 if (retval != STATUS_SUCCESS) {
2442 retval = rtsx_read_register(chip, reg_addr++, &val2);
2443 if (retval != STATUS_SUCCESS) {
2448 defect_block = ((u16)val1 << 8) | val2;
2449 if (defect_block == 0xFFFF)
2452 seg_no = defect_block / 512;
2454 block_no = ms_card->segment[seg_no].disable_count++;
2455 ms_card->segment[seg_no].defect_list[block_no] = defect_block;
2458 for (i = 0; i < ms_card->segment_cnt; i++) {
2459 ms_card->segment[i].build_flag = 0;
2460 ms_card->segment[i].l2p_table = NULL;
2461 ms_card->segment[i].free_table = NULL;
2462 ms_card->segment[i].get_index = 0;
2463 ms_card->segment[i].set_index = 0;
2464 ms_card->segment[i].unused_blk_cnt = 0;
2466 dev_dbg(rtsx_dev(chip), "defective block count of segment %d is %d\n",
2467 i, ms_card->segment[i].disable_count);
2470 return STATUS_SUCCESS;
2473 vfree(ms_card->segment);
2474 ms_card->segment = NULL;
2479 static u16 ms_get_l2p_tbl(struct rtsx_chip *chip, int seg_no, u16 log_off)
2481 struct ms_info *ms_card = &chip->ms_card;
2482 struct zone_entry *segment;
2484 if (!ms_card->segment)
2487 segment = &ms_card->segment[seg_no];
2489 if (segment->l2p_table)
2490 return segment->l2p_table[log_off];
2495 static void ms_set_l2p_tbl(struct rtsx_chip *chip,
2496 int seg_no, u16 log_off, u16 phy_blk)
2498 struct ms_info *ms_card = &chip->ms_card;
2499 struct zone_entry *segment;
2501 if (!ms_card->segment)
2504 segment = &ms_card->segment[seg_no];
2505 if (segment->l2p_table)
2506 segment->l2p_table[log_off] = phy_blk;
2509 static void ms_set_unused_block(struct rtsx_chip *chip, u16 phy_blk)
2511 struct ms_info *ms_card = &chip->ms_card;
2512 struct zone_entry *segment;
2515 seg_no = (int)phy_blk >> 9;
2516 segment = &ms_card->segment[seg_no];
2518 segment->free_table[segment->set_index++] = phy_blk;
2519 if (segment->set_index >= MS_FREE_TABLE_CNT)
2520 segment->set_index = 0;
2522 segment->unused_blk_cnt++;
2525 static u16 ms_get_unused_block(struct rtsx_chip *chip, int seg_no)
2527 struct ms_info *ms_card = &chip->ms_card;
2528 struct zone_entry *segment;
2531 segment = &ms_card->segment[seg_no];
2533 if (segment->unused_blk_cnt <= 0)
2536 phy_blk = segment->free_table[segment->get_index];
2537 segment->free_table[segment->get_index++] = 0xFFFF;
2538 if (segment->get_index >= MS_FREE_TABLE_CNT)
2539 segment->get_index = 0;
2541 segment->unused_blk_cnt--;
2546 static const unsigned short ms_start_idx[] = {0, 494, 990, 1486, 1982, 2478,
2547 2974, 3470, 3966, 4462, 4958,
2548 5454, 5950, 6446, 6942, 7438,
2551 static int ms_arbitrate_l2p(struct rtsx_chip *chip, u16 phy_blk,
2552 u16 log_off, u8 us1, u8 us2)
2554 struct ms_info *ms_card = &chip->ms_card;
2555 struct zone_entry *segment;
2559 seg_no = (int)phy_blk >> 9;
2560 segment = &ms_card->segment[seg_no];
2561 tmp_blk = segment->l2p_table[log_off];
2565 if (!(chip->card_wp & MS_CARD))
2566 ms_erase_block(chip, tmp_blk);
2568 ms_set_unused_block(chip, tmp_blk);
2569 segment->l2p_table[log_off] = phy_blk;
2571 if (!(chip->card_wp & MS_CARD))
2572 ms_erase_block(chip, phy_blk);
2574 ms_set_unused_block(chip, phy_blk);
2577 if (phy_blk < tmp_blk) {
2578 if (!(chip->card_wp & MS_CARD))
2579 ms_erase_block(chip, phy_blk);
2581 ms_set_unused_block(chip, phy_blk);
2583 if (!(chip->card_wp & MS_CARD))
2584 ms_erase_block(chip, tmp_blk);
2586 ms_set_unused_block(chip, tmp_blk);
2587 segment->l2p_table[log_off] = phy_blk;
2591 return STATUS_SUCCESS;
2594 static int ms_build_l2p_tbl(struct rtsx_chip *chip, int seg_no)
2596 struct ms_info *ms_card = &chip->ms_card;
2597 struct zone_entry *segment;
2599 int retval, table_size, disable_cnt, i;
2600 u16 start, end, phy_blk, log_blk, tmp_blk, idx;
2601 u8 extra[MS_EXTRA_SIZE], us1, us2;
2603 dev_dbg(rtsx_dev(chip), "ms_build_l2p_tbl: %d\n", seg_no);
2605 if (!ms_card->segment) {
2606 retval = ms_init_l2p_tbl(chip);
2607 if (retval != STATUS_SUCCESS) {
2613 if (ms_card->segment[seg_no].build_flag) {
2614 dev_dbg(rtsx_dev(chip), "l2p table of segment %d has been built\n",
2616 return STATUS_SUCCESS;
2624 segment = &ms_card->segment[seg_no];
2626 if (!segment->l2p_table) {
2627 segment->l2p_table = vmalloc(table_size * 2);
2628 if (!segment->l2p_table) {
2633 memset((u8 *)(segment->l2p_table), 0xff, table_size * 2);
2635 if (!segment->free_table) {
2636 segment->free_table = vmalloc(MS_FREE_TABLE_CNT * 2);
2637 if (!segment->free_table) {
2642 memset((u8 *)(segment->free_table), 0xff, MS_FREE_TABLE_CNT * 2);
2644 start = (u16)seg_no << 9;
2645 end = (u16)(seg_no + 1) << 9;
2647 disable_cnt = segment->disable_count;
2649 segment->get_index = 0;
2650 segment->set_index = 0;
2651 segment->unused_blk_cnt = 0;
2653 for (phy_blk = start; phy_blk < end; phy_blk++) {
2655 defect_flag = false;
2656 for (i = 0; i < segment->disable_count; i++) {
2657 if (phy_blk == segment->defect_list[i]) {
2668 retval = ms_read_extra_data(chip, phy_blk, 0,
2669 extra, MS_EXTRA_SIZE);
2670 if (retval != STATUS_SUCCESS) {
2671 dev_dbg(rtsx_dev(chip), "read extra data fail\n");
2672 ms_set_bad_block(chip, phy_blk);
2676 if (seg_no == ms_card->segment_cnt - 1) {
2677 if (!(extra[1] & NOT_TRANSLATION_TABLE)) {
2678 if (!(chip->card_wp & MS_CARD)) {
2679 retval = ms_erase_block(chip, phy_blk);
2680 if (retval != STATUS_SUCCESS)
2688 if (!(extra[0] & BLOCK_OK))
2690 if (!(extra[1] & NOT_BOOT_BLOCK))
2692 if ((extra[0] & PAGE_OK) != PAGE_OK)
2695 log_blk = ((u16)extra[2] << 8) | extra[3];
2697 if (log_blk == 0xFFFF) {
2698 if (!(chip->card_wp & MS_CARD)) {
2699 retval = ms_erase_block(chip, phy_blk);
2700 if (retval != STATUS_SUCCESS)
2703 ms_set_unused_block(chip, phy_blk);
2707 if ((log_blk < ms_start_idx[seg_no]) ||
2708 (log_blk >= ms_start_idx[seg_no + 1])) {
2709 if (!(chip->card_wp & MS_CARD)) {
2710 retval = ms_erase_block(chip, phy_blk);
2711 if (retval != STATUS_SUCCESS)
2714 ms_set_unused_block(chip, phy_blk);
2718 idx = log_blk - ms_start_idx[seg_no];
2720 if (segment->l2p_table[idx] == 0xFFFF) {
2721 segment->l2p_table[idx] = phy_blk;
2725 us1 = extra[0] & 0x10;
2726 tmp_blk = segment->l2p_table[idx];
2727 retval = ms_read_extra_data(chip, tmp_blk, 0,
2728 extra, MS_EXTRA_SIZE);
2729 if (retval != STATUS_SUCCESS)
2731 us2 = extra[0] & 0x10;
2733 (void)ms_arbitrate_l2p(chip, phy_blk,
2734 log_blk - ms_start_idx[seg_no], us1, us2);
2738 segment->build_flag = 1;
2740 dev_dbg(rtsx_dev(chip), "unused block count: %d\n",
2741 segment->unused_blk_cnt);
2743 /* Logical Address Confirmation Process */
2744 if (seg_no == ms_card->segment_cnt - 1) {
2745 if (segment->unused_blk_cnt < 2)
2746 chip->card_wp |= MS_CARD;
2748 if (segment->unused_blk_cnt < 1)
2749 chip->card_wp |= MS_CARD;
2752 if (chip->card_wp & MS_CARD)
2753 return STATUS_SUCCESS;
2755 for (log_blk = ms_start_idx[seg_no];
2756 log_blk < ms_start_idx[seg_no + 1]; log_blk++) {
2757 idx = log_blk - ms_start_idx[seg_no];
2758 if (segment->l2p_table[idx] == 0xFFFF) {
2759 phy_blk = ms_get_unused_block(chip, seg_no);
2760 if (phy_blk == 0xFFFF) {
2761 chip->card_wp |= MS_CARD;
2762 return STATUS_SUCCESS;
2764 retval = ms_init_page(chip, phy_blk, log_blk, 0, 1);
2765 if (retval != STATUS_SUCCESS) {
2770 segment->l2p_table[idx] = phy_blk;
2771 if (seg_no == ms_card->segment_cnt - 1) {
2772 if (segment->unused_blk_cnt < 2) {
2773 chip->card_wp |= MS_CARD;
2774 return STATUS_SUCCESS;
2777 if (segment->unused_blk_cnt < 1) {
2778 chip->card_wp |= MS_CARD;
2779 return STATUS_SUCCESS;
2785 /* Make boot block be the first normal block */
2787 for (log_blk = 0; log_blk < 494; log_blk++) {
2788 tmp_blk = segment->l2p_table[log_blk];
2789 if (tmp_blk < ms_card->boot_block) {
2790 dev_dbg(rtsx_dev(chip), "Boot block is not the first normal block.\n");
2792 if (chip->card_wp & MS_CARD)
2795 phy_blk = ms_get_unused_block(chip, 0);
2796 retval = ms_copy_page(chip, tmp_blk, phy_blk,
2798 ms_card->page_off + 1);
2799 if (retval != STATUS_SUCCESS) {
2804 segment->l2p_table[log_blk] = phy_blk;
2806 retval = ms_set_bad_block(chip, tmp_blk);
2807 if (retval != STATUS_SUCCESS) {
2815 return STATUS_SUCCESS;
2818 segment->build_flag = 0;
2819 vfree(segment->l2p_table);
2820 segment->l2p_table = NULL;
2821 vfree(segment->free_table);
2822 segment->free_table = NULL;
2827 int reset_ms_card(struct rtsx_chip *chip)
2829 struct ms_info *ms_card = &chip->ms_card;
2832 memset(ms_card, 0, sizeof(struct ms_info));
2834 retval = enable_card_clock(chip, MS_CARD);
2835 if (retval != STATUS_SUCCESS) {
2840 retval = select_card(chip, MS_CARD);
2841 if (retval != STATUS_SUCCESS) {
2846 ms_card->ms_type = 0;
2848 retval = reset_ms_pro(chip);
2849 if (retval != STATUS_SUCCESS) {
2850 if (ms_card->check_ms_flow) {
2851 retval = reset_ms(chip);
2852 if (retval != STATUS_SUCCESS) {
2862 retval = ms_set_init_para(chip);
2863 if (retval != STATUS_SUCCESS) {
2868 if (!CHK_MSPRO(ms_card)) {
2869 /* Build table for the last segment,
2870 * to check if L2P table block exists, erasing it
2872 retval = ms_build_l2p_tbl(chip, ms_card->total_block / 512 - 1);
2873 if (retval != STATUS_SUCCESS) {
2879 dev_dbg(rtsx_dev(chip), "ms_card->ms_type = 0x%x\n", ms_card->ms_type);
2881 return STATUS_SUCCESS;
2884 static int mspro_set_rw_cmd(struct rtsx_chip *chip,
2885 u32 start_sec, u16 sec_cnt, u8 cmd)
2891 data[1] = (u8)(sec_cnt >> 8);
2892 data[2] = (u8)sec_cnt;
2893 data[3] = (u8)(start_sec >> 24);
2894 data[4] = (u8)(start_sec >> 16);
2895 data[5] = (u8)(start_sec >> 8);
2896 data[6] = (u8)start_sec;
2899 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
2900 retval = ms_write_bytes(chip, PRO_EX_SET_CMD, 7,
2902 if (retval == STATUS_SUCCESS)
2905 if (i == MS_MAX_RETRY_COUNT) {
2910 return STATUS_SUCCESS;
2913 void mspro_stop_seq_mode(struct rtsx_chip *chip)
2915 struct ms_info *ms_card = &chip->ms_card;
2918 if (ms_card->seq_mode) {
2919 retval = ms_switch_clock(chip);
2920 if (retval != STATUS_SUCCESS)
2923 ms_card->seq_mode = 0;
2924 ms_card->total_sec_cnt = 0;
2925 ms_send_cmd(chip, PRO_STOP, WAIT_INT);
2927 rtsx_write_register(chip, RBCTL, RB_FLUSH, RB_FLUSH);
2931 static inline int ms_auto_tune_clock(struct rtsx_chip *chip)
2933 struct ms_info *ms_card = &chip->ms_card;
2936 if (chip->asic_code) {
2937 if (ms_card->ms_clock > 30)
2938 ms_card->ms_clock -= 20;
2940 if (ms_card->ms_clock == CLK_80)
2941 ms_card->ms_clock = CLK_60;
2942 else if (ms_card->ms_clock == CLK_60)
2943 ms_card->ms_clock = CLK_40;
2946 retval = ms_switch_clock(chip);
2947 if (retval != STATUS_SUCCESS) {
2952 return STATUS_SUCCESS;
2955 static int mspro_rw_multi_sector(struct scsi_cmnd *srb,
2956 struct rtsx_chip *chip, u32 start_sector,
2959 struct ms_info *ms_card = &chip->ms_card;
2960 bool mode_2k = false;
2963 u8 val, trans_mode, rw_tpc, rw_cmd;
2965 ms_set_err_code(chip, MS_NO_ERROR);
2967 ms_card->cleanup_counter = 0;
2969 if (CHK_MSHG(ms_card)) {
2970 if ((start_sector % 4) || (sector_cnt % 4)) {
2971 if (srb->sc_data_direction == DMA_FROM_DEVICE) {
2972 rw_tpc = PRO_READ_LONG_DATA;
2973 rw_cmd = PRO_READ_DATA;
2975 rw_tpc = PRO_WRITE_LONG_DATA;
2976 rw_cmd = PRO_WRITE_DATA;
2979 if (srb->sc_data_direction == DMA_FROM_DEVICE) {
2980 rw_tpc = PRO_READ_QUAD_DATA;
2981 rw_cmd = PRO_READ_2K_DATA;
2983 rw_tpc = PRO_WRITE_QUAD_DATA;
2984 rw_cmd = PRO_WRITE_2K_DATA;
2989 if (srb->sc_data_direction == DMA_FROM_DEVICE) {
2990 rw_tpc = PRO_READ_LONG_DATA;
2991 rw_cmd = PRO_READ_DATA;
2993 rw_tpc = PRO_WRITE_LONG_DATA;
2994 rw_cmd = PRO_WRITE_DATA;
2998 retval = ms_switch_clock(chip);
2999 if (retval != STATUS_SUCCESS) {
3004 if (srb->sc_data_direction == DMA_FROM_DEVICE)
3005 trans_mode = MS_TM_AUTO_READ;
3007 trans_mode = MS_TM_AUTO_WRITE;
3009 retval = rtsx_read_register(chip, MS_TRANS_CFG, &val);
3015 if (ms_card->seq_mode) {
3016 if ((ms_card->pre_dir != srb->sc_data_direction) ||
3017 ((ms_card->pre_sec_addr + ms_card->pre_sec_cnt) !=
3019 (mode_2k && (ms_card->seq_mode & MODE_512_SEQ)) ||
3020 (!mode_2k && (ms_card->seq_mode & MODE_2K_SEQ)) ||
3021 !(val & MS_INT_BREQ) ||
3022 ((ms_card->total_sec_cnt + sector_cnt) > 0xFE00)) {
3023 ms_card->seq_mode = 0;
3024 ms_card->total_sec_cnt = 0;
3025 if (val & MS_INT_BREQ) {
3026 retval = ms_send_cmd(chip, PRO_STOP, WAIT_INT);
3027 if (retval != STATUS_SUCCESS) {
3032 rtsx_write_register(chip, RBCTL, RB_FLUSH,
3038 if (!ms_card->seq_mode) {
3039 ms_card->total_sec_cnt = 0;
3040 if (sector_cnt >= SEQ_START_CRITERIA) {
3041 if ((ms_card->capacity - start_sector) > 0xFE00)
3044 count = (u16)(ms_card->capacity - start_sector);
3046 if (count > sector_cnt) {
3048 ms_card->seq_mode = MODE_2K_SEQ;
3050 ms_card->seq_mode = MODE_512_SEQ;
3055 retval = mspro_set_rw_cmd(chip, start_sector, count, rw_cmd);
3056 if (retval != STATUS_SUCCESS) {
3057 ms_card->seq_mode = 0;
3063 retval = ms_transfer_data(chip, trans_mode, rw_tpc, sector_cnt,
3064 WAIT_INT, mode_2k, scsi_sg_count(srb),
3065 scsi_sglist(srb), scsi_bufflen(srb));
3066 if (retval != STATUS_SUCCESS) {
3067 ms_card->seq_mode = 0;
3068 rtsx_read_register(chip, MS_TRANS_CFG, &val);
3069 rtsx_clear_ms_error(chip);
3071 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
3072 chip->rw_need_retry = 0;
3073 dev_dbg(rtsx_dev(chip), "No card exist, exit mspro_rw_multi_sector\n");
3078 if (val & MS_INT_BREQ)
3079 ms_send_cmd(chip, PRO_STOP, WAIT_INT);
3081 if (val & (MS_CRC16_ERR | MS_RDY_TIMEOUT)) {
3082 dev_dbg(rtsx_dev(chip), "MSPro CRC error, tune clock!\n");
3083 chip->rw_need_retry = 1;
3084 ms_auto_tune_clock(chip);
3091 if (ms_card->seq_mode) {
3092 ms_card->pre_sec_addr = start_sector;
3093 ms_card->pre_sec_cnt = sector_cnt;
3094 ms_card->pre_dir = srb->sc_data_direction;
3095 ms_card->total_sec_cnt += sector_cnt;
3098 return STATUS_SUCCESS;
3101 static int mspro_read_format_progress(struct rtsx_chip *chip,
3102 const int short_data_len)
3104 struct ms_info *ms_card = &chip->ms_card;
3106 u32 total_progress, cur_progress;
3110 dev_dbg(rtsx_dev(chip), "mspro_read_format_progress, short_data_len = %d\n",
3113 retval = ms_switch_clock(chip);
3114 if (retval != STATUS_SUCCESS) {
3115 ms_card->format_status = FORMAT_FAIL;
3120 retval = rtsx_read_register(chip, MS_TRANS_CFG, &tmp);
3121 if (retval != STATUS_SUCCESS) {
3122 ms_card->format_status = FORMAT_FAIL;
3127 if (!(tmp & MS_INT_BREQ)) {
3128 if ((tmp & (MS_INT_CED | MS_INT_BREQ | MS_INT_CMDNK |
3129 MS_INT_ERR)) == MS_INT_CED) {
3130 ms_card->format_status = FORMAT_SUCCESS;
3131 return STATUS_SUCCESS;
3133 ms_card->format_status = FORMAT_FAIL;
3138 if (short_data_len >= 256)
3141 cnt = (u8)short_data_len;
3143 retval = rtsx_write_register(chip, MS_CFG, MS_NO_CHECK_INT,
3145 if (retval != STATUS_SUCCESS) {
3146 ms_card->format_status = FORMAT_FAIL;
3151 retval = ms_read_bytes(chip, PRO_READ_SHORT_DATA, cnt, WAIT_INT,
3153 if (retval != STATUS_SUCCESS) {
3154 ms_card->format_status = FORMAT_FAIL;
3159 total_progress = (data[0] << 24) | (data[1] << 16) |
3160 (data[2] << 8) | data[3];
3161 cur_progress = (data[4] << 24) | (data[5] << 16) |
3162 (data[6] << 8) | data[7];
3164 dev_dbg(rtsx_dev(chip), "total_progress = %d, cur_progress = %d\n",
3165 total_progress, cur_progress);
3167 if (total_progress == 0) {
3168 ms_card->progress = 0;
3170 u64 ulltmp = (u64)cur_progress * (u64)65535;
3172 do_div(ulltmp, total_progress);
3173 ms_card->progress = (u16)ulltmp;
3175 dev_dbg(rtsx_dev(chip), "progress = %d\n", ms_card->progress);
3177 for (i = 0; i < 5000; i++) {
3178 retval = rtsx_read_register(chip, MS_TRANS_CFG, &tmp);
3179 if (retval != STATUS_SUCCESS) {
3180 ms_card->format_status = FORMAT_FAIL;
3184 if (tmp & (MS_INT_CED | MS_INT_CMDNK |
3185 MS_INT_BREQ | MS_INT_ERR))
3191 retval = rtsx_write_register(chip, MS_CFG, MS_NO_CHECK_INT, 0);
3192 if (retval != STATUS_SUCCESS) {
3193 ms_card->format_status = FORMAT_FAIL;
3199 ms_card->format_status = FORMAT_FAIL;
3204 if (tmp & (MS_INT_CMDNK | MS_INT_ERR)) {
3205 ms_card->format_status = FORMAT_FAIL;
3210 if (tmp & MS_INT_CED) {
3211 ms_card->format_status = FORMAT_SUCCESS;
3212 ms_card->pro_under_formatting = 0;
3213 } else if (tmp & MS_INT_BREQ) {
3214 ms_card->format_status = FORMAT_IN_PROGRESS;
3216 ms_card->format_status = FORMAT_FAIL;
3217 ms_card->pro_under_formatting = 0;
3222 return STATUS_SUCCESS;
3225 void mspro_polling_format_status(struct rtsx_chip *chip)
3227 struct ms_info *ms_card = &chip->ms_card;
3230 if (ms_card->pro_under_formatting &&
3231 (rtsx_get_stat(chip) != RTSX_STAT_SS)) {
3232 rtsx_set_stat(chip, RTSX_STAT_RUN);
3234 for (i = 0; i < 65535; i++) {
3235 mspro_read_format_progress(chip, MS_SHORT_DATA_LEN);
3236 if (ms_card->format_status != FORMAT_IN_PROGRESS)
3242 int mspro_format(struct scsi_cmnd *srb, struct rtsx_chip *chip,
3243 int short_data_len, bool quick_format)
3245 struct ms_info *ms_card = &chip->ms_card;
3250 retval = ms_switch_clock(chip);
3251 if (retval != STATUS_SUCCESS) {
3256 retval = ms_set_rw_reg_addr(chip, 0x00, 0x00, Pro_TPCParm, 0x01);
3257 if (retval != STATUS_SUCCESS) {
3263 switch (short_data_len) {
3279 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
3280 retval = ms_write_bytes(chip, PRO_WRITE_REG, 1,
3281 NO_WAIT_INT, buf, 2);
3282 if (retval == STATUS_SUCCESS)
3285 if (i == MS_MAX_RETRY_COUNT) {
3295 retval = mspro_set_rw_cmd(chip, 0, para, PRO_FORMAT);
3296 if (retval != STATUS_SUCCESS) {
3301 retval = rtsx_read_register(chip, MS_TRANS_CFG, &tmp);
3307 if (tmp & (MS_INT_CMDNK | MS_INT_ERR)) {
3312 if ((tmp & (MS_INT_BREQ | MS_INT_CED)) == MS_INT_BREQ) {
3313 ms_card->pro_under_formatting = 1;
3314 ms_card->progress = 0;
3315 ms_card->format_status = FORMAT_IN_PROGRESS;
3316 return STATUS_SUCCESS;
3319 if (tmp & MS_INT_CED) {
3320 ms_card->pro_under_formatting = 0;
3321 ms_card->progress = 0;
3322 ms_card->format_status = FORMAT_SUCCESS;
3323 set_sense_type(chip, SCSI_LUN(srb), SENSE_TYPE_NO_SENSE);
3324 return STATUS_SUCCESS;
3331 static int ms_read_multiple_pages(struct rtsx_chip *chip, u16 phy_blk,
3332 u16 log_blk, u8 start_page, u8 end_page,
3333 u8 *buf, unsigned int *index,
3334 unsigned int *offset)
3336 struct ms_info *ms_card = &chip->ms_card;
3338 u8 extra[MS_EXTRA_SIZE], page_addr, val, trans_cfg, data[6];
3341 retval = ms_read_extra_data(chip, phy_blk, start_page,
3342 extra, MS_EXTRA_SIZE);
3343 if (retval == STATUS_SUCCESS) {
3344 if ((extra[1] & 0x30) != 0x30) {
3345 ms_set_err_code(chip, MS_FLASH_READ_ERROR);
3351 retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE,
3353 if (retval != STATUS_SUCCESS) {
3358 if (CHK_MS4BIT(ms_card))
3364 data[2] = (u8)(phy_blk >> 8);
3365 data[3] = (u8)phy_blk;
3367 data[5] = start_page;
3369 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
3370 retval = ms_write_bytes(chip, WRITE_REG, 6, NO_WAIT_INT,
3372 if (retval == STATUS_SUCCESS)
3375 if (i == MS_MAX_RETRY_COUNT) {
3380 ms_set_err_code(chip, MS_NO_ERROR);
3382 retval = ms_send_cmd(chip, BLOCK_READ, WAIT_INT);
3383 if (retval != STATUS_SUCCESS) {
3390 for (page_addr = start_page; page_addr < end_page; page_addr++) {
3391 ms_set_err_code(chip, MS_NO_ERROR);
3393 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
3394 ms_set_err_code(chip, MS_NO_CARD);
3399 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
3400 if (retval != STATUS_SUCCESS) {
3405 if (val & INT_REG_CMDNK) {
3406 ms_set_err_code(chip, MS_CMD_NK);
3410 if (val & INT_REG_ERR) {
3411 if (val & INT_REG_BREQ) {
3412 retval = ms_read_status_reg(chip);
3413 if (retval != STATUS_SUCCESS) {
3414 if (!(chip->card_wp & MS_CARD)) {
3425 ms_set_err_code(chip,
3426 MS_FLASH_READ_ERROR);
3431 ms_set_err_code(chip, MS_FLASH_READ_ERROR);
3436 if (!(val & INT_REG_BREQ)) {
3437 ms_set_err_code(chip, MS_BREQ_ERROR);
3443 if (page_addr == (end_page - 1)) {
3444 if (!(val & INT_REG_CED)) {
3445 retval = ms_send_cmd(chip, BLOCK_END, WAIT_INT);
3446 if (retval != STATUS_SUCCESS) {
3452 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT,
3454 if (retval != STATUS_SUCCESS) {
3459 if (!(val & INT_REG_CED)) {
3460 ms_set_err_code(chip, MS_FLASH_READ_ERROR);
3465 trans_cfg = NO_WAIT_INT;
3467 trans_cfg = WAIT_INT;
3470 rtsx_init_cmd(chip);
3472 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TPC, 0xFF, READ_PAGE_DATA);
3473 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANS_CFG,
3475 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE,
3478 trans_dma_enable(DMA_FROM_DEVICE, chip, 512, DMA_512);
3480 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANSFER, 0xFF,
3481 MS_TRANSFER_START | MS_TM_NORMAL_READ);
3482 rtsx_add_cmd(chip, CHECK_REG_CMD, MS_TRANSFER,
3483 MS_TRANSFER_END, MS_TRANSFER_END);
3485 rtsx_send_cmd_no_wait(chip);
3487 retval = rtsx_transfer_data_partial(chip, MS_CARD, ptr, 512,
3488 scsi_sg_count(chip->srb),
3493 if (retval == -ETIMEDOUT) {
3494 ms_set_err_code(chip, MS_TO_ERROR);
3495 rtsx_clear_ms_error(chip);
3497 return STATUS_TIMEDOUT;
3500 retval = rtsx_read_register(chip, MS_TRANS_CFG, &val);
3501 if (retval != STATUS_SUCCESS) {
3502 ms_set_err_code(chip, MS_TO_ERROR);
3503 rtsx_clear_ms_error(chip);
3505 return STATUS_TIMEDOUT;
3507 if (val & (MS_CRC16_ERR | MS_RDY_TIMEOUT)) {
3508 ms_set_err_code(chip, MS_CRC16_ERROR);
3509 rtsx_clear_ms_error(chip);
3515 if (scsi_sg_count(chip->srb) == 0)
3519 return STATUS_SUCCESS;
3522 static int ms_write_multiple_pages(struct rtsx_chip *chip, u16 old_blk,
3523 u16 new_blk, u16 log_blk, u8 start_page,
3524 u8 end_page, u8 *buf, unsigned int *index,
3525 unsigned int *offset)
3527 struct ms_info *ms_card = &chip->ms_card;
3529 u8 page_addr, val, data[16];
3533 retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE,
3535 if (retval != STATUS_SUCCESS) {
3540 if (CHK_MS4BIT(ms_card))
3546 data[2] = (u8)(old_blk >> 8);
3547 data[3] = (u8)old_blk;
3553 retval = ms_write_bytes(chip, WRITE_REG, 7, NO_WAIT_INT,
3555 if (retval != STATUS_SUCCESS) {
3560 retval = ms_send_cmd(chip, BLOCK_WRITE, WAIT_INT);
3561 if (retval != STATUS_SUCCESS) {
3566 ms_set_err_code(chip, MS_NO_ERROR);
3567 retval = ms_transfer_tpc(chip, MS_TM_READ_BYTES, GET_INT, 1,
3569 if (retval != STATUS_SUCCESS) {
3575 retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE,
3576 SystemParm, (6 + MS_EXTRA_SIZE));
3577 if (retval != STATUS_SUCCESS) {
3582 ms_set_err_code(chip, MS_NO_ERROR);
3584 if (CHK_MS4BIT(ms_card))
3590 data[2] = (u8)(new_blk >> 8);
3591 data[3] = (u8)new_blk;
3592 if ((end_page - start_page) == 1)
3597 data[5] = start_page;
3600 data[8] = (u8)(log_blk >> 8);
3601 data[9] = (u8)log_blk;
3603 for (i = 0x0A; i < 0x10; i++)
3606 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
3607 retval = ms_write_bytes(chip, WRITE_REG, 6 + MS_EXTRA_SIZE,
3608 NO_WAIT_INT, data, 16);
3609 if (retval == STATUS_SUCCESS)
3612 if (i == MS_MAX_RETRY_COUNT) {
3617 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
3618 retval = ms_send_cmd(chip, BLOCK_WRITE, WAIT_INT);
3619 if (retval == STATUS_SUCCESS)
3622 if (i == MS_MAX_RETRY_COUNT) {
3627 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
3628 if (retval != STATUS_SUCCESS) {
3634 for (page_addr = start_page; page_addr < end_page; page_addr++) {
3635 ms_set_err_code(chip, MS_NO_ERROR);
3637 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
3638 ms_set_err_code(chip, MS_NO_CARD);
3643 if (val & INT_REG_CMDNK) {
3644 ms_set_err_code(chip, MS_CMD_NK);
3648 if (val & INT_REG_ERR) {
3649 ms_set_err_code(chip, MS_FLASH_WRITE_ERROR);
3653 if (!(val & INT_REG_BREQ)) {
3654 ms_set_err_code(chip, MS_BREQ_ERROR);
3661 rtsx_init_cmd(chip);
3663 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TPC,
3664 0xFF, WRITE_PAGE_DATA);
3665 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANS_CFG,
3667 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE,
3670 trans_dma_enable(DMA_TO_DEVICE, chip, 512, DMA_512);
3672 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANSFER, 0xFF,
3673 MS_TRANSFER_START | MS_TM_NORMAL_WRITE);
3674 rtsx_add_cmd(chip, CHECK_REG_CMD, MS_TRANSFER,
3675 MS_TRANSFER_END, MS_TRANSFER_END);
3677 rtsx_send_cmd_no_wait(chip);
3679 retval = rtsx_transfer_data_partial(chip, MS_CARD, ptr, 512,
3680 scsi_sg_count(chip->srb),
3685 ms_set_err_code(chip, MS_TO_ERROR);
3686 rtsx_clear_ms_error(chip);
3688 if (retval == -ETIMEDOUT) {
3690 return STATUS_TIMEDOUT;
3696 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
3697 if (retval != STATUS_SUCCESS) {
3702 if ((end_page - start_page) == 1) {
3703 if (!(val & INT_REG_CED)) {
3704 ms_set_err_code(chip, MS_FLASH_WRITE_ERROR);
3709 if (page_addr == (end_page - 1)) {
3710 if (!(val & INT_REG_CED)) {
3711 retval = ms_send_cmd(chip, BLOCK_END,
3713 if (retval != STATUS_SUCCESS) {
3719 retval = ms_read_bytes(chip, GET_INT, 1,
3720 NO_WAIT_INT, &val, 1);
3721 if (retval != STATUS_SUCCESS) {
3727 if ((page_addr == (end_page - 1)) ||
3728 (page_addr == ms_card->page_off)) {
3729 if (!(val & INT_REG_CED)) {
3730 ms_set_err_code(chip,
3731 MS_FLASH_WRITE_ERROR);
3738 if (scsi_sg_count(chip->srb) == 0)
3742 return STATUS_SUCCESS;
3745 static int ms_finish_write(struct rtsx_chip *chip, u16 old_blk, u16 new_blk,
3746 u16 log_blk, u8 page_off)
3748 struct ms_info *ms_card = &chip->ms_card;
3751 retval = ms_copy_page(chip, old_blk, new_blk, log_blk,
3752 page_off, ms_card->page_off + 1);
3753 if (retval != STATUS_SUCCESS) {
3758 seg_no = old_blk >> 9;
3760 if (MS_TST_BAD_BLOCK_FLG(ms_card)) {
3761 MS_CLR_BAD_BLOCK_FLG(ms_card);
3762 ms_set_bad_block(chip, old_blk);
3764 retval = ms_erase_block(chip, old_blk);
3765 if (retval == STATUS_SUCCESS)
3766 ms_set_unused_block(chip, old_blk);
3769 ms_set_l2p_tbl(chip, seg_no, log_blk - ms_start_idx[seg_no], new_blk);
3771 return STATUS_SUCCESS;
3774 static int ms_prepare_write(struct rtsx_chip *chip, u16 old_blk, u16 new_blk,
3775 u16 log_blk, u8 start_page)
3780 retval = ms_copy_page(chip, old_blk, new_blk, log_blk,
3782 if (retval != STATUS_SUCCESS) {
3788 return STATUS_SUCCESS;
3791 #ifdef MS_DELAY_WRITE
3792 int ms_delay_write(struct rtsx_chip *chip)
3794 struct ms_info *ms_card = &chip->ms_card;
3795 struct ms_delay_write_tag *delay_write = &ms_card->delay_write;
3798 if (delay_write->delay_write_flag) {
3799 retval = ms_set_init_para(chip);
3800 if (retval != STATUS_SUCCESS) {
3805 delay_write->delay_write_flag = 0;
3806 retval = ms_finish_write(chip,
3807 delay_write->old_phyblock,
3808 delay_write->new_phyblock,
3809 delay_write->logblock,
3810 delay_write->pageoff);
3811 if (retval != STATUS_SUCCESS) {
3817 return STATUS_SUCCESS;
3821 static inline void ms_rw_fail(struct scsi_cmnd *srb, struct rtsx_chip *chip)
3823 if (srb->sc_data_direction == DMA_FROM_DEVICE)
3824 set_sense_type(chip, SCSI_LUN(srb),
3825 SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
3827 set_sense_type(chip, SCSI_LUN(srb), SENSE_TYPE_MEDIA_WRITE_ERR);
3830 static int ms_rw_multi_sector(struct scsi_cmnd *srb, struct rtsx_chip *chip,
3831 u32 start_sector, u16 sector_cnt)
3833 struct ms_info *ms_card = &chip->ms_card;
3834 unsigned int lun = SCSI_LUN(srb);
3836 unsigned int index = 0, offset = 0;
3837 u16 old_blk = 0, new_blk = 0, log_blk, total_sec_cnt = sector_cnt;
3838 u8 start_page, end_page = 0, page_cnt;
3840 #ifdef MS_DELAY_WRITE
3841 struct ms_delay_write_tag *delay_write = &ms_card->delay_write;
3844 ms_set_err_code(chip, MS_NO_ERROR);
3846 ms_card->cleanup_counter = 0;
3848 ptr = (u8 *)scsi_sglist(srb);
3850 retval = ms_switch_clock(chip);
3851 if (retval != STATUS_SUCCESS) {
3852 ms_rw_fail(srb, chip);
3857 log_blk = (u16)(start_sector >> ms_card->block_shift);
3858 start_page = (u8)(start_sector & ms_card->page_off);
3860 for (seg_no = 0; seg_no < ARRAY_SIZE(ms_start_idx) - 1; seg_no++) {
3861 if (log_blk < ms_start_idx[seg_no + 1])
3865 if (ms_card->segment[seg_no].build_flag == 0) {
3866 retval = ms_build_l2p_tbl(chip, seg_no);
3867 if (retval != STATUS_SUCCESS) {
3868 chip->card_fail |= MS_CARD;
3869 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT);
3875 if (srb->sc_data_direction == DMA_TO_DEVICE) {
3876 #ifdef MS_DELAY_WRITE
3877 if (delay_write->delay_write_flag &&
3878 (delay_write->logblock == log_blk) &&
3879 (start_page > delay_write->pageoff)) {
3880 delay_write->delay_write_flag = 0;
3881 retval = ms_copy_page(chip,
3882 delay_write->old_phyblock,
3883 delay_write->new_phyblock,
3885 delay_write->pageoff, start_page);
3886 if (retval != STATUS_SUCCESS) {
3887 set_sense_type(chip, lun,
3888 SENSE_TYPE_MEDIA_WRITE_ERR);
3892 old_blk = delay_write->old_phyblock;
3893 new_blk = delay_write->new_phyblock;
3894 } else if (delay_write->delay_write_flag &&
3895 (delay_write->logblock == log_blk) &&
3896 (start_page == delay_write->pageoff)) {
3897 delay_write->delay_write_flag = 0;
3898 old_blk = delay_write->old_phyblock;
3899 new_blk = delay_write->new_phyblock;
3901 retval = ms_delay_write(chip);
3902 if (retval != STATUS_SUCCESS) {
3903 set_sense_type(chip, lun,
3904 SENSE_TYPE_MEDIA_WRITE_ERR);
3909 old_blk = ms_get_l2p_tbl
3911 log_blk - ms_start_idx[seg_no]);
3912 new_blk = ms_get_unused_block(chip, seg_no);
3913 if ((old_blk == 0xFFFF) || (new_blk == 0xFFFF)) {
3914 set_sense_type(chip, lun,
3915 SENSE_TYPE_MEDIA_WRITE_ERR);
3920 retval = ms_prepare_write(chip, old_blk, new_blk,
3921 log_blk, start_page);
3922 if (retval != STATUS_SUCCESS) {
3923 if (detect_card_cd(chip, MS_CARD) !=
3927 SENSE_TYPE_MEDIA_NOT_PRESENT);
3931 set_sense_type(chip, lun,
3932 SENSE_TYPE_MEDIA_WRITE_ERR);
3936 #ifdef MS_DELAY_WRITE
3940 #ifdef MS_DELAY_WRITE
3941 retval = ms_delay_write(chip);
3942 if (retval != STATUS_SUCCESS) {
3943 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
3944 set_sense_type(chip, lun,
3945 SENSE_TYPE_MEDIA_NOT_PRESENT);
3949 set_sense_type(chip, lun,
3950 SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
3955 old_blk = ms_get_l2p_tbl(chip, seg_no,
3956 log_blk - ms_start_idx[seg_no]);
3957 if (old_blk == 0xFFFF) {
3958 set_sense_type(chip, lun,
3959 SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
3965 dev_dbg(rtsx_dev(chip), "seg_no = %d, old_blk = 0x%x, new_blk = 0x%x\n",
3966 seg_no, old_blk, new_blk);
3968 while (total_sec_cnt) {
3969 if ((start_page + total_sec_cnt) > (ms_card->page_off + 1))
3970 end_page = ms_card->page_off + 1;
3972 end_page = start_page + (u8)total_sec_cnt;
3974 page_cnt = end_page - start_page;
3976 dev_dbg(rtsx_dev(chip), "start_page = %d, end_page = %d, page_cnt = %d\n",
3977 start_page, end_page, page_cnt);
3979 if (srb->sc_data_direction == DMA_FROM_DEVICE) {
3980 retval = ms_read_multiple_pages(chip,
3982 start_page, end_page,
3983 ptr, &index, &offset);
3985 retval = ms_write_multiple_pages(chip, old_blk, new_blk,
3986 log_blk, start_page,
3987 end_page, ptr, &index,
3991 if (retval != STATUS_SUCCESS) {
3992 toggle_gpio(chip, 1);
3993 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
3994 set_sense_type(chip, lun,
3995 SENSE_TYPE_MEDIA_NOT_PRESENT);
3999 ms_rw_fail(srb, chip);
4004 if (srb->sc_data_direction == DMA_TO_DEVICE) {
4005 if (end_page == (ms_card->page_off + 1)) {
4006 retval = ms_erase_block(chip, old_blk);
4007 if (retval == STATUS_SUCCESS)
4008 ms_set_unused_block(chip, old_blk);
4010 ms_set_l2p_tbl(chip, seg_no,
4011 log_blk - ms_start_idx[seg_no],
4016 total_sec_cnt -= page_cnt;
4017 if (scsi_sg_count(srb) == 0)
4018 ptr += page_cnt * 512;
4020 if (total_sec_cnt == 0)
4025 for (seg_no = 0; seg_no < ARRAY_SIZE(ms_start_idx) - 1;
4027 if (log_blk < ms_start_idx[seg_no + 1])
4031 if (ms_card->segment[seg_no].build_flag == 0) {
4032 retval = ms_build_l2p_tbl(chip, seg_no);
4033 if (retval != STATUS_SUCCESS) {
4034 chip->card_fail |= MS_CARD;
4035 set_sense_type(chip, lun,
4036 SENSE_TYPE_MEDIA_NOT_PRESENT);
4042 old_blk = ms_get_l2p_tbl(chip, seg_no,
4043 log_blk - ms_start_idx[seg_no]);
4044 if (old_blk == 0xFFFF) {
4045 ms_rw_fail(srb, chip);
4050 if (srb->sc_data_direction == DMA_TO_DEVICE) {
4051 new_blk = ms_get_unused_block(chip, seg_no);
4052 if (new_blk == 0xFFFF) {
4053 ms_rw_fail(srb, chip);
4059 dev_dbg(rtsx_dev(chip), "seg_no = %d, old_blk = 0x%x, new_blk = 0x%x\n",
4060 seg_no, old_blk, new_blk);
4065 if (srb->sc_data_direction == DMA_TO_DEVICE) {
4066 if (end_page < (ms_card->page_off + 1)) {
4067 #ifdef MS_DELAY_WRITE
4068 delay_write->delay_write_flag = 1;
4069 delay_write->old_phyblock = old_blk;
4070 delay_write->new_phyblock = new_blk;
4071 delay_write->logblock = log_blk;
4072 delay_write->pageoff = end_page;
4074 retval = ms_finish_write(chip, old_blk, new_blk,
4076 if (retval != STATUS_SUCCESS) {
4077 if (detect_card_cd(chip, MS_CARD) !=
4081 SENSE_TYPE_MEDIA_NOT_PRESENT);
4086 ms_rw_fail(srb, chip);
4094 scsi_set_resid(srb, 0);
4096 return STATUS_SUCCESS;
4099 int ms_rw(struct scsi_cmnd *srb, struct rtsx_chip *chip,
4100 u32 start_sector, u16 sector_cnt)
4102 struct ms_info *ms_card = &chip->ms_card;
4105 if (CHK_MSPRO(ms_card))
4106 retval = mspro_rw_multi_sector(srb, chip, start_sector,
4109 retval = ms_rw_multi_sector(srb, chip, start_sector,
4115 void ms_free_l2p_tbl(struct rtsx_chip *chip)
4117 struct ms_info *ms_card = &chip->ms_card;
4120 if (ms_card->segment) {
4121 for (i = 0; i < ms_card->segment_cnt; i++) {
4122 vfree(ms_card->segment[i].l2p_table);
4123 ms_card->segment[i].l2p_table = NULL;
4124 vfree(ms_card->segment[i].free_table);
4125 ms_card->segment[i].free_table = NULL;
4127 vfree(ms_card->segment);
4128 ms_card->segment = NULL;
4132 #ifdef SUPPORT_MAGIC_GATE
4134 #ifdef READ_BYTES_WAIT_INT
4135 static int ms_poll_int(struct rtsx_chip *chip)
4140 rtsx_init_cmd(chip);
4142 rtsx_add_cmd(chip, CHECK_REG_CMD, MS_TRANS_CFG, MS_INT_CED, MS_INT_CED);
4144 retval = rtsx_send_cmd(chip, MS_CARD, 5000);
4145 if (retval != STATUS_SUCCESS) {
4150 val = *rtsx_get_cmd_data(chip);
4151 if (val & MS_INT_ERR) {
4156 return STATUS_SUCCESS;
4160 #ifdef MS_SAMPLE_INT_ERR
4161 static int check_ms_err(struct rtsx_chip *chip)
4166 retval = rtsx_read_register(chip, MS_TRANSFER, &val);
4167 if (retval != STATUS_SUCCESS)
4169 if (val & MS_TRANSFER_ERR)
4172 retval = rtsx_read_register(chip, MS_TRANS_CFG, &val);
4173 if (retval != STATUS_SUCCESS)
4176 if (val & (MS_INT_ERR | MS_INT_CMDNK))
4182 static int check_ms_err(struct rtsx_chip *chip)
4187 retval = rtsx_read_register(chip, MS_TRANSFER, &val);
4188 if (retval != STATUS_SUCCESS)
4190 if (val & MS_TRANSFER_ERR)
4197 static int mg_send_ex_cmd(struct rtsx_chip *chip, u8 cmd, u8 entry_num)
4208 data[6] = entry_num;
4211 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
4212 retval = ms_write_bytes(chip, PRO_EX_SET_CMD, 7, WAIT_INT,
4214 if (retval == STATUS_SUCCESS)
4217 if (i == MS_MAX_RETRY_COUNT) {
4222 if (check_ms_err(chip)) {
4223 rtsx_clear_ms_error(chip);
4228 return STATUS_SUCCESS;
4231 static int mg_set_tpc_para_sub(struct rtsx_chip *chip, int type,
4238 retval = ms_set_rw_reg_addr(chip, 0, 0, Pro_TPCParm, 1);
4240 retval = ms_set_rw_reg_addr(chip, 0, 0, Pro_DataCount1, 6);
4242 if (retval != STATUS_SUCCESS) {
4253 buf[5] = mg_entry_num;
4255 retval = ms_write_bytes(chip, PRO_WRITE_REG, (type == 0) ? 1 : 6,
4256 NO_WAIT_INT, buf, 6);
4257 if (retval != STATUS_SUCCESS) {
4262 return STATUS_SUCCESS;
4265 int mg_set_leaf_id(struct scsi_cmnd *srb, struct rtsx_chip *chip)
4269 unsigned int lun = SCSI_LUN(srb);
4270 u8 buf1[32], buf2[12];
4272 if (scsi_bufflen(srb) < 12) {
4273 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
4278 ms_cleanup_work(chip);
4280 retval = ms_switch_clock(chip);
4281 if (retval != STATUS_SUCCESS) {
4286 retval = mg_send_ex_cmd(chip, MG_SET_LID, 0);
4287 if (retval != STATUS_SUCCESS) {
4288 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_ESTAB);
4293 memset(buf1, 0, 32);
4294 rtsx_stor_get_xfer_buf(buf2, min_t(int, 12, scsi_bufflen(srb)), srb);
4295 for (i = 0; i < 8; i++)
4296 buf1[8 + i] = buf2[4 + i];
4298 retval = ms_write_bytes(chip, PRO_WRITE_SHORT_DATA, 32, WAIT_INT,
4300 if (retval != STATUS_SUCCESS) {
4301 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_ESTAB);
4305 if (check_ms_err(chip)) {
4306 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_ESTAB);
4307 rtsx_clear_ms_error(chip);
4312 return STATUS_SUCCESS;
4315 int mg_get_local_EKB(struct scsi_cmnd *srb, struct rtsx_chip *chip)
4317 int retval = STATUS_FAIL;
4319 unsigned int lun = SCSI_LUN(srb);
4322 ms_cleanup_work(chip);
4324 retval = ms_switch_clock(chip);
4325 if (retval != STATUS_SUCCESS) {
4330 buf = kmalloc(1540, GFP_KERNEL);
4333 return STATUS_ERROR;
4341 retval = mg_send_ex_cmd(chip, MG_GET_LEKB, 0);
4342 if (retval != STATUS_SUCCESS) {
4343 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
4348 retval = ms_transfer_data(chip, MS_TM_AUTO_READ, PRO_READ_LONG_DATA,
4349 3, WAIT_INT, 0, 0, buf + 4, 1536);
4350 if (retval != STATUS_SUCCESS) {
4351 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
4352 rtsx_clear_ms_error(chip);
4356 if (check_ms_err(chip)) {
4357 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
4358 rtsx_clear_ms_error(chip);
4360 retval = STATUS_FAIL;
4364 bufflen = min_t(int, 1052, scsi_bufflen(srb));
4365 rtsx_stor_set_xfer_buf(buf, bufflen, srb);
4372 int mg_chg(struct scsi_cmnd *srb, struct rtsx_chip *chip)
4374 struct ms_info *ms_card = &chip->ms_card;
4378 unsigned int lun = SCSI_LUN(srb);
4381 ms_cleanup_work(chip);
4383 retval = ms_switch_clock(chip);
4384 if (retval != STATUS_SUCCESS) {
4389 retval = mg_send_ex_cmd(chip, MG_GET_ID, 0);
4390 if (retval != STATUS_SUCCESS) {
4391 set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM);
4396 retval = ms_read_bytes(chip, PRO_READ_SHORT_DATA, 32, WAIT_INT,
4398 if (retval != STATUS_SUCCESS) {
4399 set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM);
4403 if (check_ms_err(chip)) {
4404 set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM);
4405 rtsx_clear_ms_error(chip);
4410 memcpy(ms_card->magic_gate_id, buf, 16);
4412 #ifdef READ_BYTES_WAIT_INT
4413 retval = ms_poll_int(chip);
4414 if (retval != STATUS_SUCCESS) {
4415 set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM);
4421 retval = mg_send_ex_cmd(chip, MG_SET_RD, 0);
4422 if (retval != STATUS_SUCCESS) {
4423 set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM);
4428 bufflen = min_t(int, 12, scsi_bufflen(srb));
4429 rtsx_stor_get_xfer_buf(buf, bufflen, srb);
4431 for (i = 0; i < 8; i++)
4432 buf[i] = buf[4 + i];
4434 for (i = 0; i < 24; i++)
4437 retval = ms_write_bytes(chip, PRO_WRITE_SHORT_DATA,
4438 32, WAIT_INT, buf, 32);
4439 if (retval != STATUS_SUCCESS) {
4440 set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM);
4444 if (check_ms_err(chip)) {
4445 set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM);
4446 rtsx_clear_ms_error(chip);
4451 ms_card->mg_auth = 0;
4453 return STATUS_SUCCESS;
4456 int mg_get_rsp_chg(struct scsi_cmnd *srb, struct rtsx_chip *chip)
4458 struct ms_info *ms_card = &chip->ms_card;
4461 unsigned int lun = SCSI_LUN(srb);
4462 u8 buf1[32], buf2[36];
4464 ms_cleanup_work(chip);
4466 retval = ms_switch_clock(chip);
4467 if (retval != STATUS_SUCCESS) {
4472 retval = mg_send_ex_cmd(chip, MG_MAKE_RMS, 0);
4473 if (retval != STATUS_SUCCESS) {
4474 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
4479 retval = ms_read_bytes(chip, PRO_READ_SHORT_DATA, 32, WAIT_INT,
4481 if (retval != STATUS_SUCCESS) {
4482 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
4486 if (check_ms_err(chip)) {
4487 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
4488 rtsx_clear_ms_error(chip);
4498 memcpy(buf2 + 4, ms_card->magic_gate_id, 16);
4499 memcpy(buf2 + 20, buf1, 16);
4501 bufflen = min_t(int, 36, scsi_bufflen(srb));
4502 rtsx_stor_set_xfer_buf(buf2, bufflen, srb);
4504 #ifdef READ_BYTES_WAIT_INT
4505 retval = ms_poll_int(chip);
4506 if (retval != STATUS_SUCCESS) {
4507 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
4513 return STATUS_SUCCESS;
4516 int mg_rsp(struct scsi_cmnd *srb, struct rtsx_chip *chip)
4518 struct ms_info *ms_card = &chip->ms_card;
4522 unsigned int lun = SCSI_LUN(srb);
4525 ms_cleanup_work(chip);
4527 retval = ms_switch_clock(chip);
4528 if (retval != STATUS_SUCCESS) {
4533 retval = mg_send_ex_cmd(chip, MG_MAKE_KSE, 0);
4534 if (retval != STATUS_SUCCESS) {
4535 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
4540 bufflen = min_t(int, 12, scsi_bufflen(srb));
4541 rtsx_stor_get_xfer_buf(buf, bufflen, srb);
4543 for (i = 0; i < 8; i++)
4544 buf[i] = buf[4 + i];
4546 for (i = 0; i < 24; i++)
4549 retval = ms_write_bytes(chip, PRO_WRITE_SHORT_DATA, 32, WAIT_INT,
4551 if (retval != STATUS_SUCCESS) {
4552 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
4556 if (check_ms_err(chip)) {
4557 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
4558 rtsx_clear_ms_error(chip);
4563 ms_card->mg_auth = 1;
4565 return STATUS_SUCCESS;
4568 int mg_get_ICV(struct scsi_cmnd *srb, struct rtsx_chip *chip)
4570 struct ms_info *ms_card = &chip->ms_card;
4573 unsigned int lun = SCSI_LUN(srb);
4576 ms_cleanup_work(chip);
4578 retval = ms_switch_clock(chip);
4579 if (retval != STATUS_SUCCESS) {
4584 buf = kmalloc(1028, GFP_KERNEL);
4587 return STATUS_ERROR;
4595 retval = mg_send_ex_cmd(chip, MG_GET_IBD, ms_card->mg_entry_num);
4596 if (retval != STATUS_SUCCESS) {
4597 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
4602 retval = ms_transfer_data(chip, MS_TM_AUTO_READ, PRO_READ_LONG_DATA,
4603 2, WAIT_INT, 0, 0, buf + 4, 1024);
4604 if (retval != STATUS_SUCCESS) {
4605 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
4606 rtsx_clear_ms_error(chip);
4610 if (check_ms_err(chip)) {
4611 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
4612 rtsx_clear_ms_error(chip);
4614 retval = STATUS_FAIL;
4618 bufflen = min_t(int, 1028, scsi_bufflen(srb));
4619 rtsx_stor_set_xfer_buf(buf, bufflen, srb);
4626 int mg_set_ICV(struct scsi_cmnd *srb, struct rtsx_chip *chip)
4628 struct ms_info *ms_card = &chip->ms_card;
4631 #ifdef MG_SET_ICV_SLOW
4634 unsigned int lun = SCSI_LUN(srb);
4637 ms_cleanup_work(chip);
4639 retval = ms_switch_clock(chip);
4640 if (retval != STATUS_SUCCESS) {
4645 buf = kmalloc(1028, GFP_KERNEL);
4648 return STATUS_ERROR;
4651 bufflen = min_t(int, 1028, scsi_bufflen(srb));
4652 rtsx_stor_get_xfer_buf(buf, bufflen, srb);
4654 retval = mg_send_ex_cmd(chip, MG_SET_IBD, ms_card->mg_entry_num);
4655 if (retval != STATUS_SUCCESS) {
4656 if (ms_card->mg_auth == 0) {
4657 if ((buf[5] & 0xC0) != 0)
4660 SENSE_TYPE_MG_KEY_FAIL_NOT_ESTAB);
4662 set_sense_type(chip, lun,
4663 SENSE_TYPE_MG_WRITE_ERR);
4665 set_sense_type(chip, lun, SENSE_TYPE_MG_WRITE_ERR);
4671 #ifdef MG_SET_ICV_SLOW
4672 for (i = 0; i < 2; i++) {
4675 rtsx_init_cmd(chip);
4677 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TPC,
4678 0xFF, PRO_WRITE_LONG_DATA);
4679 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANS_CFG, 0xFF, WAIT_INT);
4680 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE,
4683 trans_dma_enable(DMA_TO_DEVICE, chip, 512, DMA_512);
4685 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANSFER, 0xFF,
4686 MS_TRANSFER_START | MS_TM_NORMAL_WRITE);
4687 rtsx_add_cmd(chip, CHECK_REG_CMD, MS_TRANSFER,
4688 MS_TRANSFER_END, MS_TRANSFER_END);
4690 rtsx_send_cmd_no_wait(chip);
4692 retval = rtsx_transfer_data(chip, MS_CARD, buf + 4 + i * 512,
4693 512, 0, DMA_TO_DEVICE, 3000);
4694 if ((retval < 0) || check_ms_err(chip)) {
4695 rtsx_clear_ms_error(chip);
4696 if (ms_card->mg_auth == 0) {
4697 if ((buf[5] & 0xC0) != 0)
4700 SENSE_TYPE_MG_KEY_FAIL_NOT_ESTAB);
4702 set_sense_type(chip, lun,
4703 SENSE_TYPE_MG_WRITE_ERR);
4705 set_sense_type(chip, lun,
4706 SENSE_TYPE_MG_WRITE_ERR);
4708 retval = STATUS_FAIL;
4714 retval = ms_transfer_data(chip, MS_TM_AUTO_WRITE, PRO_WRITE_LONG_DATA,
4715 2, WAIT_INT, 0, 0, buf + 4, 1024);
4716 if ((retval != STATUS_SUCCESS) || check_ms_err(chip)) {
4717 rtsx_clear_ms_error(chip);
4718 if (ms_card->mg_auth == 0) {
4719 if ((buf[5] & 0xC0) != 0)
4722 SENSE_TYPE_MG_KEY_FAIL_NOT_ESTAB);
4724 set_sense_type(chip, lun,
4725 SENSE_TYPE_MG_WRITE_ERR);
4727 set_sense_type(chip, lun, SENSE_TYPE_MG_WRITE_ERR);
4739 #endif /* SUPPORT_MAGIC_GATE */
4741 void ms_cleanup_work(struct rtsx_chip *chip)
4743 struct ms_info *ms_card = &chip->ms_card;
4745 if (CHK_MSPRO(ms_card)) {
4746 if (ms_card->seq_mode) {
4747 dev_dbg(rtsx_dev(chip), "MS Pro: stop transmission\n");
4748 mspro_stop_seq_mode(chip);
4749 ms_card->cleanup_counter = 0;
4751 if (CHK_MSHG(ms_card)) {
4752 rtsx_write_register(chip, MS_CFG,
4753 MS_2K_SECTOR_MODE, 0x00);
4756 #ifdef MS_DELAY_WRITE
4757 else if ((!CHK_MSPRO(ms_card)) &&
4758 ms_card->delay_write.delay_write_flag) {
4759 dev_dbg(rtsx_dev(chip), "MS: delay write\n");
4760 ms_delay_write(chip);
4761 ms_card->cleanup_counter = 0;
4766 int ms_power_off_card3v3(struct rtsx_chip *chip)
4770 retval = disable_card_clock(chip, MS_CARD);
4771 if (retval != STATUS_SUCCESS) {
4776 if (chip->asic_code) {
4777 retval = ms_pull_ctl_disable(chip);
4778 if (retval != STATUS_SUCCESS) {
4783 retval = rtsx_write_register(chip, FPGA_PULL_CTL,
4784 FPGA_MS_PULL_CTL_BIT | 0x20,
4785 FPGA_MS_PULL_CTL_BIT);
4791 retval = rtsx_write_register(chip, CARD_OE, MS_OUTPUT_EN, 0);
4796 if (!chip->ft2_fast_mode) {
4797 retval = card_power_off(chip, MS_CARD);
4798 if (retval != STATUS_SUCCESS) {
4804 return STATUS_SUCCESS;
4807 int release_ms_card(struct rtsx_chip *chip)
4809 struct ms_info *ms_card = &chip->ms_card;
4812 #ifdef MS_DELAY_WRITE
4813 ms_card->delay_write.delay_write_flag = 0;
4815 ms_card->pro_under_formatting = 0;
4817 chip->card_ready &= ~MS_CARD;
4818 chip->card_fail &= ~MS_CARD;
4819 chip->card_wp &= ~MS_CARD;
4821 ms_free_l2p_tbl(chip);
4823 memset(ms_card->raw_sys_info, 0, 96);
4824 #ifdef SUPPORT_PCGL_1P18
4825 memset(ms_card->raw_model_name, 0, 48);
4828 retval = ms_power_off_card3v3(chip);
4829 if (retval != STATUS_SUCCESS) {
4834 return STATUS_SUCCESS;