2 # DSP Bridge Driver Support
6 tristate "DSP Bridge driver"
11 DSP/BIOS Bridge is designed for platforms that contain a GPP and
12 one or more attached DSPs. The GPP is considered the master or
13 "host" processor, and the attached DSPs are processing resources
14 that can be utilized by applications and drivers running on the GPP.
16 This driver depends on OMAP Mailbox (OMAP_MBOX_FWK).
18 config TIDSPBRIDGE_DVFS
19 bool "Enable Bridge Dynamic Voltage and Frequency Scaling (DVFS)"
20 depends on TIDSPBRIDGE && OMAP_PM_SRF && CPU_FREQ
22 DVFS allows DSP Bridge to initiate the operating point change to
23 scale the chip voltage and frequency in order to match the
24 performance and power consumption to the current processing
27 config TIDSPBRIDGE_MEMPOOL_SIZE
28 hex "Physical memory pool size (Byte)"
29 depends on TIDSPBRIDGE
32 Allocate specified size of memory at booting time to avoid allocation
33 failure under heavy memory fragmentation after some use time.
35 config TIDSPBRIDGE_DEBUG
37 depends on TIDSPBRIDGE
39 Say Y to enable Bridge debugging capabilities
41 config TIDSPBRIDGE_RECOVERY
42 bool "Recovery Support"
43 depends on TIDSPBRIDGE
46 In case of DSP fatal error, BRIDGE driver will try to
49 config TIDSPBRIDGE_CACHE_LINE_CHECK
50 bool "Check buffers to be 128 byte aligned"
51 depends on TIDSPBRIDGE
53 When the DSP processes data, the DSP cache controller loads 128-Byte
54 chunks (lines) from SDRAM and writes the data back in 128-Byte chunks.
55 If a DMM buffer does not start and end on a 128-Byte boundary, the data
56 preceding the start address (SA) from the 128-Byte boundary to the SA
57 and the data at addresses trailing the end address (EA) from the EA to
58 the next 128-Byte boundary will be loaded and written back as well.
59 This can lead to heap corruption. Say Y, to enforce the check for 128
60 byte alignment, buffers failing this check will be rejected.
62 config TIDSPBRIDGE_WDT3
63 bool "Enable watchdog timer"
64 depends on TIDSPBRIDGE
66 WTD3 is managed by DSP and once it is enabled, DSP side bridge is in
67 charge of refreshing the timer before overflow, if the DSP hangs MPU
68 will caught the interrupt and try to recover DSP.
70 config TIDSPBRIDGE_WDT_TIMEOUT
71 int "Watchdog timer timeout (in secs)"
72 depends on TIDSPBRIDGE && TIDSPBRIDGE_WDT3
75 Watchdog timer timeout value, after that time if the watchdog timer
76 counter is not reset the wdt overflow interrupt will be triggered
78 config TIDSPBRIDGE_NTFY_PWRERR
79 bool "Notify power errors"
80 depends on TIDSPBRIDGE
82 Enable notifications to registered clients on the event of power errror
83 trying to suspend bridge driver. Say Y, to signal this event as a fatal
84 error, this will require a bridge restart to recover.
86 config TIDSPBRIDGE_BACKTRACE
87 bool "Dump backtraces on fatal errors"
88 depends on TIDSPBRIDGE
90 Enable useful information to backtrace fatal errors. Say Y if you
91 want to dump information for testing purposes.