2 * Copyright (c) 1996, 2003 VIA Networking Technologies, Inc.
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License along
16 * with this program; if not, write to the Free Software Foundation, Inc.,
17 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
22 * Purpose: MAC routines
29 * MACvReadAllRegs - Read All MAC Registers to buffer
30 * MACbIsRegBitsOn - Test if All test Bits On
31 * MACbIsRegBitsOff - Test if All test Bits Off
32 * MACbIsIntDisable - Test if MAC interrupt disable
33 * MACbyReadMultiAddr - Read Multicast Address Mask Pattern
34 * MACvWriteMultiAddr - Write Multicast Address Mask Pattern
35 * MACvSetMultiAddrByHash - Set Multicast Address Mask by Hash value
36 * MACvResetMultiAddrByHash - Clear Multicast Address Mask by Hash value
37 * MACvSetRxThreshold - Set Rx Threshold value
38 * MACvGetRxThreshold - Get Rx Threshold value
39 * MACvSetTxThreshold - Set Tx Threshold value
40 * MACvGetTxThreshold - Get Tx Threshold value
41 * MACvSetDmaLength - Set Dma Length value
42 * MACvGetDmaLength - Get Dma Length value
43 * MACvSetShortRetryLimit - Set 802.11 Short Retry limit
44 * MACvGetShortRetryLimit - Get 802.11 Short Retry limit
45 * MACvSetLongRetryLimit - Set 802.11 Long Retry limit
46 * MACvGetLongRetryLimit - Get 802.11 Long Retry limit
47 * MACvSetLoopbackMode - Set MAC Loopback Mode
48 * MACbIsInLoopbackMode - Test if MAC in Loopback mode
49 * MACvSetPacketFilter - Set MAC Address Filter
50 * MACvSaveContext - Save Context of MAC Registers
51 * MACvRestoreContext - Restore Context of MAC Registers
52 * MACbCompareContext - Compare if values of MAC Registers same as Context
53 * MACbSoftwareReset - Software Reset MAC
54 * MACbSafeRxOff - Turn Off MAC Rx
55 * MACbSafeTxOff - Turn Off MAC Tx
56 * MACbSafeStop - Stop MAC function
57 * MACbShutdown - Shut down MAC
58 * MACvInitialize - Initialize MAC
59 * MACvSetCurrRxDescAddr - Set Rx Descriptors Address
60 * MACvSetCurrTx0DescAddr - Set Tx0 Descriptors Address
61 * MACvSetCurrTx1DescAddr - Set Tx1 Descriptors Address
62 * MACvTimer0MicroSDelay - Micro Second Delay Loop by MAC
65 * 08-22-2003 Kyle Hsu : Porting MAC functions from sim53
66 * 09-03-2003 Bryan YC Fan : Add MACvClearBusSusInd()& MACvEnableBusSusEn()
67 * 09-18-2003 Jerry Chen : Add MACvSetKeyEntry & MACvDisableKeyEntry
75 unsigned short TxRate_iwconfig;//2008-5-8 <add> by chester
76 /*--------------------- Static Definitions -------------------------*/
77 //static int msglevel =MSG_LEVEL_DEBUG;
78 static int msglevel = MSG_LEVEL_INFO;
79 /*--------------------- Static Classes ----------------------------*/
81 /*--------------------- Static Variables --------------------------*/
83 /*--------------------- Static Functions --------------------------*/
85 /*--------------------- Export Variables --------------------------*/
87 /*--------------------- Export Functions --------------------------*/
95 * Read All MAC Registers to buffer
99 * dwIoBase - Base Address for MAC
101 * pbyMacRegs - buffer to read
106 void MACvReadAllRegs(unsigned long dwIoBase, unsigned char *pbyMacRegs)
110 // read page0 register
111 for (ii = 0; ii < MAC_MAX_CONTEXT_SIZE_PAGE0; ii++) {
112 VNSvInPortB(dwIoBase + ii, pbyMacRegs);
116 MACvSelectPage1(dwIoBase);
118 // read page1 register
119 for (ii = 0; ii < MAC_MAX_CONTEXT_SIZE_PAGE1; ii++) {
120 VNSvInPortB(dwIoBase + ii, pbyMacRegs);
124 MACvSelectPage0(dwIoBase);
130 * Test if all test bits on
134 * dwIoBase - Base Address for MAC
135 * byRegOfs - Offset of MAC Register
136 * byTestBits - Test bits
140 * Return Value: true if all test bits On; otherwise false
143 bool MACbIsRegBitsOn(unsigned long dwIoBase, unsigned char byRegOfs, unsigned char byTestBits)
145 unsigned char byData;
147 VNSvInPortB(dwIoBase + byRegOfs, &byData);
148 return (byData & byTestBits) == byTestBits;
153 * Test if all test bits off
157 * dwIoBase - Base Address for MAC
158 * byRegOfs - Offset of MAC Register
159 * byTestBits - Test bits
163 * Return Value: true if all test bits Off; otherwise false
166 bool MACbIsRegBitsOff(unsigned long dwIoBase, unsigned char byRegOfs, unsigned char byTestBits)
168 unsigned char byData;
170 VNSvInPortB(dwIoBase + byRegOfs, &byData);
171 return !(byData & byTestBits);
176 * Test if MAC interrupt disable
180 * dwIoBase - Base Address for MAC
184 * Return Value: true if interrupt is disable; otherwise false
187 bool MACbIsIntDisable(unsigned long dwIoBase)
189 unsigned long dwData;
191 VNSvInPortD(dwIoBase + MAC_REG_IMR, &dwData);
200 * Read MAC Multicast Address Mask
204 * dwIoBase - Base Address for MAC
205 * uByteidx - Index of Mask
209 * Return Value: Mask Value read
212 unsigned char MACbyReadMultiAddr(unsigned long dwIoBase, unsigned int uByteIdx)
214 unsigned char byData;
216 MACvSelectPage1(dwIoBase);
217 VNSvInPortB(dwIoBase + MAC_REG_MAR0 + uByteIdx, &byData);
218 MACvSelectPage0(dwIoBase);
224 * Write MAC Multicast Address Mask
228 * dwIoBase - Base Address for MAC
229 * uByteidx - Index of Mask
230 * byData - Mask Value to write
237 void MACvWriteMultiAddr(unsigned long dwIoBase, unsigned int uByteIdx, unsigned char byData)
239 MACvSelectPage1(dwIoBase);
240 VNSvOutPortB(dwIoBase + MAC_REG_MAR0 + uByteIdx, byData);
241 MACvSelectPage0(dwIoBase);
246 * Set this hash index into multicast address register bit
250 * dwIoBase - Base Address for MAC
251 * byHashIdx - Hash index to set
258 void MACvSetMultiAddrByHash(unsigned long dwIoBase, unsigned char byHashIdx)
260 unsigned int uByteIdx;
261 unsigned char byBitMask;
262 unsigned char byOrgValue;
264 // calculate byte position
265 uByteIdx = byHashIdx / 8;
266 ASSERT(uByteIdx < 8);
267 // calculate bit position
269 byBitMask <<= (byHashIdx % 8);
271 byOrgValue = MACbyReadMultiAddr(dwIoBase, uByteIdx);
272 MACvWriteMultiAddr(dwIoBase, uByteIdx, (unsigned char)(byOrgValue | byBitMask));
277 * Reset this hash index into multicast address register bit
281 * dwIoBase - Base Address for MAC
282 * byHashIdx - Hash index to clear
289 void MACvResetMultiAddrByHash(unsigned long dwIoBase, unsigned char byHashIdx)
291 unsigned int uByteIdx;
292 unsigned char byBitMask;
293 unsigned char byOrgValue;
295 // calculate byte position
296 uByteIdx = byHashIdx / 8;
297 ASSERT(uByteIdx < 8);
298 // calculate bit position
300 byBitMask <<= (byHashIdx % 8);
302 byOrgValue = MACbyReadMultiAddr(dwIoBase, uByteIdx);
303 MACvWriteMultiAddr(dwIoBase, uByteIdx, (unsigned char)(byOrgValue & (~byBitMask)));
312 * dwIoBase - Base Address for MAC
313 * byThreshold - Threshold Value
320 void MACvSetRxThreshold(unsigned long dwIoBase, unsigned char byThreshold)
322 unsigned char byOrgValue;
324 ASSERT(byThreshold < 4);
327 VNSvInPortB(dwIoBase + MAC_REG_FCR0, &byOrgValue);
328 byOrgValue = (byOrgValue & 0xCF) | (byThreshold << 4);
329 VNSvOutPortB(dwIoBase + MAC_REG_FCR0, byOrgValue);
338 * dwIoBase - Base Address for MAC
340 * pbyThreshold- Threshold Value Get
345 void MACvGetRxThreshold(unsigned long dwIoBase, unsigned char *pbyThreshold)
348 VNSvInPortB(dwIoBase + MAC_REG_FCR0, pbyThreshold);
349 *pbyThreshold = (*pbyThreshold >> 4) & 0x03;
358 * dwIoBase - Base Address for MAC
359 * byThreshold - Threshold Value
366 void MACvSetTxThreshold(unsigned long dwIoBase, unsigned char byThreshold)
368 unsigned char byOrgValue;
370 ASSERT(byThreshold < 4);
373 VNSvInPortB(dwIoBase + MAC_REG_FCR0, &byOrgValue);
374 byOrgValue = (byOrgValue & 0xF3) | (byThreshold << 2);
375 VNSvOutPortB(dwIoBase + MAC_REG_FCR0, byOrgValue);
384 * dwIoBase - Base Address for MAC
386 * pbyThreshold- Threshold Value Get
391 void MACvGetTxThreshold(unsigned long dwIoBase, unsigned char *pbyThreshold)
394 VNSvInPortB(dwIoBase + MAC_REG_FCR0, pbyThreshold);
395 *pbyThreshold = (*pbyThreshold >> 2) & 0x03;
404 * dwIoBase - Base Address for MAC
405 * byDmaLength - Dma Length Value
412 void MACvSetDmaLength(unsigned long dwIoBase, unsigned char byDmaLength)
414 unsigned char byOrgValue;
416 ASSERT(byDmaLength < 4);
419 VNSvInPortB(dwIoBase + MAC_REG_FCR0, &byOrgValue);
420 byOrgValue = (byOrgValue & 0xFC) | byDmaLength;
421 VNSvOutPortB(dwIoBase + MAC_REG_FCR0, byOrgValue);
430 * dwIoBase - Base Address for MAC
432 * pbyDmaLength- Dma Length Value Get
437 void MACvGetDmaLength(unsigned long dwIoBase, unsigned char *pbyDmaLength)
440 VNSvInPortB(dwIoBase + MAC_REG_FCR0, pbyDmaLength);
441 *pbyDmaLength &= 0x03;
446 * Set 802.11 Short Retry Limit
450 * dwIoBase - Base Address for MAC
451 * byRetryLimit- Retry Limit
458 void MACvSetShortRetryLimit(unsigned long dwIoBase, unsigned char byRetryLimit)
461 VNSvOutPortB(dwIoBase + MAC_REG_SRT, byRetryLimit);
466 * Get 802.11 Short Retry Limit
470 * dwIoBase - Base Address for MAC
472 * pbyRetryLimit - Retry Limit Get
477 void MACvGetShortRetryLimit(unsigned long dwIoBase, unsigned char *pbyRetryLimit)
480 VNSvInPortB(dwIoBase + MAC_REG_SRT, pbyRetryLimit);
485 * Set 802.11 Long Retry Limit
489 * dwIoBase - Base Address for MAC
490 * byRetryLimit- Retry Limit
497 void MACvSetLongRetryLimit(unsigned long dwIoBase, unsigned char byRetryLimit)
500 VNSvOutPortB(dwIoBase + MAC_REG_LRT, byRetryLimit);
505 * Get 802.11 Long Retry Limit
509 * dwIoBase - Base Address for MAC
511 * pbyRetryLimit - Retry Limit Get
516 void MACvGetLongRetryLimit(unsigned long dwIoBase, unsigned char *pbyRetryLimit)
519 VNSvInPortB(dwIoBase + MAC_REG_LRT, pbyRetryLimit);
524 * Set MAC Loopback mode
528 * dwIoBase - Base Address for MAC
529 * byLoopbackMode - Loopback Mode
536 void MACvSetLoopbackMode(unsigned long dwIoBase, unsigned char byLoopbackMode)
538 unsigned char byOrgValue;
540 ASSERT(byLoopbackMode < 3);
541 byLoopbackMode <<= 6;
543 VNSvInPortB(dwIoBase + MAC_REG_TEST, &byOrgValue);
544 byOrgValue = byOrgValue & 0x3F;
545 byOrgValue = byOrgValue | byLoopbackMode;
546 VNSvOutPortB(dwIoBase + MAC_REG_TEST, byOrgValue);
551 * Test if MAC in Loopback mode
555 * dwIoBase - Base Address for MAC
559 * Return Value: true if in Loopback mode; otherwise false
562 bool MACbIsInLoopbackMode(unsigned long dwIoBase)
564 unsigned char byOrgValue;
566 VNSvInPortB(dwIoBase + MAC_REG_TEST, &byOrgValue);
567 if (byOrgValue & (TEST_LBINT | TEST_LBEXT))
574 * Set MAC Address filter
578 * dwIoBase - Base Address for MAC
579 * wFilterType - Filter Type
586 void MACvSetPacketFilter(unsigned long dwIoBase, unsigned short wFilterType)
588 unsigned char byOldRCR;
589 unsigned char byNewRCR = 0;
591 // if only in DIRECTED mode, multicast-address will set to zero,
592 // but if other mode exist (e.g. PROMISCUOUS), multicast-address
594 if (wFilterType & PKT_TYPE_DIRECTED) {
595 // set multicast address to accept none
596 MACvSelectPage1(dwIoBase);
597 VNSvOutPortD(dwIoBase + MAC_REG_MAR0, 0L);
598 VNSvOutPortD(dwIoBase + MAC_REG_MAR0 + sizeof(unsigned long), 0L);
599 MACvSelectPage0(dwIoBase);
602 if (wFilterType & (PKT_TYPE_PROMISCUOUS | PKT_TYPE_ALL_MULTICAST)) {
603 // set multicast address to accept all
604 MACvSelectPage1(dwIoBase);
605 VNSvOutPortD(dwIoBase + MAC_REG_MAR0, 0xFFFFFFFFL);
606 VNSvOutPortD(dwIoBase + MAC_REG_MAR0 + sizeof(unsigned long), 0xFFFFFFFFL);
607 MACvSelectPage0(dwIoBase);
610 if (wFilterType & PKT_TYPE_PROMISCUOUS) {
612 byNewRCR |= (RCR_RXALLTYPE | RCR_UNICAST | RCR_MULTICAST | RCR_BROADCAST);
614 byNewRCR &= ~RCR_BSSID;
617 if (wFilterType & (PKT_TYPE_ALL_MULTICAST | PKT_TYPE_MULTICAST))
618 byNewRCR |= RCR_MULTICAST;
620 if (wFilterType & PKT_TYPE_BROADCAST)
621 byNewRCR |= RCR_BROADCAST;
623 if (wFilterType & PKT_TYPE_ERROR_CRC)
624 byNewRCR |= RCR_ERRCRC;
626 VNSvInPortB(dwIoBase + MAC_REG_RCR, &byOldRCR);
627 if (byNewRCR != byOldRCR) {
628 // Modify the Receive Command Register
629 VNSvOutPortB(dwIoBase + MAC_REG_RCR, byNewRCR);
635 * Save MAC registers to context buffer
639 * dwIoBase - Base Address for MAC
641 * pbyCxtBuf - Context buffer
646 void MACvSaveContext(unsigned long dwIoBase, unsigned char *pbyCxtBuf)
650 // read page0 register
651 for (ii = 0; ii < MAC_MAX_CONTEXT_SIZE_PAGE0; ii++) {
652 VNSvInPortB((dwIoBase + ii), (pbyCxtBuf + ii));
655 MACvSelectPage1(dwIoBase);
657 // read page1 register
658 for (ii = 0; ii < MAC_MAX_CONTEXT_SIZE_PAGE1; ii++) {
659 VNSvInPortB((dwIoBase + ii), (pbyCxtBuf + MAC_MAX_CONTEXT_SIZE_PAGE0 + ii));
662 MACvSelectPage0(dwIoBase);
667 * Restore MAC registers from context buffer
671 * dwIoBase - Base Address for MAC
672 * pbyCxtBuf - Context buffer
679 void MACvRestoreContext(unsigned long dwIoBase, unsigned char *pbyCxtBuf)
683 MACvSelectPage1(dwIoBase);
685 for (ii = 0; ii < MAC_MAX_CONTEXT_SIZE_PAGE1; ii++) {
686 VNSvOutPortB((dwIoBase + ii), *(pbyCxtBuf + MAC_MAX_CONTEXT_SIZE_PAGE0 + ii));
688 MACvSelectPage0(dwIoBase);
690 // restore RCR,TCR,IMR...
691 for (ii = MAC_REG_RCR; ii < MAC_REG_ISR; ii++) {
692 VNSvOutPortB(dwIoBase + ii, *(pbyCxtBuf + ii));
694 // restore MAC Config.
695 for (ii = MAC_REG_LRT; ii < MAC_REG_PAGE1SEL; ii++) {
696 VNSvOutPortB(dwIoBase + ii, *(pbyCxtBuf + ii));
698 VNSvOutPortB(dwIoBase + MAC_REG_CFG, *(pbyCxtBuf + MAC_REG_CFG));
700 // restore PS Config.
701 for (ii = MAC_REG_PSCFG; ii < MAC_REG_BBREGCTL; ii++) {
702 VNSvOutPortB(dwIoBase + ii, *(pbyCxtBuf + ii));
705 // restore CURR_RX_DESC_ADDR, CURR_TX_DESC_ADDR
706 VNSvOutPortD(dwIoBase + MAC_REG_TXDMAPTR0, *(unsigned long *)(pbyCxtBuf + MAC_REG_TXDMAPTR0));
707 VNSvOutPortD(dwIoBase + MAC_REG_AC0DMAPTR, *(unsigned long *)(pbyCxtBuf + MAC_REG_AC0DMAPTR));
708 VNSvOutPortD(dwIoBase + MAC_REG_BCNDMAPTR, *(unsigned long *)(pbyCxtBuf + MAC_REG_BCNDMAPTR));
711 VNSvOutPortD(dwIoBase + MAC_REG_RXDMAPTR0, *(unsigned long *)(pbyCxtBuf + MAC_REG_RXDMAPTR0));
713 VNSvOutPortD(dwIoBase + MAC_REG_RXDMAPTR1, *(unsigned long *)(pbyCxtBuf + MAC_REG_RXDMAPTR1));
719 * Compare if MAC registers same as context buffer
723 * dwIoBase - Base Address for MAC
724 * pbyCxtBuf - Context buffer
728 * Return Value: true if all values are the same; otherwise false
731 bool MACbCompareContext(unsigned long dwIoBase, unsigned char *pbyCxtBuf)
733 unsigned long dwData;
735 // compare MAC context to determine if this is a power lost init,
736 // return true for power remaining init, return false for power lost init
738 // compare CURR_RX_DESC_ADDR, CURR_TX_DESC_ADDR
739 VNSvInPortD(dwIoBase + MAC_REG_TXDMAPTR0, &dwData);
740 if (dwData != *(unsigned long *)(pbyCxtBuf + MAC_REG_TXDMAPTR0)) {
744 VNSvInPortD(dwIoBase + MAC_REG_AC0DMAPTR, &dwData);
745 if (dwData != *(unsigned long *)(pbyCxtBuf + MAC_REG_AC0DMAPTR)) {
749 VNSvInPortD(dwIoBase + MAC_REG_RXDMAPTR0, &dwData);
750 if (dwData != *(unsigned long *)(pbyCxtBuf + MAC_REG_RXDMAPTR0)) {
754 VNSvInPortD(dwIoBase + MAC_REG_RXDMAPTR1, &dwData);
755 if (dwData != *(unsigned long *)(pbyCxtBuf + MAC_REG_RXDMAPTR1)) {
769 * dwIoBase - Base Address for MAC
773 * Return Value: true if Reset Success; otherwise false
776 bool MACbSoftwareReset(unsigned long dwIoBase)
778 unsigned char byData;
781 // turn on HOSTCR_SOFTRST, just write 0x01 to reset
782 //MACvRegBitsOn(dwIoBase, MAC_REG_HOSTCR, HOSTCR_SOFTRST);
783 VNSvOutPortB(dwIoBase + MAC_REG_HOSTCR, 0x01);
785 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
786 VNSvInPortB(dwIoBase + MAC_REG_HOSTCR, &byData);
787 if (!(byData & HOSTCR_SOFTRST))
790 if (ww == W_MAX_TIMEOUT)
798 * save some important register's value, then do reset, then restore register's value
802 * dwIoBase - Base Address for MAC
806 * Return Value: true if success; otherwise false
809 bool MACbSafeSoftwareReset(unsigned long dwIoBase)
811 unsigned char abyTmpRegData[MAC_MAX_CONTEXT_SIZE_PAGE0+MAC_MAX_CONTEXT_SIZE_PAGE1];
815 // save some important register's value, then do
816 // reset, then restore register's value
819 MACvSaveContext(dwIoBase, abyTmpRegData);
821 bRetVal = MACbSoftwareReset(dwIoBase);
822 //BBvSoftwareReset(pDevice->PortOffset);
823 // restore MAC context, except CR0
824 MACvRestoreContext(dwIoBase, abyTmpRegData);
835 * dwIoBase - Base Address for MAC
839 * Return Value: true if success; otherwise false
842 bool MACbSafeRxOff(unsigned long dwIoBase)
845 unsigned long dwData;
846 unsigned char byData;
848 // turn off wow temp for turn off Rx safely
851 VNSvOutPortD(dwIoBase + MAC_REG_RXDMACTL0, DMACTL_CLRRUN);
852 VNSvOutPortD(dwIoBase + MAC_REG_RXDMACTL1, DMACTL_CLRRUN);
853 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
854 VNSvInPortD(dwIoBase + MAC_REG_RXDMACTL0, &dwData);
855 if (!(dwData & DMACTL_RUN))
858 if (ww == W_MAX_TIMEOUT) {
860 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO " DBG_PORT80(0x10)\n");
863 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
864 VNSvInPortD(dwIoBase + MAC_REG_RXDMACTL1, &dwData);
865 if (!(dwData & DMACTL_RUN))
868 if (ww == W_MAX_TIMEOUT) {
870 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO " DBG_PORT80(0x11)\n");
874 // try to safe shutdown RX
875 MACvRegBitsOff(dwIoBase, MAC_REG_HOSTCR, HOSTCR_RXON);
876 // W_MAX_TIMEOUT is the timeout period
877 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
878 VNSvInPortB(dwIoBase + MAC_REG_HOSTCR, &byData);
879 if (!(byData & HOSTCR_RXONST))
882 if (ww == W_MAX_TIMEOUT) {
884 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO " DBG_PORT80(0x12)\n");
896 * dwIoBase - Base Address for MAC
900 * Return Value: true if success; otherwise false
903 bool MACbSafeTxOff(unsigned long dwIoBase)
906 unsigned long dwData;
907 unsigned char byData;
911 VNSvOutPortD(dwIoBase + MAC_REG_TXDMACTL0, DMACTL_CLRRUN);
913 VNSvOutPortD(dwIoBase + MAC_REG_AC0DMACTL, DMACTL_CLRRUN);
916 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
917 VNSvInPortD(dwIoBase + MAC_REG_TXDMACTL0, &dwData);
918 if (!(dwData & DMACTL_RUN))
921 if (ww == W_MAX_TIMEOUT) {
923 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO " DBG_PORT80(0x20)\n");
926 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
927 VNSvInPortD(dwIoBase + MAC_REG_AC0DMACTL, &dwData);
928 if (!(dwData & DMACTL_RUN))
931 if (ww == W_MAX_TIMEOUT) {
933 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO " DBG_PORT80(0x21)\n");
937 // try to safe shutdown TX
938 MACvRegBitsOff(dwIoBase, MAC_REG_HOSTCR, HOSTCR_TXON);
940 // W_MAX_TIMEOUT is the timeout period
941 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
942 VNSvInPortB(dwIoBase + MAC_REG_HOSTCR, &byData);
943 if (!(byData & HOSTCR_TXONST))
946 if (ww == W_MAX_TIMEOUT) {
948 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO " DBG_PORT80(0x24)\n");
960 * dwIoBase - Base Address for MAC
964 * Return Value: true if success; otherwise false
967 bool MACbSafeStop(unsigned long dwIoBase)
969 MACvRegBitsOff(dwIoBase, MAC_REG_TCR, TCR_AUTOBCNTX);
971 if (MACbSafeRxOff(dwIoBase) == false) {
973 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO " MACbSafeRxOff == false)\n");
974 MACbSafeSoftwareReset(dwIoBase);
977 if (MACbSafeTxOff(dwIoBase) == false) {
979 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO " MACbSafeTxOff == false)\n");
980 MACbSafeSoftwareReset(dwIoBase);
984 MACvRegBitsOff(dwIoBase, MAC_REG_HOSTCR, HOSTCR_MACEN);
995 * dwIoBase - Base Address for MAC
999 * Return Value: true if success; otherwise false
1002 bool MACbShutdown(unsigned long dwIoBase)
1005 MACvIntDisable(dwIoBase);
1006 MACvSetLoopbackMode(dwIoBase, MAC_LB_INTERNAL);
1008 if (!MACbSafeStop(dwIoBase)) {
1009 MACvSetLoopbackMode(dwIoBase, MAC_LB_NONE);
1012 MACvSetLoopbackMode(dwIoBase, MAC_LB_NONE);
1022 * dwIoBase - Base Address for MAC
1026 * Return Value: none
1029 void MACvInitialize(unsigned long dwIoBase)
1031 // clear sticky bits
1032 MACvClearStckDS(dwIoBase);
1033 // disable force PME-enable
1034 VNSvOutPortB(dwIoBase + MAC_REG_PMC1, PME_OVR);
1037 MACvPwrEvntDisable(dwIoBase);
1038 // clear power status
1039 VNSvOutPortW(dwIoBase + MAC_REG_WAKEUPSR0, 0x0F0F);
1043 MACbSoftwareReset(dwIoBase);
1045 // reset TSF counter
1046 VNSvOutPortB(dwIoBase + MAC_REG_TFTCTL, TFTCTL_TSFCNTRST);
1047 // enable TSF counter
1048 VNSvOutPortB(dwIoBase + MAC_REG_TFTCTL, TFTCTL_TSFCNTREN);
1051 // set packet filter
1052 // receive directed and broadcast address
1054 MACvSetPacketFilter(dwIoBase, PKT_TYPE_DIRECTED | PKT_TYPE_BROADCAST);
1060 * Set the chip with current rx descriptor address
1064 * dwIoBase - Base Address for MAC
1065 * dwCurrDescAddr - Descriptor Address
1069 * Return Value: none
1072 void MACvSetCurrRx0DescAddr(unsigned long dwIoBase, unsigned long dwCurrDescAddr)
1075 unsigned char byData;
1076 unsigned char byOrgDMACtl;
1078 VNSvInPortB(dwIoBase + MAC_REG_RXDMACTL0, &byOrgDMACtl);
1079 if (byOrgDMACtl & DMACTL_RUN) {
1080 VNSvOutPortB(dwIoBase + MAC_REG_RXDMACTL0+2, DMACTL_RUN);
1082 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
1083 VNSvInPortB(dwIoBase + MAC_REG_RXDMACTL0, &byData);
1084 if (!(byData & DMACTL_RUN))
1087 if (ww == W_MAX_TIMEOUT) {
1090 VNSvOutPortD(dwIoBase + MAC_REG_RXDMAPTR0, dwCurrDescAddr);
1091 if (byOrgDMACtl & DMACTL_RUN) {
1092 VNSvOutPortB(dwIoBase + MAC_REG_RXDMACTL0, DMACTL_RUN);
1098 * Set the chip with current rx descriptor address
1102 * dwIoBase - Base Address for MAC
1103 * dwCurrDescAddr - Descriptor Address
1107 * Return Value: none
1110 void MACvSetCurrRx1DescAddr(unsigned long dwIoBase, unsigned long dwCurrDescAddr)
1113 unsigned char byData;
1114 unsigned char byOrgDMACtl;
1116 VNSvInPortB(dwIoBase + MAC_REG_RXDMACTL1, &byOrgDMACtl);
1117 if (byOrgDMACtl & DMACTL_RUN) {
1118 VNSvOutPortB(dwIoBase + MAC_REG_RXDMACTL1+2, DMACTL_RUN);
1120 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
1121 VNSvInPortB(dwIoBase + MAC_REG_RXDMACTL1, &byData);
1122 if (!(byData & DMACTL_RUN))
1125 if (ww == W_MAX_TIMEOUT) {
1128 VNSvOutPortD(dwIoBase + MAC_REG_RXDMAPTR1, dwCurrDescAddr);
1129 if (byOrgDMACtl & DMACTL_RUN) {
1130 VNSvOutPortB(dwIoBase + MAC_REG_RXDMACTL1, DMACTL_RUN);
1136 * Set the chip with current tx0 descriptor address
1140 * dwIoBase - Base Address for MAC
1141 * dwCurrDescAddr - Descriptor Address
1145 * Return Value: none
1148 void MACvSetCurrTx0DescAddrEx(unsigned long dwIoBase, unsigned long dwCurrDescAddr)
1151 unsigned char byData;
1152 unsigned char byOrgDMACtl;
1154 VNSvInPortB(dwIoBase + MAC_REG_TXDMACTL0, &byOrgDMACtl);
1155 if (byOrgDMACtl & DMACTL_RUN) {
1156 VNSvOutPortB(dwIoBase + MAC_REG_TXDMACTL0+2, DMACTL_RUN);
1158 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
1159 VNSvInPortB(dwIoBase + MAC_REG_TXDMACTL0, &byData);
1160 if (!(byData & DMACTL_RUN))
1163 if (ww == W_MAX_TIMEOUT) {
1166 VNSvOutPortD(dwIoBase + MAC_REG_TXDMAPTR0, dwCurrDescAddr);
1167 if (byOrgDMACtl & DMACTL_RUN) {
1168 VNSvOutPortB(dwIoBase + MAC_REG_TXDMACTL0, DMACTL_RUN);
1174 * Set the chip with current AC0 descriptor address
1178 * dwIoBase - Base Address for MAC
1179 * dwCurrDescAddr - Descriptor Address
1183 * Return Value: none
1187 void MACvSetCurrAC0DescAddrEx(unsigned long dwIoBase, unsigned long dwCurrDescAddr)
1190 unsigned char byData;
1191 unsigned char byOrgDMACtl;
1193 VNSvInPortB(dwIoBase + MAC_REG_AC0DMACTL, &byOrgDMACtl);
1194 if (byOrgDMACtl & DMACTL_RUN) {
1195 VNSvOutPortB(dwIoBase + MAC_REG_AC0DMACTL+2, DMACTL_RUN);
1197 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
1198 VNSvInPortB(dwIoBase + MAC_REG_AC0DMACTL, &byData);
1199 if (!(byData & DMACTL_RUN))
1202 if (ww == W_MAX_TIMEOUT) {
1204 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO " DBG_PORT80(0x26)\n");
1206 VNSvOutPortD(dwIoBase + MAC_REG_AC0DMAPTR, dwCurrDescAddr);
1207 if (byOrgDMACtl & DMACTL_RUN) {
1208 VNSvOutPortB(dwIoBase + MAC_REG_AC0DMACTL, DMACTL_RUN);
1214 void MACvSetCurrTXDescAddr(int iTxType, unsigned long dwIoBase, unsigned long dwCurrDescAddr)
1216 if (iTxType == TYPE_AC0DMA) {
1217 MACvSetCurrAC0DescAddrEx(dwIoBase, dwCurrDescAddr);
1218 } else if (iTxType == TYPE_TXDMA0) {
1219 MACvSetCurrTx0DescAddrEx(dwIoBase, dwCurrDescAddr);
1225 * Micro Second Delay via MAC
1229 * dwIoBase - Base Address for MAC
1230 * uDelay - Delay time (timer resolution is 4 us)
1234 * Return Value: none
1237 void MACvTimer0MicroSDelay(unsigned long dwIoBase, unsigned int uDelay)
1239 unsigned char byValue;
1240 unsigned int uu, ii;
1242 VNSvOutPortB(dwIoBase + MAC_REG_TMCTL0, 0);
1243 VNSvOutPortD(dwIoBase + MAC_REG_TMDATA0, uDelay);
1244 VNSvOutPortB(dwIoBase + MAC_REG_TMCTL0, (TMCTL_TMD | TMCTL_TE));
1245 for (ii = 0; ii < 66; ii++) { // assume max PCI clock is 66Mhz
1246 for (uu = 0; uu < uDelay; uu++) {
1247 VNSvInPortB(dwIoBase + MAC_REG_TMCTL0, &byValue);
1248 if ((byValue == 0) ||
1249 (byValue & TMCTL_TSUSP)) {
1250 VNSvOutPortB(dwIoBase + MAC_REG_TMCTL0, 0);
1255 VNSvOutPortB(dwIoBase + MAC_REG_TMCTL0, 0);
1261 * Micro Second One shot timer via MAC
1265 * dwIoBase - Base Address for MAC
1266 * uDelay - Delay time
1270 * Return Value: none
1273 void MACvOneShotTimer0MicroSec(unsigned long dwIoBase, unsigned int uDelayTime)
1275 VNSvOutPortB(dwIoBase + MAC_REG_TMCTL0, 0);
1276 VNSvOutPortD(dwIoBase + MAC_REG_TMDATA0, uDelayTime);
1277 VNSvOutPortB(dwIoBase + MAC_REG_TMCTL0, (TMCTL_TMD | TMCTL_TE));
1282 * Micro Second One shot timer via MAC
1286 * dwIoBase - Base Address for MAC
1287 * uDelay - Delay time
1291 * Return Value: none
1294 void MACvOneShotTimer1MicroSec(unsigned long dwIoBase, unsigned int uDelayTime)
1296 VNSvOutPortB(dwIoBase + MAC_REG_TMCTL1, 0);
1297 VNSvOutPortD(dwIoBase + MAC_REG_TMDATA1, uDelayTime);
1298 VNSvOutPortB(dwIoBase + MAC_REG_TMCTL1, (TMCTL_TMD | TMCTL_TE));
1302 void MACvSetMISCFifo(unsigned long dwIoBase, unsigned short wOffset, unsigned long dwData)
1306 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset);
1307 VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, dwData);
1308 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE);
1312 bool MACbTxDMAOff(unsigned long dwIoBase, unsigned int idx)
1314 unsigned char byData;
1315 unsigned int ww = 0;
1317 if (idx == TYPE_TXDMA0) {
1318 VNSvOutPortB(dwIoBase + MAC_REG_TXDMACTL0+2, DMACTL_RUN);
1319 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
1320 VNSvInPortB(dwIoBase + MAC_REG_TXDMACTL0, &byData);
1321 if (!(byData & DMACTL_RUN))
1324 } else if (idx == TYPE_AC0DMA) {
1325 VNSvOutPortB(dwIoBase + MAC_REG_AC0DMACTL+2, DMACTL_RUN);
1326 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
1327 VNSvInPortB(dwIoBase + MAC_REG_AC0DMACTL, &byData);
1328 if (!(byData & DMACTL_RUN))
1332 if (ww == W_MAX_TIMEOUT) {
1334 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO " DBG_PORT80(0x29)\n");
1340 void MACvClearBusSusInd(unsigned long dwIoBase)
1342 unsigned long dwOrgValue;
1344 // check if BcnSusInd enabled
1345 VNSvInPortD(dwIoBase + MAC_REG_ENCFG , &dwOrgValue);
1346 if (!(dwOrgValue & EnCFG_BcnSusInd))
1349 dwOrgValue = dwOrgValue | EnCFG_BcnSusClr;
1350 VNSvOutPortD(dwIoBase + MAC_REG_ENCFG, dwOrgValue);
1351 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
1352 VNSvInPortD(dwIoBase + MAC_REG_ENCFG , &dwOrgValue);
1353 if (!(dwOrgValue & EnCFG_BcnSusInd))
1356 if (ww == W_MAX_TIMEOUT) {
1358 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO " DBG_PORT80(0x33)\n");
1362 void MACvEnableBusSusEn(unsigned long dwIoBase)
1364 unsigned char byOrgValue;
1365 unsigned long dwOrgValue;
1367 // check if BcnSusInd enabled
1368 VNSvInPortB(dwIoBase + MAC_REG_CFG , &byOrgValue);
1371 byOrgValue = byOrgValue | CFG_BCNSUSEN;
1372 VNSvOutPortB(dwIoBase + MAC_REG_ENCFG, byOrgValue);
1373 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
1374 VNSvInPortD(dwIoBase + MAC_REG_ENCFG , &dwOrgValue);
1375 if (dwOrgValue & EnCFG_BcnSusInd)
1378 if (ww == W_MAX_TIMEOUT) {
1380 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO " DBG_PORT80(0x34)\n");
1384 bool MACbFlushSYNCFifo(unsigned long dwIoBase)
1386 unsigned char byOrgValue;
1389 VNSvInPortB(dwIoBase + MAC_REG_MACCR , &byOrgValue);
1392 byOrgValue = byOrgValue | MACCR_SYNCFLUSH;
1393 VNSvOutPortB(dwIoBase + MAC_REG_MACCR, byOrgValue);
1395 // Check if SyncFlushOK
1396 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
1397 VNSvInPortB(dwIoBase + MAC_REG_MACCR , &byOrgValue);
1398 if (byOrgValue & MACCR_SYNCFLUSHOK)
1401 if (ww == W_MAX_TIMEOUT) {
1403 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO " DBG_PORT80(0x33)\n");
1408 bool MACbPSWakeup(unsigned long dwIoBase)
1410 unsigned char byOrgValue;
1413 if (MACbIsRegBitsOff(dwIoBase, MAC_REG_PSCTL, PSCTL_PS)) {
1417 MACvRegBitsOff(dwIoBase, MAC_REG_PSCTL, PSCTL_PSEN);
1419 // Check if SyncFlushOK
1420 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
1421 VNSvInPortB(dwIoBase + MAC_REG_PSCTL , &byOrgValue);
1422 if (byOrgValue & PSCTL_WAKEDONE)
1425 if (ww == W_MAX_TIMEOUT) {
1427 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO " DBG_PORT80(0x33)\n");
1435 * Set the Key by MISCFIFO
1439 * dwIoBase - Base Address for MAC
1444 * Return Value: none
1448 void MACvSetKeyEntry(unsigned long dwIoBase, unsigned short wKeyCtl, unsigned int uEntryIdx,
1449 unsigned int uKeyIdx, unsigned char *pbyAddr, unsigned long *pdwKey, unsigned char byLocalID)
1451 unsigned short wOffset;
1452 unsigned long dwData;
1459 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "MACvSetKeyEntry\n");
1460 wOffset = MISCFIFO_KEYETRY0;
1461 wOffset += (uEntryIdx * MISCFIFO_KEYENTRYSIZE);
1466 dwData |= MAKEWORD(*(pbyAddr+4), *(pbyAddr+5));
1467 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "1. wOffset: %d, Data: %lX, KeyCtl:%X\n", wOffset, dwData, wKeyCtl);
1469 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset);
1470 VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, dwData);
1471 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE);
1475 dwData |= *(pbyAddr+3);
1477 dwData |= *(pbyAddr+2);
1479 dwData |= *(pbyAddr+1);
1481 dwData |= *(pbyAddr+0);
1482 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "2. wOffset: %d, Data: %lX\n", wOffset, dwData);
1484 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset);
1485 VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, dwData);
1486 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE);
1489 wOffset += (uKeyIdx * 4);
1490 for (ii = 0; ii < 4; ii++) {
1491 // always push 128 bits
1492 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "3.(%d) wOffset: %d, Data: %lX\n", ii, wOffset+ii, *pdwKey);
1493 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset+ii);
1494 VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, *pdwKey++);
1495 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE);
1503 * Disable the Key Entry by MISCFIFO
1507 * dwIoBase - Base Address for MAC
1512 * Return Value: none
1515 void MACvDisableKeyEntry(unsigned long dwIoBase, unsigned int uEntryIdx)
1517 unsigned short wOffset;
1519 wOffset = MISCFIFO_KEYETRY0;
1520 wOffset += (uEntryIdx * MISCFIFO_KEYENTRYSIZE);
1522 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset);
1523 VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, 0);
1524 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE);
1530 * Set the default Key (KeyEntry[10]) by MISCFIFO
1534 * dwIoBase - Base Address for MAC
1539 * Return Value: none
1543 void MACvSetDefaultKeyEntry(unsigned long dwIoBase, unsigned int uKeyLen,
1544 unsigned int uKeyIdx, unsigned long *pdwKey, unsigned char byLocalID)
1546 unsigned short wOffset;
1547 unsigned long dwData;
1553 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "MACvSetDefaultKeyEntry\n");
1554 wOffset = MISCFIFO_KEYETRY0;
1555 wOffset += (10 * MISCFIFO_KEYENTRYSIZE);
1559 wOffset += (uKeyIdx * 4);
1560 // always push 128 bits
1561 for (ii = 0; ii < 3; ii++) {
1562 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "(%d) wOffset: %d, Data: %lX\n", ii, wOffset+ii, *pdwKey);
1563 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset+ii);
1564 VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, *pdwKey++);
1565 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE);
1568 if (uKeyLen == WLAN_WEP104_KEYLEN) {
1569 dwData |= 0x80000000;
1571 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset+3);
1572 VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, dwData);
1573 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE);
1574 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "End. wOffset: %d, Data: %lX\n", wOffset+3, dwData);
1581 * Enable default Key (KeyEntry[10]) by MISCFIFO
1585 * dwIoBase - Base Address for MAC
1590 * Return Value: none
1594 void MACvEnableDefaultKey(unsigned long dwIoBase, unsigned char byLocalID)
1596 unsigned short wOffset;
1597 unsigned long dwData;
1603 wOffset = MISCFIFO_KEYETRY0;
1604 wOffset += (10 * MISCFIFO_KEYENTRYSIZE);
1606 dwData = 0xC0440000;
1607 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset);
1608 VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, dwData);
1609 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE);
1610 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "MACvEnableDefaultKey: wOffset: %d, Data: %lX\n", wOffset, dwData);
1617 * Disable default Key (KeyEntry[10]) by MISCFIFO
1621 * dwIoBase - Base Address for MAC
1626 * Return Value: none
1629 void MACvDisableDefaultKey(unsigned long dwIoBase)
1631 unsigned short wOffset;
1632 unsigned long dwData;
1635 wOffset = MISCFIFO_KEYETRY0;
1636 wOffset += (10 * MISCFIFO_KEYENTRYSIZE);
1639 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset);
1640 VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, dwData);
1641 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE);
1642 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "MACvDisableDefaultKey: wOffset: %d, Data: %lX\n", wOffset, dwData);
1647 * Set the default TKIP Group Key (KeyEntry[10]) by MISCFIFO
1651 * dwIoBase - Base Address for MAC
1656 * Return Value: none
1659 void MACvSetDefaultTKIPKeyEntry(unsigned long dwIoBase, unsigned int uKeyLen,
1660 unsigned int uKeyIdx, unsigned long *pdwKey, unsigned char byLocalID)
1662 unsigned short wOffset;
1663 unsigned long dwData;
1670 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "MACvSetDefaultTKIPKeyEntry\n");
1671 wOffset = MISCFIFO_KEYETRY0;
1672 // Kyle test : change offset from 10 -> 0
1673 wOffset += (10 * MISCFIFO_KEYENTRYSIZE);
1675 dwData = 0xC0660000;
1676 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset);
1677 VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, dwData);
1678 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE);
1682 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset);
1683 VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, dwData);
1684 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE);
1687 wOffset += (uKeyIdx * 4);
1688 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "1. wOffset: %d, Data: %lX, idx:%d\n", wOffset, *pdwKey, uKeyIdx);
1689 // always push 128 bits
1690 for (ii = 0; ii < 4; ii++) {
1691 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "2.(%d) wOffset: %d, Data: %lX\n", ii, wOffset+ii, *pdwKey);
1692 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset+ii);
1693 VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, *pdwKey++);
1694 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE);
1703 * Set the Key Control by MISCFIFO
1707 * dwIoBase - Base Address for MAC
1712 * Return Value: none
1716 void MACvSetDefaultKeyCtl(unsigned long dwIoBase, unsigned short wKeyCtl, unsigned int uEntryIdx, unsigned char byLocalID)
1718 unsigned short wOffset;
1719 unsigned long dwData;
1725 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "MACvSetKeyEntry\n");
1726 wOffset = MISCFIFO_KEYETRY0;
1727 wOffset += (uEntryIdx * MISCFIFO_KEYENTRYSIZE);
1733 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "1. wOffset: %d, Data: %lX, KeyCtl:%X\n", wOffset, dwData, wKeyCtl);
1735 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset);
1736 VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, dwData);
1737 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE);