1 /* Cypress West Bridge API header file (cyasprotocol.h)
2 ## ===========================
3 ## Copyright (C) 2010 Cypress Semiconductor
5 ## This program is free software; you can redistribute it and/or
6 ## modify it under the terms of the GNU General Public License
7 ## as published by the Free Software Foundation; either version 2
8 ## of the License, or (at your option) any later version.
10 ## This program is distributed in the hope that it will be useful,
11 ## but WITHOUT ANY WARRANTY; without even the implied warranty of
12 ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 ## GNU General Public License for more details.
15 ## You should have received a copy of the GNU General Public License
16 ## along with this program; if not, write to the Free Software
17 ## Foundation, Inc., 51 Franklin Street
18 ## Fifth Floor, Boston, MA 02110-1301, USA.
19 ## ===========================
22 #ifndef _INCLUDED_CYASPROTOCOL_H_
23 #define _INCLUDED_CYASPROTOCOL_H_
26 * Constants defining the per context buffer sizes
29 #define CY_CTX_GEN_MAX_DATA_SIZE (8)
30 #define CY_CTX_RES_MAX_DATA_SIZE (8)
31 #define CY_CTX_STR_MAX_DATA_SIZE (64)
32 #define CY_CTX_USB_MAX_DATA_SIZE (130 + 23)
33 #define CY_CTX_TUR_MAX_DATA_SIZE (12)
37 This response indicates a command has been processed
38 and returned a status.
41 West Bridge -> P Port Processor
42 P Port Processor -> West Bridge
52 * 0 = success (CY_AS_ERROR_SUCCESS)
53 * non-zero = error code
56 This response indicates that a request was processed
57 and no data was generated as a result of the request
58 beyond a single 16 bit status value. This response
59 contains the 16 bit data value.
61 #define CY_RESP_SUCCESS_FAILURE (0)
64 This response indicates an invalid request was sent
67 West Bridge -> P Port Processor
68 P Port Processor -> West Bridge
78 * Mailbox contents for invalid request
81 This response is returned when a request is sent
82 that contains an invalid
83 context or request code.
85 #define CY_RESP_INVALID_REQUEST (1)
88 This response indicates a request of invalid length was sent
91 West Bridge -> P Port Processor
92 P Port Processor -> West Bridge
102 * Mailbox contenxt for invalid request
103 * Length for invalid request
106 The software API and firmware sends requests across the
107 P Port to West Bridge interface on different contexts.
108 Each contexts has a maximum size of the request packet
109 that can be received. The size of a request can be
110 determined during the first cycle of a request transfer.
111 If the request is larger than can be handled by the
112 receiving context this response is returned. Note that
113 the complete request is received before this response is
114 sent, but that the request is dropped after this response
117 #define CY_RESP_INVALID_LENGTH (2)
121 This response indicates a request was made to an
122 invalid storage address.
125 West Bridge -> P Port Processor
127 Length (in transfers)
135 Bits 15 - 12 : Media Type
141 Bits 11 - 8 : Zero based device index
143 Bits 7 - 0 : Zero based unit index
146 Upper 16 bits of block address
149 Lower 16 bits of block address
152 Portion of address that is invalid
159 This response indicates a request to an invalid storage media
162 #define CY_RESP_NO_SUCH_ADDRESS (3)
165 /******************************************************/
169 The general requests include:
170 * CY_RQT_GET_FIRMWARE_VERSION
171 * CY_RQT_SET_TRACE_LEVEL
172 * CY_RQT_INITIALIZATION_COMPLETE
173 * CY_RQT_READ_MCU_REGISTER
174 * CY_RQT_WRITE_MCU_REGISTER
175 * CY_RQT_STORAGE_MEDIA_CHANGED
176 * CY_RQT_CONTROL_ANTIOCH_HEARTBEAT
177 * CY_RQT_PREPARE_FOR_STANDBY
178 * CY_RQT_ENTER_SUSPEND_MODE
179 * CY_RQT_OUT_OF_SUSPEND
180 * CY_RQT_GET_GPIO_STATE
181 * CY_RQT_SET_GPIO_STATE
182 * CY_RQT_SET_SD_CLOCK_FREQ
183 * CY_RQT_WB_DEVICE_MISMATCH
184 * CY_RQT_BOOTLOAD_NO_FIRMWARE
185 * CY_RQT_RESERVE_LNA_BOOT_AREA
186 * CY_RQT_ABORT_P2S_XFER
190 #define CY_RQT_GENERAL_RQT_CONTEXT (0)
194 This command returns the firmware version number,
195 media types supported and debug/release mode information.
198 P Port Processor-> West Bridge
200 Length (in transfers)
208 The response contains the 16-bit major version, the
209 16-bit minor version, the 16 bit build number, media
210 types supported and release/debug mode information.
213 * CY_RESP_FIRMWARE_VERSION
215 #define CY_RQT_GET_FIRMWARE_VERSION (0)
219 This command changes the trace level and trace information
220 destination within the West Bridge firmware.
223 P Port Processor-> West Bridge
225 Length (in transfers)
234 * 0 = no trace information
235 * 1 = state information
237 * 3 = function call with args/return value
240 Bits 12 - 15 : MediaType
246 Bits 8 - 11 : Zero based device index
248 Bits 0 - 7 : Zero based unit index
251 The West Bridge firmware contains debugging facilities that can
252 be used to trace the execution of the firmware. This request
253 sets the level of tracing information that is stored and the
254 location where it is stored.
257 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS
258 * CY_RESP_NO_SUCH_ADDRESS
260 #define CY_RQT_SET_TRACE_LEVEL (1)
263 This command indicates that the firmware is up and ready
264 for communications with the P port processor.
267 West Bridge -> P Port Processor
269 Length (in transfers)
286 Bits 15-8: Media types supported on Bus 1.
287 Bits 7-0: Media types supported on Bus 0.
288 Bits 8, 0: NAND support.
289 * 0: NAND is not supported.
290 * 1: NAND is supported.
291 Bits 9, 1: SD memory card support.
292 * 0: SD memory card is not supported.
293 * 1: SD memory card is supported.
294 Bits 10, 2: MMC card support.
295 * 0: MMC card is not supported.
296 * 1: MMC card is supported.
297 Bits 11, 3: CEATA drive support
298 * 0: CEATA drive is not supported.
299 * 1: CEATA drive is supported.
300 Bits 12, 4: SD IO card support.
301 * 0: SD IO card is not supported.
302 * 1: SD IO card is supported.
305 Bits 15 - 8 : MTP information
306 * 0 : MTP not supported in firmware
307 * 1 : MTP supported in firmware
308 Bits 7 - 0 : Debug/Release mode information.
313 When the West Bridge firmware is loaded it being by performing
314 initialization. Initialization must be complete before West
315 Bridge is ready to accept requests from the P port processor.
316 This request is sent from West Bridge to the P port processor
317 to indicate that initialization is complete.
320 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS
322 #define CY_RQT_INITIALIZATION_COMPLETE (3)
325 This command requests the firmware to read and return the contents
330 P Port Processor -> West Bridge
332 Length (in transfers)
340 Address of register to read
343 This debug command allows the processor to read the contents of
344 a MCU accessible register.
347 * CY_RESP_MCU_REGISTER_DATA
349 #define CY_RQT_READ_MCU_REGISTER (4)
352 This command requests the firmware to write to an MCU
356 P Port Processor -> West Bridge
358 Length (in transfers)
366 Address of register to be written
369 Bits 15 - 8 : Mask to be applied to existing data.
370 Bits 7 - 0 : Data to be ORed with masked data.
373 This debug command allows the processor to write to an MCU
375 Note: This has to be used with caution, and is supported by
376 the firmware only in special debug builds.
379 * CY_RESP_SUCCESS_FAILURE
381 #define CY_RQT_WRITE_MCU_REGISTER (5)
384 This command tells the West Bridge firmware that a change in
385 storage media has been detected.
388 P Port Processor -> West Bridge
390 Length (in transfers)
398 If the insertion or removal of SD or MMC cards is detected by
399 hardware external to West Bridge, this command is used to tell
400 the West Bridge firmware to re-initialize the storage controlled
404 * CY_RESP_SUCCESS_FAILURE
406 #define CY_RQT_STORAGE_MEDIA_CHANGED (6)
409 This command enables/disables the periodic heartbeat message
410 from the West Bridge firmware to the processor.
413 P Port Processor -> West Bridge
415 Length (in transfers)
423 This command enables/disables the periodic heartbeat message
424 from the West Bridge firmware to the processor. The heartbeat
425 message is left enabled by default, and can lead to a loss
426 in performance on the P port interface.
429 * CY_RESP_SUCCESS_FAILURE
431 #define CY_RQT_CONTROL_ANTIOCH_HEARTBEAT (7)
434 This command requests the West Bridge firmware to prepare for
435 the device going into standby
439 P Port Processor -> West Bridge
441 Length (in transfers)
449 This command is sent by the processor to the West Bridge as
450 preparation for going into standby mode. The request allows the
451 firmware to complete any pending/cached storage operations before
452 going into the low power state.
455 * CY_RESP_SUCCESS_FAILURE
457 #define CY_RQT_PREPARE_FOR_STANDBY (8)
460 Requests the firmware to go into suspend mode.
463 P Port Processor -> West Bridge
465 Length (in transfers)
473 Bits 7-0: Wakeup control information.
476 This command is sent by the processor to the West Bridge to
477 request the device to be placed in suspend mode. The firmware
478 will complete any pending/cached storage operations before
479 going into the low power state.
482 * CY_RESP_SUCCESS_FAILURE
484 #define CY_RQT_ENTER_SUSPEND_MODE (9)
487 Indicates that the device has left suspend mode.
490 West Bridge -> P Port Processor
492 Length (in transfers)
500 This message is sent by the West Bridge to the Processor
501 to indicate that the device has woken up from suspend mode,
502 and is ready to accept new requests.
505 * CY_RESP_SUCCESS_FAILURE
507 #define CY_RQT_OUT_OF_SUSPEND (10)
510 Request to get the current state of an West Bridge GPIO pin.
513 P Port Processor -> West Bridge
515 Length (in transfers)
523 Bits 15 - 8 : GPIO pin identifier
529 Request from the processor to get the current state of
530 an West Bridge GPIO pin.
532 #define CY_RQT_GET_GPIO_STATE (11)
535 Request to update the output value on an West Bridge
539 P Port Processor -> West Bridge
541 Length (in transfers)
549 Bits 15 - 8 : GPIO pin identifier
550 Bit 0 : Desired output state
553 * CY_RESP_SUCCESS_FAILURE
556 Request from the processor to update the output value on
557 an West Bridge GPIO pin.
559 #define CY_RQT_SET_GPIO_STATE (12)
562 Set the clock frequency on the SD interface of the West
566 P Port Processor -> West Bridge
568 Length (in transfers)
576 Bit 8: Type of SD/MMC media
579 Bit 0: Clock frequency selection
580 0 = Default frequency
581 1 = Alternate frequency (24 MHz in both cases)
584 This request is sent by the processor to set the operating clock
585 frequency used on the SD interface of the device.
588 * CY_RESP_SUCCESS_FAILURE
590 #define CY_RQT_SET_SD_CLOCK_FREQ (13)
593 Indicates the firmware downloaded to West Bridge cannot
594 run on the active device.
597 West Bridge -> P Port processor
599 Length (in transfers)
607 Some versions of West Bridge firmware can only run on specific
608 types/versions of the West Bridge device. This error is
609 returned when a firmware image is downloaded onto a device that
615 #define CY_RQT_WB_DEVICE_MISMATCH (14)
618 This command is indicates that no firmware was found in the
622 West Bridge -> P Port Processor
624 Length (in transfers)
632 The command is received only in case of silicon with bootloader
633 ROM. The device sends the request if there is no firmware image
634 found in the storage media or the image is corrupted. The
635 device is waiting for P port to download a valid firmware image.
640 #define CY_RQT_BOOTLOAD_NO_FIRMWARE (15)
643 This command reserves first numzones zones of nand device for
644 storing processor boot image.
647 P Port Processor-> West Bridge
649 Length (in transfers)
660 The first numzones zones in nand device will be used for storing
661 proc boot image. LNA firmware in Astoria will work on this nand
662 area and boots the processor which will then use the remaining
663 nand for usual purposes.
666 * CY_RESP_SUCCESS_FAILURE
668 #define CY_RQT_RESERVE_LNA_BOOT_AREA (16)
671 This command cancels the processing of a P2S operation in
675 P Port Processor -> West Bridge
677 Length (in transfers)
685 * CY_RESP_SUCCESS_FAILURE
687 #define CY_RQT_ABORT_P2S_XFER (17)
690 * Used for debugging, ignore for normal operations
693 #define CY_RQT_DEBUG_MESSAGE (127)
696 /******************************************************/
698 /*@@General responses
700 The general responses include:
701 * CY_RESP_FIRMWARE_VERSION
702 * CY_RESP_MCU_REGISTER_DATA
708 This response indicates success and contains the firmware
709 version number, media types supported by the firmware and
710 release/debug mode information.
713 West Bridge -> P Port Processor
715 Length (in transfers)
732 Bits 15-8: Media types supported on Bus 1.
733 Bits 7-0: Media types supported on Bus 0.
734 Bits 8, 0: NAND support.
735 * 0: NAND is not supported.
736 * 1: NAND is supported.
737 Bits 9, 1: SD memory card support.
738 * 0: SD memory card is not supported.
739 * 1: SD memory card is supported.
740 Bits 10, 2: MMC card support.
741 * 0: MMC card is not supported.
742 * 1: MMC card is supported.
743 Bits 11, 3: CEATA drive support
744 * 0: CEATA drive is not supported.
745 * 1: CEATA drive is supported.
746 Bits 12, 4: SD IO card support.
747 * 0: SD IO card is not supported.
748 * 1: SD IO card is supported.
751 Bits 15 - 8 : MTP information
752 * 0 : MTP not supported in firmware
753 * 1 : MTP supported in firmware
754 Bits 7 - 0 : Debug/Release mode information.
759 This reponse is sent to return the firmware version
760 number to the requestor.
762 #define CY_RESP_FIRMWARE_VERSION (16)
765 This response returns the contents of a MCU accessible
766 register to the processor.
769 West Bridge -> P Port Processor
771 Length (in transfers)
779 Bits 7 - 0 : MCU register contents
782 This response is sent by the firmware in response to the
783 CY_RQT_READ_MCU_REGISTER
786 #define CY_RESP_MCU_REGISTER_DATA (17)
789 Reports the current state of an West Bridge GPIO pin.
792 West Bridge -> P Port Processor
794 Length (in transfers)
802 Bit 0: Current state of the GP input pin
805 This response is sent by the West Bridge to report the
806 current state observed on a general purpose input pin.
808 #define CY_RESP_GPIO_STATE (18)
812 This command notifies West Bridge the polarity of the
816 P Port Processor -> West Bridge
818 Length (in transfers)
824 D0: CyAnMiscActivehigh / CyAnMiscActivelow
827 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS
831 #define CY_RQT_SDPOLARITY (19)
833 /******************************/
835 /*@@Resource requests
838 The resource requests include:
839 * CY_RQT_ACQUIRE_RESOURCE
840 * CY_RQT_RELEASE_RESOURCE
848 #define CY_RQT_RESOURCE_RQT_CONTEXT (1)
853 This command is a request from the P port processor
854 for ownership of a resource.
857 P Port Processor -> West Bridge
859 Length (in transfers)
878 The resource may be the USB pins, the SDIO/MMC bus,
882 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS
883 * CY_RESP_SUCCESS_FAILURE:CY_ERR_NOT_RELEASED
884 * CY_RESP_SUCCESS_FAILURE:CY_ERR_BAD_RESOURCE
886 #define CY_RQT_ACQUIRE_RESOURCE (0)
890 This command is a request from the P port processor
891 to release ownership of a resource.
894 P Port Processor -> West Bridge
896 Length (in transfers)
910 The resource may be the USB pins, the SDIO/MMC bus, or
914 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS
915 * CY_RESP_SUCCESS_FAILURE:CY_ERR_NOT_OWNER
917 #define CY_RQT_RELEASE_RESOURCE (1)
920 /****************************/
924 The storage commands include:
925 * CY_RQT_START_STORAGE
926 * CY_RQT_STOP_STORAGE
927 * CY_RQT_CLAIM_STORAGE
928 * CY_RQT_RELEASE_STORAGE
930 * CY_RQT_QUERY_DEVICE
934 * CY_RQT_MEDIA_CHANGED
935 * CY_RQT_ANTIOCH_CLAIM
936 * CY_RQT_ANTIOCH_RELEASE
937 * CY_RQT_SD_INTERFACE_CONTROL
938 * CY_RQT_SD_REGISTER_READ
939 * CY_RQT_CHECK_CARD_LOCK
941 * CY_RQT_PARTITION_STORAGE
942 * CY_RQT_PARTITION_ERASE
943 * CY_RQT_GET_TRANSFER_AMOUNT
945 * CY_RQT_SDIO_READ_DIRECT
946 * CY_RQT_SDIO_WRITE_DIRECT
947 * CY_RQT_SDIO_READ_EXTENDED
948 * CY_RQT_SDIO_WRITE_EXTENDED
949 * CY_RQT_SDIO_INIT_FUNCTION
950 * CY_RQT_SDIO_QUERY_CARD
951 * CY_RQT_SDIO_GET_TUPLE
952 * CY_RQT_SDIO_ABORT_IO
954 * CY_RQT_SDIO_SUSPEND
956 * CY_RQT_SDIO_RESET_DEV
957 * CY_RQT_P2S_DMA_START
960 #define CY_RQT_STORAGE_RQT_CONTEXT (2)
964 This command requests initialization of the storage stack.
967 P Port Processor -> West Bridge
969 Length (in transfers)
977 This command is required before any other storage related command
978 can be send to the West Bridge firmware.
981 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS
982 * CY_RESP_SUCCESS_FAILURE:CY_ERR_ALREADY_RUNNING
984 #define CY_RQT_START_STORAGE (0)
988 This command requests shutdown of the storage stack.
991 P Port Processor -> West Bridge
993 Length (in transfers)
1001 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS
1002 * CY_RESP_SUCCESS_FAILURE:CY_ERR_NOT_RUNNING
1004 #define CY_RQT_STOP_STORAGE (1)
1008 This command requests ownership of the given media
1009 type by the P port processor.
1012 P Port Processor -> West Bridge
1014 Length (in transfers)
1022 Bits 12 - 15 : Bus Index
1023 Bits 8 - 11 : Zero based device index
1026 * CY_RESP_MEDIA_CLAIMED_RELEASED
1027 * CY_RESP_NO_SUCH_ADDRESS
1029 #define CY_RQT_CLAIM_STORAGE (2)
1033 This command releases ownership of a given media type
1034 by the P port processor.
1037 P Port Processor -> West Bridge
1039 Length (in transfers)
1047 Bits 12 - 15 : Bus Index
1048 Bits 8 - 11 : Zero based device index
1051 * CY_RESP_MEDIA_CLAIMED_RELEASED
1052 * CY_RESP_NO_SUCH_ADDRESS
1054 #define CY_RQT_RELEASE_STORAGE (3)
1058 This command returns the total number of logical devices
1059 of the given type of media.
1062 P Port Processor -> West Bridge
1064 Length (in transfers)
1072 Bits 12 - 15 : MediaType
1078 Bits 8 - 11 : Not Used
1080 Bits 0 - 7 : Not Used
1083 * CY_RESP_MEDIA_DESCRIPTOR
1084 * CY_RESP_NO_SUCH_ADDRESS
1086 #define CY_RQT_QUERY_MEDIA (4)
1090 This command queries a given device to determine
1091 information about the number of logical units on
1095 P Port Processor -> West Bridge
1097 Length (in transfers)
1105 Bits 12 - 15 : Bus index
1106 Bits 8 - 11 : Zero based device index
1107 Bits 0 - 7 : Not Used
1110 * CY_RESP_DEVICE_DESCRIPTOR
1111 * CY_RESP_SUCCESS_FAILURE:CY_ERR_INVALID_PARTITION_TABLE
1112 * CY_RESP_NO_SUCH_ADDRESS
1114 #define CY_RQT_QUERY_DEVICE (5)
1118 This command queries a given device to determine
1119 information about the size and location of a logical unit
1120 located on a physical device.
1123 P Port Processor -> West Bridge
1125 Length (in transfers)
1133 Bits 12 - 15 : Bus index
1134 Bits 8 - 11 : Zero based device index
1135 Bits 0 - 7 : Zero based unit index
1138 * CY_RESP_UNIT_DESCRIPTOR
1139 * CY_RESP_SUCCESS_FAILURE:CY_ERR_INVALID_PARTITION_TABLE
1140 * CY_RESP_NO_SUCH_ADDRESS
1142 #define CY_RQT_QUERY_UNIT (6)
1146 This command initiates the read of a specific block
1147 from the given media,
1151 P Port Processor -> West Bridge
1153 Length (in transfers)
1161 Bits 12 - 15 : Bus index
1162 Bits 8 - 11 : Zero based device index
1163 Bits 0 - 7 : Zero based unit index
1166 Upper 16 bits of block address
1169 Lower 16 bits of block address
1172 BIT 8 - 15 : Upper 8 bits of Number of blocks
1174 BIT 0 - 7 : Reserved
1177 BITS 8 - 15 : Lower 8 bits of Number of blocks
1178 BITS 1 - 7 : Not Used
1179 BIT 0 : Indicates whether this command is a
1180 part of a P2S only burst.
1183 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS
1184 * CY_RESP_ANTIOCH_DEFERRED_ERROR
1186 #define CY_RQT_READ_BLOCK (7)
1190 This command initiates the write of a specific block
1191 from the given media, device and unit.
1194 P Port Processor -> West Bridge
1196 Length (in transfers)
1204 Bits 12 - 15 : Bus index
1205 Bits 8 - 11 : Zero based device index
1206 Bits 0 - 7 : Zero based unit index
1209 Upper 16 bits of block address
1212 Lower 16 bits of block address
1215 BIT 8 - 15 : Upper 8 bits of Number of blocks
1217 BIT 0 - 7 : Reserved
1220 BITS 8 - 15 : Lower 8 bits of Number of blocks
1221 BITS 1 - 7 : Not Used
1222 BIT 0 : Indicates whether this command is a
1223 part of a P2S only burst.
1226 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS
1227 * CY_RESP_ANTIOCH_DEFERRED_ERROR
1229 #define CY_RQT_WRITE_BLOCK (8)
1232 This request is sent when the West Bridge device detects
1233 a change in the status of the media.
1236 West Bridge -> P Port Processor
1238 Length (in transfers)
1246 Bits 12 - 15 : Bus index
1247 Bits 0 - 7 : Media type
1255 When the media manager detects the insertion or removal
1256 of a media from the West Bridge port, this request is sent
1257 from the West Bridge device to the P Port processor to
1258 inform the processor of the change in status of the media.
1259 This request is sent for both an insert operation and a
1263 * CY_RESPO_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS
1265 #define CY_RQT_MEDIA_CHANGED (9)
1268 This request is sent when the USB module wishes to claim
1272 West Bridge -> P Port Processor
1274 Length (in transfers)
1283 * 0 = do not release NAND
1287 * 0 = do not release SD Flash
1288 * 1 = release SD Flash
1291 * 0 = do not release MMC flash
1292 * 1 = release MMC flash
1295 * 0 = do not release CE-ATA storage
1296 * 1 = release CE-ATA storage
1299 * 0 = do not release storage on bus 0
1300 * 1 = release storage on bus 0
1303 * 0 = do not release storage on bus 1
1304 * 1 = release storage on bus 1
1307 When the USB cable is attached to the West Bridge device,
1308 West Bridge will enumerate the storage devices per the USB
1309 initialization of West Bridge. In order for West Bridge to
1310 respond to requests received via USB for the mass storage
1311 devices, the USB module must claim the storeage. This
1312 request is a request to the P port processor to release the
1313 storage medium. The medium will not be visible on the USB
1314 host, until it has been released by the processor.
1316 #define CY_RQT_ANTIOCH_CLAIM (10)
1319 This request is sent when the P port has asked West Bridge to
1320 release storage media, and the West Bridge device has
1324 West Bridge -> P Port Processor
1326 Length (in transfers)
1335 * 0 = No change in ownership of NAND storage
1336 * 1 = NAND ownership has been given to processor
1339 * 0 = No change in ownership of SD storage
1340 * 1 = SD ownership has been given to processor
1343 * 0 = No change in ownership of MMC storage
1344 * 1 = MMC ownership has been given to processor
1347 * 0 = No change in ownership of CE-ATA storage
1348 * 1 = CE-ATA ownership has been given to processor
1351 * 0 = No change in ownership of SD IO device
1352 * 1 = SD IO device ownership has been given to processor
1355 * 0 = No change in ownership of storage on bus 0
1356 * 1 = Bus 0 ownership has been given to processor
1359 * 0 = No change in ownership of storage on bus 1
1360 * 1 = Bus 1 ownership has been given to processor
1363 When the P port asks for control of a particular media, West
1364 Bridge may be able to release the media immediately. West
1365 Bridge may also need to complete the flush of buffers before
1366 releasing the media. In the later case, West Bridge will
1367 indicated a release is not possible immediately and West Bridge
1368 will send this request to the P port when the release has been
1371 #define CY_RQT_ANTIOCH_RELEASE (11)
1374 This request is sent by the Processor to enable/disable the
1375 handling of SD card detection and SD card write protection
1379 P Port Processor -> West Bridge
1381 Length (in transfers)
1389 Bit 8: Enable/disable handling of card detection.
1390 Bit 1: SDAT_3 = 0, GIPO_0 = 1
1391 Bit 0: Enable/disable handling of write protection.
1394 This request is sent by the Processor to enable/disable
1395 the handling of SD card detection and SD card write
1396 protection by the firmware.
1398 #define CY_RQT_SD_INTERFACE_CONTROL (12)
1401 Request from the processor to read a register on the SD
1402 card, and return the contents.
1405 P Port Processor -> West Bridge
1407 Length (in transfers)
1415 Bits 12 - 15 : MediaType
1421 Bits 8 - 11 : Zero based device index
1422 Bits 0 - 7 : Type of register to read
1425 This request is sent by the processor to instruct the
1426 West Bridge to read a register on the SD/MMC card, and
1427 send the contents back through the CY_RESP_SD_REGISTER_DATA
1430 #define CY_RQT_SD_REGISTER_READ (13)
1433 Check if the SD/MMC card connected to West Bridge is
1437 P Port Processor -> West Bridge
1439 Length (in transfers)
1447 Bits 12 - 15 : Bus index
1448 Bits 8 - 11 : Zero based device index
1451 This request is sent by the processor to check if the
1452 SD/MMC connected to the West Bridge is locked with a
1455 #define CY_RQT_CHECK_CARD_LOCK (14)
1458 This command returns the total number of logical devices on the
1462 P Port Processor -> West Bridge
1464 Length (in transfers)
1472 Bits 12 - 15 : Bus Number
1474 Bits 0 - 11: Not Used
1477 * CY_RESP_BUS_DESCRIPTOR
1478 * CY_RESP_NO_SUCH_BUS
1480 #define CY_RQT_QUERY_BUS (15)
1483 Divide a storage device into two partitions.
1486 P Port Processor -> West Bridge
1488 Length (in transfers)
1496 Bits 12 - 15 : Bus number
1497 Bits 8 - 11 : Device number
1498 Bits 0 - 7 : Not used
1501 Size of partition 0 (MS word)
1504 Size of partition 0 (LS word)
1507 * CY_RESP_SUCCESS_FAILURE
1509 #define CY_RQT_PARTITION_STORAGE (16)
1512 Remove the partition table and unify all partitions on
1516 P Port Processor -> West Bridge
1518 Length (in transfers)
1526 Bits 12 - 15 : Bus number
1527 Bits 8 - 11 : Device number
1530 * CY_RESP_SUCCESS_FAILURE
1532 #define CY_RQT_PARTITION_ERASE (17)
1535 Requests the current transfer amount.
1538 P Port Processor -> West Bridge
1540 Length (in transfers)
1548 Bits 12 - 15 : Bus number
1549 Bits 8 - 11 : Device number
1552 * CY_RESP_TRANSFER_COUNT
1554 #define CY_RQT_GET_TRANSFER_AMOUNT (18)
1560 P Port Processor -> West Bridge
1562 Length (in transfers)
1570 Bits 12 - 15 : Bus index
1571 Bits 8 - 11 : Zero based device index
1572 Bits 0 - 7 : Zero based unit index
1575 Upper 16 bits of erase unit
1578 Lower 16 bits of erase unit
1581 BIT 8 - 15 : Upper 8 bits of Number of erase units
1582 BIT 0 - 7 : Reserved
1585 BIT 8 - 15 : Lower 8 bits of Number of erase units
1586 BIT 0 - 7 : Not Used
1589 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS
1591 #define CY_RQT_ERASE (19)
1594 This command reads 1 byte from an SDIO card.
1597 P Port Processor -> West Bridge
1599 Length (in transfers)
1607 Bits 12 - 15 : Bus index
1608 Bits 8 - 11 : Zero based device index
1609 Bits 0 - 7 : Zero based function number
1613 Bit 7 : 0 to indicate a read
1614 Bits 4 - 6 : Function number
1616 Bit 2 : 1 if SDIO interrupt needs to be re-enabled.
1617 Bits 0 - 1 : Two Most significant bits of Read address
1620 Bits 1 - 15 : 15 Least significant bits of Read address
1625 * CY_RESP_SUCCESS_FAILURE
1626 * CY_RESP_SDIO_DIRECT
1628 #define CY_RQT_SDIO_READ_DIRECT (23)
1631 This command writes 1 byte to an SDIO card.
1634 P Port Processor -> West Bridge
1636 Length (in transfers)
1644 Bits 12 - 15 : Bus index
1645 Bits 8 - 11 : Zero based device index
1646 Bits 0 - 7 : Zero based function number
1649 Bits 8 - 15 : Data to write
1650 Bit 7 : 1 to indicate a write
1651 Bits 4 - 6 : Function number
1652 Bit 3 : 1 if Read after write is enabled
1653 Bit 2 : 1 if SDIO interrupt needs to be re-enabled.
1654 Bits 0 - 1 : Two Most significant bits of write address
1657 Bits 1 - 15 : 15 Least significant bits of write address
1662 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS
1663 * CY_RESP_SDIO_DIRECT
1665 #define CY_RQT_SDIO_WRITE_DIRECT (24)
1668 This command reads performs a multi block/byte read from
1672 P Port Processor -> West Bridge
1674 Length (in transfers)
1682 Bits 12 - 15 : Bus index
1683 Bits 8 - 11 : Zero based device index
1684 Bits 0 - 7 : Zero based function number
1687 Bit 15 : 0 to indicate a read
1688 Bit 12 - 14 : Function Number
1691 Bits 0 - 9 : 10 Most significant bits of Read address
1694 Bits 9 - 15 : 7 Least significant bits of address
1695 Bits 0 - 8 : Block/Byte Count
1699 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS
1702 #define CY_RQT_SDIO_READ_EXTENDED (25)
1705 This command reads performs a multi block/byte write
1709 P Port Processor -> West Bridge
1711 Length (in transfers)
1719 Bits 12 - 15 : Bus index
1720 Bits 8 - 11 : Zero based device index
1721 Bits 0 - 7 : Zero based function number
1724 Bit 15 : 1 to indicate a write
1725 Bit 12 - 14 : Function Number
1728 Bits 0 - 9 : 10 Most significant bits of Read address
1731 Bits 9 - 15 : 7 Least significant bits of address
1732 Bits 0 - 8 : Block/Byte Count
1736 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS
1739 #define CY_RQT_SDIO_WRITE_EXTENDED (26)
1742 This command initialises an IO function on the SDIO card.
1745 P Port Processor -> West Bridge
1747 Length (in transfers)
1755 Bits 12 - 15 : Bus index
1756 Bits 8 - 11 : Zero based device index
1757 Bits 0 - 7 : Zero based function number
1761 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS
1763 #define CY_RQT_SDIO_INIT_FUNCTION (27)
1766 This command gets properties of the SDIO card.
1769 P Port Processor -> West Bridge
1771 Length (in transfers)
1779 Bits 12 - 15 : Bus index
1780 Bits 8 - 11 : Zero based device index
1784 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS
1785 * CY_RESP_QUERY_CARD
1787 #define CY_RQT_SDIO_QUERY_CARD (28)
1790 This command reads a tuple from the CIS of an SDIO card.
1793 P Port Processor -> West Bridge
1795 Length (in transfers)
1803 Bits 12 - 15 : Bus index
1804 Bits 8 - 11 : Zero based device index
1805 Bits 0 - 7 : Zero based function number
1808 Bits 8 - 15 : Tuple ID to read
1811 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS
1812 * CY_RESP_SDIO_GET_TUPLE
1814 #define CY_RQT_SDIO_GET_TUPLE (29)
1817 This command Aborts an IO operation.
1820 P Port Processor -> West Bridge
1822 Length (in transfers)
1830 Bits 12 - 15 : Bus index
1831 Bits 8 - 11 : Zero based device index
1832 Bits 0 - 7 : Zero based function number
1836 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS
1838 #define CY_RQT_SDIO_ABORT_IO (30)
1841 SDIO Interrupt request sent to the processor from the West Bridge device.
1844 West Bridge ->P Port Processor
1846 Length (in transfers)
1854 Bits 0 - 7 : Bus Index
1857 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS
1859 #define CY_RQT_SDIO_INTR (31)
1862 This command Suspends an IO operation.
1865 P Port Processor -> West Bridge
1867 Length (in transfers)
1875 Bits 12 - 15 : Bus index
1876 Bits 8 - 11 : Zero based device index
1877 Bits 0 - 7 : Zero based function number
1880 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS
1882 #define CY_RQT_SDIO_SUSPEND (32)
1885 This command resumes a suspended operation.
1888 P Port Processor -> West Bridge
1890 Length (in transfers)
1898 Bits 12 - 15 : Bus index
1899 Bits 8 - 11 : Zero based device index
1900 Bits 0 - 7 : Zero based function number
1903 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS
1904 * CY_RESP_SDIO_RESUME
1906 #define CY_RQT_SDIO_RESUME (33)
1909 This command resets an SDIO device.
1912 P Port Processor -> West Bridge
1914 Length (in transfers)
1922 Bits 12 - 15 : Bus index
1923 Bits 8 - 11 : Zero based device index
1927 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS
1929 #define CY_RQT_SDIO_RESET_DEV (34)
1932 This command asks the API to start the DMA transfer
1933 for a P2S operation.
1936 West Bridge -> P Port Processor
1938 Length (in transfers)
1946 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS
1948 #define CY_RQT_P2S_DMA_START (35)
1950 /******************************************************/
1952 /*@@Storage responses
1954 The storage responses include:
1955 * CY_RESP_MEDIA_CLAIMED_RELEASED
1956 * CY_RESP_MEDIA_DESCRIPTOR
1957 * CY_RESP_DEVICE_DESCRIPTOR
1958 * CY_RESP_UNIT_DESCRIPTOR
1959 * CY_RESP_ANTIOCH_DEFERRED_ERROR
1960 * CY_RESP_SD_REGISTER_DATA
1961 * CY_RESP_SD_LOCK_STATUS
1962 * CY_RESP_BUS_DESCRIPTOR
1963 * CY_RESP_TRANSFER_COUNT
1965 * CY_RESP_SDIO_INIT_FUNCTION
1966 * CY_RESP_SDIO_QUERY_CARD
1967 * CY_RESP_SDIO_GET_TUPLE
1968 * CY_RESP_SDIO_DIRECT
1969 * CY_RESP_SDIO_INVALID_FUNCTION
1970 * CY_RESP_SDIO_RESUME
1974 Based on the request sent, the state of a given media was
1975 changed as indicated by this response.
1978 West Bridge -> P Port Processor
1980 Length (in transfers)
1985 * Response Code = 16
1988 Bits 12 - 15 : Bus index
1989 Bits 8 - 11 : Zero based device index
1996 #define CY_RESP_MEDIA_CLAIMED_RELEASED (16)
2000 This response gives the number of physical devices
2001 associated with a given media type.
2004 West Bridge -> P Port Processor
2006 Length (in transfers)
2011 * Response Code = 17
2024 #define CY_RESP_MEDIA_DESCRIPTOR (17)
2028 This response gives description of a physical device.
2031 West Bridge -> P Port Processor
2033 Length (in transfers)
2038 * Response Code = 18
2041 Bits 12 - 15 : Bus index
2042 Bits 8 - 11 : Zero based device index
2043 Bits 0 - 7 : Type of media present on bus
2049 Bit 15 : Is device removable
2050 Bit 9 : Is device password locked
2051 Bit 8 : Is device writeable
2052 Bits 0 - 7 : Number Of Units
2055 ERASE_UNIT_SIZE high 16 bits
2058 ERASE_UNIT_SIZE low 16 bits
2061 #define CY_RESP_DEVICE_DESCRIPTOR (18)
2065 This response gives description of a unit on a
2069 West Bridge -> P Port Processor
2071 Length (in transfers)
2076 * Response Code = 19
2079 Bits 12 - 15 : Bus index
2080 Bits 8 - 11 : Zero based device index
2081 Bits 0 - 7 : Zero based unit index
2084 Bits 0 - 7 : Media type
2095 Start Block Low 16 bits
2098 Start Block High 16 bits
2101 Unit Size Low 16 bits
2104 Unit Size High 16 bits
2106 #define CY_RESP_UNIT_DESCRIPTOR (19)
2110 This response is sent as error status for P2S
2114 West Bridge -> P Port Processor
2116 Length (in transfers)
2124 Bit 8 : Type of operation (Read / Write)
2125 Bits 7 - 0 : Error code
2128 Bits 12 - 15 : Bus index
2129 Bits 8 - 11 : Zero based device index
2130 Bits 0 - 7 : Zero based unit index
2133 Address where the error occurred.
2136 Length of the operation in blocks.
2139 This error is returned by the West Bridge to the
2140 processor if a storage operation fails due to a
2143 #define CY_RESP_ANTIOCH_DEFERRED_ERROR (20)
2146 Contents of a register on the SD/MMC card connected to
2150 West Bridge -> P Port Processor
2152 Length (in transfers)
2160 Length of data in bytes
2163 The register contents
2166 This is the response to a CY_RQT_SD_REGISTER_READ
2169 #define CY_RESP_SD_REGISTER_DATA (21)
2172 Status of whether the SD card is password locked.
2175 West Bridge -> P Port Processor
2177 Length (in transfers)
2185 Bit 0 : The card's lock status
2188 Status of whether the SD card is password locked.
2190 #define CY_RESP_SD_LOCK_STATUS (22)
2194 This response gives the types of physical devices
2195 attached to a given bus.
2198 West Bridge -> P Port Processor
2200 Length (in transfers)
2205 * Response Code = 23
2212 Media present on addressed bus
2214 #define CY_RESP_BUS_DESCRIPTOR (23)
2217 Amount of data read/written through the USB mass
2221 West Bridge -> P Port Processor
2223 Length (in transfers)
2231 MS 16 bits of number of sectors written
2234 LS 16 bits of number of sectors written
2237 MS 16 bits of number of sectors read
2240 LS 16 bits of number of sectors read
2243 This is the response to the CY_RQT_GET_TRANSFER_AMOUNT
2244 request, and represents the number of sectors of data
2245 that has been written to or read from the storage device
2246 through the USB Mass storage or MTP interface.
2248 #define CY_RESP_TRANSFER_COUNT (24)
2251 Status of SDIO Extended read/write operation.
2254 West Bridge -> P Port Processor
2256 Length (in transfers)
2264 Bit 8 : 1 if Read response, 0 if write response
2265 Bits 0-7: Error Status
2268 Status of SDIO Extended read write operation.
2271 #define CY_RESP_SDIO_EXT (34)
2274 Status of SDIO operation to Initialize a function
2277 West Bridge -> P Port Processor
2279 Length (in transfers)
2288 Bits 8-15 : Function Interface Code
2289 Bits 0-7: Extended Function Interface Code
2292 Bits 0-15 : Function Block Size
2295 Bits 0-15 : Most significant Word of Function PSN
2298 Bits 0-15 : Least significant Word of Function PSN
2301 Bit 15 : CSA Enabled Status
2302 Bit 14 : CSA Support Status
2303 Bit 9 : CSA No Format Status
2304 Bit 8 : CSA Write Protect Status
2305 Bit 0 : Function Wake Up Support status
2308 Status of SDIO Function Initialization operation.
2310 #define CY_RESP_SDIO_INIT_FUNCTION (35)
2313 Status of SDIO operation to query the Card
2316 West Bridge -> P Port Processor
2318 Length (in transfers)
2327 Bits 8-15 : Number of IO functions present
2328 Bit 0: 1 if memory is present
2331 Bits 0-15 : Card Manufacturer ID
2334 Bits 0-15 : Card Manufacturer Additional Information
2337 Bits 0-15 : Function 0 Block Size
2340 Bits 8-15 :SDIO Card Capability register
2341 Bits 0-7: SDIO Version
2345 Status of SDIO Card Query operation.
2347 #define CY_RESP_SDIO_QUERY_CARD (36)
2349 Status of SDIO CIS read operation
2352 West Bridge -> P Port Processor
2354 Length (in transfers)
2363 Bits 0-7: Error Status
2366 Bits 0 - 7 : Size of data read.
2369 Status of SDIO Get Tuple Read operation.
2371 #define CY_RESP_SDIO_GET_TUPLE (37)
2374 Status of SDIO Direct read/write operation.
2377 West Bridge -> P Port Processor
2379 Length (in transfers)
2387 Bit 8 : Error Status
2388 Bits 0-7: Data Read(If any)
2391 Status of SDIO Direct read write operation.
2394 #define CY_RESP_SDIO_DIRECT (38)
2397 Indicates an un-initialized function has been used for IO
2400 West Bridge -> P Port Processor
2402 Length (in transfers)
2410 Indicates an IO request on an uninitialized function.
2412 #define CY_RESP_SDIO_INVALID_FUNCTION (39)
2415 Response to a Resume request
2418 West Bridge -> P Port Processor
2420 Length (in transfers)
2428 Bits 8-15 : Error Status
2429 Bit 0: 1 if data is available. 0 otherwise.
2432 Response to a Resume request. Indicates if data is
2433 available after resum or not.
2435 #define CY_RESP_SDIO_RESUME (40)
2437 /******************************************************/
2441 The USB requests include:
2444 * CY_RQT_SET_CONNECT_STATE
2445 * CY_RQT_GET_CONNECT_STATE
2446 * CY_RQT_SET_USB_CONFIG
2447 * CY_RQT_GET_USB_CONFIG
2448 * CY_RQT_STALL_ENDPOINT
2450 * CY_RQT_SET_DESCRIPTOR
2451 * CY_RQT_GET_DESCRIPTOR
2452 * CY_RQT_SET_USB_CONFIG_REGISTERS
2454 * CY_RQT_USB_EP_DATA
2455 * CY_RQT_ENDPOINT_SET_NAK
2456 * CY_RQT_GET_ENDPOINT_NAK
2457 * CY_RQT_ACK_SETUP_PACKET
2458 * CY_RQT_SCSI_INQUIRY_COMMAND
2459 * CY_RQT_SCSI_START_STOP_COMMAND
2460 * CY_RQT_SCSI_UNKNOWN_COMMAND
2461 * CY_RQT_USB_REMOTE_WAKEUP
2462 * CY_RQT_CLEAR_DESCRIPTORS
2463 * CY_RQT_USB_STORAGE_MONITOR
2464 * CY_RQT_USB_ACTIVITY_UPDATE
2465 * CY_RQT_MS_PARTITION_SELECT
2468 #define CY_RQT_USB_RQT_CONTEXT (3)
2472 This command requests initialization of the USB stack.
2475 P Port Processor -> West Bridge
2477 Length (in transfers)
2485 This command is required before any other USB related command can be
2486 sent to the West Bridge firmware.
2489 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS
2490 * CY_RESP_SUCCESS_FAILURE:CY_RESP_ALREADY_RUNNING
2492 #define CY_RQT_START_USB (0)
2496 This command requests shutdown of the USB stack.
2499 P Port Processor -> West Bridge
2501 Length (in transfers)
2509 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS
2510 * CY_RESP_SUCCESS_FAILURE:CY_RESP_NOT_RUNNING
2512 #define CY_RQT_STOP_USB (1)
2516 This command requests that the USB pins be connected
2517 or disconnected to/from the West Bridge device.
2520 P Port Processor -> West Bridge
2522 Length (in transfers)
2530 Desired Connect State
2535 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS
2536 * CY_RESP_SUCCESS_FAILURE:CY_RESP_NOT_RUNNING
2538 #define CY_RQT_SET_CONNECT_STATE (2)
2542 This command requests the connection state of the
2543 West Bridge USB pins.
2546 P Port Processor -> West Bridge
2548 Length (in transfers)
2556 * CY_RESP_CONNECT_STATE
2557 * CY_RESP_SUCCESS_FAILURE:CY_RESP_NOT_RUNNING
2559 #define CY_RQT_GET_CONNECT_STATE (3)
2563 This request configures the USB subsystem.
2566 P Port Processor -> West Bridge
2568 Length (in transfers)
2576 Bits 8 - 15: Media to enumerate (bit mask)
2577 Bits 0 - 7: Enumerate Mass Storage (bit mask)
2578 * 1 = Enumerate device on bus 0
2579 * 2 = Enumerate device on bus 1
2582 Enumeration Methodology
2583 * 1 = West Bridge enumeration
2584 * 0 = P Port enumeration
2587 Mass storage interface number - Interface number to
2588 be used for the mass storage interface
2591 Mass storage callbacks
2592 * 1 = relay to P port
2593 * 0 = completely handle in firmware
2596 This indicates how enumeration should be handled.
2597 Enumeration can be handled by the West Bridge device
2598 or by the P port processor.
2601 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS
2602 * CY_RESP_SUCCESS_FAILURE:CY_ERR_INVALID_MASK
2603 * CY_RESP_SUCCESS_FAILURE:CY_ERR_INVALID_STORAGE_MEDIA
2605 #define CY_RQT_SET_USB_CONFIG (4)
2609 This request retrieves the current USB configuration from
2610 the West Bridge device.
2613 P Port Processor -> West Bridge
2615 Length (in transfers)
2623 * CY_RESP_USB_CONFIG
2625 #define CY_RQT_GET_USB_CONFIG (5)
2629 This request stalls the given endpoint.
2632 P Port Processor -> West Bridge
2634 Length (in transfers)
2645 * 1 = Stall Endpoint
2649 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS
2650 * CY_RESP_SUCCESS_FAILURE:CY_RESP_INVALID_ENDPOINT
2652 #define CY_RQT_STALL_ENDPOINT (6)
2656 This request retrieves the stall status of the
2660 P Port Processor -> West Bridge
2662 Length (in transfers)
2673 * CY_RESP_ENDPOINT_STALL
2674 * CY_RESP_SUCCESS_FAILURE:CY_RESP_INVALID_ENDPOINT
2676 #define CY_RQT_GET_STALL (7)
2680 This command sets the contents of a descriptor.
2683 P Port Processor -> West Bridge
2685 Length (in transfers)
2699 * Device Qualifier = 2
2700 * Full Speed Configuration = 3
2701 * High Speed Configuration = 4
2704 Actual data for the descriptor
2707 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS
2708 * CY_RESP_SUCCESS_FAILURE:CY_ERR_BAD_TYPE
2709 * CY_RESP_SUCCESS_FAILURE:CY_ERR_BAD_INDEX
2710 * CY_RESP_SUCCESS_FAILURE:CY_ERR_BAD_LENGTH
2712 #define CY_RQT_SET_DESCRIPTOR (8)
2715 This command gets the contents of a descriptor.
2718 P Port Processor -> West Bridge
2720 Length (in transfers)
2734 * Device Qualifier = 2
2735 * Full Speed Configuration = 3
2736 * High Speed Configuration = 4
2739 * CY_RESP_USB_DESCRIPTOR
2740 * CY_RESP_SUCCESS_FAILURE:CY_ERR_BAD_TYPE
2741 * CY_RESP_SUCCESS_FAILURE:CY_ERR_BAD_INDEX
2743 #define CY_RQT_GET_DESCRIPTOR (9)
2746 This request is sent from the P port processor to the
2747 West Bridge device to physically configure the endpoints
2751 P Port Processor -> West Bridge
2753 Length (in transfers)
2762 EP1OUTCFG register value
2764 EP1INCFG register value
2767 PEPxCFS register values where x = 3, 5, 7, 9
2770 LEPxCFG register values where x = 3, 5, 7, 9, 10,
2774 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS
2776 #define CY_RQT_SET_USB_CONFIG_REGISTERS (10)
2779 This request is sent to the P port processor when a
2780 USB event occurs and needs to be relayed to the
2784 West Bridge -> P Port Processor
2786 Length (in transfers)
2800 * 5 = USB Set Configuration
2801 * 6 = USB Speed change
2804 If EventTYpe is USB Speed change
2808 If EventType is USB Set Configuration
2809 * The number of the configuration to use
2810 * (may be zero to unconfigure)
2813 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS
2815 #define CY_RQT_USB_EVENT (11)
2818 This request is sent in both directions to transfer
2819 endpoint data for endpoints 0 and 1.
2822 West Bridge -> P Port Processor
2823 P Port Processor -> West Bridge
2825 Length (in transfers)
2833 Bit 15 - 14 Data Type
2834 * 0 = Setup (payload should be the 8 byte setup packet)
2836 * 2 = Status (payload should be empty)
2838 Bit 13 Endpoint Number (only 0 and 1 supported)
2839 Bit 12 First Packet (only supported for Host ->
2840 West Bridge traffic)
2841 Bit 11 Last Packet (only supported for Host ->
2842 West Bridge traffic)
2844 Bit 9 - 0 Data Length (real max data length is 64 bytes
2850 #define CY_RQT_USB_EP_DATA (12)
2854 This request sets the NAK bit on an endpoint.
2857 P Port Processor -> West Bridge
2859 Length (in transfers)
2874 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS
2875 * CY_RESP_SUCCESS_FAILURE:CY_RESP_INVALID_ENDPOINT
2877 #define CY_RQT_ENDPOINT_SET_NAK (13)
2881 This request retrieves the NAK config status of the
2885 P Port Processor -> West Bridge
2887 Length (in transfers)
2898 * CY_RESP_ENDPOINT_NAK
2899 * CY_RESP_SUCCESS_FAILURE:CY_RESP_INVALID_ENDPOINT
2901 #define CY_RQT_GET_ENDPOINT_NAK (14)
2904 This request acknowledges a setup packet that does not
2905 require any data transfer.
2908 P Port Processor -> West Bridge
2910 Length (in transfers)
2918 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS
2920 #define CY_RQT_ACK_SETUP_PACKET (15)
2923 This request is sent when the USB storage driver within
2924 West Bridge receives an Inquiry request.
2927 West Bridge -> P Port Processor
2929 Length (in transfers)
2937 Bits 12 - 15 : Bus index
2938 Bits 8 - 11 : Zero based device index
2939 Bits 0 - 7 : Media type being addressed
2942 Bits 8 : EVPD bit from request
2943 Bits 0 - 7 : Codepage from the inquiry request
2946 Length of the inquiry response in bytes
2949 The inquiry response
2952 When the West Bridge firmware receives an SCSI Inquiry
2953 request from the USB host, the response to this mass
2954 storage command is created by West Bridge and forwarded to
2955 the P port processor. The P port processor may change
2956 this response before it is returned to the USB host. This
2957 request is the method by which this may happen.
2959 #define CY_RQT_SCSI_INQUIRY_COMMAND (16)
2962 This request is sent when the USB storage driver within
2963 West Bridge receives a Start/Stop request.
2966 West Bridge -> P Port Processor
2968 Length (in transfers)
2976 Bits 12 - 15 : Bus index
2977 Bits 8 - 11 : Zero based device index
2978 Bits 0 - 7 : Media type being addressed
2982 * LoEj Bit (See SCSI-3 specification)
2985 * Start Bit (See SCSI-3 specification)
2988 When the West Bridge firmware received a SCSI Start/Stop
2989 request from the USB host, this request is relayed to the
2990 P port processor. This request is used to relay the command.
2991 The USB firmware will not response to the USB command until
2992 the response to this request is recevied by the firmware.
2994 #define CY_RQT_SCSI_START_STOP_COMMAND (17)
2997 This request is sent when the USB storage driver
2998 receives an unknown CBW on mass storage.
3001 West Bridge -> P Port Processor
3003 Length (in transfers)
3011 Bits 12 - 15 : MediaType
3018 The length of the request in bytes
3021 CBW command block from the SCSI host controller.
3024 When the firmware recevies a SCSI request that is not
3025 understood, this request is relayed to the
3028 #define CY_RQT_SCSI_UNKNOWN_COMMAND (18)
3031 Request the West Bridge to signal remote wakeup
3035 P Port Processor -> West Bridge
3037 Length (in transfers)
3045 Request from the processor to West Bridge, to signal
3046 remote wakeup to the USB host.
3049 * CY_RESP_SUCCESS_FAILURE
3051 #define CY_RQT_USB_REMOTE_WAKEUP (19)
3054 Request the West Bridge to clear all descriptors tha
3056 using the Set Descriptor calls.
3059 P Port Processor -> West Bridge
3061 Length (in transfers)
3069 Request from the processor to West Bridge, to clear
3070 all descriptor information that was previously stored
3071 on the West Bridge using CyAnUsbSetDescriptor calls.
3074 * CY_RESP_SUCCESS_FAILURE
3076 #define CY_RQT_CLEAR_DESCRIPTORS (20)
3079 Request the West Bridge to monitor USB to storage activity
3080 and send periodic updates.
3083 P Port Processor -> West Bridge
3085 Length (in transfers)
3093 Upper 16 bits of write threshold
3096 Lower 16 bits of write threshold
3099 Upper 16 bits of read threshold
3102 Lower 16 bits of read threshold
3105 Request from the processor to West Bridge, to start
3106 monitoring the level of read/write activity on the
3107 USB mass storage drive and to set the threshold
3108 level at which progress reports are sent.
3111 * CY_RESP_SUCCESS_FAILURE
3113 #define CY_RQT_USB_STORAGE_MONITOR (21)
3116 Event from the West Bridge showing that U2S activity
3117 since the last event has crossed the threshold.
3120 West Bridge -> P Port Processor
3122 Length (in transfers)
3130 Upper 16 bits of sectors written since last event.
3133 Lower 16 bits of sectors written since last event.
3136 Upper 16 bits of sectors read since last event.
3139 Lower 16 bits of sectors read since last event.
3142 Event notification from the West Bridge indicating
3143 that the number of read/writes on the USB mass
3144 storage device have crossed a pre-defined threshold
3148 * CY_RESP_SUCCESS_FAILURE
3150 #define CY_RQT_USB_ACTIVITY_UPDATE (22)
3153 Request to select the partitions to be enumerated on a
3154 storage device with partitions.
3157 P Port Processor -> West Bridge
3159 Length (in transfers)
3167 Bits 8-15 : Bus index
3168 Bits 0- 7 : Device index
3171 Bits 8-15 : Control whether to enumerate partition 1.
3172 Bits 0- 7 : Control whether to enumerate partition 0.
3175 * CY_RESP_SUCCESS_FAILURE
3177 #define CY_RQT_MS_PARTITION_SELECT (23)
3183 The USB responses include:
3184 * CY_RESP_USB_CONFIG
3185 * CY_RESP_ENDPOINT_CONFIG
3186 * CY_RESP_ENDPOINT_STALL
3187 * CY_RESP_CONNECT_STATE
3188 * CY_RESP_USB_DESCRIPTOR
3189 * CY_RESP_USB_INVALID_EVENT
3190 * CY_RESP_ENDPOINT_NAK
3191 * CY_RESP_INQUIRY_DATA
3192 * CY_RESP_UNKNOWN_SCSI_COMMAND
3196 This response contains the enumeration configuration
3197 information for the USB module.
3202 Length (in transfers)
3207 * Response Code = 32
3210 Bits 8 - 15: Media to enumerate (bit mask)
3211 Bits 0 - 7: Buses to enumerate (bit mask)
3216 Enumeration Methodology
3217 * 0 = West Bridge enumeration
3218 * 1 = P Port enumeration
3221 Bits 7 - 0 : Interface Count - the number of interfaces
3222 Bits 15 - 8 : Mass storage callbacks
3225 #define CY_RESP_USB_CONFIG (32)
3229 This response contains the configuration information
3230 for the specified endpoint.
3235 Length (in transfers)
3240 * Response Code = 33
3243 Bits 15 - 12 : Endpoint Number (0 - 15)
3245 Bits 11 - 10 : Endpoint Type
3251 Bits 9 : Endpoint Size
3255 Bits 8 - 7 : Buffering
3260 Bits 6 : Bit Direction
3264 #define CY_RESP_ENDPOINT_CONFIG (33)
3268 This response contains the stall status for
3269 the specified endpoint.
3274 Length (in transfers)
3279 * Response Code = 34
3286 #define CY_RESP_ENDPOINT_STALL (34)
3290 This response contains the connected/disconnected
3291 state of the West Bridge USB pins.
3296 Length (in transfers)
3301 * Response Code = 35
3308 #define CY_RESP_CONNECT_STATE (35)
3311 This response contains the information
3312 about the USB configuration
3315 West Bridge -> P Port Processor
3322 * Response Code = 36
3325 Length in bytes of the descriptor
3330 #define CY_RESP_USB_DESCRIPTOR (36)
3333 This response is sent in response to a bad USB event code
3336 P Port Processor -> West Bridge
3343 * Response Code = 37
3346 The invalid event code in the request
3348 #define CY_RESP_USB_INVALID_EVENT (37)
3351 This response contains the current NAK status of
3355 West Bridge -> P port processor
3362 * Response Code = 38
3365 The NAK status of the endpoint
3369 #define CY_RESP_ENDPOINT_NAK (38)
3372 This response gives the contents of the inquiry
3373 data back to West Bridge to returns to the USB host.
3376 West Bridge -> P Port Processor
3383 * Response Code = 39
3386 Length of the inquiry response
3391 #define CY_RESP_INQUIRY_DATA (39)
3394 This response gives the status of an unknown SCSI command.
3395 This also gives three bytes of sense information.
3398 P Port Processor -> West Bridge
3400 Length (in transfers)
3405 * Response Code = 40
3408 The length of the reply in bytes
3411 * Status of the command
3415 * Additional Sense Code (ASC)
3416 * Additional Sense Code Qualifier (ASCQ)
3418 #define CY_RESP_UNKNOWN_SCSI_COMMAND (40)
3419 /*******************************************************/
3423 The Turbo requests include:
3426 * CY_RQT_INIT_SEND_OBJECT
3427 * CY_RQT_CANCEL_SEND_OBJECT
3428 * CY_RQT_INIT_GET_OBJECT
3429 * CY_RQT_CANCEL_GET_OBJECT
3430 * CY_RQT_SEND_BLOCK_TABLE
3432 * CY_RQT_TURBO_CMD_FROM_HOST
3433 * CY_RQT_TURBO_SEND_RESP_DATA_TO_HOST
3434 * CY_RQT_TURBO_SWITCH_ENDPOINT
3435 * CY_RQT_TURBO_START_WRITE_DMA
3436 * CY_RQT_ENABLE_USB_PATH
3437 * CY_RQT_CANCEL_ASYNC_TRANSFER
3440 #define CY_RQT_TUR_RQT_CONTEXT (4)
3444 This command requests initialization of the MTP stack.
3447 P Port Processor -> West Bridge
3449 Length (in transfers)
3457 This command is required before any other MTP related
3458 command can be sent to the West Bridge firmware.
3461 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS
3462 * CY_RESP_SUCCESS_FAILURE:CY_RESP_ALREADY_RUNNING
3464 #define CY_RQT_START_MTP (0)
3467 This command requests shutdown of the MTP stack.
3470 P Port Processor -> West Bridge
3472 Length (in transfers)
3480 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS
3481 * CY_RESP_SUCCESS_FAILURE:CY_RESP_NOT_RUNNING
3483 #define CY_RQT_STOP_MTP (1)
3486 This command sets up an MTP SendObject operation.
3489 P Port Processor -> West Bridge
3491 Length (in transfers)
3499 Total bytes for send object Low 16 bits
3502 Total bytes for send object High 16 bits
3505 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS
3506 * CY_RESP_SUCCESS_FAILURE:CY_RESP_NOT_RUNNING
3508 #define CY_RQT_INIT_SEND_OBJECT (2)
3511 This command cancels West Bridges handling of
3512 an ongoing MTP SendObject operation. This
3513 does NOT send an MTP response.
3516 P Port Processor -> West Bridge
3518 Length (in transfers)
3526 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS
3527 * CY_RESP_SUCCESS_FAILURE:CY_RESP_NOT_RUNNING
3528 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_NO_OPERATION_PENDING
3530 #define CY_RQT_CANCEL_SEND_OBJECT (3)
3533 This command sets up an MTP GetObject operation.
3536 P Port Processor -> West Bridge
3538 Length (in transfers)
3546 Total bytes for get object Low 16 bits
3549 Total bytes for get object High 16 bits
3552 Transaction Id for get object Low 16 bits
3555 Transaction Id for get object High 16 bits
3558 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS
3559 * CY_RESP_SUCCESS_FAILURE:CY_RESP_NOT_RUNNING
3561 #define CY_RQT_INIT_GET_OBJECT (4)
3564 This command notifies West Bridge of a new
3565 BlockTable transfer.
3568 P Port Processor -> West Bridge
3570 Length (in transfers)
3578 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS
3579 * CY_RESP_SUCCESS_FAILURE:CY_RESP_NOT_RUNNING
3581 #define CY_RQT_SEND_BLOCK_TABLE (5)
3584 This request is sent to the P port processor when a MTP event occurs
3585 and needs to be relayed to the P port.
3588 West Bridge -> P Port Processor
3590 Length (in transfers)
3598 Bits 15 - 8 : Return Status for GetObject/SendObject
3599 Bits 7 - 0 : Event Type
3600 * 0 = MTP SendObject Complete
3601 * 1 = MTP GetObject Complete
3602 * 2 = BlockTable Needed
3605 Lower 16 bits of the length of the data that got transferred
3606 in the Turbo Endpoint.(Applicable to "MTP SendObject Complete"
3607 and "MTP GetObject Complete" events)
3610 Upper 16 bits of the length of the data that got transferred
3611 in the Turbo Endpoint. (Applicable to "MTP SendObject Complete"
3612 and "MTP GetObject Complete" events)
3615 Lower 16 bits of the Transaction Id of the MTP_SEND_OBJECT
3616 command. (Applicable to "MTP SendObject Complete" event)
3619 Upper 16 bits of the Transaction Id of the MTP_SEND_OBJECT
3620 command. (Applicable to "MTP SendObject Complete" event)
3623 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS
3625 #define CY_RQT_MTP_EVENT (6)
3628 This request is sent to the P port processor when a command
3629 is received from Host in a Turbo Endpoint. Upon receiving
3630 this event, P port should read the data from the endpoint as
3634 West Bridge -> P Port Processor
3636 Length (in transfers)
3644 This contains the EP number. (This will be always two now).
3647 Length of the data available in the Turbo Endpoint.
3650 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS
3652 #define CY_RQT_TURBO_CMD_FROM_HOST (7)
3655 This request is sent to the West Bridge when the P port
3656 needs to send data to the Host in a Turbo Endpoint.
3657 Upon receiving this event, Firmware will make the end point
3658 avilable for the P port. If the length is zero, then
3659 firmware will send a zero length packet.
3662 P Port Processor -> West Bridge
3664 Length (in transfers)
3672 This contains the EP number. (This will be always six now).
3675 Lower 16 bits of the length of the data that needs to be
3676 sent in the Turbo Endpoint.
3679 Upper 16 bits of the length of the data that needs to be
3680 sent in the Turbo Endpoint.
3683 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS
3685 #define CY_RQT_TURBO_SEND_RESP_DATA_TO_HOST (8)
3688 This command cancels West Bridges handling of
3689 an ongoing MTP GetObject operation. This
3690 does NOT send an MTP response.
3693 P Port Processor -> West Bridge
3695 Length (in transfers)
3703 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS
3704 * CY_RESP_SUCCESS_FAILURE:CY_RESP_NOT_RUNNING
3705 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_NO_OPERATION_PENDING
3707 #define CY_RQT_CANCEL_GET_OBJECT (9)
3710 This command switches a Turbo endpoint
3711 from the U port to the P port. If no data
3712 is in the endpoint the endpoint is
3713 primed to switch as soon as data is placed
3714 in the endpoint. The endpoint will continue
3715 to switch until all data has been transferd.
3718 P Port Processor -> West Bridge
3720 Length (in transfers)
3728 Whether the read is a packet read.
3731 Lower 16 bits of the length of the data to switch
3732 the Turbo Endpoint for.
3735 Upper 16 bits of the length of the data to switch
3736 the Turbo Endpoint for.
3739 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS
3740 * CY_RESP_SUCCESS_FAILURE:CY_RESP_NOT_RUNNING
3742 #define CY_RQT_TURBO_SWITCH_ENDPOINT (10)
3745 This command requests the API to start the DMA
3746 transfer of a packet of MTP data to the Antioch.
3749 West Bridge -> P Port Processor
3751 Length (in transfers)
3759 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS
3761 #define CY_RQT_TURBO_START_WRITE_DMA (11)
3764 This command requests the firmware to switch the
3765 internal data paths to enable USB access to the
3766 Mass storage / MTP endpoints.
3769 P Port Processor -> West Bridge
3771 Length (in transfers)
3779 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS
3781 #define CY_RQT_ENABLE_USB_PATH (12)
3784 Request to cancel an asynchronous MTP write from
3788 P Port processor -> West Bridge
3790 Length (in transfers)
3801 This is a request to the firmware to update internal
3802 state so that a pending write on the MTP endpoint
3805 #define CY_RQT_CANCEL_ASYNC_TRANSFER (13)
3807 /******************************************************/
3811 The Turbo responses include:
3812 * CY_RESP_MTP_INVALID_EVENT
3816 This response is sent in response to a bad MTP event code
3819 P Port Processor -> West Bridge
3826 * Response Code = 16
3829 The invalid event code in the request
3831 #define CY_RESP_MTP_INVALID_EVENT (16)
3834 #define CY_RQT_CONTEXT_COUNT (5)
3837 #endif /* _INCLUDED_CYASPROTOCOL_H_ */