4 #include <linux/types.h>
6 #define ISWILC1000(id) ((id & 0xfffff000) == 0x100000 ? 1 : 0)
8 /********************************************
10 * Mac eth header length
12 ********************************************/
13 #define DRIVER_HANDLER_SIZE 4
14 #define MAX_MAC_HDR_LEN 26 /* QOS_MAC_HDR_LEN */
15 #define SUB_MSDU_HEADER_LENGTH 14
16 #define SNAP_HDR_LEN 8
17 #define ETHERNET_HDR_LEN 14
18 #define WORD_ALIGNMENT_PAD 0
20 #define ETH_ETHERNET_HDR_OFFSET (MAX_MAC_HDR_LEN + \
21 SUB_MSDU_HEADER_LENGTH + \
26 #define HOST_HDR_OFFSET 4
27 #define ETHERNET_HDR_LEN 14
29 #define IP_HDR_OFFSET ETHERNET_HDR_LEN
30 #define UDP_HDR_OFFSET (IP_HDR_LEN + IP_HDR_OFFSET)
32 #define UDP_DATA_OFFSET (UDP_HDR_OFFSET + UDP_HDR_LEN)
33 #define ETH_CONFIG_PKT_HDR_LEN UDP_DATA_OFFSET
35 #define ETH_CONFIG_PKT_HDR_OFFSET (ETH_ETHERNET_HDR_OFFSET + \
36 ETH_CONFIG_PKT_HDR_LEN)
38 /********************************************
42 ********************************************/
43 #define WILC_PERIPH_REG_BASE 0x1000
44 #define WILC_CHANGING_VIR_IF 0x108c
45 #define WILC_CHIPID WILC_PERIPH_REG_BASE
46 #define WILC_GLB_RESET_0 (WILC_PERIPH_REG_BASE + 0x400)
47 #define WILC_PIN_MUX_0 (WILC_PERIPH_REG_BASE + 0x408)
48 #define WILC_HOST_TX_CTRL (WILC_PERIPH_REG_BASE + 0x6c)
49 #define WILC_HOST_RX_CTRL_0 (WILC_PERIPH_REG_BASE + 0x70)
50 #define WILC_HOST_RX_CTRL_1 (WILC_PERIPH_REG_BASE + 0x74)
51 #define WILC_HOST_VMM_CTL (WILC_PERIPH_REG_BASE + 0x78)
52 #define WILC_HOST_RX_CTRL (WILC_PERIPH_REG_BASE + 0x80)
53 #define WILC_HOST_RX_EXTRA_SIZE (WILC_PERIPH_REG_BASE + 0x84)
54 #define WILC_HOST_TX_CTRL_1 (WILC_PERIPH_REG_BASE + 0x88)
55 #define WILC_MISC (WILC_PERIPH_REG_BASE + 0x428)
56 #define WILC_INTR_REG_BASE (WILC_PERIPH_REG_BASE + 0xa00)
57 #define WILC_INTR_ENABLE WILC_INTR_REG_BASE
58 #define WILC_INTR2_ENABLE (WILC_INTR_REG_BASE + 4)
60 #define WILC_INTR_POLARITY (WILC_INTR_REG_BASE + 0x10)
61 #define WILC_INTR_TYPE (WILC_INTR_REG_BASE + 0x20)
62 #define WILC_INTR_CLEAR (WILC_INTR_REG_BASE + 0x30)
63 #define WILC_INTR_STATUS (WILC_INTR_REG_BASE + 0x40)
65 #define WILC_VMM_TBL_SIZE 64
66 #define WILC_VMM_TX_TBL_BASE 0x150400
67 #define WILC_VMM_RX_TBL_BASE 0x150500
69 #define WILC_VMM_BASE 0x150000
70 #define WILC_VMM_CORE_CTL WILC_VMM_BASE
71 #define WILC_VMM_TBL_CTL (WILC_VMM_BASE + 0x4)
72 #define WILC_VMM_TBL_ENTRY (WILC_VMM_BASE + 0x8)
73 #define WILC_VMM_TBL0_SIZE (WILC_VMM_BASE + 0xc)
74 #define WILC_VMM_TO_HOST_SIZE (WILC_VMM_BASE + 0x10)
75 #define WILC_VMM_CORE_CFG (WILC_VMM_BASE + 0x14)
76 #define WILC_VMM_TBL_ACTIVE (WILC_VMM_BASE + 040)
77 #define WILC_VMM_TBL_STATUS (WILC_VMM_BASE + 0x44)
79 #define WILC_SPI_REG_BASE 0xe800
80 #define WILC_SPI_CTL WILC_SPI_REG_BASE
81 #define WILC_SPI_MASTER_DMA_ADDR (WILC_SPI_REG_BASE + 0x4)
82 #define WILC_SPI_MASTER_DMA_COUNT (WILC_SPI_REG_BASE + 0x8)
83 #define WILC_SPI_SLAVE_DMA_ADDR (WILC_SPI_REG_BASE + 0xc)
84 #define WILC_SPI_SLAVE_DMA_COUNT (WILC_SPI_REG_BASE + 0x10)
85 #define WILC_SPI_TX_MODE (WILC_SPI_REG_BASE + 0x20)
86 #define WILC_SPI_PROTOCOL_CONFIG (WILC_SPI_REG_BASE + 0x24)
87 #define WILC_SPI_INTR_CTL (WILC_SPI_REG_BASE + 0x2c)
89 #define WILC_SPI_PROTOCOL_OFFSET (WILC_SPI_PROTOCOL_CONFIG - \
92 #define WILC_AHB_DATA_MEM_BASE 0x30000
93 #define WILC_AHB_SHARE_MEM_BASE 0xd0000
95 #define WILC_VMM_TBL_RX_SHADOW_BASE WILC_AHB_SHARE_MEM_BASE
96 #define WILC_VMM_TBL_RX_SHADOW_SIZE 256
98 #define WILC_GP_REG_0 0x149c
99 #define WILC_GP_REG_1 0x14a0
101 #define WILC_HAVE_SDIO_IRQ_GPIO BIT(0)
102 #define WILC_HAVE_USE_PMU BIT(1)
103 #define WILC_HAVE_SLEEP_CLK_SRC_RTC BIT(2)
104 #define WILC_HAVE_SLEEP_CLK_SRC_XO BIT(3)
105 #define WILC_HAVE_EXT_PA_INV_TX_RX BIT(4)
106 #define WILC_HAVE_LEGACY_RF_SETTINGS BIT(5)
107 #define WILC_HAVE_XTAL_24 BIT(6)
108 #define WILC_HAVE_DISABLE_WILC_UART BIT(7)
110 /********************************************
114 ********************************************/
115 #define WILC_CFG_PKT 1
116 #define WILC_NET_PKT 0
117 #define WILC_MGMT_PKT 2
119 #define WILC_CFG_SET 1
120 #define WILC_CFG_QUERY 0
122 #define WILC_CFG_RSP 1
123 #define WILC_CFG_RSP_STATUS 2
124 #define WILC_CFG_RSP_SCAN 3
126 #define WILC_PLL_TO_SDIO 4
127 #define WILC_PLL_TO_SPI 2
128 #define ABORT_INT BIT(31)
130 /*******************************************/
131 /* E0 and later Interrupt flags. */
132 /*******************************************/
133 /*******************************************/
134 /* E0 and later Interrupt flags. */
135 /* IRQ Status word */
136 /* 15:0 = DMA count in words. */
143 /*******************************************/
144 #define IRG_FLAGS_OFFSET 16
145 #define IRQ_DMA_WD_CNT_MASK ((1ul << IRG_FLAGS_OFFSET) - 1)
146 #define INT_0 BIT(IRG_FLAGS_OFFSET)
147 #define INT_1 BIT(IRG_FLAGS_OFFSET + 1)
148 #define INT_2 BIT(IRG_FLAGS_OFFSET + 2)
149 #define INT_3 BIT(IRG_FLAGS_OFFSET + 3)
150 #define INT_4 BIT(IRG_FLAGS_OFFSET + 4)
151 #define INT_5 BIT(IRG_FLAGS_OFFSET + 5)
152 #define MAX_NUM_INT 6
154 /*******************************************/
155 /* E0 and later Interrupt flags. */
163 /* 6: Select VMM table 1 */
164 /* 7: Select VMM table 2 */
166 /*******************************************/
167 #define CLR_INT0 BIT(0)
168 #define CLR_INT1 BIT(1)
169 #define CLR_INT2 BIT(2)
170 #define CLR_INT3 BIT(3)
171 #define CLR_INT4 BIT(4)
172 #define CLR_INT5 BIT(5)
173 #define SEL_VMM_TBL0 BIT(6)
174 #define SEL_VMM_TBL1 BIT(7)
175 #define EN_VMM BIT(8)
177 #define DATA_INT_EXT INT_0
178 #define PLL_INT_EXT INT_1
179 #define SLEEP_INT_EXT INT_2
180 #define ALL_INT_EXT (DATA_INT_EXT | PLL_INT_EXT | SLEEP_INT_EXT)
181 #define NUM_INT_EXT 3
183 #define DATA_INT_CLR CLR_INT0
184 #define PLL_INT_CLR CLR_INT1
185 #define SLEEP_INT_CLR CLR_INT2
187 #define ENABLE_RX_VMM (SEL_VMM_TBL1 | EN_VMM)
188 #define ENABLE_TX_VMM (SEL_VMM_TBL0 | EN_VMM)
189 /*time for expiring the semaphores of cfg packets*/
190 #define CFG_PKTS_TIMEOUT 2000
191 /********************************************
195 ********************************************/
196 typedef void (*wilc_debug_func)(u32, char *, ...);
198 /********************************************
200 * Tx/Rx Queue Structure
202 ********************************************/
205 struct txq_entry_t *next;
206 struct txq_entry_t *prev;
208 int tcp_pending_ack_idx;
213 void (*tx_complete_func)(void *, int);
217 struct rxq_entry_t *next;
222 /********************************************
226 ********************************************/
228 struct wilc_hif_func {
229 int (*hif_init)(struct wilc *);
230 int (*hif_deinit)(struct wilc *);
231 int (*hif_read_reg)(struct wilc *, u32, u32 *);
232 int (*hif_write_reg)(struct wilc *, u32, u32);
233 int (*hif_block_rx)(struct wilc *, u32, u8 *, u32);
234 int (*hif_block_tx)(struct wilc *, u32, u8 *, u32);
235 int (*hif_read_int)(struct wilc *, u32 *);
236 int (*hif_clear_int_ext)(struct wilc *, u32);
237 int (*hif_read_size)(struct wilc *, u32 *);
238 int (*hif_block_tx_ext)(struct wilc *, u32, u8 *, u32);
239 int (*hif_block_rx_ext)(struct wilc *, u32, u8 *, u32);
240 int (*hif_sync_ext)(struct wilc *, int);
241 int (*enable_interrupt)(struct wilc *nic);
242 void (*disable_interrupt)(struct wilc *nic);
245 extern const struct wilc_hif_func wilc_hif_spi;
246 extern const struct wilc_hif_func wilc_hif_sdio;
248 /********************************************
250 * Configuration Structure
252 ********************************************/
254 #define MAX_CFG_FRAME_SIZE 1468
256 struct wilc_cfg_frame {
261 u8 frame[MAX_CFG_FRAME_SIZE];
264 struct wilc_cfg_rsp {
271 int wilc_wlan_firmware_download(struct wilc *wilc, const u8 *buffer, u32 buffer_size);
272 int wilc_wlan_start(struct wilc *);
273 int wilc_wlan_stop(struct wilc *);
274 int wilc_wlan_txq_add_net_pkt(struct net_device *dev, void *priv, u8 *buffer,
275 u32 buffer_size, wilc_tx_complete_func_t func);
276 int wilc_wlan_handle_txq(struct net_device *dev, u32 *txq_count);
277 void wilc_handle_isr(struct wilc *wilc);
278 void wilc_wlan_cleanup(struct net_device *dev);
279 int wilc_wlan_cfg_set(struct wilc *wilc, int start, u32 wid, u8 *buffer,
280 u32 buffer_size, int commit, u32 drv_handler);
281 int wilc_wlan_cfg_get(struct wilc *wilc, int start, u32 wid, int commit,
283 int wilc_wlan_cfg_get_val(u32 wid, u8 *buffer, u32 buffer_size);
284 int wilc_wlan_txq_add_mgmt_pkt(struct net_device *dev, void *priv, u8 *buffer,
285 u32 buffer_size, wilc_tx_complete_func_t func);
286 void wilc_chip_sleep_manually(struct wilc *wilc);
288 void wilc_enable_tcp_ack_filter(bool value);
289 int wilc_wlan_get_num_conn_ifcs(struct wilc *);
290 int wilc_mac_xmit(struct sk_buff *skb, struct net_device *dev);
292 int wilc_mac_open(struct net_device *ndev);
293 int wilc_mac_close(struct net_device *ndev);
295 int wilc_wlan_set_bssid(struct net_device *wilc_netdev, u8 *pBSSID);
296 void WILC_WFI_p2p_rx(struct net_device *dev, u8 *buff, u32 size);
298 extern bool wilc_enable_ps;