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staging/winbond: fix a style error
[karo-tx-linux.git] / drivers / staging / winbond / wb35reg.c
1 #include "wb35reg_f.h"
2 #include "phy_calibration.h"
3
4 #include <linux/usb.h>
5 #include <linux/slab.h>
6
7 /*
8  * true  : read command process successfully
9  * false : register not support
10  * RegisterNo : start base
11  * pRegisterData : data point
12  * NumberOfData : number of register data
13  * Flag : AUTO_INCREMENT - RegisterNo will auto increment 4
14  *        NO_INCREMENT - Function will write data into the same register
15  */
16 unsigned char Wb35Reg_BurstWrite(struct hw_data *pHwData, u16 RegisterNo,
17                                  u32 *pRegisterData, u8 NumberOfData, u8 Flag)
18 {
19         struct wb35_reg         *reg = &pHwData->reg;
20         struct urb              *urb = NULL;
21         struct wb35_reg_queue   *reg_queue = NULL;
22         u16                     UrbSize;
23         struct usb_ctrlrequest  *dr;
24         u16                     i, DataSize = NumberOfData * 4;
25
26         /* Module shutdown */
27         if (pHwData->SurpriseRemove)
28                 return false;
29
30         /* Trying to use burst write function if use new hardware */
31         UrbSize = sizeof(struct wb35_reg_queue) + DataSize + sizeof(struct usb_ctrlrequest);
32         reg_queue = kzalloc(UrbSize, GFP_ATOMIC);
33         if (reg_queue == NULL)
34                 return false;
35
36         urb = usb_alloc_urb(0, GFP_ATOMIC);
37         if (urb == NULL) {
38                 kfree(reg_queue);
39                 return false;
40         }
41
42         reg_queue->DIRECT = 2; /* burst write register */
43         reg_queue->INDEX = RegisterNo;
44         reg_queue->pBuffer = (u32 *)((u8 *)reg_queue + sizeof(struct wb35_reg_queue));
45         memcpy(reg_queue->pBuffer, pRegisterData, DataSize);
46         /* the function for reversing register data from little endian to big endian */
47         for (i = 0; i < NumberOfData; i++)
48                 reg_queue->pBuffer[i] = cpu_to_le32(reg_queue->pBuffer[i]);
49
50         dr = (struct usb_ctrlrequest *)((u8 *)reg_queue + sizeof(struct wb35_reg_queue) + DataSize);
51         dr->bRequestType = USB_TYPE_VENDOR | USB_DIR_OUT | USB_RECIP_DEVICE;
52         dr->bRequest = 0x04; /* USB or vendor-defined request code, burst mode */
53         dr->wValue = cpu_to_le16(Flag); /* 0: Register number auto-increment, 1: No auto increment */
54         dr->wIndex = cpu_to_le16(RegisterNo);
55         dr->wLength = cpu_to_le16(DataSize);
56         reg_queue->Next = NULL;
57         reg_queue->pUsbReq = dr;
58         reg_queue->urb = urb;
59
60         spin_lock_irq(&reg->EP0VM_spin_lock);
61         if (reg->reg_first == NULL)
62                 reg->reg_first = reg_queue;
63         else
64                 reg->reg_last->Next = reg_queue;
65         reg->reg_last = reg_queue;
66
67         spin_unlock_irq(&reg->EP0VM_spin_lock);
68
69         /* Start EP0VM */
70         Wb35Reg_EP0VM_start(pHwData);
71
72         return true;
73 }
74
75 void Wb35Reg_Update(struct hw_data *pHwData, u16 RegisterNo, u32 RegisterValue)
76 {
77         struct wb35_reg *reg = &pHwData->reg;
78         switch (RegisterNo) {
79         case 0x3b0:
80                 reg->U1B0 = RegisterValue;
81                 break;
82         case 0x3bc:
83                 reg->U1BC_LEDConfigure = RegisterValue;
84                 break;
85         case 0x400:
86                 reg->D00_DmaControl = RegisterValue;
87                 break;
88         case 0x800:
89                 reg->M00_MacControl = RegisterValue;
90                 break;
91         case 0x804:
92                 reg->M04_MulticastAddress1 = RegisterValue;
93                 break;
94         case 0x808:
95                 reg->M08_MulticastAddress2 = RegisterValue;
96                 break;
97         case 0x824:
98                 reg->M24_MacControl = RegisterValue;
99                 break;
100         case 0x828:
101                 reg->M28_MacControl = RegisterValue;
102                 break;
103         case 0x82c:
104                 reg->M2C_MacControl = RegisterValue;
105                 break;
106         case 0x838:
107                 reg->M38_MacControl = RegisterValue;
108                 break;
109         case 0x840:
110                 reg->M40_MacControl = RegisterValue;
111                 break;
112         case 0x844:
113                 reg->M44_MacControl = RegisterValue;
114                 break;
115         case 0x848:
116                 reg->M48_MacControl = RegisterValue;
117                 break;
118         case 0x84c:
119                 reg->M4C_MacStatus = RegisterValue;
120                 break;
121         case 0x860:
122                 reg->M60_MacControl = RegisterValue;
123                 break;
124         case 0x868:
125                 reg->M68_MacControl = RegisterValue;
126                 break;
127         case 0x870:
128                 reg->M70_MacControl = RegisterValue;
129                 break;
130         case 0x874:
131                 reg->M74_MacControl = RegisterValue;
132                 break;
133         case 0x878:
134                 reg->M78_ERPInformation = RegisterValue;
135                 break;
136         case 0x87C:
137                 reg->M7C_MacControl = RegisterValue;
138                 break;
139         case 0x880:
140                 reg->M80_MacControl = RegisterValue;
141                 break;
142         case 0x884:
143                 reg->M84_MacControl = RegisterValue;
144                 break;
145         case 0x888:
146                 reg->M88_MacControl = RegisterValue;
147                 break;
148         case 0x898:
149                 reg->M98_MacControl = RegisterValue;
150                 break;
151         case 0x100c:
152                 reg->BB0C = RegisterValue;
153                 break;
154         case 0x102c:
155                 reg->BB2C = RegisterValue;
156                 break;
157         case 0x1030:
158                 reg->BB30 = RegisterValue;
159                 break;
160         case 0x103c:
161                 reg->BB3C = RegisterValue;
162                 break;
163         case 0x1048:
164                 reg->BB48 = RegisterValue;
165                 break;
166         case 0x104c:
167                 reg->BB4C = RegisterValue;
168                 break;
169         case 0x1050:
170                 reg->BB50 = RegisterValue;
171                 break;
172         case 0x1054:
173                 reg->BB54 = RegisterValue;
174                 break;
175         case 0x1058:
176                 reg->BB58 = RegisterValue;
177                 break;
178         case 0x105c:
179                 reg->BB5C = RegisterValue;
180                 break;
181         case 0x1060:
182                 reg->BB60 = RegisterValue;
183                 break;
184         }
185 }
186
187 /*
188  * true  : read command process successfully
189  * false : register not support
190  */
191 unsigned char Wb35Reg_WriteSync(struct hw_data *pHwData, u16 RegisterNo,
192                                 u32 RegisterValue)
193 {
194         struct wb35_reg *reg = &pHwData->reg;
195         int ret = -1;
196
197         /* Module shutdown */
198         if (pHwData->SurpriseRemove)
199                 return false;
200
201         RegisterValue = cpu_to_le32(RegisterValue);
202
203         /* update the register by send usb message */
204         reg->SyncIoPause = 1;
205
206         /* Wait until EP0VM stop */
207         while (reg->EP0vm_state != VM_STOP)
208                 msleep(10);
209
210         /* Sync IoCallDriver */
211         reg->EP0vm_state = VM_RUNNING;
212         ret = usb_control_msg(pHwData->udev,
213                               usb_sndctrlpipe(pHwData->udev, 0),
214                               0x03,
215                               USB_TYPE_VENDOR | USB_RECIP_DEVICE | USB_DIR_OUT,
216                               0x0, RegisterNo, &RegisterValue, 4, HZ * 100);
217         reg->EP0vm_state = VM_STOP;
218         reg->SyncIoPause = 0;
219
220         Wb35Reg_EP0VM_start(pHwData);
221
222         if (ret < 0) {
223                 pr_debug("EP0 Write register usb message sending error\n");
224                 pHwData->SurpriseRemove = 1;
225                 return false;
226         }
227         return true;
228 }
229
230 /*
231  * true  : read command process successfully
232  * false : register not support
233  */
234 unsigned char Wb35Reg_Write(struct hw_data *pHwData, u16 RegisterNo,
235                             u32 RegisterValue)
236 {
237         struct wb35_reg         *reg = &pHwData->reg;
238         struct usb_ctrlrequest  *dr;
239         struct urb              *urb = NULL;
240         struct wb35_reg_queue   *reg_queue = NULL;
241         u16                     UrbSize;
242
243         /* Module shutdown */
244         if (pHwData->SurpriseRemove)
245                 return false;
246
247         /* update the register by send urb request */
248         UrbSize = sizeof(struct wb35_reg_queue) + sizeof(struct usb_ctrlrequest);
249         reg_queue = kzalloc(UrbSize, GFP_ATOMIC);
250         if (reg_queue == NULL)
251                 return false;
252
253         urb = usb_alloc_urb(0, GFP_ATOMIC);
254         if (urb == NULL) {
255                 kfree(reg_queue);
256                 return false;
257         }
258
259         reg_queue->DIRECT = 1; /* burst write register */
260         reg_queue->INDEX = RegisterNo;
261         reg_queue->VALUE = cpu_to_le32(RegisterValue);
262         reg_queue->RESERVED_VALID = false;
263         dr = (struct usb_ctrlrequest *)((u8 *)reg_queue + sizeof(struct wb35_reg_queue));
264         dr->bRequestType = USB_TYPE_VENDOR | USB_DIR_OUT | USB_RECIP_DEVICE;
265         dr->bRequest = 0x03; /* USB or vendor-defined request code, burst mode */
266         dr->wValue = cpu_to_le16(0x0);
267         dr->wIndex = cpu_to_le16(RegisterNo);
268         dr->wLength = cpu_to_le16(4);
269
270         /* Enter the sending queue */
271         reg_queue->Next = NULL;
272         reg_queue->pUsbReq = dr;
273         reg_queue->urb = urb;
274
275         spin_lock_irq(&reg->EP0VM_spin_lock);
276         if (reg->reg_first == NULL)
277                 reg->reg_first = reg_queue;
278         else
279                 reg->reg_last->Next = reg_queue;
280         reg->reg_last = reg_queue;
281
282         spin_unlock_irq(&reg->EP0VM_spin_lock);
283
284         /* Start EP0VM */
285         Wb35Reg_EP0VM_start(pHwData);
286
287         return true;
288 }
289
290 /*
291  * This command will be executed with a user defined value. When it completes,
292  * this value is useful. For example, hal_set_current_channel will use it.
293  * true  : read command process successfully
294  * false : register not supported
295  */
296 unsigned char Wb35Reg_WriteWithCallbackValue(struct hw_data *pHwData,
297                                                 u16 RegisterNo,
298                                                 u32 RegisterValue,
299                                                 s8 *pValue,
300                                                 s8 Len)
301 {
302         struct wb35_reg         *reg = &pHwData->reg;
303         struct usb_ctrlrequest  *dr;
304         struct urb              *urb = NULL;
305         struct wb35_reg_queue   *reg_queue = NULL;
306         u16                     UrbSize;
307
308         /* Module shutdown */
309         if (pHwData->SurpriseRemove)
310                 return false;
311
312         /* update the register by send urb request */
313         UrbSize = sizeof(struct wb35_reg_queue) + sizeof(struct usb_ctrlrequest);
314         reg_queue = kzalloc(UrbSize, GFP_ATOMIC);
315         if (reg_queue == NULL)
316                 return false;
317
318         urb = usb_alloc_urb(0, GFP_ATOMIC);
319         if (urb == NULL) {
320                 kfree(reg_queue);
321                 return false;
322         }
323
324         reg_queue->DIRECT = 1; /* burst write register */
325         reg_queue->INDEX = RegisterNo;
326         reg_queue->VALUE = cpu_to_le32(RegisterValue);
327         /* NOTE : Users must guarantee the size of value will not exceed the buffer size. */
328         memcpy(reg_queue->RESERVED, pValue, Len);
329         reg_queue->RESERVED_VALID = true;
330         dr = (struct usb_ctrlrequest *)((u8 *)reg_queue + sizeof(struct wb35_reg_queue));
331         dr->bRequestType = USB_TYPE_VENDOR | USB_DIR_OUT | USB_RECIP_DEVICE;
332         dr->bRequest = 0x03; /* USB or vendor-defined request code, burst mode */
333         dr->wValue = cpu_to_le16(0x0);
334         dr->wIndex = cpu_to_le16(RegisterNo);
335         dr->wLength = cpu_to_le16(4);
336
337         /* Enter the sending queue */
338         reg_queue->Next = NULL;
339         reg_queue->pUsbReq = dr;
340         reg_queue->urb = urb;
341         spin_lock_irq(&reg->EP0VM_spin_lock);
342         if (reg->reg_first == NULL)
343                 reg->reg_first = reg_queue;
344         else
345                 reg->reg_last->Next = reg_queue;
346         reg->reg_last = reg_queue;
347
348         spin_unlock_irq(&reg->EP0VM_spin_lock);
349
350         /* Start EP0VM */
351         Wb35Reg_EP0VM_start(pHwData);
352
353         return true;
354 }
355
356 /*
357  * true  : read command process successfully
358  * false : register not support
359  * pRegisterValue : It must be a resident buffer due to
360  *                  asynchronous read register.
361  */
362 unsigned char Wb35Reg_ReadSync(struct hw_data *pHwData, u16 RegisterNo,
363                                u32 *pRegisterValue)
364 {
365         struct wb35_reg *reg = &pHwData->reg;
366         u32             *pltmp = pRegisterValue;
367         int             ret = -1;
368
369         /* Module shutdown */
370         if (pHwData->SurpriseRemove)
371                 return false;
372
373         /* Read the register by send usb message */
374         reg->SyncIoPause = 1;
375
376         /* Wait until EP0VM stop */
377         while (reg->EP0vm_state != VM_STOP)
378                 msleep(10);
379
380         reg->EP0vm_state = VM_RUNNING;
381         ret = usb_control_msg(pHwData->udev,
382                               usb_rcvctrlpipe(pHwData->udev, 0),
383                               0x01,
384                               USB_TYPE_VENDOR | USB_RECIP_DEVICE | USB_DIR_IN,
385                               0x0, RegisterNo, pltmp, 4, HZ * 100);
386
387         *pRegisterValue = cpu_to_le32(*pltmp);
388
389         reg->EP0vm_state = VM_STOP;
390
391         Wb35Reg_Update(pHwData, RegisterNo, *pRegisterValue);
392         reg->SyncIoPause = 0;
393
394         Wb35Reg_EP0VM_start(pHwData);
395
396         if (ret < 0) {
397                 pr_debug("EP0 Read register usb message sending error\n");
398                 pHwData->SurpriseRemove = 1;
399                 return false;
400         }
401         return true;
402 }
403
404 /*
405  * true  : read command process successfully
406  * false : register not support
407  * pRegisterValue : It must be a resident buffer due to
408  *                  asynchronous read register.
409  */
410 unsigned char Wb35Reg_Read(struct hw_data *pHwData, u16 RegisterNo,
411                            u32 *pRegisterValue)
412 {
413         struct wb35_reg         *reg = &pHwData->reg;
414         struct usb_ctrlrequest  *dr;
415         struct urb              *urb;
416         struct wb35_reg_queue   *reg_queue;
417         u16                     UrbSize;
418
419         /* Module shutdown */
420         if (pHwData->SurpriseRemove)
421                 return false;
422
423         /* update the variable by send Urb to read register */
424         UrbSize = sizeof(struct wb35_reg_queue) + sizeof(struct usb_ctrlrequest);
425         reg_queue = kzalloc(UrbSize, GFP_ATOMIC);
426         if (reg_queue == NULL)
427                 return false;
428
429         urb = usb_alloc_urb(0, GFP_ATOMIC);
430         if (urb == NULL) {
431                 kfree(reg_queue);
432                 return false;
433         }
434         reg_queue->DIRECT = 0; /* read register */
435         reg_queue->INDEX = RegisterNo;
436         reg_queue->pBuffer = pRegisterValue;
437         dr = (struct usb_ctrlrequest *)((u8 *)reg_queue + sizeof(struct wb35_reg_queue));
438         dr->bRequestType = USB_TYPE_VENDOR | USB_RECIP_DEVICE | USB_DIR_IN;
439         dr->bRequest = 0x01; /* USB or vendor-defined request code, burst mode */
440         dr->wValue = cpu_to_le16(0x0);
441         dr->wIndex = cpu_to_le16(RegisterNo);
442         dr->wLength = cpu_to_le16(4);
443
444         /* Enter the sending queue */
445         reg_queue->Next = NULL;
446         reg_queue->pUsbReq = dr;
447         reg_queue->urb = urb;
448         spin_lock_irq(&reg->EP0VM_spin_lock);
449         if (reg->reg_first == NULL)
450                 reg->reg_first = reg_queue;
451         else
452                 reg->reg_last->Next = reg_queue;
453         reg->reg_last = reg_queue;
454
455         spin_unlock_irq(&reg->EP0VM_spin_lock);
456
457         /* Start EP0VM */
458         Wb35Reg_EP0VM_start(pHwData);
459
460         return true;
461 }
462
463
464 void Wb35Reg_EP0VM_start(struct hw_data *pHwData)
465 {
466         struct wb35_reg *reg = &pHwData->reg;
467
468         if (atomic_inc_return(&reg->RegFireCount) == 1) {
469                 reg->EP0vm_state = VM_RUNNING;
470                 Wb35Reg_EP0VM(pHwData);
471         } else
472                 atomic_dec(&reg->RegFireCount);
473 }
474
475 void Wb35Reg_EP0VM(struct hw_data *pHwData)
476 {
477         struct wb35_reg         *reg = &pHwData->reg;
478         struct urb              *urb;
479         struct usb_ctrlrequest  *dr;
480         u32                     *pBuffer;
481         int                     ret = -1;
482         struct wb35_reg_queue   *reg_queue;
483
484
485         if (reg->SyncIoPause)
486                 goto cleanup;
487
488         if (pHwData->SurpriseRemove)
489                 goto cleanup;
490
491         /* Get the register data and send to USB through Irp */
492         spin_lock_irq(&reg->EP0VM_spin_lock);
493         reg_queue = reg->reg_first;
494         spin_unlock_irq(&reg->EP0VM_spin_lock);
495
496         if (!reg_queue)
497                 goto cleanup;
498
499         /* Get an Urb, send it */
500         urb = (struct urb *)reg_queue->urb;
501
502         dr = reg_queue->pUsbReq;
503         urb = reg_queue->urb;
504         pBuffer = reg_queue->pBuffer;
505         if (reg_queue->DIRECT == 1) /* output */
506                 pBuffer = &reg_queue->VALUE;
507
508         usb_fill_control_urb(urb, pHwData->udev,
509                               REG_DIRECTION(pHwData->udev, reg_queue),
510                               (u8 *)dr, pBuffer, cpu_to_le16(dr->wLength),
511                               Wb35Reg_EP0VM_complete, (void *)pHwData);
512
513         reg->EP0vm_state = VM_RUNNING;
514
515         ret = usb_submit_urb(urb, GFP_ATOMIC);
516
517         if (ret < 0) {
518                 pr_debug("EP0 Irp sending error\n");
519                 goto cleanup;
520         }
521         return;
522
523  cleanup:
524         reg->EP0vm_state = VM_STOP;
525         atomic_dec(&reg->RegFireCount);
526 }
527
528
529 void Wb35Reg_EP0VM_complete(struct urb *urb)
530 {
531         struct hw_data          *pHwData = (struct hw_data *)urb->context;
532         struct wb35_reg         *reg = &pHwData->reg;
533         struct wb35_reg_queue   *reg_queue;
534
535
536         /* Variable setting */
537         reg->EP0vm_state = VM_COMPLETED;
538         reg->EP0VM_status = urb->status;
539
540         if (pHwData->SurpriseRemove) { /* Let WbWlanHalt to handle surprise remove */
541                 reg->EP0vm_state = VM_STOP;
542                 atomic_dec(&reg->RegFireCount);
543         } else {
544                 /* Complete to send, remove the URB from the first */
545                 spin_lock_irq(&reg->EP0VM_spin_lock);
546                 reg_queue = reg->reg_first;
547                 if (reg_queue == reg->reg_last)
548                         reg->reg_last = NULL;
549                 reg->reg_first = reg->reg_first->Next;
550                 spin_unlock_irq(&reg->EP0VM_spin_lock);
551
552                 if (reg->EP0VM_status) {
553                         pr_debug("EP0 IoCompleteRoutine return error\n");
554                         reg->EP0vm_state = VM_STOP;
555                         pHwData->SurpriseRemove = 1;
556                 } else {
557                         /* Success. Update the result */
558
559                         /* Start the next send */
560                         Wb35Reg_EP0VM(pHwData);
561                 }
562
563                 kfree(reg_queue);
564         }
565
566         usb_free_urb(urb);
567 }
568
569
570 void Wb35Reg_destroy(struct hw_data *pHwData)
571 {
572         struct wb35_reg         *reg = &pHwData->reg;
573         struct urb              *urb;
574         struct wb35_reg_queue   *reg_queue;
575
576         Uxx_power_off_procedure(pHwData);
577
578         /* Wait for Reg operation completed */
579         do {
580                 msleep(10); /* Delay for waiting function enter */
581         } while (reg->EP0vm_state != VM_STOP);
582         msleep(10);  /* Delay for waiting function enter */
583
584         /* Release all the data in RegQueue */
585         spin_lock_irq(&reg->EP0VM_spin_lock);
586         reg_queue = reg->reg_first;
587         while (reg_queue) {
588                 if (reg_queue == reg->reg_last)
589                         reg->reg_last = NULL;
590                 reg->reg_first = reg->reg_first->Next;
591
592                 urb = reg_queue->urb;
593                 spin_unlock_irq(&reg->EP0VM_spin_lock);
594                 if (urb) {
595                         usb_free_urb(urb);
596                         kfree(reg_queue);
597                 } else {
598                         pr_debug("EP0 queue release error\n");
599                 }
600                 spin_lock_irq(&reg->EP0VM_spin_lock);
601
602                 reg_queue = reg->reg_first;
603         }
604         spin_unlock_irq(&reg->EP0VM_spin_lock);
605 }
606
607 /*
608  * =======================================================================
609  * The function can be run in passive-level only.
610  * =========================================================================
611  */
612 unsigned char Wb35Reg_initial(struct hw_data *pHwData)
613 {
614         struct wb35_reg *reg = &pHwData->reg;
615         u32 ltmp;
616         u32 SoftwareSet, VCO_trim, TxVga, Region_ScanInterval;
617
618         /* Spin lock is acquired for read and write IRP command */
619         spin_lock_init(&reg->EP0VM_spin_lock);
620
621         /* Getting RF module type from EEPROM */
622         Wb35Reg_WriteSync(pHwData, 0x03b4, 0x080d0000); /* Start EEPROM access + Read + address(0x0d) */
623         Wb35Reg_ReadSync(pHwData, 0x03b4, &ltmp);
624
625         /* Update RF module type and determine the PHY type by inf or EEPROM */
626         reg->EEPROMPhyType = (u8)(ltmp & 0xff);
627         /*
628          * 0 V MAX2825, 1 V MAX2827, 2 V MAX2828, 3 V MAX2829
629          * 16V AL2230, 17 - AL7230, 18 - AL2230S
630          * 32 Reserved
631          * 33 - W89RF242(TxVGA 0~19), 34 - W89RF242(TxVGA 0~34)
632          */
633         if (reg->EEPROMPhyType != RF_DECIDE_BY_INF) {
634                 if ((reg->EEPROMPhyType == RF_MAXIM_2825)       ||
635                         (reg->EEPROMPhyType == RF_MAXIM_2827)   ||
636                         (reg->EEPROMPhyType == RF_MAXIM_2828)   ||
637                         (reg->EEPROMPhyType == RF_MAXIM_2829)   ||
638                         (reg->EEPROMPhyType == RF_MAXIM_V1)     ||
639                         (reg->EEPROMPhyType == RF_AIROHA_2230)  ||
640                         (reg->EEPROMPhyType == RF_AIROHA_2230S) ||
641                         (reg->EEPROMPhyType == RF_AIROHA_7230)  ||
642                         (reg->EEPROMPhyType == RF_WB_242)       ||
643                         (reg->EEPROMPhyType == RF_WB_242_1))
644                         pHwData->phy_type = reg->EEPROMPhyType;
645         }
646
647         /* Power On procedure running. The relative parameter will be set according to phy_type */
648         Uxx_power_on_procedure(pHwData);
649
650         /* Reading MAC address */
651         Uxx_ReadEthernetAddress(pHwData);
652
653         /* Read VCO trim for RF parameter */
654         Wb35Reg_WriteSync(pHwData, 0x03b4, 0x08200000);
655         Wb35Reg_ReadSync(pHwData, 0x03b4, &VCO_trim);
656
657         /* Read Antenna On/Off of software flag */
658         Wb35Reg_WriteSync(pHwData, 0x03b4, 0x08210000);
659         Wb35Reg_ReadSync(pHwData, 0x03b4, &SoftwareSet);
660
661         /* Read TXVGA */
662         Wb35Reg_WriteSync(pHwData, 0x03b4, 0x08100000);
663         Wb35Reg_ReadSync(pHwData, 0x03b4, &TxVga);
664
665         /* Get Scan interval setting from EEPROM offset 0x1c */
666         Wb35Reg_WriteSync(pHwData, 0x03b4, 0x081d0000);
667         Wb35Reg_ReadSync(pHwData, 0x03b4, &Region_ScanInterval);
668
669         /* Update Ethernet address */
670         memcpy(pHwData->CurrentMacAddress, pHwData->PermanentMacAddress, ETH_ALEN);
671
672         /* Update software variable */
673         pHwData->SoftwareSet = (u16)(SoftwareSet & 0xffff);
674         TxVga &= 0x000000ff;
675         pHwData->PowerIndexFromEEPROM = (u8)TxVga;
676         pHwData->VCO_trim = (u8)VCO_trim & 0xff;
677         if (pHwData->VCO_trim == 0xff)
678                 pHwData->VCO_trim = 0x28;
679
680         reg->EEPROMRegion = (u8)(Region_ScanInterval >> 8);
681         if (reg->EEPROMRegion < 1 || reg->EEPROMRegion > 6)
682                 reg->EEPROMRegion = REGION_AUTO;
683
684         /* For Get Tx VGA from EEPROM */
685         GetTxVgaFromEEPROM(pHwData);
686
687         /* Set Scan Interval */
688         pHwData->Scan_Interval = (u8)(Region_ScanInterval & 0xff) * 10;
689         if ((pHwData->Scan_Interval == 2550) || (pHwData->Scan_Interval < 10)) /* Is default setting 0xff * 10 */
690                 pHwData->Scan_Interval = SCAN_MAX_CHNL_TIME;
691
692         /* Initial register */
693         RFSynthesizer_initial(pHwData);
694
695         BBProcessor_initial(pHwData); /* Async write, must wait until complete */
696
697         Wb35Reg_phy_calibration(pHwData);
698
699         Mxx_initial(pHwData);
700         Dxx_initial(pHwData);
701
702         if (pHwData->SurpriseRemove)
703                 return false;
704         else
705                 return true; /* Initial fail */
706 }
707
708 /*
709  * ================================================================
710  *  CardComputeCrc --
711  *
712  *  Description:
713  *    Runs the AUTODIN II CRC algorithm on the buffers Buffer length.
714  *
715  *  Arguments:
716  *    Buffer - the input buffer
717  *    Length - the length of Buffer
718  *
719  *  Return Value:
720  *    The 32-bit CRC value.
721  * ===================================================================
722  */
723 u32 CardComputeCrc(u8 *Buffer, u32 Length)
724 {
725         u32     Crc, Carry;
726         u32     i, j;
727         u8      CurByte;
728
729         Crc = 0xffffffff;
730
731         for (i = 0; i < Length; i++) {
732                 CurByte = Buffer[i];
733                 for (j = 0; j < 8; j++) {
734                         Carry = ((Crc & 0x80000000) ? 1 : 0) ^ (CurByte & 0x01);
735                         Crc <<= 1;
736                         CurByte >>= 1;
737                         if (Carry)
738                                 Crc = (Crc ^ 0x04c11db6) | Carry;
739                 }
740         }
741         return Crc;
742 }
743
744
745 /*
746  * ==================================================================
747  * BitReverse --
748  *   Reverse the bits in the input argument, dwData, which is
749  *   regarded as a string of bits with the length, DataLength.
750  *
751  * Arguments:
752  *   dwData     :
753  *   DataLength :
754  *
755  * Return:
756  *   The converted value.
757  * ==================================================================
758  */
759 u32 BitReverse(u32 dwData, u32 DataLength)
760 {
761         u32     HalfLength, i, j;
762         u32     BitA, BitB;
763
764         if (DataLength <= 0)
765                 return 0;       /* No conversion is done. */
766         dwData = dwData & (0xffffffff >> (32 - DataLength));
767
768         HalfLength = DataLength / 2;
769         for (i = 0, j = DataLength - 1; i < HalfLength; i++, j--) {
770                 BitA = GetBit(dwData, i);
771                 BitB = GetBit(dwData, j);
772                 if (BitA && !BitB) {
773                         dwData = ClearBit(dwData, i);
774                         dwData = SetBit(dwData, j);
775                 } else if (!BitA && BitB) {
776                         dwData = SetBit(dwData, i);
777                         dwData = ClearBit(dwData, j);
778                 } else {
779                         /* Do nothing since these two bits are of the save values. */
780                 }
781         }
782         return dwData;
783 }
784
785 void Wb35Reg_phy_calibration(struct hw_data *pHwData)
786 {
787         u32     BB3c, BB54;
788
789         if ((pHwData->phy_type == RF_WB_242) ||
790                 (pHwData->phy_type == RF_WB_242_1)) {
791                 phy_calibration_winbond(pHwData, 2412); /* Sync operation */
792                 Wb35Reg_ReadSync(pHwData, 0x103c, &BB3c);
793                 Wb35Reg_ReadSync(pHwData, 0x1054, &BB54);
794
795                 pHwData->BB3c_cal = BB3c;
796                 pHwData->BB54_cal = BB54;
797
798                 RFSynthesizer_initial(pHwData);
799                 BBProcessor_initial(pHwData); /* Async operation */
800
801                 Wb35Reg_WriteSync(pHwData, 0x103c, BB3c);
802                 Wb35Reg_WriteSync(pHwData, 0x1054, BB54);
803         }
804 }
805
806