2 * exynos_thermal.c - Samsung EXYNOS TMU (Thermal Management Unit)
4 * Copyright (C) 2011 Samsung Electronics
5 * Donggeun Kim <dg77.kim@samsung.com>
6 * Amit Daniel Kachhap <amit.kachhap@linaro.org>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
24 #include <linux/module.h>
25 #include <linux/err.h>
26 #include <linux/kernel.h>
27 #include <linux/slab.h>
28 #include <linux/platform_device.h>
29 #include <linux/interrupt.h>
30 #include <linux/clk.h>
31 #include <linux/workqueue.h>
32 #include <linux/sysfs.h>
33 #include <linux/kobject.h>
35 #include <linux/mutex.h>
36 #include <linux/err.h>
37 #include <linux/platform_data/exynos_thermal.h>
38 #include <linux/thermal.h>
39 #include <linux/cpufreq.h>
40 #include <linux/cpu_cooling.h>
45 /* Exynos generic registers */
46 #define EXYNOS_TMU_REG_TRIMINFO 0x0
47 #define EXYNOS_TMU_REG_CONTROL 0x20
48 #define EXYNOS_TMU_REG_STATUS 0x28
49 #define EXYNOS_TMU_REG_CURRENT_TEMP 0x40
50 #define EXYNOS_TMU_REG_INTEN 0x70
51 #define EXYNOS_TMU_REG_INTSTAT 0x74
52 #define EXYNOS_TMU_REG_INTCLEAR 0x78
54 #define EXYNOS_TMU_TRIM_TEMP_MASK 0xff
55 #define EXYNOS_TMU_GAIN_SHIFT 8
56 #define EXYNOS_TMU_REF_VOLTAGE_SHIFT 24
57 #define EXYNOS_TMU_CORE_ON 3
58 #define EXYNOS_TMU_CORE_OFF 2
59 #define EXYNOS_TMU_DEF_CODE_TO_TEMP_OFFSET 50
61 /* Exynos4 specific registers */
62 #define EXYNOS4_TMU_REG_THRESHOLD_TEMP 0x44
63 #define EXYNOS4_TMU_REG_TRIG_LEVEL0 0x50
64 #define EXYNOS4_TMU_REG_TRIG_LEVEL1 0x54
65 #define EXYNOS4_TMU_REG_TRIG_LEVEL2 0x58
66 #define EXYNOS4_TMU_REG_TRIG_LEVEL3 0x5C
67 #define EXYNOS4_TMU_REG_PAST_TEMP0 0x60
68 #define EXYNOS4_TMU_REG_PAST_TEMP1 0x64
69 #define EXYNOS4_TMU_REG_PAST_TEMP2 0x68
70 #define EXYNOS4_TMU_REG_PAST_TEMP3 0x6C
72 #define EXYNOS4_TMU_TRIG_LEVEL0_MASK 0x1
73 #define EXYNOS4_TMU_TRIG_LEVEL1_MASK 0x10
74 #define EXYNOS4_TMU_TRIG_LEVEL2_MASK 0x100
75 #define EXYNOS4_TMU_TRIG_LEVEL3_MASK 0x1000
76 #define EXYNOS4_TMU_INTCLEAR_VAL 0x1111
78 /* Exynos5 specific registers */
79 #define EXYNOS5_TMU_TRIMINFO_CON 0x14
80 #define EXYNOS5_THD_TEMP_RISE 0x50
81 #define EXYNOS5_THD_TEMP_FALL 0x54
82 #define EXYNOS5_EMUL_CON 0x80
84 #define EXYNOS5_TRIMINFO_RELOAD 0x1
85 #define EXYNOS5_TMU_CLEAR_RISE_INT 0x111
86 #define EXYNOS5_TMU_CLEAR_FALL_INT (0x111 << 16)
87 #define EXYNOS5_MUX_ADDR_VALUE 6
88 #define EXYNOS5_MUX_ADDR_SHIFT 20
89 #define EXYNOS5_TMU_TRIP_MODE_SHIFT 13
91 #define EFUSE_MIN_VALUE 40
92 #define EFUSE_MAX_VALUE 100
94 /* In-kernel thermal framework related macros & definations */
95 #define SENSOR_NAME_LEN 16
96 #define MAX_TRIP_COUNT 8
97 #define MAX_COOLING_DEVICE 4
99 #define ACTIVE_INTERVAL 500
100 #define IDLE_INTERVAL 10000
101 #define MCELSIUS 1000
103 /* CPU Zone information */
106 #define MONITOR_ZONE 2
109 #define GET_ZONE(trip) (trip + 2)
110 #define GET_TRIP(zone) (zone - 2)
112 #define EXYNOS_ZONE_COUNT 3
114 struct exynos_tmu_data {
115 struct exynos_tmu_platform_data *pdata;
116 struct resource *mem;
120 struct work_struct irq_work;
123 u8 temp_error1, temp_error2;
126 struct thermal_trip_point_conf {
127 int trip_val[MAX_TRIP_COUNT];
131 struct thermal_cooling_conf {
132 struct freq_clip_table freq_data[MAX_TRIP_COUNT];
136 struct thermal_sensor_conf {
137 char name[SENSOR_NAME_LEN];
138 int (*read_temperature)(void *data);
139 struct thermal_trip_point_conf trip_data;
140 struct thermal_cooling_conf cooling_data;
144 struct exynos_thermal_zone {
145 enum thermal_device_mode mode;
146 struct thermal_zone_device *therm_dev;
147 struct thermal_cooling_device *cool_dev[MAX_COOLING_DEVICE];
148 unsigned int cool_dev_size;
149 struct platform_device *exynos4_dev;
150 struct thermal_sensor_conf *sensor_conf;
153 static struct exynos_thermal_zone *th_zone;
154 static void exynos_unregister_thermal(void);
155 static int exynos_register_thermal(struct thermal_sensor_conf *sensor_conf);
157 /* Get mode callback functions for thermal zone */
158 static int exynos_get_mode(struct thermal_zone_device *thermal,
159 enum thermal_device_mode *mode)
162 *mode = th_zone->mode;
166 /* Set mode callback functions for thermal zone */
167 static int exynos_set_mode(struct thermal_zone_device *thermal,
168 enum thermal_device_mode mode)
170 if (!th_zone->therm_dev) {
171 pr_notice("thermal zone not registered\n");
175 mutex_lock(&th_zone->therm_dev->lock);
177 if (mode == THERMAL_DEVICE_ENABLED)
178 th_zone->therm_dev->polling_delay = IDLE_INTERVAL;
180 th_zone->therm_dev->polling_delay = 0;
182 mutex_unlock(&th_zone->therm_dev->lock);
184 th_zone->mode = mode;
185 thermal_zone_device_update(th_zone->therm_dev);
186 pr_info("thermal polling set for duration=%d msec\n",
187 th_zone->therm_dev->polling_delay);
192 * This function may be called from interrupt based temperature sensor
193 * when threshold is changed.
195 static void exynos_report_trigger(void)
199 char *envp[] = { data, NULL };
201 if (!th_zone || !th_zone->therm_dev)
204 thermal_zone_device_update(th_zone->therm_dev);
206 mutex_lock(&th_zone->therm_dev->lock);
207 /* Find the level for which trip happened */
208 for (i = 0; i < th_zone->sensor_conf->trip_data.trip_count; i++) {
209 if (th_zone->therm_dev->last_temperature <
210 th_zone->sensor_conf->trip_data.trip_val[i] * MCELSIUS)
214 if (th_zone->mode == THERMAL_DEVICE_ENABLED) {
216 th_zone->therm_dev->polling_delay = ACTIVE_INTERVAL;
218 th_zone->therm_dev->polling_delay = IDLE_INTERVAL;
221 snprintf(data, sizeof(data), "%u", i);
222 kobject_uevent_env(&th_zone->therm_dev->device.kobj, KOBJ_CHANGE, envp);
223 mutex_unlock(&th_zone->therm_dev->lock);
226 /* Get trip type callback functions for thermal zone */
227 static int exynos_get_trip_type(struct thermal_zone_device *thermal, int trip,
228 enum thermal_trip_type *type)
230 switch (GET_ZONE(trip)) {
233 *type = THERMAL_TRIP_ACTIVE;
236 *type = THERMAL_TRIP_CRITICAL;
244 /* Get trip temperature callback functions for thermal zone */
245 static int exynos_get_trip_temp(struct thermal_zone_device *thermal, int trip,
248 if (trip < GET_TRIP(MONITOR_ZONE) || trip > GET_TRIP(PANIC_ZONE))
251 *temp = th_zone->sensor_conf->trip_data.trip_val[trip];
252 /* convert the temperature into millicelsius */
253 *temp = *temp * MCELSIUS;
258 /* Get critical temperature callback functions for thermal zone */
259 static int exynos_get_crit_temp(struct thermal_zone_device *thermal,
264 ret = exynos_get_trip_temp(thermal, GET_TRIP(PANIC_ZONE), temp);
268 /* Bind callback functions for thermal zone */
269 static int exynos_bind(struct thermal_zone_device *thermal,
270 struct thermal_cooling_device *cdev)
274 /* find the cooling device registered*/
275 for (i = 0; i < th_zone->cool_dev_size; i++)
276 if (cdev == th_zone->cool_dev[i])
279 /* No matching cooling device */
280 if (i == th_zone->cool_dev_size)
283 switch (GET_ZONE(i)) {
286 if (thermal_zone_bind_cooling_device(thermal, i, cdev)) {
287 pr_err("error binding cooling dev inst 0\n");
298 /* Unbind callback functions for thermal zone */
299 static int exynos_unbind(struct thermal_zone_device *thermal,
300 struct thermal_cooling_device *cdev)
304 /* find the cooling device registered*/
305 for (i = 0; i < th_zone->cool_dev_size; i++)
306 if (cdev == th_zone->cool_dev[i])
309 /* No matching cooling device */
310 if (i == th_zone->cool_dev_size)
313 switch (GET_ZONE(i)) {
316 if (thermal_zone_unbind_cooling_device(thermal, i, cdev)) {
317 pr_err("error unbinding cooling dev\n");
327 /* Get temperature callback functions for thermal zone */
328 static int exynos_get_temp(struct thermal_zone_device *thermal,
333 if (!th_zone->sensor_conf) {
334 pr_info("Temperature sensor not initialised\n");
337 data = th_zone->sensor_conf->private_data;
338 *temp = th_zone->sensor_conf->read_temperature(data);
339 /* convert the temperature into millicelsius */
340 *temp = *temp * MCELSIUS;
344 /* Operation callback functions for thermal zone */
345 static struct thermal_zone_device_ops const exynos_dev_ops = {
347 .unbind = exynos_unbind,
348 .get_temp = exynos_get_temp,
349 .get_mode = exynos_get_mode,
350 .set_mode = exynos_set_mode,
351 .get_trip_type = exynos_get_trip_type,
352 .get_trip_temp = exynos_get_trip_temp,
353 .get_crit_temp = exynos_get_crit_temp,
356 /* Register with the in-kernel thermal management */
357 static int exynos_register_thermal(struct thermal_sensor_conf *sensor_conf)
359 int ret, count, tab_size;
360 struct freq_clip_table *tab_ptr, *clip_data;
362 if (!sensor_conf || !sensor_conf->read_temperature) {
363 pr_err("Temperature sensor not initialised\n");
367 th_zone = kzalloc(sizeof(struct exynos_thermal_zone), GFP_KERNEL);
371 th_zone->sensor_conf = sensor_conf;
373 tab_ptr = (struct freq_clip_table *)sensor_conf->cooling_data.freq_data;
374 tab_size = sensor_conf->cooling_data.freq_clip_count;
376 /* Register the cpufreq cooling device */
377 for (count = 0; count < tab_size; count++) {
378 clip_data = (struct freq_clip_table *)&(tab_ptr[count]);
379 clip_data->mask_val = cpumask_of(0);
380 th_zone->cool_dev[count] = cpufreq_cooling_register(
382 if (IS_ERR(th_zone->cool_dev[count])) {
383 pr_err("Failed to register cpufreq cooling device\n");
385 th_zone->cool_dev_size = count;
389 th_zone->cool_dev_size = count;
391 th_zone->therm_dev = thermal_zone_device_register(sensor_conf->name,
392 EXYNOS_ZONE_COUNT, NULL, &exynos_dev_ops, 0, 0, 0,
395 if (IS_ERR(th_zone->therm_dev)) {
396 pr_err("Failed to register thermal zone device\n");
400 th_zone->mode = THERMAL_DEVICE_ENABLED;
402 pr_info("Exynos: Kernel Thermal management registered\n");
407 exynos_unregister_thermal();
411 /* Un-Register with the in-kernel thermal management */
412 static void exynos_unregister_thermal(void)
416 for (i = 0; i < th_zone->cool_dev_size; i++) {
417 if (th_zone && th_zone->cool_dev[i])
418 cpufreq_cooling_unregister(th_zone->cool_dev[i]);
421 if (th_zone && th_zone->therm_dev)
422 thermal_zone_device_unregister(th_zone->therm_dev);
426 pr_info("Exynos: Kernel Thermal management unregistered\n");
430 * TMU treats temperature as a mapped temperature code.
431 * The temperature is converted differently depending on the calibration type.
433 static int temp_to_code(struct exynos_tmu_data *data, u8 temp)
435 struct exynos_tmu_platform_data *pdata = data->pdata;
438 if (data->soc == SOC_ARCH_EXYNOS4)
439 /* temp should range between 25 and 125 */
440 if (temp < 25 || temp > 125) {
445 switch (pdata->cal_type) {
446 case TYPE_TWO_POINT_TRIMMING:
447 temp_code = (temp - 25) *
448 (data->temp_error2 - data->temp_error1) /
449 (85 - 25) + data->temp_error1;
451 case TYPE_ONE_POINT_TRIMMING:
452 temp_code = temp + data->temp_error1 - 25;
455 temp_code = temp + EXYNOS_TMU_DEF_CODE_TO_TEMP_OFFSET;
463 * Calculate a temperature value from a temperature code.
464 * The unit of the temperature is degree Celsius.
466 static int code_to_temp(struct exynos_tmu_data *data, u8 temp_code)
468 struct exynos_tmu_platform_data *pdata = data->pdata;
471 if (data->soc == SOC_ARCH_EXYNOS4)
472 /* temp_code should range between 75 and 175 */
473 if (temp_code < 75 || temp_code > 175) {
478 switch (pdata->cal_type) {
479 case TYPE_TWO_POINT_TRIMMING:
480 temp = (temp_code - data->temp_error1) * (85 - 25) /
481 (data->temp_error2 - data->temp_error1) + 25;
483 case TYPE_ONE_POINT_TRIMMING:
484 temp = temp_code - data->temp_error1 + 25;
487 temp = temp_code - EXYNOS_TMU_DEF_CODE_TO_TEMP_OFFSET;
494 static int exynos_tmu_initialize(struct platform_device *pdev)
496 struct exynos_tmu_data *data = platform_get_drvdata(pdev);
497 struct exynos_tmu_platform_data *pdata = data->pdata;
498 unsigned int status, trim_info, rising_threshold;
499 int ret = 0, threshold_code;
501 mutex_lock(&data->lock);
502 clk_enable(data->clk);
504 status = readb(data->base + EXYNOS_TMU_REG_STATUS);
510 if (data->soc == SOC_ARCH_EXYNOS5) {
511 __raw_writel(EXYNOS5_TRIMINFO_RELOAD,
512 data->base + EXYNOS5_TMU_TRIMINFO_CON);
514 /* Save trimming info in order to perform calibration */
515 trim_info = readl(data->base + EXYNOS_TMU_REG_TRIMINFO);
516 data->temp_error1 = trim_info & EXYNOS_TMU_TRIM_TEMP_MASK;
517 data->temp_error2 = ((trim_info >> 8) & EXYNOS_TMU_TRIM_TEMP_MASK);
519 if ((EFUSE_MIN_VALUE > data->temp_error1) ||
520 (data->temp_error1 > EFUSE_MAX_VALUE) ||
521 (data->temp_error2 != 0))
522 data->temp_error1 = pdata->efuse_value;
524 if (data->soc == SOC_ARCH_EXYNOS4) {
525 /* Write temperature code for threshold */
526 threshold_code = temp_to_code(data, pdata->threshold);
527 if (threshold_code < 0) {
528 ret = threshold_code;
531 writeb(threshold_code,
532 data->base + EXYNOS4_TMU_REG_THRESHOLD_TEMP);
534 writeb(pdata->trigger_levels[0],
535 data->base + EXYNOS4_TMU_REG_TRIG_LEVEL0);
536 writeb(pdata->trigger_levels[1],
537 data->base + EXYNOS4_TMU_REG_TRIG_LEVEL1);
538 writeb(pdata->trigger_levels[2],
539 data->base + EXYNOS4_TMU_REG_TRIG_LEVEL2);
540 writeb(pdata->trigger_levels[3],
541 data->base + EXYNOS4_TMU_REG_TRIG_LEVEL3);
543 writel(EXYNOS4_TMU_INTCLEAR_VAL,
544 data->base + EXYNOS_TMU_REG_INTCLEAR);
545 } else if (data->soc == SOC_ARCH_EXYNOS5) {
546 /* Write temperature code for threshold */
547 threshold_code = temp_to_code(data, pdata->trigger_levels[0]);
548 if (threshold_code < 0) {
549 ret = threshold_code;
552 rising_threshold = threshold_code;
553 threshold_code = temp_to_code(data, pdata->trigger_levels[1]);
554 if (threshold_code < 0) {
555 ret = threshold_code;
558 rising_threshold |= (threshold_code << 8);
559 threshold_code = temp_to_code(data, pdata->trigger_levels[2]);
560 if (threshold_code < 0) {
561 ret = threshold_code;
564 rising_threshold |= (threshold_code << 16);
566 writel(rising_threshold,
567 data->base + EXYNOS5_THD_TEMP_RISE);
568 writel(0, data->base + EXYNOS5_THD_TEMP_FALL);
570 writel(EXYNOS5_TMU_CLEAR_RISE_INT|EXYNOS5_TMU_CLEAR_FALL_INT,
571 data->base + EXYNOS_TMU_REG_INTCLEAR);
574 clk_disable(data->clk);
575 mutex_unlock(&data->lock);
580 static void exynos_tmu_control(struct platform_device *pdev, bool on)
582 struct exynos_tmu_data *data = platform_get_drvdata(pdev);
583 struct exynos_tmu_platform_data *pdata = data->pdata;
584 unsigned int con, interrupt_en;
586 mutex_lock(&data->lock);
587 clk_enable(data->clk);
589 con = pdata->reference_voltage << EXYNOS_TMU_REF_VOLTAGE_SHIFT |
590 pdata->gain << EXYNOS_TMU_GAIN_SHIFT;
592 if (data->soc == SOC_ARCH_EXYNOS5) {
593 con |= pdata->noise_cancel_mode << EXYNOS5_TMU_TRIP_MODE_SHIFT;
594 con |= (EXYNOS5_MUX_ADDR_VALUE << EXYNOS5_MUX_ADDR_SHIFT);
598 con |= EXYNOS_TMU_CORE_ON;
599 interrupt_en = pdata->trigger_level3_en << 12 |
600 pdata->trigger_level2_en << 8 |
601 pdata->trigger_level1_en << 4 |
602 pdata->trigger_level0_en;
604 con |= EXYNOS_TMU_CORE_OFF;
605 interrupt_en = 0; /* Disable all interrupts */
607 writel(interrupt_en, data->base + EXYNOS_TMU_REG_INTEN);
608 writel(con, data->base + EXYNOS_TMU_REG_CONTROL);
610 clk_disable(data->clk);
611 mutex_unlock(&data->lock);
614 static int exynos_tmu_read(struct exynos_tmu_data *data)
619 mutex_lock(&data->lock);
620 clk_enable(data->clk);
622 temp_code = readb(data->base + EXYNOS_TMU_REG_CURRENT_TEMP);
623 temp = code_to_temp(data, temp_code);
625 clk_disable(data->clk);
626 mutex_unlock(&data->lock);
631 static void exynos_tmu_work(struct work_struct *work)
633 struct exynos_tmu_data *data = container_of(work,
634 struct exynos_tmu_data, irq_work);
636 mutex_lock(&data->lock);
637 clk_enable(data->clk);
640 if (data->soc == SOC_ARCH_EXYNOS5)
641 writel(EXYNOS5_TMU_CLEAR_RISE_INT,
642 data->base + EXYNOS_TMU_REG_INTCLEAR);
644 writel(EXYNOS4_TMU_INTCLEAR_VAL,
645 data->base + EXYNOS_TMU_REG_INTCLEAR);
647 clk_disable(data->clk);
648 mutex_unlock(&data->lock);
649 exynos_report_trigger();
650 enable_irq(data->irq);
653 static irqreturn_t exynos_tmu_irq(int irq, void *id)
655 struct exynos_tmu_data *data = id;
657 disable_irq_nosync(irq);
658 schedule_work(&data->irq_work);
662 static struct thermal_sensor_conf exynos_sensor_conf = {
663 .name = "exynos-therm",
664 .read_temperature = (int (*)(void *))exynos_tmu_read,
667 #if defined(CONFIG_CPU_EXYNOS4210)
668 static struct exynos_tmu_platform_data const exynos4_default_tmu_data = {
670 .trigger_levels[0] = 5,
671 .trigger_levels[1] = 20,
672 .trigger_levels[2] = 30,
673 .trigger_level0_en = 1,
674 .trigger_level1_en = 1,
675 .trigger_level2_en = 1,
676 .trigger_level3_en = 0,
678 .reference_voltage = 7,
679 .cal_type = TYPE_ONE_POINT_TRIMMING,
681 .freq_clip_max = 800 * 1000,
685 .freq_clip_max = 200 * 1000,
689 .type = SOC_ARCH_EXYNOS4,
691 #define EXYNOS4_TMU_DRV_DATA (&exynos4_default_tmu_data)
693 #define EXYNOS4_TMU_DRV_DATA (NULL)
696 #if defined(CONFIG_SOC_EXYNOS5250)
697 static struct exynos_tmu_platform_data const exynos5_default_tmu_data = {
698 .trigger_levels[0] = 85,
699 .trigger_levels[1] = 103,
700 .trigger_levels[2] = 110,
701 .trigger_level0_en = 1,
702 .trigger_level1_en = 1,
703 .trigger_level2_en = 1,
704 .trigger_level3_en = 0,
706 .reference_voltage = 16,
707 .noise_cancel_mode = 4,
708 .cal_type = TYPE_ONE_POINT_TRIMMING,
711 .freq_clip_max = 800 * 1000,
715 .freq_clip_max = 200 * 1000,
719 .type = SOC_ARCH_EXYNOS5,
721 #define EXYNOS5_TMU_DRV_DATA (&exynos5_default_tmu_data)
723 #define EXYNOS5_TMU_DRV_DATA (NULL)
727 static const struct of_device_id exynos_tmu_match[] = {
729 .compatible = "samsung,exynos4-tmu",
730 .data = (void *)EXYNOS4_TMU_DRV_DATA,
733 .compatible = "samsung,exynos5-tmu",
734 .data = (void *)EXYNOS5_TMU_DRV_DATA,
738 MODULE_DEVICE_TABLE(of, exynos_tmu_match);
740 #define exynos_tmu_match NULL
743 static struct platform_device_id exynos_tmu_driver_ids[] = {
745 .name = "exynos4-tmu",
746 .driver_data = (kernel_ulong_t)EXYNOS4_TMU_DRV_DATA,
749 .name = "exynos5-tmu",
750 .driver_data = (kernel_ulong_t)EXYNOS5_TMU_DRV_DATA,
754 MODULE_DEVICE_TABLE(platform, exynos4_tmu_driver_ids);
756 static inline struct exynos_tmu_platform_data *exynos_get_driver_data(
757 struct platform_device *pdev)
760 if (pdev->dev.of_node) {
761 const struct of_device_id *match;
762 match = of_match_node(exynos_tmu_match, pdev->dev.of_node);
765 return (struct exynos_tmu_platform_data *) match->data;
768 return (struct exynos_tmu_platform_data *)
769 platform_get_device_id(pdev)->driver_data;
771 static int __devinit exynos_tmu_probe(struct platform_device *pdev)
773 struct exynos_tmu_data *data;
774 struct exynos_tmu_platform_data *pdata = pdev->dev.platform_data;
778 pdata = exynos_get_driver_data(pdev);
781 dev_err(&pdev->dev, "No platform init data supplied.\n");
784 data = kzalloc(sizeof(struct exynos_tmu_data), GFP_KERNEL);
786 dev_err(&pdev->dev, "Failed to allocate driver structure\n");
790 data->irq = platform_get_irq(pdev, 0);
793 dev_err(&pdev->dev, "Failed to get platform irq\n");
797 INIT_WORK(&data->irq_work, exynos_tmu_work);
799 data->mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
802 dev_err(&pdev->dev, "Failed to get platform resource\n");
806 data->mem = request_mem_region(data->mem->start,
807 resource_size(data->mem), pdev->name);
810 dev_err(&pdev->dev, "Failed to request memory region\n");
814 data->base = ioremap(data->mem->start, resource_size(data->mem));
817 dev_err(&pdev->dev, "Failed to ioremap memory\n");
821 ret = request_irq(data->irq, exynos_tmu_irq,
822 IRQF_TRIGGER_RISING, "exynos-tmu", data);
824 dev_err(&pdev->dev, "Failed to request irq: %d\n", data->irq);
828 data->clk = clk_get(NULL, "tmu_apbif");
829 if (IS_ERR(data->clk)) {
830 ret = PTR_ERR(data->clk);
831 dev_err(&pdev->dev, "Failed to get clock\n");
835 if (pdata->type == SOC_ARCH_EXYNOS5 ||
836 pdata->type == SOC_ARCH_EXYNOS4)
837 data->soc = pdata->type;
840 dev_err(&pdev->dev, "Platform not supported\n");
845 platform_set_drvdata(pdev, data);
846 mutex_init(&data->lock);
848 ret = exynos_tmu_initialize(pdev);
850 dev_err(&pdev->dev, "Failed to initialize TMU\n");
854 exynos_tmu_control(pdev, true);
856 /* Register the sensor with thermal management interface */
857 (&exynos_sensor_conf)->private_data = data;
858 exynos_sensor_conf.trip_data.trip_count = pdata->trigger_level0_en +
859 pdata->trigger_level1_en + pdata->trigger_level2_en +
860 pdata->trigger_level3_en;
862 for (i = 0; i < exynos_sensor_conf.trip_data.trip_count; i++)
863 exynos_sensor_conf.trip_data.trip_val[i] =
864 pdata->threshold + pdata->trigger_levels[i];
866 exynos_sensor_conf.cooling_data.freq_clip_count =
867 pdata->freq_tab_count;
868 for (i = 0; i < pdata->freq_tab_count; i++) {
869 exynos_sensor_conf.cooling_data.freq_data[i].freq_clip_max =
870 pdata->freq_tab[i].freq_clip_max;
871 exynos_sensor_conf.cooling_data.freq_data[i].temp_level =
872 pdata->freq_tab[i].temp_level;
875 ret = exynos_register_thermal(&exynos_sensor_conf);
877 dev_err(&pdev->dev, "Failed to register thermal interface\n");
882 platform_set_drvdata(pdev, NULL);
885 free_irq(data->irq, data);
889 release_mem_region(data->mem->start, resource_size(data->mem));
896 static int __devexit exynos_tmu_remove(struct platform_device *pdev)
898 struct exynos_tmu_data *data = platform_get_drvdata(pdev);
900 exynos_tmu_control(pdev, false);
902 exynos_unregister_thermal();
906 free_irq(data->irq, data);
909 release_mem_region(data->mem->start, resource_size(data->mem));
911 platform_set_drvdata(pdev, NULL);
918 #ifdef CONFIG_PM_SLEEP
919 static int exynos_tmu_suspend(struct device *dev)
921 exynos_tmu_control(to_platform_device(dev), false);
926 static int exynos_tmu_resume(struct device *dev)
928 struct platform_device *pdev = to_platform_device(dev);
930 exynos_tmu_initialize(pdev);
931 exynos_tmu_control(pdev, true);
936 static SIMPLE_DEV_PM_OPS(exynos_tmu_pm,
937 exynos_tmu_suspend, exynos_tmu_resume);
938 #define EXYNOS_TMU_PM (&exynos_tmu_pm)
940 #define EXYNOS_TMU_PM NULL
943 static struct platform_driver exynos_tmu_driver = {
945 .name = "exynos-tmu",
946 .owner = THIS_MODULE,
948 .of_match_table = exynos_tmu_match,
950 .probe = exynos_tmu_probe,
951 .remove = __devexit_p(exynos_tmu_remove),
952 .id_table = exynos_tmu_driver_ids,
955 module_platform_driver(exynos_tmu_driver);
957 MODULE_DESCRIPTION("EXYNOS TMU Driver");
958 MODULE_AUTHOR("Donggeun Kim <dg77.kim@samsung.com>");
959 MODULE_LICENSE("GPL");
960 MODULE_ALIAS("platform:exynos-tmu");