2 * Copyright (c) 2014-2016, Fuzhou Rockchip Electronics Co., Ltd
3 * Caesar Wang <wxt@rock-chips.com>
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 #include <linux/clk.h>
16 #include <linux/delay.h>
17 #include <linux/interrupt.h>
19 #include <linux/module.h>
21 #include <linux/of_address.h>
22 #include <linux/of_irq.h>
23 #include <linux/platform_device.h>
24 #include <linux/regmap.h>
25 #include <linux/reset.h>
26 #include <linux/thermal.h>
27 #include <linux/mfd/syscon.h>
28 #include <linux/pinctrl/consumer.h>
31 * If the temperature over a period of time High,
32 * the resulting TSHUT gave CRU module,let it reset the entire chip,
33 * or via GPIO give PMIC.
41 * The system Temperature Sensors tshut(tshut) polarity
42 * the bit 8 is tshut polarity.
43 * 0: low active, 1: high active
51 * The system has two Temperature Sensors.
52 * sensor0 is for CPU, and sensor1 is for GPU.
60 * The conversion table has the adc value and temperature.
61 * ADC_DECREMENT: the adc value is of diminishing.(e.g. rk3288_code_table)
62 * ADC_INCREMENT: the adc value is incremental.(e.g. rk3368_code_table)
70 * The max sensors is two in rockchip SoCs.
71 * Two sensors: CPU and GPU sensor.
73 #define SOC_MAX_SENSORS 2
76 * struct chip_tsadc_table - hold information about chip-specific differences
77 * @id: conversion table
78 * @length: size of conversion table
79 * @data_mask: mask to apply on data inputs
80 * @mode: sort mode of this adc variant (incrementing or decrementing)
82 struct chip_tsadc_table {
83 const struct tsadc_table *id;
86 enum adc_sort_mode mode;
90 * struct rockchip_tsadc_chip - hold the private data of tsadc chip
91 * @chn_id[SOC_MAX_SENSORS]: the sensor id of chip correspond to the channel
92 * @chn_num: the channel number of tsadc chip
93 * @tshut_temp: the hardware-controlled shutdown temperature value
94 * @tshut_mode: the hardware-controlled shutdown mode (0:CRU 1:GPIO)
95 * @tshut_polarity: the hardware-controlled active polarity (0:LOW 1:HIGH)
96 * @initialize: SoC special initialize tsadc controller method
97 * @irq_ack: clear the interrupt
98 * @get_temp: get the temperature
99 * @set_tshut_temp: set the hardware-controlled shutdown temperature
100 * @set_tshut_mode: set the hardware-controlled shutdown mode
101 * @table: the chip-specific conversion table
103 struct rockchip_tsadc_chip {
104 /* The sensor id of chip correspond to the ADC channel */
105 int chn_id[SOC_MAX_SENSORS];
108 /* The hardware-controlled tshut property */
110 enum tshut_mode tshut_mode;
111 enum tshut_polarity tshut_polarity;
113 /* Chip-wide methods */
114 void (*initialize)(struct regmap *grf,
115 void __iomem *reg, enum tshut_polarity p);
116 void (*irq_ack)(void __iomem *reg);
117 void (*control)(void __iomem *reg, bool on);
119 /* Per-sensor methods */
120 int (*get_temp)(struct chip_tsadc_table table,
121 int chn, void __iomem *reg, int *temp);
122 void (*set_tshut_temp)(struct chip_tsadc_table table,
123 int chn, void __iomem *reg, int temp);
124 void (*set_tshut_mode)(int chn, void __iomem *reg, enum tshut_mode m);
126 /* Per-table methods */
127 struct chip_tsadc_table table;
131 * struct rockchip_thermal_sensor - hold the information of thermal sensor
132 * @thermal: pointer to the platform/configuration data
133 * @tzd: pointer to a thermal zone
134 * @id: identifier of the thermal sensor
136 struct rockchip_thermal_sensor {
137 struct rockchip_thermal_data *thermal;
138 struct thermal_zone_device *tzd;
143 * struct rockchip_thermal_data - hold the private data of thermal driver
144 * @chip: pointer to the platform/configuration data
145 * @pdev: platform device of thermal
146 * @reset: the reset controller of tsadc
147 * @sensors[SOC_MAX_SENSORS]: the thermal sensor
148 * @clk: the controller clock is divided by the exteral 24MHz
149 * @pclk: the advanced peripherals bus clock
150 * @grf: the general register file will be used to do static set by software
151 * @regs: the base address of tsadc controller
152 * @tshut_temp: the hardware-controlled shutdown temperature value
153 * @tshut_mode: the hardware-controlled shutdown mode (0:CRU 1:GPIO)
154 * @tshut_polarity: the hardware-controlled active polarity (0:LOW 1:HIGH)
156 struct rockchip_thermal_data {
157 const struct rockchip_tsadc_chip *chip;
158 struct platform_device *pdev;
159 struct reset_control *reset;
161 struct rockchip_thermal_sensor sensors[SOC_MAX_SENSORS];
170 enum tshut_mode tshut_mode;
171 enum tshut_polarity tshut_polarity;
175 * TSADC Sensor Register description:
177 * TSADCV2_* are used for RK3288 SoCs, the other chips can reuse it.
178 * TSADCV3_* are used for newer SoCs than RK3288. (e.g: RK3228, RK3399)
181 #define TSADCV2_USER_CON 0x00
182 #define TSADCV2_AUTO_CON 0x04
183 #define TSADCV2_INT_EN 0x08
184 #define TSADCV2_INT_PD 0x0c
185 #define TSADCV2_DATA(chn) (0x20 + (chn) * 0x04)
186 #define TSADCV2_COMP_SHUT(chn) (0x40 + (chn) * 0x04)
187 #define TSADCV2_HIGHT_INT_DEBOUNCE 0x60
188 #define TSADCV2_HIGHT_TSHUT_DEBOUNCE 0x64
189 #define TSADCV2_AUTO_PERIOD 0x68
190 #define TSADCV2_AUTO_PERIOD_HT 0x6c
192 #define TSADCV2_AUTO_EN BIT(0)
193 #define TSADCV2_AUTO_SRC_EN(chn) BIT(4 + (chn))
194 #define TSADCV2_AUTO_TSHUT_POLARITY_HIGH BIT(8)
196 #define TSADCV3_AUTO_Q_SEL_EN BIT(1)
198 #define TSADCV2_INT_SRC_EN(chn) BIT(chn)
199 #define TSADCV2_SHUT_2GPIO_SRC_EN(chn) BIT(4 + (chn))
200 #define TSADCV2_SHUT_2CRU_SRC_EN(chn) BIT(8 + (chn))
202 #define TSADCV2_INT_PD_CLEAR_MASK ~BIT(8)
203 #define TSADCV3_INT_PD_CLEAR_MASK ~BIT(16)
205 #define TSADCV2_DATA_MASK 0xfff
206 #define TSADCV3_DATA_MASK 0x3ff
208 #define TSADCV2_HIGHT_INT_DEBOUNCE_COUNT 4
209 #define TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT 4
210 #define TSADCV2_AUTO_PERIOD_TIME 250 /* msec */
211 #define TSADCV2_AUTO_PERIOD_HT_TIME 50 /* msec */
212 #define TSADCV2_USER_INTER_PD_SOC 0x340 /* 13 clocks */
214 #define GRF_SARADC_TESTBIT 0x0e644
215 #define GRF_TSADC_TESTBIT_L 0x0e648
216 #define GRF_TSADC_TESTBIT_H 0x0e64c
218 #define GRF_TSADC_TSEN_PD_ON (0x30003 << 0)
219 #define GRF_TSADC_TSEN_PD_OFF (0x30000 << 0)
220 #define GRF_SARADC_TESTBIT_ON (0x10001 << 2)
221 #define GRF_TSADC_TESTBIT_H_ON (0x10001 << 2)
224 * struct tsadc_table - code to temperature conversion table
225 * @code: the value of adc channel
226 * @temp: the temperature
228 * code to temperature mapping of the temperature sensor is a piece wise linear
229 * curve.Any temperature, code faling between to 2 give temperatures can be
230 * linearly interpolated.
231 * Code to Temperature mapping should be updated based on manufacturer results.
238 static const struct tsadc_table rk3228_code_table[] = {
274 {TSADCV2_DATA_MASK, 125000},
277 static const struct tsadc_table rk3288_code_table[] = {
278 {TSADCV2_DATA_MASK, -40000},
315 static const struct tsadc_table rk3368_code_table[] = {
351 {TSADCV3_DATA_MASK, 125000},
354 static const struct tsadc_table rk3399_code_table[] = {
390 {TSADCV3_DATA_MASK, 125000},
393 static u32 rk_tsadcv2_temp_to_code(struct chip_tsadc_table table,
399 high = table.length - 1;
400 mid = (high + low) / 2;
402 if (temp < table.id[low].temp || temp > table.id[high].temp)
405 while (low <= high) {
406 if (temp == table.id[mid].temp)
407 return table.id[mid].code;
408 else if (temp < table.id[mid].temp)
412 mid = (low + high) / 2;
418 static int rk_tsadcv2_code_to_temp(struct chip_tsadc_table table, u32 code,
421 unsigned int low = 1;
422 unsigned int high = table.length - 1;
423 unsigned int mid = (low + high) / 2;
427 WARN_ON(table.length < 2);
429 switch (table.mode) {
431 code &= table.data_mask;
432 if (code < table.id[high].code)
433 return -EAGAIN; /* Incorrect reading */
435 while (low <= high) {
436 if (code >= table.id[mid].code &&
437 code < table.id[mid - 1].code)
439 else if (code < table.id[mid].code)
444 mid = (low + high) / 2;
448 code &= table.data_mask;
449 if (code < table.id[low].code)
450 return -EAGAIN; /* Incorrect reading */
452 while (low <= high) {
453 if (code <= table.id[mid].code &&
454 code > table.id[mid - 1].code)
456 else if (code > table.id[mid].code)
461 mid = (low + high) / 2;
465 pr_err("Invalid the conversion table\n");
469 * The 5C granularity provided by the table is too much. Let's
470 * assume that the relationship between sensor readings and
471 * temperature between 2 table entries is linear and interpolate
472 * to produce less granular result.
474 num = table.id[mid].temp - table.id[mid - 1].temp;
475 num *= abs(table.id[mid - 1].code - code);
476 denom = abs(table.id[mid - 1].code - table.id[mid].code);
477 *temp = table.id[mid - 1].temp + (num / denom);
483 * rk_tsadcv2_initialize - initialize TASDC Controller.
485 * (1) Set TSADC_V2_AUTO_PERIOD:
486 * Configure the interleave between every two accessing of
487 * TSADC in normal operation.
489 * (2) Set TSADCV2_AUTO_PERIOD_HT:
490 * Configure the interleave between every two accessing of
491 * TSADC after the temperature is higher than COM_SHUT or COM_INT.
493 * (3) Set TSADCV2_HIGH_INT_DEBOUNCE and TSADC_HIGHT_TSHUT_DEBOUNCE:
494 * If the temperature is higher than COMP_INT or COMP_SHUT for
495 * "debounce" times, TSADC controller will generate interrupt or TSHUT.
497 static void rk_tsadcv2_initialize(struct regmap *grf, void __iomem *regs,
498 enum tshut_polarity tshut_polarity)
500 if (tshut_polarity == TSHUT_HIGH_ACTIVE)
501 writel_relaxed(0U | TSADCV2_AUTO_TSHUT_POLARITY_HIGH,
502 regs + TSADCV2_AUTO_CON);
504 writel_relaxed(0U & ~TSADCV2_AUTO_TSHUT_POLARITY_HIGH,
505 regs + TSADCV2_AUTO_CON);
507 writel_relaxed(TSADCV2_AUTO_PERIOD_TIME, regs + TSADCV2_AUTO_PERIOD);
508 writel_relaxed(TSADCV2_HIGHT_INT_DEBOUNCE_COUNT,
509 regs + TSADCV2_HIGHT_INT_DEBOUNCE);
510 writel_relaxed(TSADCV2_AUTO_PERIOD_HT_TIME,
511 regs + TSADCV2_AUTO_PERIOD_HT);
512 writel_relaxed(TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT,
513 regs + TSADCV2_HIGHT_TSHUT_DEBOUNCE);
516 pr_warn("%s: Missing rockchip,grf property\n", __func__);
522 * rk_tsadcv3_initialize - initialize TASDC Controller.
524 * (1) The tsadc control power sequence.
526 * (2) Set TSADC_V2_AUTO_PERIOD:
527 * Configure the interleave between every two accessing of
528 * TSADC in normal operation.
530 * (2) Set TSADCV2_AUTO_PERIOD_HT:
531 * Configure the interleave between every two accessing of
532 * TSADC after the temperature is higher than COM_SHUT or COM_INT.
534 * (3) Set TSADCV2_HIGH_INT_DEBOUNCE and TSADC_HIGHT_TSHUT_DEBOUNCE:
535 * If the temperature is higher than COMP_INT or COMP_SHUT for
536 * "debounce" times, TSADC controller will generate interrupt or TSHUT.
538 static void rk_tsadcv3_initialize(struct regmap *grf, void __iomem *regs,
539 enum tshut_polarity tshut_polarity)
541 /* The tsadc control power sequence */
543 /* Set interleave value to workround ic time sync issue */
544 writel_relaxed(TSADCV2_USER_INTER_PD_SOC, regs +
547 regmap_write(grf, GRF_TSADC_TESTBIT_L, GRF_TSADC_TSEN_PD_ON);
549 regmap_write(grf, GRF_TSADC_TESTBIT_L, GRF_TSADC_TSEN_PD_OFF);
550 usleep_range(15, 100); /* The spec note says at least 15 us */
551 regmap_write(grf, GRF_SARADC_TESTBIT, GRF_SARADC_TESTBIT_ON);
552 regmap_write(grf, GRF_TSADC_TESTBIT_H, GRF_TSADC_TESTBIT_H_ON);
553 usleep_range(90, 200); /* The spec note says at least 90 us */
556 if (tshut_polarity == TSHUT_HIGH_ACTIVE)
557 writel_relaxed(0U | TSADCV2_AUTO_TSHUT_POLARITY_HIGH,
558 regs + TSADCV2_AUTO_CON);
560 writel_relaxed(0U & ~TSADCV2_AUTO_TSHUT_POLARITY_HIGH,
561 regs + TSADCV2_AUTO_CON);
563 writel_relaxed(TSADCV2_AUTO_PERIOD_TIME, regs + TSADCV2_AUTO_PERIOD);
564 writel_relaxed(TSADCV2_HIGHT_INT_DEBOUNCE_COUNT,
565 regs + TSADCV2_HIGHT_INT_DEBOUNCE);
566 writel_relaxed(TSADCV2_AUTO_PERIOD_HT_TIME,
567 regs + TSADCV2_AUTO_PERIOD_HT);
568 writel_relaxed(TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT,
569 regs + TSADCV2_HIGHT_TSHUT_DEBOUNCE);
572 static void rk_tsadcv2_irq_ack(void __iomem *regs)
576 val = readl_relaxed(regs + TSADCV2_INT_PD);
577 writel_relaxed(val & TSADCV2_INT_PD_CLEAR_MASK, regs + TSADCV2_INT_PD);
580 static void rk_tsadcv3_irq_ack(void __iomem *regs)
584 val = readl_relaxed(regs + TSADCV2_INT_PD);
585 writel_relaxed(val & TSADCV3_INT_PD_CLEAR_MASK, regs + TSADCV2_INT_PD);
588 static void rk_tsadcv2_control(void __iomem *regs, bool enable)
592 val = readl_relaxed(regs + TSADCV2_AUTO_CON);
594 val |= TSADCV2_AUTO_EN;
596 val &= ~TSADCV2_AUTO_EN;
598 writel_relaxed(val, regs + TSADCV2_AUTO_CON);
602 * rk_tsadcv3_control - the tsadc controller is enabled or disabled.
604 * NOTE: TSADC controller works at auto mode, and some SoCs need set the
605 * tsadc_q_sel bit on TSADCV2_AUTO_CON[1]. The (1024 - tsadc_q) as output
606 * adc value if setting this bit to enable.
608 static void rk_tsadcv3_control(void __iomem *regs, bool enable)
612 val = readl_relaxed(regs + TSADCV2_AUTO_CON);
614 val |= TSADCV2_AUTO_EN | TSADCV3_AUTO_Q_SEL_EN;
616 val &= ~TSADCV2_AUTO_EN;
618 writel_relaxed(val, regs + TSADCV2_AUTO_CON);
621 static int rk_tsadcv2_get_temp(struct chip_tsadc_table table,
622 int chn, void __iomem *regs, int *temp)
626 val = readl_relaxed(regs + TSADCV2_DATA(chn));
628 return rk_tsadcv2_code_to_temp(table, val, temp);
631 static void rk_tsadcv2_tshut_temp(struct chip_tsadc_table table,
632 int chn, void __iomem *regs, int temp)
634 u32 tshut_value, val;
636 tshut_value = rk_tsadcv2_temp_to_code(table, temp);
637 writel_relaxed(tshut_value, regs + TSADCV2_COMP_SHUT(chn));
639 /* TSHUT will be valid */
640 val = readl_relaxed(regs + TSADCV2_AUTO_CON);
641 writel_relaxed(val | TSADCV2_AUTO_SRC_EN(chn), regs + TSADCV2_AUTO_CON);
644 static void rk_tsadcv2_tshut_mode(int chn, void __iomem *regs,
645 enum tshut_mode mode)
649 val = readl_relaxed(regs + TSADCV2_INT_EN);
650 if (mode == TSHUT_MODE_GPIO) {
651 val &= ~TSADCV2_SHUT_2CRU_SRC_EN(chn);
652 val |= TSADCV2_SHUT_2GPIO_SRC_EN(chn);
654 val &= ~TSADCV2_SHUT_2GPIO_SRC_EN(chn);
655 val |= TSADCV2_SHUT_2CRU_SRC_EN(chn);
658 writel_relaxed(val, regs + TSADCV2_INT_EN);
661 static const struct rockchip_tsadc_chip rk3228_tsadc_data = {
662 .chn_id[SENSOR_CPU] = 0, /* cpu sensor is channel 0 */
663 .chn_num = 1, /* one channel for tsadc */
665 .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
666 .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
669 .initialize = rk_tsadcv2_initialize,
670 .irq_ack = rk_tsadcv3_irq_ack,
671 .control = rk_tsadcv3_control,
672 .get_temp = rk_tsadcv2_get_temp,
673 .set_tshut_temp = rk_tsadcv2_tshut_temp,
674 .set_tshut_mode = rk_tsadcv2_tshut_mode,
677 .id = rk3228_code_table,
678 .length = ARRAY_SIZE(rk3228_code_table),
679 .data_mask = TSADCV3_DATA_MASK,
680 .mode = ADC_INCREMENT,
684 static const struct rockchip_tsadc_chip rk3288_tsadc_data = {
685 .chn_id[SENSOR_CPU] = 1, /* cpu sensor is channel 1 */
686 .chn_id[SENSOR_GPU] = 2, /* gpu sensor is channel 2 */
687 .chn_num = 2, /* two channels for tsadc */
689 .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
690 .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
693 .initialize = rk_tsadcv2_initialize,
694 .irq_ack = rk_tsadcv2_irq_ack,
695 .control = rk_tsadcv2_control,
696 .get_temp = rk_tsadcv2_get_temp,
697 .set_tshut_temp = rk_tsadcv2_tshut_temp,
698 .set_tshut_mode = rk_tsadcv2_tshut_mode,
701 .id = rk3288_code_table,
702 .length = ARRAY_SIZE(rk3288_code_table),
703 .data_mask = TSADCV2_DATA_MASK,
704 .mode = ADC_DECREMENT,
708 static const struct rockchip_tsadc_chip rk3366_tsadc_data = {
709 .chn_id[SENSOR_CPU] = 0, /* cpu sensor is channel 0 */
710 .chn_id[SENSOR_GPU] = 1, /* gpu sensor is channel 1 */
711 .chn_num = 2, /* two channels for tsadc */
713 .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
714 .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
717 .initialize = rk_tsadcv3_initialize,
718 .irq_ack = rk_tsadcv3_irq_ack,
719 .control = rk_tsadcv3_control,
720 .get_temp = rk_tsadcv2_get_temp,
721 .set_tshut_temp = rk_tsadcv2_tshut_temp,
722 .set_tshut_mode = rk_tsadcv2_tshut_mode,
725 .id = rk3228_code_table,
726 .length = ARRAY_SIZE(rk3228_code_table),
727 .data_mask = TSADCV3_DATA_MASK,
728 .mode = ADC_INCREMENT,
732 static const struct rockchip_tsadc_chip rk3368_tsadc_data = {
733 .chn_id[SENSOR_CPU] = 0, /* cpu sensor is channel 0 */
734 .chn_id[SENSOR_GPU] = 1, /* gpu sensor is channel 1 */
735 .chn_num = 2, /* two channels for tsadc */
737 .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
738 .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
741 .initialize = rk_tsadcv2_initialize,
742 .irq_ack = rk_tsadcv2_irq_ack,
743 .control = rk_tsadcv2_control,
744 .get_temp = rk_tsadcv2_get_temp,
745 .set_tshut_temp = rk_tsadcv2_tshut_temp,
746 .set_tshut_mode = rk_tsadcv2_tshut_mode,
749 .id = rk3368_code_table,
750 .length = ARRAY_SIZE(rk3368_code_table),
751 .data_mask = TSADCV3_DATA_MASK,
752 .mode = ADC_INCREMENT,
756 static const struct rockchip_tsadc_chip rk3399_tsadc_data = {
757 .chn_id[SENSOR_CPU] = 0, /* cpu sensor is channel 0 */
758 .chn_id[SENSOR_GPU] = 1, /* gpu sensor is channel 1 */
759 .chn_num = 2, /* two channels for tsadc */
761 .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
762 .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
765 .initialize = rk_tsadcv3_initialize,
766 .irq_ack = rk_tsadcv3_irq_ack,
767 .control = rk_tsadcv3_control,
768 .get_temp = rk_tsadcv2_get_temp,
769 .set_tshut_temp = rk_tsadcv2_tshut_temp,
770 .set_tshut_mode = rk_tsadcv2_tshut_mode,
773 .id = rk3399_code_table,
774 .length = ARRAY_SIZE(rk3399_code_table),
775 .data_mask = TSADCV3_DATA_MASK,
776 .mode = ADC_INCREMENT,
780 static const struct of_device_id of_rockchip_thermal_match[] = {
782 .compatible = "rockchip,rk3228-tsadc",
783 .data = (void *)&rk3228_tsadc_data,
786 .compatible = "rockchip,rk3288-tsadc",
787 .data = (void *)&rk3288_tsadc_data,
790 .compatible = "rockchip,rk3366-tsadc",
791 .data = (void *)&rk3366_tsadc_data,
794 .compatible = "rockchip,rk3368-tsadc",
795 .data = (void *)&rk3368_tsadc_data,
798 .compatible = "rockchip,rk3399-tsadc",
799 .data = (void *)&rk3399_tsadc_data,
803 MODULE_DEVICE_TABLE(of, of_rockchip_thermal_match);
806 rockchip_thermal_toggle_sensor(struct rockchip_thermal_sensor *sensor, bool on)
808 struct thermal_zone_device *tzd = sensor->tzd;
810 tzd->ops->set_mode(tzd,
811 on ? THERMAL_DEVICE_ENABLED : THERMAL_DEVICE_DISABLED);
814 static irqreturn_t rockchip_thermal_alarm_irq_thread(int irq, void *dev)
816 struct rockchip_thermal_data *thermal = dev;
819 dev_dbg(&thermal->pdev->dev, "thermal alarm\n");
821 thermal->chip->irq_ack(thermal->regs);
823 for (i = 0; i < thermal->chip->chn_num; i++)
824 thermal_zone_device_update(thermal->sensors[i].tzd);
829 static int rockchip_thermal_get_temp(void *_sensor, int *out_temp)
831 struct rockchip_thermal_sensor *sensor = _sensor;
832 struct rockchip_thermal_data *thermal = sensor->thermal;
833 const struct rockchip_tsadc_chip *tsadc = sensor->thermal->chip;
836 retval = tsadc->get_temp(tsadc->table,
837 sensor->id, thermal->regs, out_temp);
838 dev_dbg(&thermal->pdev->dev, "sensor %d - temp: %d, retval: %d\n",
839 sensor->id, *out_temp, retval);
844 static const struct thermal_zone_of_device_ops rockchip_of_thermal_ops = {
845 .get_temp = rockchip_thermal_get_temp,
848 static int rockchip_configure_from_dt(struct device *dev,
849 struct device_node *np,
850 struct rockchip_thermal_data *thermal)
852 u32 shut_temp, tshut_mode, tshut_polarity;
854 if (of_property_read_u32(np, "rockchip,hw-tshut-temp", &shut_temp)) {
856 "Missing tshut temp property, using default %d\n",
857 thermal->chip->tshut_temp);
858 thermal->tshut_temp = thermal->chip->tshut_temp;
860 if (shut_temp > INT_MAX) {
861 dev_err(dev, "Invalid tshut temperature specified: %d\n",
865 thermal->tshut_temp = shut_temp;
868 if (of_property_read_u32(np, "rockchip,hw-tshut-mode", &tshut_mode)) {
870 "Missing tshut mode property, using default (%s)\n",
871 thermal->chip->tshut_mode == TSHUT_MODE_GPIO ?
873 thermal->tshut_mode = thermal->chip->tshut_mode;
875 thermal->tshut_mode = tshut_mode;
878 if (thermal->tshut_mode > 1) {
879 dev_err(dev, "Invalid tshut mode specified: %d\n",
880 thermal->tshut_mode);
884 if (of_property_read_u32(np, "rockchip,hw-tshut-polarity",
887 "Missing tshut-polarity property, using default (%s)\n",
888 thermal->chip->tshut_polarity == TSHUT_LOW_ACTIVE ?
890 thermal->tshut_polarity = thermal->chip->tshut_polarity;
892 thermal->tshut_polarity = tshut_polarity;
895 if (thermal->tshut_polarity > 1) {
896 dev_err(dev, "Invalid tshut-polarity specified: %d\n",
897 thermal->tshut_polarity);
901 /* The tsadc wont to handle the error in here since some SoCs didn't
902 * need this property.
904 thermal->grf = syscon_regmap_lookup_by_phandle(np, "rockchip,grf");
910 rockchip_thermal_register_sensor(struct platform_device *pdev,
911 struct rockchip_thermal_data *thermal,
912 struct rockchip_thermal_sensor *sensor,
915 const struct rockchip_tsadc_chip *tsadc = thermal->chip;
918 tsadc->set_tshut_mode(id, thermal->regs, thermal->tshut_mode);
919 tsadc->set_tshut_temp(tsadc->table, id, thermal->regs,
920 thermal->tshut_temp);
922 sensor->thermal = thermal;
924 sensor->tzd = devm_thermal_zone_of_sensor_register(&pdev->dev, id,
925 sensor, &rockchip_of_thermal_ops);
926 if (IS_ERR(sensor->tzd)) {
927 error = PTR_ERR(sensor->tzd);
928 dev_err(&pdev->dev, "failed to register sensor %d: %d\n",
937 * Reset TSADC Controller, reset all tsadc registers.
939 static void rockchip_thermal_reset_controller(struct reset_control *reset)
941 reset_control_assert(reset);
942 usleep_range(10, 20);
943 reset_control_deassert(reset);
946 static int rockchip_thermal_probe(struct platform_device *pdev)
948 struct device_node *np = pdev->dev.of_node;
949 struct rockchip_thermal_data *thermal;
950 const struct of_device_id *match;
951 struct resource *res;
956 match = of_match_node(of_rockchip_thermal_match, np);
960 irq = platform_get_irq(pdev, 0);
962 dev_err(&pdev->dev, "no irq resource?\n");
966 thermal = devm_kzalloc(&pdev->dev, sizeof(struct rockchip_thermal_data),
971 thermal->pdev = pdev;
973 thermal->chip = (const struct rockchip_tsadc_chip *)match->data;
977 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
978 thermal->regs = devm_ioremap_resource(&pdev->dev, res);
979 if (IS_ERR(thermal->regs))
980 return PTR_ERR(thermal->regs);
982 thermal->reset = devm_reset_control_get(&pdev->dev, "tsadc-apb");
983 if (IS_ERR(thermal->reset)) {
984 error = PTR_ERR(thermal->reset);
985 dev_err(&pdev->dev, "failed to get tsadc reset: %d\n", error);
989 thermal->clk = devm_clk_get(&pdev->dev, "tsadc");
990 if (IS_ERR(thermal->clk)) {
991 error = PTR_ERR(thermal->clk);
992 dev_err(&pdev->dev, "failed to get tsadc clock: %d\n", error);
996 thermal->pclk = devm_clk_get(&pdev->dev, "apb_pclk");
997 if (IS_ERR(thermal->pclk)) {
998 error = PTR_ERR(thermal->pclk);
999 dev_err(&pdev->dev, "failed to get apb_pclk clock: %d\n",
1004 error = clk_prepare_enable(thermal->clk);
1006 dev_err(&pdev->dev, "failed to enable converter clock: %d\n",
1011 error = clk_prepare_enable(thermal->pclk);
1013 dev_err(&pdev->dev, "failed to enable pclk: %d\n", error);
1014 goto err_disable_clk;
1017 rockchip_thermal_reset_controller(thermal->reset);
1019 error = rockchip_configure_from_dt(&pdev->dev, np, thermal);
1021 dev_err(&pdev->dev, "failed to parse device tree data: %d\n",
1023 goto err_disable_pclk;
1026 thermal->chip->initialize(thermal->grf, thermal->regs,
1027 thermal->tshut_polarity);
1029 for (i = 0; i < thermal->chip->chn_num; i++) {
1030 error = rockchip_thermal_register_sensor(pdev, thermal,
1031 &thermal->sensors[i],
1032 thermal->chip->chn_id[i]);
1035 "failed to register sensor[%d] : error = %d\n",
1037 goto err_disable_pclk;
1041 error = devm_request_threaded_irq(&pdev->dev, irq, NULL,
1042 &rockchip_thermal_alarm_irq_thread,
1044 "rockchip_thermal", thermal);
1047 "failed to request tsadc irq: %d\n", error);
1048 goto err_disable_pclk;
1051 thermal->chip->control(thermal->regs, true);
1053 for (i = 0; i < thermal->chip->chn_num; i++)
1054 rockchip_thermal_toggle_sensor(&thermal->sensors[i], true);
1056 platform_set_drvdata(pdev, thermal);
1061 clk_disable_unprepare(thermal->pclk);
1063 clk_disable_unprepare(thermal->clk);
1068 static int rockchip_thermal_remove(struct platform_device *pdev)
1070 struct rockchip_thermal_data *thermal = platform_get_drvdata(pdev);
1073 for (i = 0; i < thermal->chip->chn_num; i++) {
1074 struct rockchip_thermal_sensor *sensor = &thermal->sensors[i];
1076 rockchip_thermal_toggle_sensor(sensor, false);
1079 thermal->chip->control(thermal->regs, false);
1081 clk_disable_unprepare(thermal->pclk);
1082 clk_disable_unprepare(thermal->clk);
1087 static int __maybe_unused rockchip_thermal_suspend(struct device *dev)
1089 struct platform_device *pdev = to_platform_device(dev);
1090 struct rockchip_thermal_data *thermal = platform_get_drvdata(pdev);
1093 for (i = 0; i < thermal->chip->chn_num; i++)
1094 rockchip_thermal_toggle_sensor(&thermal->sensors[i], false);
1096 thermal->chip->control(thermal->regs, false);
1098 clk_disable(thermal->pclk);
1099 clk_disable(thermal->clk);
1101 pinctrl_pm_select_sleep_state(dev);
1106 static int __maybe_unused rockchip_thermal_resume(struct device *dev)
1108 struct platform_device *pdev = to_platform_device(dev);
1109 struct rockchip_thermal_data *thermal = platform_get_drvdata(pdev);
1113 error = clk_enable(thermal->clk);
1117 error = clk_enable(thermal->pclk);
1119 clk_disable(thermal->clk);
1123 rockchip_thermal_reset_controller(thermal->reset);
1125 thermal->chip->initialize(thermal->grf, thermal->regs,
1126 thermal->tshut_polarity);
1128 for (i = 0; i < thermal->chip->chn_num; i++) {
1129 int id = thermal->sensors[i].id;
1131 thermal->chip->set_tshut_mode(id, thermal->regs,
1132 thermal->tshut_mode);
1133 thermal->chip->set_tshut_temp(thermal->chip->table,
1135 thermal->tshut_temp);
1138 thermal->chip->control(thermal->regs, true);
1140 for (i = 0; i < thermal->chip->chn_num; i++)
1141 rockchip_thermal_toggle_sensor(&thermal->sensors[i], true);
1143 pinctrl_pm_select_default_state(dev);
1148 static SIMPLE_DEV_PM_OPS(rockchip_thermal_pm_ops,
1149 rockchip_thermal_suspend, rockchip_thermal_resume);
1151 static struct platform_driver rockchip_thermal_driver = {
1153 .name = "rockchip-thermal",
1154 .pm = &rockchip_thermal_pm_ops,
1155 .of_match_table = of_rockchip_thermal_match,
1157 .probe = rockchip_thermal_probe,
1158 .remove = rockchip_thermal_remove,
1161 module_platform_driver(rockchip_thermal_driver);
1163 MODULE_DESCRIPTION("ROCKCHIP THERMAL Driver");
1164 MODULE_AUTHOR("Rockchip, Inc.");
1165 MODULE_LICENSE("GPL v2");
1166 MODULE_ALIAS("platform:rockchip-thermal");