2 * Driver for 8250/16550-type serial ports
4 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
6 * Copyright (C) 2001 Russell King.
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
13 * A note about mapbase / membase
15 * mapbase is the physical address of the IO port.
16 * membase is an 'ioremapped' cookie.
19 #if defined(CONFIG_SERIAL_8250_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
23 #include <linux/module.h>
24 #include <linux/moduleparam.h>
25 #include <linux/ioport.h>
26 #include <linux/init.h>
27 #include <linux/console.h>
28 #include <linux/sysrq.h>
29 #include <linux/delay.h>
30 #include <linux/platform_device.h>
31 #include <linux/tty.h>
32 #include <linux/ratelimit.h>
33 #include <linux/tty_flip.h>
34 #include <linux/serial.h>
35 #include <linux/serial_8250.h>
36 #include <linux/nmi.h>
37 #include <linux/mutex.h>
38 #include <linux/slab.h>
39 #include <linux/uaccess.h>
40 #include <linux/pm_runtime.h>
42 #include <linux/sunserialcore.h>
52 * share_irqs - whether we pass IRQF_SHARED to request_irq(). This option
53 * is unsafe when used on edge-triggered interrupts.
55 static unsigned int share_irqs = SERIAL8250_SHARE_IRQS;
57 static unsigned int nr_uarts = CONFIG_SERIAL_8250_RUNTIME_UARTS;
59 static struct uart_driver serial8250_reg;
61 static int serial_index(struct uart_port *port)
63 return port->minor - 64;
66 static unsigned int skip_txen_test; /* force skip of txen test at init time */
72 #define DEBUG_AUTOCONF(fmt...) printk(fmt)
74 #define DEBUG_AUTOCONF(fmt...) do { } while (0)
78 #define DEBUG_INTR(fmt...) printk(fmt)
80 #define DEBUG_INTR(fmt...) do { } while (0)
83 #define PASS_LIMIT 512
85 #define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
88 #ifdef CONFIG_SERIAL_8250_DETECT_IRQ
89 #define CONFIG_SERIAL_DETECT_IRQ 1
91 #ifdef CONFIG_SERIAL_8250_MANY_PORTS
92 #define CONFIG_SERIAL_MANY_PORTS 1
96 * HUB6 is always on. This will be removed once the header
97 * files have been cleaned.
101 #include <asm/serial.h>
103 * SERIAL_PORT_DFNS tells us about built-in ports that have no
104 * standard enumeration mechanism. Platforms that can find all
105 * serial ports via mechanisms like ACPI or PCI need not supply it.
107 #ifndef SERIAL_PORT_DFNS
108 #define SERIAL_PORT_DFNS
111 static const struct old_serial_port old_serial_port[] = {
112 SERIAL_PORT_DFNS /* defined in asm/serial.h */
115 #define UART_NR CONFIG_SERIAL_8250_NR_UARTS
117 #ifdef CONFIG_SERIAL_8250_RSA
119 #define PORT_RSA_MAX 4
120 static unsigned long probe_rsa[PORT_RSA_MAX];
121 static unsigned int probe_rsa_count;
122 #endif /* CONFIG_SERIAL_8250_RSA */
125 struct hlist_node node;
127 spinlock_t lock; /* Protects list not the hash */
128 struct list_head *head;
131 #define NR_IRQ_HASH 32 /* Can be adjusted later */
132 static struct hlist_head irq_lists[NR_IRQ_HASH];
133 static DEFINE_MUTEX(hash_mutex); /* Used to walk the hash */
136 * Here we define the default xmit fifo size used for each type of UART.
138 static const struct serial8250_config uart_config[] = {
163 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
164 .rxtrig_bytes = {1, 4, 8, 14},
165 .flags = UART_CAP_FIFO,
176 .flags = UART_CAP_FIFO | UART_CAP_EFR | UART_CAP_SLEEP,
182 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_01 |
184 .rxtrig_bytes = {8, 16, 24, 28},
185 .flags = UART_CAP_FIFO | UART_CAP_EFR | UART_CAP_SLEEP,
191 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10 |
193 .rxtrig_bytes = {1, 16, 32, 56},
194 .flags = UART_CAP_FIFO | UART_CAP_SLEEP | UART_CAP_AFE,
202 .name = "16C950/954",
205 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
206 /* UART_CAP_EFR breaks billionon CF bluetooth card. */
207 .flags = UART_CAP_FIFO | UART_CAP_SLEEP,
213 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_01 |
215 .rxtrig_bytes = {8, 16, 56, 60},
216 .flags = UART_CAP_FIFO | UART_CAP_EFR | UART_CAP_SLEEP,
222 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
223 .flags = UART_CAP_FIFO | UART_CAP_EFR | UART_CAP_SLEEP,
229 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_11,
230 .flags = UART_CAP_FIFO,
236 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
237 .flags = UART_CAP_FIFO | UART_NATSEMI,
243 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
244 .flags = UART_CAP_FIFO | UART_CAP_UUE | UART_CAP_RTOIE,
250 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
251 .flags = UART_CAP_FIFO,
257 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_00,
258 .flags = UART_CAP_FIFO | UART_CAP_AFE,
264 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
265 .flags = UART_CAP_FIFO | UART_CAP_AFE,
271 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_01 |
273 .rxtrig_bytes = {1, 4, 8, 14},
274 .flags = UART_CAP_FIFO | UART_CAP_RTOIE,
280 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
281 .flags = UART_CAP_FIFO | UART_CAP_AFE | UART_CAP_EFR |
288 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_11 |
290 .flags = UART_CAP_FIFO | UART_CAP_AFE | UART_CAP_EFR |
297 .fcr = UART_FCR_DMA_SELECT | UART_FCR_ENABLE_FIFO |
298 UART_FCR_R_TRIG_00 | UART_FCR_T_TRIG_00,
299 .flags = UART_CAP_FIFO,
301 [PORT_BRCM_TRUMANAGE] = {
305 .flags = UART_CAP_HFIFO,
310 [PORT_ALTR_16550_F32] = {
311 .name = "Altera 16550 FIFO32",
314 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
315 .flags = UART_CAP_FIFO | UART_CAP_AFE,
317 [PORT_ALTR_16550_F64] = {
318 .name = "Altera 16550 FIFO64",
321 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
322 .flags = UART_CAP_FIFO | UART_CAP_AFE,
324 [PORT_ALTR_16550_F128] = {
325 .name = "Altera 16550 FIFO128",
328 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
329 .flags = UART_CAP_FIFO | UART_CAP_AFE,
331 /* tx_loadsz is set to 63-bytes instead of 64-bytes to implement
332 workaround of errata A-008006 which states that tx_loadsz should be
333 configured less than Maximum supported fifo bytes */
334 [PORT_16550A_FSL64] = {
335 .name = "16550A_FSL64",
338 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10 |
340 .flags = UART_CAP_FIFO,
344 /* Uart divisor latch read */
345 static int default_serial_dl_read(struct uart_8250_port *up)
347 return serial_in(up, UART_DLL) | serial_in(up, UART_DLM) << 8;
350 /* Uart divisor latch write */
351 static void default_serial_dl_write(struct uart_8250_port *up, int value)
353 serial_out(up, UART_DLL, value & 0xff);
354 serial_out(up, UART_DLM, value >> 8 & 0xff);
357 #if defined(CONFIG_MIPS_ALCHEMY) || defined(CONFIG_SERIAL_8250_RT288X)
359 /* Au1x00/RT288x UART hardware has a weird register layout */
360 static const s8 au_io_in_map[8] = {
368 -1, /* UART_SCR (unmapped) */
371 static const s8 au_io_out_map[8] = {
377 -1, /* UART_LSR (unmapped) */
378 -1, /* UART_MSR (unmapped) */
379 -1, /* UART_SCR (unmapped) */
382 static unsigned int au_serial_in(struct uart_port *p, int offset)
384 if (offset >= ARRAY_SIZE(au_io_in_map))
386 offset = au_io_in_map[offset];
389 return __raw_readl(p->membase + (offset << p->regshift));
392 static void au_serial_out(struct uart_port *p, int offset, int value)
394 if (offset >= ARRAY_SIZE(au_io_out_map))
396 offset = au_io_out_map[offset];
399 __raw_writel(value, p->membase + (offset << p->regshift));
402 /* Au1x00 haven't got a standard divisor latch */
403 static int au_serial_dl_read(struct uart_8250_port *up)
405 return __raw_readl(up->port.membase + 0x28);
408 static void au_serial_dl_write(struct uart_8250_port *up, int value)
410 __raw_writel(value, up->port.membase + 0x28);
415 static unsigned int hub6_serial_in(struct uart_port *p, int offset)
417 offset = offset << p->regshift;
418 outb(p->hub6 - 1 + offset, p->iobase);
419 return inb(p->iobase + 1);
422 static void hub6_serial_out(struct uart_port *p, int offset, int value)
424 offset = offset << p->regshift;
425 outb(p->hub6 - 1 + offset, p->iobase);
426 outb(value, p->iobase + 1);
429 static unsigned int mem_serial_in(struct uart_port *p, int offset)
431 offset = offset << p->regshift;
432 return readb(p->membase + offset);
435 static void mem_serial_out(struct uart_port *p, int offset, int value)
437 offset = offset << p->regshift;
438 writeb(value, p->membase + offset);
441 static void mem32_serial_out(struct uart_port *p, int offset, int value)
443 offset = offset << p->regshift;
444 writel(value, p->membase + offset);
447 static unsigned int mem32_serial_in(struct uart_port *p, int offset)
449 offset = offset << p->regshift;
450 return readl(p->membase + offset);
453 static void mem32be_serial_out(struct uart_port *p, int offset, int value)
455 offset = offset << p->regshift;
456 iowrite32be(value, p->membase + offset);
459 static unsigned int mem32be_serial_in(struct uart_port *p, int offset)
461 offset = offset << p->regshift;
462 return ioread32be(p->membase + offset);
465 static unsigned int io_serial_in(struct uart_port *p, int offset)
467 offset = offset << p->regshift;
468 return inb(p->iobase + offset);
471 static void io_serial_out(struct uart_port *p, int offset, int value)
473 offset = offset << p->regshift;
474 outb(value, p->iobase + offset);
477 static int serial8250_default_handle_irq(struct uart_port *port);
478 static int exar_handle_irq(struct uart_port *port);
480 static void set_io_from_upio(struct uart_port *p)
482 struct uart_8250_port *up = up_to_u8250p(p);
484 up->dl_read = default_serial_dl_read;
485 up->dl_write = default_serial_dl_write;
489 p->serial_in = hub6_serial_in;
490 p->serial_out = hub6_serial_out;
494 p->serial_in = mem_serial_in;
495 p->serial_out = mem_serial_out;
499 p->serial_in = mem32_serial_in;
500 p->serial_out = mem32_serial_out;
504 p->serial_in = mem32be_serial_in;
505 p->serial_out = mem32be_serial_out;
508 #if defined(CONFIG_MIPS_ALCHEMY) || defined(CONFIG_SERIAL_8250_RT288X)
510 p->serial_in = au_serial_in;
511 p->serial_out = au_serial_out;
512 up->dl_read = au_serial_dl_read;
513 up->dl_write = au_serial_dl_write;
518 p->serial_in = io_serial_in;
519 p->serial_out = io_serial_out;
522 /* Remember loaded iotype */
523 up->cur_iotype = p->iotype;
524 p->handle_irq = serial8250_default_handle_irq;
528 serial_port_out_sync(struct uart_port *p, int offset, int value)
535 p->serial_out(p, offset, value);
536 p->serial_in(p, UART_LCR); /* safe, no side-effects */
539 p->serial_out(p, offset, value);
546 static void serial_icr_write(struct uart_8250_port *up, int offset, int value)
548 serial_out(up, UART_SCR, offset);
549 serial_out(up, UART_ICR, value);
552 static unsigned int serial_icr_read(struct uart_8250_port *up, int offset)
556 serial_icr_write(up, UART_ACR, up->acr | UART_ACR_ICRRD);
557 serial_out(up, UART_SCR, offset);
558 value = serial_in(up, UART_ICR);
559 serial_icr_write(up, UART_ACR, up->acr);
567 static void serial8250_clear_fifos(struct uart_8250_port *p)
569 if (p->capabilities & UART_CAP_FIFO) {
570 serial_out(p, UART_FCR, UART_FCR_ENABLE_FIFO);
571 serial_out(p, UART_FCR, UART_FCR_ENABLE_FIFO |
572 UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
573 serial_out(p, UART_FCR, 0);
577 void serial8250_clear_and_reinit_fifos(struct uart_8250_port *p)
579 serial8250_clear_fifos(p);
580 serial_out(p, UART_FCR, p->fcr);
582 EXPORT_SYMBOL_GPL(serial8250_clear_and_reinit_fifos);
584 void serial8250_rpm_get(struct uart_8250_port *p)
586 if (!(p->capabilities & UART_CAP_RPM))
588 pm_runtime_get_sync(p->port.dev);
590 EXPORT_SYMBOL_GPL(serial8250_rpm_get);
592 void serial8250_rpm_put(struct uart_8250_port *p)
594 if (!(p->capabilities & UART_CAP_RPM))
596 pm_runtime_mark_last_busy(p->port.dev);
597 pm_runtime_put_autosuspend(p->port.dev);
599 EXPORT_SYMBOL_GPL(serial8250_rpm_put);
602 * These two wrappers ensure that enable_runtime_pm_tx() can be called more than
603 * once and disable_runtime_pm_tx() will still disable RPM because the fifo is
604 * empty and the HW can idle again.
606 static void serial8250_rpm_get_tx(struct uart_8250_port *p)
608 unsigned char rpm_active;
610 if (!(p->capabilities & UART_CAP_RPM))
613 rpm_active = xchg(&p->rpm_tx_active, 1);
616 pm_runtime_get_sync(p->port.dev);
619 static void serial8250_rpm_put_tx(struct uart_8250_port *p)
621 unsigned char rpm_active;
623 if (!(p->capabilities & UART_CAP_RPM))
626 rpm_active = xchg(&p->rpm_tx_active, 0);
629 pm_runtime_mark_last_busy(p->port.dev);
630 pm_runtime_put_autosuspend(p->port.dev);
634 * IER sleep support. UARTs which have EFRs need the "extended
635 * capability" bit enabled. Note that on XR16C850s, we need to
636 * reset LCR to write to IER.
638 static void serial8250_set_sleep(struct uart_8250_port *p, int sleep)
640 unsigned char lcr = 0, efr = 0;
642 * Exar UARTs have a SLEEP register that enables or disables
643 * each UART to enter sleep mode separately. On the XR17V35x the
644 * register is accessible to each UART at the UART_EXAR_SLEEP
645 * offset but the UART channel may only write to the corresponding
648 serial8250_rpm_get(p);
649 if ((p->port.type == PORT_XR17V35X) ||
650 (p->port.type == PORT_XR17D15X)) {
651 serial_out(p, UART_EXAR_SLEEP, sleep ? 0xff : 0);
655 if (p->capabilities & UART_CAP_SLEEP) {
656 if (p->capabilities & UART_CAP_EFR) {
657 lcr = serial_in(p, UART_LCR);
658 efr = serial_in(p, UART_EFR);
659 serial_out(p, UART_LCR, UART_LCR_CONF_MODE_B);
660 serial_out(p, UART_EFR, UART_EFR_ECB);
661 serial_out(p, UART_LCR, 0);
663 serial_out(p, UART_IER, sleep ? UART_IERX_SLEEP : 0);
664 if (p->capabilities & UART_CAP_EFR) {
665 serial_out(p, UART_LCR, UART_LCR_CONF_MODE_B);
666 serial_out(p, UART_EFR, efr);
667 serial_out(p, UART_LCR, lcr);
671 serial8250_rpm_put(p);
674 #ifdef CONFIG_SERIAL_8250_RSA
676 * Attempts to turn on the RSA FIFO. Returns zero on failure.
677 * We set the port uart clock rate if we succeed.
679 static int __enable_rsa(struct uart_8250_port *up)
684 mode = serial_in(up, UART_RSA_MSR);
685 result = mode & UART_RSA_MSR_FIFO;
688 serial_out(up, UART_RSA_MSR, mode | UART_RSA_MSR_FIFO);
689 mode = serial_in(up, UART_RSA_MSR);
690 result = mode & UART_RSA_MSR_FIFO;
694 up->port.uartclk = SERIAL_RSA_BAUD_BASE * 16;
699 static void enable_rsa(struct uart_8250_port *up)
701 if (up->port.type == PORT_RSA) {
702 if (up->port.uartclk != SERIAL_RSA_BAUD_BASE * 16) {
703 spin_lock_irq(&up->port.lock);
705 spin_unlock_irq(&up->port.lock);
707 if (up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16)
708 serial_out(up, UART_RSA_FRR, 0);
713 * Attempts to turn off the RSA FIFO. Returns zero on failure.
714 * It is unknown why interrupts were disabled in here. However,
715 * the caller is expected to preserve this behaviour by grabbing
716 * the spinlock before calling this function.
718 static void disable_rsa(struct uart_8250_port *up)
723 if (up->port.type == PORT_RSA &&
724 up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16) {
725 spin_lock_irq(&up->port.lock);
727 mode = serial_in(up, UART_RSA_MSR);
728 result = !(mode & UART_RSA_MSR_FIFO);
731 serial_out(up, UART_RSA_MSR, mode & ~UART_RSA_MSR_FIFO);
732 mode = serial_in(up, UART_RSA_MSR);
733 result = !(mode & UART_RSA_MSR_FIFO);
737 up->port.uartclk = SERIAL_RSA_BAUD_BASE_LO * 16;
738 spin_unlock_irq(&up->port.lock);
741 #endif /* CONFIG_SERIAL_8250_RSA */
744 * This is a quickie test to see how big the FIFO is.
745 * It doesn't work at all the time, more's the pity.
747 static int size_fifo(struct uart_8250_port *up)
749 unsigned char old_fcr, old_mcr, old_lcr;
750 unsigned short old_dl;
753 old_lcr = serial_in(up, UART_LCR);
754 serial_out(up, UART_LCR, 0);
755 old_fcr = serial_in(up, UART_FCR);
756 old_mcr = serial_in(up, UART_MCR);
757 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO |
758 UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
759 serial_out(up, UART_MCR, UART_MCR_LOOP);
760 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
761 old_dl = serial_dl_read(up);
762 serial_dl_write(up, 0x0001);
763 serial_out(up, UART_LCR, 0x03);
764 for (count = 0; count < 256; count++)
765 serial_out(up, UART_TX, count);
766 mdelay(20);/* FIXME - schedule_timeout */
767 for (count = 0; (serial_in(up, UART_LSR) & UART_LSR_DR) &&
768 (count < 256); count++)
769 serial_in(up, UART_RX);
770 serial_out(up, UART_FCR, old_fcr);
771 serial_out(up, UART_MCR, old_mcr);
772 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
773 serial_dl_write(up, old_dl);
774 serial_out(up, UART_LCR, old_lcr);
780 * Read UART ID using the divisor method - set DLL and DLM to zero
781 * and the revision will be in DLL and device type in DLM. We
782 * preserve the device state across this.
784 static unsigned int autoconfig_read_divisor_id(struct uart_8250_port *p)
786 unsigned char old_dll, old_dlm, old_lcr;
789 old_lcr = serial_in(p, UART_LCR);
790 serial_out(p, UART_LCR, UART_LCR_CONF_MODE_A);
792 old_dll = serial_in(p, UART_DLL);
793 old_dlm = serial_in(p, UART_DLM);
795 serial_out(p, UART_DLL, 0);
796 serial_out(p, UART_DLM, 0);
798 id = serial_in(p, UART_DLL) | serial_in(p, UART_DLM) << 8;
800 serial_out(p, UART_DLL, old_dll);
801 serial_out(p, UART_DLM, old_dlm);
802 serial_out(p, UART_LCR, old_lcr);
808 * This is a helper routine to autodetect StarTech/Exar/Oxsemi UART's.
809 * When this function is called we know it is at least a StarTech
810 * 16650 V2, but it might be one of several StarTech UARTs, or one of
811 * its clones. (We treat the broken original StarTech 16650 V1 as a
812 * 16550, and why not? Startech doesn't seem to even acknowledge its
815 * What evil have men's minds wrought...
817 static void autoconfig_has_efr(struct uart_8250_port *up)
819 unsigned int id1, id2, id3, rev;
822 * Everything with an EFR has SLEEP
824 up->capabilities |= UART_CAP_EFR | UART_CAP_SLEEP;
827 * First we check to see if it's an Oxford Semiconductor UART.
829 * If we have to do this here because some non-National
830 * Semiconductor clone chips lock up if you try writing to the
831 * LSR register (which serial_icr_read does)
835 * Check for Oxford Semiconductor 16C950.
837 * EFR [4] must be set else this test fails.
839 * This shouldn't be necessary, but Mike Hudson (Exoray@isys.ca)
840 * claims that it's needed for 952 dual UART's (which are not
841 * recommended for new designs).
844 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
845 serial_out(up, UART_EFR, UART_EFR_ECB);
846 serial_out(up, UART_LCR, 0x00);
847 id1 = serial_icr_read(up, UART_ID1);
848 id2 = serial_icr_read(up, UART_ID2);
849 id3 = serial_icr_read(up, UART_ID3);
850 rev = serial_icr_read(up, UART_REV);
852 DEBUG_AUTOCONF("950id=%02x:%02x:%02x:%02x ", id1, id2, id3, rev);
854 if (id1 == 0x16 && id2 == 0xC9 &&
855 (id3 == 0x50 || id3 == 0x52 || id3 == 0x54)) {
856 up->port.type = PORT_16C950;
859 * Enable work around for the Oxford Semiconductor 952 rev B
860 * chip which causes it to seriously miscalculate baud rates
863 if (id3 == 0x52 && rev == 0x01)
864 up->bugs |= UART_BUG_QUOT;
869 * We check for a XR16C850 by setting DLL and DLM to 0, and then
870 * reading back DLL and DLM. The chip type depends on the DLM
872 * 0x10 - XR16C850 and the DLL contains the chip revision.
876 id1 = autoconfig_read_divisor_id(up);
877 DEBUG_AUTOCONF("850id=%04x ", id1);
880 if (id2 == 0x10 || id2 == 0x12 || id2 == 0x14) {
881 up->port.type = PORT_16850;
886 * It wasn't an XR16C850.
888 * We distinguish between the '654 and the '650 by counting
889 * how many bytes are in the FIFO. I'm using this for now,
890 * since that's the technique that was sent to me in the
891 * serial driver update, but I'm not convinced this works.
892 * I've had problems doing this in the past. -TYT
894 if (size_fifo(up) == 64)
895 up->port.type = PORT_16654;
897 up->port.type = PORT_16650V2;
901 * We detected a chip without a FIFO. Only two fall into
902 * this category - the original 8250 and the 16450. The
903 * 16450 has a scratch register (accessible with LCR=0)
905 static void autoconfig_8250(struct uart_8250_port *up)
907 unsigned char scratch, status1, status2;
909 up->port.type = PORT_8250;
911 scratch = serial_in(up, UART_SCR);
912 serial_out(up, UART_SCR, 0xa5);
913 status1 = serial_in(up, UART_SCR);
914 serial_out(up, UART_SCR, 0x5a);
915 status2 = serial_in(up, UART_SCR);
916 serial_out(up, UART_SCR, scratch);
918 if (status1 == 0xa5 && status2 == 0x5a)
919 up->port.type = PORT_16450;
922 static int broken_efr(struct uart_8250_port *up)
925 * Exar ST16C2550 "A2" devices incorrectly detect as
926 * having an EFR, and report an ID of 0x0201. See
927 * http://linux.derkeiler.com/Mailing-Lists/Kernel/2004-11/4812.html
929 if (autoconfig_read_divisor_id(up) == 0x0201 && size_fifo(up) == 16)
936 * We know that the chip has FIFOs. Does it have an EFR? The
937 * EFR is located in the same register position as the IIR and
938 * we know the top two bits of the IIR are currently set. The
939 * EFR should contain zero. Try to read the EFR.
941 static void autoconfig_16550a(struct uart_8250_port *up)
943 unsigned char status1, status2;
944 unsigned int iersave;
946 up->port.type = PORT_16550A;
947 up->capabilities |= UART_CAP_FIFO;
950 * XR17V35x UARTs have an extra divisor register, DLD
951 * that gets enabled with when DLAB is set which will
952 * cause the device to incorrectly match and assign
953 * port type to PORT_16650. The EFR for this UART is
954 * found at offset 0x09. Instead check the Deice ID (DVID)
955 * register for a 2, 4 or 8 port UART.
957 if (up->port.flags & UPF_EXAR_EFR) {
958 status1 = serial_in(up, UART_EXAR_DVID);
959 if (status1 == 0x82 || status1 == 0x84 || status1 == 0x88) {
960 DEBUG_AUTOCONF("Exar XR17V35x ");
961 up->port.type = PORT_XR17V35X;
962 up->capabilities |= UART_CAP_AFE | UART_CAP_EFR |
971 * Check for presence of the EFR when DLAB is set.
972 * Only ST16C650V1 UARTs pass this test.
974 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
975 if (serial_in(up, UART_EFR) == 0) {
976 serial_out(up, UART_EFR, 0xA8);
977 if (serial_in(up, UART_EFR) != 0) {
978 DEBUG_AUTOCONF("EFRv1 ");
979 up->port.type = PORT_16650;
980 up->capabilities |= UART_CAP_EFR | UART_CAP_SLEEP;
982 serial_out(up, UART_LCR, 0);
983 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO |
985 status1 = serial_in(up, UART_IIR) >> 5;
986 serial_out(up, UART_FCR, 0);
987 serial_out(up, UART_LCR, 0);
990 up->port.type = PORT_16550A_FSL64;
992 DEBUG_AUTOCONF("Motorola 8xxx DUART ");
994 serial_out(up, UART_EFR, 0);
999 * Maybe it requires 0xbf to be written to the LCR.
1000 * (other ST16C650V2 UARTs, TI16C752A, etc)
1002 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
1003 if (serial_in(up, UART_EFR) == 0 && !broken_efr(up)) {
1004 DEBUG_AUTOCONF("EFRv2 ");
1005 autoconfig_has_efr(up);
1010 * Check for a National Semiconductor SuperIO chip.
1011 * Attempt to switch to bank 2, read the value of the LOOP bit
1012 * from EXCR1. Switch back to bank 0, change it in MCR. Then
1013 * switch back to bank 2, read it from EXCR1 again and check
1014 * it's changed. If so, set baud_base in EXCR2 to 921600. -- dwmw2
1016 serial_out(up, UART_LCR, 0);
1017 status1 = serial_in(up, UART_MCR);
1018 serial_out(up, UART_LCR, 0xE0);
1019 status2 = serial_in(up, 0x02); /* EXCR1 */
1021 if (!((status2 ^ status1) & UART_MCR_LOOP)) {
1022 serial_out(up, UART_LCR, 0);
1023 serial_out(up, UART_MCR, status1 ^ UART_MCR_LOOP);
1024 serial_out(up, UART_LCR, 0xE0);
1025 status2 = serial_in(up, 0x02); /* EXCR1 */
1026 serial_out(up, UART_LCR, 0);
1027 serial_out(up, UART_MCR, status1);
1029 if ((status2 ^ status1) & UART_MCR_LOOP) {
1030 unsigned short quot;
1032 serial_out(up, UART_LCR, 0xE0);
1034 quot = serial_dl_read(up);
1037 if (ns16550a_goto_highspeed(up))
1038 serial_dl_write(up, quot);
1040 serial_out(up, UART_LCR, 0);
1042 up->port.uartclk = 921600*16;
1043 up->port.type = PORT_NS16550A;
1044 up->capabilities |= UART_NATSEMI;
1050 * No EFR. Try to detect a TI16750, which only sets bit 5 of
1051 * the IIR when 64 byte FIFO mode is enabled when DLAB is set.
1052 * Try setting it with and without DLAB set. Cheap clones
1053 * set bit 5 without DLAB set.
1055 serial_out(up, UART_LCR, 0);
1056 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
1057 status1 = serial_in(up, UART_IIR) >> 5;
1058 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO);
1059 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
1060 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
1061 status2 = serial_in(up, UART_IIR) >> 5;
1062 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO);
1063 serial_out(up, UART_LCR, 0);
1065 DEBUG_AUTOCONF("iir1=%d iir2=%d ", status1, status2);
1067 if (status1 == 6 && status2 == 7) {
1068 up->port.type = PORT_16750;
1069 up->capabilities |= UART_CAP_AFE | UART_CAP_SLEEP;
1074 * Try writing and reading the UART_IER_UUE bit (b6).
1075 * If it works, this is probably one of the Xscale platform's
1077 * We're going to explicitly set the UUE bit to 0 before
1078 * trying to write and read a 1 just to make sure it's not
1079 * already a 1 and maybe locked there before we even start start.
1081 iersave = serial_in(up, UART_IER);
1082 serial_out(up, UART_IER, iersave & ~UART_IER_UUE);
1083 if (!(serial_in(up, UART_IER) & UART_IER_UUE)) {
1085 * OK it's in a known zero state, try writing and reading
1086 * without disturbing the current state of the other bits.
1088 serial_out(up, UART_IER, iersave | UART_IER_UUE);
1089 if (serial_in(up, UART_IER) & UART_IER_UUE) {
1092 * We'll leave the UART_IER_UUE bit set to 1 (enabled).
1094 DEBUG_AUTOCONF("Xscale ");
1095 up->port.type = PORT_XSCALE;
1096 up->capabilities |= UART_CAP_UUE | UART_CAP_RTOIE;
1101 * If we got here we couldn't force the IER_UUE bit to 0.
1102 * Log it and continue.
1104 DEBUG_AUTOCONF("Couldn't force IER_UUE to 0 ");
1106 serial_out(up, UART_IER, iersave);
1109 * Exar uarts have EFR in a weird location
1111 if (up->port.flags & UPF_EXAR_EFR) {
1112 DEBUG_AUTOCONF("Exar XR17D15x ");
1113 up->port.type = PORT_XR17D15X;
1114 up->capabilities |= UART_CAP_AFE | UART_CAP_EFR |
1121 * We distinguish between 16550A and U6 16550A by counting
1122 * how many bytes are in the FIFO.
1124 if (up->port.type == PORT_16550A && size_fifo(up) == 64) {
1125 up->port.type = PORT_U6_16550A;
1126 up->capabilities |= UART_CAP_AFE;
1131 * This routine is called by rs_init() to initialize a specific serial
1132 * port. It determines what type of UART chip this serial port is
1133 * using: 8250, 16450, 16550, 16550A. The important question is
1134 * whether or not this UART is a 16550A or not, since this will
1135 * determine whether or not we can use its FIFO features or not.
1137 static void autoconfig(struct uart_8250_port *up)
1139 unsigned char status1, scratch, scratch2, scratch3;
1140 unsigned char save_lcr, save_mcr;
1141 struct uart_port *port = &up->port;
1142 unsigned long flags;
1143 unsigned int old_capabilities;
1145 if (!port->iobase && !port->mapbase && !port->membase)
1148 DEBUG_AUTOCONF("ttyS%d: autoconf (0x%04lx, 0x%p): ",
1149 serial_index(port), port->iobase, port->membase);
1152 * We really do need global IRQs disabled here - we're going to
1153 * be frobbing the chips IRQ enable register to see if it exists.
1155 spin_lock_irqsave(&port->lock, flags);
1157 up->capabilities = 0;
1160 if (!(port->flags & UPF_BUGGY_UART)) {
1162 * Do a simple existence test first; if we fail this,
1163 * there's no point trying anything else.
1165 * 0x80 is used as a nonsense port to prevent against
1166 * false positives due to ISA bus float. The
1167 * assumption is that 0x80 is a non-existent port;
1168 * which should be safe since include/asm/io.h also
1169 * makes this assumption.
1171 * Note: this is safe as long as MCR bit 4 is clear
1172 * and the device is in "PC" mode.
1174 scratch = serial_in(up, UART_IER);
1175 serial_out(up, UART_IER, 0);
1180 * Mask out IER[7:4] bits for test as some UARTs (e.g. TL
1181 * 16C754B) allow only to modify them if an EFR bit is set.
1183 scratch2 = serial_in(up, UART_IER) & 0x0f;
1184 serial_out(up, UART_IER, 0x0F);
1188 scratch3 = serial_in(up, UART_IER) & 0x0f;
1189 serial_out(up, UART_IER, scratch);
1190 if (scratch2 != 0 || scratch3 != 0x0F) {
1192 * We failed; there's nothing here
1194 spin_unlock_irqrestore(&port->lock, flags);
1195 DEBUG_AUTOCONF("IER test failed (%02x, %02x) ",
1196 scratch2, scratch3);
1201 save_mcr = serial_in(up, UART_MCR);
1202 save_lcr = serial_in(up, UART_LCR);
1205 * Check to see if a UART is really there. Certain broken
1206 * internal modems based on the Rockwell chipset fail this
1207 * test, because they apparently don't implement the loopback
1208 * test mode. So this test is skipped on the COM 1 through
1209 * COM 4 ports. This *should* be safe, since no board
1210 * manufacturer would be stupid enough to design a board
1211 * that conflicts with COM 1-4 --- we hope!
1213 if (!(port->flags & UPF_SKIP_TEST)) {
1214 serial_out(up, UART_MCR, UART_MCR_LOOP | 0x0A);
1215 status1 = serial_in(up, UART_MSR) & 0xF0;
1216 serial_out(up, UART_MCR, save_mcr);
1217 if (status1 != 0x90) {
1218 spin_unlock_irqrestore(&port->lock, flags);
1219 DEBUG_AUTOCONF("LOOP test failed (%02x) ",
1226 * We're pretty sure there's a port here. Lets find out what
1227 * type of port it is. The IIR top two bits allows us to find
1228 * out if it's 8250 or 16450, 16550, 16550A or later. This
1229 * determines what we test for next.
1231 * We also initialise the EFR (if any) to zero for later. The
1232 * EFR occupies the same register location as the FCR and IIR.
1234 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
1235 serial_out(up, UART_EFR, 0);
1236 serial_out(up, UART_LCR, 0);
1238 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO);
1239 scratch = serial_in(up, UART_IIR) >> 6;
1243 autoconfig_8250(up);
1246 port->type = PORT_UNKNOWN;
1249 port->type = PORT_16550;
1252 autoconfig_16550a(up);
1256 #ifdef CONFIG_SERIAL_8250_RSA
1258 * Only probe for RSA ports if we got the region.
1260 if (port->type == PORT_16550A && up->probe & UART_PROBE_RSA &&
1262 port->type = PORT_RSA;
1265 serial_out(up, UART_LCR, save_lcr);
1267 port->fifosize = uart_config[up->port.type].fifo_size;
1268 old_capabilities = up->capabilities;
1269 up->capabilities = uart_config[port->type].flags;
1270 up->tx_loadsz = uart_config[port->type].tx_loadsz;
1272 if (port->type == PORT_UNKNOWN)
1278 #ifdef CONFIG_SERIAL_8250_RSA
1279 if (port->type == PORT_RSA)
1280 serial_out(up, UART_RSA_FRR, 0);
1282 serial_out(up, UART_MCR, save_mcr);
1283 serial8250_clear_fifos(up);
1284 serial_in(up, UART_RX);
1285 if (up->capabilities & UART_CAP_UUE)
1286 serial_out(up, UART_IER, UART_IER_UUE);
1288 serial_out(up, UART_IER, 0);
1291 spin_unlock_irqrestore(&port->lock, flags);
1292 if (up->capabilities != old_capabilities) {
1294 "ttyS%d: detected caps %08x should be %08x\n",
1295 serial_index(port), old_capabilities,
1299 DEBUG_AUTOCONF("iir=%d ", scratch);
1300 DEBUG_AUTOCONF("type=%s\n", uart_config[port->type].name);
1303 static void autoconfig_irq(struct uart_8250_port *up)
1305 struct uart_port *port = &up->port;
1306 unsigned char save_mcr, save_ier;
1307 unsigned char save_ICP = 0;
1308 unsigned int ICP = 0;
1312 if (port->flags & UPF_FOURPORT) {
1313 ICP = (port->iobase & 0xfe0) | 0x1f;
1314 save_ICP = inb_p(ICP);
1319 /* forget possible initially masked and pending IRQ */
1320 probe_irq_off(probe_irq_on());
1321 save_mcr = serial_in(up, UART_MCR);
1322 save_ier = serial_in(up, UART_IER);
1323 serial_out(up, UART_MCR, UART_MCR_OUT1 | UART_MCR_OUT2);
1325 irqs = probe_irq_on();
1326 serial_out(up, UART_MCR, 0);
1328 if (port->flags & UPF_FOURPORT) {
1329 serial_out(up, UART_MCR,
1330 UART_MCR_DTR | UART_MCR_RTS);
1332 serial_out(up, UART_MCR,
1333 UART_MCR_DTR | UART_MCR_RTS | UART_MCR_OUT2);
1335 serial_out(up, UART_IER, 0x0f); /* enable all intrs */
1336 serial_in(up, UART_LSR);
1337 serial_in(up, UART_RX);
1338 serial_in(up, UART_IIR);
1339 serial_in(up, UART_MSR);
1340 serial_out(up, UART_TX, 0xFF);
1342 irq = probe_irq_off(irqs);
1344 serial_out(up, UART_MCR, save_mcr);
1345 serial_out(up, UART_IER, save_ier);
1347 if (port->flags & UPF_FOURPORT)
1348 outb_p(save_ICP, ICP);
1350 port->irq = (irq > 0) ? irq : 0;
1353 static inline void __stop_tx(struct uart_8250_port *p)
1355 if (p->ier & UART_IER_THRI) {
1356 p->ier &= ~UART_IER_THRI;
1357 serial_out(p, UART_IER, p->ier);
1358 serial8250_rpm_put_tx(p);
1362 static void serial8250_stop_tx(struct uart_port *port)
1364 struct uart_8250_port *up = up_to_u8250p(port);
1366 serial8250_rpm_get(up);
1370 * We really want to stop the transmitter from sending.
1372 if (port->type == PORT_16C950) {
1373 up->acr |= UART_ACR_TXDIS;
1374 serial_icr_write(up, UART_ACR, up->acr);
1376 serial8250_rpm_put(up);
1379 static void serial8250_start_tx(struct uart_port *port)
1381 struct uart_8250_port *up = up_to_u8250p(port);
1383 serial8250_rpm_get_tx(up);
1385 if (up->dma && !up->dma->tx_dma(up))
1388 if (!(up->ier & UART_IER_THRI)) {
1389 up->ier |= UART_IER_THRI;
1390 serial_port_out(port, UART_IER, up->ier);
1392 if (up->bugs & UART_BUG_TXEN) {
1394 lsr = serial_in(up, UART_LSR);
1395 up->lsr_saved_flags |= lsr & LSR_SAVE_FLAGS;
1396 if (lsr & UART_LSR_THRE)
1397 serial8250_tx_chars(up);
1402 * Re-enable the transmitter if we disabled it.
1404 if (port->type == PORT_16C950 && up->acr & UART_ACR_TXDIS) {
1405 up->acr &= ~UART_ACR_TXDIS;
1406 serial_icr_write(up, UART_ACR, up->acr);
1410 static void serial8250_throttle(struct uart_port *port)
1412 port->throttle(port);
1415 static void serial8250_unthrottle(struct uart_port *port)
1417 port->unthrottle(port);
1420 static void serial8250_stop_rx(struct uart_port *port)
1422 struct uart_8250_port *up = up_to_u8250p(port);
1424 serial8250_rpm_get(up);
1426 up->ier &= ~(UART_IER_RLSI | UART_IER_RDI);
1427 up->port.read_status_mask &= ~UART_LSR_DR;
1428 serial_port_out(port, UART_IER, up->ier);
1430 serial8250_rpm_put(up);
1433 static void serial8250_disable_ms(struct uart_port *port)
1435 struct uart_8250_port *up =
1436 container_of(port, struct uart_8250_port, port);
1438 /* no MSR capabilities */
1439 if (up->bugs & UART_BUG_NOMSR)
1442 up->ier &= ~UART_IER_MSI;
1443 serial_port_out(port, UART_IER, up->ier);
1446 static void serial8250_enable_ms(struct uart_port *port)
1448 struct uart_8250_port *up = up_to_u8250p(port);
1450 /* no MSR capabilities */
1451 if (up->bugs & UART_BUG_NOMSR)
1454 up->ier |= UART_IER_MSI;
1456 serial8250_rpm_get(up);
1457 serial_port_out(port, UART_IER, up->ier);
1458 serial8250_rpm_put(up);
1462 * serial8250_rx_chars: processes according to the passed in LSR
1463 * value, and returns the remaining LSR bits not handled
1464 * by this Rx routine.
1467 serial8250_rx_chars(struct uart_8250_port *up, unsigned char lsr)
1469 struct uart_port *port = &up->port;
1471 int max_count = 256;
1475 if (likely(lsr & UART_LSR_DR))
1476 ch = serial_in(up, UART_RX);
1479 * Intel 82571 has a Serial Over Lan device that will
1480 * set UART_LSR_BI without setting UART_LSR_DR when
1481 * it receives a break. To avoid reading from the
1482 * receive buffer without UART_LSR_DR bit set, we
1483 * just force the read character to be 0
1490 lsr |= up->lsr_saved_flags;
1491 up->lsr_saved_flags = 0;
1493 if (unlikely(lsr & UART_LSR_BRK_ERROR_BITS)) {
1494 if (lsr & UART_LSR_BI) {
1495 lsr &= ~(UART_LSR_FE | UART_LSR_PE);
1498 * We do the SysRQ and SAK checking
1499 * here because otherwise the break
1500 * may get masked by ignore_status_mask
1501 * or read_status_mask.
1503 if (uart_handle_break(port))
1505 } else if (lsr & UART_LSR_PE)
1506 port->icount.parity++;
1507 else if (lsr & UART_LSR_FE)
1508 port->icount.frame++;
1509 if (lsr & UART_LSR_OE)
1510 port->icount.overrun++;
1513 * Mask off conditions which should be ignored.
1515 lsr &= port->read_status_mask;
1517 if (lsr & UART_LSR_BI) {
1518 DEBUG_INTR("handling break....");
1520 } else if (lsr & UART_LSR_PE)
1522 else if (lsr & UART_LSR_FE)
1525 if (uart_handle_sysrq_char(port, ch))
1528 uart_insert_char(port, lsr, UART_LSR_OE, ch, flag);
1531 lsr = serial_in(up, UART_LSR);
1532 } while ((lsr & (UART_LSR_DR | UART_LSR_BI)) && (--max_count > 0));
1533 spin_unlock(&port->lock);
1534 tty_flip_buffer_push(&port->state->port);
1535 spin_lock(&port->lock);
1538 EXPORT_SYMBOL_GPL(serial8250_rx_chars);
1540 void serial8250_tx_chars(struct uart_8250_port *up)
1542 struct uart_port *port = &up->port;
1543 struct circ_buf *xmit = &port->state->xmit;
1547 serial_out(up, UART_TX, port->x_char);
1552 if (uart_tx_stopped(port)) {
1553 serial8250_stop_tx(port);
1556 if (uart_circ_empty(xmit)) {
1561 count = up->tx_loadsz;
1563 serial_out(up, UART_TX, xmit->buf[xmit->tail]);
1564 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
1566 if (uart_circ_empty(xmit))
1568 if (up->capabilities & UART_CAP_HFIFO) {
1569 if ((serial_port_in(port, UART_LSR) & BOTH_EMPTY) !=
1573 } while (--count > 0);
1575 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
1576 uart_write_wakeup(port);
1578 DEBUG_INTR("THRE...");
1581 * With RPM enabled, we have to wait until the FIFO is empty before the
1582 * HW can go idle. So we get here once again with empty FIFO and disable
1583 * the interrupt and RPM in __stop_tx()
1585 if (uart_circ_empty(xmit) && !(up->capabilities & UART_CAP_RPM))
1588 EXPORT_SYMBOL_GPL(serial8250_tx_chars);
1590 /* Caller holds uart port lock */
1591 unsigned int serial8250_modem_status(struct uart_8250_port *up)
1593 struct uart_port *port = &up->port;
1594 unsigned int status = serial_in(up, UART_MSR);
1596 status |= up->msr_saved_flags;
1597 up->msr_saved_flags = 0;
1598 if (status & UART_MSR_ANY_DELTA && up->ier & UART_IER_MSI &&
1599 port->state != NULL) {
1600 if (status & UART_MSR_TERI)
1602 if (status & UART_MSR_DDSR)
1604 if (status & UART_MSR_DDCD)
1605 uart_handle_dcd_change(port, status & UART_MSR_DCD);
1606 if (status & UART_MSR_DCTS)
1607 uart_handle_cts_change(port, status & UART_MSR_CTS);
1609 wake_up_interruptible(&port->state->port.delta_msr_wait);
1614 EXPORT_SYMBOL_GPL(serial8250_modem_status);
1617 * This handles the interrupt from one port.
1619 int serial8250_handle_irq(struct uart_port *port, unsigned int iir)
1621 unsigned char status;
1622 unsigned long flags;
1623 struct uart_8250_port *up = up_to_u8250p(port);
1626 if (iir & UART_IIR_NO_INT)
1629 spin_lock_irqsave(&port->lock, flags);
1631 status = serial_port_in(port, UART_LSR);
1633 DEBUG_INTR("status = %x...", status);
1635 if (status & (UART_LSR_DR | UART_LSR_BI)) {
1637 dma_err = up->dma->rx_dma(up, iir);
1639 if (!up->dma || dma_err)
1640 status = serial8250_rx_chars(up, status);
1642 serial8250_modem_status(up);
1643 if ((!up->dma || (up->dma && up->dma->tx_err)) &&
1644 (status & UART_LSR_THRE))
1645 serial8250_tx_chars(up);
1647 spin_unlock_irqrestore(&port->lock, flags);
1650 EXPORT_SYMBOL_GPL(serial8250_handle_irq);
1652 static int serial8250_default_handle_irq(struct uart_port *port)
1654 struct uart_8250_port *up = up_to_u8250p(port);
1658 serial8250_rpm_get(up);
1660 iir = serial_port_in(port, UART_IIR);
1661 ret = serial8250_handle_irq(port, iir);
1663 serial8250_rpm_put(up);
1668 * These Exar UARTs have an extra interrupt indicator that could
1669 * fire for a few unimplemented interrupts. One of which is a
1670 * wakeup event when coming out of sleep. Put this here just
1671 * to be on the safe side that these interrupts don't go unhandled.
1673 static int exar_handle_irq(struct uart_port *port)
1675 unsigned char int0, int1, int2, int3;
1676 unsigned int iir = serial_port_in(port, UART_IIR);
1679 ret = serial8250_handle_irq(port, iir);
1681 if ((port->type == PORT_XR17V35X) ||
1682 (port->type == PORT_XR17D15X)) {
1683 int0 = serial_port_in(port, 0x80);
1684 int1 = serial_port_in(port, 0x81);
1685 int2 = serial_port_in(port, 0x82);
1686 int3 = serial_port_in(port, 0x83);
1693 * This is the serial driver's interrupt routine.
1695 * Arjan thinks the old way was overly complex, so it got simplified.
1696 * Alan disagrees, saying that need the complexity to handle the weird
1697 * nature of ISA shared interrupts. (This is a special exception.)
1699 * In order to handle ISA shared interrupts properly, we need to check
1700 * that all ports have been serviced, and therefore the ISA interrupt
1701 * line has been de-asserted.
1703 * This means we need to loop through all ports. checking that they
1704 * don't have an interrupt pending.
1706 static irqreturn_t serial8250_interrupt(int irq, void *dev_id)
1708 struct irq_info *i = dev_id;
1709 struct list_head *l, *end = NULL;
1710 int pass_counter = 0, handled = 0;
1712 DEBUG_INTR("serial8250_interrupt(%d)...", irq);
1714 spin_lock(&i->lock);
1718 struct uart_8250_port *up;
1719 struct uart_port *port;
1721 up = list_entry(l, struct uart_8250_port, list);
1724 if (port->handle_irq(port)) {
1727 } else if (end == NULL)
1732 if (l == i->head && pass_counter++ > PASS_LIMIT) {
1733 /* If we hit this, we're dead. */
1734 printk_ratelimited(KERN_ERR
1735 "serial8250: too much work for irq%d\n", irq);
1740 spin_unlock(&i->lock);
1742 DEBUG_INTR("end.\n");
1744 return IRQ_RETVAL(handled);
1748 * To support ISA shared interrupts, we need to have one interrupt
1749 * handler that ensures that the IRQ line has been deasserted
1750 * before returning. Failing to do this will result in the IRQ
1751 * line being stuck active, and, since ISA irqs are edge triggered,
1752 * no more IRQs will be seen.
1754 static void serial_do_unlink(struct irq_info *i, struct uart_8250_port *up)
1756 spin_lock_irq(&i->lock);
1758 if (!list_empty(i->head)) {
1759 if (i->head == &up->list)
1760 i->head = i->head->next;
1761 list_del(&up->list);
1763 BUG_ON(i->head != &up->list);
1766 spin_unlock_irq(&i->lock);
1767 /* List empty so throw away the hash node */
1768 if (i->head == NULL) {
1769 hlist_del(&i->node);
1774 static int serial_link_irq_chain(struct uart_8250_port *up)
1776 struct hlist_head *h;
1777 struct hlist_node *n;
1779 int ret, irq_flags = up->port.flags & UPF_SHARE_IRQ ? IRQF_SHARED : 0;
1781 mutex_lock(&hash_mutex);
1783 h = &irq_lists[up->port.irq % NR_IRQ_HASH];
1785 hlist_for_each(n, h) {
1786 i = hlist_entry(n, struct irq_info, node);
1787 if (i->irq == up->port.irq)
1792 i = kzalloc(sizeof(struct irq_info), GFP_KERNEL);
1794 mutex_unlock(&hash_mutex);
1797 spin_lock_init(&i->lock);
1798 i->irq = up->port.irq;
1799 hlist_add_head(&i->node, h);
1801 mutex_unlock(&hash_mutex);
1803 spin_lock_irq(&i->lock);
1806 list_add(&up->list, i->head);
1807 spin_unlock_irq(&i->lock);
1811 INIT_LIST_HEAD(&up->list);
1812 i->head = &up->list;
1813 spin_unlock_irq(&i->lock);
1814 irq_flags |= up->port.irqflags;
1815 ret = request_irq(up->port.irq, serial8250_interrupt,
1816 irq_flags, "serial", i);
1818 serial_do_unlink(i, up);
1824 static void serial_unlink_irq_chain(struct uart_8250_port *up)
1827 * yes, some broken gcc emit "warning: 'i' may be used uninitialized"
1828 * but no, we are not going to take a patch that assigns NULL below.
1831 struct hlist_node *n;
1832 struct hlist_head *h;
1834 mutex_lock(&hash_mutex);
1836 h = &irq_lists[up->port.irq % NR_IRQ_HASH];
1838 hlist_for_each(n, h) {
1839 i = hlist_entry(n, struct irq_info, node);
1840 if (i->irq == up->port.irq)
1845 BUG_ON(i->head == NULL);
1847 if (list_empty(i->head))
1848 free_irq(up->port.irq, i);
1850 serial_do_unlink(i, up);
1851 mutex_unlock(&hash_mutex);
1855 * This function is used to handle ports that do not have an
1856 * interrupt. This doesn't work very well for 16450's, but gives
1857 * barely passable results for a 16550A. (Although at the expense
1858 * of much CPU overhead).
1860 static void serial8250_timeout(unsigned long data)
1862 struct uart_8250_port *up = (struct uart_8250_port *)data;
1864 up->port.handle_irq(&up->port);
1865 mod_timer(&up->timer, jiffies + uart_poll_timeout(&up->port));
1868 static void serial8250_backup_timeout(unsigned long data)
1870 struct uart_8250_port *up = (struct uart_8250_port *)data;
1871 unsigned int iir, ier = 0, lsr;
1872 unsigned long flags;
1874 spin_lock_irqsave(&up->port.lock, flags);
1877 * Must disable interrupts or else we risk racing with the interrupt
1881 ier = serial_in(up, UART_IER);
1882 serial_out(up, UART_IER, 0);
1885 iir = serial_in(up, UART_IIR);
1888 * This should be a safe test for anyone who doesn't trust the
1889 * IIR bits on their UART, but it's specifically designed for
1890 * the "Diva" UART used on the management processor on many HP
1891 * ia64 and parisc boxes.
1893 lsr = serial_in(up, UART_LSR);
1894 up->lsr_saved_flags |= lsr & LSR_SAVE_FLAGS;
1895 if ((iir & UART_IIR_NO_INT) && (up->ier & UART_IER_THRI) &&
1896 (!uart_circ_empty(&up->port.state->xmit) || up->port.x_char) &&
1897 (lsr & UART_LSR_THRE)) {
1898 iir &= ~(UART_IIR_ID | UART_IIR_NO_INT);
1899 iir |= UART_IIR_THRI;
1902 if (!(iir & UART_IIR_NO_INT))
1903 serial8250_tx_chars(up);
1906 serial_out(up, UART_IER, ier);
1908 spin_unlock_irqrestore(&up->port.lock, flags);
1910 /* Standard timer interval plus 0.2s to keep the port running */
1911 mod_timer(&up->timer,
1912 jiffies + uart_poll_timeout(&up->port) + HZ / 5);
1915 static int univ8250_setup_irq(struct uart_8250_port *up)
1917 struct uart_port *port = &up->port;
1921 * The above check will only give an accurate result the first time
1922 * the port is opened so this value needs to be preserved.
1924 if (up->bugs & UART_BUG_THRE) {
1925 pr_debug("ttyS%d - using backup timer\n", serial_index(port));
1927 up->timer.function = serial8250_backup_timeout;
1928 up->timer.data = (unsigned long)up;
1929 mod_timer(&up->timer, jiffies +
1930 uart_poll_timeout(port) + HZ / 5);
1934 * If the "interrupt" for this port doesn't correspond with any
1935 * hardware interrupt, we use a timer-based system. The original
1936 * driver used to do this with IRQ0.
1939 up->timer.data = (unsigned long)up;
1940 mod_timer(&up->timer, jiffies + uart_poll_timeout(port));
1942 retval = serial_link_irq_chain(up);
1947 static void univ8250_release_irq(struct uart_8250_port *up)
1949 struct uart_port *port = &up->port;
1951 del_timer_sync(&up->timer);
1952 up->timer.function = serial8250_timeout;
1954 serial_unlink_irq_chain(up);
1957 static unsigned int serial8250_tx_empty(struct uart_port *port)
1959 struct uart_8250_port *up = up_to_u8250p(port);
1960 unsigned long flags;
1963 serial8250_rpm_get(up);
1965 spin_lock_irqsave(&port->lock, flags);
1966 lsr = serial_port_in(port, UART_LSR);
1967 up->lsr_saved_flags |= lsr & LSR_SAVE_FLAGS;
1968 spin_unlock_irqrestore(&port->lock, flags);
1970 serial8250_rpm_put(up);
1972 return (lsr & BOTH_EMPTY) == BOTH_EMPTY ? TIOCSER_TEMT : 0;
1975 static unsigned int serial8250_get_mctrl(struct uart_port *port)
1977 struct uart_8250_port *up = up_to_u8250p(port);
1978 unsigned int status;
1981 serial8250_rpm_get(up);
1982 status = serial8250_modem_status(up);
1983 serial8250_rpm_put(up);
1986 if (status & UART_MSR_DCD)
1988 if (status & UART_MSR_RI)
1990 if (status & UART_MSR_DSR)
1992 if (status & UART_MSR_CTS)
1997 void serial8250_do_set_mctrl(struct uart_port *port, unsigned int mctrl)
1999 struct uart_8250_port *up = up_to_u8250p(port);
2000 unsigned char mcr = 0;
2002 if (mctrl & TIOCM_RTS)
2003 mcr |= UART_MCR_RTS;
2004 if (mctrl & TIOCM_DTR)
2005 mcr |= UART_MCR_DTR;
2006 if (mctrl & TIOCM_OUT1)
2007 mcr |= UART_MCR_OUT1;
2008 if (mctrl & TIOCM_OUT2)
2009 mcr |= UART_MCR_OUT2;
2010 if (mctrl & TIOCM_LOOP)
2011 mcr |= UART_MCR_LOOP;
2013 mcr = (mcr & up->mcr_mask) | up->mcr_force | up->mcr;
2015 serial_port_out(port, UART_MCR, mcr);
2017 EXPORT_SYMBOL_GPL(serial8250_do_set_mctrl);
2019 static void serial8250_set_mctrl(struct uart_port *port, unsigned int mctrl)
2021 if (port->set_mctrl)
2022 return port->set_mctrl(port, mctrl);
2023 return serial8250_do_set_mctrl(port, mctrl);
2026 static void serial8250_break_ctl(struct uart_port *port, int break_state)
2028 struct uart_8250_port *up = up_to_u8250p(port);
2029 unsigned long flags;
2031 serial8250_rpm_get(up);
2032 spin_lock_irqsave(&port->lock, flags);
2033 if (break_state == -1)
2034 up->lcr |= UART_LCR_SBC;
2036 up->lcr &= ~UART_LCR_SBC;
2037 serial_port_out(port, UART_LCR, up->lcr);
2038 spin_unlock_irqrestore(&port->lock, flags);
2039 serial8250_rpm_put(up);
2043 * Wait for transmitter & holding register to empty
2045 static void wait_for_xmitr(struct uart_8250_port *up, int bits)
2047 unsigned int status, tmout = 10000;
2049 /* Wait up to 10ms for the character(s) to be sent. */
2051 status = serial_in(up, UART_LSR);
2053 up->lsr_saved_flags |= status & LSR_SAVE_FLAGS;
2055 if ((status & bits) == bits)
2062 /* Wait up to 1s for flow control if necessary */
2063 if (up->port.flags & UPF_CONS_FLOW) {
2065 for (tmout = 1000000; tmout; tmout--) {
2066 unsigned int msr = serial_in(up, UART_MSR);
2067 up->msr_saved_flags |= msr & MSR_SAVE_FLAGS;
2068 if (msr & UART_MSR_CTS)
2071 touch_nmi_watchdog();
2076 #ifdef CONFIG_CONSOLE_POLL
2078 * Console polling routines for writing and reading from the uart while
2079 * in an interrupt or debug context.
2082 static int serial8250_get_poll_char(struct uart_port *port)
2084 struct uart_8250_port *up = up_to_u8250p(port);
2088 serial8250_rpm_get(up);
2090 lsr = serial_port_in(port, UART_LSR);
2092 if (!(lsr & UART_LSR_DR)) {
2093 status = NO_POLL_CHAR;
2097 status = serial_port_in(port, UART_RX);
2099 serial8250_rpm_put(up);
2104 static void serial8250_put_poll_char(struct uart_port *port,
2108 struct uart_8250_port *up = up_to_u8250p(port);
2110 serial8250_rpm_get(up);
2112 * First save the IER then disable the interrupts
2114 ier = serial_port_in(port, UART_IER);
2115 if (up->capabilities & UART_CAP_UUE)
2116 serial_port_out(port, UART_IER, UART_IER_UUE);
2118 serial_port_out(port, UART_IER, 0);
2120 wait_for_xmitr(up, BOTH_EMPTY);
2122 * Send the character out.
2124 serial_port_out(port, UART_TX, c);
2127 * Finally, wait for transmitter to become empty
2128 * and restore the IER
2130 wait_for_xmitr(up, BOTH_EMPTY);
2131 serial_port_out(port, UART_IER, ier);
2132 serial8250_rpm_put(up);
2135 #endif /* CONFIG_CONSOLE_POLL */
2137 int serial8250_do_startup(struct uart_port *port)
2139 struct uart_8250_port *up = up_to_u8250p(port);
2140 unsigned long flags;
2141 unsigned char lsr, iir;
2144 if (port->type == PORT_8250_CIR)
2147 if (!port->fifosize)
2148 port->fifosize = uart_config[port->type].fifo_size;
2150 up->tx_loadsz = uart_config[port->type].tx_loadsz;
2151 if (!up->capabilities)
2152 up->capabilities = uart_config[port->type].flags;
2155 if (port->iotype != up->cur_iotype)
2156 set_io_from_upio(port);
2158 serial8250_rpm_get(up);
2159 if (port->type == PORT_16C950) {
2160 /* Wake up and initialize UART */
2162 serial_port_out(port, UART_LCR, UART_LCR_CONF_MODE_B);
2163 serial_port_out(port, UART_EFR, UART_EFR_ECB);
2164 serial_port_out(port, UART_IER, 0);
2165 serial_port_out(port, UART_LCR, 0);
2166 serial_icr_write(up, UART_CSR, 0); /* Reset the UART */
2167 serial_port_out(port, UART_LCR, UART_LCR_CONF_MODE_B);
2168 serial_port_out(port, UART_EFR, UART_EFR_ECB);
2169 serial_port_out(port, UART_LCR, 0);
2172 #ifdef CONFIG_SERIAL_8250_RSA
2174 * If this is an RSA port, see if we can kick it up to the
2175 * higher speed clock.
2180 * Clear the FIFO buffers and disable them.
2181 * (they will be reenabled in set_termios())
2183 serial8250_clear_fifos(up);
2186 * Clear the interrupt registers.
2188 serial_port_in(port, UART_LSR);
2189 serial_port_in(port, UART_RX);
2190 serial_port_in(port, UART_IIR);
2191 serial_port_in(port, UART_MSR);
2194 * At this point, there's no way the LSR could still be 0xff;
2195 * if it is, then bail out, because there's likely no UART
2198 if (!(port->flags & UPF_BUGGY_UART) &&
2199 (serial_port_in(port, UART_LSR) == 0xff)) {
2200 printk_ratelimited(KERN_INFO "ttyS%d: LSR safety check engaged!\n",
2201 serial_index(port));
2207 * For a XR16C850, we need to set the trigger levels
2209 if (port->type == PORT_16850) {
2212 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
2214 fctr = serial_in(up, UART_FCTR) & ~(UART_FCTR_RX|UART_FCTR_TX);
2215 serial_port_out(port, UART_FCTR,
2216 fctr | UART_FCTR_TRGD | UART_FCTR_RX);
2217 serial_port_out(port, UART_TRG, UART_TRG_96);
2218 serial_port_out(port, UART_FCTR,
2219 fctr | UART_FCTR_TRGD | UART_FCTR_TX);
2220 serial_port_out(port, UART_TRG, UART_TRG_96);
2222 serial_port_out(port, UART_LCR, 0);
2228 * Test for UARTs that do not reassert THRE when the
2229 * transmitter is idle and the interrupt has already
2230 * been cleared. Real 16550s should always reassert
2231 * this interrupt whenever the transmitter is idle and
2232 * the interrupt is enabled. Delays are necessary to
2233 * allow register changes to become visible.
2235 spin_lock_irqsave(&port->lock, flags);
2236 if (up->port.irqflags & IRQF_SHARED)
2237 disable_irq_nosync(port->irq);
2239 wait_for_xmitr(up, UART_LSR_THRE);
2240 serial_port_out_sync(port, UART_IER, UART_IER_THRI);
2241 udelay(1); /* allow THRE to set */
2242 iir1 = serial_port_in(port, UART_IIR);
2243 serial_port_out(port, UART_IER, 0);
2244 serial_port_out_sync(port, UART_IER, UART_IER_THRI);
2245 udelay(1); /* allow a working UART time to re-assert THRE */
2246 iir = serial_port_in(port, UART_IIR);
2247 serial_port_out(port, UART_IER, 0);
2249 if (port->irqflags & IRQF_SHARED)
2250 enable_irq(port->irq);
2251 spin_unlock_irqrestore(&port->lock, flags);
2254 * If the interrupt is not reasserted, or we otherwise
2255 * don't trust the iir, setup a timer to kick the UART
2256 * on a regular basis.
2258 if ((!(iir1 & UART_IIR_NO_INT) && (iir & UART_IIR_NO_INT)) ||
2259 up->port.flags & UPF_BUG_THRE) {
2260 up->bugs |= UART_BUG_THRE;
2264 retval = up->ops->setup_irq(up);
2269 * Now, initialize the UART
2271 serial_port_out(port, UART_LCR, UART_LCR_WLEN8);
2273 spin_lock_irqsave(&port->lock, flags);
2274 if (up->port.flags & UPF_FOURPORT) {
2276 up->port.mctrl |= TIOCM_OUT1;
2279 * Most PC uarts need OUT2 raised to enable interrupts.
2282 up->port.mctrl |= TIOCM_OUT2;
2284 serial8250_set_mctrl(port, port->mctrl);
2286 /* Serial over Lan (SoL) hack:
2287 Intel 8257x Gigabit ethernet chips have a
2288 16550 emulation, to be used for Serial Over Lan.
2289 Those chips take a longer time than a normal
2290 serial device to signalize that a transmission
2291 data was queued. Due to that, the above test generally
2292 fails. One solution would be to delay the reading of
2293 iir. However, this is not reliable, since the timeout
2294 is variable. So, let's just don't test if we receive
2295 TX irq. This way, we'll never enable UART_BUG_TXEN.
2297 if (up->port.flags & UPF_NO_TXEN_TEST)
2298 goto dont_test_tx_en;
2301 * Do a quick test to see if we receive an
2302 * interrupt when we enable the TX irq.
2304 serial_port_out(port, UART_IER, UART_IER_THRI);
2305 lsr = serial_port_in(port, UART_LSR);
2306 iir = serial_port_in(port, UART_IIR);
2307 serial_port_out(port, UART_IER, 0);
2309 if (lsr & UART_LSR_TEMT && iir & UART_IIR_NO_INT) {
2310 if (!(up->bugs & UART_BUG_TXEN)) {
2311 up->bugs |= UART_BUG_TXEN;
2312 pr_debug("ttyS%d - enabling bad tx status workarounds\n",
2313 serial_index(port));
2316 up->bugs &= ~UART_BUG_TXEN;
2320 spin_unlock_irqrestore(&port->lock, flags);
2323 * Clear the interrupt registers again for luck, and clear the
2324 * saved flags to avoid getting false values from polling
2325 * routines or the previous session.
2327 serial_port_in(port, UART_LSR);
2328 serial_port_in(port, UART_RX);
2329 serial_port_in(port, UART_IIR);
2330 serial_port_in(port, UART_MSR);
2331 up->lsr_saved_flags = 0;
2332 up->msr_saved_flags = 0;
2335 * Request DMA channels for both RX and TX.
2338 retval = serial8250_request_dma(up);
2340 pr_warn_ratelimited("ttyS%d - failed to request DMA\n",
2341 serial_index(port));
2347 * Finally, enable interrupts. Note: Modem status interrupts
2348 * are set via set_termios(), which will be occurring imminently
2349 * anyway, so we don't enable them here.
2351 up->ier = UART_IER_RLSI | UART_IER_RDI;
2352 serial_port_out(port, UART_IER, up->ier);
2354 if (port->flags & UPF_FOURPORT) {
2357 * Enable interrupts on the AST Fourport board
2359 icp = (port->iobase & 0xfe0) | 0x01f;
2365 serial8250_rpm_put(up);
2368 EXPORT_SYMBOL_GPL(serial8250_do_startup);
2370 static int serial8250_startup(struct uart_port *port)
2373 return port->startup(port);
2374 return serial8250_do_startup(port);
2377 void serial8250_do_shutdown(struct uart_port *port)
2379 struct uart_8250_port *up = up_to_u8250p(port);
2380 unsigned long flags;
2382 serial8250_rpm_get(up);
2384 * Disable interrupts from this port
2387 serial_port_out(port, UART_IER, 0);
2390 serial8250_release_dma(up);
2392 spin_lock_irqsave(&port->lock, flags);
2393 if (port->flags & UPF_FOURPORT) {
2394 /* reset interrupts on the AST Fourport board */
2395 inb((port->iobase & 0xfe0) | 0x1f);
2396 port->mctrl |= TIOCM_OUT1;
2398 port->mctrl &= ~TIOCM_OUT2;
2400 serial8250_set_mctrl(port, port->mctrl);
2401 spin_unlock_irqrestore(&port->lock, flags);
2404 * Disable break condition and FIFOs
2406 serial_port_out(port, UART_LCR,
2407 serial_port_in(port, UART_LCR) & ~UART_LCR_SBC);
2408 serial8250_clear_fifos(up);
2410 #ifdef CONFIG_SERIAL_8250_RSA
2412 * Reset the RSA board back to 115kbps compat mode.
2418 * Read data port to reset things, and then unlink from
2421 serial_port_in(port, UART_RX);
2422 serial8250_rpm_put(up);
2424 up->ops->release_irq(up);
2426 EXPORT_SYMBOL_GPL(serial8250_do_shutdown);
2428 static void serial8250_shutdown(struct uart_port *port)
2431 port->shutdown(port);
2433 serial8250_do_shutdown(port);
2437 * XR17V35x UARTs have an extra fractional divisor register (DLD)
2438 * Calculate divisor with extra 4-bit fractional portion
2440 static unsigned int xr17v35x_get_divisor(struct uart_8250_port *up,
2444 struct uart_port *port = &up->port;
2445 unsigned int quot_16;
2447 quot_16 = DIV_ROUND_CLOSEST(port->uartclk, baud);
2448 *frac = quot_16 & 0x0f;
2450 return quot_16 >> 4;
2453 static unsigned int serial8250_get_divisor(struct uart_8250_port *up,
2457 struct uart_port *port = &up->port;
2461 * Handle magic divisors for baud rates above baud_base on
2462 * SMSC SuperIO chips.
2465 if ((port->flags & UPF_MAGIC_MULTIPLIER) &&
2466 baud == (port->uartclk/4))
2468 else if ((port->flags & UPF_MAGIC_MULTIPLIER) &&
2469 baud == (port->uartclk/8))
2471 else if (up->port.type == PORT_XR17V35X)
2472 quot = xr17v35x_get_divisor(up, baud, frac);
2474 quot = uart_get_divisor(port, baud);
2477 * Oxford Semi 952 rev B workaround
2479 if (up->bugs & UART_BUG_QUOT && (quot & 0xff) == 0)
2485 static unsigned char serial8250_compute_lcr(struct uart_8250_port *up,
2490 switch (c_cflag & CSIZE) {
2492 cval = UART_LCR_WLEN5;
2495 cval = UART_LCR_WLEN6;
2498 cval = UART_LCR_WLEN7;
2502 cval = UART_LCR_WLEN8;
2506 if (c_cflag & CSTOPB)
2507 cval |= UART_LCR_STOP;
2508 if (c_cflag & PARENB) {
2509 cval |= UART_LCR_PARITY;
2510 if (up->bugs & UART_BUG_PARITY)
2511 up->fifo_bug = true;
2513 if (!(c_cflag & PARODD))
2514 cval |= UART_LCR_EPAR;
2516 if (c_cflag & CMSPAR)
2517 cval |= UART_LCR_SPAR;
2523 static void serial8250_set_divisor(struct uart_port *port, unsigned int baud,
2524 unsigned int quot, unsigned int quot_frac)
2526 struct uart_8250_port *up = up_to_u8250p(port);
2528 /* Workaround to enable 115200 baud on OMAP1510 internal ports */
2529 if (is_omap1510_8250(up)) {
2530 if (baud == 115200) {
2532 serial_port_out(port, UART_OMAP_OSC_12M_SEL, 1);
2534 serial_port_out(port, UART_OMAP_OSC_12M_SEL, 0);
2538 * For NatSemi, switch to bank 2 not bank 1, to avoid resetting EXCR2,
2539 * otherwise just set DLAB
2541 if (up->capabilities & UART_NATSEMI)
2542 serial_port_out(port, UART_LCR, 0xe0);
2544 serial_port_out(port, UART_LCR, up->lcr | UART_LCR_DLAB);
2546 serial_dl_write(up, quot);
2548 /* XR17V35x UARTs have an extra fractional divisor register (DLD) */
2549 if (up->port.type == PORT_XR17V35X)
2550 serial_port_out(port, 0x2, quot_frac);
2554 serial8250_do_set_termios(struct uart_port *port, struct ktermios *termios,
2555 struct ktermios *old)
2557 struct uart_8250_port *up = up_to_u8250p(port);
2559 unsigned long flags;
2560 unsigned int baud, quot, frac = 0;
2562 cval = serial8250_compute_lcr(up, termios->c_cflag);
2565 * Ask the core to calculate the divisor for us.
2567 baud = uart_get_baud_rate(port, termios, old,
2568 port->uartclk / 16 / 0xffff,
2569 port->uartclk / 16);
2570 quot = serial8250_get_divisor(up, baud, &frac);
2573 * Ok, we're now changing the port state. Do it with
2574 * interrupts disabled.
2576 serial8250_rpm_get(up);
2577 spin_lock_irqsave(&port->lock, flags);
2579 up->lcr = cval; /* Save computed LCR */
2581 if (up->capabilities & UART_CAP_FIFO && port->fifosize > 1) {
2582 /* NOTE: If fifo_bug is not set, a user can set RX_trigger. */
2583 if ((baud < 2400 && !up->dma) || up->fifo_bug) {
2584 up->fcr &= ~UART_FCR_TRIGGER_MASK;
2585 up->fcr |= UART_FCR_TRIGGER_1;
2590 * MCR-based auto flow control. When AFE is enabled, RTS will be
2591 * deasserted when the receive FIFO contains more characters than
2592 * the trigger, or the MCR RTS bit is cleared. In the case where
2593 * the remote UART is not using CTS auto flow control, we must
2594 * have sufficient FIFO entries for the latency of the remote
2595 * UART to respond. IOW, at least 32 bytes of FIFO.
2597 if (up->capabilities & UART_CAP_AFE && port->fifosize >= 32) {
2598 up->mcr &= ~UART_MCR_AFE;
2599 if (termios->c_cflag & CRTSCTS)
2600 up->mcr |= UART_MCR_AFE;
2604 * Update the per-port timeout.
2606 uart_update_timeout(port, termios->c_cflag, baud);
2608 port->read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
2609 if (termios->c_iflag & INPCK)
2610 port->read_status_mask |= UART_LSR_FE | UART_LSR_PE;
2611 if (termios->c_iflag & (IGNBRK | BRKINT | PARMRK))
2612 port->read_status_mask |= UART_LSR_BI;
2615 * Characteres to ignore
2617 port->ignore_status_mask = 0;
2618 if (termios->c_iflag & IGNPAR)
2619 port->ignore_status_mask |= UART_LSR_PE | UART_LSR_FE;
2620 if (termios->c_iflag & IGNBRK) {
2621 port->ignore_status_mask |= UART_LSR_BI;
2623 * If we're ignoring parity and break indicators,
2624 * ignore overruns too (for real raw support).
2626 if (termios->c_iflag & IGNPAR)
2627 port->ignore_status_mask |= UART_LSR_OE;
2631 * ignore all characters if CREAD is not set
2633 if ((termios->c_cflag & CREAD) == 0)
2634 port->ignore_status_mask |= UART_LSR_DR;
2637 * CTS flow control flag and modem status interrupts
2639 up->ier &= ~UART_IER_MSI;
2640 if (!(up->bugs & UART_BUG_NOMSR) &&
2641 UART_ENABLE_MS(&up->port, termios->c_cflag))
2642 up->ier |= UART_IER_MSI;
2643 if (up->capabilities & UART_CAP_UUE)
2644 up->ier |= UART_IER_UUE;
2645 if (up->capabilities & UART_CAP_RTOIE)
2646 up->ier |= UART_IER_RTOIE;
2648 serial_port_out(port, UART_IER, up->ier);
2650 if (up->capabilities & UART_CAP_EFR) {
2651 unsigned char efr = 0;
2653 * TI16C752/Startech hardware flow control. FIXME:
2654 * - TI16C752 requires control thresholds to be set.
2655 * - UART_MCR_RTS is ineffective if auto-RTS mode is enabled.
2657 if (termios->c_cflag & CRTSCTS)
2658 efr |= UART_EFR_CTS;
2660 serial_port_out(port, UART_LCR, UART_LCR_CONF_MODE_B);
2661 if (port->flags & UPF_EXAR_EFR)
2662 serial_port_out(port, UART_XR_EFR, efr);
2664 serial_port_out(port, UART_EFR, efr);
2667 serial8250_set_divisor(port, baud, quot, frac);
2670 * LCR DLAB must be set to enable 64-byte FIFO mode. If the FCR
2671 * is written without DLAB set, this mode will be disabled.
2673 if (port->type == PORT_16750)
2674 serial_port_out(port, UART_FCR, up->fcr);
2676 serial_port_out(port, UART_LCR, up->lcr); /* reset DLAB */
2677 if (port->type != PORT_16750) {
2678 /* emulated UARTs (Lucent Venus 167x) need two steps */
2679 if (up->fcr & UART_FCR_ENABLE_FIFO)
2680 serial_port_out(port, UART_FCR, UART_FCR_ENABLE_FIFO);
2681 serial_port_out(port, UART_FCR, up->fcr); /* set fcr */
2683 serial8250_set_mctrl(port, port->mctrl);
2684 spin_unlock_irqrestore(&port->lock, flags);
2685 serial8250_rpm_put(up);
2687 /* Don't rewrite B0 */
2688 if (tty_termios_baud_rate(termios))
2689 tty_termios_encode_baud_rate(termios, baud, baud);
2691 EXPORT_SYMBOL(serial8250_do_set_termios);
2694 serial8250_set_termios(struct uart_port *port, struct ktermios *termios,
2695 struct ktermios *old)
2697 if (port->set_termios)
2698 port->set_termios(port, termios, old);
2700 serial8250_do_set_termios(port, termios, old);
2704 serial8250_set_ldisc(struct uart_port *port, struct ktermios *termios)
2706 if (termios->c_line == N_PPS) {
2707 port->flags |= UPF_HARDPPS_CD;
2708 spin_lock_irq(&port->lock);
2709 serial8250_enable_ms(port);
2710 spin_unlock_irq(&port->lock);
2712 port->flags &= ~UPF_HARDPPS_CD;
2713 if (!UART_ENABLE_MS(port, termios->c_cflag)) {
2714 spin_lock_irq(&port->lock);
2715 serial8250_disable_ms(port);
2716 spin_unlock_irq(&port->lock);
2722 void serial8250_do_pm(struct uart_port *port, unsigned int state,
2723 unsigned int oldstate)
2725 struct uart_8250_port *p = up_to_u8250p(port);
2727 serial8250_set_sleep(p, state != 0);
2729 EXPORT_SYMBOL(serial8250_do_pm);
2732 serial8250_pm(struct uart_port *port, unsigned int state,
2733 unsigned int oldstate)
2736 port->pm(port, state, oldstate);
2738 serial8250_do_pm(port, state, oldstate);
2741 static unsigned int serial8250_port_size(struct uart_8250_port *pt)
2743 if (pt->port.mapsize)
2744 return pt->port.mapsize;
2745 if (pt->port.iotype == UPIO_AU) {
2746 if (pt->port.type == PORT_RT2880)
2750 if (is_omap1_8250(pt))
2751 return 0x16 << pt->port.regshift;
2753 return 8 << pt->port.regshift;
2757 * Resource handling.
2759 static int serial8250_request_std_resource(struct uart_8250_port *up)
2761 unsigned int size = serial8250_port_size(up);
2762 struct uart_port *port = &up->port;
2765 switch (port->iotype) {
2774 if (!request_mem_region(port->mapbase, size, "serial")) {
2779 if (port->flags & UPF_IOREMAP) {
2780 port->membase = ioremap_nocache(port->mapbase, size);
2781 if (!port->membase) {
2782 release_mem_region(port->mapbase, size);
2790 if (!request_region(port->iobase, size, "serial"))
2797 static void serial8250_release_std_resource(struct uart_8250_port *up)
2799 unsigned int size = serial8250_port_size(up);
2800 struct uart_port *port = &up->port;
2802 switch (port->iotype) {
2811 if (port->flags & UPF_IOREMAP) {
2812 iounmap(port->membase);
2813 port->membase = NULL;
2816 release_mem_region(port->mapbase, size);
2821 release_region(port->iobase, size);
2826 #ifdef CONFIG_SERIAL_8250_RSA
2827 static int serial8250_request_rsa_resource(struct uart_8250_port *up)
2829 unsigned long start = UART_RSA_BASE << up->port.regshift;
2830 unsigned int size = 8 << up->port.regshift;
2831 struct uart_port *port = &up->port;
2834 switch (port->iotype) {
2837 start += port->iobase;
2838 if (request_region(start, size, "serial-rsa"))
2848 static void serial8250_release_rsa_resource(struct uart_8250_port *up)
2850 unsigned long offset = UART_RSA_BASE << up->port.regshift;
2851 unsigned int size = 8 << up->port.regshift;
2852 struct uart_port *port = &up->port;
2854 switch (port->iotype) {
2857 release_region(port->iobase + offset, size);
2863 static void serial8250_release_port(struct uart_port *port)
2865 struct uart_8250_port *up = up_to_u8250p(port);
2867 serial8250_release_std_resource(up);
2870 static int serial8250_request_port(struct uart_port *port)
2872 struct uart_8250_port *up = up_to_u8250p(port);
2875 if (port->type == PORT_8250_CIR)
2878 ret = serial8250_request_std_resource(up);
2883 static int fcr_get_rxtrig_bytes(struct uart_8250_port *up)
2885 const struct serial8250_config *conf_type = &uart_config[up->port.type];
2886 unsigned char bytes;
2888 bytes = conf_type->rxtrig_bytes[UART_FCR_R_TRIG_BITS(up->fcr)];
2890 return bytes ? bytes : -EOPNOTSUPP;
2893 static int bytes_to_fcr_rxtrig(struct uart_8250_port *up, unsigned char bytes)
2895 const struct serial8250_config *conf_type = &uart_config[up->port.type];
2898 if (!conf_type->rxtrig_bytes[UART_FCR_R_TRIG_BITS(UART_FCR_R_TRIG_00)])
2901 for (i = 1; i < UART_FCR_R_TRIG_MAX_STATE; i++) {
2902 if (bytes < conf_type->rxtrig_bytes[i])
2903 /* Use the nearest lower value */
2904 return (--i) << UART_FCR_R_TRIG_SHIFT;
2907 return UART_FCR_R_TRIG_11;
2910 static int do_get_rxtrig(struct tty_port *port)
2912 struct uart_state *state = container_of(port, struct uart_state, port);
2913 struct uart_port *uport = state->uart_port;
2914 struct uart_8250_port *up =
2915 container_of(uport, struct uart_8250_port, port);
2917 if (!(up->capabilities & UART_CAP_FIFO) || uport->fifosize <= 1)
2920 return fcr_get_rxtrig_bytes(up);
2923 static int do_serial8250_get_rxtrig(struct tty_port *port)
2927 mutex_lock(&port->mutex);
2928 rxtrig_bytes = do_get_rxtrig(port);
2929 mutex_unlock(&port->mutex);
2931 return rxtrig_bytes;
2934 static ssize_t serial8250_get_attr_rx_trig_bytes(struct device *dev,
2935 struct device_attribute *attr, char *buf)
2937 struct tty_port *port = dev_get_drvdata(dev);
2940 rxtrig_bytes = do_serial8250_get_rxtrig(port);
2941 if (rxtrig_bytes < 0)
2942 return rxtrig_bytes;
2944 return snprintf(buf, PAGE_SIZE, "%d\n", rxtrig_bytes);
2947 static int do_set_rxtrig(struct tty_port *port, unsigned char bytes)
2949 struct uart_state *state = container_of(port, struct uart_state, port);
2950 struct uart_port *uport = state->uart_port;
2951 struct uart_8250_port *up =
2952 container_of(uport, struct uart_8250_port, port);
2955 if (!(up->capabilities & UART_CAP_FIFO) || uport->fifosize <= 1 ||
2959 rxtrig = bytes_to_fcr_rxtrig(up, bytes);
2963 serial8250_clear_fifos(up);
2964 up->fcr &= ~UART_FCR_TRIGGER_MASK;
2965 up->fcr |= (unsigned char)rxtrig;
2966 serial_out(up, UART_FCR, up->fcr);
2970 static int do_serial8250_set_rxtrig(struct tty_port *port, unsigned char bytes)
2974 mutex_lock(&port->mutex);
2975 ret = do_set_rxtrig(port, bytes);
2976 mutex_unlock(&port->mutex);
2981 static ssize_t serial8250_set_attr_rx_trig_bytes(struct device *dev,
2982 struct device_attribute *attr, const char *buf, size_t count)
2984 struct tty_port *port = dev_get_drvdata(dev);
2985 unsigned char bytes;
2991 ret = kstrtou8(buf, 10, &bytes);
2995 ret = do_serial8250_set_rxtrig(port, bytes);
3002 static DEVICE_ATTR(rx_trig_bytes, S_IRUSR | S_IWUSR | S_IRGRP,
3003 serial8250_get_attr_rx_trig_bytes,
3004 serial8250_set_attr_rx_trig_bytes);
3006 static struct attribute *serial8250_dev_attrs[] = {
3007 &dev_attr_rx_trig_bytes.attr,
3011 static struct attribute_group serial8250_dev_attr_group = {
3012 .attrs = serial8250_dev_attrs,
3015 static void register_dev_spec_attr_grp(struct uart_8250_port *up)
3017 const struct serial8250_config *conf_type = &uart_config[up->port.type];
3019 if (conf_type->rxtrig_bytes[0])
3020 up->port.attr_group = &serial8250_dev_attr_group;
3023 static void serial8250_config_port(struct uart_port *port, int flags)
3025 struct uart_8250_port *up = up_to_u8250p(port);
3028 if (port->type == PORT_8250_CIR)
3032 * Find the region that we can probe for. This in turn
3033 * tells us whether we can probe for the type of port.
3035 ret = serial8250_request_std_resource(up);
3039 if (port->iotype != up->cur_iotype)
3040 set_io_from_upio(port);
3042 if (flags & UART_CONFIG_TYPE)
3045 /* if access method is AU, it is a 16550 with a quirk */
3046 if (port->type == PORT_16550A && port->iotype == UPIO_AU)
3047 up->bugs |= UART_BUG_NOMSR;
3049 /* HW bugs may trigger IRQ while IIR == NO_INT */
3050 if (port->type == PORT_TEGRA)
3051 up->bugs |= UART_BUG_NOMSR;
3053 if (port->type != PORT_UNKNOWN && flags & UART_CONFIG_IRQ)
3056 if (port->type == PORT_UNKNOWN)
3057 serial8250_release_std_resource(up);
3059 /* Fixme: probably not the best place for this */
3060 if ((port->type == PORT_XR17V35X) ||
3061 (port->type == PORT_XR17D15X))
3062 port->handle_irq = exar_handle_irq;
3064 register_dev_spec_attr_grp(up);
3065 up->fcr = uart_config[up->port.type].fcr;
3069 serial8250_verify_port(struct uart_port *port, struct serial_struct *ser)
3071 if (ser->irq >= nr_irqs || ser->irq < 0 ||
3072 ser->baud_base < 9600 || ser->type < PORT_UNKNOWN ||
3073 ser->type >= ARRAY_SIZE(uart_config) || ser->type == PORT_CIRRUS ||
3074 ser->type == PORT_STARTECH)
3080 serial8250_type(struct uart_port *port)
3082 int type = port->type;
3084 if (type >= ARRAY_SIZE(uart_config))
3086 return uart_config[type].name;
3089 static const struct uart_ops serial8250_pops = {
3090 .tx_empty = serial8250_tx_empty,
3091 .set_mctrl = serial8250_set_mctrl,
3092 .get_mctrl = serial8250_get_mctrl,
3093 .stop_tx = serial8250_stop_tx,
3094 .start_tx = serial8250_start_tx,
3095 .throttle = serial8250_throttle,
3096 .unthrottle = serial8250_unthrottle,
3097 .stop_rx = serial8250_stop_rx,
3098 .enable_ms = serial8250_enable_ms,
3099 .break_ctl = serial8250_break_ctl,
3100 .startup = serial8250_startup,
3101 .shutdown = serial8250_shutdown,
3102 .set_termios = serial8250_set_termios,
3103 .set_ldisc = serial8250_set_ldisc,
3104 .pm = serial8250_pm,
3105 .type = serial8250_type,
3106 .release_port = serial8250_release_port,
3107 .request_port = serial8250_request_port,
3108 .config_port = serial8250_config_port,
3109 .verify_port = serial8250_verify_port,
3110 #ifdef CONFIG_CONSOLE_POLL
3111 .poll_get_char = serial8250_get_poll_char,
3112 .poll_put_char = serial8250_put_poll_char,
3116 static const struct uart_ops *base_ops;
3117 static struct uart_ops univ8250_port_ops;
3119 static const struct uart_8250_ops univ8250_driver_ops = {
3120 .setup_irq = univ8250_setup_irq,
3121 .release_irq = univ8250_release_irq,
3124 static struct uart_8250_port serial8250_ports[UART_NR];
3127 * serial8250_get_port - retrieve struct uart_8250_port
3128 * @line: serial line number
3130 * This function retrieves struct uart_8250_port for the specific line.
3131 * This struct *must* *not* be used to perform a 8250 or serial core operation
3132 * which is not accessible otherwise. Its only purpose is to make the struct
3133 * accessible to the runtime-pm callbacks for context suspend/restore.
3134 * The lock assumption made here is none because runtime-pm suspend/resume
3135 * callbacks should not be invoked if there is any operation performed on the
3138 struct uart_8250_port *serial8250_get_port(int line)
3140 return &serial8250_ports[line];
3142 EXPORT_SYMBOL_GPL(serial8250_get_port);
3144 static void (*serial8250_isa_config)(int port, struct uart_port *up,
3145 unsigned short *capabilities);
3147 void serial8250_set_isa_configurator(
3148 void (*v)(int port, struct uart_port *up, unsigned short *capabilities))
3150 serial8250_isa_config = v;
3152 EXPORT_SYMBOL(serial8250_set_isa_configurator);
3154 static void serial8250_init_port(struct uart_8250_port *up)
3156 struct uart_port *port = &up->port;
3158 spin_lock_init(&port->lock);
3159 port->ops = &serial8250_pops;
3161 up->cur_iotype = 0xFF;
3164 static void serial8250_set_defaults(struct uart_8250_port *up)
3166 struct uart_port *port = &up->port;
3168 if (up->port.flags & UPF_FIXED_TYPE) {
3169 unsigned int type = up->port.type;
3171 if (!up->port.fifosize)
3172 up->port.fifosize = uart_config[type].fifo_size;
3174 up->tx_loadsz = uart_config[type].tx_loadsz;
3175 if (!up->capabilities)
3176 up->capabilities = uart_config[type].flags;
3179 set_io_from_upio(port);
3181 /* default dma handlers */
3183 if (!up->dma->tx_dma)
3184 up->dma->tx_dma = serial8250_tx_dma;
3185 if (!up->dma->rx_dma)
3186 up->dma->rx_dma = serial8250_rx_dma;
3190 #ifdef CONFIG_SERIAL_8250_RSA
3192 static void univ8250_config_port(struct uart_port *port, int flags)
3194 struct uart_8250_port *up = up_to_u8250p(port);
3196 up->probe &= ~UART_PROBE_RSA;
3197 if (port->type == PORT_RSA) {
3198 if (serial8250_request_rsa_resource(up) == 0)
3199 up->probe |= UART_PROBE_RSA;
3200 } else if (flags & UART_CONFIG_TYPE) {
3203 for (i = 0; i < probe_rsa_count; i++) {
3204 if (probe_rsa[i] == up->port.iobase) {
3205 if (serial8250_request_rsa_resource(up) == 0)
3206 up->probe |= UART_PROBE_RSA;
3212 base_ops->config_port(port, flags);
3214 if (port->type != PORT_RSA && up->probe & UART_PROBE_RSA)
3215 serial8250_release_rsa_resource(up);
3218 static int univ8250_request_port(struct uart_port *port)
3220 struct uart_8250_port *up = up_to_u8250p(port);
3223 ret = base_ops->request_port(port);
3224 if (ret == 0 && port->type == PORT_RSA) {
3225 ret = serial8250_request_rsa_resource(up);
3227 base_ops->release_port(port);
3233 static void univ8250_release_port(struct uart_port *port)
3235 struct uart_8250_port *up = up_to_u8250p(port);
3237 if (port->type == PORT_RSA)
3238 serial8250_release_rsa_resource(up);
3239 base_ops->release_port(port);
3242 static void univ8250_rsa_support(struct uart_ops *ops)
3244 ops->config_port = univ8250_config_port;
3245 ops->request_port = univ8250_request_port;
3246 ops->release_port = univ8250_release_port;
3250 #define univ8250_rsa_support(x) do { } while (0)
3251 #endif /* CONFIG_SERIAL_8250_RSA */
3253 static void __init serial8250_isa_init_ports(void)
3255 struct uart_8250_port *up;
3256 static int first = 1;
3263 if (nr_uarts > UART_NR)
3266 for (i = 0; i < nr_uarts; i++) {
3267 struct uart_8250_port *up = &serial8250_ports[i];
3268 struct uart_port *port = &up->port;
3271 serial8250_init_port(up);
3273 base_ops = port->ops;
3274 port->ops = &univ8250_port_ops;
3276 init_timer(&up->timer);
3277 up->timer.function = serial8250_timeout;
3279 up->ops = &univ8250_driver_ops;
3282 * ALPHA_KLUDGE_MCR needs to be killed.
3284 up->mcr_mask = ~ALPHA_KLUDGE_MCR;
3285 up->mcr_force = ALPHA_KLUDGE_MCR;
3288 /* chain base port ops to support Remote Supervisor Adapter */
3289 univ8250_port_ops = *base_ops;
3290 univ8250_rsa_support(&univ8250_port_ops);
3293 irqflag = IRQF_SHARED;
3295 for (i = 0, up = serial8250_ports;
3296 i < ARRAY_SIZE(old_serial_port) && i < nr_uarts;
3298 struct uart_port *port = &up->port;
3300 port->iobase = old_serial_port[i].port;
3301 port->irq = irq_canonicalize(old_serial_port[i].irq);
3302 port->irqflags = old_serial_port[i].irqflags;
3303 port->uartclk = old_serial_port[i].baud_base * 16;
3304 port->flags = old_serial_port[i].flags;
3305 port->hub6 = old_serial_port[i].hub6;
3306 port->membase = old_serial_port[i].iomem_base;
3307 port->iotype = old_serial_port[i].io_type;
3308 port->regshift = old_serial_port[i].iomem_reg_shift;
3309 serial8250_set_defaults(up);
3311 port->irqflags |= irqflag;
3312 if (serial8250_isa_config != NULL)
3313 serial8250_isa_config(i, &up->port, &up->capabilities);
3318 serial8250_register_ports(struct uart_driver *drv, struct device *dev)
3322 for (i = 0; i < nr_uarts; i++) {
3323 struct uart_8250_port *up = &serial8250_ports[i];
3331 up->port.flags |= UPF_NO_TXEN_TEST;
3333 uart_add_one_port(drv, &up->port);
3337 #ifdef CONFIG_SERIAL_8250_CONSOLE
3339 static void serial8250_console_putchar(struct uart_port *port, int ch)
3341 struct uart_8250_port *up = up_to_u8250p(port);
3343 wait_for_xmitr(up, UART_LSR_THRE);
3344 serial_port_out(port, UART_TX, ch);
3348 * Print a string to the serial port trying not to disturb
3349 * any possible real use of the port...
3351 * The console_lock must be held when we get here.
3353 static void serial8250_console_write(struct uart_8250_port *up, const char *s,
3356 struct uart_port *port = &up->port;
3357 unsigned long flags;
3361 touch_nmi_watchdog();
3363 serial8250_rpm_get(up);
3367 else if (oops_in_progress)
3368 locked = spin_trylock_irqsave(&port->lock, flags);
3370 spin_lock_irqsave(&port->lock, flags);
3373 * First save the IER then disable the interrupts
3375 ier = serial_port_in(port, UART_IER);
3377 if (up->capabilities & UART_CAP_UUE)
3378 serial_port_out(port, UART_IER, UART_IER_UUE);
3380 serial_port_out(port, UART_IER, 0);
3382 /* check scratch reg to see if port powered off during system sleep */
3383 if (up->canary && (up->canary != serial_port_in(port, UART_SCR))) {
3384 struct ktermios termios;
3385 unsigned int baud, quot, frac = 0;
3387 termios.c_cflag = port->cons->cflag;
3388 if (port->state->port.tty && termios.c_cflag == 0)
3389 termios.c_cflag = port->state->port.tty->termios.c_cflag;
3391 baud = uart_get_baud_rate(port, &termios, NULL,
3392 port->uartclk / 16 / 0xffff,
3393 port->uartclk / 16);
3394 quot = serial8250_get_divisor(up, baud, &frac);
3396 serial8250_set_divisor(port, baud, quot, frac);
3397 serial_port_out(port, UART_LCR, up->lcr);
3398 serial_port_out(port, UART_MCR, UART_MCR_DTR | UART_MCR_RTS);
3403 uart_console_write(port, s, count, serial8250_console_putchar);
3406 * Finally, wait for transmitter to become empty
3407 * and restore the IER
3409 wait_for_xmitr(up, BOTH_EMPTY);
3410 serial_port_out(port, UART_IER, ier);
3413 * The receive handling will happen properly because the
3414 * receive ready bit will still be set; it is not cleared
3415 * on read. However, modem control will not, we must
3416 * call it if we have saved something in the saved flags
3417 * while processing with interrupts off.
3419 if (up->msr_saved_flags)
3420 serial8250_modem_status(up);
3423 spin_unlock_irqrestore(&port->lock, flags);
3424 serial8250_rpm_put(up);
3427 static void univ8250_console_write(struct console *co, const char *s,
3430 struct uart_8250_port *up = &serial8250_ports[co->index];
3432 serial8250_console_write(up, s, count);
3435 static unsigned int probe_baud(struct uart_port *port)
3437 unsigned char lcr, dll, dlm;
3440 lcr = serial_port_in(port, UART_LCR);
3441 serial_port_out(port, UART_LCR, lcr | UART_LCR_DLAB);
3442 dll = serial_port_in(port, UART_DLL);
3443 dlm = serial_port_in(port, UART_DLM);
3444 serial_port_out(port, UART_LCR, lcr);
3446 quot = (dlm << 8) | dll;
3447 return (port->uartclk / 16) / quot;
3450 static int serial8250_console_setup(struct uart_port *port, char *options, bool probe)
3457 if (!port->iobase && !port->membase)
3461 uart_parse_options(options, &baud, &parity, &bits, &flow);
3463 baud = probe_baud(port);
3465 return uart_set_options(port, port->cons, baud, parity, bits, flow);
3468 static int univ8250_console_setup(struct console *co, char *options)
3470 struct uart_port *port;
3473 * Check whether an invalid uart number has been specified, and
3474 * if so, search for the first available port that does have
3477 if (co->index >= nr_uarts)
3479 port = &serial8250_ports[co->index].port;
3480 /* link port to console */
3483 return serial8250_console_setup(port, options, false);
3487 * univ8250_console_match - non-standard console matching
3488 * @co: registering console
3489 * @name: name from console command line
3490 * @idx: index from console command line
3491 * @options: ptr to option string from console command line
3493 * Only attempts to match console command lines of the form:
3494 * console=uart[8250],io|mmio|mmio32,<addr>[,<options>]
3495 * console=uart[8250],0x<addr>[,<options>]
3496 * This form is used to register an initial earlycon boot console and
3497 * replace it with the serial8250_console at 8250 driver init.
3499 * Performs console setup for a match (as required by interface)
3500 * If no <options> are specified, then assume the h/w is already setup.
3502 * Returns 0 if console matches; otherwise non-zero to use default matching
3504 static int univ8250_console_match(struct console *co, char *name, int idx,
3507 char match[] = "uart"; /* 8250-specific earlycon name */
3508 unsigned char iotype;
3512 if (strncmp(name, match, 4) != 0)
3515 if (uart_parse_earlycon(options, &iotype, &addr, &options))
3518 /* try to match the port specified on the command line */
3519 for (i = 0; i < nr_uarts; i++) {
3520 struct uart_port *port = &serial8250_ports[i].port;
3522 if (port->iotype != iotype)
3524 if ((iotype == UPIO_MEM || iotype == UPIO_MEM32) &&
3525 (port->mapbase != addr))
3527 if (iotype == UPIO_PORT && port->iobase != addr)
3532 return serial8250_console_setup(port, options, true);
3538 static struct console univ8250_console = {
3540 .write = univ8250_console_write,
3541 .device = uart_console_device,
3542 .setup = univ8250_console_setup,
3543 .match = univ8250_console_match,
3544 .flags = CON_PRINTBUFFER | CON_ANYTIME,
3546 .data = &serial8250_reg,
3549 static int __init univ8250_console_init(void)
3551 serial8250_isa_init_ports();
3552 register_console(&univ8250_console);
3555 console_initcall(univ8250_console_init);
3557 #define SERIAL8250_CONSOLE &univ8250_console
3559 #define SERIAL8250_CONSOLE NULL
3562 static struct uart_driver serial8250_reg = {
3563 .owner = THIS_MODULE,
3564 .driver_name = "serial",
3568 .cons = SERIAL8250_CONSOLE,
3572 * early_serial_setup - early registration for 8250 ports
3574 * Setup an 8250 port structure prior to console initialisation. Use
3575 * after console initialisation will cause undefined behaviour.
3577 int __init early_serial_setup(struct uart_port *port)
3579 struct uart_port *p;
3581 if (port->line >= ARRAY_SIZE(serial8250_ports))
3584 serial8250_isa_init_ports();
3585 p = &serial8250_ports[port->line].port;
3586 p->iobase = port->iobase;
3587 p->membase = port->membase;
3589 p->irqflags = port->irqflags;
3590 p->uartclk = port->uartclk;
3591 p->fifosize = port->fifosize;
3592 p->regshift = port->regshift;
3593 p->iotype = port->iotype;
3594 p->flags = port->flags;
3595 p->mapbase = port->mapbase;
3596 p->mapsize = port->mapsize;
3597 p->private_data = port->private_data;
3598 p->type = port->type;
3599 p->line = port->line;
3601 serial8250_set_defaults(up_to_u8250p(p));
3603 if (port->serial_in)
3604 p->serial_in = port->serial_in;
3605 if (port->serial_out)
3606 p->serial_out = port->serial_out;
3607 if (port->handle_irq)
3608 p->handle_irq = port->handle_irq;
3614 * serial8250_suspend_port - suspend one serial port
3615 * @line: serial line number
3617 * Suspend one serial port.
3619 void serial8250_suspend_port(int line)
3621 struct uart_8250_port *up = &serial8250_ports[line];
3622 struct uart_port *port = &up->port;
3624 if (!console_suspend_enabled && uart_console(port) &&
3625 port->type != PORT_8250) {
3626 unsigned char canary = 0xa5;
3627 serial_out(up, UART_SCR, canary);
3628 if (serial_in(up, UART_SCR) == canary)
3629 up->canary = canary;
3632 uart_suspend_port(&serial8250_reg, port);
3636 * serial8250_resume_port - resume one serial port
3637 * @line: serial line number
3639 * Resume one serial port.
3641 void serial8250_resume_port(int line)
3643 struct uart_8250_port *up = &serial8250_ports[line];
3644 struct uart_port *port = &up->port;
3648 if (up->capabilities & UART_NATSEMI) {
3649 /* Ensure it's still in high speed mode */
3650 serial_port_out(port, UART_LCR, 0xE0);
3652 ns16550a_goto_highspeed(up);
3654 serial_port_out(port, UART_LCR, 0);
3655 port->uartclk = 921600*16;
3657 uart_resume_port(&serial8250_reg, port);
3661 * Register a set of serial devices attached to a platform device. The
3662 * list is terminated with a zero flags entry, which means we expect
3663 * all entries to have at least UPF_BOOT_AUTOCONF set.
3665 static int serial8250_probe(struct platform_device *dev)
3667 struct plat_serial8250_port *p = dev_get_platdata(&dev->dev);
3668 struct uart_8250_port uart;
3669 int ret, i, irqflag = 0;
3671 memset(&uart, 0, sizeof(uart));
3674 irqflag = IRQF_SHARED;
3676 for (i = 0; p && p->flags != 0; p++, i++) {
3677 uart.port.iobase = p->iobase;
3678 uart.port.membase = p->membase;
3679 uart.port.irq = p->irq;
3680 uart.port.irqflags = p->irqflags;
3681 uart.port.uartclk = p->uartclk;
3682 uart.port.regshift = p->regshift;
3683 uart.port.iotype = p->iotype;
3684 uart.port.flags = p->flags;
3685 uart.port.mapbase = p->mapbase;
3686 uart.port.hub6 = p->hub6;
3687 uart.port.private_data = p->private_data;
3688 uart.port.type = p->type;
3689 uart.port.serial_in = p->serial_in;
3690 uart.port.serial_out = p->serial_out;
3691 uart.port.handle_irq = p->handle_irq;
3692 uart.port.handle_break = p->handle_break;
3693 uart.port.set_termios = p->set_termios;
3694 uart.port.pm = p->pm;
3695 uart.port.dev = &dev->dev;
3696 uart.port.irqflags |= irqflag;
3697 ret = serial8250_register_8250_port(&uart);
3699 dev_err(&dev->dev, "unable to register port at index %d "
3700 "(IO%lx MEM%llx IRQ%d): %d\n", i,
3701 p->iobase, (unsigned long long)p->mapbase,
3709 * Remove serial ports registered against a platform device.
3711 static int serial8250_remove(struct platform_device *dev)
3715 for (i = 0; i < nr_uarts; i++) {
3716 struct uart_8250_port *up = &serial8250_ports[i];
3718 if (up->port.dev == &dev->dev)
3719 serial8250_unregister_port(i);
3724 static int serial8250_suspend(struct platform_device *dev, pm_message_t state)
3728 for (i = 0; i < UART_NR; i++) {
3729 struct uart_8250_port *up = &serial8250_ports[i];
3731 if (up->port.type != PORT_UNKNOWN && up->port.dev == &dev->dev)
3732 uart_suspend_port(&serial8250_reg, &up->port);
3738 static int serial8250_resume(struct platform_device *dev)
3742 for (i = 0; i < UART_NR; i++) {
3743 struct uart_8250_port *up = &serial8250_ports[i];
3745 if (up->port.type != PORT_UNKNOWN && up->port.dev == &dev->dev)
3746 serial8250_resume_port(i);
3752 static struct platform_driver serial8250_isa_driver = {
3753 .probe = serial8250_probe,
3754 .remove = serial8250_remove,
3755 .suspend = serial8250_suspend,
3756 .resume = serial8250_resume,
3758 .name = "serial8250",
3763 * This "device" covers _all_ ISA 8250-compatible serial devices listed
3764 * in the table in include/asm/serial.h
3766 static struct platform_device *serial8250_isa_devs;
3769 * serial8250_register_8250_port and serial8250_unregister_port allows for
3770 * 16x50 serial ports to be configured at run-time, to support PCMCIA
3771 * modems and PCI multiport cards.
3773 static DEFINE_MUTEX(serial_mutex);
3775 static struct uart_8250_port *serial8250_find_match_or_unused(struct uart_port *port)
3780 * First, find a port entry which matches.
3782 for (i = 0; i < nr_uarts; i++)
3783 if (uart_match_port(&serial8250_ports[i].port, port))
3784 return &serial8250_ports[i];
3786 /* try line number first if still available */
3788 if (i < nr_uarts && serial8250_ports[i].port.type == PORT_UNKNOWN &&
3789 serial8250_ports[i].port.iobase == 0)
3790 return &serial8250_ports[i];
3792 * We didn't find a matching entry, so look for the first
3793 * free entry. We look for one which hasn't been previously
3794 * used (indicated by zero iobase).
3796 for (i = 0; i < nr_uarts; i++)
3797 if (serial8250_ports[i].port.type == PORT_UNKNOWN &&
3798 serial8250_ports[i].port.iobase == 0)
3799 return &serial8250_ports[i];
3802 * That also failed. Last resort is to find any entry which
3803 * doesn't have a real port associated with it.
3805 for (i = 0; i < nr_uarts; i++)
3806 if (serial8250_ports[i].port.type == PORT_UNKNOWN)
3807 return &serial8250_ports[i];
3813 * serial8250_register_8250_port - register a serial port
3814 * @up: serial port template
3816 * Configure the serial port specified by the request. If the
3817 * port exists and is in use, it is hung up and unregistered
3820 * The port is then probed and if necessary the IRQ is autodetected
3821 * If this fails an error is returned.
3823 * On success the port is ready to use and the line number is returned.
3825 int serial8250_register_8250_port(struct uart_8250_port *up)
3827 struct uart_8250_port *uart;
3830 if (up->port.uartclk == 0)
3833 mutex_lock(&serial_mutex);
3835 uart = serial8250_find_match_or_unused(&up->port);
3836 if (uart && uart->port.type != PORT_8250_CIR) {
3838 uart_remove_one_port(&serial8250_reg, &uart->port);
3840 uart->port.iobase = up->port.iobase;
3841 uart->port.membase = up->port.membase;
3842 uart->port.irq = up->port.irq;
3843 uart->port.irqflags = up->port.irqflags;
3844 uart->port.uartclk = up->port.uartclk;
3845 uart->port.fifosize = up->port.fifosize;
3846 uart->port.regshift = up->port.regshift;
3847 uart->port.iotype = up->port.iotype;
3848 uart->port.flags = up->port.flags | UPF_BOOT_AUTOCONF;
3849 uart->bugs = up->bugs;
3850 uart->port.mapbase = up->port.mapbase;
3851 uart->port.mapsize = up->port.mapsize;
3852 uart->port.private_data = up->port.private_data;
3853 uart->port.fifosize = up->port.fifosize;
3854 uart->tx_loadsz = up->tx_loadsz;
3855 uart->capabilities = up->capabilities;
3856 uart->port.throttle = up->port.throttle;
3857 uart->port.unthrottle = up->port.unthrottle;
3858 uart->port.rs485_config = up->port.rs485_config;
3859 uart->port.rs485 = up->port.rs485;
3860 uart->dma = up->dma;
3862 /* Take tx_loadsz from fifosize if it wasn't set separately */
3863 if (uart->port.fifosize && !uart->tx_loadsz)
3864 uart->tx_loadsz = uart->port.fifosize;
3867 uart->port.dev = up->port.dev;
3870 uart->port.flags |= UPF_NO_TXEN_TEST;
3872 if (up->port.flags & UPF_FIXED_TYPE)
3873 uart->port.type = up->port.type;
3875 serial8250_set_defaults(uart);
3877 /* Possibly override default I/O functions. */
3878 if (up->port.serial_in)
3879 uart->port.serial_in = up->port.serial_in;
3880 if (up->port.serial_out)
3881 uart->port.serial_out = up->port.serial_out;
3882 if (up->port.handle_irq)
3883 uart->port.handle_irq = up->port.handle_irq;
3884 /* Possibly override set_termios call */
3885 if (up->port.set_termios)
3886 uart->port.set_termios = up->port.set_termios;
3887 if (up->port.set_mctrl)
3888 uart->port.set_mctrl = up->port.set_mctrl;
3889 if (up->port.startup)
3890 uart->port.startup = up->port.startup;
3891 if (up->port.shutdown)
3892 uart->port.shutdown = up->port.shutdown;
3894 uart->port.pm = up->port.pm;
3895 if (up->port.handle_break)
3896 uart->port.handle_break = up->port.handle_break;
3898 uart->dl_read = up->dl_read;
3900 uart->dl_write = up->dl_write;
3902 if (serial8250_isa_config != NULL)
3903 serial8250_isa_config(0, &uart->port,
3904 &uart->capabilities);
3906 ret = uart_add_one_port(&serial8250_reg, &uart->port);
3908 ret = uart->port.line;
3910 mutex_unlock(&serial_mutex);
3914 EXPORT_SYMBOL(serial8250_register_8250_port);
3917 * serial8250_unregister_port - remove a 16x50 serial port at runtime
3918 * @line: serial line number
3920 * Remove one serial port. This may not be called from interrupt
3921 * context. We hand the port back to the our control.
3923 void serial8250_unregister_port(int line)
3925 struct uart_8250_port *uart = &serial8250_ports[line];
3927 mutex_lock(&serial_mutex);
3928 uart_remove_one_port(&serial8250_reg, &uart->port);
3929 if (serial8250_isa_devs) {
3930 uart->port.flags &= ~UPF_BOOT_AUTOCONF;
3932 uart->port.flags |= UPF_NO_TXEN_TEST;
3933 uart->port.type = PORT_UNKNOWN;
3934 uart->port.dev = &serial8250_isa_devs->dev;
3935 uart->capabilities = 0;
3936 uart_add_one_port(&serial8250_reg, &uart->port);
3938 uart->port.dev = NULL;
3940 mutex_unlock(&serial_mutex);
3942 EXPORT_SYMBOL(serial8250_unregister_port);
3944 static int __init serial8250_init(void)
3948 serial8250_isa_init_ports();
3950 printk(KERN_INFO "Serial: 8250/16550 driver, "
3951 "%d ports, IRQ sharing %sabled\n", nr_uarts,
3952 share_irqs ? "en" : "dis");
3955 ret = sunserial_register_minors(&serial8250_reg, UART_NR);
3957 serial8250_reg.nr = UART_NR;
3958 ret = uart_register_driver(&serial8250_reg);
3963 ret = serial8250_pnp_init();
3965 goto unreg_uart_drv;
3967 serial8250_isa_devs = platform_device_alloc("serial8250",
3968 PLAT8250_DEV_LEGACY);
3969 if (!serial8250_isa_devs) {
3974 ret = platform_device_add(serial8250_isa_devs);
3978 serial8250_register_ports(&serial8250_reg, &serial8250_isa_devs->dev);
3980 ret = platform_driver_register(&serial8250_isa_driver);
3984 platform_device_del(serial8250_isa_devs);
3986 platform_device_put(serial8250_isa_devs);
3988 serial8250_pnp_exit();
3991 sunserial_unregister_minors(&serial8250_reg, UART_NR);
3993 uart_unregister_driver(&serial8250_reg);
3999 static void __exit serial8250_exit(void)
4001 struct platform_device *isa_dev = serial8250_isa_devs;
4004 * This tells serial8250_unregister_port() not to re-register
4005 * the ports (thereby making serial8250_isa_driver permanently
4008 serial8250_isa_devs = NULL;
4010 platform_driver_unregister(&serial8250_isa_driver);
4011 platform_device_unregister(isa_dev);
4013 serial8250_pnp_exit();
4016 sunserial_unregister_minors(&serial8250_reg, UART_NR);
4018 uart_unregister_driver(&serial8250_reg);
4022 module_init(serial8250_init);
4023 module_exit(serial8250_exit);
4025 EXPORT_SYMBOL(serial8250_suspend_port);
4026 EXPORT_SYMBOL(serial8250_resume_port);
4028 MODULE_LICENSE("GPL");
4029 MODULE_DESCRIPTION("Generic 8250/16x50 serial driver");
4031 module_param(share_irqs, uint, 0644);
4032 MODULE_PARM_DESC(share_irqs, "Share IRQs with other non-8250/16x50 devices"
4035 module_param(nr_uarts, uint, 0644);
4036 MODULE_PARM_DESC(nr_uarts, "Maximum number of UARTs supported. (1-" __MODULE_STRING(CONFIG_SERIAL_8250_NR_UARTS) ")");
4038 module_param(skip_txen_test, uint, 0644);
4039 MODULE_PARM_DESC(skip_txen_test, "Skip checking for the TXEN bug at init time");
4041 #ifdef CONFIG_SERIAL_8250_RSA
4042 module_param_array(probe_rsa, ulong, &probe_rsa_count, 0444);
4043 MODULE_PARM_DESC(probe_rsa, "Probe I/O ports for RSA");
4045 MODULE_ALIAS_CHARDEV_MAJOR(TTY_MAJOR);
4047 #ifdef CONFIG_SERIAL_8250_DEPRECATED_OPTIONS
4049 /* This module was renamed to 8250_core in 3.7. Keep the old "8250" name
4050 * working as well for the module options so we don't break people. We
4051 * need to keep the names identical and the convenient macros will happily
4052 * refuse to let us do that by failing the build with redefinition errors
4053 * of global variables. So we stick them inside a dummy function to avoid
4054 * those conflicts. The options still get parsed, and the redefined
4055 * MODULE_PARAM_PREFIX lets us keep the "8250." syntax alive.
4057 * This is hacky. I'm sorry.
4059 static void __used s8250_options(void)
4061 #undef MODULE_PARAM_PREFIX
4062 #define MODULE_PARAM_PREFIX "8250_core."
4064 module_param_cb(share_irqs, ¶m_ops_uint, &share_irqs, 0644);
4065 module_param_cb(nr_uarts, ¶m_ops_uint, &nr_uarts, 0644);
4066 module_param_cb(skip_txen_test, ¶m_ops_uint, &skip_txen_test, 0644);
4067 #ifdef CONFIG_SERIAL_8250_RSA
4068 __module_param_call(MODULE_PARAM_PREFIX, probe_rsa,
4069 ¶m_array_ops, .arr = &__param_arr_probe_rsa,
4074 MODULE_ALIAS("8250_core");