2 * 8250_dma.c - DMA Engine API support for 8250.c
4 * Copyright (C) 2013 Intel Corporation
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 #include <linux/tty.h>
12 #include <linux/tty_flip.h>
13 #include <linux/serial_reg.h>
14 #include <linux/dma-mapping.h>
18 static void __dma_tx_complete(void *param)
20 struct uart_8250_port *p = param;
21 struct uart_8250_dma *dma = p->dma;
22 struct circ_buf *xmit = &p->port.state->xmit;
25 dma_sync_single_for_cpu(dma->txchan->device->dev, dma->tx_addr,
26 UART_XMIT_SIZE, DMA_TO_DEVICE);
28 spin_lock_irqsave(&p->port.lock, flags);
32 xmit->tail += dma->tx_size;
33 xmit->tail &= UART_XMIT_SIZE - 1;
34 p->port.icount.tx += dma->tx_size;
36 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
37 uart_write_wakeup(&p->port);
39 if (!uart_circ_empty(xmit) && !uart_tx_stopped(&p->port)) {
42 ret = serial8250_tx_dma(p);
45 p->ier |= UART_IER_THRI;
46 serial_port_out(&p->port, UART_IER, p->ier);
50 spin_unlock_irqrestore(&p->port.lock, flags);
53 static void __dma_rx_complete(void *param)
55 struct uart_8250_port *p = param;
56 struct uart_8250_dma *dma = p->dma;
57 struct tty_port *tty_port = &p->port.state->port;
58 struct dma_tx_state state;
61 dma_sync_single_for_cpu(dma->rxchan->device->dev, dma->rx_addr,
62 dma->rx_size, DMA_FROM_DEVICE);
65 dmaengine_tx_status(dma->rxchan, dma->rx_cookie, &state);
66 dmaengine_terminate_all(dma->rxchan);
68 count = dma->rx_size - state.residue;
70 tty_insert_flip_string(tty_port, dma->rx_buf, count);
71 p->port.icount.rx += count;
73 tty_flip_buffer_push(tty_port);
76 int serial8250_tx_dma(struct uart_8250_port *p)
78 struct uart_8250_dma *dma = p->dma;
79 struct circ_buf *xmit = &p->port.state->xmit;
80 struct dma_async_tx_descriptor *desc;
83 if (uart_tx_stopped(&p->port) || dma->tx_running ||
84 uart_circ_empty(xmit))
87 dma->tx_size = CIRC_CNT_TO_END(xmit->head, xmit->tail, UART_XMIT_SIZE);
89 desc = dmaengine_prep_slave_single(dma->txchan,
90 dma->tx_addr + xmit->tail,
91 dma->tx_size, DMA_MEM_TO_DEV,
92 DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
100 desc->callback = __dma_tx_complete;
101 desc->callback_param = p;
103 dma->tx_cookie = dmaengine_submit(desc);
105 dma_sync_single_for_device(dma->txchan->device->dev, dma->tx_addr,
106 UART_XMIT_SIZE, DMA_TO_DEVICE);
108 dma_async_issue_pending(dma->txchan);
111 if (p->ier & UART_IER_THRI) {
112 p->ier &= ~UART_IER_THRI;
113 serial_out(p, UART_IER, p->ier);
122 int serial8250_rx_dma(struct uart_8250_port *p, unsigned int iir)
124 struct uart_8250_dma *dma = p->dma;
125 struct dma_async_tx_descriptor *desc;
127 switch (iir & 0x3f) {
129 /* 8250_core handles errors and break interrupts */
131 case UART_IIR_RX_TIMEOUT:
133 * If RCVR FIFO trigger level was not reached, complete the
134 * transfer and let 8250_core copy the remaining data.
136 if (dma->rx_running) {
137 dmaengine_pause(dma->rxchan);
138 __dma_rx_complete(p);
148 desc = dmaengine_prep_slave_single(dma->rxchan, dma->rx_addr,
149 dma->rx_size, DMA_DEV_TO_MEM,
150 DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
155 desc->callback = __dma_rx_complete;
156 desc->callback_param = p;
158 dma->rx_cookie = dmaengine_submit(desc);
160 dma_sync_single_for_device(dma->rxchan->device->dev, dma->rx_addr,
161 dma->rx_size, DMA_FROM_DEVICE);
163 dma_async_issue_pending(dma->rxchan);
168 int serial8250_request_dma(struct uart_8250_port *p)
170 struct uart_8250_dma *dma = p->dma;
173 /* Default slave configuration parameters */
174 dma->rxconf.direction = DMA_DEV_TO_MEM;
175 dma->rxconf.src_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE;
176 dma->rxconf.src_addr = p->port.mapbase + UART_RX;
178 dma->txconf.direction = DMA_MEM_TO_DEV;
179 dma->txconf.dst_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE;
180 dma->txconf.dst_addr = p->port.mapbase + UART_TX;
183 dma_cap_set(DMA_SLAVE, mask);
185 /* Get a channel for RX */
186 dma->rxchan = dma_request_slave_channel_compat(mask,
187 dma->fn, dma->rx_param,
192 dmaengine_slave_config(dma->rxchan, &dma->rxconf);
194 /* Get a channel for TX */
195 dma->txchan = dma_request_slave_channel_compat(mask,
196 dma->fn, dma->tx_param,
199 dma_release_channel(dma->rxchan);
203 dmaengine_slave_config(dma->txchan, &dma->txconf);
207 dma->rx_size = PAGE_SIZE;
209 dma->rx_buf = dma_alloc_coherent(dma->rxchan->device->dev, dma->rx_size,
210 &dma->rx_addr, GFP_KERNEL);
215 dma->tx_addr = dma_map_single(dma->txchan->device->dev,
216 p->port.state->xmit.buf,
219 if (dma_mapping_error(dma->txchan->device->dev, dma->tx_addr)) {
220 dma_free_coherent(dma->rxchan->device->dev, dma->rx_size,
221 dma->rx_buf, dma->rx_addr);
225 dev_dbg_ratelimited(p->port.dev, "got both dma channels\n");
229 dma_release_channel(dma->rxchan);
230 dma_release_channel(dma->txchan);
234 EXPORT_SYMBOL_GPL(serial8250_request_dma);
236 void serial8250_release_dma(struct uart_8250_port *p)
238 struct uart_8250_dma *dma = p->dma;
243 /* Release RX resources */
244 dmaengine_terminate_all(dma->rxchan);
245 dma_free_coherent(dma->rxchan->device->dev, dma->rx_size, dma->rx_buf,
247 dma_release_channel(dma->rxchan);
250 /* Release TX resources */
251 dmaengine_terminate_all(dma->txchan);
252 dma_unmap_single(dma->txchan->device->dev, dma->tx_addr,
253 UART_XMIT_SIZE, DMA_TO_DEVICE);
254 dma_release_channel(dma->txchan);
258 dev_dbg_ratelimited(p->port.dev, "dma channels released\n");
260 EXPORT_SYMBOL_GPL(serial8250_release_dma);