2 * Mediatek 8250 driver.
4 * Copyright (c) 2014 MundoReader S.L.
5 * Author: Matthias Brugger <matthias.bgg@gmail.com>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 #include <linux/clk.h>
19 #include <linux/init.h>
20 #include <linux/of_irq.h>
21 #include <linux/of_platform.h>
22 #include <linux/platform_device.h>
23 #include <linux/pm_runtime.h>
24 #include <linux/serial_8250.h>
25 #include <linux/serial_reg.h>
29 #define UART_MTK_HIGHS 0x09 /* Highspeed register */
30 #define UART_MTK_SAMPLE_COUNT 0x0a /* Sample count register */
31 #define UART_MTK_SAMPLE_POINT 0x0b /* Sample point register */
32 #define MTK_UART_RATE_FIX 0x0d /* UART Rate Fix Register */
41 mtk8250_set_termios(struct uart_port *port, struct ktermios *termios,
45 unsigned int baud, quot;
47 struct uart_8250_port *up =
48 container_of(port, struct uart_8250_port, port);
50 serial8250_do_set_termios(port, termios, old);
53 * Mediatek UARTs use an extra highspeed register (UART_MTK_HIGHS)
55 * We need to recalcualte the quot register, as the claculation depends
56 * on the vaule in the highspeed register.
58 * Some baudrates are not supported by the chip, so we use the next
59 * lower rate supported and update termios c_flag.
61 * If highspeed register is set to 3, we need to specify sample count
62 * and sample point to increase accuracy. If not, we reset the
63 * registers to their default values.
65 baud = uart_get_baud_rate(port, termios, old,
66 port->uartclk / 16 / 0xffff,
70 serial_port_out(port, UART_MTK_HIGHS, 0x0);
71 quot = uart_get_divisor(port, baud);
72 } else if (baud <= 576000) {
73 serial_port_out(port, UART_MTK_HIGHS, 0x2);
75 /* Set to next lower baudrate supported */
76 if ((baud == 500000) || (baud == 576000))
78 quot = DIV_ROUND_UP(port->uartclk, 4 * baud);
80 serial_port_out(port, UART_MTK_HIGHS, 0x3);
82 /* Set to highest baudrate supported */
85 quot = DIV_ROUND_UP(port->uartclk, 256 * baud);
89 * Ok, we're now changing the port state. Do it with
90 * interrupts disabled.
92 spin_lock_irqsave(&port->lock, flags);
94 /* set DLAB we have cval saved in up->lcr from the call to the core */
95 serial_port_out(port, UART_LCR, up->lcr | UART_LCR_DLAB);
96 serial_dl_write(up, quot);
99 serial_port_out(port, UART_LCR, up->lcr);
104 tmp = DIV_ROUND_CLOSEST(port->uartclk, quot * baud);
105 serial_port_out(port, UART_MTK_SAMPLE_COUNT, tmp - 1);
106 serial_port_out(port, UART_MTK_SAMPLE_POINT,
109 serial_port_out(port, UART_MTK_SAMPLE_COUNT, 0x00);
110 serial_port_out(port, UART_MTK_SAMPLE_POINT, 0xff);
113 spin_unlock_irqrestore(&port->lock, flags);
114 /* Don't rewrite B0 */
115 if (tty_termios_baud_rate(termios))
116 tty_termios_encode_baud_rate(termios, baud, baud);
119 static int mtk8250_runtime_suspend(struct device *dev)
121 struct mtk8250_data *data = dev_get_drvdata(dev);
123 clk_disable_unprepare(data->uart_clk);
124 clk_disable_unprepare(data->bus_clk);
129 static int mtk8250_runtime_resume(struct device *dev)
131 struct mtk8250_data *data = dev_get_drvdata(dev);
134 err = clk_prepare_enable(data->uart_clk);
136 dev_warn(dev, "Can't enable clock\n");
140 err = clk_prepare_enable(data->bus_clk);
142 dev_warn(dev, "Can't enable bus clock\n");
150 mtk8250_do_pm(struct uart_port *port, unsigned int state, unsigned int old)
153 pm_runtime_get_sync(port->dev);
155 serial8250_do_pm(port, state, old);
158 pm_runtime_put_sync_suspend(port->dev);
161 static int mtk8250_probe_of(struct platform_device *pdev, struct uart_port *p,
162 struct mtk8250_data *data)
164 data->uart_clk = devm_clk_get(&pdev->dev, "baud");
165 if (IS_ERR(data->uart_clk)) {
167 * For compatibility with older device trees try unnamed
168 * clk when no baud clk can be found.
170 data->uart_clk = devm_clk_get(&pdev->dev, NULL);
171 if (IS_ERR(data->uart_clk)) {
172 dev_warn(&pdev->dev, "Can't get uart clock\n");
173 return PTR_ERR(data->uart_clk);
179 data->bus_clk = devm_clk_get(&pdev->dev, "bus");
180 if (IS_ERR(data->bus_clk))
181 return PTR_ERR(data->bus_clk);
186 static int mtk8250_probe(struct platform_device *pdev)
188 struct uart_8250_port uart = {};
189 struct resource *regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
190 struct resource *irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
191 struct mtk8250_data *data;
195 dev_err(&pdev->dev, "no registers/irq defined\n");
199 uart.port.membase = devm_ioremap(&pdev->dev, regs->start,
200 resource_size(regs));
201 if (!uart.port.membase)
204 data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
208 if (pdev->dev.of_node) {
209 err = mtk8250_probe_of(pdev, &uart.port, data);
215 spin_lock_init(&uart.port.lock);
216 uart.port.mapbase = regs->start;
217 uart.port.irq = irq->start;
218 uart.port.pm = mtk8250_do_pm;
219 uart.port.type = PORT_16550;
220 uart.port.flags = UPF_BOOT_AUTOCONF | UPF_FIXED_PORT;
221 uart.port.dev = &pdev->dev;
222 uart.port.iotype = UPIO_MEM32;
223 uart.port.regshift = 2;
224 uart.port.private_data = data;
225 uart.port.set_termios = mtk8250_set_termios;
226 uart.port.uartclk = clk_get_rate(data->uart_clk);
228 /* Disable Rate Fix function */
229 writel(0x0, uart.port.membase +
230 (MTK_UART_RATE_FIX << uart.port.regshift));
232 platform_set_drvdata(pdev, data);
234 pm_runtime_enable(&pdev->dev);
235 if (!pm_runtime_enabled(&pdev->dev)) {
236 err = mtk8250_runtime_resume(&pdev->dev);
241 data->line = serial8250_register_8250_port(&uart);
248 #ifdef CONFIG_PM_SLEEP
249 static int mtk8250_suspend(struct device *dev)
251 struct mtk8250_data *data = dev_get_drvdata(dev);
253 serial8250_suspend_port(data->line);
258 static int mtk8250_resume(struct device *dev)
260 struct mtk8250_data *data = dev_get_drvdata(dev);
262 serial8250_resume_port(data->line);
266 #endif /* CONFIG_PM_SLEEP */
268 static const struct dev_pm_ops mtk8250_pm_ops = {
269 SET_SYSTEM_SLEEP_PM_OPS(mtk8250_suspend, mtk8250_resume)
270 SET_RUNTIME_PM_OPS(mtk8250_runtime_suspend, mtk8250_runtime_resume,
274 static const struct of_device_id mtk8250_of_match[] = {
275 { .compatible = "mediatek,mt6577-uart" },
279 static struct platform_driver mtk8250_platform_driver = {
281 .name = "mt6577-uart",
282 .pm = &mtk8250_pm_ops,
283 .of_match_table = mtk8250_of_match,
284 .suppress_bind_attrs = true,
287 .probe = mtk8250_probe,
289 builtin_platform_driver(mtk8250_platform_driver);
291 #ifdef CONFIG_SERIAL_8250_CONSOLE
292 static int __init early_mtk8250_setup(struct earlycon_device *device,
295 if (!device->port.membase)
298 device->port.iotype = UPIO_MEM32;
300 return early_serial8250_setup(device, NULL);
303 OF_EARLYCON_DECLARE(mtk8250, "mediatek,mt6577-uart", early_mtk8250_setup);