2 * Blackfin On-Chip Sport Emulated UART Driver
4 * Copyright 2006-2009 Analog Devices Inc.
6 * Enter bugs at http://blackfin.uclinux.org/
8 * Licensed under the GPL-2 or later.
12 * This driver and the hardware supported are in term of EE-191 of ADI.
13 * http://www.analog.com/static/imported-files/application_notes/EE191.pdf
14 * This application note describe how to implement a UART on a Sharc DSP,
15 * but this driver is implemented on Blackfin Processor.
16 * Transmit Frame Sync is not used by this driver to transfer data out.
21 #define DRV_NAME "bfin-sport-uart"
22 #define DEVICE_NAME "ttySS"
23 #define pr_fmt(fmt) DRV_NAME ": " fmt
25 #include <linux/module.h>
26 #include <linux/ioport.h>
28 #include <linux/init.h>
29 #include <linux/console.h>
30 #include <linux/sysrq.h>
31 #include <linux/slab.h>
32 #include <linux/platform_device.h>
33 #include <linux/tty.h>
34 #include <linux/tty_flip.h>
35 #include <linux/serial_core.h>
37 #include <asm/bfin_sport.h>
38 #include <asm/delay.h>
39 #include <asm/portmux.h>
41 #include "bfin_sport_uart.h"
43 struct sport_uart_port {
44 struct uart_port port;
47 unsigned short rxmask;
48 unsigned short txmask1;
49 unsigned short txmask2;
51 /* unsigned char parib; */
52 #ifdef CONFIG_SERIAL_BFIN_SPORT_CTSRTS
58 static int sport_uart_tx_chars(struct sport_uart_port *up);
59 static void sport_stop_tx(struct uart_port *port);
61 static inline void tx_one_byte(struct sport_uart_port *up, unsigned int value)
63 pr_debug("%s value:%x, mask1=0x%x, mask2=0x%x\n", __func__, value,
64 up->txmask1, up->txmask2);
66 /* Place Start and Stop bits */
67 __asm__ __volatile__ (
69 "%[val] = %[val] & %[mask1];"
70 "%[val] = %[val] | %[mask2];"
72 : [mask1]"d"(up->txmask1), [mask2]"d"(up->txmask2)
75 pr_debug("%s value:%x\n", __func__, value);
77 SPORT_PUT_TX(up, value);
80 static inline unsigned char rx_one_byte(struct sport_uart_port *up)
83 unsigned char extract;
84 u32 tmp_mask1, tmp_mask2, tmp_shift, tmp;
86 if ((up->csize + up->stopb) > 7)
87 value = SPORT_GET_RX32(up);
89 value = SPORT_GET_RX(up);
91 pr_debug("%s value:%x, cs=%d, mask=0x%x\n", __func__, value,
92 up->csize, up->rxmask);
95 __asm__ __volatile__ (
97 "%[mask1] = %[rxmask];"
98 "%[mask2] = 0x0200(Z);"
100 "LSETUP(.Lloop_s, .Lloop_e) LC0 = %[lc];"
102 "%[tmp] = extract(%[val], %[mask1].L)(Z);"
103 "%[tmp] <<= %[shift];"
104 "%[extr] = %[extr] | %[tmp];"
105 "%[mask1] = %[mask1] - %[mask2];"
108 : [extr]"=&d"(extract), [shift]"=&d"(tmp_shift), [tmp]"=&d"(tmp),
109 [mask1]"=&d"(tmp_mask1), [mask2]"=&d"(tmp_mask2)
110 : [val]"d"(value), [rxmask]"d"(up->rxmask), [lc]"a"(up->csize)
111 : "ASTAT", "LB0", "LC0", "LT0"
114 pr_debug(" extract:%x\n", extract);
118 static int sport_uart_setup(struct sport_uart_port *up, int size, int baud_rate)
120 int tclkdiv, rclkdiv;
121 unsigned int sclk = get_sclk();
123 /* Set TCR1 and TCR2, TFSR is not enabled for uart */
124 SPORT_PUT_TCR1(up, (LATFS | ITFS | TFSR | TLSBIT | ITCLK));
125 SPORT_PUT_TCR2(up, size + 1);
126 pr_debug("%s TCR1:%x, TCR2:%x\n", __func__, SPORT_GET_TCR1(up), SPORT_GET_TCR2(up));
128 /* Set RCR1 and RCR2 */
129 SPORT_PUT_RCR1(up, (RCKFE | LARFS | LRFS | RFSR | IRCLK));
130 SPORT_PUT_RCR2(up, (size + 1) * 2 - 1);
131 pr_debug("%s RCR1:%x, RCR2:%x\n", __func__, SPORT_GET_RCR1(up), SPORT_GET_RCR2(up));
133 tclkdiv = sclk / (2 * baud_rate) - 1;
134 /* The actual uart baud rate of devices vary between +/-2%. The sport
135 * RX sample rate should be faster than the double of the worst case,
136 * otherwise, wrong data are received. So, set sport RX clock to be
139 rclkdiv = sclk / (2 * baud_rate * 2 * 97 / 100) - 1;
140 SPORT_PUT_TCLKDIV(up, tclkdiv);
141 SPORT_PUT_RCLKDIV(up, rclkdiv);
143 pr_debug("%s sclk:%d, baud_rate:%d, tclkdiv:%d, rclkdiv:%d\n",
144 __func__, sclk, baud_rate, tclkdiv, rclkdiv);
149 static irqreturn_t sport_uart_rx_irq(int irq, void *dev_id)
151 struct sport_uart_port *up = dev_id;
152 struct tty_port *port = &up->port.state->port;
153 struct tty_struct *tty = tport->tty;
156 spin_lock(&up->port.lock);
158 while (SPORT_GET_STAT(up) & RXNE) {
159 ch = rx_one_byte(up);
160 up->port.icount.rx++;
162 if (!uart_handle_sysrq_char(&up->port, ch))
163 tty_insert_flip_char(port, ch, TTY_NORMAL);
165 tty_flip_buffer_push(tty);
167 spin_unlock(&up->port.lock);
172 static irqreturn_t sport_uart_tx_irq(int irq, void *dev_id)
174 struct sport_uart_port *up = dev_id;
176 spin_lock(&up->port.lock);
177 sport_uart_tx_chars(up);
178 spin_unlock(&up->port.lock);
183 static irqreturn_t sport_uart_err_irq(int irq, void *dev_id)
185 struct sport_uart_port *up = dev_id;
186 unsigned int stat = SPORT_GET_STAT(up);
188 spin_lock(&up->port.lock);
190 /* Overflow in RX FIFO */
192 up->port.icount.overrun++;
193 tty_insert_flip_char(&up->port.state->port, 0, TTY_OVERRUN);
194 SPORT_PUT_STAT(up, ROVF); /* Clear ROVF bit */
196 /* These should not happen */
197 if (stat & (TOVF | TUVF | RUVF)) {
198 pr_err("SPORT Error:%s %s %s\n",
199 (stat & TOVF) ? "TX overflow" : "",
200 (stat & TUVF) ? "TX underflow" : "",
201 (stat & RUVF) ? "RX underflow" : "");
202 SPORT_PUT_TCR1(up, SPORT_GET_TCR1(up) & ~TSPEN);
203 SPORT_PUT_RCR1(up, SPORT_GET_RCR1(up) & ~RSPEN);
207 spin_unlock(&up->port.lock);
208 /* XXX we don't push the overrun bit to TTY? */
213 #ifdef CONFIG_SERIAL_BFIN_SPORT_CTSRTS
214 static unsigned int sport_get_mctrl(struct uart_port *port)
216 struct sport_uart_port *up = (struct sport_uart_port *)port;
218 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
220 /* CTS PIN is negative assertive. */
221 if (SPORT_UART_GET_CTS(up))
222 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
224 return TIOCM_DSR | TIOCM_CAR;
227 static void sport_set_mctrl(struct uart_port *port, unsigned int mctrl)
229 struct sport_uart_port *up = (struct sport_uart_port *)port;
233 /* RTS PIN is negative assertive. */
234 if (mctrl & TIOCM_RTS)
235 SPORT_UART_ENABLE_RTS(up);
237 SPORT_UART_DISABLE_RTS(up);
241 * Handle any change of modem status signal.
243 static irqreturn_t sport_mctrl_cts_int(int irq, void *dev_id)
245 struct sport_uart_port *up = (struct sport_uart_port *)dev_id;
248 status = sport_get_mctrl(&up->port);
249 uart_handle_cts_change(&up->port, status & TIOCM_CTS);
254 static unsigned int sport_get_mctrl(struct uart_port *port)
256 pr_debug("%s enter\n", __func__);
257 return TIOCM_CTS | TIOCM_CD | TIOCM_DSR;
260 static void sport_set_mctrl(struct uart_port *port, unsigned int mctrl)
262 pr_debug("%s enter\n", __func__);
266 /* Reqeust IRQ, Setup clock */
267 static int sport_startup(struct uart_port *port)
269 struct sport_uart_port *up = (struct sport_uart_port *)port;
272 pr_debug("%s enter\n", __func__);
273 ret = request_irq(up->port.irq, sport_uart_rx_irq, 0,
274 "SPORT_UART_RX", up);
276 dev_err(port->dev, "unable to request SPORT RX interrupt\n");
280 ret = request_irq(up->port.irq+1, sport_uart_tx_irq, 0,
281 "SPORT_UART_TX", up);
283 dev_err(port->dev, "unable to request SPORT TX interrupt\n");
287 ret = request_irq(up->err_irq, sport_uart_err_irq, 0,
288 "SPORT_UART_STATUS", up);
290 dev_err(port->dev, "unable to request SPORT status interrupt\n");
294 #ifdef CONFIG_SERIAL_BFIN_SPORT_CTSRTS
295 if (up->cts_pin >= 0) {
296 if (request_irq(gpio_to_irq(up->cts_pin),
298 IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING |
299 0, "BFIN_SPORT_UART_CTS", up)) {
301 dev_info(port->dev, "Unable to attach BlackFin UART over SPORT CTS interrupt. So, disable it.\n");
304 if (up->rts_pin >= 0) {
305 if (gpio_request(up->rts_pin, DRV_NAME)) {
306 dev_info(port->dev, "fail to request RTS PIN at GPIO_%d\n", up->rts_pin);
309 gpio_direction_output(up->rts_pin, 0);
315 free_irq(up->port.irq+1, up);
317 free_irq(up->port.irq, up);
323 * sport_uart_tx_chars
325 * ret 1 means need to enable sport.
326 * ret 0 means do nothing.
328 static int sport_uart_tx_chars(struct sport_uart_port *up)
330 struct circ_buf *xmit = &up->port.state->xmit;
332 if (SPORT_GET_STAT(up) & TXF)
335 if (up->port.x_char) {
336 tx_one_byte(up, up->port.x_char);
337 up->port.icount.tx++;
342 if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) {
343 /* The waiting loop to stop SPORT TX from TX interrupt is
344 * too long. This may block SPORT RX interrupts and cause
345 * RX FIFO overflow. So, do stop sport TX only after the last
346 * char in TX FIFO is moved into the shift register.
348 if (SPORT_GET_STAT(up) & TXHRE)
349 sport_stop_tx(&up->port);
353 while(!(SPORT_GET_STAT(up) & TXF) && !uart_circ_empty(xmit)) {
354 tx_one_byte(up, xmit->buf[xmit->tail]);
355 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE -1);
356 up->port.icount.tx++;
359 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
360 uart_write_wakeup(&up->port);
365 static unsigned int sport_tx_empty(struct uart_port *port)
367 struct sport_uart_port *up = (struct sport_uart_port *)port;
370 stat = SPORT_GET_STAT(up);
371 pr_debug("%s stat:%04x\n", __func__, stat);
378 static void sport_stop_tx(struct uart_port *port)
380 struct sport_uart_port *up = (struct sport_uart_port *)port;
382 pr_debug("%s enter\n", __func__);
384 if (!(SPORT_GET_TCR1(up) & TSPEN))
387 /* Although the hold register is empty, last byte is still in shift
388 * register and not sent out yet. So, put a dummy data into TX FIFO.
389 * Then, sport tx stops when last byte is shift out and the dummy
390 * data is moved into the shift register.
392 SPORT_PUT_TX(up, 0xffff);
393 while (!(SPORT_GET_STAT(up) & TXHRE))
396 SPORT_PUT_TCR1(up, (SPORT_GET_TCR1(up) & ~TSPEN));
402 static void sport_start_tx(struct uart_port *port)
404 struct sport_uart_port *up = (struct sport_uart_port *)port;
406 pr_debug("%s enter\n", __func__);
408 /* Write data into SPORT FIFO before enable SPROT to transmit */
409 if (sport_uart_tx_chars(up)) {
410 /* Enable transmit, then an interrupt will generated */
411 SPORT_PUT_TCR1(up, (SPORT_GET_TCR1(up) | TSPEN));
415 pr_debug("%s exit\n", __func__);
418 static void sport_stop_rx(struct uart_port *port)
420 struct sport_uart_port *up = (struct sport_uart_port *)port;
422 pr_debug("%s enter\n", __func__);
423 /* Disable sport to stop rx */
424 SPORT_PUT_RCR1(up, (SPORT_GET_RCR1(up) & ~RSPEN));
428 static void sport_enable_ms(struct uart_port *port)
430 pr_debug("%s enter\n", __func__);
433 static void sport_break_ctl(struct uart_port *port, int break_state)
435 pr_debug("%s enter\n", __func__);
438 static void sport_shutdown(struct uart_port *port)
440 struct sport_uart_port *up = (struct sport_uart_port *)port;
442 dev_dbg(port->dev, "%s enter\n", __func__);
445 SPORT_PUT_TCR1(up, (SPORT_GET_TCR1(up) & ~TSPEN));
446 SPORT_PUT_RCR1(up, (SPORT_GET_RCR1(up) & ~RSPEN));
449 free_irq(up->port.irq, up);
450 free_irq(up->port.irq+1, up);
451 free_irq(up->err_irq, up);
452 #ifdef CONFIG_SERIAL_BFIN_SPORT_CTSRTS
453 if (up->cts_pin >= 0)
454 free_irq(gpio_to_irq(up->cts_pin), up);
455 if (up->rts_pin >= 0)
456 gpio_free(up->rts_pin);
460 static const char *sport_type(struct uart_port *port)
462 struct sport_uart_port *up = (struct sport_uart_port *)port;
464 pr_debug("%s enter\n", __func__);
465 return up->port.type == PORT_BFIN_SPORT ? "BFIN-SPORT-UART" : NULL;
468 static void sport_release_port(struct uart_port *port)
470 pr_debug("%s enter\n", __func__);
473 static int sport_request_port(struct uart_port *port)
475 pr_debug("%s enter\n", __func__);
479 static void sport_config_port(struct uart_port *port, int flags)
481 struct sport_uart_port *up = (struct sport_uart_port *)port;
483 pr_debug("%s enter\n", __func__);
484 up->port.type = PORT_BFIN_SPORT;
487 static int sport_verify_port(struct uart_port *port, struct serial_struct *ser)
489 pr_debug("%s enter\n", __func__);
493 static void sport_set_termios(struct uart_port *port,
494 struct ktermios *termios, struct ktermios *old)
496 struct sport_uart_port *up = (struct sport_uart_port *)port;
500 pr_debug("%s enter, c_cflag:%08x\n", __func__, termios->c_cflag);
502 switch (termios->c_cflag & CSIZE) {
516 pr_warning("requested word length not supported\n");
519 if (termios->c_cflag & CSTOPB) {
522 if (termios->c_cflag & PARENB) {
523 pr_warning("PAREN bits is not supported yet\n");
527 spin_lock_irqsave(&up->port.lock, flags);
529 port->read_status_mask = 0;
532 * Characters to ignore
534 port->ignore_status_mask = 0;
536 /* RX extract mask */
537 up->rxmask = 0x01 | (((up->csize + up->stopb) * 2 - 1) << 0x8);
538 /* TX masks, 8 bit data and 1 bit stop for example:
539 * mask1 = b#0111111110
540 * mask2 = b#1000000000
542 for (i = 0, up->txmask1 = 0; i < up->csize; i++)
543 up->txmask1 |= (1<<i);
544 up->txmask2 = (1<<i);
547 up->txmask2 |= (1<<i);
552 port->uartclk = uart_get_baud_rate(port, termios, old, 0, get_sclk()/16);
555 SPORT_PUT_TCR1(up, SPORT_GET_TCR1(up) & ~TSPEN);
556 SPORT_PUT_RCR1(up, SPORT_GET_RCR1(up) & ~RSPEN);
558 sport_uart_setup(up, up->csize + up->stopb, port->uartclk);
560 /* driver TX line high after config, one dummy data is
561 * necessary to stop sport after shift one byte
563 SPORT_PUT_TX(up, 0xffff);
564 SPORT_PUT_TX(up, 0xffff);
565 SPORT_PUT_TCR1(up, (SPORT_GET_TCR1(up) | TSPEN));
567 while (!(SPORT_GET_STAT(up) & TXHRE))
569 SPORT_PUT_TCR1(up, SPORT_GET_TCR1(up) & ~TSPEN);
572 /* Port speed changed, update the per-port timeout. */
573 uart_update_timeout(port, termios->c_cflag, port->uartclk);
575 /* Enable sport rx */
576 SPORT_PUT_RCR1(up, SPORT_GET_RCR1(up) | RSPEN);
579 spin_unlock_irqrestore(&up->port.lock, flags);
582 struct uart_ops sport_uart_ops = {
583 .tx_empty = sport_tx_empty,
584 .set_mctrl = sport_set_mctrl,
585 .get_mctrl = sport_get_mctrl,
586 .stop_tx = sport_stop_tx,
587 .start_tx = sport_start_tx,
588 .stop_rx = sport_stop_rx,
589 .enable_ms = sport_enable_ms,
590 .break_ctl = sport_break_ctl,
591 .startup = sport_startup,
592 .shutdown = sport_shutdown,
593 .set_termios = sport_set_termios,
595 .release_port = sport_release_port,
596 .request_port = sport_request_port,
597 .config_port = sport_config_port,
598 .verify_port = sport_verify_port,
601 #define BFIN_SPORT_UART_MAX_PORTS 4
603 static struct sport_uart_port *bfin_sport_uart_ports[BFIN_SPORT_UART_MAX_PORTS];
605 #ifdef CONFIG_SERIAL_BFIN_SPORT_CONSOLE
606 #define CLASS_BFIN_SPORT_CONSOLE "bfin-sport-console"
609 sport_uart_console_setup(struct console *co, char *options)
611 struct sport_uart_port *up;
615 # ifdef CONFIG_SERIAL_BFIN_SPORT_CTSRTS
621 /* Check whether an invalid uart number has been specified */
622 if (co->index < 0 || co->index >= BFIN_SPORT_UART_MAX_PORTS)
625 up = bfin_sport_uart_ports[co->index];
630 uart_parse_options(options, &baud, &parity, &bits, &flow);
632 return uart_set_options(&up->port, co, baud, parity, bits, flow);
635 static void sport_uart_console_putchar(struct uart_port *port, int ch)
637 struct sport_uart_port *up = (struct sport_uart_port *)port;
639 while (SPORT_GET_STAT(up) & TXF)
646 * Interrupts are disabled on entering
649 sport_uart_console_write(struct console *co, const char *s, unsigned int count)
651 struct sport_uart_port *up = bfin_sport_uart_ports[co->index];
654 spin_lock_irqsave(&up->port.lock, flags);
656 if (SPORT_GET_TCR1(up) & TSPEN)
657 uart_console_write(&up->port, s, count, sport_uart_console_putchar);
659 /* dummy data to start sport */
660 while (SPORT_GET_STAT(up) & TXF)
662 SPORT_PUT_TX(up, 0xffff);
663 /* Enable transmit, then an interrupt will generated */
664 SPORT_PUT_TCR1(up, (SPORT_GET_TCR1(up) | TSPEN));
667 uart_console_write(&up->port, s, count, sport_uart_console_putchar);
669 /* Although the hold register is empty, last byte is still in shift
670 * register and not sent out yet. So, put a dummy data into TX FIFO.
671 * Then, sport tx stops when last byte is shift out and the dummy
672 * data is moved into the shift register.
674 while (SPORT_GET_STAT(up) & TXF)
676 SPORT_PUT_TX(up, 0xffff);
677 while (!(SPORT_GET_STAT(up) & TXHRE))
680 /* Stop sport tx transfer */
681 SPORT_PUT_TCR1(up, (SPORT_GET_TCR1(up) & ~TSPEN));
685 spin_unlock_irqrestore(&up->port.lock, flags);
688 static struct uart_driver sport_uart_reg;
690 static struct console sport_uart_console = {
692 .write = sport_uart_console_write,
693 .device = uart_console_device,
694 .setup = sport_uart_console_setup,
695 .flags = CON_PRINTBUFFER,
697 .data = &sport_uart_reg,
700 #define SPORT_UART_CONSOLE (&sport_uart_console)
702 #define SPORT_UART_CONSOLE NULL
703 #endif /* CONFIG_SERIAL_BFIN_SPORT_CONSOLE */
706 static struct uart_driver sport_uart_reg = {
707 .owner = THIS_MODULE,
708 .driver_name = DRV_NAME,
709 .dev_name = DEVICE_NAME,
712 .nr = BFIN_SPORT_UART_MAX_PORTS,
713 .cons = SPORT_UART_CONSOLE,
717 static int sport_uart_suspend(struct device *dev)
719 struct sport_uart_port *sport = dev_get_drvdata(dev);
721 dev_dbg(dev, "%s enter\n", __func__);
723 uart_suspend_port(&sport_uart_reg, &sport->port);
728 static int sport_uart_resume(struct device *dev)
730 struct sport_uart_port *sport = dev_get_drvdata(dev);
732 dev_dbg(dev, "%s enter\n", __func__);
734 uart_resume_port(&sport_uart_reg, &sport->port);
739 static struct dev_pm_ops bfin_sport_uart_dev_pm_ops = {
740 .suspend = sport_uart_suspend,
741 .resume = sport_uart_resume,
745 static int sport_uart_probe(struct platform_device *pdev)
747 struct resource *res;
748 struct sport_uart_port *sport;
751 dev_dbg(&pdev->dev, "%s enter\n", __func__);
753 if (pdev->id < 0 || pdev->id >= BFIN_SPORT_UART_MAX_PORTS) {
754 dev_err(&pdev->dev, "Wrong sport uart platform device id.\n");
758 if (bfin_sport_uart_ports[pdev->id] == NULL) {
759 bfin_sport_uart_ports[pdev->id] =
760 kzalloc(sizeof(struct sport_uart_port), GFP_KERNEL);
761 sport = bfin_sport_uart_ports[pdev->id];
764 "Fail to malloc sport_uart_port\n");
768 ret = peripheral_request_list(
769 (unsigned short *)pdev->dev.platform_data, DRV_NAME);
772 "Fail to request SPORT peripherals\n");
773 goto out_error_free_mem;
776 spin_lock_init(&sport->port.lock);
777 sport->port.fifosize = SPORT_TX_FIFO_SIZE,
778 sport->port.ops = &sport_uart_ops;
779 sport->port.line = pdev->id;
780 sport->port.iotype = UPIO_MEM;
781 sport->port.flags = UPF_BOOT_AUTOCONF;
783 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
785 dev_err(&pdev->dev, "Cannot get IORESOURCE_MEM\n");
787 goto out_error_free_peripherals;
790 sport->port.membase = ioremap(res->start, resource_size(res));
791 if (!sport->port.membase) {
792 dev_err(&pdev->dev, "Cannot map sport IO\n");
794 goto out_error_free_peripherals;
796 sport->port.mapbase = res->start;
798 sport->port.irq = platform_get_irq(pdev, 0);
799 if ((int)sport->port.irq < 0) {
800 dev_err(&pdev->dev, "No sport RX/TX IRQ specified\n");
802 goto out_error_unmap;
805 sport->err_irq = platform_get_irq(pdev, 1);
806 if (sport->err_irq < 0) {
807 dev_err(&pdev->dev, "No sport status IRQ specified\n");
809 goto out_error_unmap;
811 #ifdef CONFIG_SERIAL_BFIN_SPORT_CTSRTS
812 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
816 sport->cts_pin = res->start;
817 sport->port.flags |= ASYNC_CTS_FLOW;
820 res = platform_get_resource(pdev, IORESOURCE_IO, 1);
824 sport->rts_pin = res->start;
828 #ifdef CONFIG_SERIAL_BFIN_SPORT_CONSOLE
829 if (!is_early_platform_device(pdev)) {
831 sport = bfin_sport_uart_ports[pdev->id];
832 sport->port.dev = &pdev->dev;
833 dev_set_drvdata(&pdev->dev, sport);
834 ret = uart_add_one_port(&sport_uart_reg, &sport->port);
835 #ifdef CONFIG_SERIAL_BFIN_SPORT_CONSOLE
843 iounmap(sport->port.membase);
844 out_error_free_peripherals:
845 peripheral_free_list(
846 (unsigned short *)pdev->dev.platform_data);
849 bfin_sport_uart_ports[pdev->id] = NULL;
855 static int sport_uart_remove(struct platform_device *pdev)
857 struct sport_uart_port *sport = platform_get_drvdata(pdev);
859 dev_dbg(&pdev->dev, "%s enter\n", __func__);
860 dev_set_drvdata(&pdev->dev, NULL);
863 uart_remove_one_port(&sport_uart_reg, &sport->port);
864 iounmap(sport->port.membase);
865 peripheral_free_list(
866 (unsigned short *)pdev->dev.platform_data);
868 bfin_sport_uart_ports[pdev->id] = NULL;
874 static struct platform_driver sport_uart_driver = {
875 .probe = sport_uart_probe,
876 .remove = sport_uart_remove,
880 .pm = &bfin_sport_uart_dev_pm_ops,
885 #ifdef CONFIG_SERIAL_BFIN_SPORT_CONSOLE
886 static __initdata struct early_platform_driver early_sport_uart_driver = {
887 .class_str = CLASS_BFIN_SPORT_CONSOLE,
888 .pdrv = &sport_uart_driver,
889 .requested_id = EARLY_PLATFORM_ID_UNSET,
892 static int __init sport_uart_rs_console_init(void)
894 early_platform_driver_register(&early_sport_uart_driver, DRV_NAME);
896 early_platform_driver_probe(CLASS_BFIN_SPORT_CONSOLE,
897 BFIN_SPORT_UART_MAX_PORTS, 0);
899 register_console(&sport_uart_console);
903 console_initcall(sport_uart_rs_console_init);
906 static int __init sport_uart_init(void)
910 pr_info("Blackfin uart over sport driver\n");
912 ret = uart_register_driver(&sport_uart_reg);
914 pr_err("failed to register %s:%d\n",
915 sport_uart_reg.driver_name, ret);
919 ret = platform_driver_register(&sport_uart_driver);
921 pr_err("failed to register sport uart driver:%d\n", ret);
922 uart_unregister_driver(&sport_uart_reg);
927 module_init(sport_uart_init);
929 static void __exit sport_uart_exit(void)
931 platform_driver_unregister(&sport_uart_driver);
932 uart_unregister_driver(&sport_uart_reg);
934 module_exit(sport_uart_exit);
936 MODULE_AUTHOR("Sonic Zhang, Roy Huang");
937 MODULE_DESCRIPTION("Blackfin serial over SPORT driver");
938 MODULE_LICENSE("GPL");