drivers/tty/serial/clps711x.c

   1 /*
   2  *  Driver for CLPS711x serial ports
   3  *
   4  *  Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
   5  *
   6  *  Copyright 1999 ARM Limited
   7  *  Copyright (C) 2000 Deep Blue Solutions Ltd.
   8  *
   9  * This program is free software; you can redistribute it and/or modify
  10  * it under the terms of the GNU General Public License as published by
  11  * the Free Software Foundation; either version 2 of the License, or
  12  * (at your option) any later version.
  13  */
  14
  15 #if defined(CONFIG_SERIAL_CLPS711X_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
  16 #define SUPPORT_SYSRQ
  17 #endif
  18
  19 #include <linux/module.h>
  20 #include <linux/device.h>
  21 #include <linux/console.h>
  22 #include <linux/serial_core.h>
  23 #include <linux/serial.h>
  24 #include <linux/clk.h>
  25 #include <linux/io.h>
  26 #include <linux/tty.h>
  27 #include <linux/tty_flip.h>
  28 #include <linux/ioport.h>
  29 #include <linux/of.h>
  30 #include <linux/platform_device.h>
  31 #include <linux/regmap.h>
  32
  33 #include <linux/mfd/syscon.h>
  34 #include <linux/mfd/syscon/clps711x.h>
  35
  36 #define UART_CLPS711X_DEVNAME   "ttyCL"
  37 #define UART_CLPS711X_NR        2
  38 #define UART_CLPS711X_MAJOR     204
  39 #define UART_CLPS711X_MINOR     40
  40
  41 #define UARTDR_OFFSET           (0x00)
  42 #define UBRLCR_OFFSET           (0x40)
  43
  44 #define UARTDR_FRMERR           (1 << 8)
  45 #define UARTDR_PARERR           (1 << 9)
  46 #define UARTDR_OVERR            (1 << 10)
  47
  48 #define UBRLCR_BAUD_MASK        ((1 << 12) - 1)
  49 #define UBRLCR_BREAK            (1 << 12)
  50 #define UBRLCR_PRTEN            (1 << 13)
  51 #define UBRLCR_EVENPRT          (1 << 14)
  52 #define UBRLCR_XSTOP            (1 << 15)
  53 #define UBRLCR_FIFOEN           (1 << 16)
  54 #define UBRLCR_WRDLEN5          (0 << 17)
  55 #define UBRLCR_WRDLEN6          (1 << 17)
  56 #define UBRLCR_WRDLEN7          (2 << 17)
  57 #define UBRLCR_WRDLEN8          (3 << 17)
  58 #define UBRLCR_WRDLEN_MASK      (3 << 17)
  59
  60 struct clps711x_port {
  61         struct uart_port        port;
  62         unsigned int            tx_enabled;
  63         int                     rx_irq;
  64         struct regmap           *syscon;
  65         bool                    use_ms;
  66 };
  67
  68 static struct uart_driver clps711x_uart = {
  69         .owner          = THIS_MODULE,
  70         .driver_name    = UART_CLPS711X_DEVNAME,
  71         .dev_name       = UART_CLPS711X_DEVNAME,
  72         .major          = UART_CLPS711X_MAJOR,
  73         .minor          = UART_CLPS711X_MINOR,
  74         .nr             = UART_CLPS711X_NR,
  75 };
  76
  77 static void uart_clps711x_stop_tx(struct uart_port *port)
  78 {
  79         struct clps711x_port *s = dev_get_drvdata(port->dev);
  80
  81         if (s->tx_enabled) {
  82                 disable_irq(port->irq);
  83                 s->tx_enabled = 0;
  84         }
  85 }
  86
  87 static void uart_clps711x_start_tx(struct uart_port *port)
  88 {
  89         struct clps711x_port *s = dev_get_drvdata(port->dev);
  90
  91         if (!s->tx_enabled) {
  92                 s->tx_enabled = 1;
  93                 enable_irq(port->irq);
  94         }
  95 }
  96
  97 static irqreturn_t uart_clps711x_int_rx(int irq, void *dev_id)
  98 {
  99         struct uart_port *port = dev_id;
 100         struct clps711x_port *s = dev_get_drvdata(port->dev);
 101         unsigned int status, flg;
 102         u32 sysflg;
 103         u16 ch;
 104
 105         for (;;) {
 106                 regmap_read(s->syscon, SYSFLG_OFFSET, &sysflg);
 107                 if (sysflg & SYSFLG_URXFE)
 108                         break;
 109
 110                 ch = readw_relaxed(port->membase + UARTDR_OFFSET);
 111                 status = ch & (UARTDR_FRMERR | UARTDR_PARERR | UARTDR_OVERR);
 112                 ch &= 0xff;
 113
 114                 port->icount.rx++;
 115                 flg = TTY_NORMAL;
 116
 117                 if (unlikely(status)) {
 118                         if (status & UARTDR_PARERR)
 119                                 port->icount.parity++;
 120                         else if (status & UARTDR_FRMERR)
 121                                 port->icount.frame++;
 122                         else if (status & UARTDR_OVERR)
 123                                 port->icount.overrun++;
 124
 125                         status &= port->read_status_mask;
 126
 127                         if (status & UARTDR_PARERR)
 128                                 flg = TTY_PARITY;
 129                         else if (status & UARTDR_FRMERR)
 130                                 flg = TTY_FRAME;
 131                         else if (status & UARTDR_OVERR)
 132                                 flg = TTY_OVERRUN;
 133                 }
 134
 135                 if (uart_handle_sysrq_char(port, ch))
 136                         continue;
 137
 138                 if (status & port->ignore_status_mask)
 139                         continue;
 140
 141                 uart_insert_char(port, status, UARTDR_OVERR, ch, flg);
 142         }
 143
 144         tty_flip_buffer_push(&port->state->port);
 145
 146         return IRQ_HANDLED;
 147 }
 148
 149 static irqreturn_t uart_clps711x_int_tx(int irq, void *dev_id)
 150 {
 151         struct uart_port *port = dev_id;
 152         struct clps711x_port *s = dev_get_drvdata(port->dev);
 153         struct circ_buf *xmit = &port->state->xmit;
 154         u32 sysflg;
 155
 156         if (port->x_char) {
 157                 writew_relaxed(port->x_char, port->membase + UARTDR_OFFSET);
 158                 port->icount.tx++;
 159                 port->x_char = 0;
 160                 return IRQ_HANDLED;
 161         }
 162
 163         if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
 164                 if (s->tx_enabled) {
 165                         disable_irq_nosync(port->irq);
 166                         s->tx_enabled = 0;
 167                 }
 168                 return IRQ_HANDLED;
 169         }
 170
 171         while (!uart_circ_empty(xmit)) {
 172                 writew_relaxed(xmit->buf[xmit->tail],
 173                                port->membase + UARTDR_OFFSET);
 174                 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
 175                 port->icount.tx++;
 176
 177                 regmap_read(s->syscon, SYSFLG_OFFSET, &sysflg);
 178                 if (sysflg & SYSFLG_UTXFF)
 179                         break;
 180         }
 181
 182         if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
 183                 uart_write_wakeup(port);
 184
 185         return IRQ_HANDLED;
 186 }
 187
 188 static unsigned int uart_clps711x_tx_empty(struct uart_port *port)
 189 {
 190         struct clps711x_port *s = dev_get_drvdata(port->dev);
 191         u32 sysflg;
 192
 193         regmap_read(s->syscon, SYSFLG_OFFSET, &sysflg);
 194
 195         return (sysflg & SYSFLG_UBUSY) ? 0 : TIOCSER_TEMT;
 196 }
 197
 198 static unsigned int uart_clps711x_get_mctrl(struct uart_port *port)
 199 {
 200         struct clps711x_port *s = dev_get_drvdata(port->dev);
 201         unsigned int result = 0;
 202         u32 sysflg;
 203
 204         if (s->use_ms) {
 205                 regmap_read(s->syscon, SYSFLG_OFFSET, &sysflg);
 206                 if (sysflg & SYSFLG1_DCD)
 207                         result |= TIOCM_CAR;
 208                 if (sysflg & SYSFLG1_DSR)
 209                         result |= TIOCM_DSR;
 210                 if (sysflg & SYSFLG1_CTS)
 211                         result |= TIOCM_CTS;
 212         } else
 213                 result = TIOCM_DSR | TIOCM_CTS | TIOCM_CAR;
 214
 215         return result;
 216 }
 217
 218 static void uart_clps711x_set_mctrl(struct uart_port *port, unsigned int mctrl)
 219 {
 220         /* Do nothing */
 221 }
 222
 223 static void uart_clps711x_break_ctl(struct uart_port *port, int break_state)
 224 {
 225         unsigned int ubrlcr;
 226
 227         ubrlcr = readl_relaxed(port->membase + UBRLCR_OFFSET);
 228         if (break_state)
 229                 ubrlcr |= UBRLCR_BREAK;
 230         else
 231                 ubrlcr &= ~UBRLCR_BREAK;
 232         writel_relaxed(ubrlcr, port->membase + UBRLCR_OFFSET);
 233 }
 234
 235 static void uart_clps711x_set_ldisc(struct uart_port *port, int ld)
 236 {
 237         if (!port->line) {
 238                 struct clps711x_port *s = dev_get_drvdata(port->dev);
 239
 240                 regmap_update_bits(s->syscon, SYSCON_OFFSET, SYSCON1_SIREN,
 241                                    (ld == N_IRDA) ? SYSCON1_SIREN : 0);
 242         }
 243 }
 244
 245 static int uart_clps711x_startup(struct uart_port *port)
 246 {
 247         struct clps711x_port *s = dev_get_drvdata(port->dev);
 248
 249         /* Disable break */
 250         writel_relaxed(readl_relaxed(port->membase + UBRLCR_OFFSET) &
 251                        ~UBRLCR_BREAK, port->membase + UBRLCR_OFFSET);
 252
 253         /* Enable the port */
 254         return regmap_update_bits(s->syscon, SYSCON_OFFSET,
 255                                   SYSCON_UARTEN, SYSCON_UARTEN);
 256 }
 257
 258 static void uart_clps711x_shutdown(struct uart_port *port)
 259 {
 260         struct clps711x_port *s = dev_get_drvdata(port->dev);
 261
 262         /* Disable the port */
 263         regmap_update_bits(s->syscon, SYSCON_OFFSET, SYSCON_UARTEN, 0);
 264 }
 265
 266 static void uart_clps711x_set_termios(struct uart_port *port,
 267                                       struct ktermios *termios,
 268                                       struct ktermios *old)
 269 {
 270         u32 ubrlcr;
 271         unsigned int baud, quot;
 272
 273         /* Mask termios capabilities we don't support */
 274         termios->c_cflag &= ~CMSPAR;
 275         termios->c_iflag &= ~(BRKINT | IGNBRK);
 276
 277         /* Ask the core to calculate the divisor for us */
 278         baud = uart_get_baud_rate(port, termios, old, port->uartclk / 4096,
 279                                                       port->uartclk / 16);
 280         quot = uart_get_divisor(port, baud);
 281
 282         switch (termios->c_cflag & CSIZE) {
 283         case CS5:
 284                 ubrlcr = UBRLCR_WRDLEN5;
 285                 break;
 286         case CS6:
 287                 ubrlcr = UBRLCR_WRDLEN6;
 288                 break;
 289         case CS7:
 290                 ubrlcr = UBRLCR_WRDLEN7;
 291                 break;
 292         case CS8:
 293         default:
 294                 ubrlcr = UBRLCR_WRDLEN8;
 295                 break;
 296         }
 297
 298         if (termios->c_cflag & CSTOPB)
 299                 ubrlcr |= UBRLCR_XSTOP;
 300
 301         if (termios->c_cflag & PARENB) {
 302                 ubrlcr |= UBRLCR_PRTEN;
 303                 if (!(termios->c_cflag & PARODD))
 304                         ubrlcr |= UBRLCR_EVENPRT;
 305         }
 306
 307         /* Enable FIFO */
 308         ubrlcr |= UBRLCR_FIFOEN;
 309
 310         /* Set read status mask */
 311         port->read_status_mask = UARTDR_OVERR;
 312         if (termios->c_iflag & INPCK)
 313                 port->read_status_mask |= UARTDR_PARERR | UARTDR_FRMERR;
 314
 315         /* Set status ignore mask */
 316         port->ignore_status_mask = 0;
 317         if (!(termios->c_cflag & CREAD))
 318                 port->ignore_status_mask |= UARTDR_OVERR | UARTDR_PARERR |
 319                                             UARTDR_FRMERR;
 320
 321         uart_update_timeout(port, termios->c_cflag, baud);
 322
 323         writel_relaxed(ubrlcr | (quot - 1), port->membase + UBRLCR_OFFSET);
 324 }
 325
 326 static const char *uart_clps711x_type(struct uart_port *port)
 327 {
 328         return (port->type == PORT_CLPS711X) ? "CLPS711X" : NULL;
 329 }
 330
 331 static void uart_clps711x_config_port(struct uart_port *port, int flags)
 332 {
 333         if (flags & UART_CONFIG_TYPE)
 334                 port->type = PORT_CLPS711X;
 335 }
 336
 337 static void uart_clps711x_nop_void(struct uart_port *port)
 338 {
 339 }
 340
 341 static int uart_clps711x_nop_int(struct uart_port *port)
 342 {
 343         return 0;
 344 }
 345
 346 static const struct uart_ops uart_clps711x_ops = {
 347         .tx_empty       = uart_clps711x_tx_empty,
 348         .set_mctrl      = uart_clps711x_set_mctrl,
 349         .get_mctrl      = uart_clps711x_get_mctrl,
 350         .stop_tx        = uart_clps711x_stop_tx,
 351         .start_tx       = uart_clps711x_start_tx,
 352         .stop_rx        = uart_clps711x_nop_void,
 353         .enable_ms      = uart_clps711x_nop_void,
 354         .break_ctl      = uart_clps711x_break_ctl,
 355         .set_ldisc      = uart_clps711x_set_ldisc,
 356         .startup        = uart_clps711x_startup,
 357         .shutdown       = uart_clps711x_shutdown,
 358         .set_termios    = uart_clps711x_set_termios,
 359         .type           = uart_clps711x_type,
 360         .config_port    = uart_clps711x_config_port,
 361         .release_port   = uart_clps711x_nop_void,
 362         .request_port   = uart_clps711x_nop_int,
 363 };
 364
 365 #ifdef CONFIG_SERIAL_CLPS711X_CONSOLE
 366 static void uart_clps711x_console_putchar(struct uart_port *port, int ch)
 367 {
 368         struct clps711x_port *s = dev_get_drvdata(port->dev);
 369         u32 sysflg;
 370
 371         do {
 372                 regmap_read(s->syscon, SYSFLG_OFFSET, &sysflg);
 373         } while (sysflg & SYSFLG_UTXFF);
 374
 375         writew_relaxed(ch, port->membase + UARTDR_OFFSET);
 376 }
 377
 378 static void uart_clps711x_console_write(struct console *co, const char *c,
 379                                         unsigned n)
 380 {
 381         struct uart_port *port = clps711x_uart.state[co->index].uart_port;
 382         struct clps711x_port *s = dev_get_drvdata(port->dev);
 383         u32 sysflg;
 384
 385         uart_console_write(port, c, n, uart_clps711x_console_putchar);
 386
 387         /* Wait for transmitter to become empty */
 388         do {
 389                 regmap_read(s->syscon, SYSFLG_OFFSET, &sysflg);
 390         } while (sysflg & SYSFLG_UBUSY);
 391 }
 392
 393 static int uart_clps711x_console_setup(struct console *co, char *options)
 394 {
 395         int baud = 38400, bits = 8, parity = 'n', flow = 'n';
 396         int ret, index = co->index;
 397         struct clps711x_port *s;
 398         struct uart_port *port;
 399         u32 ubrlcr, syscon;
 400         unsigned int quot;
 401
 402         if (index < 0 || index >= UART_CLPS711X_NR)
 403                 return -EINVAL;
 404
 405         port = clps711x_uart.state[index].uart_port;
 406         if (!port)
 407                 return -ENODEV;
 408
 409         s = dev_get_drvdata(port->dev);
 410
 411         if (!options) {
 412                 regmap_read(s->syscon, SYSCON_OFFSET, &syscon);
 413                 if (syscon & SYSCON_UARTEN) {
 414                         ubrlcr = readl_relaxed(port->membase + UBRLCR_OFFSET);
 415
 416                         if (ubrlcr & UBRLCR_PRTEN) {
 417                                 if (ubrlcr & UBRLCR_EVENPRT)
 418                                         parity = 'e';
 419                                 else
 420                                         parity = 'o';
 421                         }
 422
 423                         if ((ubrlcr & UBRLCR_WRDLEN_MASK) == UBRLCR_WRDLEN7)
 424                                 bits = 7;
 425
 426                         quot = ubrlcr & UBRLCR_BAUD_MASK;
 427                         baud = port->uartclk / (16 * (quot + 1));
 428                 }
 429         } else
 430                 uart_parse_options(options, &baud, &parity, &bits, &flow);
 431
 432         ret = uart_set_options(port, co, baud, parity, bits, flow);
 433         if (ret)
 434                 return ret;
 435
 436         return regmap_update_bits(s->syscon, SYSCON_OFFSET,
 437                                   SYSCON_UARTEN, SYSCON_UARTEN);
 438 }
 439
 440 static struct console clps711x_console = {
 441         .name   = UART_CLPS711X_DEVNAME,
 442         .device = uart_console_device,
 443         .write  = uart_clps711x_console_write,
 444         .setup  = uart_clps711x_console_setup,
 445         .flags  = CON_PRINTBUFFER,
 446         .index  = -1,
 447 };
 448 #endif
 449
 450 static int uart_clps711x_probe(struct platform_device *pdev)
 451 {
 452         struct device_node *np = pdev->dev.of_node;
 453         int ret, index = np ? of_alias_get_id(np, "serial") : pdev->id;
 454         struct clps711x_port *s;
 455         struct resource *res;
 456         struct clk *uart_clk;
 457
 458         if (index < 0 || index >= UART_CLPS711X_NR)
 459                 return -EINVAL;
 460
 461         s = devm_kzalloc(&pdev->dev, sizeof(*s), GFP_KERNEL);
 462         if (!s)
 463                 return -ENOMEM;
 464
 465         uart_clk = devm_clk_get(&pdev->dev, NULL);
 466         if (IS_ERR(uart_clk))
 467                 return PTR_ERR(uart_clk);
 468
 469         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 470         s->port.membase = devm_ioremap_resource(&pdev->dev, res);
 471         if (IS_ERR(s->port.membase))
 472                 return PTR_ERR(s->port.membase);
 473
 474         s->port.irq = platform_get_irq(pdev, 0);
 475         if (IS_ERR_VALUE(s->port.irq))
 476                 return s->port.irq;
 477
 478         s->rx_irq = platform_get_irq(pdev, 1);
 479         if (IS_ERR_VALUE(s->rx_irq))
 480                 return s->rx_irq;
 481
 482         if (!np) {
 483                 char syscon_name[9];
 484
 485                 sprintf(syscon_name, "syscon.%i", index + 1);
 486                 s->syscon = syscon_regmap_lookup_by_pdevname(syscon_name);
 487                 if (IS_ERR(s->syscon))
 488                         return PTR_ERR(s->syscon);
 489
 490                 s->use_ms = !index;
 491         } else {
 492                 s->syscon = syscon_regmap_lookup_by_phandle(np, "syscon");
 493                 if (IS_ERR(s->syscon))
 494                         return PTR_ERR(s->syscon);
 495
 496                 if (!index)
 497                         s->use_ms = of_property_read_bool(np, "uart-use-ms");
 498         }
 499
 500         s->port.line            = index;
 501         s->port.dev             = &pdev->dev;
 502         s->port.iotype          = UPIO_MEM32;
 503         s->port.mapbase         = res->start;
 504         s->port.type            = PORT_CLPS711X;
 505         s->port.fifosize        = 16;
 506         s->port.flags           = UPF_SKIP_TEST | UPF_FIXED_TYPE;
 507         s->port.uartclk         = clk_get_rate(uart_clk);
 508         s->port.ops             = &uart_clps711x_ops;
 509
 510         platform_set_drvdata(pdev, s);
 511
 512         ret = uart_add_one_port(&clps711x_uart, &s->port);
 513         if (ret)
 514                 return ret;
 515
 516         /* Disable port */
 517         if (!uart_console(&s->port))
 518                 regmap_update_bits(s->syscon, SYSCON_OFFSET, SYSCON_UARTEN, 0);
 519
 520         s->tx_enabled = 1;
 521
 522         ret = devm_request_irq(&pdev->dev, s->port.irq, uart_clps711x_int_tx, 0,
 523                                dev_name(&pdev->dev), &s->port);
 524         if (ret) {
 525                 uart_remove_one_port(&clps711x_uart, &s->port);
 526                 return ret;
 527         }
 528
 529         ret = devm_request_irq(&pdev->dev, s->rx_irq, uart_clps711x_int_rx, 0,
 530                                dev_name(&pdev->dev), &s->port);
 531         if (ret)
 532                 uart_remove_one_port(&clps711x_uart, &s->port);
 533
 534         return ret;
 535 }
 536
 537 static int uart_clps711x_remove(struct platform_device *pdev)
 538 {
 539         struct clps711x_port *s = platform_get_drvdata(pdev);
 540
 541         return uart_remove_one_port(&clps711x_uart, &s->port);
 542 }
 543
 544 static const struct of_device_id __maybe_unused clps711x_uart_dt_ids[] = {
 545         { .compatible = "cirrus,clps711x-uart", },
 546         { }
 547 };
 548 MODULE_DEVICE_TABLE(of, clps711x_uart_dt_ids);
 549
 550 static struct platform_driver clps711x_uart_platform = {
 551         .driver = {
 552                 .name           = "clps711x-uart",
 553                 .owner          = THIS_MODULE,
 554                 .of_match_table = of_match_ptr(clps711x_uart_dt_ids),
 555         },
 556         .probe  = uart_clps711x_probe,
 557         .remove = uart_clps711x_remove,
 558 };
 559
 560 static int __init uart_clps711x_init(void)
 561 {
 562         int ret;
 563
 564 #ifdef CONFIG_SERIAL_CLPS711X_CONSOLE
 565         clps711x_uart.cons = &clps711x_console;
 566         clps711x_console.data = &clps711x_uart;
 567 #endif
 568
 569         ret = uart_register_driver(&clps711x_uart);
 570         if (ret)
 571                 return ret;
 572
 573         return platform_driver_register(&clps711x_uart_platform);
 574 }
 575 module_init(uart_clps711x_init);
 576
 577 static void __exit uart_clps711x_exit(void)
 578 {
 579         platform_driver_unregister(&clps711x_uart_platform);
 580         uart_unregister_driver(&clps711x_uart);
 581 }
 582 module_exit(uart_clps711x_exit);
 583
 584 MODULE_AUTHOR("Deep Blue Solutions Ltd");
 585 MODULE_DESCRIPTION("CLPS711X serial driver");
 586 MODULE_LICENSE("GPL");