drivers/tty/serial/clps711x.c

   1 /*
   2  *  Driver for CLPS711x serial ports
   3  *
   4  *  Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
   5  *
   6  *  Copyright 1999 ARM Limited
   7  *  Copyright (C) 2000 Deep Blue Solutions Ltd.
   8  *
   9  * This program is free software; you can redistribute it and/or modify
  10  * it under the terms of the GNU General Public License as published by
  11  * the Free Software Foundation; either version 2 of the License, or
  12  * (at your option) any later version.
  13  */
  14
  15 #if defined(CONFIG_SERIAL_CLPS711X_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
  16 #define SUPPORT_SYSRQ
  17 #endif
  18
  19 #include <linux/module.h>
  20 #include <linux/device.h>
  21 #include <linux/console.h>
  22 #include <linux/serial_core.h>
  23 #include <linux/serial.h>
  24 #include <linux/io.h>
  25 #include <linux/clk.h>
  26 #include <linux/tty.h>
  27 #include <linux/tty_flip.h>
  28 #include <linux/ioport.h>
  29 #include <linux/platform_device.h>
  30
  31 #include <mach/hardware.h>
  32
  33 #define UART_CLPS711X_NAME      "uart-clps711x"
  34 #define UART_CLPS711X_NR        2
  35 #define UART_CLPS711X_MAJOR     204
  36 #define UART_CLPS711X_MINOR     40
  37
  38 #define UBRLCR(port)            ((port)->line ? UBRLCR2 : UBRLCR1)
  39 #define UARTDR(port)            ((port)->line ? UARTDR2 : UARTDR1)
  40 #define SYSFLG(port)            ((port)->line ? SYSFLG2 : SYSFLG1)
  41 #define SYSCON(port)            ((port)->line ? SYSCON2 : SYSCON1)
  42 #define TX_IRQ(port)            ((port)->line ? IRQ_UTXINT2 : IRQ_UTXINT1)
  43 #define RX_IRQ(port)            ((port)->line ? IRQ_URXINT2 : IRQ_URXINT1)
  44
  45 struct clps711x_port {
  46         struct uart_driver      uart;
  47         struct clk              *uart_clk;
  48         struct uart_port        port[UART_CLPS711X_NR];
  49         int                     tx_enabled[UART_CLPS711X_NR];
  50 #ifdef CONFIG_SERIAL_CLPS711X_CONSOLE
  51         struct console          console;
  52 #endif
  53 };
  54
  55 static void uart_clps711x_stop_tx(struct uart_port *port)
  56 {
  57         struct clps711x_port *s = dev_get_drvdata(port->dev);
  58
  59         if (s->tx_enabled[port->line]) {
  60                 disable_irq(TX_IRQ(port));
  61                 s->tx_enabled[port->line] = 0;
  62         }
  63 }
  64
  65 static void uart_clps711x_start_tx(struct uart_port *port)
  66 {
  67         struct clps711x_port *s = dev_get_drvdata(port->dev);
  68
  69         if (!s->tx_enabled[port->line]) {
  70                 enable_irq(TX_IRQ(port));
  71                 s->tx_enabled[port->line] = 1;
  72         }
  73 }
  74
  75 static void uart_clps711x_stop_rx(struct uart_port *port)
  76 {
  77         disable_irq(RX_IRQ(port));
  78 }
  79
  80 static void uart_clps711x_enable_ms(struct uart_port *port)
  81 {
  82         /* Do nothing */
  83 }
  84
  85 static irqreturn_t uart_clps711x_int_rx(int irq, void *dev_id)
  86 {
  87         struct uart_port *port = dev_id;
  88         struct tty_struct *tty = tty_port_tty_get(&port->state->port);
  89         unsigned int status, ch, flg;
  90
  91         if (!tty)
  92                 return IRQ_HANDLED;
  93
  94         for (;;) {
  95                 status = clps_readl(SYSFLG(port));
  96                 if (status & SYSFLG_URXFE)
  97                         break;
  98
  99                 ch = clps_readw(UARTDR(port));
 100                 status = ch & (UARTDR_FRMERR | UARTDR_PARERR | UARTDR_OVERR);
 101                 ch &= 0xff;
 102
 103                 port->icount.rx++;
 104                 flg = TTY_NORMAL;
 105
 106                 if (unlikely(status)) {
 107                         if (status & UARTDR_PARERR)
 108                                 port->icount.parity++;
 109                         else if (status & UARTDR_FRMERR)
 110                                 port->icount.frame++;
 111                         else if (status & UARTDR_OVERR)
 112                                 port->icount.overrun++;
 113
 114                         status &= port->read_status_mask;
 115
 116                         if (status & UARTDR_PARERR)
 117                                 flg = TTY_PARITY;
 118                         else if (status & UARTDR_FRMERR)
 119                                 flg = TTY_FRAME;
 120                         else if (status & UARTDR_OVERR)
 121                                 flg = TTY_OVERRUN;
 122                 }
 123
 124                 if (uart_handle_sysrq_char(port, ch))
 125                         continue;
 126
 127                 if (status & port->ignore_status_mask)
 128                         continue;
 129
 130                 uart_insert_char(port, status, UARTDR_OVERR, ch, flg);
 131         }
 132
 133         tty_flip_buffer_push(tty);
 134
 135         tty_kref_put(tty);
 136
 137         return IRQ_HANDLED;
 138 }
 139
 140 static irqreturn_t uart_clps711x_int_tx(int irq, void *dev_id)
 141 {
 142         struct uart_port *port = dev_id;
 143         struct clps711x_port *s = dev_get_drvdata(port->dev);
 144         struct circ_buf *xmit = &port->state->xmit;
 145
 146         if (port->x_char) {
 147                 clps_writew(port->x_char, UARTDR(port));
 148                 port->icount.tx++;
 149                 port->x_char = 0;
 150                 return IRQ_HANDLED;
 151         }
 152
 153         if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
 154                 disable_irq_nosync(TX_IRQ(port));
 155                 s->tx_enabled[port->line] = 0;
 156                 return IRQ_HANDLED;
 157         }
 158
 159         while (!uart_circ_empty(xmit)) {
 160                 clps_writew(xmit->buf[xmit->tail], UARTDR(port));
 161                 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
 162                 port->icount.tx++;
 163                 if (clps_readl(SYSFLG(port) & SYSFLG_UTXFF))
 164                         break;
 165         }
 166
 167         if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
 168                 uart_write_wakeup(port);
 169
 170         return IRQ_HANDLED;
 171 }
 172
 173 static unsigned int uart_clps711x_tx_empty(struct uart_port *port)
 174 {
 175         return (clps_readl(SYSFLG(port) & SYSFLG_UBUSY)) ? 0 : TIOCSER_TEMT;
 176 }
 177
 178 static unsigned int uart_clps711x_get_mctrl(struct uart_port *port)
 179 {
 180         unsigned int status, result = 0;
 181
 182         if (port->line == 0) {
 183                 status = clps_readl(SYSFLG1);
 184                 if (status & SYSFLG1_DCD)
 185                         result |= TIOCM_CAR;
 186                 if (status & SYSFLG1_DSR)
 187                         result |= TIOCM_DSR;
 188                 if (status & SYSFLG1_CTS)
 189                         result |= TIOCM_CTS;
 190         } else
 191                 result = TIOCM_DSR | TIOCM_CTS | TIOCM_CAR;
 192
 193         return result;
 194 }
 195
 196 static void uart_clps711x_set_mctrl(struct uart_port *port, unsigned int mctrl)
 197 {
 198         /* Do nothing */
 199 }
 200
 201 static void uart_clps711x_break_ctl(struct uart_port *port, int break_state)
 202 {
 203         unsigned long flags;
 204         unsigned int ubrlcr;
 205
 206         spin_lock_irqsave(&port->lock, flags);
 207
 208         ubrlcr = clps_readl(UBRLCR(port));
 209         if (break_state)
 210                 ubrlcr |= UBRLCR_BREAK;
 211         else
 212                 ubrlcr &= ~UBRLCR_BREAK;
 213         clps_writel(ubrlcr, UBRLCR(port));
 214
 215         spin_unlock_irqrestore(&port->lock, flags);
 216 }
 217
 218 static int uart_clps711x_startup(struct uart_port *port)
 219 {
 220         struct clps711x_port *s = dev_get_drvdata(port->dev);
 221         int ret;
 222
 223         s->tx_enabled[port->line] = 1;
 224         /* Allocate the IRQs */
 225         ret = devm_request_irq(port->dev, TX_IRQ(port), uart_clps711x_int_tx,
 226                                0, UART_CLPS711X_NAME " TX", port);
 227         if (ret)
 228                 return ret;
 229
 230         ret = devm_request_irq(port->dev, RX_IRQ(port), uart_clps711x_int_rx,
 231                                0, UART_CLPS711X_NAME " RX", port);
 232         if (ret) {
 233                 devm_free_irq(port->dev, TX_IRQ(port), port);
 234                 return ret;
 235         }
 236
 237         /* Disable break */
 238         clps_writel(clps_readl(UBRLCR(port)) & ~UBRLCR_BREAK, UBRLCR(port));
 239
 240         /* Enable the port */
 241         clps_writel(clps_readl(SYSCON(port)) | SYSCON_UARTEN, SYSCON(port));
 242
 243         return 0;
 244 }
 245
 246 static void uart_clps711x_shutdown(struct uart_port *port)
 247 {
 248         /* Free the interrupts */
 249         devm_free_irq(port->dev, TX_IRQ(port), port);
 250         devm_free_irq(port->dev, RX_IRQ(port), port);
 251
 252         /* Disable the port */
 253         clps_writel(clps_readl(SYSCON(port)) & ~SYSCON_UARTEN, SYSCON(port));
 254 }
 255
 256 static void uart_clps711x_set_termios(struct uart_port *port,
 257                                       struct ktermios *termios,
 258                                       struct ktermios *old)
 259 {
 260         unsigned int ubrlcr, baud, quot;
 261         unsigned long flags;
 262
 263         /* Mask termios capabilities we don't support */
 264         termios->c_cflag &= ~CMSPAR;
 265         termios->c_iflag &= ~(BRKINT | IGNBRK);
 266
 267         /* Ask the core to calculate the divisor for us */
 268         baud = uart_get_baud_rate(port, termios, old, port->uartclk / 4096,
 269                                                       port->uartclk / 16);
 270         quot = uart_get_divisor(port, baud);
 271
 272         switch (termios->c_cflag & CSIZE) {
 273         case CS5:
 274                 ubrlcr = UBRLCR_WRDLEN5;
 275                 break;
 276         case CS6:
 277                 ubrlcr = UBRLCR_WRDLEN6;
 278                 break;
 279         case CS7:
 280                 ubrlcr = UBRLCR_WRDLEN7;
 281                 break;
 282         case CS8:
 283         default:
 284                 ubrlcr = UBRLCR_WRDLEN8;
 285                 break;
 286         }
 287
 288         if (termios->c_cflag & CSTOPB)
 289                 ubrlcr |= UBRLCR_XSTOP;
 290
 291         if (termios->c_cflag & PARENB) {
 292                 ubrlcr |= UBRLCR_PRTEN;
 293                 if (!(termios->c_cflag & PARODD))
 294                         ubrlcr |= UBRLCR_EVENPRT;
 295         }
 296
 297         /* Enable FIFO */
 298         ubrlcr |= UBRLCR_FIFOEN;
 299
 300         spin_lock_irqsave(&port->lock, flags);
 301
 302         /* Set read status mask */
 303         port->read_status_mask = UARTDR_OVERR;
 304         if (termios->c_iflag & INPCK)
 305                 port->read_status_mask |= UARTDR_PARERR | UARTDR_FRMERR;
 306
 307         /* Set status ignore mask */
 308         port->ignore_status_mask = 0;
 309         if (!(termios->c_cflag & CREAD))
 310                 port->ignore_status_mask |= UARTDR_OVERR | UARTDR_PARERR |
 311                                             UARTDR_FRMERR;
 312
 313         uart_update_timeout(port, termios->c_cflag, baud);
 314
 315         clps_writel(ubrlcr | (quot - 1), UBRLCR(port));
 316
 317         spin_unlock_irqrestore(&port->lock, flags);
 318 }
 319
 320 static const char *uart_clps711x_type(struct uart_port *port)
 321 {
 322         return (port->type == PORT_CLPS711X) ? "CLPS711X" : NULL;
 323 }
 324
 325 static void uart_clps711x_config_port(struct uart_port *port, int flags)
 326 {
 327         if (flags & UART_CONFIG_TYPE)
 328                 port->type = PORT_CLPS711X;
 329 }
 330
 331 static void uart_clps711x_release_port(struct uart_port *port)
 332 {
 333         /* Do nothing */
 334 }
 335
 336 static int uart_clps711x_request_port(struct uart_port *port)
 337 {
 338         /* Do nothing */
 339         return 0;
 340 }
 341
 342 static const struct uart_ops uart_clps711x_ops = {
 343         .tx_empty       = uart_clps711x_tx_empty,
 344         .set_mctrl      = uart_clps711x_set_mctrl,
 345         .get_mctrl      = uart_clps711x_get_mctrl,
 346         .stop_tx        = uart_clps711x_stop_tx,
 347         .start_tx       = uart_clps711x_start_tx,
 348         .stop_rx        = uart_clps711x_stop_rx,
 349         .enable_ms      = uart_clps711x_enable_ms,
 350         .break_ctl      = uart_clps711x_break_ctl,
 351         .startup        = uart_clps711x_startup,
 352         .shutdown       = uart_clps711x_shutdown,
 353         .set_termios    = uart_clps711x_set_termios,
 354         .type           = uart_clps711x_type,
 355         .config_port    = uart_clps711x_config_port,
 356         .release_port   = uart_clps711x_release_port,
 357         .request_port   = uart_clps711x_request_port,
 358 };
 359
 360 #ifdef CONFIG_SERIAL_CLPS711X_CONSOLE
 361 static void uart_clps711x_console_putchar(struct uart_port *port, int ch)
 362 {
 363         while (clps_readl(SYSFLG(port)) & SYSFLG_UTXFF)
 364                 barrier();
 365
 366         clps_writew(ch, UARTDR(port));
 367 }
 368
 369 static void uart_clps711x_console_write(struct console *co, const char *c,
 370                                         unsigned n)
 371 {
 372         struct clps711x_port *s = (struct clps711x_port *)co->data;
 373         struct uart_port *port = &s->port[co->index];
 374         u32 syscon;
 375
 376         /* Ensure that the port is enabled */
 377         syscon = clps_readl(SYSCON(port));
 378         clps_writel(syscon | SYSCON_UARTEN, SYSCON(port));
 379
 380         uart_console_write(port, c, n, uart_clps711x_console_putchar);
 381
 382         /* Wait for transmitter to become empty */
 383         while (clps_readl(SYSFLG(port)) & SYSFLG_UBUSY)
 384                 barrier();
 385
 386         /* Restore the uart state */
 387         clps_writel(syscon, SYSCON(port));
 388 }
 389
 390 static void uart_clps711x_console_get_options(struct uart_port *port,
 391                                               int *baud, int *parity,
 392                                               int *bits)
 393 {
 394         if (clps_readl(SYSCON(port)) & SYSCON_UARTEN) {
 395                 unsigned int ubrlcr, quot;
 396
 397                 ubrlcr = clps_readl(UBRLCR(port));
 398
 399                 *parity = 'n';
 400                 if (ubrlcr & UBRLCR_PRTEN) {
 401                         if (ubrlcr & UBRLCR_EVENPRT)
 402                                 *parity = 'e';
 403                         else
 404                                 *parity = 'o';
 405                 }
 406
 407                 if ((ubrlcr & UBRLCR_WRDLEN_MASK) == UBRLCR_WRDLEN7)
 408                         *bits = 7;
 409                 else
 410                         *bits = 8;
 411
 412                 quot = ubrlcr & UBRLCR_BAUD_MASK;
 413                 *baud = port->uartclk / (16 * (quot + 1));
 414         }
 415 }
 416
 417 static int uart_clps711x_console_setup(struct console *co, char *options)
 418 {
 419         int baud = 38400, bits = 8, parity = 'n', flow = 'n';
 420         struct clps711x_port *s = (struct clps711x_port *)co->data;
 421         struct uart_port *port = &s->port[(co->index > 0) ? co->index : 0];
 422
 423         if (options)
 424                 uart_parse_options(options, &baud, &parity, &bits, &flow);
 425         else
 426                 uart_clps711x_console_get_options(port, &baud, &parity, &bits);
 427
 428         return uart_set_options(port, co, baud, parity, bits, flow);
 429 }
 430 #endif
 431
 432 static int uart_clps711x_probe(struct platform_device *pdev)
 433 {
 434         struct clps711x_port *s;
 435         int ret, i;
 436
 437         s = devm_kzalloc(&pdev->dev, sizeof(struct clps711x_port), GFP_KERNEL);
 438         if (!s) {
 439                 dev_err(&pdev->dev, "Error allocating port structure\n");
 440                 return -ENOMEM;
 441         }
 442         platform_set_drvdata(pdev, s);
 443
 444         s->uart_clk = devm_clk_get(&pdev->dev, "uart");
 445         if (IS_ERR(s->uart_clk)) {
 446                 dev_err(&pdev->dev, "Can't get UART clocks\n");
 447                 ret = PTR_ERR(s->uart_clk);
 448                 goto err_out;
 449         }
 450
 451         s->uart.owner           = THIS_MODULE;
 452         s->uart.dev_name        = "ttyCL";
 453         s->uart.major           = UART_CLPS711X_MAJOR;
 454         s->uart.minor           = UART_CLPS711X_MINOR;
 455         s->uart.nr              = UART_CLPS711X_NR;
 456 #ifdef CONFIG_SERIAL_CLPS711X_CONSOLE
 457         s->uart.cons            = &s->console;
 458         s->uart.cons->device    = uart_console_device;
 459         s->uart.cons->write     = uart_clps711x_console_write;
 460         s->uart.cons->setup     = uart_clps711x_console_setup;
 461         s->uart.cons->flags     = CON_PRINTBUFFER;
 462         s->uart.cons->index     = -1;
 463         s->uart.cons->data      = s;
 464         strcpy(s->uart.cons->name, "ttyCL");
 465 #endif
 466         ret = uart_register_driver(&s->uart);
 467         if (ret) {
 468                 dev_err(&pdev->dev, "Registering UART driver failed\n");
 469                 devm_clk_put(&pdev->dev, s->uart_clk);
 470                 goto err_out;
 471         }
 472
 473         for (i = 0; i < UART_CLPS711X_NR; i++) {
 474                 s->port[i].line         = i;
 475                 s->port[i].dev          = &pdev->dev;
 476                 s->port[i].irq          = TX_IRQ(&s->port[i]);
 477                 s->port[i].iobase       = SYSCON(&s->port[i]);
 478                 s->port[i].type         = PORT_CLPS711X;
 479                 s->port[i].fifosize     = 16;
 480                 s->port[i].flags        = UPF_SKIP_TEST | UPF_FIXED_TYPE;
 481                 s->port[i].uartclk      = clk_get_rate(s->uart_clk);
 482                 s->port[i].ops          = &uart_clps711x_ops;
 483                 WARN_ON(uart_add_one_port(&s->uart, &s->port[i]));
 484         }
 485
 486         return 0;
 487
 488 err_out:
 489         platform_set_drvdata(pdev, NULL);
 490
 491         return ret;
 492 }
 493
 494 static int uart_clps711x_remove(struct platform_device *pdev)
 495 {
 496         struct clps711x_port *s = platform_get_drvdata(pdev);
 497         int i;
 498
 499         for (i = 0; i < UART_CLPS711X_NR; i++)
 500                 uart_remove_one_port(&s->uart, &s->port[i]);
 501
 502         devm_clk_put(&pdev->dev, s->uart_clk);
 503         uart_unregister_driver(&s->uart);
 504         platform_set_drvdata(pdev, NULL);
 505
 506         return 0;
 507 }
 508
 509 static struct platform_driver clps711x_uart_driver = {
 510         .driver = {
 511                 .name   = UART_CLPS711X_NAME,
 512                 .owner  = THIS_MODULE,
 513         },
 514         .probe  = uart_clps711x_probe,
 515         .remove = uart_clps711x_remove,
 516 };
 517 module_platform_driver(clps711x_uart_driver);
 518
 519 static struct platform_device clps711x_uart_device = {
 520         .name   = UART_CLPS711X_NAME,
 521 };
 522
 523 static int __init uart_clps711x_init(void)
 524 {
 525         return platform_device_register(&clps711x_uart_device);
 526 }
 527 module_init(uart_clps711x_init);
 528
 529 static void __exit uart_clps711x_exit(void)
 530 {
 531         platform_device_unregister(&clps711x_uart_device);
 532 }
 533 module_exit(uart_clps711x_exit);
 534
 535 MODULE_AUTHOR("Deep Blue Solutions Ltd");
 536 MODULE_DESCRIPTION("CLPS711X serial driver");
 537 MODULE_LICENSE("GPL");