1 #include <linux/module.h>
2 #include <linux/init.h>
3 #include <linux/console.h>
4 #include <linux/platform_device.h>
5 #include <linux/serial_core.h>
6 #include <linux/tty_flip.h>
8 #include <linux/gpio.h>
9 #include <linux/of_irq.h>
10 #include <linux/of_address.h>
11 #include <hwregs/ser_defs.h>
13 #include "serial_mctrl_gpio.h"
15 #define DRV_NAME "etraxfs-uart"
16 #define UART_NR CONFIG_ETRAX_SERIAL_PORTS
18 #define MODIFY_REG(instance, reg, var) \
20 if (REG_RD_INT(ser, instance, reg) != \
21 REG_TYPE_CONV(int, reg_ser_##reg, var)) \
22 REG_WR(ser, instance, reg, var); \
25 struct uart_cris_port {
26 struct uart_port port;
31 void __iomem *regi_ser;
33 struct mctrl_gpios *gpios;
38 static struct uart_driver etraxfs_uart_driver;
39 static struct uart_port *console_port;
40 static int console_baud = 115200;
41 static struct uart_cris_port *etraxfs_uart_ports[UART_NR];
43 static void cris_serial_port_init(struct uart_port *port, int line);
44 static void etraxfs_uart_stop_rx(struct uart_port *port);
45 static inline void etraxfs_uart_start_tx_bottom(struct uart_port *port);
47 #ifdef CONFIG_SERIAL_ETRAXFS_CONSOLE
49 cris_console_write(struct console *co, const char *s, unsigned int count)
51 struct uart_cris_port *up;
53 reg_ser_r_stat_din stat;
54 reg_ser_rw_tr_dma_en tr_dma_en, old;
56 up = etraxfs_uart_ports[co->index];
61 /* Switch to manual mode. */
62 tr_dma_en = old = REG_RD(ser, up->regi_ser, rw_tr_dma_en);
63 if (tr_dma_en.en == regk_ser_yes) {
64 tr_dma_en.en = regk_ser_no;
65 REG_WR(ser, up->regi_ser, rw_tr_dma_en, tr_dma_en);
69 for (i = 0; i < count; i++) {
73 stat = REG_RD(ser, up->regi_ser, r_stat_din);
74 } while (!stat.tr_rdy);
75 REG_WR_INT(ser, up->regi_ser, rw_dout, '\r');
77 /* Wait until transmitter is ready and send. */
79 stat = REG_RD(ser, up->regi_ser, r_stat_din);
80 } while (!stat.tr_rdy);
81 REG_WR_INT(ser, up->regi_ser, rw_dout, s[i]);
85 if (tr_dma_en.en != old.en)
86 REG_WR(ser, up->regi_ser, rw_tr_dma_en, old);
90 cris_console_setup(struct console *co, char *options)
92 struct uart_port *port;
98 if (co->index < 0 || co->index >= UART_NR)
100 port = &etraxfs_uart_ports[co->index]->port;
103 co->flags |= CON_CONSDEV;
106 uart_parse_options(options, &baud, &parity, &bits, &flow);
108 cris_serial_port_init(port, co->index);
109 uart_set_options(port, co, baud, parity, bits, flow);
114 static struct console cris_console = {
116 .write = cris_console_write,
117 .device = uart_console_device,
118 .setup = cris_console_setup,
119 .flags = CON_PRINTBUFFER,
121 .data = &etraxfs_uart_driver,
123 #endif /* CONFIG_SERIAL_ETRAXFS_CONSOLE */
125 static struct uart_driver etraxfs_uart_driver = {
126 .owner = THIS_MODULE,
127 .driver_name = "serial",
132 #ifdef CONFIG_SERIAL_ETRAXFS_CONSOLE
133 .cons = &cris_console,
134 #endif /* CONFIG_SERIAL_ETRAXFS_CONSOLE */
137 static inline int crisv32_serial_get_rts(struct uart_cris_port *up)
139 void __iomem *regi_ser = up->regi_ser;
141 * Return what the user has controlled rts to or
142 * what the pin is? (if auto_rts is used it differs during tx)
144 reg_ser_r_stat_din rstat = REG_RD(ser, regi_ser, r_stat_din);
146 return !(rstat.rts_n == regk_ser_active);
150 * A set = 0 means 3.3V on the pin, bitvalue: 0=active, 1=inactive
153 static inline void crisv32_serial_set_rts(struct uart_cris_port *up,
156 void __iomem *regi_ser = up->regi_ser;
159 reg_ser_rw_rec_ctrl rec_ctrl;
161 local_irq_save(flags);
162 rec_ctrl = REG_RD(ser, regi_ser, rw_rec_ctrl);
165 rec_ctrl.rts_n = regk_ser_active;
167 rec_ctrl.rts_n = regk_ser_inactive;
168 REG_WR(ser, regi_ser, rw_rec_ctrl, rec_ctrl);
169 local_irq_restore(flags);
172 static inline int crisv32_serial_get_cts(struct uart_cris_port *up)
174 void __iomem *regi_ser = up->regi_ser;
175 reg_ser_r_stat_din rstat = REG_RD(ser, regi_ser, r_stat_din);
177 return (rstat.cts_n == regk_ser_active);
181 * Send a single character for XON/XOFF purposes. We do it in this separate
182 * function instead of the alternative support port.x_char, in the ...start_tx
183 * function, so we don't mix up this case with possibly enabling transmission
184 * of queued-up data (in case that's disabled after *receiving* an XOFF or
185 * negative CTS). This function is used for both DMA and non-DMA case; see HW
186 * docs specifically blessing sending characters manually when DMA for
187 * transmission is enabled and running. We may be asked to transmit despite
188 * the transmitter being disabled by a ..._stop_tx call so we need to enable
189 * it temporarily but restore the state afterwards.
191 static void etraxfs_uart_send_xchar(struct uart_port *port, char ch)
193 struct uart_cris_port *up = (struct uart_cris_port *)port;
194 reg_ser_rw_dout dout = { .data = ch };
195 reg_ser_rw_ack_intr ack_intr = { .tr_rdy = regk_ser_yes };
196 reg_ser_r_stat_din rstat;
197 reg_ser_rw_tr_ctrl prev_tr_ctrl, tr_ctrl;
198 void __iomem *regi_ser = up->regi_ser;
202 * Wait for tr_rdy in case a character is already being output. Make
203 * sure we have integrity between the register reads and the writes
204 * below, but don't busy-wait with interrupts off and the port lock
207 spin_lock_irqsave(&port->lock, flags);
209 spin_unlock_irqrestore(&port->lock, flags);
210 spin_lock_irqsave(&port->lock, flags);
211 prev_tr_ctrl = tr_ctrl = REG_RD(ser, regi_ser, rw_tr_ctrl);
212 rstat = REG_RD(ser, regi_ser, r_stat_din);
213 } while (!rstat.tr_rdy);
216 * Ack an interrupt if one was just issued for the previous character
217 * that was output. This is required for non-DMA as the interrupt is
218 * used as the only indicator that the transmitter is ready and it
219 * isn't while this x_char is being transmitted.
221 REG_WR(ser, regi_ser, rw_ack_intr, ack_intr);
223 /* Enable the transmitter in case it was disabled. */
225 REG_WR(ser, regi_ser, rw_tr_ctrl, tr_ctrl);
228 * Finally, send the blessed character; nothing should stop it now,
229 * except for an xoff-detected state, which we'll handle below.
231 REG_WR(ser, regi_ser, rw_dout, dout);
232 up->port.icount.tx++;
234 /* There might be an xoff state to clear. */
235 rstat = REG_RD(ser, up->regi_ser, r_stat_din);
238 * Clear any xoff state that *may* have been there to
239 * inhibit transmission of the character.
241 if (rstat.xoff_detect) {
242 reg_ser_rw_xoff_clr xoff_clr = { .clr = 1 };
243 reg_ser_rw_tr_dma_en tr_dma_en;
245 REG_WR(ser, regi_ser, rw_xoff_clr, xoff_clr);
246 tr_dma_en = REG_RD(ser, regi_ser, rw_tr_dma_en);
249 * If we had an xoff state but cleared it, instead sneak in a
250 * disabled state for the transmitter, after the character we
251 * sent. Thus we keep the port disabled, just as if the xoff
252 * state was still in effect (or actually, as if stop_tx had
253 * been called, as we stop DMA too).
255 prev_tr_ctrl.stop = 1;
258 REG_WR(ser, regi_ser, rw_tr_dma_en, tr_dma_en);
261 /* Restore "previous" enabled/disabled state of the transmitter. */
262 REG_WR(ser, regi_ser, rw_tr_ctrl, prev_tr_ctrl);
264 spin_unlock_irqrestore(&port->lock, flags);
268 * Do not spin_lock_irqsave or disable interrupts by other means here; it's
269 * already done by the caller.
271 static void etraxfs_uart_start_tx(struct uart_port *port)
273 struct uart_cris_port *up = (struct uart_cris_port *)port;
275 /* we have already done below if a write is ongoing */
276 if (up->write_ongoing)
279 /* Signal that write is ongoing */
280 up->write_ongoing = 1;
282 etraxfs_uart_start_tx_bottom(port);
285 static inline void etraxfs_uart_start_tx_bottom(struct uart_port *port)
287 struct uart_cris_port *up = (struct uart_cris_port *)port;
288 void __iomem *regi_ser = up->regi_ser;
289 reg_ser_rw_tr_ctrl tr_ctrl;
290 reg_ser_rw_intr_mask intr_mask;
292 tr_ctrl = REG_RD(ser, regi_ser, rw_tr_ctrl);
293 tr_ctrl.stop = regk_ser_no;
294 REG_WR(ser, regi_ser, rw_tr_ctrl, tr_ctrl);
295 intr_mask = REG_RD(ser, regi_ser, rw_intr_mask);
296 intr_mask.tr_rdy = regk_ser_yes;
297 REG_WR(ser, regi_ser, rw_intr_mask, intr_mask);
301 * This function handles both the DMA and non-DMA case by ordering the
302 * transmitter to stop of after the current character. We don't need to wait
303 * for any such character to be completely transmitted; we do that where it
304 * matters, like in etraxfs_uart_set_termios. Don't busy-wait here; see
305 * Documentation/serial/driver: this function is called within
306 * spin_lock_irq{,save} and thus separate ones would be disastrous (when SMP).
307 * There's no documented need to set the txd pin to any particular value;
308 * break setting is controlled solely by etraxfs_uart_break_ctl.
310 static void etraxfs_uart_stop_tx(struct uart_port *port)
312 struct uart_cris_port *up = (struct uart_cris_port *)port;
313 void __iomem *regi_ser = up->regi_ser;
314 reg_ser_rw_tr_ctrl tr_ctrl;
315 reg_ser_rw_intr_mask intr_mask;
316 reg_ser_rw_tr_dma_en tr_dma_en = {0};
317 reg_ser_rw_xoff_clr xoff_clr = {0};
320 * For the non-DMA case, we'd get a tr_rdy interrupt that we're not
321 * interested in as we're not transmitting any characters. For the
322 * DMA case, that interrupt is already turned off, but no reason to
323 * waste code on conditionals here.
325 intr_mask = REG_RD(ser, regi_ser, rw_intr_mask);
326 intr_mask.tr_rdy = regk_ser_no;
327 REG_WR(ser, regi_ser, rw_intr_mask, intr_mask);
329 tr_ctrl = REG_RD(ser, regi_ser, rw_tr_ctrl);
331 REG_WR(ser, regi_ser, rw_tr_ctrl, tr_ctrl);
334 * Always clear possible hardware xoff-detected state here, no need to
335 * unnecessary consider mctrl settings and when they change. We clear
336 * it here rather than in start_tx: both functions are called as the
337 * effect of XOFF processing, but start_tx is also called when upper
338 * levels tell the driver that there are more characters to send, so
339 * avoid adding code there.
342 REG_WR(ser, regi_ser, rw_xoff_clr, xoff_clr);
345 * Disable transmitter DMA, so that if we're in XON/XOFF, we can send
346 * those single characters without also giving go-ahead for queued up
350 REG_WR(ser, regi_ser, rw_tr_dma_en, tr_dma_en);
353 * Make sure that write_ongoing is reset when stopping tx.
355 up->write_ongoing = 0;
358 static void etraxfs_uart_stop_rx(struct uart_port *port)
360 struct uart_cris_port *up = (struct uart_cris_port *)port;
361 void __iomem *regi_ser = up->regi_ser;
362 reg_ser_rw_rec_ctrl rec_ctrl = REG_RD(ser, regi_ser, rw_rec_ctrl);
364 rec_ctrl.en = regk_ser_no;
365 REG_WR(ser, regi_ser, rw_rec_ctrl, rec_ctrl);
368 static unsigned int etraxfs_uart_tx_empty(struct uart_port *port)
370 struct uart_cris_port *up = (struct uart_cris_port *)port;
373 reg_ser_r_stat_din rstat = {0};
375 spin_lock_irqsave(&up->port.lock, flags);
377 rstat = REG_RD(ser, up->regi_ser, r_stat_din);
378 ret = rstat.tr_empty ? TIOCSER_TEMT : 0;
380 spin_unlock_irqrestore(&up->port.lock, flags);
383 static unsigned int etraxfs_uart_get_mctrl(struct uart_port *port)
385 struct uart_cris_port *up = (struct uart_cris_port *)port;
389 if (crisv32_serial_get_rts(up))
391 if (crisv32_serial_get_cts(up))
393 return mctrl_gpio_get(up->gpios, &ret);
396 static void etraxfs_uart_set_mctrl(struct uart_port *port, unsigned int mctrl)
398 struct uart_cris_port *up = (struct uart_cris_port *)port;
400 crisv32_serial_set_rts(up, mctrl & TIOCM_RTS ? 1 : 0, 0);
401 mctrl_gpio_set(up->gpios, mctrl);
404 static void etraxfs_uart_break_ctl(struct uart_port *port, int break_state)
406 struct uart_cris_port *up = (struct uart_cris_port *)port;
408 reg_ser_rw_tr_ctrl tr_ctrl;
409 reg_ser_rw_tr_dma_en tr_dma_en;
410 reg_ser_rw_intr_mask intr_mask;
412 spin_lock_irqsave(&up->port.lock, flags);
413 tr_ctrl = REG_RD(ser, up->regi_ser, rw_tr_ctrl);
414 tr_dma_en = REG_RD(ser, up->regi_ser, rw_tr_dma_en);
415 intr_mask = REG_RD(ser, up->regi_ser, rw_intr_mask);
417 if (break_state != 0) { /* Send break */
419 * We need to disable DMA (if used) or tr_rdy interrupts if no
420 * DMA. No need to make this conditional on use of DMA;
421 * disabling will be a no-op for the other mode.
423 intr_mask.tr_rdy = regk_ser_no;
427 * Stop transmission and set the txd pin to 0 after the
428 * current character. The txd setting will take effect after
429 * any current transmission has completed.
434 /* Re-enable the serial interrupt. */
435 intr_mask.tr_rdy = regk_ser_yes;
440 REG_WR(ser, up->regi_ser, rw_tr_ctrl, tr_ctrl);
441 REG_WR(ser, up->regi_ser, rw_tr_dma_en, tr_dma_en);
442 REG_WR(ser, up->regi_ser, rw_intr_mask, intr_mask);
444 spin_unlock_irqrestore(&up->port.lock, flags);
448 transmit_chars_no_dma(struct uart_cris_port *up)
451 struct circ_buf *xmit = &up->port.state->xmit;
453 void __iomem *regi_ser = up->regi_ser;
454 reg_ser_r_stat_din rstat;
455 reg_ser_rw_ack_intr ack_intr = { .tr_rdy = regk_ser_yes };
457 if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) {
458 /* No more to send, so disable the interrupt. */
459 reg_ser_rw_intr_mask intr_mask;
461 intr_mask = REG_RD(ser, regi_ser, rw_intr_mask);
462 intr_mask.tr_rdy = 0;
463 intr_mask.tr_empty = 0;
464 REG_WR(ser, regi_ser, rw_intr_mask, intr_mask);
465 up->write_ongoing = 0;
469 /* If the serport is fast, we send up to max_count bytes before
473 reg_ser_rw_dout dout = { .data = xmit->buf[xmit->tail] };
475 REG_WR(ser, regi_ser, rw_dout, dout);
476 REG_WR(ser, regi_ser, rw_ack_intr, ack_intr);
477 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE-1);
478 up->port.icount.tx++;
479 if (xmit->head == xmit->tail)
481 rstat = REG_RD(ser, regi_ser, r_stat_din);
482 } while ((--max_count > 0) && rstat.tr_rdy);
484 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
485 uart_write_wakeup(&up->port);
488 static void receive_chars_no_dma(struct uart_cris_port *up)
490 reg_ser_rs_stat_din stat_din;
491 reg_ser_r_stat_din rstat;
492 struct tty_port *port;
493 struct uart_icount *icount;
496 reg_ser_rw_ack_intr ack_intr = { 0 };
498 rstat = REG_RD(ser, up->regi_ser, r_stat_din);
499 icount = &up->port.icount;
500 port = &up->port.state->port;
503 stat_din = REG_RD(ser, up->regi_ser, rs_stat_din);
507 REG_WR(ser, up->regi_ser, rw_ack_intr, ack_intr);
510 if (stat_din.framing_err | stat_din.par_err | stat_din.orun) {
511 if (stat_din.data == 0x00 &&
512 stat_din.framing_err) {
513 /* Most likely a break. */
516 } else if (stat_din.par_err) {
519 } else if (stat_din.orun) {
522 } else if (stat_din.framing_err) {
529 * If this becomes important, we probably *could* handle this
530 * gracefully by keeping track of the unhandled character.
532 if (!tty_insert_flip_char(port, stat_din.data, flag))
533 panic("%s: No tty buffer space", __func__);
534 rstat = REG_RD(ser, up->regi_ser, r_stat_din);
535 } while (rstat.dav && (max_count-- > 0));
536 spin_unlock(&up->port.lock);
537 tty_flip_buffer_push(port);
538 spin_lock(&up->port.lock);
542 ser_interrupt(int irq, void *dev_id)
544 struct uart_cris_port *up = (struct uart_cris_port *)dev_id;
545 void __iomem *regi_ser;
548 spin_lock(&up->port.lock);
550 regi_ser = up->regi_ser;
553 reg_ser_r_masked_intr masked_intr;
555 masked_intr = REG_RD(ser, regi_ser, r_masked_intr);
557 * Check what interrupts are active before taking
558 * actions. If DMA is used the interrupt shouldn't
561 if (masked_intr.dav) {
562 receive_chars_no_dma(up);
566 if (masked_intr.tr_rdy) {
567 transmit_chars_no_dma(up);
571 spin_unlock(&up->port.lock);
572 return IRQ_RETVAL(handled);
575 #ifdef CONFIG_CONSOLE_POLL
576 static int etraxfs_uart_get_poll_char(struct uart_port *port)
578 reg_ser_rs_stat_din stat;
579 reg_ser_rw_ack_intr ack_intr = { 0 };
580 struct uart_cris_port *up = (struct uart_cris_port *)port;
583 stat = REG_RD(ser, up->regi_ser, rs_stat_din);
586 /* Ack the data_avail interrupt. */
588 REG_WR(ser, up->regi_ser, rw_ack_intr, ack_intr);
593 static void etraxfs_uart_put_poll_char(struct uart_port *port,
596 reg_ser_r_stat_din stat;
597 struct uart_cris_port *up = (struct uart_cris_port *)port;
600 stat = REG_RD(ser, up->regi_ser, r_stat_din);
601 } while (!stat.tr_rdy);
602 REG_WR_INT(ser, up->regi_ser, rw_dout, c);
604 #endif /* CONFIG_CONSOLE_POLL */
606 static int etraxfs_uart_startup(struct uart_port *port)
608 struct uart_cris_port *up = (struct uart_cris_port *)port;
610 reg_ser_rw_intr_mask ser_intr_mask = {0};
612 ser_intr_mask.dav = regk_ser_yes;
614 if (request_irq(etraxfs_uart_ports[port->line]->irq, ser_interrupt,
615 0, DRV_NAME, etraxfs_uart_ports[port->line]))
616 panic("irq ser%d", port->line);
618 spin_lock_irqsave(&up->port.lock, flags);
620 REG_WR(ser, up->regi_ser, rw_intr_mask, ser_intr_mask);
622 etraxfs_uart_set_mctrl(&up->port, up->port.mctrl);
624 spin_unlock_irqrestore(&up->port.lock, flags);
629 static void etraxfs_uart_shutdown(struct uart_port *port)
631 struct uart_cris_port *up = (struct uart_cris_port *)port;
634 spin_lock_irqsave(&up->port.lock, flags);
636 etraxfs_uart_stop_tx(port);
637 etraxfs_uart_stop_rx(port);
639 free_irq(etraxfs_uart_ports[port->line]->irq,
640 etraxfs_uart_ports[port->line]);
642 etraxfs_uart_set_mctrl(&up->port, up->port.mctrl);
644 spin_unlock_irqrestore(&up->port.lock, flags);
649 etraxfs_uart_set_termios(struct uart_port *port, struct ktermios *termios,
650 struct ktermios *old)
652 struct uart_cris_port *up = (struct uart_cris_port *)port;
654 reg_ser_rw_xoff xoff;
655 reg_ser_rw_xoff_clr xoff_clr = {0};
656 reg_ser_rw_tr_ctrl tx_ctrl = {0};
657 reg_ser_rw_tr_dma_en tx_dma_en = {0};
658 reg_ser_rw_rec_ctrl rx_ctrl = {0};
659 reg_ser_rw_tr_baud_div tx_baud_div = {0};
660 reg_ser_rw_rec_baud_div rx_baud_div = {0};
664 termios->c_cflag == old->c_cflag &&
665 termios->c_iflag == old->c_iflag)
668 /* Tx: 8 bit, no/even parity, 1 stop bit, no cts. */
669 tx_ctrl.base_freq = regk_ser_f29_493;
672 tx_ctrl.auto_rts = regk_ser_no;
674 tx_ctrl.auto_cts = 0;
675 /* Rx: 8 bit, no/even parity. */
676 rx_ctrl.dma_err = regk_ser_stop;
677 rx_ctrl.sampling = regk_ser_majority;
680 rx_ctrl.rts_n = regk_ser_inactive;
682 /* Common for tx and rx: 8N1. */
683 tx_ctrl.data_bits = regk_ser_bits8;
684 rx_ctrl.data_bits = regk_ser_bits8;
685 tx_ctrl.par = regk_ser_even;
686 rx_ctrl.par = regk_ser_even;
687 tx_ctrl.par_en = regk_ser_no;
688 rx_ctrl.par_en = regk_ser_no;
690 tx_ctrl.stop_bits = regk_ser_bits1;
693 * Change baud-rate and write it to the hardware.
695 * baud_clock = base_freq / (divisor*8)
696 * divisor = base_freq / (baud_clock * 8)
697 * base_freq is either:
698 * off, ext, 29.493MHz, 32.000 MHz, 32.768 MHz or 100 MHz
699 * 20.493MHz is used for standard baudrates
703 * For the console port we keep the original baudrate here. Not very
706 if ((port != console_port) || old)
707 baud = uart_get_baud_rate(port, termios, old, 0,
712 tx_baud_div.div = 29493000 / (8 * baud);
713 /* Rx uses same as tx. */
714 rx_baud_div.div = tx_baud_div.div;
715 rx_ctrl.base_freq = tx_ctrl.base_freq;
717 if ((termios->c_cflag & CSIZE) == CS7) {
718 /* Set 7 bit mode. */
719 tx_ctrl.data_bits = regk_ser_bits7;
720 rx_ctrl.data_bits = regk_ser_bits7;
723 if (termios->c_cflag & CSTOPB) {
724 /* Set 2 stop bit mode. */
725 tx_ctrl.stop_bits = regk_ser_bits2;
728 if (termios->c_cflag & PARENB) {
730 tx_ctrl.par_en = regk_ser_yes;
731 rx_ctrl.par_en = regk_ser_yes;
734 if (termios->c_cflag & CMSPAR) {
735 if (termios->c_cflag & PARODD) {
736 /* Set mark parity if PARODD and CMSPAR. */
737 tx_ctrl.par = regk_ser_mark;
738 rx_ctrl.par = regk_ser_mark;
740 tx_ctrl.par = regk_ser_space;
741 rx_ctrl.par = regk_ser_space;
744 if (termios->c_cflag & PARODD) {
745 /* Set odd parity. */
746 tx_ctrl.par = regk_ser_odd;
747 rx_ctrl.par = regk_ser_odd;
751 if (termios->c_cflag & CRTSCTS) {
752 /* Enable automatic CTS handling. */
753 tx_ctrl.auto_cts = regk_ser_yes;
756 /* Make sure the tx and rx are enabled. */
757 tx_ctrl.en = regk_ser_yes;
758 rx_ctrl.en = regk_ser_yes;
760 spin_lock_irqsave(&port->lock, flags);
763 REG_WR(ser, up->regi_ser, rw_tr_dma_en, tx_dma_en);
765 /* Actually write the control regs (if modified) to the hardware. */
766 uart_update_timeout(port, termios->c_cflag, port->uartclk/8);
767 MODIFY_REG(up->regi_ser, rw_rec_baud_div, rx_baud_div);
768 MODIFY_REG(up->regi_ser, rw_rec_ctrl, rx_ctrl);
770 MODIFY_REG(up->regi_ser, rw_tr_baud_div, tx_baud_div);
771 MODIFY_REG(up->regi_ser, rw_tr_ctrl, tx_ctrl);
774 REG_WR(ser, up->regi_ser, rw_tr_dma_en, tx_dma_en);
776 xoff = REG_RD(ser, up->regi_ser, rw_xoff);
778 if (up->port.state && up->port.state->port.tty &&
779 (up->port.state->port.tty->termios.c_iflag & IXON)) {
780 xoff.chr = STOP_CHAR(up->port.state->port.tty);
781 xoff.automatic = regk_ser_yes;
783 xoff.automatic = regk_ser_no;
785 MODIFY_REG(up->regi_ser, rw_xoff, xoff);
788 * Make sure we don't start in an automatically shut-off state due to
789 * a previous early exit.
792 REG_WR(ser, up->regi_ser, rw_xoff_clr, xoff_clr);
794 etraxfs_uart_set_mctrl(&up->port, up->port.mctrl);
795 spin_unlock_irqrestore(&up->port.lock, flags);
799 etraxfs_uart_type(struct uart_port *port)
804 static void etraxfs_uart_release_port(struct uart_port *port)
808 static int etraxfs_uart_request_port(struct uart_port *port)
813 static void etraxfs_uart_config_port(struct uart_port *port, int flags)
815 struct uart_cris_port *up = (struct uart_cris_port *)port;
817 up->port.type = PORT_CRIS;
820 static const struct uart_ops etraxfs_uart_pops = {
821 .tx_empty = etraxfs_uart_tx_empty,
822 .set_mctrl = etraxfs_uart_set_mctrl,
823 .get_mctrl = etraxfs_uart_get_mctrl,
824 .stop_tx = etraxfs_uart_stop_tx,
825 .start_tx = etraxfs_uart_start_tx,
826 .send_xchar = etraxfs_uart_send_xchar,
827 .stop_rx = etraxfs_uart_stop_rx,
828 .break_ctl = etraxfs_uart_break_ctl,
829 .startup = etraxfs_uart_startup,
830 .shutdown = etraxfs_uart_shutdown,
831 .set_termios = etraxfs_uart_set_termios,
832 .type = etraxfs_uart_type,
833 .release_port = etraxfs_uart_release_port,
834 .request_port = etraxfs_uart_request_port,
835 .config_port = etraxfs_uart_config_port,
836 #ifdef CONFIG_CONSOLE_POLL
837 .poll_get_char = etraxfs_uart_get_poll_char,
838 .poll_put_char = etraxfs_uart_put_poll_char,
842 static void cris_serial_port_init(struct uart_port *port, int line)
844 struct uart_cris_port *up = (struct uart_cris_port *)port;
850 spin_lock_init(&port->lock);
851 port->ops = &etraxfs_uart_pops;
853 port->iobase = (unsigned long) up->regi_ser;
854 port->uartclk = 29493000;
857 * We can't fit any more than 255 here (unsigned char), though
858 * actually UART_XMIT_SIZE characters could be pending output.
859 * At time of this writing, the definition of "fifosize" is here the
860 * amount of characters that can be pending output after a start_tx call
861 * until tx_empty returns 1: see serial_core.c:uart_wait_until_sent.
862 * This matters for timeout calculations unfortunately, but keeping
863 * larger amounts at the DMA wouldn't win much so let's just play nice.
865 port->fifosize = 255;
866 port->flags = UPF_BOOT_AUTOCONF;
869 static int etraxfs_uart_probe(struct platform_device *pdev)
871 struct device_node *np = pdev->dev.of_node;
872 struct uart_cris_port *up;
878 dev_id = of_alias_get_id(np, "serial");
882 if (dev_id >= UART_NR)
885 if (etraxfs_uart_ports[dev_id])
888 up = devm_kzalloc(&pdev->dev, sizeof(struct uart_cris_port),
893 up->irq = irq_of_parse_and_map(np, 0);
894 up->regi_ser = of_iomap(np, 0);
895 up->port.dev = &pdev->dev;
897 up->gpios = mctrl_gpio_init_noauto(&pdev->dev, 0);
898 if (IS_ERR(up->gpios))
899 return PTR_ERR(up->gpios);
901 cris_serial_port_init(&up->port, dev_id);
903 etraxfs_uart_ports[dev_id] = up;
904 platform_set_drvdata(pdev, &up->port);
905 uart_add_one_port(&etraxfs_uart_driver, &up->port);
910 static int etraxfs_uart_remove(struct platform_device *pdev)
912 struct uart_port *port;
914 port = platform_get_drvdata(pdev);
915 uart_remove_one_port(&etraxfs_uart_driver, port);
916 etraxfs_uart_ports[port->line] = NULL;
921 static const struct of_device_id etraxfs_uart_dt_ids[] = {
922 { .compatible = "axis,etraxfs-uart" },
926 MODULE_DEVICE_TABLE(of, etraxfs_uart_dt_ids);
928 static struct platform_driver etraxfs_uart_platform_driver = {
931 .of_match_table = of_match_ptr(etraxfs_uart_dt_ids),
933 .probe = etraxfs_uart_probe,
934 .remove = etraxfs_uart_remove,
937 static int __init etraxfs_uart_init(void)
941 ret = uart_register_driver(&etraxfs_uart_driver);
945 ret = platform_driver_register(&etraxfs_uart_platform_driver);
947 uart_unregister_driver(&etraxfs_uart_driver);
952 static void __exit etraxfs_uart_exit(void)
954 platform_driver_unregister(&etraxfs_uart_platform_driver);
955 uart_unregister_driver(&etraxfs_uart_driver);
958 module_init(etraxfs_uart_init);
959 module_exit(etraxfs_uart_exit);