drivers/usb/dwc2/platform.c

   1 /*
   2  * platform.c - DesignWare HS OTG Controller platform driver
   3  *
   4  * Copyright (C) Matthijs Kooijman <matthijs@stdin.nl>
   5  *
   6  * Redistribution and use in source and binary forms, with or without
   7  * modification, are permitted provided that the following conditions
   8  * are met:
   9  * 1. Redistributions of source code must retain the above copyright
  10  *    notice, this list of conditions, and the following disclaimer,
  11  *    without modification.
  12  * 2. Redistributions in binary form must reproduce the above copyright
  13  *    notice, this list of conditions and the following disclaimer in the
  14  *    documentation and/or other materials provided with the distribution.
  15  * 3. The names of the above-listed copyright holders may not be used
  16  *    to endorse or promote products derived from this software without
  17  *    specific prior written permission.
  18  *
  19  * ALTERNATIVELY, this software may be distributed under the terms of the
  20  * GNU General Public License ("GPL") as published by the Free Software
  21  * Foundation; either version 2 of the License, or (at your option) any
  22  * later version.
  23  *
  24  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
  25  * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
  26  * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  27  * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
  28  * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
  29  * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
  30  * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
  31  * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
  32  * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
  33  * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  34  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  35  */
  36
  37 #include <linux/kernel.h>
  38 #include <linux/module.h>
  39 #include <linux/slab.h>
  40 #include <linux/device.h>
  41 #include <linux/dma-mapping.h>
  42 #include <linux/of_device.h>
  43 #include <linux/mutex.h>
  44 #include <linux/platform_device.h>
  45
  46 #include <linux/usb/of.h>
  47
  48 #include "core.h"
  49 #include "hcd.h"
  50 #include "debug.h"
  51
  52 static const char dwc2_driver_name[] = "dwc2";
  53
  54 static const struct dwc2_core_params params_bcm2835 = {
  55         .otg_cap                        = 0,    /* HNP/SRP capable */
  56         .otg_ver                        = 0,    /* 1.3 */
  57         .dma_enable                     = 1,
  58         .dma_desc_enable                = 0,
  59         .speed                          = 0,    /* High Speed */
  60         .enable_dynamic_fifo            = 1,
  61         .en_multiple_tx_fifo            = 1,
  62         .host_rx_fifo_size              = 774,  /* 774 DWORDs */
  63         .host_nperio_tx_fifo_size       = 256,  /* 256 DWORDs */
  64         .host_perio_tx_fifo_size        = 512,  /* 512 DWORDs */
  65         .max_transfer_size              = 65535,
  66         .max_packet_count               = 511,
  67         .host_channels                  = 8,
  68         .phy_type                       = 1,    /* UTMI */
  69         .phy_utmi_width                 = 8,    /* 8 bits */
  70         .phy_ulpi_ddr                   = 0,    /* Single */
  71         .phy_ulpi_ext_vbus              = 0,
  72         .i2c_enable                     = 0,
  73         .ulpi_fs_ls                     = 0,
  74         .host_support_fs_ls_low_power   = 0,
  75         .host_ls_low_power_phy_clk      = 0,    /* 48 MHz */
  76         .ts_dline                       = 0,
  77         .reload_ctl                     = 0,
  78         .ahbcfg                         = 0x10,
  79         .uframe_sched                   = 0,
  80         .external_id_pin_ctl            = -1,
  81         .hibernation                    = -1,
  82 };
  83
  84 static const struct dwc2_core_params params_rk3066 = {
  85         .otg_cap                        = 2,    /* non-HNP/non-SRP */
  86         .otg_ver                        = -1,
  87         .dma_enable                     = -1,
  88         .dma_desc_enable                = 0,
  89         .speed                          = -1,
  90         .enable_dynamic_fifo            = 1,
  91         .en_multiple_tx_fifo            = -1,
  92         .host_rx_fifo_size              = 520,  /* 520 DWORDs */
  93         .host_nperio_tx_fifo_size       = 128,  /* 128 DWORDs */
  94         .host_perio_tx_fifo_size        = 256,  /* 256 DWORDs */
  95         .max_transfer_size              = 65535,
  96         .max_packet_count               = -1,
  97         .host_channels                  = -1,
  98         .phy_type                       = -1,
  99         .phy_utmi_width                 = -1,
 100         .phy_ulpi_ddr                   = -1,
 101         .phy_ulpi_ext_vbus              = -1,
 102         .i2c_enable                     = -1,
 103         .ulpi_fs_ls                     = -1,
 104         .host_support_fs_ls_low_power   = -1,
 105         .host_ls_low_power_phy_clk      = -1,
 106         .ts_dline                       = -1,
 107         .reload_ctl                     = -1,
 108         .ahbcfg                         = 0x7, /* INCR16 */
 109         .uframe_sched                   = -1,
 110         .external_id_pin_ctl            = -1,
 111         .hibernation                    = -1,
 112 };
 113
 114 /**
 115  * dwc2_driver_remove() - Called when the DWC_otg core is unregistered with the
 116  * DWC_otg driver
 117  *
 118  * @dev: Platform device
 119  *
 120  * This routine is called, for example, when the rmmod command is executed. The
 121  * device may or may not be electrically present. If it is present, the driver
 122  * stops device processing. Any resources used on behalf of this device are
 123  * freed.
 124  */
 125 static int dwc2_driver_remove(struct platform_device *dev)
 126 {
 127         struct dwc2_hsotg *hsotg = platform_get_drvdata(dev);
 128
 129         dwc2_debugfs_exit(hsotg);
 130         if (hsotg->hcd_enabled)
 131                 dwc2_hcd_remove(hsotg);
 132         if (hsotg->gadget_enabled)
 133                 s3c_hsotg_remove(hsotg);
 134
 135         return 0;
 136 }
 137
 138 static const struct of_device_id dwc2_of_match_table[] = {
 139         { .compatible = "brcm,bcm2835-usb", .data = &params_bcm2835 },
 140         { .compatible = "rockchip,rk3066-usb", .data = &params_rk3066 },
 141         { .compatible = "snps,dwc2", .data = NULL },
 142         { .compatible = "samsung,s3c6400-hsotg", .data = NULL},
 143         {},
 144 };
 145 MODULE_DEVICE_TABLE(of, dwc2_of_match_table);
 146
 147 /**
 148  * dwc2_driver_probe() - Called when the DWC_otg core is bound to the DWC_otg
 149  * driver
 150  *
 151  * @dev: Platform device
 152  *
 153  * This routine creates the driver components required to control the device
 154  * (core, HCD, and PCD) and initializes the device. The driver components are
 155  * stored in a dwc2_hsotg structure. A reference to the dwc2_hsotg is saved
 156  * in the device private data. This allows the driver to access the dwc2_hsotg
 157  * structure on subsequent calls to driver methods for this device.
 158  */
 159 static int dwc2_driver_probe(struct platform_device *dev)
 160 {
 161         const struct of_device_id *match;
 162         const struct dwc2_core_params *params;
 163         struct dwc2_core_params defparams;
 164         struct dwc2_hsotg *hsotg;
 165         struct resource *res;
 166         struct phy *phy;
 167         struct usb_phy *uphy;
 168         int retval;
 169         int irq;
 170
 171         match = of_match_device(dwc2_of_match_table, &dev->dev);
 172         if (match && match->data) {
 173                 params = match->data;
 174         } else {
 175                 /* Default all params to autodetect */
 176                 dwc2_set_all_params(&defparams, -1);
 177                 params = &defparams;
 178
 179                 /*
 180                  * Disable descriptor dma mode by default as the HW can support
 181                  * it, but does not support it for SPLIT transactions.
 182                  */
 183                 defparams.dma_desc_enable = 0;
 184         }
 185
 186         hsotg = devm_kzalloc(&dev->dev, sizeof(*hsotg), GFP_KERNEL);
 187         if (!hsotg)
 188                 return -ENOMEM;
 189
 190         hsotg->dev = &dev->dev;
 191
 192         /*
 193          * Use reasonable defaults so platforms don't have to provide these.
 194          */
 195         if (!dev->dev.dma_mask)
 196                 dev->dev.dma_mask = &dev->dev.coherent_dma_mask;
 197         retval = dma_set_coherent_mask(&dev->dev, DMA_BIT_MASK(32));
 198         if (retval)
 199                 return retval;
 200
 201         irq = platform_get_irq(dev, 0);
 202         if (irq < 0) {
 203                 dev_err(&dev->dev, "missing IRQ resource\n");
 204                 return irq;
 205         }
 206
 207         dev_dbg(hsotg->dev, "registering common handler for irq%d\n",
 208                 irq);
 209         retval = devm_request_irq(hsotg->dev, irq,
 210                                   dwc2_handle_common_intr, IRQF_SHARED,
 211                                   dev_name(hsotg->dev), hsotg);
 212         if (retval)
 213                 return retval;
 214
 215         res = platform_get_resource(dev, IORESOURCE_MEM, 0);
 216         hsotg->regs = devm_ioremap_resource(&dev->dev, res);
 217         if (IS_ERR(hsotg->regs))
 218                 return PTR_ERR(hsotg->regs);
 219
 220         dev_dbg(&dev->dev, "mapped PA %08lx to VA %p\n",
 221                 (unsigned long)res->start, hsotg->regs);
 222
 223         hsotg->dr_mode = of_usb_get_dr_mode(dev->dev.of_node);
 224
 225         /*
 226          * Attempt to find a generic PHY, then look for an old style
 227          * USB PHY
 228          */
 229         phy = devm_phy_get(&dev->dev, "usb2-phy");
 230         if (IS_ERR(phy)) {
 231                 hsotg->phy = NULL;
 232                 uphy = devm_usb_get_phy(&dev->dev, USB_PHY_TYPE_USB2);
 233                 if (IS_ERR(uphy))
 234                         hsotg->uphy = NULL;
 235                 else
 236                         hsotg->uphy = uphy;
 237         } else {
 238                 hsotg->phy = phy;
 239                 phy_power_on(hsotg->phy);
 240                 phy_init(hsotg->phy);
 241         }
 242
 243         spin_lock_init(&hsotg->lock);
 244         mutex_init(&hsotg->init_mutex);
 245
 246         /* Detect config values from hardware */
 247         retval = dwc2_get_hwparams(hsotg);
 248         if (retval)
 249                 return retval;
 250
 251         hsotg->core_params = devm_kzalloc(&dev->dev,
 252                                 sizeof(*hsotg->core_params), GFP_KERNEL);
 253         if (!hsotg->core_params)
 254                 return -ENOMEM;
 255
 256         dwc2_set_all_params(hsotg->core_params, -1);
 257
 258         /* Validate parameter values */
 259         dwc2_set_parameters(hsotg, params);
 260
 261         if (hsotg->dr_mode != USB_DR_MODE_HOST) {
 262                 retval = dwc2_gadget_init(hsotg, irq);
 263                 if (retval)
 264                         return retval;
 265                 hsotg->gadget_enabled = 1;
 266         }
 267
 268         if (hsotg->dr_mode != USB_DR_MODE_PERIPHERAL) {
 269                 retval = dwc2_hcd_init(hsotg, irq);
 270                 if (retval) {
 271                         if (hsotg->gadget_enabled)
 272                                 s3c_hsotg_remove(hsotg);
 273                         return retval;
 274                 }
 275                 hsotg->hcd_enabled = 1;
 276         }
 277
 278         platform_set_drvdata(dev, hsotg);
 279
 280         dwc2_debugfs_init(hsotg);
 281
 282         return retval;
 283 }
 284
 285 static int __maybe_unused dwc2_suspend(struct device *dev)
 286 {
 287         struct dwc2_hsotg *dwc2 = dev_get_drvdata(dev);
 288         int ret = 0;
 289
 290         if (dwc2_is_device_mode(dwc2)) {
 291                 ret = s3c_hsotg_suspend(dwc2);
 292         } else {
 293                 if (dwc2->lx_state == DWC2_L0)
 294                         return 0;
 295                 phy_exit(dwc2->phy);
 296                 phy_power_off(dwc2->phy);
 297
 298         }
 299         return ret;
 300 }
 301
 302 static int __maybe_unused dwc2_resume(struct device *dev)
 303 {
 304         struct dwc2_hsotg *dwc2 = dev_get_drvdata(dev);
 305         int ret = 0;
 306
 307         if (dwc2_is_device_mode(dwc2)) {
 308                 ret = s3c_hsotg_resume(dwc2);
 309         } else {
 310                 phy_power_on(dwc2->phy);
 311                 phy_init(dwc2->phy);
 312
 313         }
 314         return ret;
 315 }
 316
 317 static const struct dev_pm_ops dwc2_dev_pm_ops = {
 318         SET_SYSTEM_SLEEP_PM_OPS(dwc2_suspend, dwc2_resume)
 319 };
 320
 321 static struct platform_driver dwc2_platform_driver = {
 322         .driver = {
 323                 .name = dwc2_driver_name,
 324                 .of_match_table = dwc2_of_match_table,
 325                 .pm = &dwc2_dev_pm_ops,
 326         },
 327         .probe = dwc2_driver_probe,
 328         .remove = dwc2_driver_remove,
 329 };
 330
 331 module_platform_driver(dwc2_platform_driver);
 332
 333 MODULE_DESCRIPTION("DESIGNWARE HS OTG Platform Glue");
 334 MODULE_AUTHOR("Matthijs Kooijman <matthijs@stdin.nl>");
 335 MODULE_LICENSE("Dual BSD/GPL");