drivers/usb/dwc3/ep0.c

   1 /**
   2  * ep0.c - DesignWare USB3 DRD Controller Endpoint 0 Handling
   3  *
   4  * Copyright (C) 2010-2011 Texas Instruments Incorporated - http://www.ti.com
   5  *
   6  * Authors: Felipe Balbi <balbi@ti.com>,
   7  *          Sebastian Andrzej Siewior <bigeasy@linutronix.de>
   8  *
   9  * This program is free software: you can redistribute it and/or modify
  10  * it under the terms of the GNU General Public License version 2  of
  11  * the License as published by the Free Software Foundation.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  */
  18
  19 #include <linux/kernel.h>
  20 #include <linux/slab.h>
  21 #include <linux/spinlock.h>
  22 #include <linux/platform_device.h>
  23 #include <linux/pm_runtime.h>
  24 #include <linux/interrupt.h>
  25 #include <linux/io.h>
  26 #include <linux/list.h>
  27 #include <linux/dma-mapping.h>
  28
  29 #include <linux/usb/ch9.h>
  30 #include <linux/usb/gadget.h>
  31 #include <linux/usb/composite.h>
  32
  33 #include "core.h"
  34 #include "debug.h"
  35 #include "gadget.h"
  36 #include "io.h"
  37
  38 static void __dwc3_ep0_do_control_status(struct dwc3 *dwc, struct dwc3_ep *dep);
  39 static void __dwc3_ep0_do_control_data(struct dwc3 *dwc,
  40                 struct dwc3_ep *dep, struct dwc3_request *req);
  41
  42 static int dwc3_ep0_start_trans(struct dwc3 *dwc, u8 epnum, dma_addr_t buf_dma,
  43                 u32 len, u32 type, bool chain)
  44 {
  45         struct dwc3_gadget_ep_cmd_params params;
  46         struct dwc3_trb                 *trb;
  47         struct dwc3_ep                  *dep;
  48
  49         int                             ret;
  50
  51         dep = dwc->eps[epnum];
  52         if (dep->flags & DWC3_EP_BUSY) {
  53                 dwc3_trace(trace_dwc3_ep0, "%s still busy", dep->name);
  54                 return 0;
  55         }
  56
  57         trb = &dwc->ep0_trb[dep->trb_enqueue];
  58
  59         if (chain)
  60                 dep->trb_enqueue++;
  61
  62         trb->bpl = lower_32_bits(buf_dma);
  63         trb->bph = upper_32_bits(buf_dma);
  64         trb->size = len;
  65         trb->ctrl = type;
  66
  67         trb->ctrl |= (DWC3_TRB_CTRL_HWO
  68                         | DWC3_TRB_CTRL_ISP_IMI);
  69
  70         if (chain)
  71                 trb->ctrl |= DWC3_TRB_CTRL_CHN;
  72         else
  73                 trb->ctrl |= (DWC3_TRB_CTRL_IOC
  74                                 | DWC3_TRB_CTRL_LST);
  75
  76         if (chain)
  77                 return 0;
  78
  79         memset(&params, 0, sizeof(params));
  80         params.param0 = upper_32_bits(dwc->ep0_trb_addr);
  81         params.param1 = lower_32_bits(dwc->ep0_trb_addr);
  82
  83         trace_dwc3_prepare_trb(dep, trb);
  84
  85         ret = dwc3_send_gadget_ep_cmd(dep, DWC3_DEPCMD_STARTTRANSFER, &params);
  86         if (ret < 0)
  87                 return ret;
  88
  89         dep->flags |= DWC3_EP_BUSY;
  90         dep->resource_index = dwc3_gadget_ep_get_transfer_index(dep);
  91         dwc->ep0_next_event = DWC3_EP0_COMPLETE;
  92
  93         return 0;
  94 }
  95
  96 static int __dwc3_gadget_ep0_queue(struct dwc3_ep *dep,
  97                 struct dwc3_request *req)
  98 {
  99         struct dwc3             *dwc = dep->dwc;
 100
 101         req->request.actual     = 0;
 102         req->request.status     = -EINPROGRESS;
 103         req->epnum              = dep->number;
 104
 105         list_add_tail(&req->list, &dep->pending_list);
 106
 107         /*
 108          * Gadget driver might not be quick enough to queue a request
 109          * before we get a Transfer Not Ready event on this endpoint.
 110          *
 111          * In that case, we will set DWC3_EP_PENDING_REQUEST. When that
 112          * flag is set, it's telling us that as soon as Gadget queues the
 113          * required request, we should kick the transfer here because the
 114          * IRQ we were waiting for is long gone.
 115          */
 116         if (dep->flags & DWC3_EP_PENDING_REQUEST) {
 117                 unsigned        direction;
 118
 119                 direction = !!(dep->flags & DWC3_EP0_DIR_IN);
 120
 121                 if (dwc->ep0state != EP0_DATA_PHASE) {
 122                         dev_WARN(dwc->dev, "Unexpected pending request\n");
 123                         return 0;
 124                 }
 125
 126                 __dwc3_ep0_do_control_data(dwc, dwc->eps[direction], req);
 127
 128                 dep->flags &= ~(DWC3_EP_PENDING_REQUEST |
 129                                 DWC3_EP0_DIR_IN);
 130
 131                 return 0;
 132         }
 133
 134         /*
 135          * In case gadget driver asked us to delay the STATUS phase,
 136          * handle it here.
 137          */
 138         if (dwc->delayed_status) {
 139                 unsigned        direction;
 140
 141                 direction = !dwc->ep0_expect_in;
 142                 dwc->delayed_status = false;
 143                 usb_gadget_set_state(&dwc->gadget, USB_STATE_CONFIGURED);
 144
 145                 if (dwc->ep0state == EP0_STATUS_PHASE)
 146                         __dwc3_ep0_do_control_status(dwc, dwc->eps[direction]);
 147                 else
 148                         dwc3_trace(trace_dwc3_ep0,
 149                                         "too early for delayed status");
 150
 151                 return 0;
 152         }
 153
 154         /*
 155          * Unfortunately we have uncovered a limitation wrt the Data Phase.
 156          *
 157          * Section 9.4 says we can wait for the XferNotReady(DATA) event to
 158          * come before issueing Start Transfer command, but if we do, we will
 159          * miss situations where the host starts another SETUP phase instead of
 160          * the DATA phase.  Such cases happen at least on TD.7.6 of the Link
 161          * Layer Compliance Suite.
 162          *
 163          * The problem surfaces due to the fact that in case of back-to-back
 164          * SETUP packets there will be no XferNotReady(DATA) generated and we
 165          * will be stuck waiting for XferNotReady(DATA) forever.
 166          *
 167          * By looking at tables 9-13 and 9-14 of the Databook, we can see that
 168          * it tells us to start Data Phase right away. It also mentions that if
 169          * we receive a SETUP phase instead of the DATA phase, core will issue
 170          * XferComplete for the DATA phase, before actually initiating it in
 171          * the wire, with the TRB's status set to "SETUP_PENDING". Such status
 172          * can only be used to print some debugging logs, as the core expects
 173          * us to go through to the STATUS phase and start a CONTROL_STATUS TRB,
 174          * just so it completes right away, without transferring anything and,
 175          * only then, we can go back to the SETUP phase.
 176          *
 177          * Because of this scenario, SNPS decided to change the programming
 178          * model of control transfers and support on-demand transfers only for
 179          * the STATUS phase. To fix the issue we have now, we will always wait
 180          * for gadget driver to queue the DATA phase's struct usb_request, then
 181          * start it right away.
 182          *
 183          * If we're actually in a 2-stage transfer, we will wait for
 184          * XferNotReady(STATUS).
 185          */
 186         if (dwc->three_stage_setup) {
 187                 unsigned        direction;
 188
 189                 direction = dwc->ep0_expect_in;
 190                 dwc->ep0state = EP0_DATA_PHASE;
 191
 192                 __dwc3_ep0_do_control_data(dwc, dwc->eps[direction], req);
 193
 194                 dep->flags &= ~DWC3_EP0_DIR_IN;
 195         }
 196
 197         return 0;
 198 }
 199
 200 int dwc3_gadget_ep0_queue(struct usb_ep *ep, struct usb_request *request,
 201                 gfp_t gfp_flags)
 202 {
 203         struct dwc3_request             *req = to_dwc3_request(request);
 204         struct dwc3_ep                  *dep = to_dwc3_ep(ep);
 205         struct dwc3                     *dwc = dep->dwc;
 206
 207         unsigned long                   flags;
 208
 209         int                             ret;
 210
 211         spin_lock_irqsave(&dwc->lock, flags);
 212         if (!dep->endpoint.desc) {
 213                 dwc3_trace(trace_dwc3_ep0,
 214                                 "trying to queue request %p to disabled %s",
 215                                 request, dep->name);
 216                 ret = -ESHUTDOWN;
 217                 goto out;
 218         }
 219
 220         /* we share one TRB for ep0/1 */
 221         if (!list_empty(&dep->pending_list)) {
 222                 ret = -EBUSY;
 223                 goto out;
 224         }
 225
 226         ret = __dwc3_gadget_ep0_queue(dep, req);
 227
 228 out:
 229         spin_unlock_irqrestore(&dwc->lock, flags);
 230
 231         return ret;
 232 }
 233
 234 static void dwc3_ep0_stall_and_restart(struct dwc3 *dwc)
 235 {
 236         struct dwc3_ep          *dep;
 237
 238         /* reinitialize physical ep1 */
 239         dep = dwc->eps[1];
 240         dep->flags = DWC3_EP_ENABLED;
 241
 242         /* stall is always issued on EP0 */
 243         dep = dwc->eps[0];
 244         __dwc3_gadget_ep_set_halt(dep, 1, false);
 245         dep->flags = DWC3_EP_ENABLED;
 246         dwc->delayed_status = false;
 247
 248         if (!list_empty(&dep->pending_list)) {
 249                 struct dwc3_request     *req;
 250
 251                 req = next_request(&dep->pending_list);
 252                 dwc3_gadget_giveback(dep, req, -ECONNRESET);
 253         }
 254
 255         dwc->ep0state = EP0_SETUP_PHASE;
 256         dwc3_ep0_out_start(dwc);
 257 }
 258
 259 int __dwc3_gadget_ep0_set_halt(struct usb_ep *ep, int value)
 260 {
 261         struct dwc3_ep                  *dep = to_dwc3_ep(ep);
 262         struct dwc3                     *dwc = dep->dwc;
 263
 264         dwc3_ep0_stall_and_restart(dwc);
 265
 266         return 0;
 267 }
 268
 269 int dwc3_gadget_ep0_set_halt(struct usb_ep *ep, int value)
 270 {
 271         struct dwc3_ep                  *dep = to_dwc3_ep(ep);
 272         struct dwc3                     *dwc = dep->dwc;
 273         unsigned long                   flags;
 274         int                             ret;
 275
 276         spin_lock_irqsave(&dwc->lock, flags);
 277         ret = __dwc3_gadget_ep0_set_halt(ep, value);
 278         spin_unlock_irqrestore(&dwc->lock, flags);
 279
 280         return ret;
 281 }
 282
 283 void dwc3_ep0_out_start(struct dwc3 *dwc)
 284 {
 285         int                             ret;
 286
 287         ret = dwc3_ep0_start_trans(dwc, 0, dwc->ctrl_req_addr, 8,
 288                         DWC3_TRBCTL_CONTROL_SETUP, false);
 289         WARN_ON(ret < 0);
 290 }
 291
 292 static struct dwc3_ep *dwc3_wIndex_to_dep(struct dwc3 *dwc, __le16 wIndex_le)
 293 {
 294         struct dwc3_ep          *dep;
 295         u32                     windex = le16_to_cpu(wIndex_le);
 296         u32                     epnum;
 297
 298         epnum = (windex & USB_ENDPOINT_NUMBER_MASK) << 1;
 299         if ((windex & USB_ENDPOINT_DIR_MASK) == USB_DIR_IN)
 300                 epnum |= 1;
 301
 302         dep = dwc->eps[epnum];
 303         if (dep->flags & DWC3_EP_ENABLED)
 304                 return dep;
 305
 306         return NULL;
 307 }
 308
 309 static void dwc3_ep0_status_cmpl(struct usb_ep *ep, struct usb_request *req)
 310 {
 311 }
 312 /*
 313  * ch 9.4.5
 314  */
 315 static int dwc3_ep0_handle_status(struct dwc3 *dwc,
 316                 struct usb_ctrlrequest *ctrl)
 317 {
 318         struct dwc3_ep          *dep;
 319         u32                     recip;
 320         u32                     reg;
 321         u16                     usb_status = 0;
 322         __le16                  *response_pkt;
 323
 324         recip = ctrl->bRequestType & USB_RECIP_MASK;
 325         switch (recip) {
 326         case USB_RECIP_DEVICE:
 327                 /*
 328                  * LTM will be set once we know how to set this in HW.
 329                  */
 330                 usb_status |= dwc->gadget.is_selfpowered;
 331
 332                 if ((dwc->speed == DWC3_DSTS_SUPERSPEED) ||
 333                     (dwc->speed == DWC3_DSTS_SUPERSPEED_PLUS)) {
 334                         reg = dwc3_readl(dwc->regs, DWC3_DCTL);
 335                         if (reg & DWC3_DCTL_INITU1ENA)
 336                                 usb_status |= 1 << USB_DEV_STAT_U1_ENABLED;
 337                         if (reg & DWC3_DCTL_INITU2ENA)
 338                                 usb_status |= 1 << USB_DEV_STAT_U2_ENABLED;
 339                 }
 340
 341                 break;
 342
 343         case USB_RECIP_INTERFACE:
 344                 /*
 345                  * Function Remote Wake Capable D0
 346                  * Function Remote Wakeup       D1
 347                  */
 348                 break;
 349
 350         case USB_RECIP_ENDPOINT:
 351                 dep = dwc3_wIndex_to_dep(dwc, ctrl->wIndex);
 352                 if (!dep)
 353                         return -EINVAL;
 354
 355                 if (dep->flags & DWC3_EP_STALL)
 356                         usb_status = 1 << USB_ENDPOINT_HALT;
 357                 break;
 358         default:
 359                 return -EINVAL;
 360         }
 361
 362         response_pkt = (__le16 *) dwc->setup_buf;
 363         *response_pkt = cpu_to_le16(usb_status);
 364
 365         dep = dwc->eps[0];
 366         dwc->ep0_usb_req.dep = dep;
 367         dwc->ep0_usb_req.request.length = sizeof(*response_pkt);
 368         dwc->ep0_usb_req.request.buf = dwc->setup_buf;
 369         dwc->ep0_usb_req.request.complete = dwc3_ep0_status_cmpl;
 370
 371         return __dwc3_gadget_ep0_queue(dep, &dwc->ep0_usb_req);
 372 }
 373
 374 static int dwc3_ep0_handle_u1(struct dwc3 *dwc, enum usb_device_state state,
 375                 int set)
 376 {
 377         u32 reg;
 378
 379         if (state != USB_STATE_CONFIGURED)
 380                 return -EINVAL;
 381         if ((dwc->speed != DWC3_DSTS_SUPERSPEED) &&
 382                         (dwc->speed != DWC3_DSTS_SUPERSPEED_PLUS))
 383                 return -EINVAL;
 384
 385         reg = dwc3_readl(dwc->regs, DWC3_DCTL);
 386         if (set)
 387                 reg |= DWC3_DCTL_INITU1ENA;
 388         else
 389                 reg &= ~DWC3_DCTL_INITU1ENA;
 390         dwc3_writel(dwc->regs, DWC3_DCTL, reg);
 391
 392         return 0;
 393 }
 394
 395 static int dwc3_ep0_handle_u2(struct dwc3 *dwc, enum usb_device_state state,
 396                 int set)
 397 {
 398         u32 reg;
 399
 400
 401         if (state != USB_STATE_CONFIGURED)
 402                 return -EINVAL;
 403         if ((dwc->speed != DWC3_DSTS_SUPERSPEED) &&
 404                         (dwc->speed != DWC3_DSTS_SUPERSPEED_PLUS))
 405                 return -EINVAL;
 406
 407         reg = dwc3_readl(dwc->regs, DWC3_DCTL);
 408         if (set)
 409                 reg |= DWC3_DCTL_INITU2ENA;
 410         else
 411                 reg &= ~DWC3_DCTL_INITU2ENA;
 412         dwc3_writel(dwc->regs, DWC3_DCTL, reg);
 413
 414         return 0;
 415 }
 416
 417 static int dwc3_ep0_handle_test(struct dwc3 *dwc, enum usb_device_state state,
 418                 u32 wIndex, int set)
 419 {
 420         if ((wIndex & 0xff) != 0)
 421                 return -EINVAL;
 422         if (!set)
 423                 return -EINVAL;
 424
 425         switch (wIndex >> 8) {
 426         case TEST_J:
 427         case TEST_K:
 428         case TEST_SE0_NAK:
 429         case TEST_PACKET:
 430         case TEST_FORCE_EN:
 431                 dwc->test_mode_nr = wIndex >> 8;
 432                 dwc->test_mode = true;
 433                 break;
 434         default:
 435                 return -EINVAL;
 436         }
 437
 438         return 0;
 439 }
 440
 441 static int dwc3_ep0_handle_device(struct dwc3 *dwc,
 442                 struct usb_ctrlrequest *ctrl, int set)
 443 {
 444         enum usb_device_state   state;
 445         u32                     wValue;
 446         u32                     wIndex;
 447         int                     ret = 0;
 448
 449         wValue = le16_to_cpu(ctrl->wValue);
 450         wIndex = le16_to_cpu(ctrl->wIndex);
 451         state = dwc->gadget.state;
 452
 453         switch (wValue) {
 454         case USB_DEVICE_REMOTE_WAKEUP:
 455                 break;
 456         /*
 457          * 9.4.1 says only only for SS, in AddressState only for
 458          * default control pipe
 459          */
 460         case USB_DEVICE_U1_ENABLE:
 461                 ret = dwc3_ep0_handle_u1(dwc, state, set);
 462                 break;
 463         case USB_DEVICE_U2_ENABLE:
 464                 ret = dwc3_ep0_handle_u2(dwc, state, set);
 465                 break;
 466         case USB_DEVICE_LTM_ENABLE:
 467                 ret = -EINVAL;
 468                 break;
 469         case USB_DEVICE_TEST_MODE:
 470                 ret = dwc3_ep0_handle_test(dwc, state, wIndex, set);
 471                 break;
 472         default:
 473                 ret = -EINVAL;
 474         }
 475
 476         return ret;
 477 }
 478
 479 static int dwc3_ep0_handle_intf(struct dwc3 *dwc,
 480                 struct usb_ctrlrequest *ctrl, int set)
 481 {
 482         enum usb_device_state   state;
 483         u32                     wValue;
 484         u32                     wIndex;
 485         int                     ret = 0;
 486
 487         wValue = le16_to_cpu(ctrl->wValue);
 488         wIndex = le16_to_cpu(ctrl->wIndex);
 489         state = dwc->gadget.state;
 490
 491         switch (wValue) {
 492         case USB_INTRF_FUNC_SUSPEND:
 493                 if (wIndex & USB_INTRF_FUNC_SUSPEND_LP)
 494                         /* XXX enable Low power suspend */
 495                         ;
 496                 if (wIndex & USB_INTRF_FUNC_SUSPEND_RW)
 497                         /* XXX enable remote wakeup */
 498                         ;
 499                 break;
 500         default:
 501                 ret = -EINVAL;
 502         }
 503
 504         return ret;
 505 }
 506
 507 static int dwc3_ep0_handle_endpoint(struct dwc3 *dwc,
 508                 struct usb_ctrlrequest *ctrl, int set)
 509 {
 510         struct dwc3_ep          *dep;
 511         enum usb_device_state   state;
 512         u32                     wValue;
 513         u32                     wIndex;
 514         int                     ret;
 515
 516         wValue = le16_to_cpu(ctrl->wValue);
 517         wIndex = le16_to_cpu(ctrl->wIndex);
 518         state = dwc->gadget.state;
 519
 520         switch (wValue) {
 521         case USB_ENDPOINT_HALT:
 522                 dep = dwc3_wIndex_to_dep(dwc, ctrl->wIndex);
 523                 if (!dep)
 524                         return -EINVAL;
 525
 526                 if (set == 0 && (dep->flags & DWC3_EP_WEDGE))
 527                         break;
 528
 529                 ret = __dwc3_gadget_ep_set_halt(dep, set, true);
 530                 if (ret)
 531                         return -EINVAL;
 532                 break;
 533         default:
 534                 return -EINVAL;
 535         }
 536
 537         return 0;
 538 }
 539
 540 static int dwc3_ep0_handle_feature(struct dwc3 *dwc,
 541                 struct usb_ctrlrequest *ctrl, int set)
 542 {
 543         u32                     recip;
 544         int                     ret;
 545         enum usb_device_state   state;
 546
 547         recip = ctrl->bRequestType & USB_RECIP_MASK;
 548         state = dwc->gadget.state;
 549
 550         switch (recip) {
 551         case USB_RECIP_DEVICE:
 552                 ret = dwc3_ep0_handle_device(dwc, ctrl, set);
 553                 break;
 554         case USB_RECIP_INTERFACE:
 555                 ret = dwc3_ep0_handle_intf(dwc, ctrl, set);
 556                 break;
 557         case USB_RECIP_ENDPOINT:
 558                 ret = dwc3_ep0_handle_endpoint(dwc, ctrl, set);
 559                 break;
 560         default:
 561                 ret = -EINVAL;
 562         }
 563
 564         return ret;
 565 }
 566
 567 static int dwc3_ep0_set_address(struct dwc3 *dwc, struct usb_ctrlrequest *ctrl)
 568 {
 569         enum usb_device_state state = dwc->gadget.state;
 570         u32 addr;
 571         u32 reg;
 572
 573         addr = le16_to_cpu(ctrl->wValue);
 574         if (addr > 127) {
 575                 dwc3_trace(trace_dwc3_ep0, "invalid device address %d", addr);
 576                 return -EINVAL;
 577         }
 578
 579         if (state == USB_STATE_CONFIGURED) {
 580                 dwc3_trace(trace_dwc3_ep0,
 581                                 "trying to set address when configured");
 582                 return -EINVAL;
 583         }
 584
 585         reg = dwc3_readl(dwc->regs, DWC3_DCFG);
 586         reg &= ~(DWC3_DCFG_DEVADDR_MASK);
 587         reg |= DWC3_DCFG_DEVADDR(addr);
 588         dwc3_writel(dwc->regs, DWC3_DCFG, reg);
 589
 590         if (addr)
 591                 usb_gadget_set_state(&dwc->gadget, USB_STATE_ADDRESS);
 592         else
 593                 usb_gadget_set_state(&dwc->gadget, USB_STATE_DEFAULT);
 594
 595         return 0;
 596 }
 597
 598 static int dwc3_ep0_delegate_req(struct dwc3 *dwc, struct usb_ctrlrequest *ctrl)
 599 {
 600         int ret;
 601
 602         spin_unlock(&dwc->lock);
 603         ret = dwc->gadget_driver->setup(&dwc->gadget, ctrl);
 604         spin_lock(&dwc->lock);
 605         return ret;
 606 }
 607
 608 static int dwc3_ep0_set_config(struct dwc3 *dwc, struct usb_ctrlrequest *ctrl)
 609 {
 610         enum usb_device_state state = dwc->gadget.state;
 611         u32 cfg;
 612         int ret;
 613         u32 reg;
 614
 615         cfg = le16_to_cpu(ctrl->wValue);
 616
 617         switch (state) {
 618         case USB_STATE_DEFAULT:
 619                 return -EINVAL;
 620
 621         case USB_STATE_ADDRESS:
 622                 ret = dwc3_ep0_delegate_req(dwc, ctrl);
 623                 /* if the cfg matches and the cfg is non zero */
 624                 if (cfg && (!ret || (ret == USB_GADGET_DELAYED_STATUS))) {
 625
 626                         /*
 627                          * only change state if set_config has already
 628                          * been processed. If gadget driver returns
 629                          * USB_GADGET_DELAYED_STATUS, we will wait
 630                          * to change the state on the next usb_ep_queue()
 631                          */
 632                         if (ret == 0)
 633                                 usb_gadget_set_state(&dwc->gadget,
 634                                                 USB_STATE_CONFIGURED);
 635
 636                         /*
 637                          * Enable transition to U1/U2 state when
 638                          * nothing is pending from application.
 639                          */
 640                         reg = dwc3_readl(dwc->regs, DWC3_DCTL);
 641                         reg |= (DWC3_DCTL_ACCEPTU1ENA | DWC3_DCTL_ACCEPTU2ENA);
 642                         dwc3_writel(dwc->regs, DWC3_DCTL, reg);
 643                 }
 644                 break;
 645
 646         case USB_STATE_CONFIGURED:
 647                 ret = dwc3_ep0_delegate_req(dwc, ctrl);
 648                 if (!cfg && !ret)
 649                         usb_gadget_set_state(&dwc->gadget,
 650                                         USB_STATE_ADDRESS);
 651                 break;
 652         default:
 653                 ret = -EINVAL;
 654         }
 655         return ret;
 656 }
 657
 658 static void dwc3_ep0_set_sel_cmpl(struct usb_ep *ep, struct usb_request *req)
 659 {
 660         struct dwc3_ep  *dep = to_dwc3_ep(ep);
 661         struct dwc3     *dwc = dep->dwc;
 662
 663         u32             param = 0;
 664         u32             reg;
 665
 666         struct timing {
 667                 u8      u1sel;
 668                 u8      u1pel;
 669                 __le16  u2sel;
 670                 __le16  u2pel;
 671         } __packed timing;
 672
 673         int             ret;
 674
 675         memcpy(&timing, req->buf, sizeof(timing));
 676
 677         dwc->u1sel = timing.u1sel;
 678         dwc->u1pel = timing.u1pel;
 679         dwc->u2sel = le16_to_cpu(timing.u2sel);
 680         dwc->u2pel = le16_to_cpu(timing.u2pel);
 681
 682         reg = dwc3_readl(dwc->regs, DWC3_DCTL);
 683         if (reg & DWC3_DCTL_INITU2ENA)
 684                 param = dwc->u2pel;
 685         if (reg & DWC3_DCTL_INITU1ENA)
 686                 param = dwc->u1pel;
 687
 688         /*
 689          * According to Synopsys Databook, if parameter is
 690          * greater than 125, a value of zero should be
 691          * programmed in the register.
 692          */
 693         if (param > 125)
 694                 param = 0;
 695
 696         /* now that we have the time, issue DGCMD Set Sel */
 697         ret = dwc3_send_gadget_generic_command(dwc,
 698                         DWC3_DGCMD_SET_PERIODIC_PAR, param);
 699         WARN_ON(ret < 0);
 700 }
 701
 702 static int dwc3_ep0_set_sel(struct dwc3 *dwc, struct usb_ctrlrequest *ctrl)
 703 {
 704         struct dwc3_ep  *dep;
 705         enum usb_device_state state = dwc->gadget.state;
 706         u16             wLength;
 707         u16             wValue;
 708
 709         if (state == USB_STATE_DEFAULT)
 710                 return -EINVAL;
 711
 712         wValue = le16_to_cpu(ctrl->wValue);
 713         wLength = le16_to_cpu(ctrl->wLength);
 714
 715         if (wLength != 6) {
 716                 dev_err(dwc->dev, "Set SEL should be 6 bytes, got %d\n",
 717                                 wLength);
 718                 return -EINVAL;
 719         }
 720
 721         /*
 722          * To handle Set SEL we need to receive 6 bytes from Host. So let's
 723          * queue a usb_request for 6 bytes.
 724          *
 725          * Remember, though, this controller can't handle non-wMaxPacketSize
 726          * aligned transfers on the OUT direction, so we queue a request for
 727          * wMaxPacketSize instead.
 728          */
 729         dep = dwc->eps[0];
 730         dwc->ep0_usb_req.dep = dep;
 731         dwc->ep0_usb_req.request.length = dep->endpoint.maxpacket;
 732         dwc->ep0_usb_req.request.buf = dwc->setup_buf;
 733         dwc->ep0_usb_req.request.complete = dwc3_ep0_set_sel_cmpl;
 734
 735         return __dwc3_gadget_ep0_queue(dep, &dwc->ep0_usb_req);
 736 }
 737
 738 static int dwc3_ep0_set_isoch_delay(struct dwc3 *dwc, struct usb_ctrlrequest *ctrl)
 739 {
 740         u16             wLength;
 741         u16             wValue;
 742         u16             wIndex;
 743
 744         wValue = le16_to_cpu(ctrl->wValue);
 745         wLength = le16_to_cpu(ctrl->wLength);
 746         wIndex = le16_to_cpu(ctrl->wIndex);
 747
 748         if (wIndex || wLength)
 749                 return -EINVAL;
 750
 751         /*
 752          * REVISIT It's unclear from Databook what to do with this
 753          * value. For now, just cache it.
 754          */
 755         dwc->isoch_delay = wValue;
 756
 757         return 0;
 758 }
 759
 760 static int dwc3_ep0_std_request(struct dwc3 *dwc, struct usb_ctrlrequest *ctrl)
 761 {
 762         int ret;
 763
 764         switch (ctrl->bRequest) {
 765         case USB_REQ_GET_STATUS:
 766                 dwc3_trace(trace_dwc3_ep0, "USB_REQ_GET_STATUS");
 767                 ret = dwc3_ep0_handle_status(dwc, ctrl);
 768                 break;
 769         case USB_REQ_CLEAR_FEATURE:
 770                 dwc3_trace(trace_dwc3_ep0, "USB_REQ_CLEAR_FEATURE");
 771                 ret = dwc3_ep0_handle_feature(dwc, ctrl, 0);
 772                 break;
 773         case USB_REQ_SET_FEATURE:
 774                 dwc3_trace(trace_dwc3_ep0, "USB_REQ_SET_FEATURE");
 775                 ret = dwc3_ep0_handle_feature(dwc, ctrl, 1);
 776                 break;
 777         case USB_REQ_SET_ADDRESS:
 778                 dwc3_trace(trace_dwc3_ep0, "USB_REQ_SET_ADDRESS");
 779                 ret = dwc3_ep0_set_address(dwc, ctrl);
 780                 break;
 781         case USB_REQ_SET_CONFIGURATION:
 782                 dwc3_trace(trace_dwc3_ep0, "USB_REQ_SET_CONFIGURATION");
 783                 ret = dwc3_ep0_set_config(dwc, ctrl);
 784                 break;
 785         case USB_REQ_SET_SEL:
 786                 dwc3_trace(trace_dwc3_ep0, "USB_REQ_SET_SEL");
 787                 ret = dwc3_ep0_set_sel(dwc, ctrl);
 788                 break;
 789         case USB_REQ_SET_ISOCH_DELAY:
 790                 dwc3_trace(trace_dwc3_ep0, "USB_REQ_SET_ISOCH_DELAY");
 791                 ret = dwc3_ep0_set_isoch_delay(dwc, ctrl);
 792                 break;
 793         default:
 794                 dwc3_trace(trace_dwc3_ep0, "Forwarding to gadget driver");
 795                 ret = dwc3_ep0_delegate_req(dwc, ctrl);
 796                 break;
 797         }
 798
 799         return ret;
 800 }
 801
 802 static void dwc3_ep0_inspect_setup(struct dwc3 *dwc,
 803                 const struct dwc3_event_depevt *event)
 804 {
 805         struct usb_ctrlrequest *ctrl = dwc->ctrl_req;
 806         int ret = -EINVAL;
 807         u32 len;
 808
 809         if (!dwc->gadget_driver)
 810                 goto out;
 811
 812         trace_dwc3_ctrl_req(ctrl);
 813
 814         len = le16_to_cpu(ctrl->wLength);
 815         if (!len) {
 816                 dwc->three_stage_setup = false;
 817                 dwc->ep0_expect_in = false;
 818                 dwc->ep0_next_event = DWC3_EP0_NRDY_STATUS;
 819         } else {
 820                 dwc->three_stage_setup = true;
 821                 dwc->ep0_expect_in = !!(ctrl->bRequestType & USB_DIR_IN);
 822                 dwc->ep0_next_event = DWC3_EP0_NRDY_DATA;
 823         }
 824
 825         if ((ctrl->bRequestType & USB_TYPE_MASK) == USB_TYPE_STANDARD)
 826                 ret = dwc3_ep0_std_request(dwc, ctrl);
 827         else
 828                 ret = dwc3_ep0_delegate_req(dwc, ctrl);
 829
 830         if (ret == USB_GADGET_DELAYED_STATUS)
 831                 dwc->delayed_status = true;
 832
 833 out:
 834         if (ret < 0)
 835                 dwc3_ep0_stall_and_restart(dwc);
 836 }
 837
 838 static void dwc3_ep0_complete_data(struct dwc3 *dwc,
 839                 const struct dwc3_event_depevt *event)
 840 {
 841         struct dwc3_request     *r = NULL;
 842         struct usb_request      *ur;
 843         struct dwc3_trb         *trb;
 844         struct dwc3_ep          *ep0;
 845         unsigned                transfer_size = 0;
 846         unsigned                maxp;
 847         unsigned                remaining_ur_length;
 848         void                    *buf;
 849         u32                     transferred = 0;
 850         u32                     status;
 851         u32                     length;
 852         u8                      epnum;
 853
 854         epnum = event->endpoint_number;
 855         ep0 = dwc->eps[0];
 856
 857         dwc->ep0_next_event = DWC3_EP0_NRDY_STATUS;
 858
 859         trb = dwc->ep0_trb;
 860
 861         trace_dwc3_complete_trb(ep0, trb);
 862
 863         r = next_request(&ep0->pending_list);
 864         if (!r)
 865                 return;
 866
 867         status = DWC3_TRB_SIZE_TRBSTS(trb->size);
 868         if (status == DWC3_TRBSTS_SETUP_PENDING) {
 869                 dwc->setup_packet_pending = true;
 870
 871                 dwc3_trace(trace_dwc3_ep0, "Setup Pending received");
 872
 873                 if (r)
 874                         dwc3_gadget_giveback(ep0, r, -ECONNRESET);
 875
 876                 return;
 877         }
 878
 879         ur = &r->request;
 880         buf = ur->buf;
 881         remaining_ur_length = ur->length;
 882
 883         length = trb->size & DWC3_TRB_SIZE_MASK;
 884
 885         maxp = ep0->endpoint.maxpacket;
 886
 887         if (dwc->ep0_bounced) {
 888                 /*
 889                  * Handle the first TRB before handling the bounce buffer if
 890                  * the request length is greater than the bounce buffer size
 891                  */
 892                 if (ur->length > DWC3_EP0_BOUNCE_SIZE) {
 893                         transfer_size = ALIGN(ur->length - maxp, maxp);
 894                         transferred = transfer_size - length;
 895                         buf = (u8 *)buf + transferred;
 896                         ur->actual += transferred;
 897                         remaining_ur_length -= transferred;
 898
 899                         trb++;
 900                         length = trb->size & DWC3_TRB_SIZE_MASK;
 901
 902                         ep0->trb_enqueue = 0;
 903                 }
 904
 905                 transfer_size = roundup((ur->length - transfer_size),
 906                                         maxp);
 907
 908                 transferred = min_t(u32, remaining_ur_length,
 909                                     transfer_size - length);
 910                 memcpy(buf, dwc->ep0_bounce, transferred);
 911         } else {
 912                 transferred = ur->length - length;
 913         }
 914
 915         ur->actual += transferred;
 916
 917         if ((epnum & 1) && ur->actual < ur->length) {
 918                 /* for some reason we did not get everything out */
 919
 920                 dwc3_ep0_stall_and_restart(dwc);
 921         } else {
 922                 dwc3_gadget_giveback(ep0, r, 0);
 923
 924                 if (IS_ALIGNED(ur->length, ep0->endpoint.maxpacket) &&
 925                                 ur->length && ur->zero) {
 926                         int ret;
 927
 928                         dwc->ep0_next_event = DWC3_EP0_COMPLETE;
 929
 930                         ret = dwc3_ep0_start_trans(dwc, epnum,
 931                                         dwc->ctrl_req_addr, 0,
 932                                         DWC3_TRBCTL_CONTROL_DATA, false);
 933                         WARN_ON(ret < 0);
 934                 }
 935         }
 936 }
 937
 938 static void dwc3_ep0_complete_status(struct dwc3 *dwc,
 939                 const struct dwc3_event_depevt *event)
 940 {
 941         struct dwc3_request     *r;
 942         struct dwc3_ep          *dep;
 943         struct dwc3_trb         *trb;
 944         u32                     status;
 945
 946         dep = dwc->eps[0];
 947         trb = dwc->ep0_trb;
 948
 949         trace_dwc3_complete_trb(dep, trb);
 950
 951         if (!list_empty(&dep->pending_list)) {
 952                 r = next_request(&dep->pending_list);
 953
 954                 dwc3_gadget_giveback(dep, r, 0);
 955         }
 956
 957         if (dwc->test_mode) {
 958                 int ret;
 959
 960                 ret = dwc3_gadget_set_test_mode(dwc, dwc->test_mode_nr);
 961                 if (ret < 0) {
 962                         dwc3_trace(trace_dwc3_ep0, "Invalid Test #%d",
 963                                         dwc->test_mode_nr);
 964                         dwc3_ep0_stall_and_restart(dwc);
 965                         return;
 966                 }
 967         }
 968
 969         status = DWC3_TRB_SIZE_TRBSTS(trb->size);
 970         if (status == DWC3_TRBSTS_SETUP_PENDING) {
 971                 dwc->setup_packet_pending = true;
 972                 dwc3_trace(trace_dwc3_ep0, "Setup Pending received");
 973         }
 974
 975         dwc->ep0state = EP0_SETUP_PHASE;
 976         dwc3_ep0_out_start(dwc);
 977 }
 978
 979 static void dwc3_ep0_xfer_complete(struct dwc3 *dwc,
 980                         const struct dwc3_event_depevt *event)
 981 {
 982         struct dwc3_ep          *dep = dwc->eps[event->endpoint_number];
 983
 984         dep->flags &= ~DWC3_EP_BUSY;
 985         dep->resource_index = 0;
 986         dwc->setup_packet_pending = false;
 987
 988         switch (dwc->ep0state) {
 989         case EP0_SETUP_PHASE:
 990                 dwc3_ep0_inspect_setup(dwc, event);
 991                 break;
 992
 993         case EP0_DATA_PHASE:
 994                 dwc3_ep0_complete_data(dwc, event);
 995                 break;
 996
 997         case EP0_STATUS_PHASE:
 998                 dwc3_ep0_complete_status(dwc, event);
 999                 break;
1000         default:
1001                 WARN(true, "UNKNOWN ep0state %d\n", dwc->ep0state);
1002         }
1003 }
1004
1005 static void __dwc3_ep0_do_control_data(struct dwc3 *dwc,
1006                 struct dwc3_ep *dep, struct dwc3_request *req)
1007 {
1008         int                     ret;
1009
1010         req->direction = !!dep->number;
1011
1012         if (req->request.length == 0) {
1013                 ret = dwc3_ep0_start_trans(dwc, dep->number,
1014                                 dwc->ctrl_req_addr, 0,
1015                                 DWC3_TRBCTL_CONTROL_DATA, false);
1016         } else if (!IS_ALIGNED(req->request.length, dep->endpoint.maxpacket)
1017                         && (dep->number == 0)) {
1018                 u32     transfer_size = 0;
1019                 u32     maxpacket;
1020
1021                 ret = usb_gadget_map_request(&dwc->gadget, &req->request,
1022                                 dep->number);
1023                 if (ret) {
1024                         dwc3_trace(trace_dwc3_ep0, "failed to map request");
1025                         return;
1026                 }
1027
1028                 maxpacket = dep->endpoint.maxpacket;
1029
1030                 if (req->request.length > DWC3_EP0_BOUNCE_SIZE) {
1031                         transfer_size = ALIGN(req->request.length - maxpacket,
1032                                               maxpacket);
1033                         ret = dwc3_ep0_start_trans(dwc, dep->number,
1034                                                    req->request.dma,
1035                                                    transfer_size,
1036                                                    DWC3_TRBCTL_CONTROL_DATA,
1037                                                    true);
1038                 }
1039
1040                 transfer_size = roundup((req->request.length - transfer_size),
1041                                         maxpacket);
1042
1043                 dwc->ep0_bounced = true;
1044
1045                 ret = dwc3_ep0_start_trans(dwc, dep->number,
1046                                 dwc->ep0_bounce_addr, transfer_size,
1047                                 DWC3_TRBCTL_CONTROL_DATA, false);
1048         } else {
1049                 ret = usb_gadget_map_request(&dwc->gadget, &req->request,
1050                                 dep->number);
1051                 if (ret) {
1052                         dwc3_trace(trace_dwc3_ep0, "failed to map request");
1053                         return;
1054                 }
1055
1056                 ret = dwc3_ep0_start_trans(dwc, dep->number, req->request.dma,
1057                                 req->request.length, DWC3_TRBCTL_CONTROL_DATA,
1058                                 false);
1059         }
1060
1061         WARN_ON(ret < 0);
1062 }
1063
1064 static int dwc3_ep0_start_control_status(struct dwc3_ep *dep)
1065 {
1066         struct dwc3             *dwc = dep->dwc;
1067         u32                     type;
1068
1069         type = dwc->three_stage_setup ? DWC3_TRBCTL_CONTROL_STATUS3
1070                 : DWC3_TRBCTL_CONTROL_STATUS2;
1071
1072         return dwc3_ep0_start_trans(dwc, dep->number,
1073                         dwc->ctrl_req_addr, 0, type, false);
1074 }
1075
1076 static void __dwc3_ep0_do_control_status(struct dwc3 *dwc, struct dwc3_ep *dep)
1077 {
1078         WARN_ON(dwc3_ep0_start_control_status(dep));
1079 }
1080
1081 static void dwc3_ep0_do_control_status(struct dwc3 *dwc,
1082                 const struct dwc3_event_depevt *event)
1083 {
1084         struct dwc3_ep          *dep = dwc->eps[event->endpoint_number];
1085
1086         __dwc3_ep0_do_control_status(dwc, dep);
1087 }
1088
1089 static void dwc3_ep0_end_control_data(struct dwc3 *dwc, struct dwc3_ep *dep)
1090 {
1091         struct dwc3_gadget_ep_cmd_params params;
1092         u32                     cmd;
1093         int                     ret;
1094
1095         if (!dep->resource_index)
1096                 return;
1097
1098         cmd = DWC3_DEPCMD_ENDTRANSFER;
1099         cmd |= DWC3_DEPCMD_CMDIOC;
1100         cmd |= DWC3_DEPCMD_PARAM(dep->resource_index);
1101         memset(&params, 0, sizeof(params));
1102         ret = dwc3_send_gadget_ep_cmd(dep, cmd, &params);
1103         WARN_ON_ONCE(ret);
1104         dep->resource_index = 0;
1105 }
1106
1107 static void dwc3_ep0_xfernotready(struct dwc3 *dwc,
1108                 const struct dwc3_event_depevt *event)
1109 {
1110         switch (event->status) {
1111         case DEPEVT_STATUS_CONTROL_DATA:
1112                 /*
1113                  * We already have a DATA transfer in the controller's cache,
1114                  * if we receive a XferNotReady(DATA) we will ignore it, unless
1115                  * it's for the wrong direction.
1116                  *
1117                  * In that case, we must issue END_TRANSFER command to the Data
1118                  * Phase we already have started and issue SetStall on the
1119                  * control endpoint.
1120                  */
1121                 if (dwc->ep0_expect_in != event->endpoint_number) {
1122                         struct dwc3_ep  *dep = dwc->eps[dwc->ep0_expect_in];
1123
1124                         dwc3_trace(trace_dwc3_ep0,
1125                                         "Wrong direction for Data phase");
1126                         dwc3_ep0_end_control_data(dwc, dep);
1127                         dwc3_ep0_stall_and_restart(dwc);
1128                         return;
1129                 }
1130
1131                 break;
1132
1133         case DEPEVT_STATUS_CONTROL_STATUS:
1134                 if (dwc->ep0_next_event != DWC3_EP0_NRDY_STATUS)
1135                         return;
1136
1137                 dwc->ep0state = EP0_STATUS_PHASE;
1138
1139                 if (dwc->delayed_status) {
1140                         WARN_ON_ONCE(event->endpoint_number != 1);
1141                         dwc3_trace(trace_dwc3_ep0, "Delayed Status");
1142                         return;
1143                 }
1144
1145                 dwc3_ep0_do_control_status(dwc, event);
1146         }
1147 }
1148
1149 void dwc3_ep0_interrupt(struct dwc3 *dwc,
1150                 const struct dwc3_event_depevt *event)
1151 {
1152         switch (event->endpoint_event) {
1153         case DWC3_DEPEVT_XFERCOMPLETE:
1154                 dwc3_ep0_xfer_complete(dwc, event);
1155                 break;
1156
1157         case DWC3_DEPEVT_XFERNOTREADY:
1158                 dwc3_ep0_xfernotready(dwc, event);
1159                 break;
1160
1161         case DWC3_DEPEVT_XFERINPROGRESS:
1162         case DWC3_DEPEVT_RXTXFIFOEVT:
1163         case DWC3_DEPEVT_STREAMEVT:
1164         case DWC3_DEPEVT_EPCMDCMPLT:
1165                 break;
1166         }
1167 }