2 * Standalone EHCI usb debug driver
4 * Originally written by:
5 * Eric W. Biederman" <ebiederm@xmission.com> and
6 * Yinghai Lu <yhlu.kernel@gmail.com>
8 * Changes for early/late printk and HW errata:
9 * Jason Wessel <jason.wessel@windriver.com>
10 * Copyright (C) 2009 Wind River Systems, Inc.
14 #include <linux/console.h>
15 #include <linux/errno.h>
16 #include <linux/module.h>
17 #include <linux/pci_regs.h>
18 #include <linux/pci_ids.h>
19 #include <linux/usb/ch9.h>
20 #include <linux/usb/ehci_def.h>
21 #include <linux/delay.h>
23 #include <asm/pci-direct.h>
24 #include <asm/fixmap.h>
26 /* The code here is intended to talk directly to the EHCI debug port
27 * and does not require that you have any kind of USB host controller
28 * drivers or USB device drivers compiled into the kernel.
30 * If you make a change to anything in here, the following test cases
31 * need to pass where a USB debug device works in the following
34 * 1. boot args: earlyprintk=dbgp
35 * o kernel compiled with # CONFIG_USB_EHCI_HCD is not set
36 * o kernel compiled with CONFIG_USB_EHCI_HCD=y
37 * 2. boot args: earlyprintk=dbgp,keep
38 * o kernel compiled with # CONFIG_USB_EHCI_HCD is not set
39 * o kernel compiled with CONFIG_USB_EHCI_HCD=y
40 * 3. boot args: earlyprintk=dbgp console=ttyUSB0
41 * o kernel has CONFIG_USB_EHCI_HCD=y and
42 * CONFIG_USB_SERIAL_DEBUG=y
43 * 4. boot args: earlyprintk=vga,dbgp
44 * o kernel compiled with # CONFIG_USB_EHCI_HCD is not set
45 * o kernel compiled with CONFIG_USB_EHCI_HCD=y
47 * For the 4th configuration you can turn on or off the DBGP_DEBUG
48 * such that you can debug the dbgp device's driver code.
51 static int dbgp_phys_port = 1;
53 static struct ehci_caps __iomem *ehci_caps;
54 static struct ehci_regs __iomem *ehci_regs;
55 static struct ehci_dbg_port __iomem *ehci_debug;
56 static int dbgp_not_safe; /* Cannot use debug device during ehci reset */
57 static unsigned int dbgp_endpoint_out;
65 static struct ehci_dev ehci_dev;
67 #define USB_DEBUG_DEVNUM 127
70 #define dbgp_printk printk
71 static void dbgp_ehci_status(char *str)
75 dbgp_printk("dbgp: %s\n", str);
76 dbgp_printk(" Debug control: %08x", readl(&ehci_debug->control));
77 dbgp_printk(" ehci cmd : %08x", readl(&ehci_regs->command));
78 dbgp_printk(" ehci conf flg: %08x\n",
79 readl(&ehci_regs->configured_flag));
80 dbgp_printk(" ehci status : %08x", readl(&ehci_regs->status));
81 dbgp_printk(" ehci portsc : %08x\n",
82 readl(&ehci_regs->port_status[dbgp_phys_port - 1]));
85 static inline void dbgp_ehci_status(char *str) { }
86 static inline void dbgp_printk(const char *fmt, ...) { }
89 static inline u32 dbgp_len_update(u32 x, u32 len)
91 return (x & ~0x0f) | (len & 0x0f);
95 * USB Packet IDs (PIDs)
99 #define USB_PID_OUT 0xe1
100 #define USB_PID_IN 0x69
101 #define USB_PID_SOF 0xa5
102 #define USB_PID_SETUP 0x2d
104 #define USB_PID_ACK 0xd2
105 #define USB_PID_NAK 0x5a
106 #define USB_PID_STALL 0x1e
107 #define USB_PID_NYET 0x96
109 #define USB_PID_DATA0 0xc3
110 #define USB_PID_DATA1 0x4b
111 #define USB_PID_DATA2 0x87
112 #define USB_PID_MDATA 0x0f
114 #define USB_PID_PREAMBLE 0x3c
115 #define USB_PID_ERR 0x3c
116 #define USB_PID_SPLIT 0x78
117 #define USB_PID_PING 0xb4
118 #define USB_PID_UNDEF_0 0xf0
120 #define USB_PID_DATA_TOGGLE 0x88
121 #define DBGP_CLAIM (DBGP_OWNER | DBGP_ENABLED | DBGP_INUSE)
123 #define PCI_CAP_ID_EHCI_DEBUG 0xa
125 #define HUB_ROOT_RESET_TIME 50 /* times are in msec */
126 #define HUB_SHORT_RESET_TIME 10
127 #define HUB_LONG_RESET_TIME 200
128 #define HUB_RESET_TIMEOUT 500
130 #define DBGP_MAX_PACKET 8
131 #define DBGP_TIMEOUT (250 * 1000)
132 #define DBGP_LOOPS 1000
134 static inline u32 dbgp_pid_write_update(u32 x, u32 tok)
136 static int data0 = USB_PID_DATA1;
137 data0 ^= USB_PID_DATA_TOGGLE;
138 return (x & 0xffff0000) | (data0 << 8) | (tok & 0xff);
141 static inline u32 dbgp_pid_read_update(u32 x, u32 tok)
143 return (x & 0xffff0000) | (USB_PID_DATA0 << 8) | (tok & 0xff);
146 static int dbgp_wait_until_complete(void)
149 int loop = DBGP_TIMEOUT;
152 ctrl = readl(&ehci_debug->control);
153 /* Stop when the transaction is finished */
154 if (ctrl & DBGP_DONE)
157 } while (--loop > 0);
160 return -DBGP_TIMEOUT;
163 * Now that we have observed the completed transaction,
164 * clear the done bit.
166 writel(ctrl | DBGP_DONE, &ehci_debug->control);
167 return (ctrl & DBGP_ERROR) ? -DBGP_ERRCODE(ctrl) : DBGP_LEN(ctrl);
170 static inline void dbgp_mdelay(int ms)
175 for (i = 0; i < 1000; i++)
180 static void dbgp_breath(void)
182 /* Sleep to give the debug port a chance to breathe */
185 static int dbgp_wait_until_done(unsigned ctrl)
189 int loop = DBGP_LOOPS;
192 writel(ctrl | DBGP_GO, &ehci_debug->control);
193 ret = dbgp_wait_until_complete();
194 pids = readl(&ehci_debug->pids);
195 lpid = DBGP_PID_GET(pids);
198 /* A -DBGP_TIMEOUT failure here means the device has
199 * failed, perhaps because it was unplugged, in which
200 * case we do not want to hang the system so the dbgp
201 * will be marked as unsafe to use. EHCI reset is the
202 * only way to recover if you unplug the dbgp device.
204 if (ret == -DBGP_TIMEOUT && !dbgp_not_safe)
206 if (ret == -DBGP_ERR_BAD && --loop > 0)
212 * If the port is getting full or it has dropped data
213 * start pacing ourselves, not necessary but it's friendly.
215 if ((lpid == USB_PID_NAK) || (lpid == USB_PID_NYET))
218 /* If I get a NACK reissue the transmission */
219 if (lpid == USB_PID_NAK) {
227 static inline void dbgp_set_data(const void *buf, int size)
229 const unsigned char *bytes = buf;
234 for (i = 0; i < 4 && i < size; i++)
235 lo |= bytes[i] << (8*i);
236 for (; i < 8 && i < size; i++)
237 hi |= bytes[i] << (8*(i - 4));
238 writel(lo, &ehci_debug->data03);
239 writel(hi, &ehci_debug->data47);
242 static inline void dbgp_get_data(void *buf, int size)
244 unsigned char *bytes = buf;
248 lo = readl(&ehci_debug->data03);
249 hi = readl(&ehci_debug->data47);
250 for (i = 0; i < 4 && i < size; i++)
251 bytes[i] = (lo >> (8*i)) & 0xff;
252 for (; i < 8 && i < size; i++)
253 bytes[i] = (hi >> (8*(i - 4))) & 0xff;
256 static int dbgp_bulk_write(unsigned devnum, unsigned endpoint,
257 const char *bytes, int size)
263 if (size > DBGP_MAX_PACKET)
266 addr = DBGP_EPADDR(devnum, endpoint);
268 pids = readl(&ehci_debug->pids);
269 pids = dbgp_pid_write_update(pids, USB_PID_OUT);
271 ctrl = readl(&ehci_debug->control);
272 ctrl = dbgp_len_update(ctrl, size);
276 dbgp_set_data(bytes, size);
277 writel(addr, &ehci_debug->address);
278 writel(pids, &ehci_debug->pids);
279 ret = dbgp_wait_until_done(ctrl);
284 static int dbgp_bulk_read(unsigned devnum, unsigned endpoint, void *data,
287 u32 pids, addr, ctrl;
290 if (size > DBGP_MAX_PACKET)
293 addr = DBGP_EPADDR(devnum, endpoint);
295 pids = readl(&ehci_debug->pids);
296 pids = dbgp_pid_read_update(pids, USB_PID_IN);
298 ctrl = readl(&ehci_debug->control);
299 ctrl = dbgp_len_update(ctrl, size);
303 writel(addr, &ehci_debug->address);
304 writel(pids, &ehci_debug->pids);
305 ret = dbgp_wait_until_done(ctrl);
311 dbgp_get_data(data, size);
315 static int dbgp_control_msg(unsigned devnum, int requesttype,
316 int request, int value, int index, void *data, int size)
318 u32 pids, addr, ctrl;
319 struct usb_ctrlrequest req;
323 read = (requesttype & USB_DIR_IN) != 0;
324 if (size > (read ? DBGP_MAX_PACKET:0))
327 /* Compute the control message */
328 req.bRequestType = requesttype;
329 req.bRequest = request;
330 req.wValue = cpu_to_le16(value);
331 req.wIndex = cpu_to_le16(index);
332 req.wLength = cpu_to_le16(size);
334 pids = DBGP_PID_SET(USB_PID_DATA0, USB_PID_SETUP);
335 addr = DBGP_EPADDR(devnum, 0);
337 ctrl = readl(&ehci_debug->control);
338 ctrl = dbgp_len_update(ctrl, sizeof(req));
342 /* Send the setup message */
343 dbgp_set_data(&req, sizeof(req));
344 writel(addr, &ehci_debug->address);
345 writel(pids, &ehci_debug->pids);
346 ret = dbgp_wait_until_done(ctrl);
350 /* Read the result */
351 return dbgp_bulk_read(devnum, 0, data, size);
354 /* Find a PCI capability */
355 static u32 __init find_cap(u32 num, u32 slot, u32 func, int cap)
360 if (!(read_pci_config_16(num, slot, func, PCI_STATUS) &
361 PCI_STATUS_CAP_LIST))
364 pos = read_pci_config_byte(num, slot, func, PCI_CAPABILITY_LIST);
365 for (bytes = 0; bytes < 48 && pos >= 0x40; bytes++) {
369 id = read_pci_config_byte(num, slot, func, pos+PCI_CAP_LIST_ID);
375 pos = read_pci_config_byte(num, slot, func,
376 pos+PCI_CAP_LIST_NEXT);
381 static u32 __init __find_dbgp(u32 bus, u32 slot, u32 func)
385 class = read_pci_config(bus, slot, func, PCI_CLASS_REVISION);
386 if ((class >> 8) != PCI_CLASS_SERIAL_USB_EHCI)
389 return find_cap(bus, slot, func, PCI_CAP_ID_EHCI_DEBUG);
392 static u32 __init find_dbgp(int ehci_num, u32 *rbus, u32 *rslot, u32 *rfunc)
396 for (bus = 0; bus < 256; bus++) {
397 for (slot = 0; slot < 32; slot++) {
398 for (func = 0; func < 8; func++) {
401 cap = __find_dbgp(bus, slot, func);
417 static int dbgp_ehci_startup(void)
419 u32 ctrl, cmd, status;
422 /* Claim ownership, but do not enable yet */
423 ctrl = readl(&ehci_debug->control);
425 ctrl &= ~(DBGP_ENABLED | DBGP_INUSE);
426 writel(ctrl, &ehci_debug->control);
429 dbgp_ehci_status("EHCI startup");
430 /* Start the ehci running */
431 cmd = readl(&ehci_regs->command);
432 cmd &= ~(CMD_LRESET | CMD_IAAD | CMD_PSE | CMD_ASE | CMD_RESET);
434 writel(cmd, &ehci_regs->command);
436 /* Ensure everything is routed to the EHCI */
437 writel(FLAG_CF, &ehci_regs->configured_flag);
439 /* Wait until the controller is no longer halted */
442 status = readl(&ehci_regs->status);
443 if (!(status & STS_HALT))
446 } while (--loop > 0);
449 dbgp_printk("ehci can not be started\n");
452 dbgp_printk("ehci started\n");
456 static int dbgp_ehci_controller_reset(void)
458 int loop = 250 * 1000;
461 /* Reset the EHCI controller */
462 cmd = readl(&ehci_regs->command);
464 writel(cmd, &ehci_regs->command);
466 cmd = readl(&ehci_regs->command);
467 } while ((cmd & CMD_RESET) && (--loop > 0));
470 dbgp_printk("can not reset ehci\n");
473 dbgp_ehci_status("ehci reset done");
476 static int ehci_wait_for_port(int port);
477 /* Return 0 on success
478 * Return -ENODEV for any general failure
479 * Return -EIO if wait for port fails
481 int dbgp_external_startup(void)
484 struct usb_debug_descriptor dbgp_desc;
486 u32 ctrl, portsc, cmd;
487 int dbg_port = dbgp_phys_port;
489 int reset_port_tries = 1;
490 int try_hard_once = 1;
492 try_port_reset_again:
493 ret = dbgp_ehci_startup();
497 /* Wait for a device to show up in the debug port */
498 ret = ehci_wait_for_port(dbg_port);
500 portsc = readl(&ehci_regs->port_status[dbg_port - 1]);
501 if (!(portsc & PORT_CONNECT) && try_hard_once) {
502 /* Last ditch effort to try to force enable
503 * the debug device by using the packet test
504 * ehci command to try and wake it up. */
506 cmd = readl(&ehci_regs->command);
508 writel(cmd, &ehci_regs->command);
509 portsc = readl(&ehci_regs->port_status[dbg_port - 1]);
510 portsc |= PORT_TEST_PKT;
511 writel(portsc, &ehci_regs->port_status[dbg_port - 1]);
512 dbgp_ehci_status("Trying to force debug port online");
514 dbgp_ehci_controller_reset();
515 goto try_port_reset_again;
516 } else if (reset_port_tries--) {
517 goto try_port_reset_again;
519 dbgp_printk("No device found in debug port\n");
522 dbgp_ehci_status("wait for port done");
524 /* Enable the debug port */
525 ctrl = readl(&ehci_debug->control);
527 writel(ctrl, &ehci_debug->control);
528 ctrl = readl(&ehci_debug->control);
529 if ((ctrl & DBGP_CLAIM) != DBGP_CLAIM) {
530 dbgp_printk("No device in debug port\n");
531 writel(ctrl & ~DBGP_CLAIM, &ehci_debug->control);
534 dbgp_ehci_status("debug ported enabled");
536 /* Completely transfer the debug device to the debug controller */
537 portsc = readl(&ehci_regs->port_status[dbg_port - 1]);
539 writel(portsc, &ehci_regs->port_status[dbg_port - 1]);
544 /* Find the debug device and make it device number 127 */
545 for (devnum = 0; devnum <= 127; devnum++) {
546 ret = dbgp_control_msg(devnum,
547 USB_DIR_IN | USB_TYPE_STANDARD | USB_RECIP_DEVICE,
548 USB_REQ_GET_DESCRIPTOR, (USB_DT_DEBUG << 8), 0,
549 &dbgp_desc, sizeof(dbgp_desc));
554 dbgp_printk("Could not find attached debug device\n");
558 dbgp_printk("Attached device is not a debug device\n");
561 dbgp_endpoint_out = dbgp_desc.bDebugOutEndpoint;
563 /* Move the device to 127 if it isn't already there */
564 if (devnum != USB_DEBUG_DEVNUM) {
565 ret = dbgp_control_msg(devnum,
566 USB_DIR_OUT | USB_TYPE_STANDARD | USB_RECIP_DEVICE,
567 USB_REQ_SET_ADDRESS, USB_DEBUG_DEVNUM, 0, NULL, 0);
569 dbgp_printk("Could not move attached device to %d\n",
573 devnum = USB_DEBUG_DEVNUM;
574 dbgp_printk("debug device renamed to 127\n");
577 /* Enable the debug interface */
578 ret = dbgp_control_msg(USB_DEBUG_DEVNUM,
579 USB_DIR_OUT | USB_TYPE_STANDARD | USB_RECIP_DEVICE,
580 USB_REQ_SET_FEATURE, USB_DEVICE_DEBUG_MODE, 0, NULL, 0);
582 dbgp_printk(" Could not enable the debug device\n");
585 dbgp_printk("debug interface enabled\n");
586 /* Perform a small write to get the even/odd data state in sync
588 ret = dbgp_bulk_write(USB_DEBUG_DEVNUM, dbgp_endpoint_out, " ", 1);
590 dbgp_printk("dbgp_bulk_write failed: %d\n", ret);
593 dbgp_printk("small write doned\n");
602 EXPORT_SYMBOL_GPL(dbgp_external_startup);
604 static int ehci_reset_port(int port)
607 u32 delay_time, delay;
610 dbgp_ehci_status("reset port");
611 /* Reset the usb debug port */
612 portsc = readl(&ehci_regs->port_status[port - 1]);
614 portsc |= PORT_RESET;
615 writel(portsc, &ehci_regs->port_status[port - 1]);
617 delay = HUB_ROOT_RESET_TIME;
618 for (delay_time = 0; delay_time < HUB_RESET_TIMEOUT;
619 delay_time += delay) {
621 portsc = readl(&ehci_regs->port_status[port - 1]);
622 if (!(portsc & PORT_RESET))
625 if (portsc & PORT_RESET) {
626 /* force reset to complete */
628 writel(portsc & ~(PORT_RWC_BITS | PORT_RESET),
629 &ehci_regs->port_status[port - 1]);
632 portsc = readl(&ehci_regs->port_status[port-1]);
633 } while ((portsc & PORT_RESET) && (--loop > 0));
636 /* Device went away? */
637 if (!(portsc & PORT_CONNECT))
640 /* bomb out completely if something weird happend */
641 if ((portsc & PORT_CSC))
644 /* If we've finished resetting, then break out of the loop */
645 if (!(portsc & PORT_RESET) && (portsc & PORT_PE))
650 static int ehci_wait_for_port(int port)
655 for (reps = 0; reps < 300; reps++) {
656 status = readl(&ehci_regs->status);
657 if (status & STS_PCD)
661 ret = ehci_reset_port(port);
667 typedef void (*set_debug_port_t)(int port);
669 static void __init default_set_debug_port(int port)
673 static set_debug_port_t __initdata set_debug_port = default_set_debug_port;
675 static void __init nvidia_set_debug_port(int port)
678 dword = read_pci_config(ehci_dev.bus, ehci_dev.slot, ehci_dev.func,
680 dword &= ~(0x0f<<12);
681 dword |= ((port & 0x0f)<<12);
682 write_pci_config(ehci_dev.bus, ehci_dev.slot, ehci_dev.func, 0x74,
684 dbgp_printk("set debug port to %d\n", port);
687 static void __init detect_set_debug_port(void)
691 vendorid = read_pci_config(ehci_dev.bus, ehci_dev.slot, ehci_dev.func,
694 if ((vendorid & 0xffff) == 0x10de) {
695 dbgp_printk("using nvidia set_debug_port\n");
696 set_debug_port = nvidia_set_debug_port;
700 /* The code in early_ehci_bios_handoff() is derived from the usb pci
701 * quirk initialization, but altered so as to use the early PCI
703 #define EHCI_USBLEGSUP_BIOS (1 << 16) /* BIOS semaphore */
704 #define EHCI_USBLEGCTLSTS 4 /* legacy control/status */
705 static void __init early_ehci_bios_handoff(void)
707 u32 hcc_params = readl(&ehci_caps->hcc_params);
708 int offset = (hcc_params >> 8) & 0xff;
715 cap = read_pci_config(ehci_dev.bus, ehci_dev.slot,
716 ehci_dev.func, offset);
717 dbgp_printk("dbgp: ehci BIOS state %08x\n", cap);
719 if ((cap & 0xff) == 1 && (cap & EHCI_USBLEGSUP_BIOS)) {
720 dbgp_printk("dbgp: BIOS handoff\n");
721 write_pci_config_byte(ehci_dev.bus, ehci_dev.slot,
722 ehci_dev.func, offset + 3, 1);
725 /* if boot firmware now owns EHCI, spin till it hands it over. */
727 while ((cap & EHCI_USBLEGSUP_BIOS) && (msec > 0)) {
730 cap = read_pci_config(ehci_dev.bus, ehci_dev.slot,
731 ehci_dev.func, offset);
734 if (cap & EHCI_USBLEGSUP_BIOS) {
735 /* well, possibly buggy BIOS... try to shut it down,
736 * and hope nothing goes too wrong */
737 dbgp_printk("dbgp: BIOS handoff failed: %08x\n", cap);
738 write_pci_config_byte(ehci_dev.bus, ehci_dev.slot,
739 ehci_dev.func, offset + 2, 0);
742 /* just in case, always disable EHCI SMIs */
743 write_pci_config_byte(ehci_dev.bus, ehci_dev.slot, ehci_dev.func,
744 offset + EHCI_USBLEGCTLSTS, 0);
747 static int __init ehci_setup(void)
749 u32 ctrl, portsc, hcs_params;
750 u32 debug_port, new_debug_port = 0, n_ports;
755 early_ehci_bios_handoff();
762 hcs_params = readl(&ehci_caps->hcs_params);
763 debug_port = HCS_DEBUG_PORT(hcs_params);
764 dbgp_phys_port = debug_port;
765 n_ports = HCS_N_PORTS(hcs_params);
767 dbgp_printk("debug_port: %d\n", debug_port);
768 dbgp_printk("n_ports: %d\n", n_ports);
769 dbgp_ehci_status("");
771 for (i = 1; i <= n_ports; i++) {
772 portsc = readl(&ehci_regs->port_status[i-1]);
773 dbgp_printk("portstatus%d: %08x\n", i, portsc);
776 if (port_map_tried && (new_debug_port != debug_port)) {
778 set_debug_port(new_debug_port);
784 /* Only reset the controller if it is not already in the
785 * configured state */
786 if (!(readl(&ehci_regs->configured_flag) & FLAG_CF)) {
787 if (dbgp_ehci_controller_reset() != 0)
790 dbgp_ehci_status("ehci skip - already configured");
793 ret = dbgp_external_startup();
795 goto next_debug_port;
798 /* Things didn't work so remove my claim */
799 ctrl = readl(&ehci_debug->control);
800 ctrl &= ~(DBGP_CLAIM | DBGP_OUT);
801 writel(ctrl, &ehci_debug->control);
807 port_map_tried |= (1<<(debug_port - 1));
808 new_debug_port = ((debug_port-1+1)%n_ports) + 1;
809 if (port_map_tried != ((1<<n_ports) - 1)) {
810 set_debug_port(new_debug_port);
814 set_debug_port(new_debug_port);
821 int __init early_dbgp_init(char *s)
823 u32 debug_port, bar, offset;
824 u32 bus, slot, func, cap;
825 void __iomem *ehci_bar;
832 if (!early_pci_allowed())
837 dbgp_num = simple_strtoul(s, &e, 10);
838 dbgp_printk("dbgp_num: %d\n", dbgp_num);
840 cap = find_dbgp(dbgp_num, &bus, &slot, &func);
844 dbgp_printk("Found EHCI debug port on %02x:%02x.%1x\n", bus, slot,
847 debug_port = read_pci_config(bus, slot, func, cap);
848 bar = (debug_port >> 29) & 0x7;
849 bar = (bar * 4) + 0xc;
850 offset = (debug_port >> 16) & 0xfff;
851 dbgp_printk("bar: %02x offset: %03x\n", bar, offset);
852 if (bar != PCI_BASE_ADDRESS_0) {
853 dbgp_printk("only debug ports on bar 1 handled.\n");
858 bar_val = read_pci_config(bus, slot, func, PCI_BASE_ADDRESS_0);
859 dbgp_printk("bar_val: %02x offset: %03x\n", bar_val, offset);
860 if (bar_val & ~PCI_BASE_ADDRESS_MEM_MASK) {
861 dbgp_printk("only simple 32bit mmio bars supported\n");
866 /* double check if the mem space is enabled */
867 byte = read_pci_config_byte(bus, slot, func, 0x04);
870 write_pci_config_byte(bus, slot, func, 0x04, byte);
871 dbgp_printk("mmio for ehci enabled\n");
875 * FIXME I don't have the bar size so just guess PAGE_SIZE is more
876 * than enough. 1K is the biggest I have seen.
878 set_fixmap_nocache(FIX_DBGP_BASE, bar_val & PAGE_MASK);
879 ehci_bar = (void __iomem *)__fix_to_virt(FIX_DBGP_BASE);
880 ehci_bar += bar_val & ~PAGE_MASK;
881 dbgp_printk("ehci_bar: %p\n", ehci_bar);
883 ehci_caps = ehci_bar;
884 ehci_regs = ehci_bar + HC_LENGTH(readl(&ehci_caps->hc_capbase));
885 ehci_debug = ehci_bar + offset;
887 ehci_dev.slot = slot;
888 ehci_dev.func = func;
890 detect_set_debug_port();
894 dbgp_printk("ehci_setup failed\n");
899 dbgp_ehci_status("early_init_complete");
904 static void early_dbgp_write(struct console *con, const char *str, u32 n)
907 char buf[DBGP_MAX_PACKET];
912 if (!ehci_debug || dbgp_not_safe)
915 cmd = readl(&ehci_regs->command);
916 if (unlikely(!(cmd & CMD_RUN))) {
917 /* If the ehci controller is not in the run state do extended
918 * checks to see if the acpi or some other initialization also
919 * reset the ehci debug port */
920 ctrl = readl(&ehci_debug->control);
921 if (!(ctrl & DBGP_ENABLED)) {
923 dbgp_external_startup();
926 writel(cmd, &ehci_regs->command);
931 for (chunk = 0; chunk < DBGP_MAX_PACKET && n > 0;
932 str++, chunk++, n--) {
933 if (!use_cr && *str == '\n') {
945 ret = dbgp_bulk_write(USB_DEBUG_DEVNUM,
946 dbgp_endpoint_out, buf, chunk);
949 if (unlikely(reset_run)) {
950 cmd = readl(&ehci_regs->command);
952 writel(cmd, &ehci_regs->command);
956 struct console early_dbgp_console = {
958 .write = early_dbgp_write,
959 .flags = CON_PRINTBUFFER,
963 int dbgp_reset_prep(void)
971 if (early_dbgp_console.index != -1 &&
972 !(early_dbgp_console.flags & CON_BOOT))
974 /* This means the console is not initialized, or should get
975 * shutdown so as to allow for reuse of the usb device, which
976 * means it is time to shutdown the usb debug port. */
977 ctrl = readl(&ehci_debug->control);
978 if (ctrl & DBGP_ENABLED) {
979 ctrl &= ~(DBGP_CLAIM);
980 writel(ctrl, &ehci_debug->control);
984 EXPORT_SYMBOL_GPL(dbgp_reset_prep);