drivers/usb/gadget/arcotg_udc.c

   1 /*
   2  * Copyright 2004-2012 Freescale Semiconductor, Inc. All Rights Reserved.
   3  */
   4
   5 /*
   6  * The code contained herein is licensed under the GNU General Public
   7  * License. You may obtain a copy of the GNU General Public License
   8  * Version 2 or later at the following locations:
   9  *
  10  * http://www.opensource.org/licenses/gpl-license.html
  11  * http://www.gnu.org/copyleft/gpl.html
  12  */
  13
  14 #undef VERBOSE
  15
  16 #include <linux/module.h>
  17 #include <linux/kernel.h>
  18 #include <linux/ioport.h>
  19 #include <linux/types.h>
  20 #include <linux/errno.h>
  21 #include <linux/delay.h>
  22 #include <linux/sched.h>
  23 #include <linux/workqueue.h>
  24 #include <linux/slab.h>
  25 #include <linux/init.h>
  26 #include <linux/timer.h>
  27 #include <linux/list.h>
  28 #include <linux/interrupt.h>
  29 #include <linux/proc_fs.h>
  30 #include <linux/mm.h>
  31 #include <linux/jiffies.h>
  32 #include <linux/moduleparam.h>
  33 #include <linux/device.h>
  34 #include <linux/usb/ch9.h>
  35 #include <linux/usb/gadget.h>
  36 #include <linux/usb/otg.h>
  37 #include <linux/dma-mapping.h>
  38 #include <linux/platform_device.h>
  39 #include <linux/fsl_devices.h>
  40 #include <linux/dmapool.h>
  41 #include <linux/io.h>
  42
  43 #include <asm/processor.h>
  44 #include <asm/byteorder.h>
  45 #include <asm/irq.h>
  46 #include <asm/system.h>
  47 #include <asm/mach-types.h>
  48 #include <asm/unaligned.h>
  49 #include <asm/dma.h>
  50 #include <asm/cacheflush.h>
  51
  52 #include "arcotg_udc.h"
  53 #include <mach/arc_otg.h>
  54 #include <mach/iram.h>
  55
  56 #define DRIVER_DESC     "ARC USBOTG Device Controller driver"
  57 #define DRIVER_AUTHOR   "Freescale Semiconductor"
  58 #define DRIVER_VERSION  "1 August 2005"
  59
  60 #ifdef CONFIG_PPC_MPC512x
  61 #define BIG_ENDIAN_DESC
  62 #endif
  63
  64 #ifdef BIG_ENDIAN_DESC
  65 #define cpu_to_hc32(x)  (x)
  66 #define hc32_to_cpu(x)  (x)
  67 #else
  68 #define cpu_to_hc32(x)  cpu_to_le32((x))
  69 #define hc32_to_cpu(x)  le32_to_cpu((x))
  70 #endif
  71 #define DMA_ADDR_INVALID        (~(dma_addr_t)0)
  72 DEFINE_MUTEX(udc_resume_mutex);
  73 extern void usb_debounce_id_vbus(void);
  74 static const char driver_name[] = "fsl-usb2-udc";
  75 static const char driver_desc[] = DRIVER_DESC;
  76
  77 volatile static struct usb_dr_device *dr_regs;
  78 volatile static struct usb_sys_interface *usb_sys_regs;
  79
  80 #include "imx_usb_charger.c" /* support for usb charger detect */
  81
  82 /* it is initialized in probe()  */
  83 static struct fsl_udc *udc_controller;
  84
  85 #ifdef POSTPONE_FREE_LAST_DTD
  86 static struct ep_td_struct *last_free_td;
  87 #endif
  88 static const struct usb_endpoint_descriptor
  89 fsl_ep0_desc = {
  90         .bLength =              USB_DT_ENDPOINT_SIZE,
  91         .bDescriptorType =      USB_DT_ENDPOINT,
  92         .bEndpointAddress =     0,
  93         .bmAttributes =         USB_ENDPOINT_XFER_CONTROL,
  94         .wMaxPacketSize =       USB_MAX_CTRL_PAYLOAD,
  95 };
  96 static const size_t g_iram_size = IRAM_TD_PPH_SIZE;
  97 static unsigned long g_iram_base;
  98 static __iomem void *g_iram_addr;
  99
 100 typedef int (*dev_sus)(struct device *dev, pm_message_t state);
 101 typedef int (*dev_res) (struct device *dev);
 102 static int udc_suspend(struct fsl_udc *udc);
 103 static int fsl_udc_suspend(struct platform_device *pdev, pm_message_t state);
 104 static int fsl_udc_resume(struct platform_device *pdev);
 105 static void fsl_ep_fifo_flush(struct usb_ep *_ep);
 106 static void gadget_wait_line_to_se0(void);
 107
 108 #ifdef CONFIG_USB_OTG
 109 /* Get platform resource from OTG driver */
 110 extern struct resource *otg_get_resources(void);
 111 #endif
 112
 113 extern void fsl_platform_set_test_mode(struct fsl_usb2_platform_data *pdata, enum usb_test_mode mode);
 114
 115 #ifdef CONFIG_WORKAROUND_ARCUSB_REG_RW
 116 static void safe_writel(u32 val32, volatile u32 *addr)
 117 {
 118         __asm__ ("swp %0, %0, [%1]" : : "r"(val32), "r"(addr));
 119 }
 120 #endif
 121
 122 #ifdef CONFIG_PPC32
 123 #define fsl_readl(addr)         in_le32((addr))
 124 #define fsl_writel(addr, val32) out_le32((val32), (addr))
 125 #elif defined (CONFIG_WORKAROUND_ARCUSB_REG_RW)
 126 #define fsl_readl(addr)         readl((addr))
 127 #define fsl_writel(val32, addr) safe_writel(val32, addr)
 128 #else
 129 #define fsl_readl(addr)         readl((addr))
 130 #define fsl_writel(addr, val32) writel((addr), (val32))
 131 #endif
 132
 133 /********************************************************************
 134  *      Internal Used Function
 135 ********************************************************************/
 136
 137 #ifdef DUMP_QUEUES
 138 static void dump_ep_queue(struct fsl_ep *ep)
 139 {
 140         int ep_index;
 141         struct fsl_req *req;
 142         struct ep_td_struct *dtd;
 143
 144         if (list_empty(&ep->queue)) {
 145                 pr_debug("udc: empty\n");
 146                 return;
 147         }
 148
 149         ep_index = ep_index(ep) * 2 + ep_is_in(ep);
 150         pr_debug("udc: ep=0x%p  index=%d\n", ep, ep_index);
 151
 152         list_for_each_entry(req, &ep->queue, queue) {
 153                 pr_debug("udc: req=0x%p  dTD count=%d\n", req, req->dtd_count);
 154                 pr_debug("udc: dTD head=0x%p  tail=0x%p\n", req->head,
 155                          req->tail);
 156
 157                 dtd = req->head;
 158
 159                 while (dtd) {
 160                         if (le32_to_cpu(dtd->next_td_ptr) & DTD_NEXT_TERMINATE)
 161                                 break;  /* end of dTD list */
 162
 163                         dtd = dtd->next_td_virt;
 164                 }
 165         }
 166 }
 167 #else
 168 static inline void dump_ep_queue(struct fsl_ep *ep)
 169 {
 170 }
 171 #endif
 172
 173 #if (defined CONFIG_ARCH_MX35 || defined CONFIG_ARCH_MX25)
 174 /*
 175  * The Phy at MX35 and MX25 have bugs, it must disable, and re-eable phy
 176  * if the phy clock is disabled before
 177  */
 178 static void reset_phy(void)
 179 {
 180         u32 phyctrl;
 181         phyctrl = fsl_readl(&dr_regs->phyctrl1);
 182         phyctrl &= ~PHY_CTRL0_USBEN;
 183         fsl_writel(phyctrl, &dr_regs->phyctrl1);
 184
 185         phyctrl = fsl_readl(&dr_regs->phyctrl1);
 186         phyctrl |= PHY_CTRL0_USBEN;
 187         fsl_writel(phyctrl, &dr_regs->phyctrl1);
 188 }
 189 #else
 190 static void reset_phy(void){; }
 191 #endif
 192 /*-----------------------------------------------------------------
 193  * done() - retire a request; caller blocked irqs
 194  * @status : request status to be set, only works when
 195  *      request is still in progress.
 196  *--------------------------------------------------------------*/
 197 static void done(struct fsl_ep *ep, struct fsl_req *req, int status)
 198 {
 199         struct fsl_udc *udc = NULL;
 200         unsigned char stopped = ep->stopped;
 201         struct ep_td_struct *curr_td, *next_td;
 202         int j;
 203
 204         udc = (struct fsl_udc *)ep->udc;
 205         /* Removed the req from fsl_ep->queue */
 206         list_del_init(&req->queue);
 207
 208         /* req.status should be set as -EINPROGRESS in ep_queue() */
 209         if (req->req.status == -EINPROGRESS)
 210                 req->req.status = status;
 211         else
 212                 status = req->req.status;
 213
 214         /* Free dtd for the request */
 215         next_td = req->head;
 216         for (j = 0; j < req->dtd_count; j++) {
 217                 curr_td = next_td;
 218                 if (j != req->dtd_count - 1) {
 219                         next_td = curr_td->next_td_virt;
 220 #ifdef POSTPONE_FREE_LAST_DTD
 221                         dma_pool_free(udc->td_pool, curr_td, curr_td->td_dma);
 222                 } else {
 223                         if (last_free_td != NULL)
 224                                 dma_pool_free(udc->td_pool, last_free_td,
 225                                                 last_free_td->td_dma);
 226                         last_free_td = curr_td;
 227                 }
 228 #else
 229                 }
 230
 231                 dma_pool_free(udc->td_pool, curr_td, curr_td->td_dma);
 232 #endif
 233         }
 234
 235         if (USE_MSC_WR(req->req.length)) {
 236                 req->req.dma -= 1;
 237                 memmove(req->req.buf, req->req.buf + 1, MSC_BULK_CB_WRAP_LEN);
 238         }
 239
 240         if (req->mapped) {
 241                 dma_unmap_single(ep->udc->gadget.dev.parent,
 242                         req->req.dma, req->req.length,
 243                         ep_is_in(ep)
 244                                 ? DMA_TO_DEVICE
 245                                 : DMA_FROM_DEVICE);
 246                 req->req.dma = DMA_ADDR_INVALID;
 247                 req->mapped = 0;
 248         } else
 249                 dma_sync_single_for_cpu(ep->udc->gadget.dev.parent,
 250                         req->req.dma, req->req.length,
 251                         ep_is_in(ep)
 252                                 ? DMA_TO_DEVICE
 253                                 : DMA_FROM_DEVICE);
 254
 255         if (status && (status != -ESHUTDOWN))
 256                 VDBG("complete %s req %p stat %d len %u/%u",
 257                         ep->ep.name, &req->req, status,
 258                         req->req.actual, req->req.length);
 259
 260         ep->stopped = 1;
 261
 262         spin_unlock(&ep->udc->lock);
 263         /* complete() is from gadget layer,
 264          * eg fsg->bulk_in_complete() */
 265         if (req->req.complete)
 266                 req->req.complete(&ep->ep, &req->req);
 267
 268         spin_lock(&ep->udc->lock);
 269         ep->stopped = stopped;
 270 }
 271
 272 /*-----------------------------------------------------------------
 273  * nuke(): delete all requests related to this ep
 274  * called with spinlock held
 275  *--------------------------------------------------------------*/
 276 static void nuke(struct fsl_ep *ep, int status)
 277 {
 278         ep->stopped = 1;
 279         /*
 280          * At udc stop mode, the clock is already off
 281          * So flush fifo, should be done at clock on mode.
 282          */
 283         if (!ep->udc->stopped)
 284                 fsl_ep_fifo_flush(&ep->ep);
 285
 286         /* Whether this eq has request linked */
 287         while (!list_empty(&ep->queue)) {
 288                 struct fsl_req *req = NULL;
 289
 290                 req = list_entry(ep->queue.next, struct fsl_req, queue);
 291                 done(ep, req, status);
 292         }
 293         dump_ep_queue(ep);
 294 }
 295
 296 /*------------------------------------------------------------------
 297         Internal Hardware related function
 298  ------------------------------------------------------------------*/
 299 static void dr_discharge_line(struct fsl_usb2_platform_data *pdata, bool enable)
 300 {
 301         /* enable/disable pulldown dp and dm */
 302         if (pdata->dr_discharge_line) {
 303                 pdata->dr_discharge_line(enable);
 304         /*
 305          * Some platforms, like mx6x,  are very slow change line state
 306          * to SE0 for dp and dm.
 307          * So, we need to discharge dp and dm, otherwise there is a wakeup interrupt
 308          * after we enable the wakeup function.
 309          */
 310         if (enable)
 311                 gadget_wait_line_to_se0();
 312         }
 313
 314 }
 315
 316 static inline void
 317 dr_wake_up_enable(struct fsl_udc *udc, bool enable)
 318 {
 319         struct fsl_usb2_platform_data *pdata;
 320         pdata = udc->pdata;
 321
 322         if (pdata && pdata->wake_up_enable)
 323                 pdata->wake_up_enable(pdata, enable);
 324 }
 325
 326 static inline void dr_clk_gate(bool on)
 327 {
 328         struct fsl_usb2_platform_data *pdata = udc_controller->pdata;
 329
 330         if (!pdata || !pdata->usb_clock_for_pm)
 331                 return;
 332         pdata->usb_clock_for_pm(on);
 333         if (on)
 334                 reset_phy();
 335 }
 336
 337 static void dr_phy_low_power_mode(struct fsl_udc *udc, bool enable)
 338 {
 339         struct fsl_usb2_platform_data *pdata = udc->pdata;
 340         u32 portsc;
 341         unsigned long flags;
 342         spin_lock_irqsave(&pdata->lock, flags);
 343
 344         if (pdata && pdata->phy_lowpower_suspend) {
 345                 pdata->phy_lowpower_suspend(pdata, enable);
 346         } else {
 347                 if (enable) {
 348                         portsc = fsl_readl(&dr_regs->portsc1);
 349                         portsc |= PORTSCX_PHY_LOW_POWER_SPD;
 350                         fsl_writel(portsc, &dr_regs->portsc1);
 351                 } else {
 352                         portsc = fsl_readl(&dr_regs->portsc1);
 353                         portsc &= ~PORTSCX_PHY_LOW_POWER_SPD;
 354                         fsl_writel(portsc, &dr_regs->portsc1);
 355                 }
 356         }
 357         pdata->lowpower = enable;
 358         spin_unlock_irqrestore(&pdata->lock, flags);
 359 }
 360
 361 static int dr_controller_setup(struct fsl_udc *udc)
 362 {
 363         unsigned int tmp = 0, portctrl = 0;
 364         unsigned int __attribute((unused)) ctrl = 0;
 365         unsigned long timeout;
 366         struct fsl_usb2_platform_data *pdata;
 367
 368 #define FSL_UDC_RESET_TIMEOUT 1000
 369
 370         /* before here, make sure dr_regs has been initialized */
 371         if (!udc)
 372                 return -EINVAL;
 373         pdata = udc->pdata;
 374
 375         /* Stop and reset the usb controller */
 376         tmp = fsl_readl(&dr_regs->usbcmd);
 377         tmp &= ~USB_CMD_RUN_STOP;
 378         fsl_writel(tmp, &dr_regs->usbcmd);
 379
 380         tmp = fsl_readl(&dr_regs->usbcmd);
 381         tmp |= USB_CMD_CTRL_RESET;
 382         fsl_writel(tmp, &dr_regs->usbcmd);
 383
 384         /* Wait for reset to complete */
 385         timeout = jiffies + FSL_UDC_RESET_TIMEOUT;
 386         while (fsl_readl(&dr_regs->usbcmd) & USB_CMD_CTRL_RESET) {
 387                 if (time_after(jiffies, timeout)) {
 388                         ERR("udc reset timeout! \n");
 389                         return -ETIMEDOUT;
 390                 }
 391                 cpu_relax();
 392         }
 393
 394         /* Set the controller as device mode */
 395         tmp = fsl_readl(&dr_regs->usbmode);
 396         tmp &= ~USB_MODE_CTRL_MODE_MASK;        /* clear mode bits */
 397         tmp |= USB_MODE_CTRL_MODE_DEVICE;
 398         /* Disable Setup Lockout */
 399         tmp |= USB_MODE_SETUP_LOCK_OFF;
 400         if (pdata->es)
 401                 tmp |= USB_MODE_ES;
 402         fsl_writel(tmp, &dr_regs->usbmode);
 403         /* wait dp to 0v */
 404         dr_discharge_line(pdata, true);
 405
 406         fsl_platform_set_device_mode(pdata);
 407
 408         /* Clear the setup status */
 409         fsl_writel(0xffffffff, &dr_regs->usbsts);
 410
 411         tmp = udc->ep_qh_dma;
 412         tmp &= USB_EP_LIST_ADDRESS_MASK;
 413         fsl_writel(tmp, &dr_regs->endpointlistaddr);
 414
 415         VDBG("vir[qh_base] is %p phy[qh_base] is 0x%8x reg is 0x%8x",
 416                 (int)udc->ep_qh, (int)tmp,
 417                 fsl_readl(&dr_regs->endpointlistaddr));
 418
 419         /* Config PHY interface */
 420         portctrl = fsl_readl(&dr_regs->portsc1);
 421         portctrl &= ~(PORTSCX_PHY_TYPE_SEL | PORTSCX_PORT_WIDTH);
 422         switch (udc->phy_mode) {
 423         case FSL_USB2_PHY_ULPI:
 424                 portctrl |= PORTSCX_PTS_ULPI;
 425                 break;
 426         case FSL_USB2_PHY_UTMI_WIDE:
 427                 portctrl |= PORTSCX_PTW_16BIT;
 428                 /* fall through */
 429         case FSL_USB2_PHY_UTMI:
 430                 portctrl |= PORTSCX_PTS_UTMI;
 431                 break;
 432         case FSL_USB2_PHY_SERIAL:
 433                 portctrl |= PORTSCX_PTS_FSLS;
 434                 break;
 435         default:
 436                 return -EINVAL;
 437         }
 438         fsl_writel(portctrl, &dr_regs->portsc1);
 439
 440         if (pdata->change_ahb_burst) {
 441                 /* if usb should not work in default INCRx mode */
 442                 tmp = fsl_readl(&dr_regs->sbuscfg);
 443                 tmp = (tmp & ~0x07) | pdata->ahb_burst_mode;
 444                 fsl_writel(tmp, &dr_regs->sbuscfg);
 445         }
 446
 447         if (pdata->have_sysif_regs) {
 448                 /* Config control enable i/o output, cpu endian register */
 449                 ctrl = __raw_readl(&usb_sys_regs->control);
 450                 ctrl |= USB_CTRL_IOENB;
 451                 __raw_writel(ctrl, &usb_sys_regs->control);
 452         }
 453
 454 #if defined(CONFIG_PPC32) && !defined(CONFIG_NOT_COHERENT_CACHE)
 455         /* Turn on cache snooping hardware, since some PowerPC platforms
 456          * wholly rely on hardware to deal with cache coherent. */
 457
 458         if (pdata->have_sysif_regs) {
 459                 /* Setup Snooping for all the 4GB space */
 460                 tmp = SNOOP_SIZE_2GB;   /* starts from 0x0, size 2G */
 461                 __raw_writel(tmp, &usb_sys_regs->snoop1);
 462                 tmp |= 0x80000000;      /* starts from 0x8000000, size 2G */
 463                 __raw_writel(tmp, &usb_sys_regs->snoop2);
 464         }
 465 #endif
 466
 467         return 0;
 468 }
 469
 470 /* Enable DR irq and set controller to run state */
 471 static void dr_controller_run(struct fsl_udc *udc)
 472 {
 473         u32 temp;
 474
 475         udc_controller->usb_state = USB_STATE_ATTACHED;
 476         udc_controller->ep0_dir = 0;
 477
 478         fsl_platform_pullup_enable(udc->pdata);
 479
 480         /* Enable DR irq reg */
 481         temp = USB_INTR_INT_EN | USB_INTR_ERR_INT_EN
 482                 | USB_INTR_PTC_DETECT_EN | USB_INTR_RESET_EN
 483                 | USB_INTR_DEVICE_SUSPEND | USB_INTR_SYS_ERR_EN;
 484
 485         fsl_writel(temp, &dr_regs->usbintr);
 486
 487         /* enable BSV irq */
 488         temp = fsl_readl(&dr_regs->otgsc);
 489         temp |= OTGSC_B_SESSION_VALID_IRQ_EN;
 490         fsl_writel(temp, &dr_regs->otgsc);
 491
 492         /* If vbus not on and used low power mode */
 493         if (!(temp & OTGSC_B_SESSION_VALID)) {
 494                 /* Set stopped before low power mode */
 495                 udc->vbus_active = false;
 496                 udc->stopped = 1;
 497                 /* enable wake up */
 498                 dr_wake_up_enable(udc, true);
 499                 /* enter lower power mode */
 500                 dr_phy_low_power_mode(udc, true);
 501                 printk(KERN_DEBUG "%s: udc enter low power mode \n", __func__);
 502         } else {
 503 #ifdef CONFIG_ARCH_MX37
 504                 /*
 505                  add some delay for USB timing issue. USB may be
 506                  recognize as FS device
 507                  during USB gadget remote wake up function
 508                 */
 509                 mdelay(100);
 510 #endif
 511                 /* Clear stopped bit */
 512                 udc->stopped = 0;
 513
 514                 /* disable pulldown dp and dm */
 515                 dr_discharge_line(udc->pdata, false);
 516                 udc->vbus_active = true;
 517                 /* notify vbus is connected */
 518                 imx_usb_vbus_connect(&udc->charger);
 519                 printk(KERN_DEBUG "%s: udc out low power mode\n", __func__);
 520         }
 521
 522         return;
 523 }
 524
 525 static void dr_controller_stop(struct fsl_udc *udc)
 526 {
 527         unsigned int tmp;
 528
 529         pr_debug("%s\n", __func__);
 530
 531         /* if we're in OTG mode, and the Host is currently using the port,
 532          * stop now and don't rip the controller out from under the
 533          * ehci driver
 534          */
 535         if (udc->gadget.is_otg) {
 536                 if (!(fsl_readl(&dr_regs->otgsc) & OTGSC_STS_USB_ID)) {
 537                         pr_debug("udc: Leaving early\n");
 538                         return;
 539                 }
 540         }
 541
 542         /* disable all INTR */
 543         fsl_writel(0, &dr_regs->usbintr);
 544
 545         /* disable wake up */
 546         dr_wake_up_enable(udc, false);
 547         /* disable BSV irq */
 548         tmp = fsl_readl(&dr_regs->otgsc);
 549         tmp &= ~OTGSC_B_SESSION_VALID_IRQ_EN;
 550         fsl_writel(tmp, &dr_regs->otgsc);
 551
 552         /* Set stopped bit for isr */
 553         udc->stopped = 1;
 554
 555         /* disable IO output */
 556 /*      usb_sys_regs->control = 0; */
 557
 558         fsl_platform_pullup_disable(udc->pdata);
 559
 560         /* set controller to Stop */
 561         tmp = fsl_readl(&dr_regs->usbcmd);
 562         tmp &= ~USB_CMD_RUN_STOP;
 563         fsl_writel(tmp, &dr_regs->usbcmd);
 564
 565         return;
 566 }
 567
 568 void dr_ep_setup(unsigned char ep_num, unsigned char dir, unsigned char ep_type)
 569 {
 570         unsigned int tmp_epctrl = 0;
 571
 572         tmp_epctrl = fsl_readl(&dr_regs->endptctrl[ep_num]);
 573         if (dir) {
 574                 if (ep_num)
 575                         tmp_epctrl |= EPCTRL_TX_DATA_TOGGLE_RST;
 576                 tmp_epctrl |= EPCTRL_TX_ENABLE;
 577                 tmp_epctrl |= ((unsigned int)(ep_type)
 578                                 << EPCTRL_TX_EP_TYPE_SHIFT);
 579         } else {
 580                 if (ep_num)
 581                         tmp_epctrl |= EPCTRL_RX_DATA_TOGGLE_RST;
 582                 tmp_epctrl |= EPCTRL_RX_ENABLE;
 583                 tmp_epctrl |= ((unsigned int)(ep_type)
 584                                 << EPCTRL_RX_EP_TYPE_SHIFT);
 585         }
 586
 587         fsl_writel(tmp_epctrl, &dr_regs->endptctrl[ep_num]);
 588 }
 589
 590 static void
 591 dr_ep_change_stall(unsigned char ep_num, unsigned char dir, int value)
 592 {
 593         u32 tmp_epctrl = 0;
 594
 595         tmp_epctrl = fsl_readl(&dr_regs->endptctrl[ep_num]);
 596
 597         if (value) {
 598                 /* set the stall bit */
 599                 if (dir)
 600                         tmp_epctrl |= EPCTRL_TX_EP_STALL;
 601                 else
 602                         tmp_epctrl |= EPCTRL_RX_EP_STALL;
 603         } else {
 604                 /* clear the stall bit and reset data toggle */
 605                 if (dir) {
 606                         tmp_epctrl &= ~EPCTRL_TX_EP_STALL;
 607                         tmp_epctrl |= EPCTRL_TX_DATA_TOGGLE_RST;
 608                 } else {
 609                         tmp_epctrl &= ~EPCTRL_RX_EP_STALL;
 610                         tmp_epctrl |= EPCTRL_RX_DATA_TOGGLE_RST;
 611                 }
 612         }
 613         fsl_writel(tmp_epctrl, &dr_regs->endptctrl[ep_num]);
 614 }
 615
 616 /* Get stall status of a specific ep
 617    Return: 0: not stalled; 1:stalled */
 618 static int dr_ep_get_stall(unsigned char ep_num, unsigned char dir)
 619 {
 620         u32 epctrl;
 621
 622         epctrl = fsl_readl(&dr_regs->endptctrl[ep_num]);
 623         if (dir)
 624                 return (epctrl & EPCTRL_TX_EP_STALL) ? 1 : 0;
 625         else
 626                 return (epctrl & EPCTRL_RX_EP_STALL) ? 1 : 0;
 627 }
 628
 629 /********************************************************************
 630         Internal Structure Build up functions
 631 ********************************************************************/
 632
 633 /*------------------------------------------------------------------
 634 * struct_ep_qh_setup(): set the Endpoint Capabilites field of QH
 635  * @zlt: Zero Length Termination Select (1: disable; 0: enable)
 636  * @mult: Mult field
 637  ------------------------------------------------------------------*/
 638 static void struct_ep_qh_setup(struct fsl_udc *udc, unsigned char ep_num,
 639                 unsigned char dir, unsigned char ep_type,
 640                 unsigned int max_pkt_len,
 641                 unsigned int zlt, unsigned char mult)
 642 {
 643         struct ep_queue_head *p_QH = &udc->ep_qh[2 * ep_num + dir];
 644         unsigned int tmp = 0;
 645
 646         /* set the Endpoint Capabilites in QH */
 647         switch (ep_type) {
 648         case USB_ENDPOINT_XFER_CONTROL:
 649                 /* Interrupt On Setup (IOS). for control ep  */
 650                 tmp = (max_pkt_len << EP_QUEUE_HEAD_MAX_PKT_LEN_POS)
 651                         | EP_QUEUE_HEAD_IOS;
 652                 break;
 653         case USB_ENDPOINT_XFER_ISOC:
 654                 tmp = (max_pkt_len << EP_QUEUE_HEAD_MAX_PKT_LEN_POS)
 655                         | (mult << EP_QUEUE_HEAD_MULT_POS);
 656                 break;
 657         case USB_ENDPOINT_XFER_BULK:
 658         case USB_ENDPOINT_XFER_INT:
 659                 tmp = max_pkt_len << EP_QUEUE_HEAD_MAX_PKT_LEN_POS;
 660                 break;
 661         default:
 662                 VDBG("error ep type is %d", ep_type);
 663                 return;
 664         }
 665         if (zlt)
 666                 tmp |= EP_QUEUE_HEAD_ZLT_SEL;
 667         p_QH->max_pkt_length = cpu_to_hc32(tmp);
 668
 669         return;
 670 }
 671
 672 /* Setup qh structure and ep register for ep0. */
 673 static void ep0_setup(struct fsl_udc *udc)
 674 {
 675         /* the intialization of an ep includes: fields in QH, Regs,
 676          * fsl_ep struct */
 677         struct_ep_qh_setup(udc, 0, USB_RECV, USB_ENDPOINT_XFER_CONTROL,
 678                         USB_MAX_CTRL_PAYLOAD, 0, 0);
 679         struct_ep_qh_setup(udc, 0, USB_SEND, USB_ENDPOINT_XFER_CONTROL,
 680                         USB_MAX_CTRL_PAYLOAD, 0, 0);
 681         dr_ep_setup(0, USB_RECV, USB_ENDPOINT_XFER_CONTROL);
 682         dr_ep_setup(0, USB_SEND, USB_ENDPOINT_XFER_CONTROL);
 683
 684         return;
 685
 686 }
 687
 688 /***********************************************************************
 689                 Endpoint Management Functions
 690 ***********************************************************************/
 691
 692 /*-------------------------------------------------------------------------
 693  * when configurations are set, or when interface settings change
 694  * for example the do_set_interface() in gadget layer,
 695  * the driver will enable or disable the relevant endpoints
 696  * ep0 doesn't use this routine. It is always enabled.
 697 -------------------------------------------------------------------------*/
 698 static int fsl_ep_enable(struct usb_ep *_ep,
 699                 const struct usb_endpoint_descriptor *desc)
 700 {
 701         struct fsl_udc *udc = NULL;
 702         struct fsl_ep *ep = NULL;
 703         unsigned short max = 0;
 704         unsigned char mult = 0, zlt;
 705         int retval = -EINVAL;
 706         unsigned long flags = 0;
 707
 708         ep = container_of(_ep, struct fsl_ep, ep);
 709
 710         pr_debug("udc: %s ep.name=%s\n", __func__, ep->ep.name);
 711         /* catch various bogus parameters */
 712         if (!_ep || !desc || ep->desc
 713                         || (desc->bDescriptorType != USB_DT_ENDPOINT))
 714                 return -EINVAL;
 715
 716         udc = ep->udc;
 717
 718         if (!udc->driver || (udc->gadget.speed == USB_SPEED_UNKNOWN))
 719                 return -ESHUTDOWN;
 720
 721         max = le16_to_cpu(desc->wMaxPacketSize);
 722
 723         /* Disable automatic zlp generation.  Driver is reponsible to indicate
 724          * explicitly through req->req.zero.  This is needed to enable multi-td
 725          * request. */
 726         zlt = 1;
 727
 728         /* Assume the max packet size from gadget is always correct */
 729         switch (desc->bmAttributes & 0x03) {
 730         case USB_ENDPOINT_XFER_CONTROL:
 731         case USB_ENDPOINT_XFER_BULK:
 732         case USB_ENDPOINT_XFER_INT:
 733                 /* mult = 0.  Execute N Transactions as demonstrated by
 734                  * the USB variable length packet protocol where N is
 735                  * computed using the Maximum Packet Length (dQH) and
 736                  * the Total Bytes field (dTD) */
 737                 mult = 0;
 738                 break;
 739         case USB_ENDPOINT_XFER_ISOC:
 740                 /* Calculate transactions needed for high bandwidth iso */
 741                 mult = (unsigned char)(1 + ((max >> 11) & 0x03));
 742                 max = max & 0x7ff;      /* bit 0~10 */
 743                 /* 3 transactions at most */
 744                 if (mult > 3)
 745                         goto en_done;
 746                 break;
 747         default:
 748                 goto en_done;
 749         }
 750
 751         spin_lock_irqsave(&udc->lock, flags);
 752         ep->ep.maxpacket = max;
 753         ep->desc = desc;
 754         ep->stopped = 0;
 755
 756         /* Controller related setup */
 757         /* Init EPx Queue Head (Ep Capabilites field in QH
 758          * according to max, zlt, mult) */
 759         struct_ep_qh_setup(udc, (unsigned char) ep_index(ep),
 760                         (unsigned char) ((desc->bEndpointAddress & USB_DIR_IN)
 761                                         ?  USB_SEND : USB_RECV),
 762                         (unsigned char) (desc->bmAttributes
 763                                         & USB_ENDPOINT_XFERTYPE_MASK),
 764                         max, zlt, mult);
 765
 766         /* Init endpoint ctrl register */
 767         dr_ep_setup((unsigned char) ep_index(ep),
 768                         (unsigned char) ((desc->bEndpointAddress & USB_DIR_IN)
 769                                         ? USB_SEND : USB_RECV),
 770                         (unsigned char) (desc->bmAttributes
 771                                         & USB_ENDPOINT_XFERTYPE_MASK));
 772
 773         spin_unlock_irqrestore(&udc->lock, flags);
 774         retval = 0;
 775
 776         VDBG("enabled %s (ep%d%s) maxpacket %d", ep->ep.name,
 777                         ep->desc->bEndpointAddress & 0x0f,
 778                         (desc->bEndpointAddress & USB_DIR_IN)
 779                                 ? "in" : "out", max);
 780 en_done:
 781         return retval;
 782 }
 783
 784 /*---------------------------------------------------------------------
 785  * @ep : the ep being unconfigured. May not be ep0
 786  * Any pending and uncomplete req will complete with status (-ESHUTDOWN)
 787 *---------------------------------------------------------------------*/
 788 static int fsl_ep_disable(struct usb_ep *_ep)
 789 {
 790         struct fsl_udc *udc = NULL;
 791         struct fsl_ep *ep = NULL;
 792         unsigned long flags = 0;
 793         u32 epctrl;
 794         int ep_num;
 795
 796         ep = container_of(_ep, struct fsl_ep, ep);
 797         if (!_ep || !ep->desc) {
 798                 VDBG("%s not enabled", _ep ? ep->ep.name : NULL);
 799                 return -EINVAL;
 800         }
 801
 802         /* disable ep on controller */
 803         ep_num = ep_index(ep);
 804         epctrl = fsl_readl(&dr_regs->endptctrl[ep_num]);
 805         if (ep_is_in(ep))
 806                 epctrl &= ~EPCTRL_TX_ENABLE;
 807         else
 808                 epctrl &= ~EPCTRL_RX_ENABLE;
 809         fsl_writel(epctrl, &dr_regs->endptctrl[ep_num]);
 810
 811         udc = (struct fsl_udc *)ep->udc;
 812         spin_lock_irqsave(&udc->lock, flags);
 813         /* nuke all pending requests (does flush) */
 814         nuke(ep, -ESHUTDOWN);
 815
 816         ep->desc = 0;
 817         ep->stopped = 1;
 818         spin_unlock_irqrestore(&udc->lock, flags);
 819
 820         VDBG("disabled %s OK", _ep->name);
 821         return 0;
 822 }
 823
 824 /*---------------------------------------------------------------------
 825  * allocate a request object used by this endpoint
 826  * the main operation is to insert the req->queue to the eq->queue
 827  * Returns the request, or null if one could not be allocated
 828 *---------------------------------------------------------------------*/
 829 static struct usb_request *
 830 fsl_alloc_request(struct usb_ep *_ep, gfp_t gfp_flags)
 831 {
 832         struct fsl_req *req = NULL;
 833
 834         req = kzalloc(sizeof *req, gfp_flags);
 835         if (!req)
 836                 return NULL;
 837
 838         req->req.dma = DMA_ADDR_INVALID;
 839         pr_debug("udc: req=0x%p   set req.dma=0x%x\n", req, req->req.dma);
 840         INIT_LIST_HEAD(&req->queue);
 841
 842         return &req->req;
 843 }
 844
 845 static void fsl_free_request(struct usb_ep *_ep, struct usb_request *_req)
 846 {
 847         struct fsl_req *req = NULL;
 848
 849         req = container_of(_req, struct fsl_req, req);
 850
 851         if (_req)
 852                 kfree(req);
 853 }
 854
 855 static void update_qh(struct fsl_req *req)
 856 {
 857         struct fsl_ep *ep = req->ep;
 858         int i = ep_index(ep) * 2 + ep_is_in(ep);
 859         u32 temp;
 860         struct ep_queue_head *dQH = &ep->udc->ep_qh[i];
 861
 862         /* Write dQH next pointer and terminate bit to 0 */
 863         temp = req->head->td_dma & EP_QUEUE_HEAD_NEXT_POINTER_MASK;
 864         if (NEED_IRAM(req->ep)) {
 865                 /* set next dtd stop bit,ensure only one dtd in this list */
 866                 req->cur->next_td_ptr |= cpu_to_hc32(DTD_NEXT_TERMINATE);
 867                 temp = req->cur->td_dma & EP_QUEUE_HEAD_NEXT_POINTER_MASK;
 868         }
 869         dQH->next_dtd_ptr = cpu_to_hc32(temp);
 870         /* Clear active and halt bit */
 871         temp = cpu_to_hc32(~(EP_QUEUE_HEAD_STATUS_ACTIVE
 872                              | EP_QUEUE_HEAD_STATUS_HALT));
 873         dQH->size_ioc_int_sts &= temp;
 874
 875 #ifdef CONFIG_ARM_DMA_MEM_BUFFERABLE
 876         wmb();
 877 #endif
 878         /* Prime endpoint by writing 1 to ENDPTPRIME */
 879         temp = ep_is_in(ep)
 880             ? (1 << (ep_index(ep) + 16))
 881             : (1 << (ep_index(ep)));
 882         fsl_writel(temp, &dr_regs->endpointprime);
 883 }
 884
 885 /*-------------------------------------------------------------------------*/
 886 static int fsl_queue_td(struct fsl_ep *ep, struct fsl_req *req)
 887 {
 888         u32 temp, bitmask, tmp_stat;
 889
 890         /* VDBG("QH addr Register 0x%8x", dr_regs->endpointlistaddr);
 891         VDBG("ep_qh[%d] addr is 0x%8x", i, (u32)&(ep->udc->ep_qh[i])); */
 892
 893         bitmask = ep_is_in(ep)
 894                 ? (1 << (ep_index(ep) + 16))
 895                 : (1 << (ep_index(ep)));
 896
 897         /*
 898          * check if
 899          * - the request is empty, and
 900          * - the request is not the status request for ep0
 901          */
 902         if (!(list_empty(&ep->queue)) &&
 903                 !((ep_index(ep) == 0) && (req->req.length == 0))) {
 904                 /* Add td to the end */
 905                 struct fsl_req *lastreq;
 906                 lastreq = list_entry(ep->queue.prev, struct fsl_req, queue);
 907                 if (NEED_IRAM(ep)) {
 908                         /* only one dtd in dqh */
 909                         lastreq->tail->next_td_ptr =
 910                             cpu_to_hc32(req->head->td_dma | DTD_NEXT_TERMINATE);
 911                         goto out;
 912                 } else {
 913                         lastreq->tail->next_td_ptr =
 914                             cpu_to_hc32(req->head->td_dma & DTD_ADDR_MASK);
 915                 }
 916         #ifdef CONFIG_ARM_DMA_MEM_BUFFERABLE
 917                 wmb();
 918         #endif
 919                 /* Read prime bit, if 1 goto done */
 920                 if (fsl_readl(&dr_regs->endpointprime) & bitmask)
 921                         goto out;
 922                 do {
 923                         /* Set ATDTW bit in USBCMD */
 924                         temp = fsl_readl(&dr_regs->usbcmd);
 925                         fsl_writel(temp | USB_CMD_ATDTW, &dr_regs->usbcmd);
 926
 927                         /* Read correct status bit */
 928                         tmp_stat = fsl_readl(&dr_regs->endptstatus) & bitmask;
 929
 930                 } while (!(fsl_readl(&dr_regs->usbcmd) & USB_CMD_ATDTW));
 931
 932                 /* Write ATDTW bit to 0 */
 933                 temp = fsl_readl(&dr_regs->usbcmd);
 934                 fsl_writel(temp & ~USB_CMD_ATDTW, &dr_regs->usbcmd);
 935
 936                 if (tmp_stat)
 937                         goto out;
 938         }
 939         update_qh(req);
 940 out:
 941         return 0;
 942 }
 943
 944 /* Fill in the dTD structure
 945  * @req: request that the transfer belongs to
 946  * @length: return actually data length of the dTD
 947  * @dma: return dma address of the dTD
 948  * @is_last: return flag if it is the last dTD of the request
 949  * return: pointer to the built dTD */
 950 static struct ep_td_struct *fsl_build_dtd(struct fsl_req *req, unsigned *length,
 951                 dma_addr_t *dma, int *is_last)
 952 {
 953         u32 swap_temp;
 954         struct ep_td_struct *dtd;
 955
 956         /* how big will this transfer be? */
 957         *length = min(req->req.length - req->req.actual,
 958                         (unsigned)EP_MAX_LENGTH_TRANSFER);
 959         if (NEED_IRAM(req->ep))
 960                 *length = min(*length, g_iram_size);
 961 #ifdef CONFIG_FSL_UTP
 962         dtd = dma_pool_alloc_nonbufferable(udc_controller->td_pool, GFP_ATOMIC, dma);
 963 #else
 964         dtd = dma_pool_alloc(udc_controller->td_pool, GFP_ATOMIC, dma);
 965 #endif
 966         if (dtd == NULL)
 967                 return dtd;
 968
 969         dtd->td_dma = *dma;
 970         /* Clear reserved field */
 971         swap_temp = hc32_to_cpu(dtd->size_ioc_sts);
 972         swap_temp &= ~DTD_RESERVED_FIELDS;
 973         dtd->size_ioc_sts = cpu_to_hc32(swap_temp);
 974
 975         /* Init all of buffer page pointers */
 976         swap_temp = (u32) (req->req.dma + req->req.actual);
 977         if (NEED_IRAM(req->ep))
 978                 swap_temp = (u32) (req->req.dma);
 979         dtd->buff_ptr0 = cpu_to_hc32(swap_temp);
 980         dtd->buff_ptr1 = cpu_to_hc32(swap_temp + 0x1000);
 981         dtd->buff_ptr2 = cpu_to_hc32(swap_temp + 0x2000);
 982         dtd->buff_ptr3 = cpu_to_hc32(swap_temp + 0x3000);
 983         dtd->buff_ptr4 = cpu_to_hc32(swap_temp + 0x4000);
 984
 985         req->req.actual += *length;
 986
 987         /* zlp is needed if req->req.zero is set */
 988         if (req->req.zero) {
 989                 if (*length == 0 || (*length % req->ep->ep.maxpacket) != 0)
 990                         *is_last = 1;
 991                 else
 992                         *is_last = 0;
 993         } else if (req->req.length == req->req.actual)
 994                 *is_last = 1;
 995         else
 996                 *is_last = 0;
 997
 998         if ((*is_last) == 0)
 999                 VDBG("multi-dtd request!\n");
1000         /* Fill in the transfer size; set active bit */
1001         swap_temp = ((*length << DTD_LENGTH_BIT_POS) | DTD_STATUS_ACTIVE);
1002
1003         /* Enable interrupt for the last dtd of a request */
1004         if (*is_last && !req->req.no_interrupt)
1005                 swap_temp |= DTD_IOC;
1006         if (NEED_IRAM(req->ep))
1007                 swap_temp |= DTD_IOC;
1008
1009         dtd->size_ioc_sts = cpu_to_hc32(swap_temp);
1010
1011         mb();
1012
1013         VDBG("length = %d address= 0x%x", *length, (int)*dma);
1014
1015         return dtd;
1016 }
1017
1018 /* Generate dtd chain for a request */
1019 static int fsl_req_to_dtd(struct fsl_req *req)
1020 {
1021         unsigned        count;
1022         int             is_last;
1023         int             is_first = 1;
1024         struct ep_td_struct     *last_dtd = NULL, *dtd;
1025         dma_addr_t dma;
1026
1027         if (NEED_IRAM(req->ep)) {
1028                 req->oridma = req->req.dma;
1029                 /* here, replace user buffer to iram buffer */
1030                 if (ep_is_in(req->ep)) {
1031                         req->req.dma = req->ep->udc->iram_buffer[1];
1032                         if ((list_empty(&req->ep->queue))) {
1033                                 /* copy data only when no bulk in transfer is
1034                                    running */
1035                                 memcpy((char *)req->ep->udc->iram_buffer_v[1],
1036                                        req->req.buf, min(req->req.length,
1037                                                          g_iram_size));
1038                         }
1039                 } else {
1040                         req->req.dma = req->ep->udc->iram_buffer[0];
1041                 }
1042         }
1043
1044         if (USE_MSC_WR(req->req.length))
1045                 req->req.dma += 1;
1046
1047         do {
1048                 dtd = fsl_build_dtd(req, &count, &dma, &is_last);
1049                 if (dtd == NULL)
1050                         return -ENOMEM;
1051
1052                 if (is_first) {
1053                         is_first = 0;
1054                         req->head = dtd;
1055                 } else {
1056                         last_dtd->next_td_ptr = cpu_to_hc32(dma);
1057                         last_dtd->next_td_virt = dtd;
1058                 }
1059                 last_dtd = dtd;
1060
1061                 req->dtd_count++;
1062         } while (!is_last);
1063
1064         dtd->next_td_ptr = cpu_to_hc32(DTD_NEXT_TERMINATE);
1065         req->cur = req->head;
1066         req->tail = dtd;
1067
1068         return 0;
1069 }
1070
1071 /* queues (submits) an I/O request to an endpoint */
1072 static int
1073 fsl_ep_queue(struct usb_ep *_ep, struct usb_request *_req, gfp_t gfp_flags)
1074 {
1075         struct fsl_ep *ep = container_of(_ep, struct fsl_ep, ep);
1076         struct fsl_req *req = container_of(_req, struct fsl_req, req);
1077         struct fsl_udc *udc;
1078         unsigned long flags;
1079         int is_iso = 0;
1080
1081
1082         if (!_ep || !ep->desc) {
1083                 VDBG("%s, bad ep\n", __func__);
1084                 return -EINVAL;
1085         }
1086
1087         udc = ep->udc;
1088         spin_lock_irqsave(&udc->lock, flags);
1089
1090         /* catch various bogus parameters */
1091         if (!_req || !req->req.buf || (ep_index(ep)
1092                                       && !list_empty(&req->queue))) {
1093                 VDBG("%s, bad params\n", __func__);
1094                 spin_unlock_irqrestore(&udc->lock, flags);
1095                 return -EINVAL;
1096         }
1097         if (usb_endpoint_xfer_isoc(ep->desc)) {
1098                 if (req->req.length > ep->ep.maxpacket) {
1099                         spin_unlock_irqrestore(&udc->lock, flags);
1100                         return -EMSGSIZE;
1101                 }
1102                 is_iso = 1;
1103         }
1104
1105         if (!udc->driver || udc->gadget.speed == USB_SPEED_UNKNOWN) {
1106                 spin_unlock_irqrestore(&udc->lock, flags);
1107                 return -ESHUTDOWN;
1108         }
1109         req->ep = ep;
1110
1111         /* map virtual address to hardware */
1112         if (req->req.dma == DMA_ADDR_INVALID) {
1113                 req->req.dma = dma_map_single(ep->udc->gadget.dev.parent,
1114                                         req->req.buf,
1115                                         req->req.length, ep_is_in(ep)
1116                                                 ? DMA_TO_DEVICE
1117                                                 : DMA_FROM_DEVICE);
1118                 req->mapped = 1;
1119         } else {
1120                 dma_sync_single_for_device(ep->udc->gadget.dev.parent,
1121                                         req->req.dma, req->req.length,
1122                                         ep_is_in(ep)
1123                                                 ? DMA_TO_DEVICE
1124                                                 : DMA_FROM_DEVICE);
1125                 req->mapped = 0;
1126         }
1127
1128         req->req.status = -EINPROGRESS;
1129         req->req.actual = 0;
1130         req->dtd_count = 0;
1131         if (NEED_IRAM(ep)) {
1132                 req->last_one = 0;
1133                 req->buffer_offset = 0;
1134         }
1135
1136         /* build dtds and push them to device queue */
1137         if (!fsl_req_to_dtd(req)) {
1138                 fsl_queue_td(ep, req);
1139         } else {
1140                 spin_unlock_irqrestore(&udc->lock, flags);
1141                 return -ENOMEM;
1142         }
1143
1144         /* irq handler advances the queue */
1145         if (req != NULL)
1146                 list_add_tail(&req->queue, &ep->queue);
1147
1148         spin_unlock_irqrestore(&udc->lock, flags);
1149
1150         return 0;
1151 }
1152
1153 /* dequeues (cancels, unlinks) an I/O request from an endpoint */
1154 static int fsl_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req)
1155 {
1156         struct fsl_ep *ep = container_of(_ep, struct fsl_ep, ep);
1157         struct fsl_req *req;
1158         unsigned long flags;
1159         int ep_num, stopped, ret = 0;
1160         struct fsl_udc *udc = NULL;
1161         u32 epctrl;
1162
1163         if (!_ep || !_req)
1164                 return -EINVAL;
1165
1166         spin_lock_irqsave(&ep->udc->lock, flags);
1167         stopped = ep->stopped;
1168         udc = ep->udc;
1169
1170         /* Stop the ep before we deal with the queue */
1171         ep->stopped = 1;
1172         ep_num = ep_index(ep);
1173         epctrl = fsl_readl(&dr_regs->endptctrl[ep_num]);
1174         if (ep_is_in(ep))
1175                 epctrl &= ~EPCTRL_TX_ENABLE;
1176         else
1177                 epctrl &= ~EPCTRL_RX_ENABLE;
1178         fsl_writel(epctrl, &dr_regs->endptctrl[ep_num]);
1179
1180         /* make sure it's actually queued on this endpoint */
1181         list_for_each_entry(req, &ep->queue, queue) {
1182                 if (&req->req == _req)
1183                         break;
1184         }
1185         if (&req->req != _req) {
1186                 ret = -EINVAL;
1187                 goto out;
1188         }
1189
1190         /* The request is in progress, or completed but not dequeued */
1191         if (ep->queue.next == &req->queue) {
1192                 _req->status = -ECONNRESET;
1193                 fsl_ep_fifo_flush(_ep); /* flush current transfer */
1194
1195                 /* The request isn't the last request in this ep queue */
1196                 if (req->queue.next != &ep->queue) {
1197                         struct ep_queue_head *qh;
1198                         struct fsl_req *next_req;
1199
1200                         qh = ep->qh;
1201                         next_req = list_entry(req->queue.next, struct fsl_req,
1202                                         queue);
1203
1204                         /* prime with dTD of next request */
1205                         update_qh(next_req);
1206                 }
1207
1208                 /* The request hasn't been processed, patch up the TD chain */
1209         } else {
1210                 struct fsl_req *prev_req;
1211
1212                 prev_req = list_entry(req->queue.prev, struct fsl_req, queue);
1213                 prev_req->tail->next_td_ptr = req->tail->next_td_ptr;
1214         #ifdef CONFIG_ARM_DMA_MEM_BUFFERABLE
1215                 wmb();
1216         #endif
1217         }
1218
1219         done(ep, req, -ECONNRESET);
1220
1221         /* Enable EP */
1222 out:    epctrl = fsl_readl(&dr_regs->endptctrl[ep_num]);
1223         if (ep_is_in(ep))
1224                 epctrl |= EPCTRL_TX_ENABLE;
1225         else
1226                 epctrl |= EPCTRL_RX_ENABLE;
1227         fsl_writel(epctrl, &dr_regs->endptctrl[ep_num]);
1228         ep->stopped = stopped;
1229
1230         spin_unlock_irqrestore(&ep->udc->lock, flags);
1231         return ret;
1232 }
1233
1234 /*-------------------------------------------------------------------------*/
1235
1236 /*-----------------------------------------------------------------
1237  * modify the endpoint halt feature
1238  * @ep: the non-isochronous endpoint being stalled
1239  * @value: 1--set halt  0--clear halt
1240  * Returns zero, or a negative error code.
1241 *----------------------------------------------------------------*/
1242 static int fsl_ep_set_halt(struct usb_ep *_ep, int value)
1243 {
1244         struct fsl_ep *ep = NULL;
1245         unsigned long flags = 0;
1246         int status = -EOPNOTSUPP;       /* operation not supported */
1247         unsigned char ep_dir = 0, ep_num = 0;
1248         struct fsl_udc *udc = NULL;
1249
1250         ep = container_of(_ep, struct fsl_ep, ep);
1251         udc = ep->udc;
1252         if (!_ep || !ep->desc) {
1253                 status = -EINVAL;
1254                 goto out;
1255         }
1256         if (!udc->driver || (udc->gadget.speed == USB_SPEED_UNKNOWN)) {
1257                 status = -ESHUTDOWN;
1258                 goto out;
1259         }
1260
1261         if (usb_endpoint_xfer_isoc(ep->desc)) {
1262                 status = -EOPNOTSUPP;
1263                 goto out;
1264         }
1265
1266         /* Attempt to halt IN ep will fail if any transfer requests
1267          * are still queue */
1268         if (value && ep_is_in(ep) && !list_empty(&ep->queue)) {
1269                 status = -EAGAIN;
1270                 goto out;
1271         }
1272
1273         status = 0;
1274         ep_dir = ep_is_in(ep) ? USB_SEND : USB_RECV;
1275         ep_num = (unsigned char)(ep_index(ep));
1276         spin_lock_irqsave(&ep->udc->lock, flags);
1277         dr_ep_change_stall(ep_num, ep_dir, value);
1278         spin_unlock_irqrestore(&ep->udc->lock, flags);
1279
1280         if (ep_index(ep) == 0) {
1281                 udc->ep0_dir = 0;
1282         }
1283 out:
1284         VDBG(" %s %s halt stat %d", ep->ep.name,
1285                         value ?  "set" : "clear", status);
1286
1287         return status;
1288 }
1289
1290 static int arcotg_fifo_status(struct usb_ep *_ep)
1291 {
1292         struct fsl_ep *ep;
1293         struct fsl_udc *udc;
1294         int size = 0;
1295         u32 bitmask;
1296         struct ep_queue_head *d_qh;
1297
1298         ep = container_of(_ep, struct fsl_ep, ep);
1299         if (!_ep || (!ep->desc && ep_index(ep) != 0))
1300                 return -ENODEV;
1301
1302         udc = (struct fsl_udc *)ep->udc;
1303
1304         if (!udc->driver || udc->gadget.speed == USB_SPEED_UNKNOWN)
1305                 return -ESHUTDOWN;
1306
1307         d_qh = &ep->udc->ep_qh[ep_index(ep) * 2 + ep_is_in(ep)];
1308
1309         bitmask = (ep_is_in(ep)) ? (1 << (ep_index(ep) + 16)) :
1310             (1 << (ep_index(ep)));
1311
1312         if (fsl_readl(&dr_regs->endptstatus) & bitmask)
1313                 size = (d_qh->size_ioc_int_sts & DTD_PACKET_SIZE)
1314                     >> DTD_LENGTH_BIT_POS;
1315
1316         pr_debug("%s %u\n", __func__, size);
1317         return size;
1318 }
1319
1320 static void fsl_ep_fifo_flush(struct usb_ep *_ep)
1321 {
1322         struct fsl_ep *ep;
1323         int ep_num, ep_dir;
1324         u32 bits;
1325         unsigned long timeout;
1326 #define FSL_UDC_FLUSH_TIMEOUT 1000
1327
1328         if (!_ep) {
1329                 return;
1330         } else {
1331                 ep = container_of(_ep, struct fsl_ep, ep);
1332                 if (!ep->desc)
1333                         return;
1334         }
1335         ep_num = ep_index(ep);
1336         ep_dir = ep_is_in(ep) ? USB_SEND : USB_RECV;
1337
1338         if (ep_num == 0)
1339                 bits = (1 << 16) | 1;
1340         else if (ep_dir == USB_SEND)
1341                 bits = 1 << (16 + ep_num);
1342         else
1343                 bits = 1 << ep_num;
1344
1345         timeout = jiffies + FSL_UDC_FLUSH_TIMEOUT;
1346         do {
1347                 fsl_writel(bits, &dr_regs->endptflush);
1348
1349                 /* Wait until flush complete */
1350                 while (fsl_readl(&dr_regs->endptflush)) {
1351                         if (time_after(jiffies, timeout)) {
1352                                 ERR("ep flush timeout\n");
1353                                 return;
1354                         }
1355                         cpu_relax();
1356                 }
1357                 /* See if we need to flush again */
1358         } while (fsl_readl(&dr_regs->endptstatus) & bits);
1359 }
1360
1361 static struct usb_ep_ops fsl_ep_ops = {
1362         .enable = fsl_ep_enable,
1363         .disable = fsl_ep_disable,
1364
1365         .alloc_request = fsl_alloc_request,
1366         .free_request = fsl_free_request,
1367
1368         .queue = fsl_ep_queue,
1369         .dequeue = fsl_ep_dequeue,
1370
1371         .set_halt = fsl_ep_set_halt,
1372         .fifo_status = arcotg_fifo_status,
1373         .fifo_flush = fsl_ep_fifo_flush,        /* flush fifo */
1374 };
1375
1376 /*-------------------------------------------------------------------------
1377                 Gadget Driver Layer Operations
1378 -------------------------------------------------------------------------*/
1379
1380 /*----------------------------------------------------------------------
1381  * Get the current frame number (from DR frame_index Reg )
1382  *----------------------------------------------------------------------*/
1383 static int fsl_get_frame(struct usb_gadget *gadget)
1384 {
1385         return (int)(fsl_readl(&dr_regs->frindex) & USB_FRINDEX_MASKS);
1386 }
1387
1388 /*-----------------------------------------------------------------------
1389  * Tries to wake up the host connected to this gadget
1390  -----------------------------------------------------------------------*/
1391 static int fsl_wakeup(struct usb_gadget *gadget)
1392 {
1393         struct fsl_udc *udc = container_of(gadget, struct fsl_udc, gadget);
1394         u32 portsc;
1395
1396         /* Remote wakeup feature not enabled by host */
1397         if (!udc->remote_wakeup)
1398                 return -ENOTSUPP;
1399
1400         portsc = fsl_readl(&dr_regs->portsc1);
1401         /* not suspended? */
1402         if (!(portsc & PORTSCX_PORT_SUSPEND))
1403                 return 0;
1404         /* trigger force resume */
1405         portsc |= PORTSCX_PORT_FORCE_RESUME;
1406         fsl_writel(portsc, &dr_regs->portsc1);
1407         return 0;
1408 }
1409
1410 static int can_pullup(struct fsl_udc *udc)
1411 {
1412         return udc->driver && udc->softconnect && udc->vbus_active;
1413 }
1414
1415 /* Notify controller that VBUS is powered, Called by whatever
1416    detects VBUS sessions */
1417 static int fsl_vbus_session(struct usb_gadget *gadget, int is_active)
1418 {
1419         struct fsl_udc  *udc;
1420         unsigned long   flags;
1421
1422         udc = container_of(gadget, struct fsl_udc, gadget);
1423         spin_lock_irqsave(&udc->lock, flags);
1424         VDBG("VBUS %s\n", is_active ? "on" : "off");
1425         udc->vbus_active = (is_active != 0);
1426         if (can_pullup(udc))
1427                 fsl_writel((fsl_readl(&dr_regs->usbcmd) | USB_CMD_RUN_STOP),
1428                                 &dr_regs->usbcmd);
1429         else
1430                 fsl_writel((fsl_readl(&dr_regs->usbcmd) & ~USB_CMD_RUN_STOP),
1431                                 &dr_regs->usbcmd);
1432         spin_unlock_irqrestore(&udc->lock, flags);
1433         return 0;
1434 }
1435
1436 /* constrain controller's VBUS power usage
1437  * This call is used by gadget drivers during SET_CONFIGURATION calls,
1438  * reporting how much power the device may consume.  For example, this
1439  * could affect how quickly batteries are recharged.
1440  *
1441  * Returns zero on success, else negative errno.
1442  */
1443 static int fsl_vbus_draw(struct usb_gadget *gadget, unsigned mA)
1444 {
1445         struct fsl_udc *udc;
1446         struct fsl_usb2_platform_data *pdata;
1447
1448         udc = container_of(gadget, struct fsl_udc, gadget);
1449         if (udc->transceiver)
1450                 return otg_set_power(udc->transceiver, mA);
1451         pdata = udc->pdata;
1452         if (pdata->xcvr_ops && pdata->xcvr_ops->set_vbus_draw) {
1453                 pdata->xcvr_ops->set_vbus_draw(pdata->xcvr_ops, pdata, mA);
1454                 return 0;
1455         }
1456         return -ENOTSUPP;
1457 }
1458
1459 /* Change Data+ pullup status
1460  * this func is used by usb_gadget_connect/disconnet
1461  */
1462 static int fsl_pullup(struct usb_gadget *gadget, int is_on)
1463 {
1464         struct fsl_udc *udc;
1465
1466         udc = container_of(gadget, struct fsl_udc, gadget);
1467         udc->softconnect = (is_on != 0);
1468         if (can_pullup(udc))
1469                 fsl_writel((fsl_readl(&dr_regs->usbcmd) | USB_CMD_RUN_STOP),
1470                                 &dr_regs->usbcmd);
1471         else
1472                 fsl_writel((fsl_readl(&dr_regs->usbcmd) & ~USB_CMD_RUN_STOP),
1473                                 &dr_regs->usbcmd);
1474
1475         return 0;
1476 }
1477
1478 /*
1479  * The USB PHY/Charger driver can't visit usb_gadget directly, so
1480  * supply a wrapped function for usb charger visiting.
1481  */
1482 static void usb_charger_pullup_dp(bool enable)
1483 {
1484         fsl_pullup(&udc_controller->gadget, (int)enable);
1485 }
1486
1487 /* defined in gadget.h */
1488 static struct usb_gadget_ops fsl_gadget_ops = {
1489         .get_frame = fsl_get_frame,
1490         .wakeup = fsl_wakeup,
1491 /*      .set_selfpowered = fsl_set_selfpowered, */ /* Always selfpowered */
1492         .vbus_session = fsl_vbus_session,
1493         .vbus_draw = fsl_vbus_draw,
1494         .pullup = fsl_pullup,
1495 };
1496
1497 /* Set protocol stall on ep0, protocol stall will automatically be cleared
1498    on new transaction */
1499 static void ep0stall(struct fsl_udc *udc)
1500 {
1501         u32 tmp;
1502
1503         /* must set tx and rx to stall at the same time */
1504         tmp = fsl_readl(&dr_regs->endptctrl[0]);
1505         tmp |= EPCTRL_TX_EP_STALL | EPCTRL_RX_EP_STALL;
1506         fsl_writel(tmp, &dr_regs->endptctrl[0]);
1507         udc->ep0_dir = 0;
1508 }
1509
1510 /* Prime a status phase for ep0 */
1511 static int ep0_prime_status(struct fsl_udc *udc, int direction)
1512 {
1513         struct fsl_req *req = udc->status_req;
1514         struct fsl_ep *ep;
1515         int status = 0;
1516
1517         if (direction == EP_DIR_IN)
1518                 udc->ep0_dir = USB_DIR_IN;
1519         else
1520                 udc->ep0_dir = USB_DIR_OUT;
1521
1522         ep = &udc->eps[0];
1523
1524         req->ep = ep;
1525         req->req.length = 0;
1526         req->req.status = -EINPROGRESS;
1527
1528         status = fsl_ep_queue(&ep->ep, &req->req, GFP_ATOMIC);
1529         return status;
1530 }
1531
1532 static inline int udc_reset_ep_queue(struct fsl_udc *udc, u8 pipe)
1533 {
1534         struct fsl_ep *ep = get_ep_by_pipe(udc, pipe);
1535
1536         if (!ep->name)
1537                 return 0;
1538
1539         nuke(ep, -ESHUTDOWN);
1540
1541         return 0;
1542 }
1543
1544 /*
1545  * ch9 Set address
1546  */
1547 static void ch9setaddress(struct fsl_udc *udc, u16 value, u16 index, u16 length)
1548 {
1549         /* Save the new address to device struct */
1550         udc->device_address = (u8) value;
1551         /* Update usb state */
1552         udc->usb_state = USB_STATE_ADDRESS;
1553         /* Status phase */
1554         if (ep0_prime_status(udc, EP_DIR_IN))
1555                 ep0stall(udc);
1556 }
1557
1558 /*
1559  * ch9 Get status
1560  */
1561 static void ch9getstatus(struct fsl_udc *udc, u8 request_type, u16 value,
1562                 u16 index, u16 length)
1563 {
1564         u16 tmp = 0;            /* Status, cpu endian */
1565
1566         struct fsl_req *req;
1567         struct fsl_ep *ep;
1568         int status = 0;
1569
1570         ep = &udc->eps[0];
1571
1572         if ((request_type & USB_RECIP_MASK) == USB_RECIP_DEVICE) {
1573                 /* Get device status */
1574                 tmp = 1 << USB_DEVICE_SELF_POWERED;
1575                 tmp |= udc->remote_wakeup << USB_DEVICE_REMOTE_WAKEUP;
1576         } else if ((request_type & USB_RECIP_MASK) == USB_RECIP_INTERFACE) {
1577                 /* Get interface status */
1578                 /* We don't have interface information in udc driver */
1579                 tmp = 0;
1580         } else if ((request_type & USB_RECIP_MASK) == USB_RECIP_ENDPOINT) {
1581                 /* Get endpoint status */
1582                 struct fsl_ep *target_ep;
1583
1584                 target_ep = get_ep_by_pipe(udc, get_pipe_by_windex(index));
1585
1586                 /* stall if endpoint doesn't exist */
1587                 if (!target_ep->desc)
1588                         goto stall;
1589                 tmp = dr_ep_get_stall(ep_index(target_ep), ep_is_in(target_ep))
1590                                 << USB_ENDPOINT_HALT;
1591         }
1592
1593         udc->ep0_dir = USB_DIR_IN;
1594         /* Borrow the per device data_req */
1595         /* status_req had been used to prime status */
1596         req = udc->data_req;
1597         /* Fill in the reqest structure */
1598         *((u16 *) req->req.buf) = cpu_to_le16(tmp);
1599         req->ep = ep;
1600         req->req.length = 2;
1601
1602         status = fsl_ep_queue(&ep->ep, &req->req, GFP_ATOMIC);
1603         if (status) {
1604                 udc_reset_ep_queue(udc, 0);
1605                 ERR("Can't respond to getstatus request \n");
1606                 goto stall;
1607         }
1608         /* Status phase */
1609         if (ep0_prime_status(udc, EP_DIR_OUT))
1610                 ep0stall(udc);
1611         return;
1612 stall:
1613         ep0stall(udc);
1614
1615 }
1616
1617 static void setup_received_irq(struct fsl_udc *udc,
1618                 struct usb_ctrlrequest *setup)
1619 {
1620         u16 wValue = le16_to_cpu(setup->wValue);
1621         u16 wIndex = le16_to_cpu(setup->wIndex);
1622         u16 wLength = le16_to_cpu(setup->wLength);
1623         struct usb_gadget *gadget = &(udc->gadget);
1624         unsigned mA = 500;
1625         udc_reset_ep_queue(udc, 0);
1626
1627         /* We process some stardard setup requests here */
1628         switch (setup->bRequest) {
1629         case USB_REQ_GET_STATUS:
1630                 /* Data+Status phase from udc */
1631                 if ((setup->bRequestType & (USB_DIR_IN | USB_TYPE_MASK))
1632                                         != (USB_DIR_IN | USB_TYPE_STANDARD))
1633                         break;
1634                 spin_unlock(&udc->lock);
1635                 ch9getstatus(udc, setup->bRequestType, wValue, wIndex, wLength);
1636                 spin_lock(&udc->lock);
1637                 return;
1638
1639         case USB_REQ_SET_ADDRESS:
1640                 /* Status phase from udc */
1641                 if (setup->bRequestType != (USB_DIR_OUT | USB_TYPE_STANDARD
1642                                                 | USB_RECIP_DEVICE))
1643                         break;
1644                 spin_unlock(&udc->lock);
1645                 ch9setaddress(udc, wValue, wIndex, wLength);
1646                 spin_lock(&udc->lock);
1647                 return;
1648         case USB_REQ_SET_CONFIGURATION:
1649                 spin_unlock(&udc->lock);
1650                 fsl_vbus_draw(gadget, mA);
1651                 spin_lock(&udc->lock);
1652              break;
1653         case USB_REQ_CLEAR_FEATURE:
1654         case USB_REQ_SET_FEATURE:
1655                 /* Status phase from udc */
1656         {
1657                 int rc = -EOPNOTSUPP;
1658                 u16 ptc = 0;
1659
1660                 if ((setup->bRequestType & (USB_RECIP_MASK | USB_TYPE_MASK))
1661                                 == (USB_RECIP_ENDPOINT | USB_TYPE_STANDARD)) {
1662                         int pipe = get_pipe_by_windex(wIndex);
1663                         struct fsl_ep *ep;
1664
1665                         if (wValue != 0 || wLength != 0 || pipe >= (udc->max_ep / 2))
1666                                 break;
1667                         ep = get_ep_by_pipe(udc, pipe);
1668
1669                         spin_unlock(&udc->lock);
1670                         rc = fsl_ep_set_halt(&ep->ep,
1671                                         (setup->bRequest == USB_REQ_SET_FEATURE)
1672                                                 ? 1 : 0);
1673                         spin_lock(&udc->lock);
1674
1675                 } else if ((setup->bRequestType & (USB_RECIP_MASK
1676                                 | USB_TYPE_MASK)) == (USB_RECIP_DEVICE
1677                                 | USB_TYPE_STANDARD)) {
1678                         /* Note: The driver has not include OTG support yet.
1679                          * This will be set when OTG support is added */
1680                         if (setup->wValue == USB_DEVICE_TEST_MODE)
1681                                 ptc = setup->wIndex >> 8;
1682                         else if (setup->wValue == USB_DEVICE_REMOTE_WAKEUP) {
1683                                 if (setup->bRequest == USB_REQ_SET_FEATURE)
1684                                         udc->remote_wakeup = 1;
1685                                 else
1686                                         udc->remote_wakeup = 0;
1687                         }
1688                         else if (gadget_is_otg(&udc->gadget)) {
1689                                 if (setup->bRequest ==
1690                                     USB_DEVICE_B_HNP_ENABLE)
1691                                         udc->gadget.b_hnp_enable = 1;
1692                                 else if (setup->bRequest ==
1693                                          USB_DEVICE_A_HNP_SUPPORT)
1694                                         udc->gadget.a_hnp_support = 1;
1695                                 else if (setup->bRequest ==
1696                                          USB_DEVICE_A_ALT_HNP_SUPPORT)
1697                                         udc->gadget.a_alt_hnp_support = 1;
1698                         }
1699                         rc = 0;
1700                 } else
1701                         break;
1702
1703                 if (rc == 0) {
1704                         spin_unlock(&udc->lock);
1705                         if (ep0_prime_status(udc, EP_DIR_IN))
1706                                 ep0stall(udc);
1707                         spin_lock(&udc->lock);
1708                 }
1709                 if (ptc) {
1710                         u32 tmp;
1711
1712                         mdelay(10);
1713                         fsl_platform_set_test_mode(udc->pdata, ptc);
1714                         tmp = fsl_readl(&dr_regs->portsc1) | (ptc << 16);
1715                         fsl_writel(tmp, &dr_regs->portsc1);
1716                         printk(KERN_INFO "udc: switch to test mode 0x%x.\n", ptc);
1717                 }
1718
1719                 return;
1720         }
1721
1722         default:
1723                 break;
1724         }
1725
1726         /* Requests handled by gadget */
1727         if (wLength) {
1728                 /* Data phase from gadget, status phase from udc */
1729                 udc->ep0_dir = (setup->bRequestType & USB_DIR_IN)
1730                                 ?  USB_DIR_IN : USB_DIR_OUT;
1731                 spin_unlock(&udc->lock);
1732                 if (udc->driver->setup(&udc->gadget,
1733                                 &udc->local_setup_buff) < 0) {
1734                         /* cancel all requests on ep0 */
1735                         udc_reset_ep_queue(udc, 0);
1736                         ep0stall(udc);
1737                 } else {
1738                         /* prime the status phase */
1739                         int dir = EP_DIR_IN;
1740                         if (setup->bRequestType & USB_DIR_IN)
1741                                 dir = EP_DIR_OUT;
1742                         if (ep0_prime_status(udc, dir))
1743                                 ep0stall(udc);
1744                 }
1745         } else {
1746                 /* No data phase, IN status from gadget */
1747                 udc->ep0_dir = USB_DIR_IN;
1748                 spin_unlock(&udc->lock);
1749                 if (udc->driver->setup(&udc->gadget,
1750                                 &udc->local_setup_buff) < 0)
1751                         ep0stall(udc);
1752         }
1753         spin_lock(&udc->lock);
1754 }
1755
1756 /* Process request for Data or Status phase of ep0
1757  * prime status phase if needed */
1758 static void ep0_req_complete(struct fsl_udc *udc, struct fsl_ep *ep0,
1759                 struct fsl_req *req)
1760 {
1761         if (udc->usb_state == USB_STATE_ADDRESS) {
1762                 /* Set the new address */
1763                 u32 new_address = (u32) udc->device_address;
1764                 fsl_writel(new_address << USB_DEVICE_ADDRESS_BIT_POS,
1765                                 &dr_regs->deviceaddr);
1766         }
1767
1768         done(ep0, req, 0);
1769 }
1770
1771 /* Tripwire mechanism to ensure a setup packet payload is extracted without
1772  * being corrupted by another incoming setup packet */
1773 static void tripwire_handler(struct fsl_udc *udc, u8 ep_num, u8 *buffer_ptr)
1774 {
1775         u32 temp;
1776         struct ep_queue_head *qh;
1777         struct fsl_usb2_platform_data *pdata = udc->pdata;
1778
1779         qh = &udc->ep_qh[ep_num * 2 + EP_DIR_OUT];
1780
1781         /* Clear bit in ENDPTSETUPSTAT */
1782         temp = fsl_readl(&dr_regs->endptsetupstat);
1783         fsl_writel(temp | (1 << ep_num), &dr_regs->endptsetupstat);
1784
1785         /* while a hazard exists when setup package arrives */
1786         do {
1787                 /* Set Setup Tripwire */
1788                 temp = fsl_readl(&dr_regs->usbcmd);
1789                 fsl_writel(temp | USB_CMD_SUTW, &dr_regs->usbcmd);
1790
1791                 /* Copy the setup packet to local buffer */
1792                 if (pdata->le_setup_buf) {
1793                         u32 *p = (u32 *)buffer_ptr;
1794                         u32 *s = (u32 *)qh->setup_buffer;
1795
1796                         /* Convert little endian setup buffer to CPU endian */
1797                         *p++ = le32_to_cpu(*s++);
1798                         *p = le32_to_cpu(*s);
1799                 } else {
1800                         memcpy(buffer_ptr, (u8 *) qh->setup_buffer, 8);
1801                 }
1802         } while (!(fsl_readl(&dr_regs->usbcmd) & USB_CMD_SUTW));
1803
1804         /* Clear Setup Tripwire */
1805         temp = fsl_readl(&dr_regs->usbcmd);
1806         fsl_writel(temp & ~USB_CMD_SUTW, &dr_regs->usbcmd);
1807 }
1808
1809 static void iram_process_ep_complete(struct fsl_req *curr_req,
1810                                      int cur_transfer)
1811 {
1812         char *buf;
1813         u32 len;
1814         int in = ep_is_in(curr_req->ep);
1815
1816         if (in)
1817                 buf = (char *)udc_controller->iram_buffer_v[1];
1818         else
1819                 buf = (char *)udc_controller->iram_buffer_v[0];
1820
1821         if (curr_req->cur->next_td_ptr == cpu_to_hc32(DTD_NEXT_TERMINATE)
1822             || (cur_transfer < g_iram_size)
1823             || (curr_req->req.length == curr_req->req.actual))
1824                 curr_req->last_one = 1;
1825
1826         if (curr_req->last_one) {
1827                 /* the last transfer */
1828                 if (!in) {
1829                         memcpy(curr_req->req.buf + curr_req->buffer_offset, buf,
1830                                cur_transfer);
1831                 }
1832                 if (curr_req->tail->next_td_ptr !=
1833                                     cpu_to_hc32(DTD_NEXT_TERMINATE)) {
1834                         /* have next request,queue it */
1835                         struct fsl_req *next_req;
1836                         next_req =
1837                             list_entry(curr_req->queue.next,
1838                                        struct fsl_req, queue);
1839                         if (in)
1840                                 memcpy(buf, next_req->req.buf,
1841                                        min(g_iram_size, next_req->req.length));
1842                         update_qh(next_req);
1843                 }
1844                 curr_req->req.dma = curr_req->oridma;
1845         } else {
1846                 /* queue next dtd */
1847                 /* because had next dtd, so should finish */
1848                 /* tranferring g_iram_size data */
1849                 curr_req->buffer_offset += g_iram_size;
1850                 /* pervious set stop bit,now clear it */
1851                 curr_req->cur->next_td_ptr &= ~cpu_to_hc32(DTD_NEXT_TERMINATE);
1852                 curr_req->cur = curr_req->cur->next_td_virt;
1853                 if (in) {
1854                         len =
1855                             min(curr_req->req.length - curr_req->buffer_offset,
1856                                 g_iram_size);
1857                         memcpy(buf, curr_req->req.buf + curr_req->buffer_offset,
1858                                len);
1859                 } else {
1860                         memcpy(curr_req->req.buf + curr_req->buffer_offset -
1861                                g_iram_size, buf, g_iram_size);
1862                 }
1863                 update_qh(curr_req);
1864         }
1865 }
1866
1867 /* process-ep_req(): free the completed Tds for this req */
1868 static int process_ep_req(struct fsl_udc *udc, int pipe,
1869                 struct fsl_req *curr_req)
1870 {
1871         struct ep_td_struct *curr_td;
1872         int     td_complete, actual, remaining_length, j, tmp;
1873         int     status = 0;
1874         int     errors = 0;
1875         struct  ep_queue_head *curr_qh = &udc->ep_qh[pipe];
1876         int direction = pipe % 2;
1877         int total = 0, real_len;
1878
1879         curr_td = curr_req->head;
1880         td_complete = 0;
1881         actual = curr_req->req.length;
1882         real_len = curr_req->req.length;
1883
1884         for (j = 0; j < curr_req->dtd_count; j++) {
1885                 remaining_length = (hc32_to_cpu(curr_td->size_ioc_sts)
1886                                         & DTD_PACKET_SIZE)
1887                                 >> DTD_LENGTH_BIT_POS;
1888                 if (NEED_IRAM(curr_req->ep)) {
1889                         if (real_len >= g_iram_size) {
1890                                 actual = g_iram_size;
1891                                 real_len -= g_iram_size;
1892                         } else {        /* the last packet */
1893                                 actual = real_len;
1894                                 curr_req->last_one = 1;
1895                         }
1896                 }
1897                 actual -= remaining_length;
1898                 total += actual;
1899
1900                 errors = hc32_to_cpu(curr_td->size_ioc_sts) & DTD_ERROR_MASK;
1901                 if (errors) {
1902                         if (errors & DTD_STATUS_HALTED) {
1903                                 ERR("dTD error %08x QH=%d\n", errors, pipe);
1904                                 /* Clear the errors and Halt condition */
1905                                 tmp = hc32_to_cpu(curr_qh->size_ioc_int_sts);
1906                                 tmp &= ~errors;
1907                                 curr_qh->size_ioc_int_sts = cpu_to_hc32(tmp);
1908                                 status = -EPIPE;
1909                                 /* FIXME: continue with next queued TD? */
1910
1911                                 break;
1912                         }
1913                         if (errors & DTD_STATUS_DATA_BUFF_ERR) {
1914                                 VDBG("Transfer overflow");
1915                                 status = -EPROTO;
1916                                 break;
1917                         } else if (errors & DTD_STATUS_TRANSACTION_ERR) {
1918                                 VDBG("ISO error");
1919                                 status = -EILSEQ;
1920                                 break;
1921                         } else
1922                                 ERR("Unknown error has occured (0x%x)!\r\n",
1923                                         errors);
1924
1925                 } else if (hc32_to_cpu(curr_td->size_ioc_sts)
1926                                 & DTD_STATUS_ACTIVE) {
1927                         VDBG("Request not complete");
1928                         status = REQ_UNCOMPLETE;
1929                         return status;
1930                 } else if (remaining_length) {
1931                         if (direction) {
1932                                 VDBG("Transmit dTD remaining length not zero");
1933                                 status = -EPROTO;
1934                                 break;
1935                         } else {
1936                                 td_complete++;
1937                                 break;
1938                         }
1939                 } else {
1940                         td_complete++;
1941                         VDBG("dTD transmitted successful ");
1942                 }
1943                 if (NEED_IRAM(curr_req->ep))
1944                         if (curr_td->
1945                             next_td_ptr & cpu_to_hc32(DTD_NEXT_TERMINATE))
1946                                 break;
1947                 if (j != curr_req->dtd_count - 1)
1948                         curr_td = (struct ep_td_struct *)curr_td->next_td_virt;
1949         }
1950
1951         if (status)
1952                 return status;
1953         curr_req->req.actual = total;
1954         if (NEED_IRAM(curr_req->ep))
1955                 iram_process_ep_complete(curr_req, actual);
1956         return 0;
1957 }
1958
1959 /* Process a DTD completion interrupt */
1960 static void dtd_complete_irq(struct fsl_udc *udc)
1961 {
1962         u32 bit_pos;
1963         int i, ep_num, direction, bit_mask, status;
1964         struct fsl_ep *curr_ep;
1965         struct fsl_req *curr_req, *temp_req;
1966
1967         /* Clear the bits in the register */
1968         bit_pos = fsl_readl(&dr_regs->endptcomplete);
1969         fsl_writel(bit_pos, &dr_regs->endptcomplete);
1970
1971         if (!bit_pos)
1972                 return;
1973
1974         for (i = 0; i < udc->max_ep; i++) {
1975                 ep_num = i >> 1;
1976                 direction = i % 2;
1977
1978                 bit_mask = 1 << (ep_num + 16 * direction);
1979
1980                 if (!(bit_pos & bit_mask))
1981                         continue;
1982
1983                 curr_ep = get_ep_by_pipe(udc, i);
1984
1985                 /* If the ep is configured */
1986                 if (curr_ep->name == NULL) {
1987                         INFO("Invalid EP?");
1988                         continue;
1989                 }
1990
1991                 /* process the req queue until an uncomplete request */
1992                 list_for_each_entry_safe(curr_req, temp_req, &curr_ep->queue,
1993                                 queue) {
1994                         status = process_ep_req(udc, i, curr_req);
1995
1996                         VDBG("status of process_ep_req= %d, ep = %d",
1997                                         status, ep_num);
1998                         if (status == REQ_UNCOMPLETE)
1999                                 break;
2000                         /* write back status to req */
2001                         curr_req->req.status = status;
2002
2003                         if (ep_num == 0) {
2004                                 ep0_req_complete(udc, curr_ep, curr_req);
2005                                 break;
2006                         } else {
2007                                 if (NEED_IRAM(curr_ep)) {
2008                                         if (curr_req->last_one)
2009                                                 done(curr_ep, curr_req, status);
2010                                         /* only check the 1th req */
2011                                         break;
2012                                 } else
2013                                         done(curr_ep, curr_req, status);
2014                         }
2015                 }
2016                 dump_ep_queue(curr_ep);
2017         }
2018 }
2019
2020 static void fsl_udc_speed_update(struct fsl_udc *udc)
2021 {
2022         u32 speed = 0;
2023         u32 loop = 0;
2024
2025         /* Wait for port reset finished */
2026         while ((fsl_readl(&dr_regs->portsc1) & PORTSCX_PORT_RESET)
2027                 && (loop++ < 1000))
2028                 ;
2029
2030         speed = (fsl_readl(&dr_regs->portsc1) & PORTSCX_PORT_SPEED_MASK);
2031         switch (speed) {
2032         case PORTSCX_PORT_SPEED_HIGH:
2033                 udc->gadget.speed = USB_SPEED_HIGH;
2034                 break;
2035         case PORTSCX_PORT_SPEED_FULL:
2036                 udc->gadget.speed = USB_SPEED_FULL;
2037                 break;
2038         case PORTSCX_PORT_SPEED_LOW:
2039                 udc->gadget.speed = USB_SPEED_LOW;
2040                 break;
2041         default:
2042                 udc->gadget.speed = USB_SPEED_UNKNOWN;
2043                 break;
2044         }
2045 }
2046
2047 /* Process a port change interrupt */
2048 static void port_change_irq(struct fsl_udc *udc)
2049 {
2050         if (udc->bus_reset)
2051                 udc->bus_reset = 0;
2052
2053         /* Update port speed */
2054         fsl_udc_speed_update(udc);
2055
2056         /* Update USB state */
2057         if (!udc->resume_state)
2058                 udc->usb_state = USB_STATE_DEFAULT;
2059 }
2060
2061 /* Process suspend interrupt */
2062 static void suspend_irq(struct fsl_udc *udc)
2063 {
2064         pr_debug("%s begins\n", __func__);
2065
2066         udc->resume_state = udc->usb_state;
2067         udc->usb_state = USB_STATE_SUSPENDED;
2068
2069         /* report suspend to the driver, serial.c does not support this */
2070         if (udc->driver->suspend)
2071                 udc->driver->suspend(&udc->gadget);
2072
2073         pr_debug("%s ends\n", __func__);
2074 }
2075
2076 static void bus_resume(struct fsl_udc *udc)
2077 {
2078         udc->usb_state = udc->resume_state;
2079         udc->resume_state = 0;
2080
2081         /* report resume to the driver, serial.c does not support this */
2082         if (udc->driver->resume)
2083                 udc->driver->resume(&udc->gadget);
2084 }
2085
2086 /* Clear up all ep queues */
2087 static int reset_queues(struct fsl_udc *udc)
2088 {
2089         u8 pipe;
2090
2091         for (pipe = 0; pipe < udc->max_pipes; pipe++)
2092                 udc_reset_ep_queue(udc, pipe);
2093
2094         spin_unlock(&udc->lock);
2095         /* report disconnect; the driver is already quiesced */
2096         udc->driver->disconnect(&udc->gadget);
2097         spin_lock(&udc->lock);
2098
2099         return 0;
2100 }
2101
2102 /* Process reset interrupt */
2103 static void reset_irq(struct fsl_udc *udc)
2104 {
2105         u32 temp;
2106
2107         /* Clear the device address */
2108         temp = fsl_readl(&dr_regs->deviceaddr);
2109         fsl_writel(temp & ~USB_DEVICE_ADDRESS_MASK, &dr_regs->deviceaddr);
2110
2111         udc->device_address = 0;
2112
2113         /* Clear usb state */
2114         udc->resume_state = 0;
2115         udc->ep0_dir = 0;
2116         udc->remote_wakeup = 0; /* default to 0 on reset */
2117         udc->gadget.b_hnp_enable = 0;
2118         udc->gadget.a_hnp_support = 0;
2119         udc->gadget.a_alt_hnp_support = 0;
2120
2121         /* Clear all the setup token semaphores */
2122         temp = fsl_readl(&dr_regs->endptsetupstat);
2123         fsl_writel(temp, &dr_regs->endptsetupstat);
2124
2125         /* Clear all the endpoint complete status bits */
2126         temp = fsl_readl(&dr_regs->endptcomplete);
2127         fsl_writel(temp, &dr_regs->endptcomplete);
2128
2129         /* Write 1s to the flush register */
2130         fsl_writel(0xffffffff, &dr_regs->endptflush);
2131
2132         /* Bus is reseting */
2133         udc->bus_reset = 1;
2134         /* Reset all the queues, include XD, dTD, EP queue
2135          * head and TR Queue */
2136         reset_queues(udc);
2137         udc->usb_state = USB_STATE_DEFAULT;
2138 }
2139
2140 #define FSL_DP_CHANGE_TIMEOUT (msecs_to_jiffies(1000)) /* 1000 ms */
2141 static void gadget_wait_line_to_se0(void)
2142 {
2143         unsigned long timeout;
2144         timeout = jiffies + FSL_DP_CHANGE_TIMEOUT;
2145         /* Wait for DP to SE0 */
2146         while (!((fsl_readl(&dr_regs->portsc1) &
2147                 (u32)((1 << 10) | (1 << 11))) == PORTSCX_LINE_STATUS_SE0)) {
2148                 if (time_after(jiffies, timeout)) {
2149                         pr_warning(KERN_ERR "wait dp to SE0 timeout, please check"
2150                                         " your hardware design!\n");
2151                         break;
2152                 }
2153                 msleep(1);
2154         }
2155 }
2156
2157 #define FSL_WAIT_CLASS_DRIVER_TIMEOUT (msecs_to_jiffies(3000)) /* 3s */
2158 static void gadget_wait_class_driver_finish(void)
2159 {
2160         unsigned long timeout;
2161         struct fsl_udc *udc = udc_controller;
2162         struct fsl_ep *ep;
2163         int i = 2;
2164         timeout = jiffies + FSL_WAIT_CLASS_DRIVER_TIMEOUT;
2165         /* for non-control endpoints */
2166         while (i < (int)(udc_controller->max_ep)) {
2167                 ep = &udc->eps[i++];
2168                 if (ep->stopped == 0) {
2169                         if (time_after(timeout, jiffies)) {
2170                                 i = 2;
2171                                 msleep(10);
2172                                 continue;
2173                         } else {
2174                                 pr_warning(KERN_WARNING "We have waited 3s, but the class driver"
2175                                                 " has still not finishes!\n");
2176                                 break;
2177                         }
2178                 }
2179         }
2180 }
2181
2182 static void fsl_gadget_disconnect_event(struct work_struct *work)
2183 {
2184         struct fsl_udc *udc = udc_controller;
2185         unsigned long flags;
2186         struct fsl_usb2_platform_data *pdata;
2187         u32 tmp;
2188
2189         pdata = udc->pdata;
2190
2191          /* notify vbus is disconnected */
2192         imx_usb_vbus_disconnect(&udc->charger);
2193         /* wait line to se0 */
2194         dr_discharge_line(pdata, true);
2195         /*
2196          * Wait class drivers finish, an well-behaviour class driver should
2197          * call ep_disable when it is notified to be disconnected.
2198          */
2199         gadget_wait_class_driver_finish();
2200
2201         spin_lock_irqsave(&udc->lock, flags);
2202
2203         /* here we need to enable the B_SESSION_IRQ
2204          * to enable the following device attach
2205          */
2206         tmp = fsl_readl(&dr_regs->otgsc);
2207         if (!(tmp & (OTGSC_B_SESSION_VALID_IRQ_EN)))
2208                 fsl_writel(tmp | (OTGSC_B_SESSION_VALID_IRQ_EN),
2209                                 &dr_regs->otgsc);
2210         udc->stopped = 1;
2211         spin_unlock_irqrestore(&udc->lock, flags);
2212         /* enable wake up */
2213         dr_wake_up_enable(udc, true);
2214         /* close USB PHY clock */
2215         dr_phy_low_power_mode(udc, true);
2216         /* close dr controller clock */
2217         dr_clk_gate(false);
2218         printk(KERN_DEBUG "%s: udc enter low power mode\n", __func__);
2219 }
2220
2221 /* if wakup udc, return true; else return false*/
2222 bool try_wake_up_udc(struct fsl_udc *udc)
2223 {
2224         struct fsl_usb2_platform_data *pdata;
2225         u32 irq_src;
2226
2227         pdata = udc->pdata;
2228
2229         /* check if Vbus change irq */
2230         irq_src = fsl_readl(&dr_regs->otgsc) & (~OTGSC_ID_CHANGE_IRQ_STS);
2231         if (irq_src & OTGSC_B_SESSION_VALID_IRQ_STS) {
2232                 u32 tmp;
2233                 /* Only handle device interrupt event
2234                  * For mx53 loco board, the debug ID value is 0 and
2235                  * DO NOT support OTG function
2236                  */
2237                 if (!machine_is_mx53_loco())
2238                         if (!(fsl_readl(&dr_regs->otgsc) & OTGSC_STS_USB_ID))
2239                                 return false;
2240
2241                 fsl_writel(irq_src, &dr_regs->otgsc);
2242
2243                 tmp = fsl_readl(&dr_regs->usbcmd);
2244                 /* check BSV bit to see if fall or rise */
2245                 if (irq_src & OTGSC_B_SESSION_VALID) {
2246                         if (udc->suspended) /*let the system pm resume the udc */
2247                                 return true;
2248                         udc->vbus_active = true;
2249                         udc->stopped = 0;
2250                         /* disable pulldown dp and dm */
2251                         dr_discharge_line(pdata, false);
2252                         /* notify vbus is connected */
2253                         imx_usb_vbus_connect(&udc->charger);
2254                         printk(KERN_DEBUG "%s: udc out low power mode\n", __func__);
2255                 } else {
2256                         udc->vbus_active = false;
2257                         fsl_pullup(&udc_controller->gadget, false); /* usbcmd.rs=0 */
2258                         /* here we need disable B_SESSION_IRQ, after
2259                          * schedule_work finished, it need to be enabled again.
2260                          * Doing like this can avoid conflicting between rapid
2261                          * plug in/out.
2262                          */
2263                         tmp = fsl_readl(&dr_regs->otgsc);
2264                         if (tmp & (OTGSC_B_SESSION_VALID_IRQ_EN))
2265                                 fsl_writel(tmp &
2266                                            (~OTGSC_B_SESSION_VALID_IRQ_EN),
2267                                            &dr_regs->otgsc);
2268                         /* update port status */
2269                         fsl_udc_speed_update(udc);
2270                         spin_unlock(&udc->lock);
2271                         if (udc->driver)
2272                                 udc->driver->disconnect(&udc->gadget);
2273                         spin_lock(&udc->lock);
2274                         schedule_work(&udc->gadget_disconnect_schedule);
2275                         return false;
2276                 }
2277         }
2278
2279         return true;
2280 }
2281 /*
2282  * USB device controller interrupt handler
2283  */
2284 static irqreturn_t fsl_udc_irq(int irq, void *_udc)
2285 {
2286         struct fsl_udc *udc = _udc;
2287         u32 irq_src;
2288         irqreturn_t status = IRQ_NONE;
2289         unsigned long flags;
2290         struct fsl_usb2_platform_data *pdata = udc->pdata;
2291
2292         if (pdata->irq_delay)
2293                 return status;
2294
2295         spin_lock_irqsave(&udc->lock, flags);
2296
2297 #ifdef CONFIG_USB_OTG
2298         /* if no gadget register in this driver, we need do noting */
2299         if (udc->transceiver->gadget == NULL) {
2300                 goto irq_end;
2301         }
2302         /* only handle device interrupt event */
2303         if (!(fsl_readl(&dr_regs->otgsc) & OTGSC_STS_USB_ID)) {
2304                 goto irq_end;
2305         }
2306 #endif
2307         if (try_wake_up_udc(udc) == false) {
2308                 goto irq_end;
2309         }
2310         irq_src = fsl_readl(&dr_regs->usbsts) & fsl_readl(&dr_regs->usbintr);
2311         /* Clear notification bits */
2312         fsl_writel(irq_src, &dr_regs->usbsts);
2313
2314         /* only handle enabled interrupt */
2315         if (irq_src == 0x0)
2316                 goto irq_end;
2317
2318         VDBG("0x%x\n", irq_src);
2319
2320         /* Need to resume? */
2321         if (udc->usb_state == USB_STATE_SUSPENDED)
2322                 if ((fsl_readl(&dr_regs->portsc1) & PORTSCX_PORT_SUSPEND) == 0)
2323                         bus_resume(udc);
2324
2325         /* USB Interrupt */
2326         if (irq_src & USB_STS_INT) {
2327                 VDBG("Packet int");
2328                 /* Setup package, we only support ep0 as control ep */
2329                 if (fsl_readl(&dr_regs->endptsetupstat) & EP_SETUP_STATUS_EP0) {
2330                         tripwire_handler(udc, 0,
2331                                         (u8 *) (&udc->local_setup_buff));
2332                         setup_received_irq(udc, &udc->local_setup_buff);
2333                         status = IRQ_HANDLED;
2334                 }
2335
2336                 /* completion of dtd */
2337                 if (fsl_readl(&dr_regs->endptcomplete)) {
2338                         dtd_complete_irq(udc);
2339                         status = IRQ_HANDLED;
2340                 }
2341         }
2342
2343         /* SOF (for ISO transfer) */
2344         if (irq_src & USB_STS_SOF) {
2345                 status = IRQ_HANDLED;
2346         }
2347
2348         /* Port Change */
2349         if (irq_src & USB_STS_PORT_CHANGE) {
2350                 port_change_irq(udc);
2351                 status = IRQ_HANDLED;
2352         }
2353
2354         /* Reset Received */
2355         if (irq_src & USB_STS_RESET) {
2356                 VDBG("reset int");
2357                 reset_irq(udc);
2358                 status = IRQ_HANDLED;
2359         }
2360
2361         /* Sleep Enable (Suspend) */
2362         if (irq_src & USB_STS_SUSPEND) {
2363                 VDBG("suspend int");
2364                 if (!(udc->usb_state == USB_STATE_SUSPENDED))
2365                         suspend_irq(udc);
2366                 status = IRQ_HANDLED;
2367         }
2368
2369         if (irq_src & (USB_STS_ERR | USB_STS_SYS_ERR)) {
2370                 VDBG("Error IRQ %x ", irq_src);
2371         }
2372
2373 irq_end:
2374         spin_unlock_irqrestore(&udc->lock, flags);
2375         return status;
2376 }
2377
2378 /*----------------------------------------------------------------*
2379  * Hook to gadget drivers
2380  * Called by initialization code of gadget drivers
2381 *----------------------------------------------------------------*/
2382 int usb_gadget_probe_driver(struct usb_gadget_driver *driver,
2383         int (*bind)(struct usb_gadget *))
2384 {
2385         int retval = -ENODEV;
2386         unsigned long flags = 0;
2387
2388         if (!udc_controller)
2389                 return -ENODEV;
2390
2391         if (!bind || !driver || (driver->speed != USB_SPEED_FULL
2392                         && driver->speed != USB_SPEED_HIGH)
2393                         || !driver->disconnect
2394                         || !driver->setup)
2395                 return -EINVAL;
2396
2397         if (udc_controller->driver)
2398                 return -EBUSY;
2399
2400         /* lock is needed but whether should use this lock or another */
2401         spin_lock_irqsave(&udc_controller->lock, flags);
2402
2403         driver->driver.bus = 0;
2404         udc_controller->pdata->port_enables = 1;
2405         /* hook up the driver */
2406         udc_controller->driver = driver;
2407         udc_controller->gadget.dev.driver = &driver->driver;
2408         spin_unlock_irqrestore(&udc_controller->lock, flags);
2409         dr_clk_gate(true);
2410         /* It doesn't need to switch usb from low power mode to normal mode
2411          * at otg mode
2412          */
2413         if (!udc_controller->transceiver)
2414                 dr_phy_low_power_mode(udc_controller, false);
2415
2416         /* bind udc driver to gadget driver */
2417         retval = bind(&udc_controller->gadget);
2418         if (retval) {
2419                 VDBG("bind to %s --> %d", driver->driver.name, retval);
2420                 udc_controller->gadget.dev.driver = 0;
2421                 udc_controller->driver = 0;
2422                 dr_clk_gate(false);
2423                 goto out;
2424         }
2425
2426         if (udc_controller->transceiver) {
2427                 printk(KERN_INFO "Suspend udc for OTG auto detect\n");
2428                 udc_controller->suspended = 1;
2429                 dr_wake_up_enable(udc_controller, true);
2430                 dr_clk_gate(false);
2431                 /* export udc suspend/resume call to OTG */
2432                 udc_controller->gadget.dev.driver->suspend = (dev_sus)fsl_udc_suspend;
2433                 udc_controller->gadget.dev.driver->resume = (dev_res)fsl_udc_resume;
2434
2435                 /* connect to bus through transceiver */
2436                 retval = otg_set_peripheral(udc_controller->transceiver,
2437                                             &udc_controller->gadget);
2438                 if (retval < 0) {
2439                         ERR("can't bind to transceiver\n");
2440                         driver->unbind(&udc_controller->gadget);
2441                         udc_controller->gadget.dev.driver = 0;
2442                         udc_controller->driver = 0;
2443                         return retval;
2444                 }
2445         } else {
2446                 /* Enable DR IRQ reg and Set usbcmd reg  Run bit */
2447                 dr_controller_run(udc_controller);
2448                 if (udc_controller->stopped)
2449                         dr_clk_gate(false);
2450         }
2451         printk(KERN_INFO "%s: bind to driver %s \n",
2452                         udc_controller->gadget.name, driver->driver.name);
2453
2454 out:
2455         if (retval) {
2456                 printk(KERN_DEBUG "retval %d \n", retval);
2457                 udc_controller->pdata->port_enables = 0;
2458         }
2459         return retval;
2460 }
2461 EXPORT_SYMBOL(usb_gadget_probe_driver);
2462
2463 /* Disconnect from gadget driver */
2464 int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
2465 {
2466         struct fsl_ep *loop_ep;
2467         unsigned long flags;
2468
2469         if (!udc_controller)
2470                 return -ENODEV;
2471
2472         if (!driver || driver != udc_controller->driver || !driver->unbind)
2473                 return -EINVAL;
2474
2475         if (udc_controller->stopped)
2476                 dr_clk_gate(true);
2477
2478         if (udc_controller->transceiver)
2479                 (void)otg_set_peripheral(udc_controller->transceiver, 0);
2480
2481         /* stop DR, disable intr */
2482         dr_controller_stop(udc_controller);
2483
2484         udc_controller->pdata->port_enables = 0;
2485         /* in fact, no needed */
2486         udc_controller->usb_state = USB_STATE_ATTACHED;
2487         udc_controller->ep0_dir = 0;
2488
2489         /* stand operation */
2490         spin_lock_irqsave(&udc_controller->lock, flags);
2491         udc_controller->gadget.speed = USB_SPEED_UNKNOWN;
2492         nuke(&udc_controller->eps[0], -ESHUTDOWN);
2493         list_for_each_entry(loop_ep, &udc_controller->gadget.ep_list,
2494                         ep.ep_list)
2495                 nuke(loop_ep, -ESHUTDOWN);
2496         spin_unlock_irqrestore(&udc_controller->lock, flags);
2497
2498         /* disconnect gadget before unbinding */
2499         driver->disconnect(&udc_controller->gadget);
2500
2501         /* unbind gadget and unhook driver. */
2502         driver->unbind(&udc_controller->gadget);
2503         udc_controller->gadget.dev.driver = 0;
2504         udc_controller->driver = 0;
2505
2506         if (udc_controller->gadget.is_otg) {
2507                 dr_wake_up_enable(udc_controller, true);
2508         }
2509
2510         dr_phy_low_power_mode(udc_controller, true);
2511
2512         printk(KERN_INFO "unregistered gadget driver '%s'\r\n",
2513                driver->driver.name);
2514         return 0;
2515 }
2516 EXPORT_SYMBOL(usb_gadget_unregister_driver);
2517
2518 /*-------------------------------------------------------------------------
2519                 PROC File System Support
2520 -------------------------------------------------------------------------*/
2521 #ifdef CONFIG_USB_GADGET_DEBUG_FILES
2522
2523 #include <linux/seq_file.h>
2524
2525 static const char proc_filename[] = "driver/fsl_usb2_udc";
2526
2527 static int fsl_proc_read(char *page, char **start, off_t off, int count,
2528                 int *eof, void *_dev)
2529 {
2530         char *buf = page;
2531         char *next = buf;
2532         unsigned size = count;
2533         unsigned long flags;
2534         int t, i;
2535         u32 tmp_reg;
2536         struct fsl_ep *ep = NULL;
2537         struct fsl_req *req;
2538         struct fsl_usb2_platform_data *pdata;
2539
2540         struct fsl_udc *udc = udc_controller;
2541         pdata = udc->pdata;
2542         if (off != 0)
2543                 return 0;
2544
2545         dr_clk_gate(true);
2546         spin_lock_irqsave(&udc->lock, flags);
2547
2548         /* ------basic driver infomation ---- */
2549         t = scnprintf(next, size,
2550                         DRIVER_DESC "\n"
2551                         "%s version: %s\n"
2552                         "Gadget driver: %s\n\n",
2553                         driver_name, DRIVER_VERSION,
2554                         udc->driver ? udc->driver->driver.name : "(none)");
2555         size -= t;
2556         next += t;
2557
2558         /* ------ DR Registers ----- */
2559         tmp_reg = fsl_readl(&dr_regs->usbcmd);
2560         t = scnprintf(next, size,
2561                         "USBCMD reg:\n"
2562                         "SetupTW: %d\n"
2563                         "Run/Stop: %s\n\n",
2564                         (tmp_reg & USB_CMD_SUTW) ? 1 : 0,
2565                         (tmp_reg & USB_CMD_RUN_STOP) ? "Run" : "Stop");
2566         size -= t;
2567         next += t;
2568
2569         tmp_reg = fsl_readl(&dr_regs->usbsts);
2570         t = scnprintf(next, size,
2571                         "USB Status Reg:\n"
2572                         "Dr Suspend: %d" "Reset Received: %d" "System Error: %s"
2573                         "USB Error Interrupt: %s\n\n",
2574                         (tmp_reg & USB_STS_SUSPEND) ? 1 : 0,
2575                         (tmp_reg & USB_STS_RESET) ? 1 : 0,
2576                         (tmp_reg & USB_STS_SYS_ERR) ? "Err" : "Normal",
2577                         (tmp_reg & USB_STS_ERR) ? "Err detected" : "No err");
2578         size -= t;
2579         next += t;
2580
2581         tmp_reg = fsl_readl(&dr_regs->usbintr);
2582         t = scnprintf(next, size,
2583                         "USB Intrrupt Enable Reg:\n"
2584                         "Sleep Enable: %d" "SOF Received Enable: %d"
2585                         "Reset Enable: %d\n"
2586                         "System Error Enable: %d"
2587                         "Port Change Dectected Enable: %d\n"
2588                         "USB Error Intr Enable: %d" "USB Intr Enable: %d\n\n",
2589                         (tmp_reg & USB_INTR_DEVICE_SUSPEND) ? 1 : 0,
2590                         (tmp_reg & USB_INTR_SOF_EN) ? 1 : 0,
2591                         (tmp_reg & USB_INTR_RESET_EN) ? 1 : 0,
2592                         (tmp_reg & USB_INTR_SYS_ERR_EN) ? 1 : 0,
2593                         (tmp_reg & USB_INTR_PTC_DETECT_EN) ? 1 : 0,
2594                         (tmp_reg & USB_INTR_ERR_INT_EN) ? 1 : 0,
2595                         (tmp_reg & USB_INTR_INT_EN) ? 1 : 0);
2596         size -= t;
2597         next += t;
2598
2599         tmp_reg = fsl_readl(&dr_regs->frindex);
2600         t = scnprintf(next, size,
2601                         "USB Frame Index Reg:" "Frame Number is 0x%x\n\n",
2602                         (tmp_reg & USB_FRINDEX_MASKS));
2603         size -= t;
2604         next += t;
2605
2606         tmp_reg = fsl_readl(&dr_regs->deviceaddr);
2607         t = scnprintf(next, size,
2608                         "USB Device Address Reg:" "Device Addr is 0x%x\n\n",
2609                         (tmp_reg & USB_DEVICE_ADDRESS_MASK));
2610         size -= t;
2611         next += t;
2612
2613         tmp_reg = fsl_readl(&dr_regs->endpointlistaddr);
2614         t = scnprintf(next, size,
2615                         "USB Endpoint List Address Reg:"
2616                         "Device Addr is 0x%x\n\n",
2617                         (tmp_reg & USB_EP_LIST_ADDRESS_MASK));
2618         size -= t;
2619         next += t;
2620
2621         tmp_reg = fsl_readl(&dr_regs->portsc1);
2622         t = scnprintf(next, size,
2623                 "USB Port Status&Control Reg:\n"
2624                 "Port Transceiver Type : %s" "Port Speed: %s \n"
2625                 "PHY Low Power Suspend: %s" "Port Reset: %s"
2626                 "Port Suspend Mode: %s \n" "Over-current Change: %s"
2627                 "Port Enable/Disable Change: %s\n"
2628                 "Port Enabled/Disabled: %s"
2629                 "Current Connect Status: %s\n\n", ({
2630                         char *s;
2631                         switch (tmp_reg & PORTSCX_PTS_FSLS) {
2632                         case PORTSCX_PTS_UTMI:
2633                                 s = "UTMI"; break;
2634                         case PORTSCX_PTS_ULPI:
2635                                 s = "ULPI "; break;
2636                         case PORTSCX_PTS_FSLS:
2637                                 s = "FS/LS Serial"; break;
2638                         default:
2639                                 s = "None"; break;
2640                         }
2641                         s; }), ({
2642                         char *s;
2643                         switch (tmp_reg & PORTSCX_PORT_SPEED_UNDEF) {
2644                         case PORTSCX_PORT_SPEED_FULL:
2645                                 s = "Full Speed"; break;
2646                         case PORTSCX_PORT_SPEED_LOW:
2647                                 s = "Low Speed"; break;
2648                         case PORTSCX_PORT_SPEED_HIGH:
2649                                 s = "High Speed"; break;
2650                         default:
2651                                 s = "Undefined"; break;
2652                         }
2653                         s;
2654                 }),
2655                 (tmp_reg & PORTSCX_PHY_LOW_POWER_SPD) ?
2656                 "Normal PHY mode" : "Low power mode",
2657                 (tmp_reg & PORTSCX_PORT_RESET) ? "In Reset" :
2658                 "Not in Reset",
2659                 (tmp_reg & PORTSCX_PORT_SUSPEND) ? "In " : "Not in",
2660                 (tmp_reg & PORTSCX_OVER_CURRENT_CHG) ? "Dected" :
2661                 "No",
2662                 (tmp_reg & PORTSCX_PORT_EN_DIS_CHANGE) ? "Disable" :
2663                 "Not change",
2664                 (tmp_reg & PORTSCX_PORT_ENABLE) ? "Enable" :
2665                 "Not correct",
2666                 (tmp_reg & PORTSCX_CURRENT_CONNECT_STATUS) ?
2667                 "Attached" : "Not-Att");
2668         size -= t;
2669         next += t;
2670
2671         tmp_reg = fsl_readl(&dr_regs->usbmode);
2672         t = scnprintf(next, size,
2673                         "USB Mode Reg:" "Controller Mode is : %s\n\n", ({
2674                                 char *s;
2675                                 switch (tmp_reg & USB_MODE_CTRL_MODE_HOST) {
2676                                 case USB_MODE_CTRL_MODE_IDLE:
2677                                         s = "Idle"; break;
2678                                 case USB_MODE_CTRL_MODE_DEVICE:
2679                                         s = "Device Controller"; break;
2680                                 case USB_MODE_CTRL_MODE_HOST:
2681                                         s = "Host Controller"; break;
2682                                 default:
2683                                         s = "None"; break;
2684                                 }
2685                                 s;
2686                         }));
2687         size -= t;
2688         next += t;
2689
2690         tmp_reg = fsl_readl(&dr_regs->endptsetupstat);
2691         t = scnprintf(next, size,
2692                         "Endpoint Setup Status Reg:" "SETUP on ep 0x%x\n\n",
2693                         (tmp_reg & EP_SETUP_STATUS_MASK));
2694         size -= t;
2695         next += t;
2696
2697         for (i = 0; i < udc->max_ep / 2; i++) {
2698                 tmp_reg = fsl_readl(&dr_regs->endptctrl[i]);
2699                 t = scnprintf(next, size, "EP Ctrl Reg [0x%x]: = [0x%x]\n",
2700                                 i, tmp_reg);
2701                 size -= t;
2702                 next += t;
2703         }
2704         tmp_reg = fsl_readl(&dr_regs->endpointprime);
2705         t = scnprintf(next, size, "EP Prime Reg = [0x%x]\n", tmp_reg);
2706         size -= t;
2707         next += t;
2708
2709         if (pdata->have_sysif_regs) {
2710                 tmp_reg = usb_sys_regs->snoop1;
2711                 t = scnprintf(next, size, "\nSnoop1 Reg = [0x%x]\n\n", tmp_reg);
2712                 size -= t;
2713                 next += t;
2714
2715                 tmp_reg = usb_sys_regs->control;
2716                 t = scnprintf(next, size, "General Control Reg = [0x%x]\n\n",
2717                                 tmp_reg);
2718                 size -= t;
2719                 next += t;
2720         }
2721
2722         /* ------fsl_udc, fsl_ep, fsl_request structure information ----- */
2723         ep = &udc->eps[0];
2724         t = scnprintf(next, size, "For %s Maxpkt is 0x%x index is 0x%x\n",
2725                         ep->ep.name, ep_maxpacket(ep), ep_index(ep));
2726         size -= t;
2727         next += t;
2728
2729         if (list_empty(&ep->queue)) {
2730                 t = scnprintf(next, size, "its req queue is empty\n\n");
2731                 size -= t;
2732                 next += t;
2733         } else {
2734                 list_for_each_entry(req, &ep->queue, queue) {
2735                         t = scnprintf(next, size,
2736                                 "req %p actual 0x%x length 0x%x  buf %p\n",
2737                                 &req->req, req->req.actual,
2738                                 req->req.length, req->req.buf);
2739                         size -= t;
2740                         next += t;
2741                 }
2742         }
2743         /* other gadget->eplist ep */
2744         list_for_each_entry(ep, &udc->gadget.ep_list, ep.ep_list) {
2745                 if (ep->desc) {
2746                         t = scnprintf(next, size,
2747                                         "\nFor %s Maxpkt is 0x%x "
2748                                         "index is 0x%x\n",
2749                                         ep->ep.name, ep_maxpacket(ep),
2750                                         ep_index(ep));
2751                         size -= t;
2752                         next += t;
2753
2754                         if (list_empty(&ep->queue)) {
2755                                 t = scnprintf(next, size,
2756                                                 "its req queue is empty\n\n");
2757                                 size -= t;
2758                                 next += t;
2759                         } else {
2760                                 list_for_each_entry(req, &ep->queue, queue) {
2761                                         t = scnprintf(next, size,
2762                                                 "req %p actual 0x%x length"
2763                                                 "0x%x  buf %p\n",
2764                                                 &req->req, req->req.actual,
2765                                                 req->req.length, req->req.buf);
2766                                         size -= t;
2767                                         next += t;
2768                                 } /* end for each_entry of ep req */
2769                         }       /* end for else */
2770                 }       /* end for if(ep->queue) */
2771         }               /* end (ep->desc) */
2772
2773         spin_unlock_irqrestore(&udc->lock, flags);
2774         dr_clk_gate(false);
2775
2776         *eof = 1;
2777         return count - size;
2778 }
2779
2780 #define create_proc_file()      create_proc_read_entry(proc_filename, \
2781                                 0, NULL, fsl_proc_read, NULL)
2782
2783 #define remove_proc_file()      remove_proc_entry(proc_filename, NULL)
2784
2785 #else                           /* !CONFIG_USB_GADGET_DEBUG_FILES */
2786
2787 #define create_proc_file()      do {} while (0)
2788 #define remove_proc_file()      do {} while (0)
2789
2790 #endif                          /* CONFIG_USB_GADGET_DEBUG_FILES */
2791
2792 /* sys entries for device control */
2793 static ssize_t fsl_udc_remote_wakeup_show(struct device *dev,
2794                 struct device_attribute *attr, char *buf)
2795 {
2796         return sprintf(buf, "%d\n", udc_controller->remote_wakeup);
2797 }
2798
2799 static ssize_t fsl_udc_remote_wakeup_store(struct device *dev, struct device_attribute *attr,
2800                          const char *buf, size_t count)
2801 {
2802         int value;
2803         unsigned long flags;
2804         struct fsl_udc *udc = udc_controller;
2805
2806         spin_lock_irqsave(&udc->lock, flags);
2807         if (udc_controller->stopped) {
2808                 pr_warning(KERN_ERR "Controller has already stopped, Quit.\n"
2809                                 "Please make sure usb is online, and controller"
2810                                 " is not stopped.\n");
2811                 spin_unlock_irqrestore(&udc->lock, flags);
2812                 return -ESHUTDOWN;
2813         }
2814
2815         if (sscanf(buf, "%d", &value) != 1) {
2816                 printk(KERN_ERR "Only numeric 0/1 is valid\n");
2817                 spin_unlock_irqrestore(&udc->lock, flags);
2818                 return -EINVAL;
2819         }
2820         if (value == 0 || value == 1)
2821                 udc_controller->remote_wakeup = value;
2822         else {
2823                 printk(KERN_ERR "Only numeric 0/1 is valid\n");
2824                 spin_unlock_irqrestore(&udc->lock, flags);
2825                 return -EINVAL;
2826         }
2827
2828         spin_unlock_irqrestore(&udc->lock, flags);
2829
2830         return count;
2831 }
2832
2833 static DEVICE_ATTR(remote_wakeup, S_IRUGO | S_IWUGO, fsl_udc_remote_wakeup_show,
2834                 fsl_udc_remote_wakeup_store);
2835
2836 static ssize_t fsl_udc_start_remote_wakeup_store(struct device *dev, struct device_attribute *attr,
2837                          const char *buf, size_t count)
2838 {
2839         int value;
2840         unsigned long flags;
2841         struct fsl_udc *udc = udc_controller;
2842
2843         spin_lock_irqsave(&udc->lock, flags);
2844         if (udc_controller->stopped) {
2845                 pr_warning(KERN_ERR "Controller has already stopped, Quit.\n"
2846                                 "Please make sure usb is online, and controller"
2847                                 " is not stopped.\n");
2848                 spin_unlock_irqrestore(&udc->lock, flags);
2849                 return -ESHUTDOWN;
2850         }
2851
2852         if (sscanf(buf, "%d", &value) != 1) {
2853                 printk(KERN_ERR "Only numeric 1 is valid\n");
2854                 spin_unlock_irqrestore(&udc->lock, flags);
2855                 return -EINVAL;
2856         }
2857
2858         if (value != 1) {
2859                 printk(KERN_ERR "Only numeric 1 is valid\n");
2860                 spin_unlock_irqrestore(&udc->lock, flags);
2861                 return -EINVAL;
2862         }
2863
2864         if (udc_controller->remote_wakeup == 1) {
2865                 u32 temp;
2866                 printk(KERN_INFO "Send Resume signal\n");
2867                 temp = fsl_readl(&dr_regs->portsc1);
2868                 temp |= PORTSCX_PORT_FORCE_RESUME;
2869                 fsl_writel(temp, &dr_regs->portsc1);
2870         } else
2871                 printk(KERN_WARNING "udc remote wakeup has not enabled\n");
2872
2873         spin_unlock_irqrestore(&udc->lock, flags);
2874
2875         return count;
2876 }
2877
2878 static DEVICE_ATTR(start_remote_wakeup, S_IWUGO, NULL,
2879                 fsl_udc_start_remote_wakeup_store);
2880
2881 static struct attribute *fsl_udc_attrs[] = {
2882         &dev_attr_remote_wakeup.attr,
2883         &dev_attr_start_remote_wakeup.attr,
2884         NULL,
2885 };
2886
2887 static const struct attribute_group fsl_udc_attr_group = {
2888         .attrs = fsl_udc_attrs,
2889 };
2890
2891 static const struct attribute_group *fsl_udc_attr_groups[] = {
2892         &fsl_udc_attr_group,
2893         NULL,
2894 };
2895 /*-------------------------------------------------------------------------*/
2896
2897 /* Release udc structures */
2898 static void fsl_udc_release(struct device *dev)
2899 {
2900         complete(udc_controller->done);
2901         dma_free_coherent(dev, udc_controller->ep_qh_size,
2902                         udc_controller->ep_qh, udc_controller->ep_qh_dma);
2903         kfree(udc_controller);
2904 }
2905
2906 /******************************************************************
2907         Internal structure setup functions
2908 *******************************************************************/
2909 /*------------------------------------------------------------------
2910  * init resource for globle controller
2911  * Return the udc handle on success or NULL on failure
2912  ------------------------------------------------------------------*/
2913 static int __init struct_udc_setup(struct fsl_udc *udc,
2914                 struct platform_device *pdev)
2915 {
2916         struct fsl_usb2_platform_data *pdata;
2917         size_t size;
2918
2919         pdata = pdev->dev.platform_data;
2920         udc->phy_mode = pdata->phy_mode;
2921
2922         udc->eps = kzalloc(sizeof(struct fsl_ep) * udc->max_ep, GFP_KERNEL);
2923         if (!udc->eps) {
2924                 ERR("malloc fsl_ep failed\n");
2925                 return -1;
2926         }
2927
2928         /* initialized QHs, take care of alignment */
2929         size = udc->max_ep * sizeof(struct ep_queue_head);
2930         if (size < QH_ALIGNMENT)
2931                 size = QH_ALIGNMENT;
2932         else if ((size % QH_ALIGNMENT) != 0) {
2933                 size += QH_ALIGNMENT + 1;
2934                 size &= ~(QH_ALIGNMENT - 1);
2935         }
2936         udc->ep_qh = dma_alloc_coherent(&pdev->dev, size,
2937                                         &udc->ep_qh_dma, GFP_KERNEL);
2938         if (!udc->ep_qh) {
2939                 ERR("malloc QHs for udc failed\n");
2940                 kfree(udc->eps);
2941                 return -1;
2942         }
2943
2944         udc->ep_qh_size = size;
2945
2946         /* Initialize ep0 status request structure */
2947         /* FIXME: fsl_alloc_request() ignores ep argument */
2948         udc->status_req = container_of(fsl_alloc_request(NULL, GFP_KERNEL),
2949                         struct fsl_req, req);
2950         /* allocate a small amount of memory to get valid address */
2951         udc->status_req->req.buf = kmalloc(8, GFP_KERNEL);
2952         udc->status_req->req.dma = virt_to_phys(udc->status_req->req.buf);
2953         /* Initialize ep0 data request structure */
2954         udc->data_req = container_of(fsl_alloc_request(NULL, GFP_KERNEL),
2955                         struct fsl_req, req);
2956         udc->data_req->req.buf = kmalloc(8, GFP_KERNEL);
2957         udc->data_req->req.dma = virt_to_phys(udc->data_req->req.buf);
2958
2959         udc->resume_state = USB_STATE_NOTATTACHED;
2960         udc->usb_state = USB_STATE_POWERED;
2961         udc->ep0_dir = 0;
2962         udc->remote_wakeup = 0; /* default to 0 on reset */
2963         spin_lock_init(&udc->lock);
2964
2965         return 0;
2966 }
2967
2968 /*----------------------------------------------------------------
2969  * Setup the fsl_ep struct for eps
2970  * Link fsl_ep->ep to gadget->ep_list
2971  * ep0out is not used so do nothing here
2972  * ep0in should be taken care
2973  *--------------------------------------------------------------*/
2974 static int __init struct_ep_setup(struct fsl_udc *udc, unsigned char index,
2975                 char *name, int link)
2976 {
2977         struct fsl_ep *ep = &udc->eps[index];
2978
2979         ep->udc = udc;
2980         strcpy(ep->name, name);
2981         ep->ep.name = ep->name;
2982
2983         ep->ep.ops = &fsl_ep_ops;
2984         /*
2985          * For ep0, the endpoint is enabled after controller initialization
2986          * For non-ep0, the endpoint is stopped default, and will be enabled
2987          * by class driver when needed.
2988          */
2989         if (index)
2990                 ep->stopped = 1;
2991         else
2992                 ep->stopped = 0;
2993
2994         /* for ep0: maxP defined in desc
2995          * for other eps, maxP is set by epautoconfig() called by gadget layer
2996          */
2997         ep->ep.maxpacket = (unsigned short) ~0;
2998
2999         /* the queue lists any req for this ep */
3000         INIT_LIST_HEAD(&ep->queue);
3001
3002         /* gagdet.ep_list used for ep_autoconfig so no ep0 */
3003         if (link)
3004                 list_add_tail(&ep->ep.ep_list, &udc->gadget.ep_list);
3005         ep->gadget = &udc->gadget;
3006         ep->qh = &udc->ep_qh[index];
3007
3008         return 0;
3009 }
3010
3011 /* Driver probe function
3012  * all intialization operations implemented here except enabling usb_intr reg
3013  * board setup should have been done in the platform code
3014  */
3015 static int __devinit fsl_udc_probe(struct platform_device *pdev)
3016 {
3017         struct resource *res;
3018         struct fsl_usb2_platform_data *pdata = pdev->dev.platform_data;
3019         int ret = -ENODEV;
3020         unsigned int i;
3021         u32 dccparams;
3022
3023         udc_controller = kzalloc(sizeof(struct fsl_udc), GFP_KERNEL);
3024         if (udc_controller == NULL) {
3025                 ERR("malloc udc failed\n");
3026                 return -ENOMEM;
3027         }
3028         udc_controller->pdata = pdata;
3029
3030 #ifdef CONFIG_USB_OTG
3031         /* Memory and interrupt resources will be passed from OTG */
3032         udc_controller->transceiver = otg_get_transceiver();
3033         if (!udc_controller->transceiver) {
3034                 printk(KERN_ERR "Can't find OTG driver!\n");
3035                 ret = -ENODEV;
3036                 goto err1a;
3037         }
3038         udc_controller->gadget.is_otg = 1;
3039 #endif
3040         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
3041         if (!res) {
3042                 ret = -ENXIO;
3043                 goto err1a;
3044         }
3045
3046 #ifndef CONFIG_USB_OTG
3047         if (!request_mem_region(res->start, resource_size(res),
3048                                 driver_name)) {
3049                 ERR("request mem region for %s failed \n", pdev->name);
3050                 ret = -EBUSY;
3051                 goto err1a;
3052         }
3053 #endif
3054         dr_regs = ioremap(res->start, resource_size(res));
3055         if (!dr_regs) {
3056                 ret = -ENOMEM;
3057                 goto err1;
3058         }
3059         pdata->regs = (void *)dr_regs;
3060         /*
3061          * do platform specific init: check the clock, grab/config pins, etc.
3062          */
3063         if (pdata->init && pdata->init(pdev)) {
3064                 ret = -ENODEV;
3065                 goto err2a;
3066         }
3067
3068         spin_lock_init(&pdata->lock);
3069
3070         /* Due to mx35/mx25's phy's bug */
3071         reset_phy();
3072
3073         if (pdata->have_sysif_regs)
3074                 usb_sys_regs = (struct usb_sys_interface *)
3075                                 ((u32)dr_regs + USB_DR_SYS_OFFSET);
3076
3077         /* Read Device Controller Capability Parameters register */
3078         dccparams = fsl_readl(&dr_regs->dccparams);
3079         if (!(dccparams & DCCPARAMS_DC)) {
3080                 ERR("This SOC doesn't support device role\n");
3081                 ret = -ENODEV;
3082                 goto err2;
3083         }
3084         /* Get max device endpoints */
3085         /* DEN is bidirectional ep number, max_ep doubles the number */
3086         udc_controller->max_ep = (dccparams & DCCPARAMS_DEN_MASK) * 2;
3087
3088         udc_controller->irq = platform_get_irq(pdev, 0);
3089         if (!udc_controller->irq) {
3090                 ret = -ENODEV;
3091                 goto err2;
3092         }
3093
3094         ret = request_irq(udc_controller->irq, fsl_udc_irq, IRQF_SHARED,
3095                         driver_name, udc_controller);
3096         if (ret != 0) {
3097                 ERR("cannot request irq %d err %d \n",
3098                                 udc_controller->irq, ret);
3099                 goto err2;
3100         }
3101
3102         /* Initialize the udc structure including QH member and other member */
3103         if (struct_udc_setup(udc_controller, pdev)) {
3104                 ERR("Can't initialize udc data structure\n");
3105                 ret = -ENOMEM;
3106                 goto err3;
3107         }
3108
3109         if (!udc_controller->transceiver) {
3110                 /* initialize usb hw reg except for regs for EP,
3111                  * leave usbintr reg untouched */
3112                 dr_controller_setup(udc_controller);
3113         }
3114
3115         /* Setup gadget structure */
3116         udc_controller->gadget.ops = &fsl_gadget_ops;
3117         udc_controller->gadget.is_dualspeed = 1;
3118         udc_controller->gadget.ep0 = &udc_controller->eps[0].ep;
3119         INIT_LIST_HEAD(&udc_controller->gadget.ep_list);
3120         udc_controller->gadget.speed = USB_SPEED_UNKNOWN;
3121         udc_controller->gadget.name = driver_name;
3122
3123         /* Setup gadget.dev and register with kernel */
3124         dev_set_name(&udc_controller->gadget.dev, "gadget");
3125         udc_controller->gadget.dev.release = fsl_udc_release;
3126         udc_controller->gadget.dev.parent = &pdev->dev;
3127         udc_controller->gadget.dev.groups = fsl_udc_attr_groups;
3128         ret = device_register(&udc_controller->gadget.dev);
3129         if (ret < 0)
3130                 goto err3;
3131
3132         /* setup QH and epctrl for ep0 */
3133         ep0_setup(udc_controller);
3134
3135         /* setup udc->eps[] for ep0 */
3136         struct_ep_setup(udc_controller, 0, "ep0", 0);
3137         /* for ep0: the desc defined here;
3138          * for other eps, gadget layer called ep_enable with defined desc
3139          */
3140         udc_controller->eps[0].desc = &fsl_ep0_desc;
3141         udc_controller->eps[0].ep.maxpacket = USB_MAX_CTRL_PAYLOAD;
3142
3143         /* setup the udc->eps[] for non-control endpoints and link
3144          * to gadget.ep_list */
3145         for (i = 1; i < (int)(udc_controller->max_ep / 2); i++) {
3146                 char name[14];
3147
3148                 sprintf(name, "ep%dout", i);
3149                 struct_ep_setup(udc_controller, i * 2, name, 1);
3150                 sprintf(name, "ep%din", i);
3151                 struct_ep_setup(udc_controller, i * 2 + 1, name, 1);
3152         }
3153
3154         /* use dma_pool for TD management */
3155         udc_controller->td_pool = dma_pool_create("udc_td", &pdev->dev,
3156                         sizeof(struct ep_td_struct),
3157                         DTD_ALIGNMENT, UDC_DMA_BOUNDARY);
3158         if (udc_controller->td_pool == NULL) {
3159                 ret = -ENOMEM;
3160                 goto err4;
3161         }
3162         if (g_iram_size) {
3163                 g_iram_addr = iram_alloc(USB_IRAM_SIZE, &g_iram_base);
3164                 for (i = 0; i < IRAM_PPH_NTD; i++) {
3165                         udc_controller->iram_buffer[i] =
3166                                 g_iram_base + i * g_iram_size;
3167                         udc_controller->iram_buffer_v[i] =
3168                                 g_iram_addr + i * g_iram_size;
3169                 }
3170         }
3171
3172         INIT_WORK(&udc_controller->gadget_disconnect_schedule, fsl_gadget_disconnect_event);
3173 #ifdef POSTPONE_FREE_LAST_DTD
3174         last_free_td = NULL;
3175 #endif
3176
3177         /* disable all INTR */
3178 #ifndef CONFIG_USB_OTG
3179         fsl_writel(0, &dr_regs->usbintr);
3180         dr_wake_up_enable(udc_controller, false);
3181 #else
3182         dr_wake_up_enable(udc_controller, true);
3183 #endif
3184
3185 /*
3186  * As mx25/mx35 does not implement clk_gate, should not let phy to low
3187  * power mode due to IC bug
3188  */
3189 #if !(defined CONFIG_ARCH_MX35 || defined CONFIG_ARCH_MX25)
3190 {
3191         dr_phy_low_power_mode(udc_controller, true);
3192 }
3193 #endif
3194         udc_controller->stopped = 1;
3195
3196         /* let the gadget register function open the clk */
3197         dr_clk_gate(false);
3198
3199         create_proc_file();
3200
3201         /* create usb charger */
3202 #ifdef CONFIG_IMX_USB_CHARGER
3203         udc_controller->charger.dev = &pdev->dev;
3204         udc_controller->charger.dp_pullup = usb_charger_pullup_dp;
3205         udc_controller->charger.enable = true;
3206         if (pdata->charger_base_addr)
3207                 udc_controller->charger.charger_base_addr = pdata->charger_base_addr;
3208         if (imx_usb_create_charger(&udc_controller->charger, "imx_usb_charger"))
3209                 dev_err(&pdev->dev, "Can't create usb charger\n");
3210 #else
3211         udc_controller->charger.dp_pullup = usb_charger_pullup_dp;
3212         udc_controller->charger.enable = false;
3213 #endif
3214
3215         return 0;
3216
3217 err4:
3218         device_unregister(&udc_controller->gadget.dev);
3219 err3:
3220         free_irq(udc_controller->irq, udc_controller);
3221 err2:
3222         if (pdata->exit)
3223                 pdata->exit(pdata->pdev);
3224 err2a:
3225         iounmap((u8 __iomem *)dr_regs);
3226 err1:
3227         if (!udc_controller->transceiver)
3228                 release_mem_region(res->start, resource_size(res));
3229 err1a:
3230         kfree(udc_controller);
3231         udc_controller = NULL;
3232         return ret;
3233 }
3234
3235 /* Driver removal function
3236  * Free resources and finish pending transactions
3237  */
3238 static int __exit fsl_udc_remove(struct platform_device *pdev)
3239 {
3240         struct fsl_usb2_platform_data *pdata = pdev->dev.platform_data;
3241
3242         DECLARE_COMPLETION(done);
3243
3244         if (!udc_controller)
3245                 return -ENODEV;
3246         udc_controller->done = &done;
3247         /* open USB PHY clock */
3248         if (udc_controller->stopped)
3249                 dr_clk_gate(true);
3250
3251         /* DR has been stopped in usb_gadget_unregister_driver() */
3252         remove_proc_file();
3253
3254         /* Free allocated memory */
3255         if (g_iram_size)
3256                 iram_free(g_iram_base, IRAM_PPH_NTD * g_iram_size);
3257         kfree(udc_controller->status_req->req.buf);
3258         kfree(udc_controller->status_req);
3259         kfree(udc_controller->data_req->req.buf);
3260         kfree(udc_controller->data_req);
3261         kfree(udc_controller->eps);
3262 #ifdef POSTPONE_FREE_LAST_DTD
3263         if (last_free_td != NULL)
3264                 dma_pool_free(udc_controller->td_pool, last_free_td,
3265                                 last_free_td->td_dma);
3266 #endif
3267         dma_pool_destroy(udc_controller->td_pool);
3268         free_irq(udc_controller->irq, udc_controller);
3269         iounmap((u8 __iomem *)dr_regs);
3270
3271 #ifdef CONFIG_IMX_USB_CHARGER
3272         imx_usb_remove_charger(&udc_controller->charger);
3273 #endif
3274
3275 #ifndef CONFIG_USB_OTG
3276 {
3277         struct resource *res;
3278         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
3279         release_mem_region(res->start, resource_size(res));
3280 }
3281 #endif
3282
3283         device_unregister(&udc_controller->gadget.dev);
3284         /* free udc --wait for the release() finished */
3285         wait_for_completion(&done);
3286         /*
3287          * do platform specific un-initialization:
3288          * release iomux pins, etc.
3289          */
3290         if (pdata->exit)
3291                 pdata->exit(pdata->pdev);
3292
3293         if (udc_controller->stopped)
3294                 dr_clk_gate(false);
3295
3296         return 0;
3297 }
3298
3299 static bool udc_can_wakeup_system(void)
3300 {
3301         struct fsl_usb2_platform_data *pdata = udc_controller->pdata;
3302
3303         if (pdata->operating_mode == FSL_USB2_DR_OTG)
3304                 if (device_may_wakeup(udc_controller->transceiver->dev))
3305                         return true;
3306                 else
3307                         return false;
3308         else
3309                 if (device_may_wakeup(udc_controller->gadget.dev.parent))
3310                         return true;
3311                 else
3312                         return false;
3313 }
3314
3315 static int udc_suspend(struct fsl_udc *udc)
3316 {
3317         struct fsl_usb2_platform_data *pdata = udc_controller->pdata;
3318         u32 mode, usbcmd;
3319
3320         /*
3321          * When it is the PM suspend routine and the device has no
3322          * abilities to wakeup system, it should not set wakeup enable.
3323          * Otherwise, the system will wakeup even the user only wants to
3324          * charge using usb
3325          */
3326         if (pdata->pmflags == 0) {
3327                 if (!udc_can_wakeup_system()) {
3328                         dr_wake_up_enable(udc, false);
3329                 } else {
3330                         if (pdata->platform_phy_power_on)
3331                                 pdata->platform_phy_power_on();
3332                         dr_wake_up_enable(udc, true);
3333                 }
3334         }
3335
3336         /*
3337          * If the controller is already stopped, then this must be a
3338          * PM suspend.  Remember this fact, so that we will leave the
3339          * controller stopped at PM resume time.
3340          */
3341         if (udc->suspended) {
3342                 printk(KERN_DEBUG "gadget already suspended, leaving early\n");
3343                 goto out;
3344         }
3345
3346         mode = fsl_readl(&dr_regs->usbmode) & USB_MODE_CTRL_MODE_MASK;
3347         usbcmd = fsl_readl(&dr_regs->usbcmd);
3348         if (mode != USB_MODE_CTRL_MODE_DEVICE) {
3349                 printk(KERN_DEBUG "gadget not in device mode, leaving early\n");
3350                 goto out;
3351         }
3352
3353
3354         if (!(fsl_readl(&dr_regs->otgsc) & OTGSC_A_BUS_VALID)) {
3355                 /* stop the controller */
3356                 usbcmd = fsl_readl(&dr_regs->usbcmd) & ~USB_CMD_RUN_STOP;
3357                 fsl_writel(usbcmd, &dr_regs->usbcmd);
3358                 udc->stopped = 1;
3359         }
3360
3361         dr_phy_low_power_mode(udc, true);
3362 out:
3363         if (udc->suspended > 1) {
3364                 pr_warning(
3365                         "It's the case usb device is on otg port\
3366                                 and the gadget driver"
3367                         "is loaded during boots up\n"
3368                         "So, do not increase suspended counter Or\
3369                                 there is a error, "
3370                         "please debug it !!!\n"
3371                          );
3372                 return 0;
3373         }
3374
3375         udc->suspended++;
3376
3377         return 0;
3378 }
3379
3380 /*-----------------------------------------------------------------
3381  * Modify Power management attributes
3382  * Used by OTG statemachine to disable gadget temporarily
3383  -----------------------------------------------------------------*/
3384 static int fsl_udc_suspend(struct platform_device *pdev, pm_message_t state)
3385 {
3386         int ret;
3387         printk(KERN_DEBUG "udc suspend begins\n");
3388         if (get_gadget_data(&udc_controller->gadget) == NULL) {
3389                 /* if no gadget is binded, quit */
3390                 return 0;
3391         }
3392
3393         if (udc_controller->stopped)
3394                 dr_clk_gate(true);
3395         if (((!(udc_controller->gadget.is_otg)) ||
3396                 (fsl_readl(&dr_regs->otgsc) & OTGSC_STS_USB_ID)) &&
3397                         (udc_controller->usb_state > USB_STATE_POWERED) &&
3398                         (udc_controller->usb_state < USB_STATE_SUSPENDED)) {
3399                 return -EBUSY;/* keep the clk on */
3400         } else
3401                 ret = udc_suspend(udc_controller);
3402         dr_clk_gate(false);
3403
3404         printk(KERN_DEBUG "USB Gadget suspend ends\n");
3405         return ret;
3406 }
3407
3408 /*-----------------------------------------------------------------
3409  * Invoked on USB resume. May be called in_interrupt.
3410  * Here we start the DR controller and enable the irq
3411  *-----------------------------------------------------------------*/
3412 static int fsl_udc_resume(struct platform_device *pdev)
3413 {
3414         struct fsl_usb2_platform_data *pdata = udc_controller->pdata;
3415         struct fsl_usb2_wakeup_platform_data *wake_up_pdata = pdata->wakeup_pdata;
3416         printk(KERN_DEBUG "USB Gadget resume begins\n");
3417
3418         printk(KERN_DEBUG "%s, Wait for wakeup thread finishes\n", __func__);
3419         wait_event_interruptible(wake_up_pdata->wq, !wake_up_pdata->usb_wakeup_is_pending);
3420
3421
3422         if (get_gadget_data(&udc_controller->gadget) == NULL) {
3423                 /* if no gadget is binded, quit */
3424                 return 0;
3425         }
3426         mutex_lock(&udc_resume_mutex);
3427
3428         pr_debug("%s(): stopped %d  suspended %d\n", __func__,
3429                  udc_controller->stopped, udc_controller->suspended);
3430         /* Do noop if the udc is already at resume state */
3431         if (udc_controller->suspended == 0) {
3432                 u32 temp;
3433                 if (udc_controller->stopped)
3434                         dr_clk_gate(true);
3435                 usb_debounce_id_vbus();
3436                 if (fsl_readl(&dr_regs->otgsc) & OTGSC_STS_USB_ID) {
3437                         temp = fsl_readl(&dr_regs->otgsc);
3438                         /* if b_session_irq_en is cleared by otg */
3439                         if (!(temp & OTGSC_B_SESSION_VALID_IRQ_EN)) {
3440                                 temp |= OTGSC_B_SESSION_VALID_IRQ_EN;
3441                                 fsl_writel(temp, &dr_regs->otgsc);
3442                         }
3443                 }
3444                 if (udc_controller->stopped)
3445                         dr_clk_gate(false);
3446                 mutex_unlock(&udc_resume_mutex);
3447                 return 0;
3448         }
3449         /* prevent the quirk interrupts from resuming */
3450         disable_irq_nosync(udc_controller->irq);
3451
3452         /*
3453          * If the controller was stopped at suspend time, then
3454          * don't resume it now.
3455          */
3456
3457         if (udc_controller->suspended > 1) {
3458                 printk(KERN_DEBUG "gadget was already stopped, leaving early\n");
3459                 if (udc_controller->stopped) {
3460                         dr_clk_gate(true);
3461                 }
3462                 goto end;
3463         }
3464
3465         /*
3466          * To fix suspend issue connected to usb charger,if stopped is 0
3467          * suspended is 1,clock on and out of low power mode to avoid
3468          * next system suspend no clock to cause system hang.
3469          */
3470         if (udc_controller->suspended && !udc_controller->stopped) {
3471                 dr_clk_gate(true);
3472                 dr_wake_up_enable(udc_controller, false);
3473                 dr_phy_low_power_mode(udc_controller, false);
3474         }
3475         /* Enable DR irq reg and set controller Run */
3476         if (udc_controller->stopped) {
3477                 /* the clock is already on at usb wakeup routine */
3478                 if (pdata->lowpower)
3479                         dr_clk_gate(true);
3480                 dr_wake_up_enable(udc_controller, false);
3481                 dr_phy_low_power_mode(udc_controller, false);
3482                 usb_debounce_id_vbus();
3483                 /* if in host mode, we need to do nothing */
3484                 if ((fsl_readl(&dr_regs->otgsc) & OTGSC_STS_USB_ID) == 0) {
3485                         dr_phy_low_power_mode(udc_controller, true);
3486                         dr_wake_up_enable(udc_controller, true);
3487                         goto end;
3488                 }
3489                 dr_controller_setup(udc_controller);
3490                 dr_controller_run(udc_controller);
3491         }
3492 end:
3493         /* if udc is resume by otg id change and no device
3494          * connecting to the otg, otg will enter low power mode*/
3495         if (udc_controller->stopped) {
3496                 /*
3497                  * If it is PM resume routine, the udc is at low power mode,
3498                  * and the udc has no abilities to wakeup system, it should
3499                  * set the abilities to wakeup itself. Otherwise, the usb
3500                  * subsystem will not leave from low power mode.
3501                  */
3502                 if (!udc_can_wakeup_system() &&
3503                         (pdata->pmflags == 0)) {
3504                         dr_wake_up_enable(udc_controller, true);
3505                 }
3506
3507                 dr_clk_gate(false);
3508         }
3509
3510         --udc_controller->suspended;
3511         enable_irq(udc_controller->irq);
3512         mutex_unlock(&udc_resume_mutex);
3513         printk(KERN_DEBUG "USB Gadget resume ends\n");
3514         return 0;
3515 }
3516
3517 /*-------------------------------------------------------------------------
3518         Register entry point for the peripheral controller driver
3519 --------------------------------------------------------------------------*/
3520
3521 static struct platform_driver udc_driver = {
3522         .remove  = __exit_p(fsl_udc_remove),
3523         /* these suspend and resume are not usb suspend and resume */
3524         .suspend = fsl_udc_suspend,
3525         .resume  = fsl_udc_resume,
3526         .probe = fsl_udc_probe,
3527         .driver  = {
3528                 .name = driver_name,
3529                 .owner = THIS_MODULE,
3530         },
3531 };
3532
3533 static int __init udc_init(void)
3534 {
3535         printk(KERN_INFO "%s (%s)\n", driver_desc, DRIVER_VERSION);
3536         return platform_driver_register(&udc_driver);
3537 }
3538 #ifdef CONFIG_MXS_VBUS_CURRENT_DRAW
3539         fs_initcall(udc_init);
3540 #else
3541         module_init(udc_init);
3542 #endif
3543 static void __exit udc_exit(void)
3544 {
3545         platform_driver_unregister(&udc_driver);
3546         printk(KERN_INFO "%s unregistered \n", driver_desc);
3547 }
3548
3549 module_exit(udc_exit);
3550
3551 MODULE_DESCRIPTION(DRIVER_DESC);
3552 MODULE_AUTHOR(DRIVER_AUTHOR);
3553 MODULE_LICENSE("GPL");