2 * ci13xxx_udc.c - MIPS USB IP core family device controller
4 * Copyright (C) 2008 Chipidea - MIPS Technologies, Inc. All rights reserved.
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
14 * Description: MIPS USB IP core family device controller
15 * Currently it only supports IP part number CI13412
17 * This driver is composed of several blocks:
18 * - HW: hardware interface
19 * - DBG: debug facilities (optional)
21 * - ISR: interrupts handling
22 * - ENDPT: endpoint operations (Gadget API)
23 * - GADGET: gadget operations (Gadget API)
24 * - BUS: bus glue code, bus abstraction layer
27 * - CONFIG_USB_GADGET_DEBUG_FILES: enable debug facilities
28 * - STALL_IN: non-empty bulk-in pipes cannot be halted
29 * if defined mass storage compliance succeeds but with warnings
33 * if undefined usbtest 13 fails
34 * - TRACE: enable function tracing (depends on DEBUG)
37 * - Chapter 9 & Mass Storage Compliance with Gadget File Storage
38 * - Chapter 9 Compliance with Gadget Zero (STALL_IN undefined)
39 * - Normal & LPM support
42 * - OK: 0-12, 13 (STALL_IN defined) & 14
43 * - Not Supported: 15 & 16 (ISO)
47 * - Isochronous & Interrupt Traffic
48 * - Handle requests which spawns into several TDs
49 * - GET_STATUS(device) - always reports 0
50 * - Gadget API (majority of optional features)
51 * - Suspend & Remote Wakeup
53 #include <linux/delay.h>
54 #include <linux/device.h>
55 #include <linux/dmapool.h>
56 #include <linux/dma-mapping.h>
57 #include <linux/init.h>
58 #include <linux/interrupt.h>
60 #include <linux/irq.h>
61 #include <linux/kernel.h>
62 #include <linux/slab.h>
63 #include <linux/pm_runtime.h>
64 #include <linux/usb/ch9.h>
65 #include <linux/usb/gadget.h>
66 #include <linux/usb/otg.h>
68 #include "ci13xxx_udc.h"
71 /******************************************************************************
73 *****************************************************************************/
74 /* ctrl register bank access */
75 static DEFINE_SPINLOCK(udc_lock);
77 /* control endpoint description */
78 static const struct usb_endpoint_descriptor
79 ctrl_endpt_out_desc = {
80 .bLength = USB_DT_ENDPOINT_SIZE,
81 .bDescriptorType = USB_DT_ENDPOINT,
83 .bEndpointAddress = USB_DIR_OUT,
84 .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
85 .wMaxPacketSize = cpu_to_le16(CTRL_PAYLOAD_MAX),
88 static const struct usb_endpoint_descriptor
89 ctrl_endpt_in_desc = {
90 .bLength = USB_DT_ENDPOINT_SIZE,
91 .bDescriptorType = USB_DT_ENDPOINT,
93 .bEndpointAddress = USB_DIR_IN,
94 .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
95 .wMaxPacketSize = cpu_to_le16(CTRL_PAYLOAD_MAX),
99 static struct ci13xxx *_udc;
101 /* Interrupt statistics */
102 #define ISR_MASK 0x1F
119 * ffs_nr: find first (least significant) bit set
120 * @x: the word to search
122 * This function returns bit number (instead of position)
124 static int ffs_nr(u32 x)
131 /******************************************************************************
133 *****************************************************************************/
134 /* register bank descriptor */
136 unsigned lpm; /* is LPM? */
137 void __iomem *abs; /* bus map offset */
138 void __iomem *cap; /* bus map offset + CAP offset + CAP data */
139 size_t size; /* bank size */
143 #define ABS_AHBBURST (0x0090UL)
144 #define ABS_AHBMODE (0x0098UL)
145 /* UDC register map */
146 #define ABS_CAPLENGTH (0x100UL)
147 #define ABS_HCCPARAMS (0x108UL)
148 #define ABS_DCCPARAMS (0x124UL)
149 #define ABS_TESTMODE (hw_bank.lpm ? 0x0FCUL : 0x138UL)
150 /* offset to CAPLENTGH (addr + data) */
151 #define CAP_USBCMD (0x000UL)
152 #define CAP_USBSTS (0x004UL)
153 #define CAP_USBINTR (0x008UL)
154 #define CAP_DEVICEADDR (0x014UL)
155 #define CAP_ENDPTLISTADDR (0x018UL)
156 #define CAP_PORTSC (0x044UL)
157 #define CAP_DEVLC (0x084UL)
158 #define CAP_USBMODE (hw_bank.lpm ? 0x0C8UL : 0x068UL)
159 #define CAP_ENDPTSETUPSTAT (hw_bank.lpm ? 0x0D8UL : 0x06CUL)
160 #define CAP_ENDPTPRIME (hw_bank.lpm ? 0x0DCUL : 0x070UL)
161 #define CAP_ENDPTFLUSH (hw_bank.lpm ? 0x0E0UL : 0x074UL)
162 #define CAP_ENDPTSTAT (hw_bank.lpm ? 0x0E4UL : 0x078UL)
163 #define CAP_ENDPTCOMPLETE (hw_bank.lpm ? 0x0E8UL : 0x07CUL)
164 #define CAP_ENDPTCTRL (hw_bank.lpm ? 0x0ECUL : 0x080UL)
165 #define CAP_LAST (hw_bank.lpm ? 0x12CUL : 0x0C0UL)
167 /* maximum number of enpoints: valid only after hw_device_reset() */
168 static unsigned hw_ep_max;
171 * hw_ep_bit: calculates the bit number
172 * @num: endpoint number
173 * @dir: endpoint direction
175 * This function returns bit number
177 static inline int hw_ep_bit(int num, int dir)
179 return num + (dir ? 16 : 0);
183 * hw_aread: reads from register bitfield
184 * @addr: address relative to bus map
185 * @mask: bitfield mask
187 * This function returns register bitfield data
189 static u32 hw_aread(u32 addr, u32 mask)
191 return ioread32(addr + hw_bank.abs) & mask;
195 * hw_awrite: writes to register bitfield
196 * @addr: address relative to bus map
197 * @mask: bitfield mask
200 static void hw_awrite(u32 addr, u32 mask, u32 data)
202 iowrite32(hw_aread(addr, ~mask) | (data & mask),
207 * hw_cread: reads from register bitfield
208 * @addr: address relative to CAP offset plus content
209 * @mask: bitfield mask
211 * This function returns register bitfield data
213 static u32 hw_cread(u32 addr, u32 mask)
215 return ioread32(addr + hw_bank.cap) & mask;
219 * hw_cwrite: writes to register bitfield
220 * @addr: address relative to CAP offset plus content
221 * @mask: bitfield mask
224 static void hw_cwrite(u32 addr, u32 mask, u32 data)
226 iowrite32(hw_cread(addr, ~mask) | (data & mask),
231 * hw_ctest_and_clear: tests & clears register bitfield
232 * @addr: address relative to CAP offset plus content
233 * @mask: bitfield mask
235 * This function returns register bitfield data
237 static u32 hw_ctest_and_clear(u32 addr, u32 mask)
239 u32 reg = hw_cread(addr, mask);
241 iowrite32(reg, addr + hw_bank.cap);
246 * hw_ctest_and_write: tests & writes register bitfield
247 * @addr: address relative to CAP offset plus content
248 * @mask: bitfield mask
251 * This function returns register bitfield data
253 static u32 hw_ctest_and_write(u32 addr, u32 mask, u32 data)
255 u32 reg = hw_cread(addr, ~0);
257 iowrite32((reg & ~mask) | (data & mask), addr + hw_bank.cap);
258 return (reg & mask) >> ffs_nr(mask);
261 static int hw_device_init(void __iomem *base)
265 /* bank is a module variable */
268 hw_bank.cap = hw_bank.abs;
269 hw_bank.cap += ABS_CAPLENGTH;
270 hw_bank.cap += ioread8(hw_bank.cap);
272 reg = hw_aread(ABS_HCCPARAMS, HCCPARAMS_LEN) >> ffs_nr(HCCPARAMS_LEN);
274 hw_bank.size = hw_bank.cap - hw_bank.abs;
275 hw_bank.size += CAP_LAST;
276 hw_bank.size /= sizeof(u32);
278 reg = hw_aread(ABS_DCCPARAMS, DCCPARAMS_DEN) >> ffs_nr(DCCPARAMS_DEN);
279 hw_ep_max = reg * 2; /* cache hw ENDPT_MAX */
281 if (hw_ep_max == 0 || hw_ep_max > ENDPT_MAX)
284 /* setup lock mode ? */
286 /* ENDPTSETUPSTAT is '0' by default */
288 /* HCSPARAMS.bf.ppc SHOULD BE zero for device */
293 * hw_device_reset: resets chip (execute without interruption)
294 * @base: register base address
296 * This function returns an error code
298 static int hw_device_reset(struct ci13xxx *udc)
300 /* should flush & stop before reset */
301 hw_cwrite(CAP_ENDPTFLUSH, ~0, ~0);
302 hw_cwrite(CAP_USBCMD, USBCMD_RS, 0);
304 hw_cwrite(CAP_USBCMD, USBCMD_RST, USBCMD_RST);
305 while (hw_cread(CAP_USBCMD, USBCMD_RST))
306 udelay(10); /* not RTOS friendly */
309 if (udc->udc_driver->notify_event)
310 udc->udc_driver->notify_event(udc,
311 CI13XXX_CONTROLLER_RESET_EVENT);
313 if (udc->udc_driver->flags & CI13XXX_DISABLE_STREAMING)
314 hw_cwrite(CAP_USBMODE, USBMODE_SDIS, USBMODE_SDIS);
316 /* USBMODE should be configured step by step */
317 hw_cwrite(CAP_USBMODE, USBMODE_CM, USBMODE_CM_IDLE);
318 hw_cwrite(CAP_USBMODE, USBMODE_CM, USBMODE_CM_DEVICE);
319 hw_cwrite(CAP_USBMODE, USBMODE_SLOM, USBMODE_SLOM); /* HW >= 2.3 */
321 if (hw_cread(CAP_USBMODE, USBMODE_CM) != USBMODE_CM_DEVICE) {
322 pr_err("cannot enter in device mode");
323 pr_err("lpm = %i", hw_bank.lpm);
331 * hw_device_state: enables/disables interrupts & starts/stops device (execute
332 * without interruption)
333 * @dma: 0 => disable, !0 => enable and set dma engine
335 * This function returns an error code
337 static int hw_device_state(u32 dma)
340 hw_cwrite(CAP_ENDPTLISTADDR, ~0, dma);
341 /* interrupt, error, port change, reset, sleep/suspend */
342 hw_cwrite(CAP_USBINTR, ~0,
343 USBi_UI|USBi_UEI|USBi_PCI|USBi_URI|USBi_SLI);
344 hw_cwrite(CAP_USBCMD, USBCMD_RS, USBCMD_RS);
346 hw_cwrite(CAP_USBCMD, USBCMD_RS, 0);
347 hw_cwrite(CAP_USBINTR, ~0, 0);
353 * hw_ep_flush: flush endpoint fifo (execute without interruption)
354 * @num: endpoint number
355 * @dir: endpoint direction
357 * This function returns an error code
359 static int hw_ep_flush(int num, int dir)
361 int n = hw_ep_bit(num, dir);
364 /* flush any pending transfer */
365 hw_cwrite(CAP_ENDPTFLUSH, BIT(n), BIT(n));
366 while (hw_cread(CAP_ENDPTFLUSH, BIT(n)))
368 } while (hw_cread(CAP_ENDPTSTAT, BIT(n)));
374 * hw_ep_disable: disables endpoint (execute without interruption)
375 * @num: endpoint number
376 * @dir: endpoint direction
378 * This function returns an error code
380 static int hw_ep_disable(int num, int dir)
382 hw_ep_flush(num, dir);
383 hw_cwrite(CAP_ENDPTCTRL + num * sizeof(u32),
384 dir ? ENDPTCTRL_TXE : ENDPTCTRL_RXE, 0);
389 * hw_ep_enable: enables endpoint (execute without interruption)
390 * @num: endpoint number
391 * @dir: endpoint direction
392 * @type: endpoint type
394 * This function returns an error code
396 static int hw_ep_enable(int num, int dir, int type)
401 mask = ENDPTCTRL_TXT; /* type */
402 data = type << ffs_nr(mask);
404 mask |= ENDPTCTRL_TXS; /* unstall */
405 mask |= ENDPTCTRL_TXR; /* reset data toggle */
406 data |= ENDPTCTRL_TXR;
407 mask |= ENDPTCTRL_TXE; /* enable */
408 data |= ENDPTCTRL_TXE;
410 mask = ENDPTCTRL_RXT; /* type */
411 data = type << ffs_nr(mask);
413 mask |= ENDPTCTRL_RXS; /* unstall */
414 mask |= ENDPTCTRL_RXR; /* reset data toggle */
415 data |= ENDPTCTRL_RXR;
416 mask |= ENDPTCTRL_RXE; /* enable */
417 data |= ENDPTCTRL_RXE;
419 hw_cwrite(CAP_ENDPTCTRL + num * sizeof(u32), mask, data);
424 * hw_ep_get_halt: return endpoint halt status
425 * @num: endpoint number
426 * @dir: endpoint direction
428 * This function returns 1 if endpoint halted
430 static int hw_ep_get_halt(int num, int dir)
432 u32 mask = dir ? ENDPTCTRL_TXS : ENDPTCTRL_RXS;
434 return hw_cread(CAP_ENDPTCTRL + num * sizeof(u32), mask) ? 1 : 0;
438 * hw_test_and_clear_setup_status: test & clear setup status (execute without
440 * @n: bit number (endpoint)
442 * This function returns setup status
444 static int hw_test_and_clear_setup_status(int n)
446 return hw_ctest_and_clear(CAP_ENDPTSETUPSTAT, BIT(n));
450 * hw_ep_prime: primes endpoint (execute without interruption)
451 * @num: endpoint number
452 * @dir: endpoint direction
453 * @is_ctrl: true if control endpoint
455 * This function returns an error code
457 static int hw_ep_prime(int num, int dir, int is_ctrl)
459 int n = hw_ep_bit(num, dir);
461 if (is_ctrl && dir == RX && hw_cread(CAP_ENDPTSETUPSTAT, BIT(num)))
464 hw_cwrite(CAP_ENDPTPRIME, BIT(n), BIT(n));
466 while (hw_cread(CAP_ENDPTPRIME, BIT(n)))
468 if (is_ctrl && dir == RX && hw_cread(CAP_ENDPTSETUPSTAT, BIT(num)))
471 /* status shoult be tested according with manual but it doesn't work */
476 * hw_ep_set_halt: configures ep halt & resets data toggle after clear (execute
477 * without interruption)
478 * @num: endpoint number
479 * @dir: endpoint direction
480 * @value: true => stall, false => unstall
482 * This function returns an error code
484 static int hw_ep_set_halt(int num, int dir, int value)
486 if (value != 0 && value != 1)
490 u32 addr = CAP_ENDPTCTRL + num * sizeof(u32);
491 u32 mask_xs = dir ? ENDPTCTRL_TXS : ENDPTCTRL_RXS;
492 u32 mask_xr = dir ? ENDPTCTRL_TXR : ENDPTCTRL_RXR;
494 /* data toggle - reserved for EP0 but it's in ESS */
495 hw_cwrite(addr, mask_xs|mask_xr, value ? mask_xs : mask_xr);
497 } while (value != hw_ep_get_halt(num, dir));
503 * hw_intr_clear: disables interrupt & clears interrupt status (execute without
507 * This function returns an error code
509 static int hw_intr_clear(int n)
514 hw_cwrite(CAP_USBINTR, BIT(n), 0);
515 hw_cwrite(CAP_USBSTS, BIT(n), BIT(n));
520 * hw_intr_force: enables interrupt & forces interrupt status (execute without
524 * This function returns an error code
526 static int hw_intr_force(int n)
531 hw_awrite(ABS_TESTMODE, TESTMODE_FORCE, TESTMODE_FORCE);
532 hw_cwrite(CAP_USBINTR, BIT(n), BIT(n));
533 hw_cwrite(CAP_USBSTS, BIT(n), BIT(n));
534 hw_awrite(ABS_TESTMODE, TESTMODE_FORCE, 0);
539 * hw_is_port_high_speed: test if port is high speed
541 * This function returns true if high speed port
543 static int hw_port_is_high_speed(void)
545 return hw_bank.lpm ? hw_cread(CAP_DEVLC, DEVLC_PSPD) :
546 hw_cread(CAP_PORTSC, PORTSC_HSP);
550 * hw_port_test_get: reads port test mode value
552 * This function returns port test mode value
554 static u8 hw_port_test_get(void)
556 return hw_cread(CAP_PORTSC, PORTSC_PTC) >> ffs_nr(PORTSC_PTC);
560 * hw_port_test_set: writes port test mode (execute without interruption)
563 * This function returns an error code
565 static int hw_port_test_set(u8 mode)
567 const u8 TEST_MODE_MAX = 7;
569 if (mode > TEST_MODE_MAX)
572 hw_cwrite(CAP_PORTSC, PORTSC_PTC, mode << ffs_nr(PORTSC_PTC));
577 * hw_read_intr_enable: returns interrupt enable register
579 * This function returns register data
581 static u32 hw_read_intr_enable(void)
583 return hw_cread(CAP_USBINTR, ~0);
587 * hw_read_intr_status: returns interrupt status register
589 * This function returns register data
591 static u32 hw_read_intr_status(void)
593 return hw_cread(CAP_USBSTS, ~0);
597 * hw_register_read: reads all device registers (execute without interruption)
598 * @buf: destination buffer
601 * This function returns number of registers read
603 static size_t hw_register_read(u32 *buf, size_t size)
607 if (size > hw_bank.size)
610 for (i = 0; i < size; i++)
611 buf[i] = hw_aread(i * sizeof(u32), ~0);
617 * hw_register_write: writes to register
618 * @addr: register address
619 * @data: register value
621 * This function returns an error code
623 static int hw_register_write(u16 addr, u32 data)
628 if (addr >= hw_bank.size)
634 hw_awrite(addr, ~0, data);
639 * hw_test_and_clear_complete: test & clear complete status (execute without
641 * @n: bit number (endpoint)
643 * This function returns complete status
645 static int hw_test_and_clear_complete(int n)
647 return hw_ctest_and_clear(CAP_ENDPTCOMPLETE, BIT(n));
651 * hw_test_and_clear_intr_active: test & clear active interrupts (execute
652 * without interruption)
654 * This function returns active interrutps
656 static u32 hw_test_and_clear_intr_active(void)
658 u32 reg = hw_read_intr_status() & hw_read_intr_enable();
660 hw_cwrite(CAP_USBSTS, ~0, reg);
665 * hw_test_and_clear_setup_guard: test & clear setup guard (execute without
668 * This function returns guard value
670 static int hw_test_and_clear_setup_guard(void)
672 return hw_ctest_and_write(CAP_USBCMD, USBCMD_SUTW, 0);
676 * hw_test_and_set_setup_guard: test & set setup guard (execute without
679 * This function returns guard value
681 static int hw_test_and_set_setup_guard(void)
683 return hw_ctest_and_write(CAP_USBCMD, USBCMD_SUTW, USBCMD_SUTW);
687 * hw_usb_set_address: configures USB address (execute without interruption)
688 * @value: new USB address
690 * This function returns an error code
692 static int hw_usb_set_address(u8 value)
695 hw_cwrite(CAP_DEVICEADDR, DEVICEADDR_USBADR | DEVICEADDR_USBADRA,
696 value << ffs_nr(DEVICEADDR_USBADR) | DEVICEADDR_USBADRA);
701 * hw_usb_reset: restart device after a bus reset (execute without
704 * This function returns an error code
706 static int hw_usb_reset(void)
708 hw_usb_set_address(0);
710 /* ESS flushes only at end?!? */
711 hw_cwrite(CAP_ENDPTFLUSH, ~0, ~0); /* flush all EPs */
713 /* clear setup token semaphores */
714 hw_cwrite(CAP_ENDPTSETUPSTAT, 0, 0); /* writes its content */
716 /* clear complete status */
717 hw_cwrite(CAP_ENDPTCOMPLETE, 0, 0); /* writes its content */
719 /* wait until all bits cleared */
720 while (hw_cread(CAP_ENDPTPRIME, ~0))
721 udelay(10); /* not RTOS friendly */
723 /* reset all endpoints ? */
725 /* reset internal status and wait for further instructions
726 no need to verify the port reset status (ESS does it) */
731 /******************************************************************************
733 *****************************************************************************/
735 * show_device: prints information about device capabilities and status
737 * Check "device.h" for details
739 static ssize_t show_device(struct device *dev, struct device_attribute *attr,
742 struct ci13xxx *udc = container_of(dev, struct ci13xxx, gadget.dev);
743 struct usb_gadget *gadget = &udc->gadget;
746 dbg_trace("[%s] %p\n", __func__, buf);
747 if (attr == NULL || buf == NULL) {
748 dev_err(dev, "[%s] EINVAL\n", __func__);
752 n += scnprintf(buf + n, PAGE_SIZE - n, "speed = %d\n",
754 n += scnprintf(buf + n, PAGE_SIZE - n, "is_dualspeed = %d\n",
755 gadget->is_dualspeed);
756 n += scnprintf(buf + n, PAGE_SIZE - n, "is_otg = %d\n",
758 n += scnprintf(buf + n, PAGE_SIZE - n, "is_a_peripheral = %d\n",
759 gadget->is_a_peripheral);
760 n += scnprintf(buf + n, PAGE_SIZE - n, "b_hnp_enable = %d\n",
761 gadget->b_hnp_enable);
762 n += scnprintf(buf + n, PAGE_SIZE - n, "a_hnp_support = %d\n",
763 gadget->a_hnp_support);
764 n += scnprintf(buf + n, PAGE_SIZE - n, "a_alt_hnp_support = %d\n",
765 gadget->a_alt_hnp_support);
766 n += scnprintf(buf + n, PAGE_SIZE - n, "name = %s\n",
767 (gadget->name ? gadget->name : ""));
771 static DEVICE_ATTR(device, S_IRUSR, show_device, NULL);
774 * show_driver: prints information about attached gadget (if any)
776 * Check "device.h" for details
778 static ssize_t show_driver(struct device *dev, struct device_attribute *attr,
781 struct ci13xxx *udc = container_of(dev, struct ci13xxx, gadget.dev);
782 struct usb_gadget_driver *driver = udc->driver;
785 dbg_trace("[%s] %p\n", __func__, buf);
786 if (attr == NULL || buf == NULL) {
787 dev_err(dev, "[%s] EINVAL\n", __func__);
792 return scnprintf(buf, PAGE_SIZE,
793 "There is no gadget attached!\n");
795 n += scnprintf(buf + n, PAGE_SIZE - n, "function = %s\n",
796 (driver->function ? driver->function : ""));
797 n += scnprintf(buf + n, PAGE_SIZE - n, "max speed = %d\n",
802 static DEVICE_ATTR(driver, S_IRUSR, show_driver, NULL);
804 /* Maximum event message length */
805 #define DBG_DATA_MSG 64UL
807 /* Maximum event messages */
808 #define DBG_DATA_MAX 128UL
810 /* Event buffer descriptor */
812 char (buf[DBG_DATA_MAX])[DBG_DATA_MSG]; /* buffer */
813 unsigned idx; /* index */
814 unsigned tty; /* print to console? */
815 rwlock_t lck; /* lock */
819 .lck = __RW_LOCK_UNLOCKED(lck)
823 * dbg_dec: decrements debug event index
826 static void dbg_dec(unsigned *idx)
828 *idx = (*idx - 1) & (DBG_DATA_MAX-1);
832 * dbg_inc: increments debug event index
835 static void dbg_inc(unsigned *idx)
837 *idx = (*idx + 1) & (DBG_DATA_MAX-1);
841 * dbg_print: prints the common part of the event
842 * @addr: endpoint address
845 * @extra: extra information
847 static void dbg_print(u8 addr, const char *name, int status, const char *extra)
853 write_lock_irqsave(&dbg_data.lck, flags);
855 do_gettimeofday(&tval);
856 stamp = tval.tv_sec & 0xFFFF; /* 2^32 = 4294967296. Limit to 4096s */
857 stamp = stamp * 1000000 + tval.tv_usec;
859 scnprintf(dbg_data.buf[dbg_data.idx], DBG_DATA_MSG,
860 "%04X\t» %02X %-7.7s %4i «\t%s\n",
861 stamp, addr, name, status, extra);
863 dbg_inc(&dbg_data.idx);
865 write_unlock_irqrestore(&dbg_data.lck, flags);
867 if (dbg_data.tty != 0)
868 pr_notice("%04X\t» %02X %-7.7s %4i «\t%s\n",
869 stamp, addr, name, status, extra);
873 * dbg_done: prints a DONE event
874 * @addr: endpoint address
875 * @td: transfer descriptor
878 static void dbg_done(u8 addr, const u32 token, int status)
880 char msg[DBG_DATA_MSG];
882 scnprintf(msg, sizeof(msg), "%d %02X",
883 (int)(token & TD_TOTAL_BYTES) >> ffs_nr(TD_TOTAL_BYTES),
884 (int)(token & TD_STATUS) >> ffs_nr(TD_STATUS));
885 dbg_print(addr, "DONE", status, msg);
889 * dbg_event: prints a generic event
890 * @addr: endpoint address
894 static void dbg_event(u8 addr, const char *name, int status)
897 dbg_print(addr, name, status, "");
901 * dbg_queue: prints a QUEUE event
902 * @addr: endpoint address
906 static void dbg_queue(u8 addr, const struct usb_request *req, int status)
908 char msg[DBG_DATA_MSG];
911 scnprintf(msg, sizeof(msg),
912 "%d %d", !req->no_interrupt, req->length);
913 dbg_print(addr, "QUEUE", status, msg);
918 * dbg_setup: prints a SETUP event
919 * @addr: endpoint address
920 * @req: setup request
922 static void dbg_setup(u8 addr, const struct usb_ctrlrequest *req)
924 char msg[DBG_DATA_MSG];
927 scnprintf(msg, sizeof(msg),
928 "%02X %02X %04X %04X %d", req->bRequestType,
929 req->bRequest, le16_to_cpu(req->wValue),
930 le16_to_cpu(req->wIndex), le16_to_cpu(req->wLength));
931 dbg_print(addr, "SETUP", 0, msg);
936 * show_events: displays the event buffer
938 * Check "device.h" for details
940 static ssize_t show_events(struct device *dev, struct device_attribute *attr,
944 unsigned i, j, n = 0;
946 dbg_trace("[%s] %p\n", __func__, buf);
947 if (attr == NULL || buf == NULL) {
948 dev_err(dev, "[%s] EINVAL\n", __func__);
952 read_lock_irqsave(&dbg_data.lck, flags);
955 for (dbg_dec(&i); i != dbg_data.idx; dbg_dec(&i)) {
956 n += strlen(dbg_data.buf[i]);
957 if (n >= PAGE_SIZE) {
958 n -= strlen(dbg_data.buf[i]);
962 for (j = 0, dbg_inc(&i); j < n; dbg_inc(&i))
963 j += scnprintf(buf + j, PAGE_SIZE - j,
964 "%s", dbg_data.buf[i]);
966 read_unlock_irqrestore(&dbg_data.lck, flags);
972 * store_events: configure if events are going to be also printed to console
974 * Check "device.h" for details
976 static ssize_t store_events(struct device *dev, struct device_attribute *attr,
977 const char *buf, size_t count)
981 dbg_trace("[%s] %p, %d\n", __func__, buf, count);
982 if (attr == NULL || buf == NULL) {
983 dev_err(dev, "[%s] EINVAL\n", __func__);
987 if (sscanf(buf, "%u", &tty) != 1 || tty > 1) {
988 dev_err(dev, "<1|0>: enable|disable console log\n");
993 dev_info(dev, "tty = %u", dbg_data.tty);
998 static DEVICE_ATTR(events, S_IRUSR | S_IWUSR, show_events, store_events);
1001 * show_inters: interrupt status, enable status and historic
1003 * Check "device.h" for details
1005 static ssize_t show_inters(struct device *dev, struct device_attribute *attr,
1008 struct ci13xxx *udc = container_of(dev, struct ci13xxx, gadget.dev);
1009 unsigned long flags;
1011 unsigned i, j, n = 0;
1013 dbg_trace("[%s] %p\n", __func__, buf);
1014 if (attr == NULL || buf == NULL) {
1015 dev_err(dev, "[%s] EINVAL\n", __func__);
1019 spin_lock_irqsave(udc->lock, flags);
1021 n += scnprintf(buf + n, PAGE_SIZE - n,
1022 "status = %08x\n", hw_read_intr_status());
1023 n += scnprintf(buf + n, PAGE_SIZE - n,
1024 "enable = %08x\n", hw_read_intr_enable());
1026 n += scnprintf(buf + n, PAGE_SIZE - n, "*test = %d\n",
1027 isr_statistics.test);
1028 n += scnprintf(buf + n, PAGE_SIZE - n, "» ui = %d\n",
1030 n += scnprintf(buf + n, PAGE_SIZE - n, "» uei = %d\n",
1031 isr_statistics.uei);
1032 n += scnprintf(buf + n, PAGE_SIZE - n, "» pci = %d\n",
1033 isr_statistics.pci);
1034 n += scnprintf(buf + n, PAGE_SIZE - n, "» uri = %d\n",
1035 isr_statistics.uri);
1036 n += scnprintf(buf + n, PAGE_SIZE - n, "» sli = %d\n",
1037 isr_statistics.sli);
1038 n += scnprintf(buf + n, PAGE_SIZE - n, "*none = %d\n",
1039 isr_statistics.none);
1040 n += scnprintf(buf + n, PAGE_SIZE - n, "*hndl = %d\n",
1041 isr_statistics.hndl.cnt);
1043 for (i = isr_statistics.hndl.idx, j = 0; j <= ISR_MASK; j++, i++) {
1045 intr = isr_statistics.hndl.buf[i];
1048 n += scnprintf(buf + n, PAGE_SIZE - n, "ui ");
1050 if (USBi_UEI & intr)
1051 n += scnprintf(buf + n, PAGE_SIZE - n, "uei ");
1053 if (USBi_PCI & intr)
1054 n += scnprintf(buf + n, PAGE_SIZE - n, "pci ");
1056 if (USBi_URI & intr)
1057 n += scnprintf(buf + n, PAGE_SIZE - n, "uri ");
1059 if (USBi_SLI & intr)
1060 n += scnprintf(buf + n, PAGE_SIZE - n, "sli ");
1063 n += scnprintf(buf + n, PAGE_SIZE - n, "??? ");
1064 if (isr_statistics.hndl.buf[i])
1065 n += scnprintf(buf + n, PAGE_SIZE - n, "\n");
1068 spin_unlock_irqrestore(udc->lock, flags);
1074 * store_inters: enable & force or disable an individual interrutps
1075 * (to be used for test purposes only)
1077 * Check "device.h" for details
1079 static ssize_t store_inters(struct device *dev, struct device_attribute *attr,
1080 const char *buf, size_t count)
1082 struct ci13xxx *udc = container_of(dev, struct ci13xxx, gadget.dev);
1083 unsigned long flags;
1086 dbg_trace("[%s] %p, %d\n", __func__, buf, count);
1087 if (attr == NULL || buf == NULL) {
1088 dev_err(dev, "[%s] EINVAL\n", __func__);
1092 if (sscanf(buf, "%u %u", &en, &bit) != 2 || en > 1) {
1093 dev_err(dev, "<1|0> <bit>: enable|disable interrupt");
1097 spin_lock_irqsave(udc->lock, flags);
1099 if (hw_intr_force(bit))
1100 dev_err(dev, "invalid bit number\n");
1102 isr_statistics.test++;
1104 if (hw_intr_clear(bit))
1105 dev_err(dev, "invalid bit number\n");
1107 spin_unlock_irqrestore(udc->lock, flags);
1112 static DEVICE_ATTR(inters, S_IRUSR | S_IWUSR, show_inters, store_inters);
1115 * show_port_test: reads port test mode
1117 * Check "device.h" for details
1119 static ssize_t show_port_test(struct device *dev,
1120 struct device_attribute *attr, char *buf)
1122 struct ci13xxx *udc = container_of(dev, struct ci13xxx, gadget.dev);
1123 unsigned long flags;
1126 dbg_trace("[%s] %p\n", __func__, buf);
1127 if (attr == NULL || buf == NULL) {
1128 dev_err(dev, "[%s] EINVAL\n", __func__);
1132 spin_lock_irqsave(udc->lock, flags);
1133 mode = hw_port_test_get();
1134 spin_unlock_irqrestore(udc->lock, flags);
1136 return scnprintf(buf, PAGE_SIZE, "mode = %u\n", mode);
1140 * store_port_test: writes port test mode
1142 * Check "device.h" for details
1144 static ssize_t store_port_test(struct device *dev,
1145 struct device_attribute *attr,
1146 const char *buf, size_t count)
1148 struct ci13xxx *udc = container_of(dev, struct ci13xxx, gadget.dev);
1149 unsigned long flags;
1152 dbg_trace("[%s] %p, %d\n", __func__, buf, count);
1153 if (attr == NULL || buf == NULL) {
1154 dev_err(dev, "[%s] EINVAL\n", __func__);
1158 if (sscanf(buf, "%u", &mode) != 1) {
1159 dev_err(dev, "<mode>: set port test mode");
1163 spin_lock_irqsave(udc->lock, flags);
1164 if (hw_port_test_set(mode))
1165 dev_err(dev, "invalid mode\n");
1166 spin_unlock_irqrestore(udc->lock, flags);
1171 static DEVICE_ATTR(port_test, S_IRUSR | S_IWUSR,
1172 show_port_test, store_port_test);
1175 * show_qheads: DMA contents of all queue heads
1177 * Check "device.h" for details
1179 static ssize_t show_qheads(struct device *dev, struct device_attribute *attr,
1182 struct ci13xxx *udc = container_of(dev, struct ci13xxx, gadget.dev);
1183 unsigned long flags;
1184 unsigned i, j, n = 0;
1186 dbg_trace("[%s] %p\n", __func__, buf);
1187 if (attr == NULL || buf == NULL) {
1188 dev_err(dev, "[%s] EINVAL\n", __func__);
1192 spin_lock_irqsave(udc->lock, flags);
1193 for (i = 0; i < hw_ep_max/2; i++) {
1194 struct ci13xxx_ep *mEpRx = &udc->ci13xxx_ep[i];
1195 struct ci13xxx_ep *mEpTx = &udc->ci13xxx_ep[i + hw_ep_max/2];
1196 n += scnprintf(buf + n, PAGE_SIZE - n,
1197 "EP=%02i: RX=%08X TX=%08X\n",
1198 i, (u32)mEpRx->qh.dma, (u32)mEpTx->qh.dma);
1199 for (j = 0; j < (sizeof(struct ci13xxx_qh)/sizeof(u32)); j++) {
1200 n += scnprintf(buf + n, PAGE_SIZE - n,
1201 " %04X: %08X %08X\n", j,
1202 *((u32 *)mEpRx->qh.ptr + j),
1203 *((u32 *)mEpTx->qh.ptr + j));
1206 spin_unlock_irqrestore(udc->lock, flags);
1210 static DEVICE_ATTR(qheads, S_IRUSR, show_qheads, NULL);
1213 * show_registers: dumps all registers
1215 * Check "device.h" for details
1217 static ssize_t show_registers(struct device *dev,
1218 struct device_attribute *attr, char *buf)
1220 struct ci13xxx *udc = container_of(dev, struct ci13xxx, gadget.dev);
1221 unsigned long flags;
1223 unsigned i, k, n = 0;
1225 dbg_trace("[%s] %p\n", __func__, buf);
1226 if (attr == NULL || buf == NULL) {
1227 dev_err(dev, "[%s] EINVAL\n", __func__);
1231 spin_lock_irqsave(udc->lock, flags);
1232 k = hw_register_read(dump, sizeof(dump)/sizeof(u32));
1233 spin_unlock_irqrestore(udc->lock, flags);
1235 for (i = 0; i < k; i++) {
1236 n += scnprintf(buf + n, PAGE_SIZE - n,
1237 "reg[0x%04X] = 0x%08X\n",
1238 i * (unsigned)sizeof(u32), dump[i]);
1245 * store_registers: writes value to register address
1247 * Check "device.h" for details
1249 static ssize_t store_registers(struct device *dev,
1250 struct device_attribute *attr,
1251 const char *buf, size_t count)
1253 struct ci13xxx *udc = container_of(dev, struct ci13xxx, gadget.dev);
1254 unsigned long addr, data, flags;
1256 dbg_trace("[%s] %p, %d\n", __func__, buf, count);
1257 if (attr == NULL || buf == NULL) {
1258 dev_err(dev, "[%s] EINVAL\n", __func__);
1262 if (sscanf(buf, "%li %li", &addr, &data) != 2) {
1263 dev_err(dev, "<addr> <data>: write data to register address");
1267 spin_lock_irqsave(udc->lock, flags);
1268 if (hw_register_write(addr, data))
1269 dev_err(dev, "invalid address range\n");
1270 spin_unlock_irqrestore(udc->lock, flags);
1275 static DEVICE_ATTR(registers, S_IRUSR | S_IWUSR,
1276 show_registers, store_registers);
1279 * show_requests: DMA contents of all requests currently queued (all endpts)
1281 * Check "device.h" for details
1283 static ssize_t show_requests(struct device *dev, struct device_attribute *attr,
1286 struct ci13xxx *udc = container_of(dev, struct ci13xxx, gadget.dev);
1287 unsigned long flags;
1288 struct list_head *ptr = NULL;
1289 struct ci13xxx_req *req = NULL;
1290 unsigned i, j, n = 0, qSize = sizeof(struct ci13xxx_td)/sizeof(u32);
1292 dbg_trace("[%s] %p\n", __func__, buf);
1293 if (attr == NULL || buf == NULL) {
1294 dev_err(dev, "[%s] EINVAL\n", __func__);
1298 spin_lock_irqsave(udc->lock, flags);
1299 for (i = 0; i < hw_ep_max; i++)
1300 list_for_each(ptr, &udc->ci13xxx_ep[i].qh.queue)
1302 req = list_entry(ptr, struct ci13xxx_req, queue);
1304 n += scnprintf(buf + n, PAGE_SIZE - n,
1305 "EP=%02i: TD=%08X %s\n",
1306 i % hw_ep_max/2, (u32)req->dma,
1307 ((i < hw_ep_max/2) ? "RX" : "TX"));
1309 for (j = 0; j < qSize; j++)
1310 n += scnprintf(buf + n, PAGE_SIZE - n,
1312 *((u32 *)req->ptr + j));
1314 spin_unlock_irqrestore(udc->lock, flags);
1318 static DEVICE_ATTR(requests, S_IRUSR, show_requests, NULL);
1321 * dbg_create_files: initializes the attribute interface
1324 * This function returns an error code
1326 __maybe_unused static int dbg_create_files(struct device *dev)
1332 retval = device_create_file(dev, &dev_attr_device);
1335 retval = device_create_file(dev, &dev_attr_driver);
1338 retval = device_create_file(dev, &dev_attr_events);
1341 retval = device_create_file(dev, &dev_attr_inters);
1344 retval = device_create_file(dev, &dev_attr_port_test);
1347 retval = device_create_file(dev, &dev_attr_qheads);
1350 retval = device_create_file(dev, &dev_attr_registers);
1353 retval = device_create_file(dev, &dev_attr_requests);
1359 device_remove_file(dev, &dev_attr_registers);
1361 device_remove_file(dev, &dev_attr_qheads);
1363 device_remove_file(dev, &dev_attr_port_test);
1365 device_remove_file(dev, &dev_attr_inters);
1367 device_remove_file(dev, &dev_attr_events);
1369 device_remove_file(dev, &dev_attr_driver);
1371 device_remove_file(dev, &dev_attr_device);
1377 * dbg_remove_files: destroys the attribute interface
1380 * This function returns an error code
1382 __maybe_unused static int dbg_remove_files(struct device *dev)
1386 device_remove_file(dev, &dev_attr_requests);
1387 device_remove_file(dev, &dev_attr_registers);
1388 device_remove_file(dev, &dev_attr_qheads);
1389 device_remove_file(dev, &dev_attr_port_test);
1390 device_remove_file(dev, &dev_attr_inters);
1391 device_remove_file(dev, &dev_attr_events);
1392 device_remove_file(dev, &dev_attr_driver);
1393 device_remove_file(dev, &dev_attr_device);
1397 /******************************************************************************
1399 *****************************************************************************/
1401 * _usb_addr: calculates endpoint address from direction & number
1404 static inline u8 _usb_addr(struct ci13xxx_ep *ep)
1406 return ((ep->dir == TX) ? USB_ENDPOINT_DIR_MASK : 0) | ep->num;
1410 * _hardware_queue: configures a request at hardware level
1414 * This function returns an error code
1416 static int _hardware_enqueue(struct ci13xxx_ep *mEp, struct ci13xxx_req *mReq)
1420 unsigned length = mReq->req.length;
1422 trace("%p, %p", mEp, mReq);
1424 /* don't queue twice */
1425 if (mReq->req.status == -EALREADY)
1428 mReq->req.status = -EALREADY;
1429 if (length && !mReq->req.dma) {
1431 dma_map_single(mEp->device, mReq->req.buf,
1432 length, mEp->dir ? DMA_TO_DEVICE :
1434 if (mReq->req.dma == 0)
1440 if (mReq->req.zero && length && (length % mEp->ep.maxpacket == 0)) {
1441 mReq->zptr = dma_pool_alloc(mEp->td_pool, GFP_ATOMIC,
1443 if (mReq->zptr == NULL) {
1445 dma_unmap_single(mEp->device, mReq->req.dma,
1446 length, mEp->dir ? DMA_TO_DEVICE :
1453 memset(mReq->zptr, 0, sizeof(*mReq->zptr));
1454 mReq->zptr->next = TD_TERMINATE;
1455 mReq->zptr->token = TD_STATUS_ACTIVE;
1456 if (!mReq->req.no_interrupt)
1457 mReq->zptr->token |= TD_IOC;
1461 * TODO - handle requests which spawns into several TDs
1463 memset(mReq->ptr, 0, sizeof(*mReq->ptr));
1464 mReq->ptr->token = length << ffs_nr(TD_TOTAL_BYTES);
1465 mReq->ptr->token &= TD_TOTAL_BYTES;
1466 mReq->ptr->token |= TD_STATUS_ACTIVE;
1468 mReq->ptr->next = mReq->zdma;
1470 mReq->ptr->next = TD_TERMINATE;
1471 if (!mReq->req.no_interrupt)
1472 mReq->ptr->token |= TD_IOC;
1474 mReq->ptr->page[0] = mReq->req.dma;
1475 for (i = 1; i < 5; i++)
1476 mReq->ptr->page[i] =
1477 (mReq->req.dma + i * CI13XXX_PAGE_SIZE) & ~TD_RESERVED_MASK;
1479 if (!list_empty(&mEp->qh.queue)) {
1480 struct ci13xxx_req *mReqPrev;
1481 int n = hw_ep_bit(mEp->num, mEp->dir);
1484 mReqPrev = list_entry(mEp->qh.queue.prev,
1485 struct ci13xxx_req, queue);
1487 mReqPrev->zptr->next = mReq->dma & TD_ADDR_MASK;
1489 mReqPrev->ptr->next = mReq->dma & TD_ADDR_MASK;
1491 if (hw_cread(CAP_ENDPTPRIME, BIT(n)))
1494 hw_cwrite(CAP_USBCMD, USBCMD_ATDTW, USBCMD_ATDTW);
1495 tmp_stat = hw_cread(CAP_ENDPTSTAT, BIT(n));
1496 } while (!hw_cread(CAP_USBCMD, USBCMD_ATDTW));
1497 hw_cwrite(CAP_USBCMD, USBCMD_ATDTW, 0);
1502 /* QH configuration */
1503 mEp->qh.ptr->td.next = mReq->dma; /* TERMINATE = 0 */
1504 mEp->qh.ptr->td.token &= ~TD_STATUS; /* clear status */
1505 mEp->qh.ptr->cap |= QH_ZLT;
1507 wmb(); /* synchronize before ep prime */
1509 ret = hw_ep_prime(mEp->num, mEp->dir,
1510 mEp->type == USB_ENDPOINT_XFER_CONTROL);
1516 * _hardware_dequeue: handles a request at hardware level
1520 * This function returns an error code
1522 static int _hardware_dequeue(struct ci13xxx_ep *mEp, struct ci13xxx_req *mReq)
1524 trace("%p, %p", mEp, mReq);
1526 if (mReq->req.status != -EALREADY)
1529 if ((TD_STATUS_ACTIVE & mReq->ptr->token) != 0)
1533 if ((TD_STATUS_ACTIVE & mReq->zptr->token) != 0)
1535 dma_pool_free(mEp->td_pool, mReq->zptr, mReq->zdma);
1539 mReq->req.status = 0;
1542 dma_unmap_single(mEp->device, mReq->req.dma, mReq->req.length,
1543 mEp->dir ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
1548 mReq->req.status = mReq->ptr->token & TD_STATUS;
1549 if ((TD_STATUS_HALTED & mReq->req.status) != 0)
1550 mReq->req.status = -1;
1551 else if ((TD_STATUS_DT_ERR & mReq->req.status) != 0)
1552 mReq->req.status = -1;
1553 else if ((TD_STATUS_TR_ERR & mReq->req.status) != 0)
1554 mReq->req.status = -1;
1556 mReq->req.actual = mReq->ptr->token & TD_TOTAL_BYTES;
1557 mReq->req.actual >>= ffs_nr(TD_TOTAL_BYTES);
1558 mReq->req.actual = mReq->req.length - mReq->req.actual;
1559 mReq->req.actual = mReq->req.status ? 0 : mReq->req.actual;
1561 return mReq->req.actual;
1565 * _ep_nuke: dequeues all endpoint requests
1568 * This function returns an error code
1569 * Caller must hold lock
1571 static int _ep_nuke(struct ci13xxx_ep *mEp)
1572 __releases(mEp->lock)
1573 __acquires(mEp->lock)
1580 hw_ep_flush(mEp->num, mEp->dir);
1582 while (!list_empty(&mEp->qh.queue)) {
1584 /* pop oldest request */
1585 struct ci13xxx_req *mReq = \
1586 list_entry(mEp->qh.queue.next,
1587 struct ci13xxx_req, queue);
1588 list_del_init(&mReq->queue);
1589 mReq->req.status = -ESHUTDOWN;
1591 if (mReq->req.complete != NULL) {
1592 spin_unlock(mEp->lock);
1593 mReq->req.complete(&mEp->ep, &mReq->req);
1594 spin_lock(mEp->lock);
1601 * _gadget_stop_activity: stops all USB activity, flushes & disables all endpts
1604 * This function returns an error code
1605 * Caller must hold lock
1607 static int _gadget_stop_activity(struct usb_gadget *gadget)
1610 struct ci13xxx *udc = container_of(gadget, struct ci13xxx, gadget);
1611 unsigned long flags;
1613 trace("%p", gadget);
1618 spin_lock_irqsave(udc->lock, flags);
1619 udc->gadget.speed = USB_SPEED_UNKNOWN;
1620 udc->remote_wakeup = 0;
1622 spin_unlock_irqrestore(udc->lock, flags);
1624 /* flush all endpoints */
1625 gadget_for_each_ep(ep, gadget) {
1626 usb_ep_fifo_flush(ep);
1628 usb_ep_fifo_flush(&udc->ep0out.ep);
1629 usb_ep_fifo_flush(&udc->ep0in.ep);
1631 udc->driver->disconnect(gadget);
1633 /* make sure to disable all endpoints */
1634 gadget_for_each_ep(ep, gadget) {
1638 if (udc->status != NULL) {
1639 usb_ep_free_request(&udc->ep0in.ep, udc->status);
1646 /******************************************************************************
1648 *****************************************************************************/
1650 * isr_reset_handler: USB reset interrupt handler
1653 * This function resets USB engine after a bus reset occurred
1655 static void isr_reset_handler(struct ci13xxx *udc)
1656 __releases(udc->lock)
1657 __acquires(udc->lock)
1668 dbg_event(0xFF, "BUS RST", 0);
1670 spin_unlock(udc->lock);
1671 retval = _gadget_stop_activity(&udc->gadget);
1675 retval = hw_usb_reset();
1679 udc->status = usb_ep_alloc_request(&udc->ep0in.ep, GFP_ATOMIC);
1680 if (udc->status == NULL)
1683 spin_lock(udc->lock);
1687 err("error: %i", retval);
1691 * isr_get_status_complete: get_status request complete function
1693 * @req: request handled
1695 * Caller must release lock
1697 static void isr_get_status_complete(struct usb_ep *ep, struct usb_request *req)
1699 trace("%p, %p", ep, req);
1701 if (ep == NULL || req == NULL) {
1707 usb_ep_free_request(ep, req);
1711 * isr_get_status_response: get_status request response
1713 * @setup: setup request packet
1715 * This function returns an error code
1717 static int isr_get_status_response(struct ci13xxx *udc,
1718 struct usb_ctrlrequest *setup)
1719 __releases(mEp->lock)
1720 __acquires(mEp->lock)
1722 struct ci13xxx_ep *mEp = &udc->ep0in;
1723 struct usb_request *req = NULL;
1724 gfp_t gfp_flags = GFP_ATOMIC;
1725 int dir, num, retval;
1727 trace("%p, %p", mEp, setup);
1729 if (mEp == NULL || setup == NULL)
1732 spin_unlock(mEp->lock);
1733 req = usb_ep_alloc_request(&mEp->ep, gfp_flags);
1734 spin_lock(mEp->lock);
1738 req->complete = isr_get_status_complete;
1740 req->buf = kzalloc(req->length, gfp_flags);
1741 if (req->buf == NULL) {
1746 if ((setup->bRequestType & USB_RECIP_MASK) == USB_RECIP_DEVICE) {
1747 /* Assume that device is bus powered for now. */
1748 *((u16 *)req->buf) = _udc->remote_wakeup << 1;
1750 } else if ((setup->bRequestType & USB_RECIP_MASK) \
1751 == USB_RECIP_ENDPOINT) {
1752 dir = (le16_to_cpu(setup->wIndex) & USB_ENDPOINT_DIR_MASK) ?
1754 num = le16_to_cpu(setup->wIndex) & USB_ENDPOINT_NUMBER_MASK;
1755 *((u16 *)req->buf) = hw_ep_get_halt(num, dir);
1757 /* else do nothing; reserved for future use */
1759 spin_unlock(mEp->lock);
1760 retval = usb_ep_queue(&mEp->ep, req, gfp_flags);
1761 spin_lock(mEp->lock);
1770 spin_unlock(mEp->lock);
1771 usb_ep_free_request(&mEp->ep, req);
1772 spin_lock(mEp->lock);
1777 * isr_setup_status_complete: setup_status request complete function
1779 * @req: request handled
1781 * Caller must release lock. Put the port in test mode if test mode
1782 * feature is selected.
1785 isr_setup_status_complete(struct usb_ep *ep, struct usb_request *req)
1787 struct ci13xxx *udc = req->context;
1788 unsigned long flags;
1790 trace("%p, %p", ep, req);
1792 spin_lock_irqsave(udc->lock, flags);
1794 hw_port_test_set(udc->test_mode);
1795 spin_unlock_irqrestore(udc->lock, flags);
1799 * isr_setup_status_phase: queues the status phase of a setup transation
1802 * This function returns an error code
1804 static int isr_setup_status_phase(struct ci13xxx *udc)
1805 __releases(mEp->lock)
1806 __acquires(mEp->lock)
1809 struct ci13xxx_ep *mEp;
1813 mEp = (udc->ep0_dir == TX) ? &udc->ep0out : &udc->ep0in;
1814 udc->status->context = udc;
1815 udc->status->complete = isr_setup_status_complete;
1817 spin_unlock(mEp->lock);
1818 retval = usb_ep_queue(&mEp->ep, udc->status, GFP_ATOMIC);
1819 spin_lock(mEp->lock);
1825 * isr_tr_complete_low: transaction complete low level handler
1828 * This function returns an error code
1829 * Caller must hold lock
1831 static int isr_tr_complete_low(struct ci13xxx_ep *mEp)
1832 __releases(mEp->lock)
1833 __acquires(mEp->lock)
1835 struct ci13xxx_req *mReq, *mReqTemp;
1836 struct ci13xxx_ep *mEpTemp = mEp;
1837 int uninitialized_var(retval);
1841 if (list_empty(&mEp->qh.queue))
1844 list_for_each_entry_safe(mReq, mReqTemp, &mEp->qh.queue,
1846 retval = _hardware_dequeue(mEp, mReq);
1849 list_del_init(&mReq->queue);
1850 dbg_done(_usb_addr(mEp), mReq->ptr->token, retval);
1851 if (mReq->req.complete != NULL) {
1852 spin_unlock(mEp->lock);
1853 if ((mEp->type == USB_ENDPOINT_XFER_CONTROL) &&
1855 mEpTemp = &_udc->ep0in;
1856 mReq->req.complete(&mEpTemp->ep, &mReq->req);
1857 spin_lock(mEp->lock);
1861 if (retval == -EBUSY)
1864 dbg_event(_usb_addr(mEp), "DONE", retval);
1870 * isr_tr_complete_handler: transaction complete interrupt handler
1871 * @udc: UDC descriptor
1873 * This function handles traffic events
1875 static void isr_tr_complete_handler(struct ci13xxx *udc)
1876 __releases(udc->lock)
1877 __acquires(udc->lock)
1889 for (i = 0; i < hw_ep_max; i++) {
1890 struct ci13xxx_ep *mEp = &udc->ci13xxx_ep[i];
1891 int type, num, dir, err = -EINVAL;
1892 struct usb_ctrlrequest req;
1894 if (mEp->desc == NULL)
1895 continue; /* not configured */
1897 if (hw_test_and_clear_complete(i)) {
1898 err = isr_tr_complete_low(mEp);
1899 if (mEp->type == USB_ENDPOINT_XFER_CONTROL) {
1900 if (err > 0) /* needs status phase */
1901 err = isr_setup_status_phase(udc);
1903 dbg_event(_usb_addr(mEp),
1905 spin_unlock(udc->lock);
1906 if (usb_ep_set_halt(&mEp->ep))
1907 err("error: ep_set_halt");
1908 spin_lock(udc->lock);
1913 if (mEp->type != USB_ENDPOINT_XFER_CONTROL ||
1914 !hw_test_and_clear_setup_status(i))
1918 warn("ctrl traffic received at endpoint");
1923 * Flush data and handshake transactions of previous
1926 _ep_nuke(&udc->ep0out);
1927 _ep_nuke(&udc->ep0in);
1929 /* read_setup_packet */
1931 hw_test_and_set_setup_guard();
1932 memcpy(&req, &mEp->qh.ptr->setup, sizeof(req));
1933 } while (!hw_test_and_clear_setup_guard());
1935 type = req.bRequestType;
1937 udc->ep0_dir = (type & USB_DIR_IN) ? TX : RX;
1939 dbg_setup(_usb_addr(mEp), &req);
1941 switch (req.bRequest) {
1942 case USB_REQ_CLEAR_FEATURE:
1943 if (type == (USB_DIR_OUT|USB_RECIP_ENDPOINT) &&
1944 le16_to_cpu(req.wValue) ==
1945 USB_ENDPOINT_HALT) {
1946 if (req.wLength != 0)
1948 num = le16_to_cpu(req.wIndex);
1949 dir = num & USB_ENDPOINT_DIR_MASK;
1950 num &= USB_ENDPOINT_NUMBER_MASK;
1953 if (!udc->ci13xxx_ep[num].wedge) {
1954 spin_unlock(udc->lock);
1955 err = usb_ep_clear_halt(
1956 &udc->ci13xxx_ep[num].ep);
1957 spin_lock(udc->lock);
1961 err = isr_setup_status_phase(udc);
1962 } else if (type == (USB_DIR_OUT|USB_RECIP_DEVICE) &&
1963 le16_to_cpu(req.wValue) ==
1964 USB_DEVICE_REMOTE_WAKEUP) {
1965 if (req.wLength != 0)
1967 udc->remote_wakeup = 0;
1968 err = isr_setup_status_phase(udc);
1973 case USB_REQ_GET_STATUS:
1974 if (type != (USB_DIR_IN|USB_RECIP_DEVICE) &&
1975 type != (USB_DIR_IN|USB_RECIP_ENDPOINT) &&
1976 type != (USB_DIR_IN|USB_RECIP_INTERFACE))
1978 if (le16_to_cpu(req.wLength) != 2 ||
1979 le16_to_cpu(req.wValue) != 0)
1981 err = isr_get_status_response(udc, &req);
1983 case USB_REQ_SET_ADDRESS:
1984 if (type != (USB_DIR_OUT|USB_RECIP_DEVICE))
1986 if (le16_to_cpu(req.wLength) != 0 ||
1987 le16_to_cpu(req.wIndex) != 0)
1989 err = hw_usb_set_address((u8)le16_to_cpu(req.wValue));
1992 err = isr_setup_status_phase(udc);
1994 case USB_REQ_SET_FEATURE:
1995 if (type == (USB_DIR_OUT|USB_RECIP_ENDPOINT) &&
1996 le16_to_cpu(req.wValue) ==
1997 USB_ENDPOINT_HALT) {
1998 if (req.wLength != 0)
2000 num = le16_to_cpu(req.wIndex);
2001 dir = num & USB_ENDPOINT_DIR_MASK;
2002 num &= USB_ENDPOINT_NUMBER_MASK;
2006 spin_unlock(udc->lock);
2007 err = usb_ep_set_halt(&udc->ci13xxx_ep[num].ep);
2008 spin_lock(udc->lock);
2010 isr_setup_status_phase(udc);
2011 } else if (type == (USB_DIR_OUT|USB_RECIP_DEVICE)) {
2012 if (req.wLength != 0)
2014 switch (le16_to_cpu(req.wValue)) {
2015 case USB_DEVICE_REMOTE_WAKEUP:
2016 udc->remote_wakeup = 1;
2017 err = isr_setup_status_phase(udc);
2019 case USB_DEVICE_TEST_MODE:
2020 tmode = le16_to_cpu(req.wIndex) >> 8;
2027 udc->test_mode = tmode;
2028 err = isr_setup_status_phase(
2043 if (req.wLength == 0) /* no data phase */
2046 spin_unlock(udc->lock);
2047 err = udc->driver->setup(&udc->gadget, &req);
2048 spin_lock(udc->lock);
2053 dbg_event(_usb_addr(mEp), "ERROR", err);
2055 spin_unlock(udc->lock);
2056 if (usb_ep_set_halt(&mEp->ep))
2057 err("error: ep_set_halt");
2058 spin_lock(udc->lock);
2063 /******************************************************************************
2065 *****************************************************************************/
2067 * ep_enable: configure endpoint, making it usable
2069 * Check usb_ep_enable() at "usb_gadget.h" for details
2071 static int ep_enable(struct usb_ep *ep,
2072 const struct usb_endpoint_descriptor *desc)
2074 struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
2076 unsigned long flags;
2078 trace("%p, %p", ep, desc);
2080 if (ep == NULL || desc == NULL)
2083 spin_lock_irqsave(mEp->lock, flags);
2085 /* only internal SW should enable ctrl endpts */
2089 if (!list_empty(&mEp->qh.queue))
2090 warn("enabling a non-empty endpoint!");
2092 mEp->dir = usb_endpoint_dir_in(desc) ? TX : RX;
2093 mEp->num = usb_endpoint_num(desc);
2094 mEp->type = usb_endpoint_type(desc);
2096 mEp->ep.maxpacket = __constant_le16_to_cpu(desc->wMaxPacketSize);
2098 dbg_event(_usb_addr(mEp), "ENABLE", 0);
2100 mEp->qh.ptr->cap = 0;
2102 if (mEp->type == USB_ENDPOINT_XFER_CONTROL)
2103 mEp->qh.ptr->cap |= QH_IOS;
2104 else if (mEp->type == USB_ENDPOINT_XFER_ISOC)
2105 mEp->qh.ptr->cap &= ~QH_MULT;
2107 mEp->qh.ptr->cap &= ~QH_ZLT;
2110 (mEp->ep.maxpacket << ffs_nr(QH_MAX_PKT)) & QH_MAX_PKT;
2111 mEp->qh.ptr->td.next |= TD_TERMINATE; /* needed? */
2114 * Enable endpoints in the HW other than ep0 as ep0
2118 retval |= hw_ep_enable(mEp->num, mEp->dir, mEp->type);
2120 spin_unlock_irqrestore(mEp->lock, flags);
2125 * ep_disable: endpoint is no longer usable
2127 * Check usb_ep_disable() at "usb_gadget.h" for details
2129 static int ep_disable(struct usb_ep *ep)
2131 struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
2132 int direction, retval = 0;
2133 unsigned long flags;
2139 else if (mEp->desc == NULL)
2142 spin_lock_irqsave(mEp->lock, flags);
2144 /* only internal SW should disable ctrl endpts */
2146 direction = mEp->dir;
2148 dbg_event(_usb_addr(mEp), "DISABLE", 0);
2150 retval |= _ep_nuke(mEp);
2151 retval |= hw_ep_disable(mEp->num, mEp->dir);
2153 if (mEp->type == USB_ENDPOINT_XFER_CONTROL)
2154 mEp->dir = (mEp->dir == TX) ? RX : TX;
2156 } while (mEp->dir != direction);
2160 spin_unlock_irqrestore(mEp->lock, flags);
2165 * ep_alloc_request: allocate a request object to use with this endpoint
2167 * Check usb_ep_alloc_request() at "usb_gadget.h" for details
2169 static struct usb_request *ep_alloc_request(struct usb_ep *ep, gfp_t gfp_flags)
2171 struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
2172 struct ci13xxx_req *mReq = NULL;
2174 trace("%p, %i", ep, gfp_flags);
2181 mReq = kzalloc(sizeof(struct ci13xxx_req), gfp_flags);
2183 INIT_LIST_HEAD(&mReq->queue);
2185 mReq->ptr = dma_pool_alloc(mEp->td_pool, gfp_flags,
2187 if (mReq->ptr == NULL) {
2193 dbg_event(_usb_addr(mEp), "ALLOC", mReq == NULL);
2195 return (mReq == NULL) ? NULL : &mReq->req;
2199 * ep_free_request: frees a request object
2201 * Check usb_ep_free_request() at "usb_gadget.h" for details
2203 static void ep_free_request(struct usb_ep *ep, struct usb_request *req)
2205 struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
2206 struct ci13xxx_req *mReq = container_of(req, struct ci13xxx_req, req);
2207 unsigned long flags;
2209 trace("%p, %p", ep, req);
2211 if (ep == NULL || req == NULL) {
2214 } else if (!list_empty(&mReq->queue)) {
2219 spin_lock_irqsave(mEp->lock, flags);
2222 dma_pool_free(mEp->td_pool, mReq->ptr, mReq->dma);
2225 dbg_event(_usb_addr(mEp), "FREE", 0);
2227 spin_unlock_irqrestore(mEp->lock, flags);
2231 * ep_queue: queues (submits) an I/O request to an endpoint
2233 * Check usb_ep_queue()* at usb_gadget.h" for details
2235 static int ep_queue(struct usb_ep *ep, struct usb_request *req,
2236 gfp_t __maybe_unused gfp_flags)
2238 struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
2239 struct ci13xxx_req *mReq = container_of(req, struct ci13xxx_req, req);
2241 unsigned long flags;
2243 trace("%p, %p, %X", ep, req, gfp_flags);
2245 if (ep == NULL || req == NULL || mEp->desc == NULL)
2248 spin_lock_irqsave(mEp->lock, flags);
2250 if (mEp->type == USB_ENDPOINT_XFER_CONTROL) {
2252 mEp = (_udc->ep0_dir == RX) ?
2253 &_udc->ep0out : &_udc->ep0in;
2254 if (!list_empty(&mEp->qh.queue)) {
2256 retval = -EOVERFLOW;
2257 warn("endpoint ctrl %X nuked", _usb_addr(mEp));
2261 /* first nuke then test link, e.g. previous status has not sent */
2262 if (!list_empty(&mReq->queue)) {
2264 err("request already in queue");
2268 if (req->length > (4 * CI13XXX_PAGE_SIZE)) {
2269 req->length = (4 * CI13XXX_PAGE_SIZE);
2271 warn("request length truncated");
2274 dbg_queue(_usb_addr(mEp), req, retval);
2277 mReq->req.status = -EINPROGRESS;
2278 mReq->req.actual = 0;
2280 retval = _hardware_enqueue(mEp, mReq);
2282 if (retval == -EALREADY) {
2283 dbg_event(_usb_addr(mEp), "QUEUE", retval);
2287 list_add_tail(&mReq->queue, &mEp->qh.queue);
2290 spin_unlock_irqrestore(mEp->lock, flags);
2295 * ep_dequeue: dequeues (cancels, unlinks) an I/O request from an endpoint
2297 * Check usb_ep_dequeue() at "usb_gadget.h" for details
2299 static int ep_dequeue(struct usb_ep *ep, struct usb_request *req)
2301 struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
2302 struct ci13xxx_req *mReq = container_of(req, struct ci13xxx_req, req);
2303 unsigned long flags;
2305 trace("%p, %p", ep, req);
2307 if (ep == NULL || req == NULL || mReq->req.status != -EALREADY ||
2308 mEp->desc == NULL || list_empty(&mReq->queue) ||
2309 list_empty(&mEp->qh.queue))
2312 spin_lock_irqsave(mEp->lock, flags);
2314 dbg_event(_usb_addr(mEp), "DEQUEUE", 0);
2316 hw_ep_flush(mEp->num, mEp->dir);
2319 list_del_init(&mReq->queue);
2321 dma_unmap_single(mEp->device, mReq->req.dma, mReq->req.length,
2322 mEp->dir ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
2326 req->status = -ECONNRESET;
2328 if (mReq->req.complete != NULL) {
2329 spin_unlock(mEp->lock);
2330 mReq->req.complete(&mEp->ep, &mReq->req);
2331 spin_lock(mEp->lock);
2334 spin_unlock_irqrestore(mEp->lock, flags);
2339 * ep_set_halt: sets the endpoint halt feature
2341 * Check usb_ep_set_halt() at "usb_gadget.h" for details
2343 static int ep_set_halt(struct usb_ep *ep, int value)
2345 struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
2346 int direction, retval = 0;
2347 unsigned long flags;
2349 trace("%p, %i", ep, value);
2351 if (ep == NULL || mEp->desc == NULL)
2354 spin_lock_irqsave(mEp->lock, flags);
2357 /* g_file_storage MS compliant but g_zero fails chapter 9 compliance */
2358 if (value && mEp->type == USB_ENDPOINT_XFER_BULK && mEp->dir == TX &&
2359 !list_empty(&mEp->qh.queue)) {
2360 spin_unlock_irqrestore(mEp->lock, flags);
2365 direction = mEp->dir;
2367 dbg_event(_usb_addr(mEp), "HALT", value);
2368 retval |= hw_ep_set_halt(mEp->num, mEp->dir, value);
2373 if (mEp->type == USB_ENDPOINT_XFER_CONTROL)
2374 mEp->dir = (mEp->dir == TX) ? RX : TX;
2376 } while (mEp->dir != direction);
2378 spin_unlock_irqrestore(mEp->lock, flags);
2383 * ep_set_wedge: sets the halt feature and ignores clear requests
2385 * Check usb_ep_set_wedge() at "usb_gadget.h" for details
2387 static int ep_set_wedge(struct usb_ep *ep)
2389 struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
2390 unsigned long flags;
2394 if (ep == NULL || mEp->desc == NULL)
2397 spin_lock_irqsave(mEp->lock, flags);
2399 dbg_event(_usb_addr(mEp), "WEDGE", 0);
2402 spin_unlock_irqrestore(mEp->lock, flags);
2404 return usb_ep_set_halt(ep);
2408 * ep_fifo_flush: flushes contents of a fifo
2410 * Check usb_ep_fifo_flush() at "usb_gadget.h" for details
2412 static void ep_fifo_flush(struct usb_ep *ep)
2414 struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
2415 unsigned long flags;
2420 err("%02X: -EINVAL", _usb_addr(mEp));
2424 spin_lock_irqsave(mEp->lock, flags);
2426 dbg_event(_usb_addr(mEp), "FFLUSH", 0);
2427 hw_ep_flush(mEp->num, mEp->dir);
2429 spin_unlock_irqrestore(mEp->lock, flags);
2433 * Endpoint-specific part of the API to the USB controller hardware
2434 * Check "usb_gadget.h" for details
2436 static const struct usb_ep_ops usb_ep_ops = {
2437 .enable = ep_enable,
2438 .disable = ep_disable,
2439 .alloc_request = ep_alloc_request,
2440 .free_request = ep_free_request,
2442 .dequeue = ep_dequeue,
2443 .set_halt = ep_set_halt,
2444 .set_wedge = ep_set_wedge,
2445 .fifo_flush = ep_fifo_flush,
2448 /******************************************************************************
2450 *****************************************************************************/
2451 static int ci13xxx_vbus_session(struct usb_gadget *_gadget, int is_active)
2453 struct ci13xxx *udc = container_of(_gadget, struct ci13xxx, gadget);
2454 unsigned long flags;
2455 int gadget_ready = 0;
2457 if (!(udc->udc_driver->flags & CI13XXX_PULLUP_ON_VBUS))
2460 spin_lock_irqsave(udc->lock, flags);
2461 udc->vbus_active = is_active;
2464 spin_unlock_irqrestore(udc->lock, flags);
2468 pm_runtime_get_sync(&_gadget->dev);
2469 hw_device_reset(udc);
2470 hw_device_state(udc->ep0out.qh.dma);
2473 if (udc->udc_driver->notify_event)
2474 udc->udc_driver->notify_event(udc,
2475 CI13XXX_CONTROLLER_STOPPED_EVENT);
2476 _gadget_stop_activity(&udc->gadget);
2477 pm_runtime_put_sync(&_gadget->dev);
2484 static int ci13xxx_wakeup(struct usb_gadget *_gadget)
2486 struct ci13xxx *udc = container_of(_gadget, struct ci13xxx, gadget);
2487 unsigned long flags;
2492 spin_lock_irqsave(udc->lock, flags);
2493 if (!udc->remote_wakeup) {
2495 dbg_trace("remote wakeup feature is not enabled\n");
2498 if (!hw_cread(CAP_PORTSC, PORTSC_SUSP)) {
2500 dbg_trace("port is not suspended\n");
2503 hw_cwrite(CAP_PORTSC, PORTSC_FPR, PORTSC_FPR);
2505 spin_unlock_irqrestore(udc->lock, flags);
2509 static int ci13xxx_vbus_draw(struct usb_gadget *_gadget, unsigned mA)
2511 struct ci13xxx *udc = container_of(_gadget, struct ci13xxx, gadget);
2513 if (udc->transceiver)
2514 return otg_set_power(udc->transceiver, mA);
2519 * Device operations part of the API to the USB controller hardware,
2520 * which don't involve endpoints (or i/o)
2521 * Check "usb_gadget.h" for details
2523 static const struct usb_gadget_ops usb_gadget_ops = {
2524 .vbus_session = ci13xxx_vbus_session,
2525 .wakeup = ci13xxx_wakeup,
2526 .vbus_draw = ci13xxx_vbus_draw,
2530 * usb_gadget_probe_driver: register a gadget driver
2531 * @driver: the driver being registered
2532 * @bind: the driver's bind callback
2534 * Check usb_gadget_probe_driver() at <linux/usb/gadget.h> for details.
2535 * Interrupts are enabled here.
2537 int usb_gadget_probe_driver(struct usb_gadget_driver *driver,
2538 int (*bind)(struct usb_gadget *))
2540 struct ci13xxx *udc = _udc;
2541 unsigned long flags;
2543 int retval = -ENOMEM;
2545 trace("%p", driver);
2547 if (driver == NULL ||
2549 driver->setup == NULL ||
2550 driver->disconnect == NULL ||
2551 driver->suspend == NULL ||
2552 driver->resume == NULL)
2554 else if (udc == NULL)
2556 else if (udc->driver != NULL)
2559 /* alloc resources */
2560 udc->qh_pool = dma_pool_create("ci13xxx_qh", &udc->gadget.dev,
2561 sizeof(struct ci13xxx_qh),
2562 64, CI13XXX_PAGE_SIZE);
2563 if (udc->qh_pool == NULL)
2566 udc->td_pool = dma_pool_create("ci13xxx_td", &udc->gadget.dev,
2567 sizeof(struct ci13xxx_td),
2568 64, CI13XXX_PAGE_SIZE);
2569 if (udc->td_pool == NULL) {
2570 dma_pool_destroy(udc->qh_pool);
2571 udc->qh_pool = NULL;
2575 spin_lock_irqsave(udc->lock, flags);
2577 info("hw_ep_max = %d", hw_ep_max);
2579 udc->gadget.dev.driver = NULL;
2582 for (i = 0; i < hw_ep_max/2; i++) {
2583 for (j = RX; j <= TX; j++) {
2584 int k = i + j * hw_ep_max/2;
2585 struct ci13xxx_ep *mEp = &udc->ci13xxx_ep[k];
2587 scnprintf(mEp->name, sizeof(mEp->name), "ep%i%s", i,
2588 (j == TX) ? "in" : "out");
2590 mEp->lock = udc->lock;
2591 mEp->device = &udc->gadget.dev;
2592 mEp->td_pool = udc->td_pool;
2594 mEp->ep.name = mEp->name;
2595 mEp->ep.ops = &usb_ep_ops;
2596 mEp->ep.maxpacket = CTRL_PAYLOAD_MAX;
2598 INIT_LIST_HEAD(&mEp->qh.queue);
2599 spin_unlock_irqrestore(udc->lock, flags);
2600 mEp->qh.ptr = dma_pool_alloc(udc->qh_pool, GFP_KERNEL,
2602 spin_lock_irqsave(udc->lock, flags);
2603 if (mEp->qh.ptr == NULL)
2606 memset(mEp->qh.ptr, 0, sizeof(*mEp->qh.ptr));
2608 /* skip ep0 out and in endpoints */
2612 list_add_tail(&mEp->ep.ep_list, &udc->gadget.ep_list);
2617 spin_unlock_irqrestore(udc->lock, flags);
2618 retval = usb_ep_enable(&udc->ep0out.ep, &ctrl_endpt_out_desc);
2621 retval = usb_ep_enable(&udc->ep0in.ep, &ctrl_endpt_in_desc);
2624 spin_lock_irqsave(udc->lock, flags);
2626 udc->gadget.ep0 = &udc->ep0in.ep;
2628 driver->driver.bus = NULL;
2629 udc->gadget.dev.driver = &driver->driver;
2631 spin_unlock_irqrestore(udc->lock, flags);
2632 retval = bind(&udc->gadget); /* MAY SLEEP */
2633 spin_lock_irqsave(udc->lock, flags);
2636 udc->gadget.dev.driver = NULL;
2640 udc->driver = driver;
2641 pm_runtime_get_sync(&udc->gadget.dev);
2642 if (udc->udc_driver->flags & CI13XXX_PULLUP_ON_VBUS) {
2643 if (udc->vbus_active) {
2644 if (udc->udc_driver->flags & CI13XXX_REGS_SHARED)
2645 hw_device_reset(udc);
2647 pm_runtime_put_sync(&udc->gadget.dev);
2652 retval = hw_device_state(udc->ep0out.qh.dma);
2654 pm_runtime_put_sync(&udc->gadget.dev);
2657 spin_unlock_irqrestore(udc->lock, flags);
2660 EXPORT_SYMBOL(usb_gadget_probe_driver);
2663 * usb_gadget_unregister_driver: unregister a gadget driver
2665 * Check usb_gadget_unregister_driver() at "usb_gadget.h" for details
2667 int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
2669 struct ci13xxx *udc = _udc;
2670 unsigned long i, flags;
2672 trace("%p", driver);
2674 if (driver == NULL ||
2675 driver->unbind == NULL ||
2676 driver->setup == NULL ||
2677 driver->disconnect == NULL ||
2678 driver->suspend == NULL ||
2679 driver->resume == NULL ||
2680 driver != udc->driver)
2683 spin_lock_irqsave(udc->lock, flags);
2685 if (!(udc->udc_driver->flags & CI13XXX_PULLUP_ON_VBUS) ||
2688 if (udc->udc_driver->notify_event)
2689 udc->udc_driver->notify_event(udc,
2690 CI13XXX_CONTROLLER_STOPPED_EVENT);
2691 _gadget_stop_activity(&udc->gadget);
2692 pm_runtime_put(&udc->gadget.dev);
2696 spin_unlock_irqrestore(udc->lock, flags);
2697 driver->unbind(&udc->gadget); /* MAY SLEEP */
2698 spin_lock_irqsave(udc->lock, flags);
2700 udc->gadget.dev.driver = NULL;
2702 /* free resources */
2703 for (i = 0; i < hw_ep_max; i++) {
2704 struct ci13xxx_ep *mEp = &udc->ci13xxx_ep[i];
2706 if (!list_empty(&mEp->ep.ep_list))
2707 list_del_init(&mEp->ep.ep_list);
2709 if (mEp->qh.ptr != NULL)
2710 dma_pool_free(udc->qh_pool, mEp->qh.ptr, mEp->qh.dma);
2713 udc->gadget.ep0 = NULL;
2716 spin_unlock_irqrestore(udc->lock, flags);
2718 if (udc->td_pool != NULL) {
2719 dma_pool_destroy(udc->td_pool);
2720 udc->td_pool = NULL;
2722 if (udc->qh_pool != NULL) {
2723 dma_pool_destroy(udc->qh_pool);
2724 udc->qh_pool = NULL;
2729 EXPORT_SYMBOL(usb_gadget_unregister_driver);
2731 /******************************************************************************
2733 *****************************************************************************/
2735 * udc_irq: global interrupt handler
2737 * This function returns IRQ_HANDLED if the IRQ has been handled
2738 * It locks access to registers
2740 static irqreturn_t udc_irq(void)
2742 struct ci13xxx *udc = _udc;
2753 spin_lock(udc->lock);
2755 if (udc->udc_driver->flags & CI13XXX_REGS_SHARED) {
2756 if (hw_cread(CAP_USBMODE, USBMODE_CM) !=
2757 USBMODE_CM_DEVICE) {
2758 spin_unlock(udc->lock);
2762 intr = hw_test_and_clear_intr_active();
2764 isr_statistics.hndl.buf[isr_statistics.hndl.idx++] = intr;
2765 isr_statistics.hndl.idx &= ISR_MASK;
2766 isr_statistics.hndl.cnt++;
2768 /* order defines priority - do NOT change it */
2769 if (USBi_URI & intr) {
2770 isr_statistics.uri++;
2771 isr_reset_handler(udc);
2773 if (USBi_PCI & intr) {
2774 isr_statistics.pci++;
2775 udc->gadget.speed = hw_port_is_high_speed() ?
2776 USB_SPEED_HIGH : USB_SPEED_FULL;
2777 if (udc->suspended) {
2778 spin_unlock(udc->lock);
2779 udc->driver->resume(&udc->gadget);
2780 spin_lock(udc->lock);
2784 if (USBi_UEI & intr)
2785 isr_statistics.uei++;
2786 if (USBi_UI & intr) {
2787 isr_statistics.ui++;
2788 isr_tr_complete_handler(udc);
2790 if (USBi_SLI & intr) {
2791 if (udc->gadget.speed != USB_SPEED_UNKNOWN) {
2793 spin_unlock(udc->lock);
2794 udc->driver->suspend(&udc->gadget);
2795 spin_lock(udc->lock);
2797 isr_statistics.sli++;
2799 retval = IRQ_HANDLED;
2801 isr_statistics.none++;
2804 spin_unlock(udc->lock);
2810 * udc_release: driver release function
2813 * Currently does nothing
2815 static void udc_release(struct device *dev)
2824 * udc_probe: parent probe must call this to initialize UDC
2825 * @dev: parent device
2826 * @regs: registers base address
2827 * @name: driver name
2829 * This function returns an error code
2830 * No interrupts active, the IRQ has not been requested yet
2831 * Kernel assumes 32-bit DMA operations by default, no need to dma_set_mask
2833 static int udc_probe(struct ci13xxx_udc_driver *driver, struct device *dev,
2836 struct ci13xxx *udc;
2839 trace("%p, %p, %p", dev, regs, name);
2841 if (dev == NULL || regs == NULL || driver == NULL ||
2842 driver->name == NULL)
2845 udc = kzalloc(sizeof(struct ci13xxx), GFP_KERNEL);
2849 udc->lock = &udc_lock;
2851 udc->udc_driver = driver;
2853 udc->gadget.ops = &usb_gadget_ops;
2854 udc->gadget.speed = USB_SPEED_UNKNOWN;
2855 udc->gadget.is_dualspeed = 1;
2856 udc->gadget.is_otg = 0;
2857 udc->gadget.name = driver->name;
2859 INIT_LIST_HEAD(&udc->gadget.ep_list);
2860 udc->gadget.ep0 = NULL;
2862 dev_set_name(&udc->gadget.dev, "gadget");
2863 udc->gadget.dev.dma_mask = dev->dma_mask;
2864 udc->gadget.dev.coherent_dma_mask = dev->coherent_dma_mask;
2865 udc->gadget.dev.parent = dev;
2866 udc->gadget.dev.release = udc_release;
2868 retval = hw_device_init(regs);
2872 udc->transceiver = otg_get_transceiver();
2874 if (udc->udc_driver->flags & CI13XXX_REQUIRE_TRANSCEIVER) {
2875 if (udc->transceiver == NULL) {
2881 if (!(udc->udc_driver->flags & CI13XXX_REGS_SHARED)) {
2882 retval = hw_device_reset(udc);
2884 goto put_transceiver;
2887 retval = device_register(&udc->gadget.dev);
2889 put_device(&udc->gadget.dev);
2890 goto put_transceiver;
2893 #ifdef CONFIG_USB_GADGET_DEBUG_FILES
2894 retval = dbg_create_files(&udc->gadget.dev);
2899 if (udc->transceiver) {
2900 retval = otg_set_peripheral(udc->transceiver, &udc->gadget);
2904 pm_runtime_no_callbacks(&udc->gadget.dev);
2905 pm_runtime_enable(&udc->gadget.dev);
2910 err("error = %i", retval);
2912 #ifdef CONFIG_USB_GADGET_DEBUG_FILES
2913 dbg_remove_files(&udc->gadget.dev);
2916 device_unregister(&udc->gadget.dev);
2918 if (udc->transceiver)
2919 otg_put_transceiver(udc->transceiver);
2927 * udc_remove: parent remove must call this to remove UDC
2929 * No interrupts active, the IRQ has been released
2931 static void udc_remove(void)
2933 struct ci13xxx *udc = _udc;
2940 if (udc->transceiver) {
2941 otg_set_peripheral(udc->transceiver, &udc->gadget);
2942 otg_put_transceiver(udc->transceiver);
2944 #ifdef CONFIG_USB_GADGET_DEBUG_FILES
2945 dbg_remove_files(&udc->gadget.dev);
2947 device_unregister(&udc->gadget.dev);