drivers/usb/gadget/langwell_udc.c

   1 /*
   2  * Intel Langwell USB Device Controller driver
   3  * Copyright (C) 2008-2009, Intel Corporation.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms and conditions of the GNU General Public License,
   7  * version 2, as published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along with
  15  * this program; if not, write to the Free Software Foundation, Inc.,
  16  * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  17  *
  18  */
  19
  20
  21 /* #undef       DEBUG */
  22 /* #undef       VERBOSE */
  23
  24 #if defined(CONFIG_USB_LANGWELL_OTG)
  25 #define OTG_TRANSCEIVER
  26 #endif
  27
  28
  29 #include <linux/module.h>
  30 #include <linux/pci.h>
  31 #include <linux/dma-mapping.h>
  32 #include <linux/kernel.h>
  33 #include <linux/delay.h>
  34 #include <linux/ioport.h>
  35 #include <linux/sched.h>
  36 #include <linux/slab.h>
  37 #include <linux/errno.h>
  38 #include <linux/init.h>
  39 #include <linux/timer.h>
  40 #include <linux/list.h>
  41 #include <linux/interrupt.h>
  42 #include <linux/moduleparam.h>
  43 #include <linux/device.h>
  44 #include <linux/usb/ch9.h>
  45 #include <linux/usb/gadget.h>
  46 #include <linux/usb/otg.h>
  47 #include <linux/pm.h>
  48 #include <linux/io.h>
  49 #include <linux/irq.h>
  50 #include <asm/system.h>
  51 #include <asm/unaligned.h>
  52
  53 #include "langwell_udc.h"
  54
  55
  56 #define DRIVER_DESC             "Intel Langwell USB Device Controller driver"
  57 #define DRIVER_VERSION          "16 May 2009"
  58
  59 static const char driver_name[] = "langwell_udc";
  60 static const char driver_desc[] = DRIVER_DESC;
  61
  62
  63 /* controller device global variable */
  64 static struct langwell_udc      *the_controller;
  65
  66 /* for endpoint 0 operations */
  67 static const struct usb_endpoint_descriptor
  68 langwell_ep0_desc = {
  69         .bLength =              USB_DT_ENDPOINT_SIZE,
  70         .bDescriptorType =      USB_DT_ENDPOINT,
  71         .bEndpointAddress =     0,
  72         .bmAttributes =         USB_ENDPOINT_XFER_CONTROL,
  73         .wMaxPacketSize =       EP0_MAX_PKT_SIZE,
  74 };
  75
  76
  77 /*-------------------------------------------------------------------------*/
  78 /* debugging */
  79
  80 #ifdef  DEBUG
  81 #define DBG(dev, fmt, args...) \
  82         pr_debug("%s %s: " fmt , driver_name, \
  83                         pci_name(dev->pdev), ## args)
  84 #else
  85 #define DBG(dev, fmt, args...) \
  86         do { } while (0)
  87 #endif /* DEBUG */
  88
  89
  90 #ifdef  VERBOSE
  91 #define VDBG DBG
  92 #else
  93 #define VDBG(dev, fmt, args...) \
  94         do { } while (0)
  95 #endif  /* VERBOSE */
  96
  97
  98 #define ERROR(dev, fmt, args...) \
  99         pr_err("%s %s: " fmt , driver_name, \
 100                         pci_name(dev->pdev), ## args)
 101
 102 #define WARNING(dev, fmt, args...) \
 103         pr_warning("%s %s: " fmt , driver_name, \
 104                         pci_name(dev->pdev), ## args)
 105
 106 #define INFO(dev, fmt, args...) \
 107         pr_info("%s %s: " fmt , driver_name, \
 108                         pci_name(dev->pdev), ## args)
 109
 110
 111 #ifdef  VERBOSE
 112 static inline void print_all_registers(struct langwell_udc *dev)
 113 {
 114         int     i;
 115
 116         /* Capability Registers */
 117         printk(KERN_DEBUG "Capability Registers (offset: "
 118                         "0x%04x, length: 0x%08x)\n",
 119                         CAP_REG_OFFSET,
 120                         (u32)sizeof(struct langwell_cap_regs));
 121         printk(KERN_DEBUG "caplength=0x%02x\n",
 122                         readb(&dev->cap_regs->caplength));
 123         printk(KERN_DEBUG "hciversion=0x%04x\n",
 124                         readw(&dev->cap_regs->hciversion));
 125         printk(KERN_DEBUG "hcsparams=0x%08x\n",
 126                         readl(&dev->cap_regs->hcsparams));
 127         printk(KERN_DEBUG "hccparams=0x%08x\n",
 128                         readl(&dev->cap_regs->hccparams));
 129         printk(KERN_DEBUG "dciversion=0x%04x\n",
 130                         readw(&dev->cap_regs->dciversion));
 131         printk(KERN_DEBUG "dccparams=0x%08x\n",
 132                         readl(&dev->cap_regs->dccparams));
 133
 134         /* Operational Registers */
 135         printk(KERN_DEBUG "Operational Registers (offset: "
 136                         "0x%04x, length: 0x%08x)\n",
 137                         OP_REG_OFFSET,
 138                         (u32)sizeof(struct langwell_op_regs));
 139         printk(KERN_DEBUG "extsts=0x%08x\n",
 140                         readl(&dev->op_regs->extsts));
 141         printk(KERN_DEBUG "extintr=0x%08x\n",
 142                         readl(&dev->op_regs->extintr));
 143         printk(KERN_DEBUG "usbcmd=0x%08x\n",
 144                         readl(&dev->op_regs->usbcmd));
 145         printk(KERN_DEBUG "usbsts=0x%08x\n",
 146                         readl(&dev->op_regs->usbsts));
 147         printk(KERN_DEBUG "usbintr=0x%08x\n",
 148                         readl(&dev->op_regs->usbintr));
 149         printk(KERN_DEBUG "frindex=0x%08x\n",
 150                         readl(&dev->op_regs->frindex));
 151         printk(KERN_DEBUG "ctrldssegment=0x%08x\n",
 152                         readl(&dev->op_regs->ctrldssegment));
 153         printk(KERN_DEBUG "deviceaddr=0x%08x\n",
 154                         readl(&dev->op_regs->deviceaddr));
 155         printk(KERN_DEBUG "endpointlistaddr=0x%08x\n",
 156                         readl(&dev->op_regs->endpointlistaddr));
 157         printk(KERN_DEBUG "ttctrl=0x%08x\n",
 158                         readl(&dev->op_regs->ttctrl));
 159         printk(KERN_DEBUG "burstsize=0x%08x\n",
 160                         readl(&dev->op_regs->burstsize));
 161         printk(KERN_DEBUG "txfilltuning=0x%08x\n",
 162                         readl(&dev->op_regs->txfilltuning));
 163         printk(KERN_DEBUG "txttfilltuning=0x%08x\n",
 164                         readl(&dev->op_regs->txttfilltuning));
 165         printk(KERN_DEBUG "ic_usb=0x%08x\n",
 166                         readl(&dev->op_regs->ic_usb));
 167         printk(KERN_DEBUG "ulpi_viewport=0x%08x\n",
 168                         readl(&dev->op_regs->ulpi_viewport));
 169         printk(KERN_DEBUG "configflag=0x%08x\n",
 170                         readl(&dev->op_regs->configflag));
 171         printk(KERN_DEBUG "portsc1=0x%08x\n",
 172                         readl(&dev->op_regs->portsc1));
 173         printk(KERN_DEBUG "devlc=0x%08x\n",
 174                         readl(&dev->op_regs->devlc));
 175         printk(KERN_DEBUG "otgsc=0x%08x\n",
 176                         readl(&dev->op_regs->otgsc));
 177         printk(KERN_DEBUG "usbmode=0x%08x\n",
 178                         readl(&dev->op_regs->usbmode));
 179         printk(KERN_DEBUG "endptnak=0x%08x\n",
 180                         readl(&dev->op_regs->endptnak));
 181         printk(KERN_DEBUG "endptnaken=0x%08x\n",
 182                         readl(&dev->op_regs->endptnaken));
 183         printk(KERN_DEBUG "endptsetupstat=0x%08x\n",
 184                         readl(&dev->op_regs->endptsetupstat));
 185         printk(KERN_DEBUG "endptprime=0x%08x\n",
 186                         readl(&dev->op_regs->endptprime));
 187         printk(KERN_DEBUG "endptflush=0x%08x\n",
 188                         readl(&dev->op_regs->endptflush));
 189         printk(KERN_DEBUG "endptstat=0x%08x\n",
 190                         readl(&dev->op_regs->endptstat));
 191         printk(KERN_DEBUG "endptcomplete=0x%08x\n",
 192                         readl(&dev->op_regs->endptcomplete));
 193
 194         for (i = 0; i < dev->ep_max / 2; i++) {
 195                 printk(KERN_DEBUG "endptctrl[%d]=0x%08x\n",
 196                                 i, readl(&dev->op_regs->endptctrl[i]));
 197         }
 198 }
 199 #endif /* VERBOSE */
 200
 201
 202 /*-------------------------------------------------------------------------*/
 203
 204 #define DIR_STRING(bAddress)    (((bAddress) & USB_DIR_IN) ? "in" : "out")
 205
 206 #define is_in(ep)       (((ep)->ep_num == 0) ? ((ep)->dev->ep0_dir == \
 207                         USB_DIR_IN) : ((ep)->desc->bEndpointAddress \
 208                         & USB_DIR_IN) == USB_DIR_IN)
 209
 210
 211 #ifdef  DEBUG
 212 static char *type_string(u8 bmAttributes)
 213 {
 214         switch ((bmAttributes) & USB_ENDPOINT_XFERTYPE_MASK) {
 215         case USB_ENDPOINT_XFER_BULK:
 216                 return "bulk";
 217         case USB_ENDPOINT_XFER_ISOC:
 218                 return "iso";
 219         case USB_ENDPOINT_XFER_INT:
 220                 return "int";
 221         };
 222
 223         return "control";
 224 }
 225 #endif
 226
 227
 228 /* configure endpoint control registers */
 229 static void ep_reset(struct langwell_ep *ep, unsigned char ep_num,
 230                 unsigned char is_in, unsigned char ep_type)
 231 {
 232         struct langwell_udc     *dev;
 233         u32                     endptctrl;
 234
 235         dev = ep->dev;
 236         VDBG(dev, "---> %s()\n", __func__);
 237
 238         endptctrl = readl(&dev->op_regs->endptctrl[ep_num]);
 239         if (is_in) {    /* TX */
 240                 if (ep_num)
 241                         endptctrl |= EPCTRL_TXR;
 242                 endptctrl |= EPCTRL_TXE;
 243                 endptctrl |= ep_type << EPCTRL_TXT_SHIFT;
 244         } else {        /* RX */
 245                 if (ep_num)
 246                         endptctrl |= EPCTRL_RXR;
 247                 endptctrl |= EPCTRL_RXE;
 248                 endptctrl |= ep_type << EPCTRL_RXT_SHIFT;
 249         }
 250
 251         writel(endptctrl, &dev->op_regs->endptctrl[ep_num]);
 252
 253         VDBG(dev, "<--- %s()\n", __func__);
 254 }
 255
 256
 257 /* reset ep0 dQH and endptctrl */
 258 static void ep0_reset(struct langwell_udc *dev)
 259 {
 260         struct langwell_ep      *ep;
 261         int                     i;
 262
 263         VDBG(dev, "---> %s()\n", __func__);
 264
 265         /* ep0 in and out */
 266         for (i = 0; i < 2; i++) {
 267                 ep = &dev->ep[i];
 268                 ep->dev = dev;
 269
 270                 /* ep0 dQH */
 271                 ep->dqh = &dev->ep_dqh[i];
 272
 273                 /* configure ep0 endpoint capabilities in dQH */
 274                 ep->dqh->dqh_ios = 1;
 275                 ep->dqh->dqh_mpl = EP0_MAX_PKT_SIZE;
 276
 277                 /* FIXME: enable ep0-in HW zero length termination select */
 278                 if (is_in(ep))
 279                         ep->dqh->dqh_zlt = 0;
 280                 ep->dqh->dqh_mult = 0;
 281
 282                 /* configure ep0 control registers */
 283                 ep_reset(&dev->ep[0], 0, i, USB_ENDPOINT_XFER_CONTROL);
 284         }
 285
 286         VDBG(dev, "<--- %s()\n", __func__);
 287         return;
 288 }
 289
 290
 291 /*-------------------------------------------------------------------------*/
 292
 293 /* endpoints operations */
 294
 295 /* configure endpoint, making it usable */
 296 static int langwell_ep_enable(struct usb_ep *_ep,
 297                 const struct usb_endpoint_descriptor *desc)
 298 {
 299         struct langwell_udc     *dev;
 300         struct langwell_ep      *ep;
 301         u16                     max = 0;
 302         unsigned long           flags;
 303         int                     retval = 0;
 304         unsigned char           zlt, ios = 0, mult = 0;
 305
 306         ep = container_of(_ep, struct langwell_ep, ep);
 307         dev = ep->dev;
 308         VDBG(dev, "---> %s()\n", __func__);
 309
 310         if (!_ep || !desc || ep->desc
 311                         || desc->bDescriptorType != USB_DT_ENDPOINT)
 312                 return -EINVAL;
 313
 314         if (!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN)
 315                 return -ESHUTDOWN;
 316
 317         max = le16_to_cpu(desc->wMaxPacketSize);
 318
 319         /*
 320          * disable HW zero length termination select
 321          * driver handles zero length packet through req->req.zero
 322          */
 323         zlt = 1;
 324
 325         /*
 326          * sanity check type, direction, address, and then
 327          * initialize the endpoint capabilities fields in dQH
 328          */
 329         switch (desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK) {
 330         case USB_ENDPOINT_XFER_CONTROL:
 331                 ios = 1;
 332                 break;
 333         case USB_ENDPOINT_XFER_BULK:
 334                 if ((dev->gadget.speed == USB_SPEED_HIGH
 335                                         && max != 512)
 336                                 || (dev->gadget.speed == USB_SPEED_FULL
 337                                         && max > 64)) {
 338                         goto done;
 339                 }
 340                 break;
 341         case USB_ENDPOINT_XFER_INT:
 342                 if (strstr(ep->ep.name, "-iso")) /* bulk is ok */
 343                         goto done;
 344
 345                 switch (dev->gadget.speed) {
 346                 case USB_SPEED_HIGH:
 347                         if (max <= 1024)
 348                                 break;
 349                 case USB_SPEED_FULL:
 350                         if (max <= 64)
 351                                 break;
 352                 default:
 353                         if (max <= 8)
 354                                 break;
 355                         goto done;
 356                 }
 357                 break;
 358         case USB_ENDPOINT_XFER_ISOC:
 359                 if (strstr(ep->ep.name, "-bulk")
 360                                 || strstr(ep->ep.name, "-int"))
 361                         goto done;
 362
 363                 switch (dev->gadget.speed) {
 364                 case USB_SPEED_HIGH:
 365                         if (max <= 1024)
 366                                 break;
 367                 case USB_SPEED_FULL:
 368                         if (max <= 1023)
 369                                 break;
 370                 default:
 371                         goto done;
 372                 }
 373                 /*
 374                  * FIXME:
 375                  * calculate transactions needed for high bandwidth iso
 376                  */
 377                 mult = (unsigned char)(1 + ((max >> 11) & 0x03));
 378                 max = max & 0x8ff;      /* bit 0~10 */
 379                 /* 3 transactions at most */
 380                 if (mult > 3)
 381                         goto done;
 382                 break;
 383         default:
 384                 goto done;
 385         }
 386
 387         spin_lock_irqsave(&dev->lock, flags);
 388
 389         /* configure endpoint capabilities in dQH */
 390         ep->dqh->dqh_ios = ios;
 391         ep->dqh->dqh_mpl = cpu_to_le16(max);
 392         ep->dqh->dqh_zlt = zlt;
 393         ep->dqh->dqh_mult = mult;
 394
 395         ep->ep.maxpacket = max;
 396         ep->desc = desc;
 397         ep->stopped = 0;
 398         ep->ep_num = desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK;
 399
 400         /* ep_type */
 401         ep->ep_type = desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK;
 402
 403         /* configure endpoint control registers */
 404         ep_reset(ep, ep->ep_num, is_in(ep), ep->ep_type);
 405
 406         DBG(dev, "enabled %s (ep%d%s-%s), max %04x\n",
 407                         _ep->name,
 408                         ep->ep_num,
 409                         DIR_STRING(desc->bEndpointAddress),
 410                         type_string(desc->bmAttributes),
 411                         max);
 412
 413         spin_unlock_irqrestore(&dev->lock, flags);
 414 done:
 415         VDBG(dev, "<--- %s()\n", __func__);
 416         return retval;
 417 }
 418
 419
 420 /*-------------------------------------------------------------------------*/
 421
 422 /* retire a request */
 423 static void done(struct langwell_ep *ep, struct langwell_request *req,
 424                 int status)
 425 {
 426         struct langwell_udc     *dev = ep->dev;
 427         unsigned                stopped = ep->stopped;
 428         struct langwell_dtd     *curr_dtd, *next_dtd;
 429         int                     i;
 430
 431         VDBG(dev, "---> %s()\n", __func__);
 432
 433         /* remove the req from ep->queue */
 434         list_del_init(&req->queue);
 435
 436         if (req->req.status == -EINPROGRESS)
 437                 req->req.status = status;
 438         else
 439                 status = req->req.status;
 440
 441         /* free dTD for the request */
 442         next_dtd = req->head;
 443         for (i = 0; i < req->dtd_count; i++) {
 444                 curr_dtd = next_dtd;
 445                 if (i != req->dtd_count - 1)
 446                         next_dtd = curr_dtd->next_dtd_virt;
 447                 dma_pool_free(dev->dtd_pool, curr_dtd, curr_dtd->dtd_dma);
 448         }
 449
 450         if (req->mapped) {
 451                 dma_unmap_single(&dev->pdev->dev, req->req.dma, req->req.length,
 452                         is_in(ep) ? PCI_DMA_TODEVICE : PCI_DMA_FROMDEVICE);
 453                 req->req.dma = DMA_ADDR_INVALID;
 454                 req->mapped = 0;
 455         } else
 456                 dma_sync_single_for_cpu(&dev->pdev->dev, req->req.dma,
 457                                 req->req.length,
 458                                 is_in(ep) ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
 459
 460         if (status != -ESHUTDOWN)
 461                 DBG(dev, "complete %s, req %p, stat %d, len %u/%u\n",
 462                         ep->ep.name, &req->req, status,
 463                         req->req.actual, req->req.length);
 464
 465         /* don't modify queue heads during completion callback */
 466         ep->stopped = 1;
 467
 468         spin_unlock(&dev->lock);
 469         /* complete routine from gadget driver */
 470         if (req->req.complete)
 471                 req->req.complete(&ep->ep, &req->req);
 472
 473         spin_lock(&dev->lock);
 474         ep->stopped = stopped;
 475
 476         VDBG(dev, "<--- %s()\n", __func__);
 477 }
 478
 479
 480 static void langwell_ep_fifo_flush(struct usb_ep *_ep);
 481
 482 /* delete all endpoint requests, called with spinlock held */
 483 static void nuke(struct langwell_ep *ep, int status)
 484 {
 485         /* called with spinlock held */
 486         ep->stopped = 1;
 487
 488         /* endpoint fifo flush */
 489         if (&ep->ep && ep->desc)
 490                 langwell_ep_fifo_flush(&ep->ep);
 491
 492         while (!list_empty(&ep->queue)) {
 493                 struct langwell_request *req = NULL;
 494                 req = list_entry(ep->queue.next, struct langwell_request,
 495                                 queue);
 496                 done(ep, req, status);
 497         }
 498 }
 499
 500
 501 /*-------------------------------------------------------------------------*/
 502
 503 /* endpoint is no longer usable */
 504 static int langwell_ep_disable(struct usb_ep *_ep)
 505 {
 506         struct langwell_ep      *ep;
 507         unsigned long           flags;
 508         struct langwell_udc     *dev;
 509         int                     ep_num;
 510         u32                     endptctrl;
 511
 512         ep = container_of(_ep, struct langwell_ep, ep);
 513         dev = ep->dev;
 514         VDBG(dev, "---> %s()\n", __func__);
 515
 516         if (!_ep || !ep->desc)
 517                 return -EINVAL;
 518
 519         spin_lock_irqsave(&dev->lock, flags);
 520
 521         /* disable endpoint control register */
 522         ep_num = ep->ep_num;
 523         endptctrl = readl(&dev->op_regs->endptctrl[ep_num]);
 524         if (is_in(ep))
 525                 endptctrl &= ~EPCTRL_TXE;
 526         else
 527                 endptctrl &= ~EPCTRL_RXE;
 528         writel(endptctrl, &dev->op_regs->endptctrl[ep_num]);
 529
 530         /* nuke all pending requests (does flush) */
 531         nuke(ep, -ESHUTDOWN);
 532
 533         ep->desc = NULL;
 534         ep->stopped = 1;
 535
 536         spin_unlock_irqrestore(&dev->lock, flags);
 537
 538         DBG(dev, "disabled %s\n", _ep->name);
 539         VDBG(dev, "<--- %s()\n", __func__);
 540
 541         return 0;
 542 }
 543
 544
 545 /* allocate a request object to use with this endpoint */
 546 static struct usb_request *langwell_alloc_request(struct usb_ep *_ep,
 547                 gfp_t gfp_flags)
 548 {
 549         struct langwell_ep      *ep;
 550         struct langwell_udc     *dev;
 551         struct langwell_request *req = NULL;
 552
 553         if (!_ep)
 554                 return NULL;
 555
 556         ep = container_of(_ep, struct langwell_ep, ep);
 557         dev = ep->dev;
 558         VDBG(dev, "---> %s()\n", __func__);
 559
 560         req = kzalloc(sizeof(*req), gfp_flags);
 561         if (!req)
 562                 return NULL;
 563
 564         req->req.dma = DMA_ADDR_INVALID;
 565         INIT_LIST_HEAD(&req->queue);
 566
 567         VDBG(dev, "alloc request for %s\n", _ep->name);
 568         VDBG(dev, "<--- %s()\n", __func__);
 569         return &req->req;
 570 }
 571
 572
 573 /* free a request object */
 574 static void langwell_free_request(struct usb_ep *_ep,
 575                 struct usb_request *_req)
 576 {
 577         struct langwell_ep      *ep;
 578         struct langwell_udc     *dev;
 579         struct langwell_request *req = NULL;
 580
 581         ep = container_of(_ep, struct langwell_ep, ep);
 582         dev = ep->dev;
 583         VDBG(dev, "---> %s()\n", __func__);
 584
 585         if (!_ep || !_req)
 586                 return;
 587
 588         req = container_of(_req, struct langwell_request, req);
 589         WARN_ON(!list_empty(&req->queue));
 590
 591         if (_req)
 592                 kfree(req);
 593
 594         VDBG(dev, "free request for %s\n", _ep->name);
 595         VDBG(dev, "<--- %s()\n", __func__);
 596 }
 597
 598
 599 /*-------------------------------------------------------------------------*/
 600
 601 /* queue dTD and PRIME endpoint */
 602 static int queue_dtd(struct langwell_ep *ep, struct langwell_request *req)
 603 {
 604         u32                     bit_mask, usbcmd, endptstat, dtd_dma;
 605         u8                      dtd_status;
 606         int                     i;
 607         struct langwell_dqh     *dqh;
 608         struct langwell_udc     *dev;
 609
 610         dev = ep->dev;
 611         VDBG(dev, "---> %s()\n", __func__);
 612
 613         i = ep->ep_num * 2 + is_in(ep);
 614         dqh = &dev->ep_dqh[i];
 615
 616         if (ep->ep_num)
 617                 VDBG(dev, "%s\n", ep->name);
 618         else
 619                 /* ep0 */
 620                 VDBG(dev, "%s-%s\n", ep->name, is_in(ep) ? "in" : "out");
 621
 622         VDBG(dev, "ep_dqh[%d] addr: 0x%08x\n", i, (u32)&(dev->ep_dqh[i]));
 623
 624         bit_mask = is_in(ep) ?
 625                 (1 << (ep->ep_num + 16)) : (1 << (ep->ep_num));
 626
 627         VDBG(dev, "bit_mask = 0x%08x\n", bit_mask);
 628
 629         /* check if the pipe is empty */
 630         if (!(list_empty(&ep->queue))) {
 631                 /* add dTD to the end of linked list */
 632                 struct langwell_request *lastreq;
 633                 lastreq = list_entry(ep->queue.prev,
 634                                 struct langwell_request, queue);
 635
 636                 lastreq->tail->dtd_next =
 637                         cpu_to_le32(req->head->dtd_dma & DTD_NEXT_MASK);
 638
 639                 /* read prime bit, if 1 goto out */
 640                 if (readl(&dev->op_regs->endptprime) & bit_mask)
 641                         goto out;
 642
 643                 do {
 644                         /* set ATDTW bit in USBCMD */
 645                         usbcmd = readl(&dev->op_regs->usbcmd);
 646                         writel(usbcmd | CMD_ATDTW, &dev->op_regs->usbcmd);
 647
 648                         /* read correct status bit */
 649                         endptstat = readl(&dev->op_regs->endptstat) & bit_mask;
 650
 651                 } while (!(readl(&dev->op_regs->usbcmd) & CMD_ATDTW));
 652
 653                 /* write ATDTW bit to 0 */
 654                 usbcmd = readl(&dev->op_regs->usbcmd);
 655                 writel(usbcmd & ~CMD_ATDTW, &dev->op_regs->usbcmd);
 656
 657                 if (endptstat)
 658                         goto out;
 659         }
 660
 661         /* write dQH next pointer and terminate bit to 0 */
 662         dtd_dma = req->head->dtd_dma & DTD_NEXT_MASK;
 663         dqh->dtd_next = cpu_to_le32(dtd_dma);
 664
 665         /* clear active and halt bit */
 666         dtd_status = (u8) ~(DTD_STS_ACTIVE | DTD_STS_HALTED);
 667         dqh->dtd_status &= dtd_status;
 668         VDBG(dev, "dqh->dtd_status = 0x%x\n", dqh->dtd_status);
 669
 670         /* write 1 to endptprime register to PRIME endpoint */
 671         bit_mask = is_in(ep) ? (1 << (ep->ep_num + 16)) : (1 << ep->ep_num);
 672         VDBG(dev, "endprime bit_mask = 0x%08x\n", bit_mask);
 673         writel(bit_mask, &dev->op_regs->endptprime);
 674 out:
 675         VDBG(dev, "<--- %s()\n", __func__);
 676         return 0;
 677 }
 678
 679
 680 /* fill in the dTD structure to build a transfer descriptor */
 681 static struct langwell_dtd *build_dtd(struct langwell_request *req,
 682                 unsigned *length, dma_addr_t *dma, int *is_last)
 683 {
 684         u32                      buf_ptr;
 685         struct langwell_dtd     *dtd;
 686         struct langwell_udc     *dev;
 687         int                     i;
 688
 689         dev = req->ep->dev;
 690         VDBG(dev, "---> %s()\n", __func__);
 691
 692         /* the maximum transfer length, up to 16k bytes */
 693         *length = min(req->req.length - req->req.actual,
 694                         (unsigned)DTD_MAX_TRANSFER_LENGTH);
 695
 696         /* create dTD dma_pool resource */
 697         dtd = dma_pool_alloc(dev->dtd_pool, GFP_KERNEL, dma);
 698         if (dtd == NULL)
 699                 return dtd;
 700         dtd->dtd_dma = *dma;
 701
 702         /* initialize buffer page pointers */
 703         buf_ptr = (u32)(req->req.dma + req->req.actual);
 704         for (i = 0; i < 5; i++)
 705                 dtd->dtd_buf[i] = cpu_to_le32(buf_ptr + i * PAGE_SIZE);
 706
 707         req->req.actual += *length;
 708
 709         /* fill in total bytes with transfer size */
 710         dtd->dtd_total = cpu_to_le16(*length);
 711         VDBG(dev, "dtd->dtd_total = %d\n", dtd->dtd_total);
 712
 713         /* set is_last flag if req->req.zero is set or not */
 714         if (req->req.zero) {
 715                 if (*length == 0 || (*length % req->ep->ep.maxpacket) != 0)
 716                         *is_last = 1;
 717                 else
 718                         *is_last = 0;
 719         } else if (req->req.length == req->req.actual) {
 720                 *is_last = 1;
 721         } else
 722                 *is_last = 0;
 723
 724         if (*is_last == 0)
 725                 VDBG(dev, "multi-dtd request!\n");
 726
 727         /* set interrupt on complete bit for the last dTD */
 728         if (*is_last && !req->req.no_interrupt)
 729                 dtd->dtd_ioc = 1;
 730
 731         /* set multiplier override 0 for non-ISO and non-TX endpoint */
 732         dtd->dtd_multo = 0;
 733
 734         /* set the active bit of status field to 1 */
 735         dtd->dtd_status = DTD_STS_ACTIVE;
 736         VDBG(dev, "dtd->dtd_status = 0x%02x\n", dtd->dtd_status);
 737
 738         VDBG(dev, "length = %d, dma addr= 0x%08x\n", *length, (int)*dma);
 739         VDBG(dev, "<--- %s()\n", __func__);
 740         return dtd;
 741 }
 742
 743
 744 /* generate dTD linked list for a request */
 745 static int req_to_dtd(struct langwell_request *req)
 746 {
 747         unsigned                count;
 748         int                     is_last, is_first = 1;
 749         struct langwell_dtd     *dtd, *last_dtd = NULL;
 750         struct langwell_udc     *dev;
 751         dma_addr_t              dma;
 752
 753         dev = req->ep->dev;
 754         VDBG(dev, "---> %s()\n", __func__);
 755         do {
 756                 dtd = build_dtd(req, &count, &dma, &is_last);
 757                 if (dtd == NULL)
 758                         return -ENOMEM;
 759
 760                 if (is_first) {
 761                         is_first = 0;
 762                         req->head = dtd;
 763                 } else {
 764                         last_dtd->dtd_next = cpu_to_le32(dma);
 765                         last_dtd->next_dtd_virt = dtd;
 766                 }
 767                 last_dtd = dtd;
 768                 req->dtd_count++;
 769         } while (!is_last);
 770
 771         /* set terminate bit to 1 for the last dTD */
 772         dtd->dtd_next = DTD_TERM;
 773
 774         req->tail = dtd;
 775
 776         VDBG(dev, "<--- %s()\n", __func__);
 777         return 0;
 778 }
 779
 780 /*-------------------------------------------------------------------------*/
 781
 782 /* queue (submits) an I/O requests to an endpoint */
 783 static int langwell_ep_queue(struct usb_ep *_ep, struct usb_request *_req,
 784                 gfp_t gfp_flags)
 785 {
 786         struct langwell_request *req;
 787         struct langwell_ep      *ep;
 788         struct langwell_udc     *dev;
 789         unsigned long           flags;
 790         int                     is_iso = 0, zlflag = 0;
 791
 792         /* always require a cpu-view buffer */
 793         req = container_of(_req, struct langwell_request, req);
 794         ep = container_of(_ep, struct langwell_ep, ep);
 795
 796         if (!_req || !_req->complete || !_req->buf
 797                         || !list_empty(&req->queue)) {
 798                 return -EINVAL;
 799         }
 800
 801         if (unlikely(!_ep || !ep->desc))
 802                 return -EINVAL;
 803
 804         dev = ep->dev;
 805         req->ep = ep;
 806         VDBG(dev, "---> %s()\n", __func__);
 807
 808         if (ep->desc->bmAttributes == USB_ENDPOINT_XFER_ISOC) {
 809                 if (req->req.length > ep->ep.maxpacket)
 810                         return -EMSGSIZE;
 811                 is_iso = 1;
 812         }
 813
 814         if (unlikely(!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN))
 815                 return -ESHUTDOWN;
 816
 817         /* set up dma mapping in case the caller didn't */
 818         if (_req->dma == DMA_ADDR_INVALID) {
 819                 /* WORKAROUND: WARN_ON(size == 0) */
 820                 if (_req->length == 0) {
 821                         VDBG(dev, "req->length: 0->1\n");
 822                         zlflag = 1;
 823                         _req->length++;
 824                 }
 825
 826                 _req->dma = dma_map_single(&dev->pdev->dev,
 827                                 _req->buf, _req->length,
 828                                 is_in(ep) ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
 829                 if (zlflag && (_req->length == 1)) {
 830                         VDBG(dev, "req->length: 1->0\n");
 831                         zlflag = 0;
 832                         _req->length = 0;
 833                 }
 834
 835                 req->mapped = 1;
 836                 VDBG(dev, "req->mapped = 1\n");
 837         } else {
 838                 dma_sync_single_for_device(&dev->pdev->dev,
 839                                 _req->dma, _req->length,
 840                                 is_in(ep) ?  DMA_TO_DEVICE : DMA_FROM_DEVICE);
 841                 req->mapped = 0;
 842                 VDBG(dev, "req->mapped = 0\n");
 843         }
 844
 845         DBG(dev, "%s queue req %p, len %u, buf %p, dma 0x%08x\n",
 846                         _ep->name,
 847                         _req, _req->length, _req->buf, _req->dma);
 848
 849         _req->status = -EINPROGRESS;
 850         _req->actual = 0;
 851         req->dtd_count = 0;
 852
 853         spin_lock_irqsave(&dev->lock, flags);
 854
 855         /* build and put dTDs to endpoint queue */
 856         if (!req_to_dtd(req)) {
 857                 queue_dtd(ep, req);
 858         } else {
 859                 spin_unlock_irqrestore(&dev->lock, flags);
 860                 return -ENOMEM;
 861         }
 862
 863         /* update ep0 state */
 864         if (ep->ep_num == 0)
 865                 dev->ep0_state = DATA_STATE_XMIT;
 866
 867         if (likely(req != NULL)) {
 868                 list_add_tail(&req->queue, &ep->queue);
 869                 VDBG(dev, "list_add_tail() \n");
 870         }
 871
 872         spin_unlock_irqrestore(&dev->lock, flags);
 873
 874         VDBG(dev, "<--- %s()\n", __func__);
 875         return 0;
 876 }
 877
 878
 879 /* dequeue (cancels, unlinks) an I/O request from an endpoint */
 880 static int langwell_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req)
 881 {
 882         struct langwell_ep      *ep;
 883         struct langwell_udc     *dev;
 884         struct langwell_request *req;
 885         unsigned long           flags;
 886         int                     stopped, ep_num, retval = 0;
 887         u32                     endptctrl;
 888
 889         ep = container_of(_ep, struct langwell_ep, ep);
 890         dev = ep->dev;
 891         VDBG(dev, "---> %s()\n", __func__);
 892
 893         if (!_ep || !ep->desc || !_req)
 894                 return -EINVAL;
 895
 896         if (!dev->driver)
 897                 return -ESHUTDOWN;
 898
 899         spin_lock_irqsave(&dev->lock, flags);
 900         stopped = ep->stopped;
 901
 902         /* quiesce dma while we patch the queue */
 903         ep->stopped = 1;
 904         ep_num = ep->ep_num;
 905
 906         /* disable endpoint control register */
 907         endptctrl = readl(&dev->op_regs->endptctrl[ep_num]);
 908         if (is_in(ep))
 909                 endptctrl &= ~EPCTRL_TXE;
 910         else
 911                 endptctrl &= ~EPCTRL_RXE;
 912         writel(endptctrl, &dev->op_regs->endptctrl[ep_num]);
 913
 914         /* make sure it's still queued on this endpoint */
 915         list_for_each_entry(req, &ep->queue, queue) {
 916                 if (&req->req == _req)
 917                         break;
 918         }
 919
 920         if (&req->req != _req) {
 921                 retval = -EINVAL;
 922                 goto done;
 923         }
 924
 925         /* queue head may be partially complete. */
 926         if (ep->queue.next == &req->queue) {
 927                 DBG(dev, "unlink (%s) dma\n", _ep->name);
 928                 _req->status = -ECONNRESET;
 929                 langwell_ep_fifo_flush(&ep->ep);
 930
 931                 /* not the last request in endpoint queue */
 932                 if (likely(ep->queue.next == &req->queue)) {
 933                         struct langwell_dqh     *dqh;
 934                         struct langwell_request *next_req;
 935
 936                         dqh = ep->dqh;
 937                         next_req = list_entry(req->queue.next,
 938                                         struct langwell_request, queue);
 939
 940                         /* point the dQH to the first dTD of next request */
 941                         writel((u32) next_req->head, &dqh->dqh_current);
 942                 }
 943         } else {
 944                 struct langwell_request *prev_req;
 945
 946                 prev_req = list_entry(req->queue.prev,
 947                                 struct langwell_request, queue);
 948                 writel(readl(&req->tail->dtd_next),
 949                                 &prev_req->tail->dtd_next);
 950         }
 951
 952         done(ep, req, -ECONNRESET);
 953
 954 done:
 955         /* enable endpoint again */
 956         endptctrl = readl(&dev->op_regs->endptctrl[ep_num]);
 957         if (is_in(ep))
 958                 endptctrl |= EPCTRL_TXE;
 959         else
 960                 endptctrl |= EPCTRL_RXE;
 961         writel(endptctrl, &dev->op_regs->endptctrl[ep_num]);
 962
 963         ep->stopped = stopped;
 964         spin_unlock_irqrestore(&dev->lock, flags);
 965
 966         VDBG(dev, "<--- %s()\n", __func__);
 967         return retval;
 968 }
 969
 970
 971 /*-------------------------------------------------------------------------*/
 972
 973 /* endpoint set/clear halt */
 974 static void ep_set_halt(struct langwell_ep *ep, int value)
 975 {
 976         u32                     endptctrl = 0;
 977         int                     ep_num;
 978         struct langwell_udc     *dev = ep->dev;
 979         VDBG(dev, "---> %s()\n", __func__);
 980
 981         ep_num = ep->ep_num;
 982         endptctrl = readl(&dev->op_regs->endptctrl[ep_num]);
 983
 984         /* value: 1 - set halt, 0 - clear halt */
 985         if (value) {
 986                 /* set the stall bit */
 987                 if (is_in(ep))
 988                         endptctrl |= EPCTRL_TXS;
 989                 else
 990                         endptctrl |= EPCTRL_RXS;
 991         } else {
 992                 /* clear the stall bit and reset data toggle */
 993                 if (is_in(ep)) {
 994                         endptctrl &= ~EPCTRL_TXS;
 995                         endptctrl |= EPCTRL_TXR;
 996                 } else {
 997                         endptctrl &= ~EPCTRL_RXS;
 998                         endptctrl |= EPCTRL_RXR;
 999                 }
1000         }
1001
1002         writel(endptctrl, &dev->op_regs->endptctrl[ep_num]);
1003
1004         VDBG(dev, "<--- %s()\n", __func__);
1005 }
1006
1007
1008 /* set the endpoint halt feature */
1009 static int langwell_ep_set_halt(struct usb_ep *_ep, int value)
1010 {
1011         struct langwell_ep      *ep;
1012         struct langwell_udc     *dev;
1013         unsigned long           flags;
1014         int                     retval = 0;
1015
1016         ep = container_of(_ep, struct langwell_ep, ep);
1017         dev = ep->dev;
1018
1019         VDBG(dev, "---> %s()\n", __func__);
1020
1021         if (!_ep || !ep->desc)
1022                 return -EINVAL;
1023
1024         if (!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN)
1025                 return -ESHUTDOWN;
1026
1027         if (ep->desc && (ep->desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK)
1028                         == USB_ENDPOINT_XFER_ISOC)
1029                 return  -EOPNOTSUPP;
1030
1031         spin_lock_irqsave(&dev->lock, flags);
1032
1033         /*
1034          * attempt to halt IN ep will fail if any transfer requests
1035          * are still queue
1036          */
1037         if (!list_empty(&ep->queue) && is_in(ep) && value) {
1038                 /* IN endpoint FIFO holds bytes */
1039                 DBG(dev, "%s FIFO holds bytes\n", _ep->name);
1040                 retval = -EAGAIN;
1041                 goto done;
1042         }
1043
1044         /* endpoint set/clear halt */
1045         if (ep->ep_num) {
1046                 ep_set_halt(ep, value);
1047         } else { /* endpoint 0 */
1048                 dev->ep0_state = WAIT_FOR_SETUP;
1049                 dev->ep0_dir = USB_DIR_OUT;
1050         }
1051 done:
1052         spin_unlock_irqrestore(&dev->lock, flags);
1053         DBG(dev, "%s %s halt\n", _ep->name, value ? "set" : "clear");
1054         VDBG(dev, "<--- %s()\n", __func__);
1055         return retval;
1056 }
1057
1058
1059 /* set the halt feature and ignores clear requests */
1060 static int langwell_ep_set_wedge(struct usb_ep *_ep)
1061 {
1062         struct langwell_ep      *ep;
1063         struct langwell_udc     *dev;
1064
1065         ep = container_of(_ep, struct langwell_ep, ep);
1066         dev = ep->dev;
1067
1068         VDBG(dev, "---> %s()\n", __func__);
1069
1070         if (!_ep || !ep->desc)
1071                 return -EINVAL;
1072
1073         VDBG(dev, "<--- %s()\n", __func__);
1074         return usb_ep_set_halt(_ep);
1075 }
1076
1077
1078 /* flush contents of a fifo */
1079 static void langwell_ep_fifo_flush(struct usb_ep *_ep)
1080 {
1081         struct langwell_ep      *ep;
1082         struct langwell_udc     *dev;
1083         u32                     flush_bit;
1084         unsigned long           timeout;
1085
1086         ep = container_of(_ep, struct langwell_ep, ep);
1087         dev = ep->dev;
1088
1089         VDBG(dev, "---> %s()\n", __func__);
1090
1091         if (!_ep || !ep->desc) {
1092                 VDBG(dev, "ep or ep->desc is NULL\n");
1093                 VDBG(dev, "<--- %s()\n", __func__);
1094                 return;
1095         }
1096
1097         VDBG(dev, "%s-%s fifo flush\n", _ep->name, is_in(ep) ? "in" : "out");
1098
1099         /* flush endpoint buffer */
1100         if (ep->ep_num == 0)
1101                 flush_bit = (1 << 16) | 1;
1102         else if (is_in(ep))
1103                 flush_bit = 1 << (ep->ep_num + 16);     /* TX */
1104         else
1105                 flush_bit = 1 << ep->ep_num;            /* RX */
1106
1107         /* wait until flush complete */
1108         timeout = jiffies + FLUSH_TIMEOUT;
1109         do {
1110                 writel(flush_bit, &dev->op_regs->endptflush);
1111                 while (readl(&dev->op_regs->endptflush)) {
1112                         if (time_after(jiffies, timeout)) {
1113                                 ERROR(dev, "ep flush timeout\n");
1114                                 goto done;
1115                         }
1116                         cpu_relax();
1117                 }
1118         } while (readl(&dev->op_regs->endptstat) & flush_bit);
1119 done:
1120         VDBG(dev, "<--- %s()\n", __func__);
1121 }
1122
1123
1124 /* endpoints operations structure */
1125 static const struct usb_ep_ops langwell_ep_ops = {
1126
1127         /* configure endpoint, making it usable */
1128         .enable         = langwell_ep_enable,
1129
1130         /* endpoint is no longer usable */
1131         .disable        = langwell_ep_disable,
1132
1133         /* allocate a request object to use with this endpoint */
1134         .alloc_request  = langwell_alloc_request,
1135
1136         /* free a request object */
1137         .free_request   = langwell_free_request,
1138
1139         /* queue (submits) an I/O requests to an endpoint */
1140         .queue          = langwell_ep_queue,
1141
1142         /* dequeue (cancels, unlinks) an I/O request from an endpoint */
1143         .dequeue        = langwell_ep_dequeue,
1144
1145         /* set the endpoint halt feature */
1146         .set_halt       = langwell_ep_set_halt,
1147
1148         /* set the halt feature and ignores clear requests */
1149         .set_wedge      = langwell_ep_set_wedge,
1150
1151         /* flush contents of a fifo */
1152         .fifo_flush     = langwell_ep_fifo_flush,
1153 };
1154
1155
1156 /*-------------------------------------------------------------------------*/
1157
1158 /* device controller usb_gadget_ops structure */
1159
1160 /* returns the current frame number */
1161 static int langwell_get_frame(struct usb_gadget *_gadget)
1162 {
1163         struct langwell_udc     *dev;
1164         u16                     retval;
1165
1166         if (!_gadget)
1167                 return -ENODEV;
1168
1169         dev = container_of(_gadget, struct langwell_udc, gadget);
1170         VDBG(dev, "---> %s()\n", __func__);
1171
1172         retval = readl(&dev->op_regs->frindex) & FRINDEX_MASK;
1173
1174         VDBG(dev, "<--- %s()\n", __func__);
1175         return retval;
1176 }
1177
1178
1179 /* tries to wake up the host connected to this gadget */
1180 static int langwell_wakeup(struct usb_gadget *_gadget)
1181 {
1182         struct langwell_udc     *dev;
1183         u32                     portsc1, devlc;
1184         unsigned long           flags;
1185
1186         if (!_gadget)
1187                 return 0;
1188
1189         dev = container_of(_gadget, struct langwell_udc, gadget);
1190         VDBG(dev, "---> %s()\n", __func__);
1191
1192         /* Remote Wakeup feature not enabled by host */
1193         if (!dev->remote_wakeup)
1194                 return -ENOTSUPP;
1195
1196         spin_lock_irqsave(&dev->lock, flags);
1197
1198         portsc1 = readl(&dev->op_regs->portsc1);
1199         if (!(portsc1 & PORTS_SUSP)) {
1200                 spin_unlock_irqrestore(&dev->lock, flags);
1201                 return 0;
1202         }
1203
1204         /* LPM L1 to L0, remote wakeup */
1205         if (dev->lpm && dev->lpm_state == LPM_L1) {
1206                 portsc1 |= PORTS_SLP;
1207                 writel(portsc1, &dev->op_regs->portsc1);
1208         }
1209
1210         /* force port resume */
1211         if (dev->usb_state == USB_STATE_SUSPENDED) {
1212                 portsc1 |= PORTS_FPR;
1213                 writel(portsc1, &dev->op_regs->portsc1);
1214         }
1215
1216         /* exit PHY low power suspend */
1217         devlc = readl(&dev->op_regs->devlc);
1218         VDBG(dev, "devlc = 0x%08x\n", devlc);
1219         devlc &= ~LPM_PHCD;
1220         writel(devlc, &dev->op_regs->devlc);
1221
1222         spin_unlock_irqrestore(&dev->lock, flags);
1223
1224         VDBG(dev, "<--- %s()\n", __func__);
1225         return 0;
1226 }
1227
1228
1229 /* notify controller that VBUS is powered or not */
1230 static int langwell_vbus_session(struct usb_gadget *_gadget, int is_active)
1231 {
1232         struct langwell_udc     *dev;
1233         unsigned long           flags;
1234         u32                     usbcmd;
1235
1236         if (!_gadget)
1237                 return -ENODEV;
1238
1239         dev = container_of(_gadget, struct langwell_udc, gadget);
1240         VDBG(dev, "---> %s()\n", __func__);
1241
1242         spin_lock_irqsave(&dev->lock, flags);
1243         VDBG(dev, "VBUS status: %s\n", is_active ? "on" : "off");
1244
1245         dev->vbus_active = (is_active != 0);
1246         if (dev->driver && dev->softconnected && dev->vbus_active) {
1247                 usbcmd = readl(&dev->op_regs->usbcmd);
1248                 usbcmd |= CMD_RUNSTOP;
1249                 writel(usbcmd, &dev->op_regs->usbcmd);
1250         } else {
1251                 usbcmd = readl(&dev->op_regs->usbcmd);
1252                 usbcmd &= ~CMD_RUNSTOP;
1253                 writel(usbcmd, &dev->op_regs->usbcmd);
1254         }
1255
1256         spin_unlock_irqrestore(&dev->lock, flags);
1257
1258         VDBG(dev, "<--- %s()\n", __func__);
1259         return 0;
1260 }
1261
1262
1263 /* constrain controller's VBUS power usage */
1264 static int langwell_vbus_draw(struct usb_gadget *_gadget, unsigned mA)
1265 {
1266         struct langwell_udc     *dev;
1267
1268         if (!_gadget)
1269                 return -ENODEV;
1270
1271         dev = container_of(_gadget, struct langwell_udc, gadget);
1272         VDBG(dev, "---> %s()\n", __func__);
1273
1274         if (dev->transceiver) {
1275                 VDBG(dev, "otg_set_power\n");
1276                 VDBG(dev, "<--- %s()\n", __func__);
1277                 return otg_set_power(dev->transceiver, mA);
1278         }
1279
1280         VDBG(dev, "<--- %s()\n", __func__);
1281         return -ENOTSUPP;
1282 }
1283
1284
1285 /* D+ pullup, software-controlled connect/disconnect to USB host */
1286 static int langwell_pullup(struct usb_gadget *_gadget, int is_on)
1287 {
1288         struct langwell_udc     *dev;
1289         u32                     usbcmd;
1290         unsigned long           flags;
1291
1292         if (!_gadget)
1293                 return -ENODEV;
1294
1295         dev = container_of(_gadget, struct langwell_udc, gadget);
1296
1297         VDBG(dev, "---> %s()\n", __func__);
1298
1299         spin_lock_irqsave(&dev->lock, flags);
1300         dev->softconnected = (is_on != 0);
1301
1302         if (dev->driver && dev->softconnected && dev->vbus_active) {
1303                 usbcmd = readl(&dev->op_regs->usbcmd);
1304                 usbcmd |= CMD_RUNSTOP;
1305                 writel(usbcmd, &dev->op_regs->usbcmd);
1306         } else {
1307                 usbcmd = readl(&dev->op_regs->usbcmd);
1308                 usbcmd &= ~CMD_RUNSTOP;
1309                 writel(usbcmd, &dev->op_regs->usbcmd);
1310         }
1311         spin_unlock_irqrestore(&dev->lock, flags);
1312
1313         VDBG(dev, "<--- %s()\n", __func__);
1314         return 0;
1315 }
1316
1317
1318 /* device controller usb_gadget_ops structure */
1319 static const struct usb_gadget_ops langwell_ops = {
1320
1321         /* returns the current frame number */
1322         .get_frame      = langwell_get_frame,
1323
1324         /* tries to wake up the host connected to this gadget */
1325         .wakeup         = langwell_wakeup,
1326
1327         /* set the device selfpowered feature, always selfpowered */
1328         /* .set_selfpowered = langwell_set_selfpowered, */
1329
1330         /* notify controller that VBUS is powered or not */
1331         .vbus_session   = langwell_vbus_session,
1332
1333         /* constrain controller's VBUS power usage */
1334         .vbus_draw      = langwell_vbus_draw,
1335
1336         /* D+ pullup, software-controlled connect/disconnect to USB host */
1337         .pullup         = langwell_pullup,
1338 };
1339
1340
1341 /*-------------------------------------------------------------------------*/
1342
1343 /* device controller operations */
1344
1345 /* reset device controller */
1346 static int langwell_udc_reset(struct langwell_udc *dev)
1347 {
1348         u32             usbcmd, usbmode, devlc, endpointlistaddr;
1349         unsigned long   timeout;
1350
1351         if (!dev)
1352                 return -EINVAL;
1353
1354         DBG(dev, "---> %s()\n", __func__);
1355
1356         /* set controller to stop state */
1357         usbcmd = readl(&dev->op_regs->usbcmd);
1358         usbcmd &= ~CMD_RUNSTOP;
1359         writel(usbcmd, &dev->op_regs->usbcmd);
1360
1361         /* reset device controller */
1362         usbcmd = readl(&dev->op_regs->usbcmd);
1363         usbcmd |= CMD_RST;
1364         writel(usbcmd, &dev->op_regs->usbcmd);
1365
1366         /* wait for reset to complete */
1367         timeout = jiffies + RESET_TIMEOUT;
1368         while (readl(&dev->op_regs->usbcmd) & CMD_RST) {
1369                 if (time_after(jiffies, timeout)) {
1370                         ERROR(dev, "device reset timeout\n");
1371                         return -ETIMEDOUT;
1372                 }
1373                 cpu_relax();
1374         }
1375
1376         /* set controller to device mode */
1377         usbmode = readl(&dev->op_regs->usbmode);
1378         usbmode |= MODE_DEVICE;
1379
1380         /* turn setup lockout off, require setup tripwire in usbcmd */
1381         usbmode |= MODE_SLOM;
1382
1383         writel(usbmode, &dev->op_regs->usbmode);
1384         usbmode = readl(&dev->op_regs->usbmode);
1385         VDBG(dev, "usbmode=0x%08x\n", usbmode);
1386
1387         /* Write-Clear setup status */
1388         writel(0, &dev->op_regs->usbsts);
1389
1390         /* if support USB LPM, ACK all LPM token */
1391         if (dev->lpm) {
1392                 devlc = readl(&dev->op_regs->devlc);
1393                 devlc &= ~LPM_STL;      /* don't STALL LPM token */
1394                 devlc &= ~LPM_NYT_ACK;  /* ACK LPM token */
1395                 writel(devlc, &dev->op_regs->devlc);
1396         }
1397
1398         /* fill endpointlistaddr register */
1399         endpointlistaddr = dev->ep_dqh_dma;
1400         endpointlistaddr &= ENDPOINTLISTADDR_MASK;
1401         writel(endpointlistaddr, &dev->op_regs->endpointlistaddr);
1402
1403         VDBG(dev, "dQH base (vir: %p, phy: 0x%08x), endpointlistaddr=0x%08x\n",
1404                         dev->ep_dqh, endpointlistaddr,
1405                         readl(&dev->op_regs->endpointlistaddr));
1406         DBG(dev, "<--- %s()\n", __func__);
1407         return 0;
1408 }
1409
1410
1411 /* reinitialize device controller endpoints */
1412 static int eps_reinit(struct langwell_udc *dev)
1413 {
1414         struct langwell_ep      *ep;
1415         char                    name[14];
1416         int                     i;
1417
1418         VDBG(dev, "---> %s()\n", __func__);
1419
1420         /* initialize ep0 */
1421         ep = &dev->ep[0];
1422         ep->dev = dev;
1423         strncpy(ep->name, "ep0", sizeof(ep->name));
1424         ep->ep.name = ep->name;
1425         ep->ep.ops = &langwell_ep_ops;
1426         ep->stopped = 0;
1427         ep->ep.maxpacket = EP0_MAX_PKT_SIZE;
1428         ep->ep_num = 0;
1429         ep->desc = &langwell_ep0_desc;
1430         INIT_LIST_HEAD(&ep->queue);
1431
1432         ep->ep_type = USB_ENDPOINT_XFER_CONTROL;
1433
1434         /* initialize other endpoints */
1435         for (i = 2; i < dev->ep_max; i++) {
1436                 ep = &dev->ep[i];
1437                 if (i % 2)
1438                         snprintf(name, sizeof(name), "ep%din", i / 2);
1439                 else
1440                         snprintf(name, sizeof(name), "ep%dout", i / 2);
1441                 ep->dev = dev;
1442                 strncpy(ep->name, name, sizeof(ep->name));
1443                 ep->ep.name = ep->name;
1444
1445                 ep->ep.ops = &langwell_ep_ops;
1446                 ep->stopped = 0;
1447                 ep->ep.maxpacket = (unsigned short) ~0;
1448                 ep->ep_num = i / 2;
1449
1450                 INIT_LIST_HEAD(&ep->queue);
1451                 list_add_tail(&ep->ep.ep_list, &dev->gadget.ep_list);
1452
1453                 ep->dqh = &dev->ep_dqh[i];
1454         }
1455
1456         VDBG(dev, "<--- %s()\n", __func__);
1457         return 0;
1458 }
1459
1460
1461 /* enable interrupt and set controller to run state */
1462 static void langwell_udc_start(struct langwell_udc *dev)
1463 {
1464         u32     usbintr, usbcmd;
1465         DBG(dev, "---> %s()\n", __func__);
1466
1467         /* enable interrupts */
1468         usbintr = INTR_ULPIE    /* ULPI */
1469                 | INTR_SLE      /* suspend */
1470                 /* | INTR_SRE   SOF received */
1471                 | INTR_URE      /* USB reset */
1472                 | INTR_AAE      /* async advance */
1473                 | INTR_SEE      /* system error */
1474                 | INTR_FRE      /* frame list rollover */
1475                 | INTR_PCE      /* port change detect */
1476                 | INTR_UEE      /* USB error interrupt */
1477                 | INTR_UE;      /* USB interrupt */
1478         writel(usbintr, &dev->op_regs->usbintr);
1479
1480         /* clear stopped bit */
1481         dev->stopped = 0;
1482
1483         /* set controller to run */
1484         usbcmd = readl(&dev->op_regs->usbcmd);
1485         usbcmd |= CMD_RUNSTOP;
1486         writel(usbcmd, &dev->op_regs->usbcmd);
1487
1488         DBG(dev, "<--- %s()\n", __func__);
1489         return;
1490 }
1491
1492
1493 /* disable interrupt and set controller to stop state */
1494 static void langwell_udc_stop(struct langwell_udc *dev)
1495 {
1496         u32     usbcmd;
1497
1498         DBG(dev, "---> %s()\n", __func__);
1499
1500         /* disable all interrupts */
1501         writel(0, &dev->op_regs->usbintr);
1502
1503         /* set stopped bit */
1504         dev->stopped = 1;
1505
1506         /* set controller to stop state */
1507         usbcmd = readl(&dev->op_regs->usbcmd);
1508         usbcmd &= ~CMD_RUNSTOP;
1509         writel(usbcmd, &dev->op_regs->usbcmd);
1510
1511         DBG(dev, "<--- %s()\n", __func__);
1512         return;
1513 }
1514
1515
1516 /* stop all USB activities */
1517 static void stop_activity(struct langwell_udc *dev,
1518                 struct usb_gadget_driver *driver)
1519 {
1520         struct langwell_ep      *ep;
1521         DBG(dev, "---> %s()\n", __func__);
1522
1523         nuke(&dev->ep[0], -ESHUTDOWN);
1524
1525         list_for_each_entry(ep, &dev->gadget.ep_list, ep.ep_list) {
1526                 nuke(ep, -ESHUTDOWN);
1527         }
1528
1529         /* report disconnect; the driver is already quiesced */
1530         if (driver) {
1531                 spin_unlock(&dev->lock);
1532                 driver->disconnect(&dev->gadget);
1533                 spin_lock(&dev->lock);
1534         }
1535
1536         DBG(dev, "<--- %s()\n", __func__);
1537 }
1538
1539
1540 /*-------------------------------------------------------------------------*/
1541
1542 /* device "function" sysfs attribute file */
1543 static ssize_t show_function(struct device *_dev,
1544                 struct device_attribute *attr, char *buf)
1545 {
1546         struct langwell_udc     *dev = the_controller;
1547
1548         if (!dev->driver || !dev->driver->function
1549                         || strlen(dev->driver->function) > PAGE_SIZE)
1550                 return 0;
1551
1552         return scnprintf(buf, PAGE_SIZE, "%s\n", dev->driver->function);
1553 }
1554 static DEVICE_ATTR(function, S_IRUGO, show_function, NULL);
1555
1556
1557 /* device "langwell_udc" sysfs attribute file */
1558 static ssize_t show_langwell_udc(struct device *_dev,
1559                 struct device_attribute *attr, char *buf)
1560 {
1561         struct langwell_udc     *dev = the_controller;
1562         struct langwell_request *req;
1563         struct langwell_ep      *ep = NULL;
1564         char                    *next;
1565         unsigned                size;
1566         unsigned                t;
1567         unsigned                i;
1568         unsigned long           flags;
1569         u32                     tmp_reg;
1570
1571         next = buf;
1572         size = PAGE_SIZE;
1573         spin_lock_irqsave(&dev->lock, flags);
1574
1575         /* driver basic information */
1576         t = scnprintf(next, size,
1577                         DRIVER_DESC "\n"
1578                         "%s version: %s\n"
1579                         "Gadget driver: %s\n\n",
1580                         driver_name, DRIVER_VERSION,
1581                         dev->driver ? dev->driver->driver.name : "(none)");
1582         size -= t;
1583         next += t;
1584
1585         /* device registers */
1586         tmp_reg = readl(&dev->op_regs->usbcmd);
1587         t = scnprintf(next, size,
1588                         "USBCMD reg:\n"
1589                         "SetupTW: %d\n"
1590                         "Run/Stop: %s\n\n",
1591                         (tmp_reg & CMD_SUTW) ? 1 : 0,
1592                         (tmp_reg & CMD_RUNSTOP) ? "Run" : "Stop");
1593         size -= t;
1594         next += t;
1595
1596         tmp_reg = readl(&dev->op_regs->usbsts);
1597         t = scnprintf(next, size,
1598                         "USB Status Reg:\n"
1599                         "Device Suspend: %d\n"
1600                         "Reset Received: %d\n"
1601                         "System Error: %s\n"
1602                         "USB Error Interrupt: %s\n\n",
1603                         (tmp_reg & STS_SLI) ? 1 : 0,
1604                         (tmp_reg & STS_URI) ? 1 : 0,
1605                         (tmp_reg & STS_SEI) ? "Error" : "No error",
1606                         (tmp_reg & STS_UEI) ? "Error detected" : "No error");
1607         size -= t;
1608         next += t;
1609
1610         tmp_reg = readl(&dev->op_regs->usbintr);
1611         t = scnprintf(next, size,
1612                         "USB Intrrupt Enable Reg:\n"
1613                         "Sleep Enable: %d\n"
1614                         "SOF Received Enable: %d\n"
1615                         "Reset Enable: %d\n"
1616                         "System Error Enable: %d\n"
1617                         "Port Change Dectected Enable: %d\n"
1618                         "USB Error Intr Enable: %d\n"
1619                         "USB Intr Enable: %d\n\n",
1620                         (tmp_reg & INTR_SLE) ? 1 : 0,
1621                         (tmp_reg & INTR_SRE) ? 1 : 0,
1622                         (tmp_reg & INTR_URE) ? 1 : 0,
1623                         (tmp_reg & INTR_SEE) ? 1 : 0,
1624                         (tmp_reg & INTR_PCE) ? 1 : 0,
1625                         (tmp_reg & INTR_UEE) ? 1 : 0,
1626                         (tmp_reg & INTR_UE) ? 1 : 0);
1627         size -= t;
1628         next += t;
1629
1630         tmp_reg = readl(&dev->op_regs->frindex);
1631         t = scnprintf(next, size,
1632                         "USB Frame Index Reg:\n"
1633                         "Frame Number is 0x%08x\n\n",
1634                         (tmp_reg & FRINDEX_MASK));
1635         size -= t;
1636         next += t;
1637
1638         tmp_reg = readl(&dev->op_regs->deviceaddr);
1639         t = scnprintf(next, size,
1640                         "USB Device Address Reg:\n"
1641                         "Device Addr is 0x%x\n\n",
1642                         USBADR(tmp_reg));
1643         size -= t;
1644         next += t;
1645
1646         tmp_reg = readl(&dev->op_regs->endpointlistaddr);
1647         t = scnprintf(next, size,
1648                         "USB Endpoint List Address Reg:\n"
1649                         "Endpoint List Pointer is 0x%x\n\n",
1650                         EPBASE(tmp_reg));
1651         size -= t;
1652         next += t;
1653
1654         tmp_reg = readl(&dev->op_regs->portsc1);
1655         t = scnprintf(next, size,
1656                 "USB Port Status & Control Reg:\n"
1657                 "Port Reset: %s\n"
1658                 "Port Suspend Mode: %s\n"
1659                 "Over-current Change: %s\n"
1660                 "Port Enable/Disable Change: %s\n"
1661                 "Port Enabled/Disabled: %s\n"
1662                 "Current Connect Status: %s\n\n",
1663                 (tmp_reg & PORTS_PR) ? "Reset" : "Not Reset",
1664                 (tmp_reg & PORTS_SUSP) ? "Suspend " : "Not Suspend",
1665                 (tmp_reg & PORTS_OCC) ? "Detected" : "No",
1666                 (tmp_reg & PORTS_PEC) ? "Changed" : "Not Changed",
1667                 (tmp_reg & PORTS_PE) ? "Enable" : "Not Correct",
1668                 (tmp_reg & PORTS_CCS) ?  "Attached" : "Not Attached");
1669         size -= t;
1670         next += t;
1671
1672         tmp_reg = readl(&dev->op_regs->devlc);
1673         t = scnprintf(next, size,
1674                 "Device LPM Control Reg:\n"
1675                 "Parallel Transceiver : %d\n"
1676                 "Serial Transceiver : %d\n"
1677                 "Port Speed: %s\n"
1678                 "Port Force Full Speed Connenct: %s\n"
1679                 "PHY Low Power Suspend Clock Disable: %s\n"
1680                 "BmAttributes: %d\n\n",
1681                 LPM_PTS(tmp_reg),
1682                 (tmp_reg & LPM_STS) ? 1 : 0,
1683                 ({
1684                         char    *s;
1685                         switch (LPM_PSPD(tmp_reg)) {
1686                         case LPM_SPEED_FULL:
1687                                 s = "Full Speed"; break;
1688                         case LPM_SPEED_LOW:
1689                                 s = "Low Speed"; break;
1690                         case LPM_SPEED_HIGH:
1691                                 s = "High Speed"; break;
1692                         default:
1693                                 s = "Unknown Speed"; break;
1694                         }
1695                         s;
1696                 }),
1697                 (tmp_reg & LPM_PFSC) ? "Force Full Speed" : "Not Force",
1698                 (tmp_reg & LPM_PHCD) ? "Disabled" : "Enabled",
1699                 LPM_BA(tmp_reg));
1700         size -= t;
1701         next += t;
1702
1703         tmp_reg = readl(&dev->op_regs->usbmode);
1704         t = scnprintf(next, size,
1705                         "USB Mode Reg:\n"
1706                         "Controller Mode is : %s\n\n", ({
1707                                 char *s;
1708                                 switch (MODE_CM(tmp_reg)) {
1709                                 case MODE_IDLE:
1710                                         s = "Idle"; break;
1711                                 case MODE_DEVICE:
1712                                         s = "Device Controller"; break;
1713                                 case MODE_HOST:
1714                                         s = "Host Controller"; break;
1715                                 default:
1716                                         s = "None"; break;
1717                                 }
1718                                 s;
1719                         }));
1720         size -= t;
1721         next += t;
1722
1723         tmp_reg = readl(&dev->op_regs->endptsetupstat);
1724         t = scnprintf(next, size,
1725                         "Endpoint Setup Status Reg:\n"
1726                         "SETUP on ep 0x%04x\n\n",
1727                         tmp_reg & SETUPSTAT_MASK);
1728         size -= t;
1729         next += t;
1730
1731         for (i = 0; i < dev->ep_max / 2; i++) {
1732                 tmp_reg = readl(&dev->op_regs->endptctrl[i]);
1733                 t = scnprintf(next, size, "EP Ctrl Reg [%d]: 0x%08x\n",
1734                                 i, tmp_reg);
1735                 size -= t;
1736                 next += t;
1737         }
1738         tmp_reg = readl(&dev->op_regs->endptprime);
1739         t = scnprintf(next, size, "EP Prime Reg: 0x%08x\n\n", tmp_reg);
1740         size -= t;
1741         next += t;
1742
1743         /* langwell_udc, langwell_ep, langwell_request structure information */
1744         ep = &dev->ep[0];
1745         t = scnprintf(next, size, "%s MaxPacketSize: 0x%x, ep_num: %d\n",
1746                         ep->ep.name, ep->ep.maxpacket, ep->ep_num);
1747         size -= t;
1748         next += t;
1749
1750         if (list_empty(&ep->queue)) {
1751                 t = scnprintf(next, size, "its req queue is empty\n\n");
1752                 size -= t;
1753                 next += t;
1754         } else {
1755                 list_for_each_entry(req, &ep->queue, queue) {
1756                         t = scnprintf(next, size,
1757                                 "req %p actual 0x%x length 0x%x  buf %p\n",
1758                                 &req->req, req->req.actual,
1759                                 req->req.length, req->req.buf);
1760                         size -= t;
1761                         next += t;
1762                 }
1763         }
1764         /* other gadget->eplist ep */
1765         list_for_each_entry(ep, &dev->gadget.ep_list, ep.ep_list) {
1766                 if (ep->desc) {
1767                         t = scnprintf(next, size,
1768                                         "\n%s MaxPacketSize: 0x%x, "
1769                                         "ep_num: %d\n",
1770                                         ep->ep.name, ep->ep.maxpacket,
1771                                         ep->ep_num);
1772                         size -= t;
1773                         next += t;
1774
1775                         if (list_empty(&ep->queue)) {
1776                                 t = scnprintf(next, size,
1777                                                 "its req queue is empty\n\n");
1778                                 size -= t;
1779                                 next += t;
1780                         } else {
1781                                 list_for_each_entry(req, &ep->queue, queue) {
1782                                         t = scnprintf(next, size,
1783                                                 "req %p actual 0x%x length "
1784                                                 "0x%x  buf %p\n",
1785                                                 &req->req, req->req.actual,
1786                                                 req->req.length, req->req.buf);
1787                                         size -= t;
1788                                         next += t;
1789                                 }
1790                         }
1791                 }
1792         }
1793
1794         spin_unlock_irqrestore(&dev->lock, flags);
1795         return PAGE_SIZE - size;
1796 }
1797 static DEVICE_ATTR(langwell_udc, S_IRUGO, show_langwell_udc, NULL);
1798
1799
1800 /*-------------------------------------------------------------------------*/
1801
1802 /*
1803  * when a driver is successfully registered, it will receive
1804  * control requests including set_configuration(), which enables
1805  * non-control requests.  then usb traffic follows until a
1806  * disconnect is reported.  then a host may connect again, or
1807  * the driver might get unbound.
1808  */
1809
1810 int usb_gadget_register_driver(struct usb_gadget_driver *driver)
1811 {
1812         struct langwell_udc     *dev = the_controller;
1813         unsigned long           flags;
1814         int                     retval;
1815
1816         if (!dev)
1817                 return -ENODEV;
1818
1819         DBG(dev, "---> %s()\n", __func__);
1820
1821         if (dev->driver)
1822                 return -EBUSY;
1823
1824         spin_lock_irqsave(&dev->lock, flags);
1825
1826         /* hook up the driver ... */
1827         driver->driver.bus = NULL;
1828         dev->driver = driver;
1829         dev->gadget.dev.driver = &driver->driver;
1830
1831         spin_unlock_irqrestore(&dev->lock, flags);
1832
1833         retval = driver->bind(&dev->gadget);
1834         if (retval) {
1835                 DBG(dev, "bind to driver %s --> %d\n",
1836                                 driver->driver.name, retval);
1837                 dev->driver = NULL;
1838                 dev->gadget.dev.driver = NULL;
1839                 return retval;
1840         }
1841
1842         retval = device_create_file(&dev->pdev->dev, &dev_attr_function);
1843         if (retval)
1844                 goto err_unbind;
1845
1846         dev->usb_state = USB_STATE_ATTACHED;
1847         dev->ep0_state = WAIT_FOR_SETUP;
1848         dev->ep0_dir = USB_DIR_OUT;
1849
1850         /* enable interrupt and set controller to run state */
1851         if (dev->got_irq)
1852                 langwell_udc_start(dev);
1853
1854         VDBG(dev, "After langwell_udc_start(), print all registers:\n");
1855 #ifdef  VERBOSE
1856         print_all_registers(dev);
1857 #endif
1858
1859         INFO(dev, "register driver: %s\n", driver->driver.name);
1860         VDBG(dev, "<--- %s()\n", __func__);
1861         return 0;
1862
1863 err_unbind:
1864         driver->unbind(&dev->gadget);
1865         dev->gadget.dev.driver = NULL;
1866         dev->driver = NULL;
1867
1868         DBG(dev, "<--- %s()\n", __func__);
1869         return retval;
1870 }
1871 EXPORT_SYMBOL(usb_gadget_register_driver);
1872
1873
1874 /* unregister gadget driver */
1875 int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
1876 {
1877         struct langwell_udc     *dev = the_controller;
1878         unsigned long           flags;
1879
1880         if (!dev)
1881                 return -ENODEV;
1882
1883         DBG(dev, "---> %s()\n", __func__);
1884
1885         if (unlikely(!driver || !driver->bind || !driver->unbind))
1886                 return -EINVAL;
1887
1888         /* unbind OTG transceiver */
1889         if (dev->transceiver)
1890                 (void)otg_set_peripheral(dev->transceiver, 0);
1891
1892         /* disable interrupt and set controller to stop state */
1893         langwell_udc_stop(dev);
1894
1895         dev->usb_state = USB_STATE_ATTACHED;
1896         dev->ep0_state = WAIT_FOR_SETUP;
1897         dev->ep0_dir = USB_DIR_OUT;
1898
1899         spin_lock_irqsave(&dev->lock, flags);
1900
1901         /* stop all usb activities */
1902         dev->gadget.speed = USB_SPEED_UNKNOWN;
1903         stop_activity(dev, driver);
1904         spin_unlock_irqrestore(&dev->lock, flags);
1905
1906         /* unbind gadget driver */
1907         driver->unbind(&dev->gadget);
1908         dev->gadget.dev.driver = NULL;
1909         dev->driver = NULL;
1910
1911         device_remove_file(&dev->pdev->dev, &dev_attr_function);
1912
1913         INFO(dev, "unregistered driver '%s'\n", driver->driver.name);
1914         DBG(dev, "<--- %s()\n", __func__);
1915         return 0;
1916 }
1917 EXPORT_SYMBOL(usb_gadget_unregister_driver);
1918
1919
1920 /*-------------------------------------------------------------------------*/
1921
1922 /*
1923  * setup tripwire is used as a semaphore to ensure that the setup data
1924  * payload is extracted from a dQH without being corrupted
1925  */
1926 static void setup_tripwire(struct langwell_udc *dev)
1927 {
1928         u32                     usbcmd,
1929                                 endptsetupstat;
1930         unsigned long           timeout;
1931         struct langwell_dqh     *dqh;
1932
1933         VDBG(dev, "---> %s()\n", __func__);
1934
1935         /* ep0 OUT dQH */
1936         dqh = &dev->ep_dqh[EP_DIR_OUT];
1937
1938         /* Write-Clear endptsetupstat */
1939         endptsetupstat = readl(&dev->op_regs->endptsetupstat);
1940         writel(endptsetupstat, &dev->op_regs->endptsetupstat);
1941
1942         /* wait until endptsetupstat is cleared */
1943         timeout = jiffies + SETUPSTAT_TIMEOUT;
1944         while (readl(&dev->op_regs->endptsetupstat)) {
1945                 if (time_after(jiffies, timeout)) {
1946                         ERROR(dev, "setup_tripwire timeout\n");
1947                         break;
1948                 }
1949                 cpu_relax();
1950         }
1951
1952         /* while a hazard exists when setup packet arrives */
1953         do {
1954                 /* set setup tripwire bit */
1955                 usbcmd = readl(&dev->op_regs->usbcmd);
1956                 writel(usbcmd | CMD_SUTW, &dev->op_regs->usbcmd);
1957
1958                 /* copy the setup packet to local buffer */
1959                 memcpy(&dev->local_setup_buff, &dqh->dqh_setup, 8);
1960         } while (!(readl(&dev->op_regs->usbcmd) & CMD_SUTW));
1961
1962         /* Write-Clear setup tripwire bit */
1963         usbcmd = readl(&dev->op_regs->usbcmd);
1964         writel(usbcmd & ~CMD_SUTW, &dev->op_regs->usbcmd);
1965
1966         VDBG(dev, "<--- %s()\n", __func__);
1967 }
1968
1969
1970 /* protocol ep0 stall, will automatically be cleared on new transaction */
1971 static void ep0_stall(struct langwell_udc *dev)
1972 {
1973         u32     endptctrl;
1974
1975         VDBG(dev, "---> %s()\n", __func__);
1976
1977         /* set TX and RX to stall */
1978         endptctrl = readl(&dev->op_regs->endptctrl[0]);
1979         endptctrl |= EPCTRL_TXS | EPCTRL_RXS;
1980         writel(endptctrl, &dev->op_regs->endptctrl[0]);
1981
1982         /* update ep0 state */
1983         dev->ep0_state = WAIT_FOR_SETUP;
1984         dev->ep0_dir = USB_DIR_OUT;
1985
1986         VDBG(dev, "<--- %s()\n", __func__);
1987 }
1988
1989
1990 /* PRIME a status phase for ep0 */
1991 static int prime_status_phase(struct langwell_udc *dev, int dir)
1992 {
1993         struct langwell_request *req;
1994         struct langwell_ep      *ep;
1995         int                     status = 0;
1996
1997         VDBG(dev, "---> %s()\n", __func__);
1998
1999         if (dir == EP_DIR_IN)
2000                 dev->ep0_dir = USB_DIR_IN;
2001         else
2002                 dev->ep0_dir = USB_DIR_OUT;
2003
2004         ep = &dev->ep[0];
2005         dev->ep0_state = WAIT_FOR_OUT_STATUS;
2006
2007         req = dev->status_req;
2008
2009         req->ep = ep;
2010         req->req.length = 0;
2011         req->req.status = -EINPROGRESS;
2012         req->req.actual = 0;
2013         req->req.complete = NULL;
2014         req->dtd_count = 0;
2015
2016         if (!req_to_dtd(req))
2017                 status = queue_dtd(ep, req);
2018         else
2019                 return -ENOMEM;
2020
2021         if (status)
2022                 ERROR(dev, "can't queue ep0 status request\n");
2023
2024         list_add_tail(&req->queue, &ep->queue);
2025
2026         VDBG(dev, "<--- %s()\n", __func__);
2027         return status;
2028 }
2029
2030
2031 /* SET_ADDRESS request routine */
2032 static void set_address(struct langwell_udc *dev, u16 value,
2033                 u16 index, u16 length)
2034 {
2035         VDBG(dev, "---> %s()\n", __func__);
2036
2037         /* save the new address to device struct */
2038         dev->dev_addr = (u8) value;
2039         VDBG(dev, "dev->dev_addr = %d\n", dev->dev_addr);
2040
2041         /* update usb state */
2042         dev->usb_state = USB_STATE_ADDRESS;
2043
2044         /* STATUS phase */
2045         if (prime_status_phase(dev, EP_DIR_IN))
2046                 ep0_stall(dev);
2047
2048         VDBG(dev, "<--- %s()\n", __func__);
2049 }
2050
2051
2052 /* return endpoint by windex */
2053 static struct langwell_ep *get_ep_by_windex(struct langwell_udc *dev,
2054                 u16 wIndex)
2055 {
2056         struct langwell_ep              *ep;
2057         VDBG(dev, "---> %s()\n", __func__);
2058
2059         if ((wIndex & USB_ENDPOINT_NUMBER_MASK) == 0)
2060                 return &dev->ep[0];
2061
2062         list_for_each_entry(ep, &dev->gadget.ep_list, ep.ep_list) {
2063                 u8      bEndpointAddress;
2064                 if (!ep->desc)
2065                         continue;
2066
2067                 bEndpointAddress = ep->desc->bEndpointAddress;
2068                 if ((wIndex ^ bEndpointAddress) & USB_DIR_IN)
2069                         continue;
2070
2071                 if ((wIndex & USB_ENDPOINT_NUMBER_MASK)
2072                         == (bEndpointAddress & USB_ENDPOINT_NUMBER_MASK))
2073                         return ep;
2074         }
2075
2076         VDBG(dev, "<--- %s()\n", __func__);
2077         return NULL;
2078 }
2079
2080
2081 /* return whether endpoint is stalled, 0: not stalled; 1: stalled */
2082 static int ep_is_stall(struct langwell_ep *ep)
2083 {
2084         struct langwell_udc     *dev = ep->dev;
2085         u32                     endptctrl;
2086         int                     retval;
2087
2088         VDBG(dev, "---> %s()\n", __func__);
2089
2090         endptctrl = readl(&dev->op_regs->endptctrl[ep->ep_num]);
2091         if (is_in(ep))
2092                 retval = endptctrl & EPCTRL_TXS ? 1 : 0;
2093         else
2094                 retval = endptctrl & EPCTRL_RXS ? 1 : 0;
2095
2096         VDBG(dev, "<--- %s()\n", __func__);
2097         return retval;
2098 }
2099
2100
2101 /* GET_STATUS request routine */
2102 static void get_status(struct langwell_udc *dev, u8 request_type, u16 value,
2103                 u16 index, u16 length)
2104 {
2105         struct langwell_request *req;
2106         struct langwell_ep      *ep;
2107         u16     status_data = 0;        /* 16 bits cpu view status data */
2108         int     status = 0;
2109
2110         VDBG(dev, "---> %s()\n", __func__);
2111
2112         ep = &dev->ep[0];
2113
2114         if ((request_type & USB_RECIP_MASK) == USB_RECIP_DEVICE) {
2115                 /* get device status */
2116                 status_data = 1 << USB_DEVICE_SELF_POWERED;
2117                 status_data |= dev->remote_wakeup << USB_DEVICE_REMOTE_WAKEUP;
2118         } else if ((request_type & USB_RECIP_MASK) == USB_RECIP_INTERFACE) {
2119                 /* get interface status */
2120                 status_data = 0;
2121         } else if ((request_type & USB_RECIP_MASK) == USB_RECIP_ENDPOINT) {
2122                 /* get endpoint status */
2123                 struct langwell_ep      *epn;
2124                 epn = get_ep_by_windex(dev, index);
2125                 /* stall if endpoint doesn't exist */
2126                 if (!epn)
2127                         goto stall;
2128
2129                 status_data = ep_is_stall(epn) << USB_ENDPOINT_HALT;
2130         }
2131
2132         dev->ep0_dir = USB_DIR_IN;
2133
2134         /* borrow the per device status_req */
2135         req = dev->status_req;
2136
2137         /* fill in the reqest structure */
2138         *((u16 *) req->req.buf) = cpu_to_le16(status_data);
2139         req->ep = ep;
2140         req->req.length = 2;
2141         req->req.status = -EINPROGRESS;
2142         req->req.actual = 0;
2143         req->req.complete = NULL;
2144         req->dtd_count = 0;
2145
2146         /* prime the data phase */
2147         if (!req_to_dtd(req))
2148                 status = queue_dtd(ep, req);
2149         else                    /* no mem */
2150                 goto stall;
2151
2152         if (status) {
2153                 ERROR(dev, "response error on GET_STATUS request\n");
2154                 goto stall;
2155         }
2156
2157         list_add_tail(&req->queue, &ep->queue);
2158         dev->ep0_state = DATA_STATE_XMIT;
2159
2160         VDBG(dev, "<--- %s()\n", __func__);
2161         return;
2162 stall:
2163         ep0_stall(dev);
2164         VDBG(dev, "<--- %s()\n", __func__);
2165 }
2166
2167
2168 /* setup packet interrupt handler */
2169 static void handle_setup_packet(struct langwell_udc *dev,
2170                 struct usb_ctrlrequest *setup)
2171 {
2172         u16     wValue = le16_to_cpu(setup->wValue);
2173         u16     wIndex = le16_to_cpu(setup->wIndex);
2174         u16     wLength = le16_to_cpu(setup->wLength);
2175
2176         VDBG(dev, "---> %s()\n", __func__);
2177
2178         /* ep0 fifo flush */
2179         nuke(&dev->ep[0], -ESHUTDOWN);
2180
2181         DBG(dev, "SETUP %02x.%02x v%04x i%04x l%04x\n",
2182                         setup->bRequestType, setup->bRequest,
2183                         wValue, wIndex, wLength);
2184
2185         /* RNDIS gadget delegate */
2186         if ((setup->bRequestType == 0x21) && (setup->bRequest == 0x00)) {
2187                 /* USB_CDC_SEND_ENCAPSULATED_COMMAND */
2188                 goto delegate;
2189         }
2190
2191         /* USB_CDC_GET_ENCAPSULATED_RESPONSE */
2192         if ((setup->bRequestType == 0xa1) && (setup->bRequest == 0x01)) {
2193                 /* USB_CDC_GET_ENCAPSULATED_RESPONSE */
2194                 goto delegate;
2195         }
2196
2197         /* We process some stardard setup requests here */
2198         switch (setup->bRequest) {
2199         case USB_REQ_GET_STATUS:
2200                 DBG(dev, "SETUP: USB_REQ_GET_STATUS\n");
2201                 /* get status, DATA and STATUS phase */
2202                 if ((setup->bRequestType & (USB_DIR_IN | USB_TYPE_MASK))
2203                                         != (USB_DIR_IN | USB_TYPE_STANDARD))
2204                         break;
2205                 get_status(dev, setup->bRequestType, wValue, wIndex, wLength);
2206                 goto end;
2207
2208         case USB_REQ_SET_ADDRESS:
2209                 DBG(dev, "SETUP: USB_REQ_SET_ADDRESS\n");
2210                 /* STATUS phase */
2211                 if (setup->bRequestType != (USB_DIR_OUT | USB_TYPE_STANDARD
2212                                                 | USB_RECIP_DEVICE))
2213                         break;
2214                 set_address(dev, wValue, wIndex, wLength);
2215                 goto end;
2216
2217         case USB_REQ_CLEAR_FEATURE:
2218         case USB_REQ_SET_FEATURE:
2219                 /* STATUS phase */
2220         {
2221                 int rc = -EOPNOTSUPP;
2222                 if (setup->bRequest == USB_REQ_SET_FEATURE)
2223                         DBG(dev, "SETUP: USB_REQ_SET_FEATURE\n");
2224                 else if (setup->bRequest == USB_REQ_CLEAR_FEATURE)
2225                         DBG(dev, "SETUP: USB_REQ_CLEAR_FEATURE\n");
2226
2227                 if ((setup->bRequestType & (USB_RECIP_MASK | USB_TYPE_MASK))
2228                                 == (USB_RECIP_ENDPOINT | USB_TYPE_STANDARD)) {
2229                         struct langwell_ep      *epn;
2230                         epn = get_ep_by_windex(dev, wIndex);
2231                         /* stall if endpoint doesn't exist */
2232                         if (!epn) {
2233                                 ep0_stall(dev);
2234                                 goto end;
2235                         }
2236
2237                         if (wValue != 0 || wLength != 0
2238                                         || epn->ep_num > dev->ep_max)
2239                                 break;
2240
2241                         spin_unlock(&dev->lock);
2242                         rc = langwell_ep_set_halt(&epn->ep,
2243                                         (setup->bRequest == USB_REQ_SET_FEATURE)
2244                                                 ? 1 : 0);
2245                         spin_lock(&dev->lock);
2246
2247                 } else if ((setup->bRequestType & (USB_RECIP_MASK
2248                                 | USB_TYPE_MASK)) == (USB_RECIP_DEVICE
2249                                 | USB_TYPE_STANDARD)) {
2250                         if (!gadget_is_otg(&dev->gadget))
2251                                 break;
2252                         else if (setup->bRequest == USB_DEVICE_B_HNP_ENABLE) {
2253                                 dev->gadget.b_hnp_enable = 1;
2254 #ifdef  OTG_TRANSCEIVER
2255                                 if (!dev->lotg->otg.default_a)
2256                                         dev->lotg->hsm.b_hnp_enable = 1;
2257 #endif
2258                         } else if (setup->bRequest == USB_DEVICE_A_HNP_SUPPORT)
2259                                 dev->gadget.a_hnp_support = 1;
2260                         else if (setup->bRequest ==
2261                                         USB_DEVICE_A_ALT_HNP_SUPPORT)
2262                                 dev->gadget.a_alt_hnp_support = 1;
2263                         else
2264                                 break;
2265                         rc = 0;
2266                 } else
2267                         break;
2268
2269                 if (rc == 0) {
2270                         if (prime_status_phase(dev, EP_DIR_IN))
2271                                 ep0_stall(dev);
2272                 }
2273                 goto end;
2274         }
2275
2276         case USB_REQ_GET_DESCRIPTOR:
2277                 DBG(dev, "SETUP: USB_REQ_GET_DESCRIPTOR\n");
2278                 goto delegate;
2279
2280         case USB_REQ_SET_DESCRIPTOR:
2281                 DBG(dev, "SETUP: USB_REQ_SET_DESCRIPTOR unsupported\n");
2282                 goto delegate;
2283
2284         case USB_REQ_GET_CONFIGURATION:
2285                 DBG(dev, "SETUP: USB_REQ_GET_CONFIGURATION\n");
2286                 goto delegate;
2287
2288         case USB_REQ_SET_CONFIGURATION:
2289                 DBG(dev, "SETUP: USB_REQ_SET_CONFIGURATION\n");
2290                 goto delegate;
2291
2292         case USB_REQ_GET_INTERFACE:
2293                 DBG(dev, "SETUP: USB_REQ_GET_INTERFACE\n");
2294                 goto delegate;
2295
2296         case USB_REQ_SET_INTERFACE:
2297                 DBG(dev, "SETUP: USB_REQ_SET_INTERFACE\n");
2298                 goto delegate;
2299
2300         case USB_REQ_SYNCH_FRAME:
2301                 DBG(dev, "SETUP: USB_REQ_SYNCH_FRAME unsupported\n");
2302                 goto delegate;
2303
2304         default:
2305                 /* delegate USB standard requests to the gadget driver */
2306                 goto delegate;
2307 delegate:
2308                 /* USB requests handled by gadget */
2309                 if (wLength) {
2310                         /* DATA phase from gadget, STATUS phase from udc */
2311                         dev->ep0_dir = (setup->bRequestType & USB_DIR_IN)
2312                                         ?  USB_DIR_IN : USB_DIR_OUT;
2313                         VDBG(dev, "dev->ep0_dir = 0x%x, wLength = %d\n",
2314                                         dev->ep0_dir, wLength);
2315                         spin_unlock(&dev->lock);
2316                         if (dev->driver->setup(&dev->gadget,
2317                                         &dev->local_setup_buff) < 0)
2318                                 ep0_stall(dev);
2319                         spin_lock(&dev->lock);
2320                         dev->ep0_state = (setup->bRequestType & USB_DIR_IN)
2321                                         ?  DATA_STATE_XMIT : DATA_STATE_RECV;
2322                 } else {
2323                         /* no DATA phase, IN STATUS phase from gadget */
2324                         dev->ep0_dir = USB_DIR_IN;
2325                         VDBG(dev, "dev->ep0_dir = 0x%x, wLength = %d\n",
2326                                         dev->ep0_dir, wLength);
2327                         spin_unlock(&dev->lock);
2328                         if (dev->driver->setup(&dev->gadget,
2329                                         &dev->local_setup_buff) < 0)
2330                                 ep0_stall(dev);
2331                         spin_lock(&dev->lock);
2332                         dev->ep0_state = WAIT_FOR_OUT_STATUS;
2333                 }
2334                 break;
2335         }
2336 end:
2337         VDBG(dev, "<--- %s()\n", __func__);
2338         return;
2339 }
2340
2341
2342 /* transfer completion, process endpoint request and free the completed dTDs
2343  * for this request
2344  */
2345 static int process_ep_req(struct langwell_udc *dev, int index,
2346                 struct langwell_request *curr_req)
2347 {
2348         struct langwell_dtd     *curr_dtd;
2349         struct langwell_dqh     *curr_dqh;
2350         int                     td_complete, actual, remaining_length;
2351         int                     i, dir;
2352         u8                      dtd_status = 0;
2353         int                     retval = 0;
2354
2355         curr_dqh = &dev->ep_dqh[index];
2356         dir = index % 2;
2357
2358         curr_dtd = curr_req->head;
2359         td_complete = 0;
2360         actual = curr_req->req.length;
2361
2362         VDBG(dev, "---> %s()\n", __func__);
2363
2364         for (i = 0; i < curr_req->dtd_count; i++) {
2365                 remaining_length = le16_to_cpu(curr_dtd->dtd_total);
2366                 actual -= remaining_length;
2367
2368                 /* command execution states by dTD */
2369                 dtd_status = curr_dtd->dtd_status;
2370
2371                 if (!dtd_status) {
2372                         /* transfers completed successfully */
2373                         if (!remaining_length) {
2374                                 td_complete++;
2375                                 VDBG(dev, "dTD transmitted successfully\n");
2376                         } else {
2377                                 if (dir) {
2378                                         VDBG(dev, "TX dTD remains data\n");
2379                                         retval = -EPROTO;
2380                                         break;
2381
2382                                 } else {
2383                                         td_complete++;
2384                                         break;
2385                                 }
2386                         }
2387                 } else {
2388                         /* transfers completed with errors */
2389                         if (dtd_status & DTD_STS_ACTIVE) {
2390                                 DBG(dev, "request not completed\n");
2391                                 retval = 1;
2392                                 return retval;
2393                         } else if (dtd_status & DTD_STS_HALTED) {
2394                                 ERROR(dev, "dTD error %08x dQH[%d]\n",
2395                                                 dtd_status, index);
2396                                 /* clear the errors and halt condition */
2397                                 curr_dqh->dtd_status = 0;
2398                                 retval = -EPIPE;
2399                                 break;
2400                         } else if (dtd_status & DTD_STS_DBE) {
2401                                 DBG(dev, "data buffer (overflow) error\n");
2402                                 retval = -EPROTO;
2403                                 break;
2404                         } else if (dtd_status & DTD_STS_TRE) {
2405                                 DBG(dev, "transaction(ISO) error\n");
2406                                 retval = -EILSEQ;
2407                                 break;
2408                         } else
2409                                 ERROR(dev, "unknown error (0x%x)!\n",
2410                                                 dtd_status);
2411                 }
2412
2413                 if (i != curr_req->dtd_count - 1)
2414                         curr_dtd = (struct langwell_dtd *)
2415                                 curr_dtd->next_dtd_virt;
2416         }
2417
2418         if (retval)
2419                 return retval;
2420
2421         curr_req->req.actual = actual;
2422
2423         VDBG(dev, "<--- %s()\n", __func__);
2424         return 0;
2425 }
2426
2427
2428 /* complete DATA or STATUS phase of ep0 prime status phase if needed */
2429 static void ep0_req_complete(struct langwell_udc *dev,
2430                 struct langwell_ep *ep0, struct langwell_request *req)
2431 {
2432         u32     new_addr;
2433         VDBG(dev, "---> %s()\n", __func__);
2434
2435         if (dev->usb_state == USB_STATE_ADDRESS) {
2436                 /* set the new address */
2437                 new_addr = (u32)dev->dev_addr;
2438                 writel(new_addr << USBADR_SHIFT, &dev->op_regs->deviceaddr);
2439
2440                 new_addr = USBADR(readl(&dev->op_regs->deviceaddr));
2441                 VDBG(dev, "new_addr = %d\n", new_addr);
2442         }
2443
2444         done(ep0, req, 0);
2445
2446         switch (dev->ep0_state) {
2447         case DATA_STATE_XMIT:
2448                 /* receive status phase */
2449                 if (prime_status_phase(dev, EP_DIR_OUT))
2450                         ep0_stall(dev);
2451                 break;
2452         case DATA_STATE_RECV:
2453                 /* send status phase */
2454                 if (prime_status_phase(dev, EP_DIR_IN))
2455                         ep0_stall(dev);
2456                 break;
2457         case WAIT_FOR_OUT_STATUS:
2458                 dev->ep0_state = WAIT_FOR_SETUP;
2459                 break;
2460         case WAIT_FOR_SETUP:
2461                 ERROR(dev, "unexpect ep0 packets\n");
2462                 break;
2463         default:
2464                 ep0_stall(dev);
2465                 break;
2466         }
2467
2468         VDBG(dev, "<--- %s()\n", __func__);
2469 }
2470
2471
2472 /* USB transfer completion interrupt */
2473 static void handle_trans_complete(struct langwell_udc *dev)
2474 {
2475         u32                     complete_bits;
2476         int                     i, ep_num, dir, bit_mask, status;
2477         struct langwell_ep      *epn;
2478         struct langwell_request *curr_req, *temp_req;
2479
2480         VDBG(dev, "---> %s()\n", __func__);
2481
2482         complete_bits = readl(&dev->op_regs->endptcomplete);
2483         VDBG(dev, "endptcomplete register: 0x%08x\n", complete_bits);
2484
2485         /* Write-Clear the bits in endptcomplete register */
2486         writel(complete_bits, &dev->op_regs->endptcomplete);
2487
2488         if (!complete_bits) {
2489                 DBG(dev, "complete_bits = 0\n");
2490                 goto done;
2491         }
2492
2493         for (i = 0; i < dev->ep_max; i++) {
2494                 ep_num = i / 2;
2495                 dir = i % 2;
2496
2497                 bit_mask = 1 << (ep_num + 16 * dir);
2498
2499                 if (!(complete_bits & bit_mask))
2500                         continue;
2501
2502                 /* ep0 */
2503                 if (i == 1)
2504                         epn = &dev->ep[0];
2505                 else
2506                         epn = &dev->ep[i];
2507
2508                 if (epn->name == NULL) {
2509                         WARNING(dev, "invalid endpoint\n");
2510                         continue;
2511                 }
2512
2513                 if (i < 2)
2514                         /* ep0 in and out */
2515                         DBG(dev, "%s-%s transfer completed\n",
2516                                         epn->name,
2517                                         is_in(epn) ? "in" : "out");
2518                 else
2519                         DBG(dev, "%s transfer completed\n", epn->name);
2520
2521                 /* process the req queue until an uncomplete request */
2522                 list_for_each_entry_safe(curr_req, temp_req,
2523                                 &epn->queue, queue) {
2524                         status = process_ep_req(dev, i, curr_req);
2525                         VDBG(dev, "%s req status: %d\n", epn->name, status);
2526
2527                         if (status)
2528                                 break;
2529
2530                         /* write back status to req */
2531                         curr_req->req.status = status;
2532
2533                         /* ep0 request completion */
2534                         if (ep_num == 0) {
2535                                 ep0_req_complete(dev, epn, curr_req);
2536                                 break;
2537                         } else {
2538                                 done(epn, curr_req, status);
2539                         }
2540                 }
2541         }
2542 done:
2543         VDBG(dev, "<--- %s()\n", __func__);
2544         return;
2545 }
2546
2547
2548 /* port change detect interrupt handler */
2549 static void handle_port_change(struct langwell_udc *dev)
2550 {
2551         u32     portsc1, devlc;
2552         u32     speed;
2553
2554         VDBG(dev, "---> %s()\n", __func__);
2555
2556         if (dev->bus_reset)
2557                 dev->bus_reset = 0;
2558
2559         portsc1 = readl(&dev->op_regs->portsc1);
2560         devlc = readl(&dev->op_regs->devlc);
2561         VDBG(dev, "portsc1 = 0x%08x, devlc = 0x%08x\n",
2562                         portsc1, devlc);
2563
2564         /* bus reset is finished */
2565         if (!(portsc1 & PORTS_PR)) {
2566                 /* get the speed */
2567                 speed = LPM_PSPD(devlc);
2568                 switch (speed) {
2569                 case LPM_SPEED_HIGH:
2570                         dev->gadget.speed = USB_SPEED_HIGH;
2571                         break;
2572                 case LPM_SPEED_FULL:
2573                         dev->gadget.speed = USB_SPEED_FULL;
2574                         break;
2575                 case LPM_SPEED_LOW:
2576                         dev->gadget.speed = USB_SPEED_LOW;
2577                         break;
2578                 default:
2579                         dev->gadget.speed = USB_SPEED_UNKNOWN;
2580                         break;
2581                 }
2582                 VDBG(dev, "speed = %d, dev->gadget.speed = %d\n",
2583                                 speed, dev->gadget.speed);
2584         }
2585
2586         /* LPM L0 to L1 */
2587         if (dev->lpm && dev->lpm_state == LPM_L0)
2588                 if (portsc1 & PORTS_SUSP && portsc1 & PORTS_SLP) {
2589                                 INFO(dev, "LPM L0 to L1\n");
2590                                 dev->lpm_state = LPM_L1;
2591                 }
2592
2593         /* LPM L1 to L0, force resume or remote wakeup finished */
2594         if (dev->lpm && dev->lpm_state == LPM_L1)
2595                 if (!(portsc1 & PORTS_SUSP)) {
2596                         if (portsc1 & PORTS_SLP)
2597                                 INFO(dev, "LPM L1 to L0, force resume\n");
2598                         else
2599                                 INFO(dev, "LPM L1 to L0, remote wakeup\n");
2600
2601                         dev->lpm_state = LPM_L0;
2602                 }
2603
2604         /* update USB state */
2605         if (!dev->resume_state)
2606                 dev->usb_state = USB_STATE_DEFAULT;
2607
2608         VDBG(dev, "<--- %s()\n", __func__);
2609 }
2610
2611
2612 /* USB reset interrupt handler */
2613 static void handle_usb_reset(struct langwell_udc *dev)
2614 {
2615         u32             deviceaddr,
2616                         endptsetupstat,
2617                         endptcomplete;
2618         unsigned long   timeout;
2619
2620         VDBG(dev, "---> %s()\n", __func__);
2621
2622         /* Write-Clear the device address */
2623         deviceaddr = readl(&dev->op_regs->deviceaddr);
2624         writel(deviceaddr & ~USBADR_MASK, &dev->op_regs->deviceaddr);
2625
2626         dev->dev_addr = 0;
2627
2628         /* clear usb state */
2629         dev->resume_state = 0;
2630
2631         /* LPM L1 to L0, reset */
2632         if (dev->lpm)
2633                 dev->lpm_state = LPM_L0;
2634
2635         dev->ep0_dir = USB_DIR_OUT;
2636         dev->ep0_state = WAIT_FOR_SETUP;
2637         dev->remote_wakeup = 0;         /* default to 0 on reset */
2638         dev->gadget.b_hnp_enable = 0;
2639         dev->gadget.a_hnp_support = 0;
2640         dev->gadget.a_alt_hnp_support = 0;
2641
2642         /* Write-Clear all the setup token semaphores */
2643         endptsetupstat = readl(&dev->op_regs->endptsetupstat);
2644         writel(endptsetupstat, &dev->op_regs->endptsetupstat);
2645
2646         /* Write-Clear all the endpoint complete status bits */
2647         endptcomplete = readl(&dev->op_regs->endptcomplete);
2648         writel(endptcomplete, &dev->op_regs->endptcomplete);
2649
2650         /* wait until all endptprime bits cleared */
2651         timeout = jiffies + PRIME_TIMEOUT;
2652         while (readl(&dev->op_regs->endptprime)) {
2653                 if (time_after(jiffies, timeout)) {
2654                         ERROR(dev, "USB reset timeout\n");
2655                         break;
2656                 }
2657                 cpu_relax();
2658         }
2659
2660         /* write 1s to endptflush register to clear any primed buffers */
2661         writel((u32) ~0, &dev->op_regs->endptflush);
2662
2663         if (readl(&dev->op_regs->portsc1) & PORTS_PR) {
2664                 VDBG(dev, "USB bus reset\n");
2665                 /* bus is reseting */
2666                 dev->bus_reset = 1;
2667
2668                 /* reset all the queues, stop all USB activities */
2669                 stop_activity(dev, dev->driver);
2670                 dev->usb_state = USB_STATE_DEFAULT;
2671         } else {
2672                 VDBG(dev, "device controller reset\n");
2673                 /* controller reset */
2674                 langwell_udc_reset(dev);
2675
2676                 /* reset all the queues, stop all USB activities */
2677                 stop_activity(dev, dev->driver);
2678
2679                 /* reset ep0 dQH and endptctrl */
2680                 ep0_reset(dev);
2681
2682                 /* enable interrupt and set controller to run state */
2683                 langwell_udc_start(dev);
2684
2685                 dev->usb_state = USB_STATE_ATTACHED;
2686         }
2687
2688 #ifdef  OTG_TRANSCEIVER
2689         /* refer to USB OTG 6.6.2.3 b_hnp_en is cleared */
2690         if (!dev->lotg->otg.default_a)
2691                 dev->lotg->hsm.b_hnp_enable = 0;
2692 #endif
2693
2694         VDBG(dev, "<--- %s()\n", __func__);
2695 }
2696
2697
2698 /* USB bus suspend/resume interrupt */
2699 static void handle_bus_suspend(struct langwell_udc *dev)
2700 {
2701         u32             devlc;
2702         DBG(dev, "---> %s()\n", __func__);
2703
2704         dev->resume_state = dev->usb_state;
2705         dev->usb_state = USB_STATE_SUSPENDED;
2706
2707 #ifdef  OTG_TRANSCEIVER
2708         if (dev->lotg->otg.default_a) {
2709                 if (dev->lotg->hsm.b_bus_suspend_vld == 1) {
2710                         dev->lotg->hsm.b_bus_suspend = 1;
2711                         /* notify transceiver the state changes */
2712                         if (spin_trylock(&dev->lotg->wq_lock)) {
2713                                 langwell_update_transceiver();
2714                                 spin_unlock(&dev->lotg->wq_lock);
2715                         }
2716                 }
2717                 dev->lotg->hsm.b_bus_suspend_vld++;
2718         } else {
2719                 if (!dev->lotg->hsm.a_bus_suspend) {
2720                         dev->lotg->hsm.a_bus_suspend = 1;
2721                         /* notify transceiver the state changes */
2722                         if (spin_trylock(&dev->lotg->wq_lock)) {
2723                                 langwell_update_transceiver();
2724                                 spin_unlock(&dev->lotg->wq_lock);
2725                         }
2726                 }
2727         }
2728 #endif
2729
2730         /* report suspend to the driver */
2731         if (dev->driver) {
2732                 if (dev->driver->suspend) {
2733                         spin_unlock(&dev->lock);
2734                         dev->driver->suspend(&dev->gadget);
2735                         spin_lock(&dev->lock);
2736                         DBG(dev, "suspend %s\n", dev->driver->driver.name);
2737                 }
2738         }
2739
2740         /* enter PHY low power suspend */
2741         devlc = readl(&dev->op_regs->devlc);
2742         VDBG(dev, "devlc = 0x%08x\n", devlc);
2743         devlc |= LPM_PHCD;
2744         writel(devlc, &dev->op_regs->devlc);
2745
2746         DBG(dev, "<--- %s()\n", __func__);
2747 }
2748
2749
2750 static void handle_bus_resume(struct langwell_udc *dev)
2751 {
2752         u32             devlc;
2753         DBG(dev, "---> %s()\n", __func__);
2754
2755         dev->usb_state = dev->resume_state;
2756         dev->resume_state = 0;
2757
2758         /* exit PHY low power suspend */
2759         devlc = readl(&dev->op_regs->devlc);
2760         VDBG(dev, "devlc = 0x%08x\n", devlc);
2761         devlc &= ~LPM_PHCD;
2762         writel(devlc, &dev->op_regs->devlc);
2763
2764 #ifdef  OTG_TRANSCEIVER
2765         if (dev->lotg->otg.default_a == 0)
2766                 dev->lotg->hsm.a_bus_suspend = 0;
2767 #endif
2768
2769         /* report resume to the driver */
2770         if (dev->driver) {
2771                 if (dev->driver->resume) {
2772                         spin_unlock(&dev->lock);
2773                         dev->driver->resume(&dev->gadget);
2774                         spin_lock(&dev->lock);
2775                         DBG(dev, "resume %s\n", dev->driver->driver.name);
2776                 }
2777         }
2778
2779         DBG(dev, "<--- %s()\n", __func__);
2780 }
2781
2782
2783 /* USB device controller interrupt handler */
2784 static irqreturn_t langwell_irq(int irq, void *_dev)
2785 {
2786         struct langwell_udc     *dev = _dev;
2787         u32                     usbsts,
2788                                 usbintr,
2789                                 irq_sts,
2790                                 portsc1;
2791
2792         VDBG(dev, "---> %s()\n", __func__);
2793
2794         if (dev->stopped) {
2795                 VDBG(dev, "handle IRQ_NONE\n");
2796                 VDBG(dev, "<--- %s()\n", __func__);
2797                 return IRQ_NONE;
2798         }
2799
2800         spin_lock(&dev->lock);
2801
2802         /* USB status */
2803         usbsts = readl(&dev->op_regs->usbsts);
2804
2805         /* USB interrupt enable */
2806         usbintr = readl(&dev->op_regs->usbintr);
2807
2808         irq_sts = usbsts & usbintr;
2809         VDBG(dev, "usbsts = 0x%08x, usbintr = 0x%08x, irq_sts = 0x%08x\n",
2810                         usbsts, usbintr, irq_sts);
2811
2812         if (!irq_sts) {
2813                 VDBG(dev, "handle IRQ_NONE\n");
2814                 VDBG(dev, "<--- %s()\n", __func__);
2815                 spin_unlock(&dev->lock);
2816                 return IRQ_NONE;
2817         }
2818
2819         /* Write-Clear interrupt status bits */
2820         writel(irq_sts, &dev->op_regs->usbsts);
2821
2822         /* resume from suspend */
2823         portsc1 = readl(&dev->op_regs->portsc1);
2824         if (dev->usb_state == USB_STATE_SUSPENDED)
2825                 if (!(portsc1 & PORTS_SUSP))
2826                         handle_bus_resume(dev);
2827
2828         /* USB interrupt */
2829         if (irq_sts & STS_UI) {
2830                 VDBG(dev, "USB interrupt\n");
2831
2832                 /* setup packet received from ep0 */
2833                 if (readl(&dev->op_regs->endptsetupstat)
2834                                 & EP0SETUPSTAT_MASK) {
2835                         VDBG(dev, "USB SETUP packet received interrupt\n");
2836                         /* setup tripwire semaphone */
2837                         setup_tripwire(dev);
2838                         handle_setup_packet(dev, &dev->local_setup_buff);
2839                 }
2840
2841                 /* USB transfer completion */
2842                 if (readl(&dev->op_regs->endptcomplete)) {
2843                         VDBG(dev, "USB transfer completion interrupt\n");
2844                         handle_trans_complete(dev);
2845                 }
2846         }
2847
2848         /* SOF received interrupt (for ISO transfer) */
2849         if (irq_sts & STS_SRI) {
2850                 /* FIXME */
2851                 /* VDBG(dev, "SOF received interrupt\n"); */
2852         }
2853
2854         /* port change detect interrupt */
2855         if (irq_sts & STS_PCI) {
2856                 VDBG(dev, "port change detect interrupt\n");
2857                 handle_port_change(dev);
2858         }
2859
2860         /* suspend interrrupt */
2861         if (irq_sts & STS_SLI) {
2862                 VDBG(dev, "suspend interrupt\n");
2863                 handle_bus_suspend(dev);
2864         }
2865
2866         /* USB reset interrupt */
2867         if (irq_sts & STS_URI) {
2868                 VDBG(dev, "USB reset interrupt\n");
2869                 handle_usb_reset(dev);
2870         }
2871
2872         /* USB error or system error interrupt */
2873         if (irq_sts & (STS_UEI | STS_SEI)) {
2874                 /* FIXME */
2875                 WARNING(dev, "error IRQ, irq_sts: %x\n", irq_sts);
2876         }
2877
2878         spin_unlock(&dev->lock);
2879
2880         VDBG(dev, "<--- %s()\n", __func__);
2881         return IRQ_HANDLED;
2882 }
2883
2884
2885 /*-------------------------------------------------------------------------*/
2886
2887 /* release device structure */
2888 static void gadget_release(struct device *_dev)
2889 {
2890         struct langwell_udc     *dev = the_controller;
2891
2892         DBG(dev, "---> %s()\n", __func__);
2893
2894         complete(dev->done);
2895
2896         DBG(dev, "<--- %s()\n", __func__);
2897         kfree(dev);
2898 }
2899
2900
2901 /* tear down the binding between this driver and the pci device */
2902 static void langwell_udc_remove(struct pci_dev *pdev)
2903 {
2904         struct langwell_udc     *dev = the_controller;
2905
2906         DECLARE_COMPLETION(done);
2907
2908         BUG_ON(dev->driver);
2909         DBG(dev, "---> %s()\n", __func__);
2910
2911         dev->done = &done;
2912
2913         /* free memory allocated in probe */
2914         if (dev->dtd_pool)
2915                 dma_pool_destroy(dev->dtd_pool);
2916
2917         if (dev->status_req) {
2918                 kfree(dev->status_req->req.buf);
2919                 kfree(dev->status_req);
2920         }
2921
2922         if (dev->ep_dqh)
2923                 dma_free_coherent(&pdev->dev, dev->ep_dqh_size,
2924                         dev->ep_dqh, dev->ep_dqh_dma);
2925
2926         kfree(dev->ep);
2927
2928         /* diable IRQ handler */
2929         if (dev->got_irq)
2930                 free_irq(pdev->irq, dev);
2931
2932 #ifndef OTG_TRANSCEIVER
2933         if (dev->cap_regs)
2934                 iounmap(dev->cap_regs);
2935
2936         if (dev->region)
2937                 release_mem_region(pci_resource_start(pdev, 0),
2938                                 pci_resource_len(pdev, 0));
2939
2940         if (dev->enabled)
2941                 pci_disable_device(pdev);
2942 #else
2943         if (dev->transceiver) {
2944                 otg_put_transceiver(dev->transceiver);
2945                 dev->transceiver = NULL;
2946                 dev->lotg = NULL;
2947         }
2948 #endif
2949
2950         dev->cap_regs = NULL;
2951
2952         INFO(dev, "unbind\n");
2953         DBG(dev, "<--- %s()\n", __func__);
2954
2955         device_unregister(&dev->gadget.dev);
2956         device_remove_file(&pdev->dev, &dev_attr_langwell_udc);
2957
2958 #ifndef OTG_TRANSCEIVER
2959         pci_set_drvdata(pdev, NULL);
2960 #endif
2961
2962         /* free dev, wait for the release() finished */
2963         wait_for_completion(&done);
2964
2965         the_controller = NULL;
2966 }
2967
2968
2969 /*
2970  * wrap this driver around the specified device, but
2971  * don't respond over USB until a gadget driver binds to us.
2972  */
2973 static int langwell_udc_probe(struct pci_dev *pdev,
2974                 const struct pci_device_id *id)
2975 {
2976         struct langwell_udc     *dev;
2977 #ifndef OTG_TRANSCEIVER
2978         unsigned long           resource, len;
2979 #endif
2980         void                    __iomem *base = NULL;
2981         size_t                  size;
2982         int                     retval;
2983
2984         if (the_controller) {
2985                 dev_warn(&pdev->dev, "ignoring\n");
2986                 return -EBUSY;
2987         }
2988
2989         /* alloc, and start init */
2990         dev = kzalloc(sizeof *dev, GFP_KERNEL);
2991         if (dev == NULL) {
2992                 retval = -ENOMEM;
2993                 goto error;
2994         }
2995
2996         /* initialize device spinlock */
2997         spin_lock_init(&dev->lock);
2998
2999         dev->pdev = pdev;
3000         DBG(dev, "---> %s()\n", __func__);
3001
3002 #ifdef  OTG_TRANSCEIVER
3003         /* PCI device is already enabled by otg_transceiver driver */
3004         dev->enabled = 1;
3005
3006         /* mem region and register base */
3007         dev->region = 1;
3008         dev->transceiver = otg_get_transceiver();
3009         dev->lotg = otg_to_langwell(dev->transceiver);
3010         base = dev->lotg->regs;
3011 #else
3012         pci_set_drvdata(pdev, dev);
3013
3014         /* now all the pci goodies ... */
3015         if (pci_enable_device(pdev) < 0) {
3016                 retval = -ENODEV;
3017                 goto error;
3018         }
3019         dev->enabled = 1;
3020
3021         /* control register: BAR 0 */
3022         resource = pci_resource_start(pdev, 0);
3023         len = pci_resource_len(pdev, 0);
3024         if (!request_mem_region(resource, len, driver_name)) {
3025                 ERROR(dev, "controller already in use\n");
3026                 retval = -EBUSY;
3027                 goto error;
3028         }
3029         dev->region = 1;
3030
3031         base = ioremap_nocache(resource, len);
3032 #endif
3033         if (base == NULL) {
3034                 ERROR(dev, "can't map memory\n");
3035                 retval = -EFAULT;
3036                 goto error;
3037         }
3038
3039         dev->cap_regs = (struct langwell_cap_regs __iomem *) base;
3040         VDBG(dev, "dev->cap_regs: %p\n", dev->cap_regs);
3041         dev->op_regs = (struct langwell_op_regs __iomem *)
3042                 (base + OP_REG_OFFSET);
3043         VDBG(dev, "dev->op_regs: %p\n", dev->op_regs);
3044
3045         /* irq setup after old hardware is cleaned up */
3046         if (!pdev->irq) {
3047                 ERROR(dev, "No IRQ. Check PCI setup!\n");
3048                 retval = -ENODEV;
3049                 goto error;
3050         }
3051
3052 #ifndef OTG_TRANSCEIVER
3053         INFO(dev, "irq %d, io mem: 0x%08lx, len: 0x%08lx, pci mem 0x%p\n",
3054                         pdev->irq, resource, len, base);
3055         /* enables bus-mastering for device dev */
3056         pci_set_master(pdev);
3057
3058         if (request_irq(pdev->irq, langwell_irq, IRQF_SHARED,
3059                                 driver_name, dev) != 0) {
3060                 ERROR(dev, "request interrupt %d failed\n", pdev->irq);
3061                 retval = -EBUSY;
3062                 goto error;
3063         }
3064         dev->got_irq = 1;
3065 #endif
3066
3067         /* set stopped bit */
3068         dev->stopped = 1;
3069
3070         /* capabilities and endpoint number */
3071         dev->lpm = (readl(&dev->cap_regs->hccparams) & HCC_LEN) ? 1 : 0;
3072         dev->dciversion = readw(&dev->cap_regs->dciversion);
3073         dev->devcap = (readl(&dev->cap_regs->dccparams) & DEVCAP) ? 1 : 0;
3074         VDBG(dev, "dev->lpm: %d\n", dev->lpm);
3075         VDBG(dev, "dev->dciversion: 0x%04x\n", dev->dciversion);
3076         VDBG(dev, "dccparams: 0x%08x\n", readl(&dev->cap_regs->dccparams));
3077         VDBG(dev, "dev->devcap: %d\n", dev->devcap);
3078         if (!dev->devcap) {
3079                 ERROR(dev, "can't support device mode\n");
3080                 retval = -ENODEV;
3081                 goto error;
3082         }
3083
3084         /* a pair of endpoints (out/in) for each address */
3085         dev->ep_max = DEN(readl(&dev->cap_regs->dccparams)) * 2;
3086         VDBG(dev, "dev->ep_max: %d\n", dev->ep_max);
3087
3088         /* allocate endpoints memory */
3089         dev->ep = kzalloc(sizeof(struct langwell_ep) * dev->ep_max,
3090                         GFP_KERNEL);
3091         if (!dev->ep) {
3092                 ERROR(dev, "allocate endpoints memory failed\n");
3093                 retval = -ENOMEM;
3094                 goto error;
3095         }
3096
3097         /* allocate device dQH memory */
3098         size = dev->ep_max * sizeof(struct langwell_dqh);
3099         VDBG(dev, "orig size = %d\n", size);
3100         if (size < DQH_ALIGNMENT)
3101                 size = DQH_ALIGNMENT;
3102         else if ((size % DQH_ALIGNMENT) != 0) {
3103                 size += DQH_ALIGNMENT + 1;
3104                 size &= ~(DQH_ALIGNMENT - 1);
3105         }
3106         dev->ep_dqh = dma_alloc_coherent(&pdev->dev, size,
3107                                         &dev->ep_dqh_dma, GFP_KERNEL);
3108         if (!dev->ep_dqh) {
3109                 ERROR(dev, "allocate dQH memory failed\n");
3110                 retval = -ENOMEM;
3111                 goto error;
3112         }
3113         dev->ep_dqh_size = size;
3114         VDBG(dev, "ep_dqh_size = %d\n", dev->ep_dqh_size);
3115
3116         /* initialize ep0 status request structure */
3117         dev->status_req = kzalloc(sizeof(struct langwell_request), GFP_KERNEL);
3118         if (!dev->status_req) {
3119                 ERROR(dev, "allocate status_req memory failed\n");
3120                 retval = -ENOMEM;
3121                 goto error;
3122         }
3123         INIT_LIST_HEAD(&dev->status_req->queue);
3124
3125         /* allocate a small amount of memory to get valid address */
3126         dev->status_req->req.buf = kmalloc(8, GFP_KERNEL);
3127         dev->status_req->req.dma = virt_to_phys(dev->status_req->req.buf);
3128
3129         dev->resume_state = USB_STATE_NOTATTACHED;
3130         dev->usb_state = USB_STATE_POWERED;
3131         dev->ep0_dir = USB_DIR_OUT;
3132         dev->remote_wakeup = 0; /* default to 0 on reset */
3133
3134 #ifndef OTG_TRANSCEIVER
3135         /* reset device controller */
3136         langwell_udc_reset(dev);
3137 #endif
3138
3139         /* initialize gadget structure */
3140         dev->gadget.ops = &langwell_ops;        /* usb_gadget_ops */
3141         dev->gadget.ep0 = &dev->ep[0].ep;       /* gadget ep0 */
3142         INIT_LIST_HEAD(&dev->gadget.ep_list);   /* ep_list */
3143         dev->gadget.speed = USB_SPEED_UNKNOWN;  /* speed */
3144         dev->gadget.is_dualspeed = 1;           /* support dual speed */
3145 #ifdef  OTG_TRANSCEIVER
3146         dev->gadget.is_otg = 1;                 /* support otg mode */
3147 #endif
3148
3149         /* the "gadget" abstracts/virtualizes the controller */
3150         dev_set_name(&dev->gadget.dev, "gadget");
3151         dev->gadget.dev.parent = &pdev->dev;
3152         dev->gadget.dev.dma_mask = pdev->dev.dma_mask;
3153         dev->gadget.dev.release = gadget_release;
3154         dev->gadget.name = driver_name;         /* gadget name */
3155
3156         /* controller endpoints reinit */
3157         eps_reinit(dev);
3158
3159 #ifndef OTG_TRANSCEIVER
3160         /* reset ep0 dQH and endptctrl */
3161         ep0_reset(dev);
3162 #endif
3163
3164         /* create dTD dma_pool resource */
3165         dev->dtd_pool = dma_pool_create("langwell_dtd",
3166                         &dev->pdev->dev,
3167                         sizeof(struct langwell_dtd),
3168                         DTD_ALIGNMENT,
3169                         DMA_BOUNDARY);
3170
3171         if (!dev->dtd_pool) {
3172                 retval = -ENOMEM;
3173                 goto error;
3174         }
3175
3176         /* done */
3177         INFO(dev, "%s\n", driver_desc);
3178         INFO(dev, "irq %d, pci mem %p\n", pdev->irq, base);
3179         INFO(dev, "Driver version: " DRIVER_VERSION "\n");
3180         INFO(dev, "Support (max) %d endpoints\n", dev->ep_max);
3181         INFO(dev, "Device interface version: 0x%04x\n", dev->dciversion);
3182         INFO(dev, "Controller mode: %s\n", dev->devcap ? "Device" : "Host");
3183         INFO(dev, "Support USB LPM: %s\n", dev->lpm ? "Yes" : "No");
3184
3185         VDBG(dev, "After langwell_udc_probe(), print all registers:\n");
3186 #ifdef  VERBOSE
3187         print_all_registers(dev);
3188 #endif
3189
3190         the_controller = dev;
3191
3192         retval = device_register(&dev->gadget.dev);
3193         if (retval)
3194                 goto error;
3195
3196         retval = device_create_file(&pdev->dev, &dev_attr_langwell_udc);
3197         if (retval)
3198                 goto error;
3199
3200         VDBG(dev, "<--- %s()\n", __func__);
3201         return 0;
3202
3203 error:
3204         if (dev) {
3205                 DBG(dev, "<--- %s()\n", __func__);
3206                 langwell_udc_remove(pdev);
3207         }
3208
3209         return retval;
3210 }
3211
3212
3213 /* device controller suspend */
3214 static int langwell_udc_suspend(struct pci_dev *pdev, pm_message_t state)
3215 {
3216         struct langwell_udc     *dev = the_controller;
3217         u32                     devlc;
3218
3219         DBG(dev, "---> %s()\n", __func__);
3220
3221         /* disable interrupt and set controller to stop state */
3222         langwell_udc_stop(dev);
3223
3224         /* diable IRQ handler */
3225         if (dev->got_irq)
3226                 free_irq(pdev->irq, dev);
3227         dev->got_irq = 0;
3228
3229
3230         /* save PCI state */
3231         pci_save_state(pdev);
3232
3233         /* set device power state */
3234         pci_set_power_state(pdev, PCI_D3hot);
3235
3236         /* enter PHY low power suspend */
3237         devlc = readl(&dev->op_regs->devlc);
3238         VDBG(dev, "devlc = 0x%08x\n", devlc);
3239         devlc |= LPM_PHCD;
3240         writel(devlc, &dev->op_regs->devlc);
3241
3242         DBG(dev, "<--- %s()\n", __func__);
3243         return 0;
3244 }
3245
3246
3247 /* device controller resume */
3248 static int langwell_udc_resume(struct pci_dev *pdev)
3249 {
3250         struct langwell_udc     *dev = the_controller;
3251         u32                     devlc;
3252
3253         DBG(dev, "---> %s()\n", __func__);
3254
3255         /* exit PHY low power suspend */
3256         devlc = readl(&dev->op_regs->devlc);
3257         VDBG(dev, "devlc = 0x%08x\n", devlc);
3258         devlc &= ~LPM_PHCD;
3259         writel(devlc, &dev->op_regs->devlc);
3260
3261         /* set device D0 power state */
3262         pci_set_power_state(pdev, PCI_D0);
3263
3264         /* restore PCI state */
3265         pci_restore_state(pdev);
3266
3267         /* enable IRQ handler */
3268         if (request_irq(pdev->irq, langwell_irq, IRQF_SHARED, driver_name, dev)
3269                         != 0) {
3270                 ERROR(dev, "request interrupt %d failed\n", pdev->irq);
3271                 return -1;
3272         }
3273         dev->got_irq = 1;
3274
3275         /* reset and start controller to run state */
3276         if (dev->stopped) {
3277                 /* reset device controller */
3278                 langwell_udc_reset(dev);
3279
3280                 /* reset ep0 dQH and endptctrl */
3281                 ep0_reset(dev);
3282
3283                 /* start device if gadget is loaded */
3284                 if (dev->driver)
3285                         langwell_udc_start(dev);
3286         }
3287
3288         /* reset USB status */
3289         dev->usb_state = USB_STATE_ATTACHED;
3290         dev->ep0_state = WAIT_FOR_SETUP;
3291         dev->ep0_dir = USB_DIR_OUT;
3292
3293         DBG(dev, "<--- %s()\n", __func__);
3294         return 0;
3295 }
3296
3297
3298 /* pci driver shutdown */
3299 static void langwell_udc_shutdown(struct pci_dev *pdev)
3300 {
3301         struct langwell_udc     *dev = the_controller;
3302         u32                     usbmode;
3303
3304         DBG(dev, "---> %s()\n", __func__);
3305
3306         /* reset controller mode to IDLE */
3307         usbmode = readl(&dev->op_regs->usbmode);
3308         DBG(dev, "usbmode = 0x%08x\n", usbmode);
3309         usbmode &= (~3 | MODE_IDLE);
3310         writel(usbmode, &dev->op_regs->usbmode);
3311
3312         DBG(dev, "<--- %s()\n", __func__);
3313 }
3314
3315 /*-------------------------------------------------------------------------*/
3316
3317 static const struct pci_device_id pci_ids[] = { {
3318         .class =        ((PCI_CLASS_SERIAL_USB << 8) | 0xfe),
3319         .class_mask =   ~0,
3320         .vendor =       0x8086,
3321         .device =       0x0811,
3322         .subvendor =    PCI_ANY_ID,
3323         .subdevice =    PCI_ANY_ID,
3324 }, { /* end: all zeroes */ }
3325 };
3326
3327
3328 MODULE_DEVICE_TABLE(pci, pci_ids);
3329
3330
3331 static struct pci_driver langwell_pci_driver = {
3332         .name =         (char *) driver_name,
3333         .id_table =     pci_ids,
3334
3335         .probe =        langwell_udc_probe,
3336         .remove =       langwell_udc_remove,
3337
3338         /* device controller suspend/resume */
3339         .suspend =      langwell_udc_suspend,
3340         .resume =       langwell_udc_resume,
3341
3342         .shutdown =     langwell_udc_shutdown,
3343 };
3344
3345
3346 MODULE_DESCRIPTION(DRIVER_DESC);
3347 MODULE_AUTHOR("Xiaochen Shen <xiaochen.shen@intel.com>");
3348 MODULE_VERSION(DRIVER_VERSION);
3349 MODULE_LICENSE("GPL");
3350
3351
3352 static int __init init(void)
3353 {
3354 #ifdef  OTG_TRANSCEIVER
3355         return langwell_register_peripheral(&langwell_pci_driver);
3356 #else
3357         return pci_register_driver(&langwell_pci_driver);
3358 #endif
3359 }
3360 module_init(init);
3361
3362
3363 static void __exit cleanup(void)
3364 {
3365 #ifdef  OTG_TRANSCEIVER
3366         return langwell_unregister_peripheral(&langwell_pci_driver);
3367 #else
3368         pci_unregister_driver(&langwell_pci_driver);
3369 #endif
3370 }
3371 module_exit(cleanup);
3372