2 * M66592 UDC (USB gadget)
4 * Copyright (C) 2006-2007 Renesas Solutions Corp.
6 * Author : Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; version 2 of the License.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
23 #include <linux/module.h>
24 #include <linux/interrupt.h>
25 #include <linux/delay.h>
27 #include <linux/platform_device.h>
28 #include <linux/err.h>
29 #include <linux/usb/ch9.h>
30 #include <linux/usb/gadget.h>
32 #include "m66592-udc.h"
34 MODULE_DESCRIPTION("M66592 USB gadget driver");
35 MODULE_LICENSE("GPL");
36 MODULE_AUTHOR("Yoshihiro Shimoda");
37 MODULE_ALIAS("platform:m66592_udc");
39 #define DRIVER_VERSION "21 July 2009"
41 static const char udc_name[] = "m66592_udc";
42 static const char *m66592_ep_name[] = {
43 "ep0", "ep1", "ep2", "ep3", "ep4", "ep5", "ep6", "ep7"
46 static void disable_controller(struct m66592 *m66592);
47 static void irq_ep0_write(struct m66592_ep *ep, struct m66592_request *req);
48 static void irq_packet_write(struct m66592_ep *ep, struct m66592_request *req);
49 static int m66592_queue(struct usb_ep *_ep, struct usb_request *_req,
52 static void transfer_complete(struct m66592_ep *ep,
53 struct m66592_request *req, int status);
55 /*-------------------------------------------------------------------------*/
56 static inline u16 get_usb_speed(struct m66592 *m66592)
58 return (m66592_read(m66592, M66592_DVSTCTR) & M66592_RHST);
61 static void enable_pipe_irq(struct m66592 *m66592, u16 pipenum,
66 tmp = m66592_read(m66592, M66592_INTENB0);
67 m66592_bclr(m66592, M66592_BEMPE | M66592_NRDYE | M66592_BRDYE,
69 m66592_bset(m66592, (1 << pipenum), reg);
70 m66592_write(m66592, tmp, M66592_INTENB0);
73 static void disable_pipe_irq(struct m66592 *m66592, u16 pipenum,
78 tmp = m66592_read(m66592, M66592_INTENB0);
79 m66592_bclr(m66592, M66592_BEMPE | M66592_NRDYE | M66592_BRDYE,
81 m66592_bclr(m66592, (1 << pipenum), reg);
82 m66592_write(m66592, tmp, M66592_INTENB0);
85 static void m66592_usb_connect(struct m66592 *m66592)
87 m66592_bset(m66592, M66592_CTRE, M66592_INTENB0);
88 m66592_bset(m66592, M66592_WDST | M66592_RDST | M66592_CMPL,
90 m66592_bset(m66592, M66592_BEMPE | M66592_BRDYE, M66592_INTENB0);
92 m66592_bset(m66592, M66592_DPRPU, M66592_SYSCFG);
95 static void m66592_usb_disconnect(struct m66592 *m66592)
96 __releases(m66592->lock)
97 __acquires(m66592->lock)
99 m66592_bclr(m66592, M66592_CTRE, M66592_INTENB0);
100 m66592_bclr(m66592, M66592_WDST | M66592_RDST | M66592_CMPL,
102 m66592_bclr(m66592, M66592_BEMPE | M66592_BRDYE, M66592_INTENB0);
103 m66592_bclr(m66592, M66592_DPRPU, M66592_SYSCFG);
105 m66592->gadget.speed = USB_SPEED_UNKNOWN;
106 spin_unlock(&m66592->lock);
107 m66592->driver->disconnect(&m66592->gadget);
108 spin_lock(&m66592->lock);
110 disable_controller(m66592);
111 INIT_LIST_HEAD(&m66592->ep[0].queue);
114 static inline u16 control_reg_get_pid(struct m66592 *m66592, u16 pipenum)
117 unsigned long offset;
120 pid = m66592_read(m66592, M66592_DCPCTR) & M66592_PID;
121 else if (pipenum < M66592_MAX_NUM_PIPE) {
122 offset = get_pipectr_addr(pipenum);
123 pid = m66592_read(m66592, offset) & M66592_PID;
125 pr_err("unexpect pipe num (%d)\n", pipenum);
130 static inline void control_reg_set_pid(struct m66592 *m66592, u16 pipenum,
133 unsigned long offset;
136 m66592_mdfy(m66592, pid, M66592_PID, M66592_DCPCTR);
137 else if (pipenum < M66592_MAX_NUM_PIPE) {
138 offset = get_pipectr_addr(pipenum);
139 m66592_mdfy(m66592, pid, M66592_PID, offset);
141 pr_err("unexpect pipe num (%d)\n", pipenum);
144 static inline void pipe_start(struct m66592 *m66592, u16 pipenum)
146 control_reg_set_pid(m66592, pipenum, M66592_PID_BUF);
149 static inline void pipe_stop(struct m66592 *m66592, u16 pipenum)
151 control_reg_set_pid(m66592, pipenum, M66592_PID_NAK);
154 static inline void pipe_stall(struct m66592 *m66592, u16 pipenum)
156 control_reg_set_pid(m66592, pipenum, M66592_PID_STALL);
159 static inline u16 control_reg_get(struct m66592 *m66592, u16 pipenum)
162 unsigned long offset;
165 ret = m66592_read(m66592, M66592_DCPCTR);
166 else if (pipenum < M66592_MAX_NUM_PIPE) {
167 offset = get_pipectr_addr(pipenum);
168 ret = m66592_read(m66592, offset);
170 pr_err("unexpect pipe num (%d)\n", pipenum);
175 static inline void control_reg_sqclr(struct m66592 *m66592, u16 pipenum)
177 unsigned long offset;
179 pipe_stop(m66592, pipenum);
182 m66592_bset(m66592, M66592_SQCLR, M66592_DCPCTR);
183 else if (pipenum < M66592_MAX_NUM_PIPE) {
184 offset = get_pipectr_addr(pipenum);
185 m66592_bset(m66592, M66592_SQCLR, offset);
187 pr_err("unexpect pipe num(%d)\n", pipenum);
190 static inline int get_buffer_size(struct m66592 *m66592, u16 pipenum)
196 tmp = m66592_read(m66592, M66592_DCPCFG);
197 if ((tmp & M66592_CNTMD) != 0)
200 tmp = m66592_read(m66592, M66592_DCPMAXP);
201 size = tmp & M66592_MAXP;
204 m66592_write(m66592, pipenum, M66592_PIPESEL);
205 tmp = m66592_read(m66592, M66592_PIPECFG);
206 if ((tmp & M66592_CNTMD) != 0) {
207 tmp = m66592_read(m66592, M66592_PIPEBUF);
208 size = ((tmp >> 10) + 1) * 64;
210 tmp = m66592_read(m66592, M66592_PIPEMAXP);
211 size = tmp & M66592_MXPS;
218 static inline void pipe_change(struct m66592 *m66592, u16 pipenum)
220 struct m66592_ep *ep = m66592->pipenum2ep[pipenum];
226 m66592_mdfy(m66592, pipenum, M66592_CURPIPE, ep->fifosel);
230 if (m66592->pdata->on_chip)
235 m66592_bset(m66592, mbw, ep->fifosel);
238 static int pipe_buffer_setting(struct m66592 *m66592,
239 struct m66592_pipe_info *info)
241 u16 bufnum = 0, buf_bsize = 0;
247 m66592_write(m66592, info->pipe, M66592_PIPESEL);
250 pipecfg |= M66592_DIR;
251 pipecfg |= info->type;
252 pipecfg |= info->epnum;
253 switch (info->type) {
255 bufnum = 4 + (info->pipe - M66592_BASE_PIPENUM_INT);
259 /* isochronous pipes may be used as bulk pipes */
260 if (info->pipe > M66592_BASE_PIPENUM_BULK)
261 bufnum = info->pipe - M66592_BASE_PIPENUM_BULK;
263 bufnum = info->pipe - M66592_BASE_PIPENUM_ISOC;
265 bufnum = M66592_BASE_BUFNUM + (bufnum * 16);
267 pipecfg |= M66592_DBLB;
269 pipecfg |= M66592_SHTNAK;
272 bufnum = M66592_BASE_BUFNUM +
273 (info->pipe - M66592_BASE_PIPENUM_ISOC) * 16;
278 if (buf_bsize && ((bufnum + 16) >= M66592_MAX_BUFNUM)) {
279 pr_err("m66592 pipe memory is insufficient\n");
283 m66592_write(m66592, pipecfg, M66592_PIPECFG);
284 m66592_write(m66592, (buf_bsize << 10) | (bufnum), M66592_PIPEBUF);
285 m66592_write(m66592, info->maxpacket, M66592_PIPEMAXP);
288 m66592_write(m66592, info->interval, M66592_PIPEPERI);
293 static void pipe_buffer_release(struct m66592 *m66592,
294 struct m66592_pipe_info *info)
299 if (is_bulk_pipe(info->pipe)) {
301 } else if (is_interrupt_pipe(info->pipe))
303 else if (is_isoc_pipe(info->pipe)) {
304 m66592->isochronous--;
305 if (info->type == M66592_BULK)
308 pr_err("ep_release: unexpect pipenum (%d)\n",
312 static void pipe_initialize(struct m66592_ep *ep)
314 struct m66592 *m66592 = ep->m66592;
317 m66592_mdfy(m66592, 0, M66592_CURPIPE, ep->fifosel);
319 m66592_write(m66592, M66592_ACLRM, ep->pipectr);
320 m66592_write(m66592, 0, ep->pipectr);
321 m66592_write(m66592, M66592_SQCLR, ep->pipectr);
323 m66592_mdfy(m66592, ep->pipenum, M66592_CURPIPE, ep->fifosel);
327 if (m66592->pdata->on_chip)
332 m66592_bset(m66592, mbw, ep->fifosel);
336 static void m66592_ep_setting(struct m66592 *m66592, struct m66592_ep *ep,
337 const struct usb_endpoint_descriptor *desc,
338 u16 pipenum, int dma)
340 if ((pipenum != 0) && dma) {
341 if (m66592->num_dma == 0) {
344 ep->fifoaddr = M66592_D0FIFO;
345 ep->fifosel = M66592_D0FIFOSEL;
346 ep->fifoctr = M66592_D0FIFOCTR;
347 ep->fifotrn = M66592_D0FIFOTRN;
348 } else if (!m66592->pdata->on_chip && m66592->num_dma == 1) {
351 ep->fifoaddr = M66592_D1FIFO;
352 ep->fifosel = M66592_D1FIFOSEL;
353 ep->fifoctr = M66592_D1FIFOCTR;
354 ep->fifotrn = M66592_D1FIFOTRN;
357 ep->fifoaddr = M66592_CFIFO;
358 ep->fifosel = M66592_CFIFOSEL;
359 ep->fifoctr = M66592_CFIFOCTR;
364 ep->fifoaddr = M66592_CFIFO;
365 ep->fifosel = M66592_CFIFOSEL;
366 ep->fifoctr = M66592_CFIFOCTR;
370 ep->pipectr = get_pipectr_addr(pipenum);
371 ep->pipenum = pipenum;
372 ep->ep.maxpacket = le16_to_cpu(desc->wMaxPacketSize);
373 m66592->pipenum2ep[pipenum] = ep;
374 m66592->epaddr2ep[desc->bEndpointAddress&USB_ENDPOINT_NUMBER_MASK] = ep;
375 INIT_LIST_HEAD(&ep->queue);
378 static void m66592_ep_release(struct m66592_ep *ep)
380 struct m66592 *m66592 = ep->m66592;
381 u16 pipenum = ep->pipenum;
393 static int alloc_pipe_config(struct m66592_ep *ep,
394 const struct usb_endpoint_descriptor *desc)
396 struct m66592 *m66592 = ep->m66592;
397 struct m66592_pipe_info info;
406 switch (desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK) {
407 case USB_ENDPOINT_XFER_BULK:
408 if (m66592->bulk >= M66592_MAX_NUM_BULK) {
409 if (m66592->isochronous >= M66592_MAX_NUM_ISOC) {
410 pr_err("bulk pipe is insufficient\n");
413 info.pipe = M66592_BASE_PIPENUM_ISOC
414 + m66592->isochronous;
415 counter = &m66592->isochronous;
418 info.pipe = M66592_BASE_PIPENUM_BULK + m66592->bulk;
419 counter = &m66592->bulk;
421 info.type = M66592_BULK;
424 case USB_ENDPOINT_XFER_INT:
425 if (m66592->interrupt >= M66592_MAX_NUM_INT) {
426 pr_err("interrupt pipe is insufficient\n");
429 info.pipe = M66592_BASE_PIPENUM_INT + m66592->interrupt;
430 info.type = M66592_INT;
431 counter = &m66592->interrupt;
433 case USB_ENDPOINT_XFER_ISOC:
434 if (m66592->isochronous >= M66592_MAX_NUM_ISOC) {
435 pr_err("isochronous pipe is insufficient\n");
438 info.pipe = M66592_BASE_PIPENUM_ISOC + m66592->isochronous;
439 info.type = M66592_ISO;
440 counter = &m66592->isochronous;
443 pr_err("unexpect xfer type\n");
446 ep->type = info.type;
448 info.epnum = desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK;
449 info.maxpacket = le16_to_cpu(desc->wMaxPacketSize);
450 info.interval = desc->bInterval;
451 if (desc->bEndpointAddress & USB_ENDPOINT_DIR_MASK)
456 ret = pipe_buffer_setting(m66592, &info);
458 pr_err("pipe_buffer_setting fail\n");
463 if ((counter == &m66592->isochronous) && info.type == M66592_BULK)
466 m66592_ep_setting(m66592, ep, desc, info.pipe, dma);
472 static int free_pipe_config(struct m66592_ep *ep)
474 struct m66592 *m66592 = ep->m66592;
475 struct m66592_pipe_info info;
477 info.pipe = ep->pipenum;
478 info.type = ep->type;
479 pipe_buffer_release(m66592, &info);
480 m66592_ep_release(ep);
485 /*-------------------------------------------------------------------------*/
486 static void pipe_irq_enable(struct m66592 *m66592, u16 pipenum)
488 enable_irq_ready(m66592, pipenum);
489 enable_irq_nrdy(m66592, pipenum);
492 static void pipe_irq_disable(struct m66592 *m66592, u16 pipenum)
494 disable_irq_ready(m66592, pipenum);
495 disable_irq_nrdy(m66592, pipenum);
498 /* if complete is true, gadget driver complete function is not call */
499 static void control_end(struct m66592 *m66592, unsigned ccpl)
501 m66592->ep[0].internal_ccpl = ccpl;
502 pipe_start(m66592, 0);
503 m66592_bset(m66592, M66592_CCPL, M66592_DCPCTR);
506 static void start_ep0_write(struct m66592_ep *ep, struct m66592_request *req)
508 struct m66592 *m66592 = ep->m66592;
510 pipe_change(m66592, ep->pipenum);
511 m66592_mdfy(m66592, M66592_ISEL | M66592_PIPE0,
512 (M66592_ISEL | M66592_CURPIPE),
514 m66592_write(m66592, M66592_BCLR, ep->fifoctr);
515 if (req->req.length == 0) {
516 m66592_bset(m66592, M66592_BVAL, ep->fifoctr);
517 pipe_start(m66592, 0);
518 transfer_complete(ep, req, 0);
520 m66592_write(m66592, ~M66592_BEMP0, M66592_BEMPSTS);
521 irq_ep0_write(ep, req);
525 static void start_packet_write(struct m66592_ep *ep, struct m66592_request *req)
527 struct m66592 *m66592 = ep->m66592;
530 pipe_change(m66592, ep->pipenum);
531 disable_irq_empty(m66592, ep->pipenum);
532 pipe_start(m66592, ep->pipenum);
534 tmp = m66592_read(m66592, ep->fifoctr);
535 if (unlikely((tmp & M66592_FRDY) == 0))
536 pipe_irq_enable(m66592, ep->pipenum);
538 irq_packet_write(ep, req);
541 static void start_packet_read(struct m66592_ep *ep, struct m66592_request *req)
543 struct m66592 *m66592 = ep->m66592;
544 u16 pipenum = ep->pipenum;
546 if (ep->pipenum == 0) {
547 m66592_mdfy(m66592, M66592_PIPE0,
548 (M66592_ISEL | M66592_CURPIPE),
550 m66592_write(m66592, M66592_BCLR, ep->fifoctr);
551 pipe_start(m66592, pipenum);
552 pipe_irq_enable(m66592, pipenum);
555 m66592_bset(m66592, M66592_TRCLR, ep->fifosel);
556 pipe_change(m66592, pipenum);
557 m66592_bset(m66592, M66592_TRENB, ep->fifosel);
559 (req->req.length + ep->ep.maxpacket - 1)
563 pipe_start(m66592, pipenum); /* trigger once */
564 pipe_irq_enable(m66592, pipenum);
568 static void start_packet(struct m66592_ep *ep, struct m66592_request *req)
570 if (ep->desc->bEndpointAddress & USB_DIR_IN)
571 start_packet_write(ep, req);
573 start_packet_read(ep, req);
576 static void start_ep0(struct m66592_ep *ep, struct m66592_request *req)
580 ctsq = m66592_read(ep->m66592, M66592_INTSTS0) & M66592_CTSQ;
584 start_ep0_write(ep, req);
587 start_packet_read(ep, req);
591 control_end(ep->m66592, 0);
594 pr_err("start_ep0: unexpect ctsq(%x)\n", ctsq);
599 static void init_controller(struct m66592 *m66592)
603 if (m66592->pdata->on_chip) {
604 if (m66592->pdata->endian)
605 endian = 0; /* big endian */
607 endian = M66592_LITTLE; /* little endian */
609 m66592_bset(m66592, M66592_HSE, M66592_SYSCFG); /* High spd */
610 m66592_bclr(m66592, M66592_USBE, M66592_SYSCFG);
611 m66592_bclr(m66592, M66592_DPRPU, M66592_SYSCFG);
612 m66592_bset(m66592, M66592_USBE, M66592_SYSCFG);
614 /* This is a workaound for SH7722 2nd cut */
615 m66592_bset(m66592, 0x8000, M66592_DVSTCTR);
616 m66592_bset(m66592, 0x1000, M66592_TESTMODE);
617 m66592_bclr(m66592, 0x8000, M66592_DVSTCTR);
619 m66592_bset(m66592, M66592_INTL, M66592_INTENB1);
621 m66592_write(m66592, 0, M66592_CFBCFG);
622 m66592_write(m66592, 0, M66592_D0FBCFG);
623 m66592_bset(m66592, endian, M66592_CFBCFG);
624 m66592_bset(m66592, endian, M66592_D0FBCFG);
626 unsigned int clock, vif, irq_sense;
628 if (m66592->pdata->endian)
629 endian = M66592_BIGEND; /* big endian */
631 endian = 0; /* little endian */
633 if (m66592->pdata->vif)
634 vif = M66592_LDRV; /* 3.3v */
638 switch (m66592->pdata->xtal) {
639 case M66592_PLATDATA_XTAL_12MHZ:
640 clock = M66592_XTAL12;
642 case M66592_PLATDATA_XTAL_24MHZ:
643 clock = M66592_XTAL24;
645 case M66592_PLATDATA_XTAL_48MHZ:
646 clock = M66592_XTAL48;
649 pr_warning("m66592-udc: xtal configuration error\n");
653 switch (m66592->irq_trigger) {
654 case IRQF_TRIGGER_LOW:
655 irq_sense = M66592_INTL;
657 case IRQF_TRIGGER_FALLING:
661 pr_warning("m66592-udc: irq trigger config error\n");
666 (vif & M66592_LDRV) | (endian & M66592_BIGEND),
668 m66592_bset(m66592, M66592_HSE, M66592_SYSCFG); /* High spd */
669 m66592_mdfy(m66592, clock & M66592_XTAL, M66592_XTAL,
671 m66592_bclr(m66592, M66592_USBE, M66592_SYSCFG);
672 m66592_bclr(m66592, M66592_DPRPU, M66592_SYSCFG);
673 m66592_bset(m66592, M66592_USBE, M66592_SYSCFG);
675 m66592_bset(m66592, M66592_XCKE, M66592_SYSCFG);
679 m66592_bset(m66592, M66592_RCKE | M66592_PLLC, M66592_SYSCFG);
683 m66592_bset(m66592, M66592_SCKE, M66592_SYSCFG);
685 m66592_bset(m66592, irq_sense & M66592_INTL, M66592_INTENB1);
686 m66592_write(m66592, M66592_BURST | M66592_CPU_ADR_RD_WR,
691 static void disable_controller(struct m66592 *m66592)
693 if (!m66592->pdata->on_chip) {
694 m66592_bclr(m66592, M66592_SCKE, M66592_SYSCFG);
696 m66592_bclr(m66592, M66592_PLLC, M66592_SYSCFG);
698 m66592_bclr(m66592, M66592_RCKE, M66592_SYSCFG);
700 m66592_bclr(m66592, M66592_XCKE, M66592_SYSCFG);
704 static void m66592_start_xclock(struct m66592 *m66592)
708 if (!m66592->pdata->on_chip) {
709 tmp = m66592_read(m66592, M66592_SYSCFG);
710 if (!(tmp & M66592_XCKE))
711 m66592_bset(m66592, M66592_XCKE, M66592_SYSCFG);
715 /*-------------------------------------------------------------------------*/
716 static void transfer_complete(struct m66592_ep *ep,
717 struct m66592_request *req, int status)
718 __releases(m66592->lock)
719 __acquires(m66592->lock)
723 if (unlikely(ep->pipenum == 0)) {
724 if (ep->internal_ccpl) {
725 ep->internal_ccpl = 0;
730 list_del_init(&req->queue);
731 if (ep->m66592->gadget.speed == USB_SPEED_UNKNOWN)
732 req->req.status = -ESHUTDOWN;
734 req->req.status = status;
736 if (!list_empty(&ep->queue))
739 spin_unlock(&ep->m66592->lock);
740 req->req.complete(&ep->ep, &req->req);
741 spin_lock(&ep->m66592->lock);
744 req = list_entry(ep->queue.next, struct m66592_request, queue);
746 start_packet(ep, req);
750 static void irq_ep0_write(struct m66592_ep *ep, struct m66592_request *req)
757 u16 pipenum = ep->pipenum;
758 struct m66592 *m66592 = ep->m66592;
760 pipe_change(m66592, pipenum);
761 m66592_bset(m66592, M66592_ISEL, ep->fifosel);
765 tmp = m66592_read(m66592, ep->fifoctr);
767 pr_err("pipe0 is busy. maybe cpu i/o bus "
768 "conflict. please power off this controller.");
772 } while ((tmp & M66592_FRDY) == 0);
774 /* prepare parameters */
775 bufsize = get_buffer_size(m66592, pipenum);
776 buf = req->req.buf + req->req.actual;
777 size = min(bufsize, req->req.length - req->req.actual);
782 m66592_write_fifo(m66592, ep->fifoaddr, buf, size);
783 if ((size == 0) || ((size % ep->ep.maxpacket) != 0))
784 m66592_bset(m66592, M66592_BVAL, ep->fifoctr);
787 /* update parameters */
788 req->req.actual += size;
790 /* check transfer finish */
791 if ((!req->req.zero && (req->req.actual == req->req.length))
792 || (size % ep->ep.maxpacket)
794 disable_irq_ready(m66592, pipenum);
795 disable_irq_empty(m66592, pipenum);
797 disable_irq_ready(m66592, pipenum);
798 enable_irq_empty(m66592, pipenum);
800 pipe_start(m66592, pipenum);
803 static void irq_packet_write(struct m66592_ep *ep, struct m66592_request *req)
809 u16 pipenum = ep->pipenum;
810 struct m66592 *m66592 = ep->m66592;
812 pipe_change(m66592, pipenum);
813 tmp = m66592_read(m66592, ep->fifoctr);
814 if (unlikely((tmp & M66592_FRDY) == 0)) {
815 pipe_stop(m66592, pipenum);
816 pipe_irq_disable(m66592, pipenum);
817 pr_err("write fifo not ready. pipnum=%d\n", pipenum);
821 /* prepare parameters */
822 bufsize = get_buffer_size(m66592, pipenum);
823 buf = req->req.buf + req->req.actual;
824 size = min(bufsize, req->req.length - req->req.actual);
828 m66592_write_fifo(m66592, ep->fifoaddr, buf, size);
830 || ((size % ep->ep.maxpacket) != 0)
831 || ((bufsize != ep->ep.maxpacket)
832 && (bufsize > size)))
833 m66592_bset(m66592, M66592_BVAL, ep->fifoctr);
836 /* update parameters */
837 req->req.actual += size;
838 /* check transfer finish */
839 if ((!req->req.zero && (req->req.actual == req->req.length))
840 || (size % ep->ep.maxpacket)
842 disable_irq_ready(m66592, pipenum);
843 enable_irq_empty(m66592, pipenum);
845 disable_irq_empty(m66592, pipenum);
846 pipe_irq_enable(m66592, pipenum);
850 static void irq_packet_read(struct m66592_ep *ep, struct m66592_request *req)
853 int rcv_len, bufsize, req_len;
856 u16 pipenum = ep->pipenum;
857 struct m66592 *m66592 = ep->m66592;
860 pipe_change(m66592, pipenum);
861 tmp = m66592_read(m66592, ep->fifoctr);
862 if (unlikely((tmp & M66592_FRDY) == 0)) {
863 req->req.status = -EPIPE;
864 pipe_stop(m66592, pipenum);
865 pipe_irq_disable(m66592, pipenum);
866 pr_err("read fifo not ready");
870 /* prepare parameters */
871 rcv_len = tmp & M66592_DTLN;
872 bufsize = get_buffer_size(m66592, pipenum);
874 buf = req->req.buf + req->req.actual;
875 req_len = req->req.length - req->req.actual;
876 if (rcv_len < bufsize)
877 size = min(rcv_len, req_len);
879 size = min(bufsize, req_len);
881 /* update parameters */
882 req->req.actual += size;
884 /* check transfer finish */
885 if ((!req->req.zero && (req->req.actual == req->req.length))
886 || (size % ep->ep.maxpacket)
888 pipe_stop(m66592, pipenum);
889 pipe_irq_disable(m66592, pipenum);
896 m66592_write(m66592, M66592_BCLR, ep->fifoctr);
898 m66592_read_fifo(m66592, ep->fifoaddr, buf, size);
901 if ((ep->pipenum != 0) && finish)
902 transfer_complete(ep, req, 0);
905 static void irq_pipe_ready(struct m66592 *m66592, u16 status, u16 enb)
909 struct m66592_ep *ep;
910 struct m66592_request *req;
912 if ((status & M66592_BRDY0) && (enb & M66592_BRDY0)) {
913 m66592_write(m66592, ~M66592_BRDY0, M66592_BRDYSTS);
914 m66592_mdfy(m66592, M66592_PIPE0, M66592_CURPIPE,
918 req = list_entry(ep->queue.next, struct m66592_request, queue);
919 irq_packet_read(ep, req);
921 for (pipenum = 1; pipenum < M66592_MAX_NUM_PIPE; pipenum++) {
922 check = 1 << pipenum;
923 if ((status & check) && (enb & check)) {
924 m66592_write(m66592, ~check, M66592_BRDYSTS);
925 ep = m66592->pipenum2ep[pipenum];
926 req = list_entry(ep->queue.next,
927 struct m66592_request, queue);
928 if (ep->desc->bEndpointAddress & USB_DIR_IN)
929 irq_packet_write(ep, req);
931 irq_packet_read(ep, req);
937 static void irq_pipe_empty(struct m66592 *m66592, u16 status, u16 enb)
942 struct m66592_ep *ep;
943 struct m66592_request *req;
945 if ((status & M66592_BEMP0) && (enb & M66592_BEMP0)) {
946 m66592_write(m66592, ~M66592_BEMP0, M66592_BEMPSTS);
949 req = list_entry(ep->queue.next, struct m66592_request, queue);
950 irq_ep0_write(ep, req);
952 for (pipenum = 1; pipenum < M66592_MAX_NUM_PIPE; pipenum++) {
953 check = 1 << pipenum;
954 if ((status & check) && (enb & check)) {
955 m66592_write(m66592, ~check, M66592_BEMPSTS);
956 tmp = control_reg_get(m66592, pipenum);
957 if ((tmp & M66592_INBUFM) == 0) {
958 disable_irq_empty(m66592, pipenum);
959 pipe_irq_disable(m66592, pipenum);
960 pipe_stop(m66592, pipenum);
961 ep = m66592->pipenum2ep[pipenum];
962 req = list_entry(ep->queue.next,
963 struct m66592_request,
965 if (!list_empty(&ep->queue))
966 transfer_complete(ep, req, 0);
973 static void get_status(struct m66592 *m66592, struct usb_ctrlrequest *ctrl)
974 __releases(m66592->lock)
975 __acquires(m66592->lock)
977 struct m66592_ep *ep;
980 u16 w_index = le16_to_cpu(ctrl->wIndex);
982 switch (ctrl->bRequestType & USB_RECIP_MASK) {
983 case USB_RECIP_DEVICE:
984 status = 1 << USB_DEVICE_SELF_POWERED;
986 case USB_RECIP_INTERFACE:
989 case USB_RECIP_ENDPOINT:
990 ep = m66592->epaddr2ep[w_index & USB_ENDPOINT_NUMBER_MASK];
991 pid = control_reg_get_pid(m66592, ep->pipenum);
992 if (pid == M66592_PID_STALL)
993 status = 1 << USB_ENDPOINT_HALT;
998 pipe_stall(m66592, 0);
1002 m66592->ep0_data = cpu_to_le16(status);
1003 m66592->ep0_req->buf = &m66592->ep0_data;
1004 m66592->ep0_req->length = 2;
1005 /* AV: what happens if we get called again before that gets through? */
1006 spin_unlock(&m66592->lock);
1007 m66592_queue(m66592->gadget.ep0, m66592->ep0_req, GFP_KERNEL);
1008 spin_lock(&m66592->lock);
1011 static void clear_feature(struct m66592 *m66592, struct usb_ctrlrequest *ctrl)
1013 switch (ctrl->bRequestType & USB_RECIP_MASK) {
1014 case USB_RECIP_DEVICE:
1015 control_end(m66592, 1);
1017 case USB_RECIP_INTERFACE:
1018 control_end(m66592, 1);
1020 case USB_RECIP_ENDPOINT: {
1021 struct m66592_ep *ep;
1022 struct m66592_request *req;
1023 u16 w_index = le16_to_cpu(ctrl->wIndex);
1025 ep = m66592->epaddr2ep[w_index & USB_ENDPOINT_NUMBER_MASK];
1026 pipe_stop(m66592, ep->pipenum);
1027 control_reg_sqclr(m66592, ep->pipenum);
1029 control_end(m66592, 1);
1031 req = list_entry(ep->queue.next,
1032 struct m66592_request, queue);
1035 if (list_empty(&ep->queue))
1037 start_packet(ep, req);
1038 } else if (!list_empty(&ep->queue))
1039 pipe_start(m66592, ep->pipenum);
1043 pipe_stall(m66592, 0);
1048 static void set_feature(struct m66592 *m66592, struct usb_ctrlrequest *ctrl)
1051 switch (ctrl->bRequestType & USB_RECIP_MASK) {
1052 case USB_RECIP_DEVICE:
1053 control_end(m66592, 1);
1055 case USB_RECIP_INTERFACE:
1056 control_end(m66592, 1);
1058 case USB_RECIP_ENDPOINT: {
1059 struct m66592_ep *ep;
1060 u16 w_index = le16_to_cpu(ctrl->wIndex);
1062 ep = m66592->epaddr2ep[w_index & USB_ENDPOINT_NUMBER_MASK];
1063 pipe_stall(m66592, ep->pipenum);
1065 control_end(m66592, 1);
1069 pipe_stall(m66592, 0);
1074 /* if return value is true, call class driver's setup() */
1075 static int setup_packet(struct m66592 *m66592, struct usb_ctrlrequest *ctrl)
1077 u16 *p = (u16 *)ctrl;
1078 unsigned long offset = M66592_USBREQ;
1082 m66592_write(m66592, ~M66592_VALID, M66592_INTSTS0);
1084 for (i = 0; i < 4; i++)
1085 p[i] = m66592_read(m66592, offset + i*2);
1088 if ((ctrl->bRequestType & USB_TYPE_MASK) == USB_TYPE_STANDARD) {
1089 switch (ctrl->bRequest) {
1090 case USB_REQ_GET_STATUS:
1091 get_status(m66592, ctrl);
1093 case USB_REQ_CLEAR_FEATURE:
1094 clear_feature(m66592, ctrl);
1096 case USB_REQ_SET_FEATURE:
1097 set_feature(m66592, ctrl);
1108 static void m66592_update_usb_speed(struct m66592 *m66592)
1110 u16 speed = get_usb_speed(m66592);
1114 m66592->gadget.speed = USB_SPEED_HIGH;
1117 m66592->gadget.speed = USB_SPEED_FULL;
1120 m66592->gadget.speed = USB_SPEED_UNKNOWN;
1121 pr_err("USB speed unknown\n");
1125 static void irq_device_state(struct m66592 *m66592)
1129 dvsq = m66592_read(m66592, M66592_INTSTS0) & M66592_DVSQ;
1130 m66592_write(m66592, ~M66592_DVST, M66592_INTSTS0);
1132 if (dvsq == M66592_DS_DFLT) { /* bus reset */
1133 m66592->driver->disconnect(&m66592->gadget);
1134 m66592_update_usb_speed(m66592);
1136 if (m66592->old_dvsq == M66592_DS_CNFG && dvsq != M66592_DS_CNFG)
1137 m66592_update_usb_speed(m66592);
1138 if ((dvsq == M66592_DS_CNFG || dvsq == M66592_DS_ADDS)
1139 && m66592->gadget.speed == USB_SPEED_UNKNOWN)
1140 m66592_update_usb_speed(m66592);
1142 m66592->old_dvsq = dvsq;
1145 static void irq_control_stage(struct m66592 *m66592)
1146 __releases(m66592->lock)
1147 __acquires(m66592->lock)
1149 struct usb_ctrlrequest ctrl;
1152 ctsq = m66592_read(m66592, M66592_INTSTS0) & M66592_CTSQ;
1153 m66592_write(m66592, ~M66592_CTRT, M66592_INTSTS0);
1156 case M66592_CS_IDST: {
1157 struct m66592_ep *ep;
1158 struct m66592_request *req;
1159 ep = &m66592->ep[0];
1160 req = list_entry(ep->queue.next, struct m66592_request, queue);
1161 transfer_complete(ep, req, 0);
1165 case M66592_CS_RDDS:
1166 case M66592_CS_WRDS:
1167 case M66592_CS_WRND:
1168 if (setup_packet(m66592, &ctrl)) {
1169 spin_unlock(&m66592->lock);
1170 if (m66592->driver->setup(&m66592->gadget, &ctrl) < 0)
1171 pipe_stall(m66592, 0);
1172 spin_lock(&m66592->lock);
1175 case M66592_CS_RDSS:
1176 case M66592_CS_WRSS:
1177 control_end(m66592, 0);
1180 pr_err("ctrl_stage: unexpect ctsq(%x)\n", ctsq);
1185 static irqreturn_t m66592_irq(int irq, void *_m66592)
1187 struct m66592 *m66592 = _m66592;
1190 u16 brdysts, nrdysts, bempsts;
1191 u16 brdyenb, nrdyenb, bempenb;
1195 spin_lock(&m66592->lock);
1197 intsts0 = m66592_read(m66592, M66592_INTSTS0);
1198 intenb0 = m66592_read(m66592, M66592_INTENB0);
1200 if (m66592->pdata->on_chip && !intsts0 && !intenb0) {
1202 * When USB clock stops, it cannot read register. Even if a
1203 * clock stops, the interrupt occurs. So this driver turn on
1204 * a clock by this timing and do re-reading of register.
1206 m66592_start_xclock(m66592);
1207 intsts0 = m66592_read(m66592, M66592_INTSTS0);
1208 intenb0 = m66592_read(m66592, M66592_INTENB0);
1211 savepipe = m66592_read(m66592, M66592_CFIFOSEL);
1213 mask0 = intsts0 & intenb0;
1215 brdysts = m66592_read(m66592, M66592_BRDYSTS);
1216 nrdysts = m66592_read(m66592, M66592_NRDYSTS);
1217 bempsts = m66592_read(m66592, M66592_BEMPSTS);
1218 brdyenb = m66592_read(m66592, M66592_BRDYENB);
1219 nrdyenb = m66592_read(m66592, M66592_NRDYENB);
1220 bempenb = m66592_read(m66592, M66592_BEMPENB);
1222 if (mask0 & M66592_VBINT) {
1223 m66592_write(m66592, 0xffff & ~M66592_VBINT,
1225 m66592_start_xclock(m66592);
1227 /* start vbus sampling */
1228 m66592->old_vbus = m66592_read(m66592, M66592_INTSTS0)
1230 m66592->scount = M66592_MAX_SAMPLING;
1232 mod_timer(&m66592->timer,
1233 jiffies + msecs_to_jiffies(50));
1235 if (intsts0 & M66592_DVSQ)
1236 irq_device_state(m66592);
1238 if ((intsts0 & M66592_BRDY) && (intenb0 & M66592_BRDYE)
1239 && (brdysts & brdyenb)) {
1240 irq_pipe_ready(m66592, brdysts, brdyenb);
1242 if ((intsts0 & M66592_BEMP) && (intenb0 & M66592_BEMPE)
1243 && (bempsts & bempenb)) {
1244 irq_pipe_empty(m66592, bempsts, bempenb);
1247 if (intsts0 & M66592_CTRT)
1248 irq_control_stage(m66592);
1251 m66592_write(m66592, savepipe, M66592_CFIFOSEL);
1253 spin_unlock(&m66592->lock);
1257 static void m66592_timer(unsigned long _m66592)
1259 struct m66592 *m66592 = (struct m66592 *)_m66592;
1260 unsigned long flags;
1263 spin_lock_irqsave(&m66592->lock, flags);
1264 tmp = m66592_read(m66592, M66592_SYSCFG);
1265 if (!(tmp & M66592_RCKE)) {
1266 m66592_bset(m66592, M66592_RCKE | M66592_PLLC, M66592_SYSCFG);
1268 m66592_bset(m66592, M66592_SCKE, M66592_SYSCFG);
1270 if (m66592->scount > 0) {
1271 tmp = m66592_read(m66592, M66592_INTSTS0) & M66592_VBSTS;
1272 if (tmp == m66592->old_vbus) {
1274 if (m66592->scount == 0) {
1275 if (tmp == M66592_VBSTS)
1276 m66592_usb_connect(m66592);
1278 m66592_usb_disconnect(m66592);
1280 mod_timer(&m66592->timer,
1281 jiffies + msecs_to_jiffies(50));
1284 m66592->scount = M66592_MAX_SAMPLING;
1285 m66592->old_vbus = tmp;
1286 mod_timer(&m66592->timer,
1287 jiffies + msecs_to_jiffies(50));
1290 spin_unlock_irqrestore(&m66592->lock, flags);
1293 /*-------------------------------------------------------------------------*/
1294 static int m66592_enable(struct usb_ep *_ep,
1295 const struct usb_endpoint_descriptor *desc)
1297 struct m66592_ep *ep;
1299 ep = container_of(_ep, struct m66592_ep, ep);
1300 return alloc_pipe_config(ep, desc);
1303 static int m66592_disable(struct usb_ep *_ep)
1305 struct m66592_ep *ep;
1306 struct m66592_request *req;
1307 unsigned long flags;
1309 ep = container_of(_ep, struct m66592_ep, ep);
1312 while (!list_empty(&ep->queue)) {
1313 req = list_entry(ep->queue.next, struct m66592_request, queue);
1314 spin_lock_irqsave(&ep->m66592->lock, flags);
1315 transfer_complete(ep, req, -ECONNRESET);
1316 spin_unlock_irqrestore(&ep->m66592->lock, flags);
1319 pipe_irq_disable(ep->m66592, ep->pipenum);
1320 return free_pipe_config(ep);
1323 static struct usb_request *m66592_alloc_request(struct usb_ep *_ep,
1326 struct m66592_request *req;
1328 req = kzalloc(sizeof(struct m66592_request), gfp_flags);
1332 INIT_LIST_HEAD(&req->queue);
1337 static void m66592_free_request(struct usb_ep *_ep, struct usb_request *_req)
1339 struct m66592_request *req;
1341 req = container_of(_req, struct m66592_request, req);
1345 static int m66592_queue(struct usb_ep *_ep, struct usb_request *_req,
1348 struct m66592_ep *ep;
1349 struct m66592_request *req;
1350 unsigned long flags;
1353 ep = container_of(_ep, struct m66592_ep, ep);
1354 req = container_of(_req, struct m66592_request, req);
1356 if (ep->m66592->gadget.speed == USB_SPEED_UNKNOWN)
1359 spin_lock_irqsave(&ep->m66592->lock, flags);
1361 if (list_empty(&ep->queue))
1364 list_add_tail(&req->queue, &ep->queue);
1365 req->req.actual = 0;
1366 req->req.status = -EINPROGRESS;
1368 if (ep->desc == NULL) /* control */
1371 if (request && !ep->busy)
1372 start_packet(ep, req);
1375 spin_unlock_irqrestore(&ep->m66592->lock, flags);
1380 static int m66592_dequeue(struct usb_ep *_ep, struct usb_request *_req)
1382 struct m66592_ep *ep;
1383 struct m66592_request *req;
1384 unsigned long flags;
1386 ep = container_of(_ep, struct m66592_ep, ep);
1387 req = container_of(_req, struct m66592_request, req);
1389 spin_lock_irqsave(&ep->m66592->lock, flags);
1390 if (!list_empty(&ep->queue))
1391 transfer_complete(ep, req, -ECONNRESET);
1392 spin_unlock_irqrestore(&ep->m66592->lock, flags);
1397 static int m66592_set_halt(struct usb_ep *_ep, int value)
1399 struct m66592_ep *ep;
1400 struct m66592_request *req;
1401 unsigned long flags;
1404 ep = container_of(_ep, struct m66592_ep, ep);
1405 req = list_entry(ep->queue.next, struct m66592_request, queue);
1407 spin_lock_irqsave(&ep->m66592->lock, flags);
1408 if (!list_empty(&ep->queue)) {
1414 pipe_stall(ep->m66592, ep->pipenum);
1417 pipe_stop(ep->m66592, ep->pipenum);
1421 spin_unlock_irqrestore(&ep->m66592->lock, flags);
1425 static void m66592_fifo_flush(struct usb_ep *_ep)
1427 struct m66592_ep *ep;
1428 unsigned long flags;
1430 ep = container_of(_ep, struct m66592_ep, ep);
1431 spin_lock_irqsave(&ep->m66592->lock, flags);
1432 if (list_empty(&ep->queue) && !ep->busy) {
1433 pipe_stop(ep->m66592, ep->pipenum);
1434 m66592_bclr(ep->m66592, M66592_BCLR, ep->fifoctr);
1436 spin_unlock_irqrestore(&ep->m66592->lock, flags);
1439 static struct usb_ep_ops m66592_ep_ops = {
1440 .enable = m66592_enable,
1441 .disable = m66592_disable,
1443 .alloc_request = m66592_alloc_request,
1444 .free_request = m66592_free_request,
1446 .queue = m66592_queue,
1447 .dequeue = m66592_dequeue,
1449 .set_halt = m66592_set_halt,
1450 .fifo_flush = m66592_fifo_flush,
1453 /*-------------------------------------------------------------------------*/
1454 static struct m66592 *the_controller;
1456 int usb_gadget_register_driver(struct usb_gadget_driver *driver)
1458 struct m66592 *m66592 = the_controller;
1462 || driver->speed != USB_SPEED_HIGH
1471 /* hook up the driver */
1472 driver->driver.bus = NULL;
1473 m66592->driver = driver;
1474 m66592->gadget.dev.driver = &driver->driver;
1476 retval = device_add(&m66592->gadget.dev);
1478 pr_err("device_add error (%d)\n", retval);
1482 retval = driver->bind (&m66592->gadget);
1484 pr_err("bind to driver error (%d)\n", retval);
1485 device_del(&m66592->gadget.dev);
1489 m66592_bset(m66592, M66592_VBSE | M66592_URST, M66592_INTENB0);
1490 if (m66592_read(m66592, M66592_INTSTS0) & M66592_VBSTS) {
1491 m66592_start_xclock(m66592);
1492 /* start vbus sampling */
1493 m66592->old_vbus = m66592_read(m66592,
1494 M66592_INTSTS0) & M66592_VBSTS;
1495 m66592->scount = M66592_MAX_SAMPLING;
1496 mod_timer(&m66592->timer, jiffies + msecs_to_jiffies(50));
1502 m66592->driver = NULL;
1503 m66592->gadget.dev.driver = NULL;
1507 EXPORT_SYMBOL(usb_gadget_register_driver);
1509 int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
1511 struct m66592 *m66592 = the_controller;
1512 unsigned long flags;
1514 if (driver != m66592->driver || !driver->unbind)
1517 spin_lock_irqsave(&m66592->lock, flags);
1518 if (m66592->gadget.speed != USB_SPEED_UNKNOWN)
1519 m66592_usb_disconnect(m66592);
1520 spin_unlock_irqrestore(&m66592->lock, flags);
1522 m66592_bclr(m66592, M66592_VBSE | M66592_URST, M66592_INTENB0);
1524 driver->unbind(&m66592->gadget);
1525 m66592->gadget.dev.driver = NULL;
1527 init_controller(m66592);
1528 disable_controller(m66592);
1530 device_del(&m66592->gadget.dev);
1531 m66592->driver = NULL;
1534 EXPORT_SYMBOL(usb_gadget_unregister_driver);
1536 /*-------------------------------------------------------------------------*/
1537 static int m66592_get_frame(struct usb_gadget *_gadget)
1539 struct m66592 *m66592 = gadget_to_m66592(_gadget);
1540 return m66592_read(m66592, M66592_FRMNUM) & 0x03FF;
1543 static struct usb_gadget_ops m66592_gadget_ops = {
1544 .get_frame = m66592_get_frame,
1547 static int __exit m66592_remove(struct platform_device *pdev)
1549 struct m66592 *m66592 = dev_get_drvdata(&pdev->dev);
1551 del_timer_sync(&m66592->timer);
1552 iounmap(m66592->reg);
1553 free_irq(platform_get_irq(pdev, 0), m66592);
1554 m66592_free_request(&m66592->ep[0].ep, m66592->ep0_req);
1555 #ifdef CONFIG_HAVE_CLK
1556 if (m66592->pdata->on_chip) {
1557 clk_disable(m66592->clk);
1558 clk_put(m66592->clk);
1565 static void nop_completion(struct usb_ep *ep, struct usb_request *r)
1569 static int __init m66592_probe(struct platform_device *pdev)
1571 struct resource *res, *ires;
1572 void __iomem *reg = NULL;
1573 struct m66592 *m66592 = NULL;
1574 #ifdef CONFIG_HAVE_CLK
1580 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1583 pr_err("platform_get_resource error.\n");
1587 ires = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
1591 "platform_get_resource IORESOURCE_IRQ error.\n");
1595 reg = ioremap(res->start, resource_size(res));
1598 pr_err("ioremap error.\n");
1602 if (pdev->dev.platform_data == NULL) {
1603 dev_err(&pdev->dev, "no platform data\n");
1608 /* initialize ucd */
1609 m66592 = kzalloc(sizeof(struct m66592), GFP_KERNEL);
1610 if (m66592 == NULL) {
1611 pr_err("kzalloc error\n");
1615 m66592->pdata = pdev->dev.platform_data;
1616 m66592->irq_trigger = ires->flags & IRQF_TRIGGER_MASK;
1618 spin_lock_init(&m66592->lock);
1619 dev_set_drvdata(&pdev->dev, m66592);
1621 m66592->gadget.ops = &m66592_gadget_ops;
1622 device_initialize(&m66592->gadget.dev);
1623 dev_set_name(&m66592->gadget.dev, "gadget");
1624 m66592->gadget.is_dualspeed = 1;
1625 m66592->gadget.dev.parent = &pdev->dev;
1626 m66592->gadget.dev.dma_mask = pdev->dev.dma_mask;
1627 m66592->gadget.dev.release = pdev->dev.release;
1628 m66592->gadget.name = udc_name;
1630 init_timer(&m66592->timer);
1631 m66592->timer.function = m66592_timer;
1632 m66592->timer.data = (unsigned long)m66592;
1635 ret = request_irq(ires->start, m66592_irq, IRQF_DISABLED | IRQF_SHARED,
1638 pr_err("request_irq error (%d)\n", ret);
1642 #ifdef CONFIG_HAVE_CLK
1643 if (m66592->pdata->on_chip) {
1644 snprintf(clk_name, sizeof(clk_name), "usbf%d", pdev->id);
1645 m66592->clk = clk_get(&pdev->dev, clk_name);
1646 if (IS_ERR(m66592->clk)) {
1647 dev_err(&pdev->dev, "cannot get clock \"%s\"\n",
1649 ret = PTR_ERR(m66592->clk);
1652 clk_enable(m66592->clk);
1655 INIT_LIST_HEAD(&m66592->gadget.ep_list);
1656 m66592->gadget.ep0 = &m66592->ep[0].ep;
1657 INIT_LIST_HEAD(&m66592->gadget.ep0->ep_list);
1658 for (i = 0; i < M66592_MAX_NUM_PIPE; i++) {
1659 struct m66592_ep *ep = &m66592->ep[i];
1662 INIT_LIST_HEAD(&m66592->ep[i].ep.ep_list);
1663 list_add_tail(&m66592->ep[i].ep.ep_list,
1664 &m66592->gadget.ep_list);
1666 ep->m66592 = m66592;
1667 INIT_LIST_HEAD(&ep->queue);
1668 ep->ep.name = m66592_ep_name[i];
1669 ep->ep.ops = &m66592_ep_ops;
1670 ep->ep.maxpacket = 512;
1672 m66592->ep[0].ep.maxpacket = 64;
1673 m66592->ep[0].pipenum = 0;
1674 m66592->ep[0].fifoaddr = M66592_CFIFO;
1675 m66592->ep[0].fifosel = M66592_CFIFOSEL;
1676 m66592->ep[0].fifoctr = M66592_CFIFOCTR;
1677 m66592->ep[0].fifotrn = 0;
1678 m66592->ep[0].pipectr = get_pipectr_addr(0);
1679 m66592->pipenum2ep[0] = &m66592->ep[0];
1680 m66592->epaddr2ep[0] = &m66592->ep[0];
1682 the_controller = m66592;
1684 m66592->ep0_req = m66592_alloc_request(&m66592->ep[0].ep, GFP_KERNEL);
1685 if (m66592->ep0_req == NULL)
1687 m66592->ep0_req->complete = nop_completion;
1689 init_controller(m66592);
1691 dev_info(&pdev->dev, "version %s\n", DRIVER_VERSION);
1695 #ifdef CONFIG_HAVE_CLK
1696 if (m66592->pdata->on_chip) {
1697 clk_disable(m66592->clk);
1698 clk_put(m66592->clk);
1702 free_irq(ires->start, m66592);
1705 if (m66592->ep0_req)
1706 m66592_free_request(&m66592->ep[0].ep, m66592->ep0_req);
1715 /*-------------------------------------------------------------------------*/
1716 static struct platform_driver m66592_driver = {
1717 .remove = __exit_p(m66592_remove),
1719 .name = (char *) udc_name,
1720 .owner = THIS_MODULE,
1724 static int __init m66592_udc_init(void)
1726 return platform_driver_probe(&m66592_driver, m66592_probe);
1728 module_init(m66592_udc_init);
1730 static void __exit m66592_udc_cleanup(void)
1732 platform_driver_unregister(&m66592_driver);
1734 module_exit(m66592_udc_cleanup);