2 * Handles the Intel 27x USB Device Controller (UDC)
4 * Inspired by original driver by Frank Becker, David Brownell, and others.
5 * Copyright (C) 2008 Robert Jarzmik
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
12 #include <linux/module.h>
13 #include <linux/kernel.h>
14 #include <linux/types.h>
15 #include <linux/errno.h>
16 #include <linux/err.h>
17 #include <linux/platform_device.h>
18 #include <linux/delay.h>
19 #include <linux/list.h>
20 #include <linux/interrupt.h>
21 #include <linux/proc_fs.h>
22 #include <linux/clk.h>
23 #include <linux/irq.h>
24 #include <linux/gpio.h>
25 #include <linux/slab.h>
26 #include <linux/prefetch.h>
28 #include <asm/byteorder.h>
29 #include <mach/hardware.h>
31 #include <linux/usb.h>
32 #include <linux/usb/ch9.h>
33 #include <linux/usb/gadget.h>
36 #include "pxa27x_udc.h"
39 * This driver handles the USB Device Controller (UDC) in Intel's PXA 27x
42 * Such controller drivers work with a gadget driver. The gadget driver
43 * returns descriptors, implements configuration and data protocols used
44 * by the host to interact with this device, and allocates endpoints to
45 * the different protocol interfaces. The controller driver virtualizes
46 * usb hardware so that the gadget drivers will be more portable.
48 * This UDC hardware wants to implement a bit too much USB protocol. The
49 * biggest issues are: that the endpoints have to be set up before the
50 * controller can be enabled (minor, and not uncommon); and each endpoint
51 * can only have one configuration, interface and alternative interface
52 * number (major, and very unusual). Once set up, these cannot be changed
53 * without a controller reset.
55 * The workaround is to setup all combinations necessary for the gadgets which
56 * will work with this driver. This is done in pxa_udc structure, statically.
57 * See pxa_udc, udc_usb_ep versus pxa_ep, and matching function find_pxa_ep.
58 * (You could modify this if needed. Some drivers have a "fifo_mode" module
59 * parameter to facilitate such changes.)
61 * The combinations have been tested with these gadgets :
63 * - file storage gadget
66 * The driver doesn't use DMA, only IO access and IRQ callbacks. No use is
67 * made of UDC's double buffering either. USB "On-The-Go" is not implemented.
69 * All the requests are handled the same way :
70 * - the drivers tries to handle the request directly to the IO
71 * - if the IO fifo is not big enough, the remaining is send/received in
75 #define DRIVER_VERSION "2008-04-18"
76 #define DRIVER_DESC "PXA 27x USB Device Controller driver"
78 static const char driver_name[] = "pxa27x_udc";
79 static struct pxa_udc *the_controller;
81 static void handle_ep(struct pxa_ep *ep);
86 #ifdef CONFIG_USB_GADGET_DEBUG_FS
88 #include <linux/debugfs.h>
89 #include <linux/uaccess.h>
90 #include <linux/seq_file.h>
92 static int state_dbg_show(struct seq_file *s, void *p)
94 struct pxa_udc *udc = s->private;
102 /* basic device status */
103 pos += seq_printf(s, DRIVER_DESC "\n"
104 "%s version: %s\nGadget driver: %s\n",
105 driver_name, DRIVER_VERSION,
106 udc->driver ? udc->driver->driver.name : "(none)");
108 tmp = udc_readl(udc, UDCCR);
110 "udccr=0x%0x(%s%s%s%s%s%s%s%s%s%s), "
111 "con=%d,inter=%d,altinter=%d\n", tmp,
112 (tmp & UDCCR_OEN) ? " oen":"",
113 (tmp & UDCCR_AALTHNP) ? " aalthnp":"",
114 (tmp & UDCCR_AHNP) ? " rem" : "",
115 (tmp & UDCCR_BHNP) ? " rstir" : "",
116 (tmp & UDCCR_DWRE) ? " dwre" : "",
117 (tmp & UDCCR_SMAC) ? " smac" : "",
118 (tmp & UDCCR_EMCE) ? " emce" : "",
119 (tmp & UDCCR_UDR) ? " udr" : "",
120 (tmp & UDCCR_UDA) ? " uda" : "",
121 (tmp & UDCCR_UDE) ? " ude" : "",
122 (tmp & UDCCR_ACN) >> UDCCR_ACN_S,
123 (tmp & UDCCR_AIN) >> UDCCR_AIN_S,
124 (tmp & UDCCR_AAISN) >> UDCCR_AAISN_S);
125 /* registers for device and ep0 */
126 pos += seq_printf(s, "udcicr0=0x%08x udcicr1=0x%08x\n",
127 udc_readl(udc, UDCICR0), udc_readl(udc, UDCICR1));
128 pos += seq_printf(s, "udcisr0=0x%08x udcisr1=0x%08x\n",
129 udc_readl(udc, UDCISR0), udc_readl(udc, UDCISR1));
130 pos += seq_printf(s, "udcfnr=%d\n", udc_readl(udc, UDCFNR));
131 pos += seq_printf(s, "irqs: reset=%lu, suspend=%lu, resume=%lu, "
133 udc->stats.irqs_reset, udc->stats.irqs_suspend,
134 udc->stats.irqs_resume, udc->stats.irqs_reconfig);
141 static int queues_dbg_show(struct seq_file *s, void *p)
143 struct pxa_udc *udc = s->private;
145 struct pxa27x_request *req;
146 int pos = 0, i, maxpkt, ret;
152 /* dump endpoint queues */
153 for (i = 0; i < NR_PXA_ENDPOINTS; i++) {
154 ep = &udc->pxa_ep[i];
155 maxpkt = ep->fifo_size;
156 pos += seq_printf(s, "%-12s max_pkt=%d %s\n",
157 EPNAME(ep), maxpkt, "pio");
159 if (list_empty(&ep->queue)) {
160 pos += seq_printf(s, "\t(nothing queued)\n");
164 list_for_each_entry(req, &ep->queue, queue) {
165 pos += seq_printf(s, "\treq %p len %d/%d buf %p\n",
166 &req->req, req->req.actual,
167 req->req.length, req->req.buf);
176 static int eps_dbg_show(struct seq_file *s, void *p)
178 struct pxa_udc *udc = s->private;
187 ep = &udc->pxa_ep[0];
188 tmp = udc_ep_readl(ep, UDCCSR);
189 pos += seq_printf(s, "udccsr0=0x%03x(%s%s%s%s%s%s%s)\n", tmp,
190 (tmp & UDCCSR0_SA) ? " sa" : "",
191 (tmp & UDCCSR0_RNE) ? " rne" : "",
192 (tmp & UDCCSR0_FST) ? " fst" : "",
193 (tmp & UDCCSR0_SST) ? " sst" : "",
194 (tmp & UDCCSR0_DME) ? " dme" : "",
195 (tmp & UDCCSR0_IPR) ? " ipr" : "",
196 (tmp & UDCCSR0_OPC) ? " opc" : "");
197 for (i = 0; i < NR_PXA_ENDPOINTS; i++) {
198 ep = &udc->pxa_ep[i];
199 tmp = i? udc_ep_readl(ep, UDCCR) : udc_readl(udc, UDCCR);
200 pos += seq_printf(s, "%-12s: "
201 "IN %lu(%lu reqs), OUT %lu(%lu reqs), "
202 "irqs=%lu, udccr=0x%08x, udccsr=0x%03x, "
205 ep->stats.in_bytes, ep->stats.in_ops,
206 ep->stats.out_bytes, ep->stats.out_ops,
208 tmp, udc_ep_readl(ep, UDCCSR),
209 udc_ep_readl(ep, UDCBCR));
217 static int eps_dbg_open(struct inode *inode, struct file *file)
219 return single_open(file, eps_dbg_show, inode->i_private);
222 static int queues_dbg_open(struct inode *inode, struct file *file)
224 return single_open(file, queues_dbg_show, inode->i_private);
227 static int state_dbg_open(struct inode *inode, struct file *file)
229 return single_open(file, state_dbg_show, inode->i_private);
232 static const struct file_operations state_dbg_fops = {
233 .owner = THIS_MODULE,
234 .open = state_dbg_open,
237 .release = single_release,
240 static const struct file_operations queues_dbg_fops = {
241 .owner = THIS_MODULE,
242 .open = queues_dbg_open,
245 .release = single_release,
248 static const struct file_operations eps_dbg_fops = {
249 .owner = THIS_MODULE,
250 .open = eps_dbg_open,
253 .release = single_release,
256 static void pxa_init_debugfs(struct pxa_udc *udc)
258 struct dentry *root, *state, *queues, *eps;
260 root = debugfs_create_dir(udc->gadget.name, NULL);
261 if (IS_ERR(root) || !root)
264 state = debugfs_create_file("udcstate", 0400, root, udc,
268 queues = debugfs_create_file("queues", 0400, root, udc,
272 eps = debugfs_create_file("epstate", 0400, root, udc,
277 udc->debugfs_root = root;
278 udc->debugfs_state = state;
279 udc->debugfs_queues = queues;
280 udc->debugfs_eps = eps;
285 debugfs_remove(queues);
287 debugfs_remove(root);
289 dev_err(udc->dev, "debugfs is not available\n");
292 static void pxa_cleanup_debugfs(struct pxa_udc *udc)
294 debugfs_remove(udc->debugfs_eps);
295 debugfs_remove(udc->debugfs_queues);
296 debugfs_remove(udc->debugfs_state);
297 debugfs_remove(udc->debugfs_root);
298 udc->debugfs_eps = NULL;
299 udc->debugfs_queues = NULL;
300 udc->debugfs_state = NULL;
301 udc->debugfs_root = NULL;
305 static inline void pxa_init_debugfs(struct pxa_udc *udc)
309 static inline void pxa_cleanup_debugfs(struct pxa_udc *udc)
315 * is_match_usb_pxa - check if usb_ep and pxa_ep match
316 * @udc_usb_ep: usb endpoint
318 * @config: configuration required in pxa_ep
319 * @interface: interface required in pxa_ep
320 * @altsetting: altsetting required in pxa_ep
322 * Returns 1 if all criteria match between pxa and usb endpoint, 0 otherwise
324 static int is_match_usb_pxa(struct udc_usb_ep *udc_usb_ep, struct pxa_ep *ep,
325 int config, int interface, int altsetting)
327 if (usb_endpoint_num(&udc_usb_ep->desc) != ep->addr)
329 if (usb_endpoint_dir_in(&udc_usb_ep->desc) != ep->dir_in)
331 if (usb_endpoint_type(&udc_usb_ep->desc) != ep->type)
333 if ((ep->config != config) || (ep->interface != interface)
334 || (ep->alternate != altsetting))
340 * find_pxa_ep - find pxa_ep structure matching udc_usb_ep
342 * @udc_usb_ep: udc_usb_ep structure
344 * Match udc_usb_ep and all pxa_ep available, to see if one matches.
345 * This is necessary because of the strong pxa hardware restriction requiring
346 * that once pxa endpoints are initialized, their configuration is freezed, and
347 * no change can be made to their address, direction, or in which configuration,
348 * interface or altsetting they are active ... which differs from more usual
349 * models which have endpoints be roughly just addressable fifos, and leave
350 * configuration events up to gadget drivers (like all control messages).
352 * Note that there is still a blurred point here :
353 * - we rely on UDCCR register "active interface" and "active altsetting".
354 * This is a nonsense in regard of USB spec, where multiple interfaces are
355 * active at the same time.
356 * - if we knew for sure that the pxa can handle multiple interface at the
357 * same time, assuming Intel's Developer Guide is wrong, this function
358 * should be reviewed, and a cache of couples (iface, altsetting) should
359 * be kept in the pxa_udc structure. In this case this function would match
360 * against the cache of couples instead of the "last altsetting" set up.
362 * Returns the matched pxa_ep structure or NULL if none found
364 static struct pxa_ep *find_pxa_ep(struct pxa_udc *udc,
365 struct udc_usb_ep *udc_usb_ep)
369 int cfg = udc->config;
370 int iface = udc->last_interface;
371 int alt = udc->last_alternate;
373 if (udc_usb_ep == &udc->udc_usb_ep[0])
374 return &udc->pxa_ep[0];
376 for (i = 1; i < NR_PXA_ENDPOINTS; i++) {
377 ep = &udc->pxa_ep[i];
378 if (is_match_usb_pxa(udc_usb_ep, ep, cfg, iface, alt))
385 * update_pxa_ep_matches - update pxa_ep cached values in all udc_usb_ep
388 * Context: in_interrupt()
390 * Updates all pxa_ep fields in udc_usb_ep structures, if this field was
391 * previously set up (and is not NULL). The update is necessary is a
392 * configuration change or altsetting change was issued by the USB host.
394 static void update_pxa_ep_matches(struct pxa_udc *udc)
397 struct udc_usb_ep *udc_usb_ep;
399 for (i = 1; i < NR_USB_ENDPOINTS; i++) {
400 udc_usb_ep = &udc->udc_usb_ep[i];
401 if (udc_usb_ep->pxa_ep)
402 udc_usb_ep->pxa_ep = find_pxa_ep(udc, udc_usb_ep);
407 * pio_irq_enable - Enables irq generation for one endpoint
410 static void pio_irq_enable(struct pxa_ep *ep)
412 struct pxa_udc *udc = ep->dev;
413 int index = EPIDX(ep);
414 u32 udcicr0 = udc_readl(udc, UDCICR0);
415 u32 udcicr1 = udc_readl(udc, UDCICR1);
418 udc_writel(udc, UDCICR0, udcicr0 | (3 << (index * 2)));
420 udc_writel(udc, UDCICR1, udcicr1 | (3 << ((index - 16) * 2)));
424 * pio_irq_disable - Disables irq generation for one endpoint
427 static void pio_irq_disable(struct pxa_ep *ep)
429 struct pxa_udc *udc = ep->dev;
430 int index = EPIDX(ep);
431 u32 udcicr0 = udc_readl(udc, UDCICR0);
432 u32 udcicr1 = udc_readl(udc, UDCICR1);
435 udc_writel(udc, UDCICR0, udcicr0 & ~(3 << (index * 2)));
437 udc_writel(udc, UDCICR1, udcicr1 & ~(3 << ((index - 16) * 2)));
441 * udc_set_mask_UDCCR - set bits in UDCCR
443 * @mask: bits to set in UDCCR
445 * Sets bits in UDCCR, leaving DME and FST bits as they were.
447 static inline void udc_set_mask_UDCCR(struct pxa_udc *udc, int mask)
449 u32 udccr = udc_readl(udc, UDCCR);
450 udc_writel(udc, UDCCR,
451 (udccr & UDCCR_MASK_BITS) | (mask & UDCCR_MASK_BITS));
455 * udc_clear_mask_UDCCR - clears bits in UDCCR
457 * @mask: bit to clear in UDCCR
459 * Clears bits in UDCCR, leaving DME and FST bits as they were.
461 static inline void udc_clear_mask_UDCCR(struct pxa_udc *udc, int mask)
463 u32 udccr = udc_readl(udc, UDCCR);
464 udc_writel(udc, UDCCR,
465 (udccr & UDCCR_MASK_BITS) & ~(mask & UDCCR_MASK_BITS));
469 * ep_write_UDCCSR - set bits in UDCCSR
471 * @mask: bits to set in UDCCR
473 * Sets bits in UDCCSR (UDCCSR0 and UDCCSR*).
475 * A specific case is applied to ep0 : the ACM bit is always set to 1, for
476 * SET_INTERFACE and SET_CONFIGURATION.
478 static inline void ep_write_UDCCSR(struct pxa_ep *ep, int mask)
482 udc_ep_writel(ep, UDCCSR, mask);
486 * ep_count_bytes_remain - get how many bytes in udc endpoint
489 * Returns number of bytes in OUT fifos. Broken for IN fifos (-EOPNOTSUPP)
491 static int ep_count_bytes_remain(struct pxa_ep *ep)
495 return udc_ep_readl(ep, UDCBCR) & 0x3ff;
499 * ep_is_empty - checks if ep has byte ready for reading
502 * If endpoint is the control endpoint, checks if there are bytes in the
503 * control endpoint fifo. If endpoint is a data endpoint, checks if bytes
504 * are ready for reading on OUT endpoint.
506 * Returns 0 if ep not empty, 1 if ep empty, -EOPNOTSUPP if IN endpoint
508 static int ep_is_empty(struct pxa_ep *ep)
512 if (!is_ep0(ep) && ep->dir_in)
515 ret = !(udc_ep_readl(ep, UDCCSR) & UDCCSR0_RNE);
517 ret = !(udc_ep_readl(ep, UDCCSR) & UDCCSR_BNE);
522 * ep_is_full - checks if ep has place to write bytes
525 * If endpoint is not the control endpoint and is an IN endpoint, checks if
526 * there is place to write bytes into the endpoint.
528 * Returns 0 if ep not full, 1 if ep full, -EOPNOTSUPP if OUT endpoint
530 static int ep_is_full(struct pxa_ep *ep)
533 return (udc_ep_readl(ep, UDCCSR) & UDCCSR0_IPR);
536 return (!(udc_ep_readl(ep, UDCCSR) & UDCCSR_BNF));
540 * epout_has_pkt - checks if OUT endpoint fifo has a packet available
543 * Returns 1 if a complete packet is available, 0 if not, -EOPNOTSUPP for IN ep.
545 static int epout_has_pkt(struct pxa_ep *ep)
547 if (!is_ep0(ep) && ep->dir_in)
550 return (udc_ep_readl(ep, UDCCSR) & UDCCSR0_OPC);
551 return (udc_ep_readl(ep, UDCCSR) & UDCCSR_PC);
555 * set_ep0state - Set ep0 automata state
559 static void set_ep0state(struct pxa_udc *udc, int state)
561 struct pxa_ep *ep = &udc->pxa_ep[0];
562 char *old_stname = EP0_STNAME(udc);
564 udc->ep0state = state;
565 ep_dbg(ep, "state=%s->%s, udccsr0=0x%03x, udcbcr=%d\n", old_stname,
566 EP0_STNAME(udc), udc_ep_readl(ep, UDCCSR),
567 udc_ep_readl(ep, UDCBCR));
571 * ep0_idle - Put control endpoint into idle state
574 static void ep0_idle(struct pxa_udc *dev)
576 set_ep0state(dev, WAIT_FOR_SETUP);
580 * inc_ep_stats_reqs - Update ep stats counts
581 * @ep: physical endpoint
583 * @is_in: ep direction (USB_DIR_IN or 0)
586 static void inc_ep_stats_reqs(struct pxa_ep *ep, int is_in)
595 * inc_ep_stats_bytes - Update ep stats counts
596 * @ep: physical endpoint
597 * @count: bytes transferred on endpoint
598 * @is_in: ep direction (USB_DIR_IN or 0)
600 static void inc_ep_stats_bytes(struct pxa_ep *ep, int count, int is_in)
603 ep->stats.in_bytes += count;
605 ep->stats.out_bytes += count;
609 * pxa_ep_setup - Sets up an usb physical endpoint
610 * @ep: pxa27x physical endpoint
612 * Find the physical pxa27x ep, and setup its UDCCR
614 static __init void pxa_ep_setup(struct pxa_ep *ep)
618 new_udccr = ((ep->config << UDCCONR_CN_S) & UDCCONR_CN)
619 | ((ep->interface << UDCCONR_IN_S) & UDCCONR_IN)
620 | ((ep->alternate << UDCCONR_AISN_S) & UDCCONR_AISN)
621 | ((EPADDR(ep) << UDCCONR_EN_S) & UDCCONR_EN)
622 | ((EPXFERTYPE(ep) << UDCCONR_ET_S) & UDCCONR_ET)
623 | ((ep->dir_in) ? UDCCONR_ED : 0)
624 | ((ep->fifo_size << UDCCONR_MPS_S) & UDCCONR_MPS)
627 udc_ep_writel(ep, UDCCR, new_udccr);
631 * pxa_eps_setup - Sets up all usb physical endpoints
634 * Setup all pxa physical endpoints, except ep0
636 static __init void pxa_eps_setup(struct pxa_udc *dev)
640 dev_dbg(dev->dev, "%s: dev=%p\n", __func__, dev);
642 for (i = 1; i < NR_PXA_ENDPOINTS; i++)
643 pxa_ep_setup(&dev->pxa_ep[i]);
647 * pxa_ep_alloc_request - Allocate usb request
651 * For the pxa27x, these can just wrap kmalloc/kfree. gadget drivers
652 * must still pass correctly initialized endpoints, since other controller
653 * drivers may care about how it's currently set up (dma issues etc).
655 static struct usb_request *
656 pxa_ep_alloc_request(struct usb_ep *_ep, gfp_t gfp_flags)
658 struct pxa27x_request *req;
660 req = kzalloc(sizeof *req, gfp_flags);
664 INIT_LIST_HEAD(&req->queue);
666 req->udc_usb_ep = container_of(_ep, struct udc_usb_ep, usb_ep);
672 * pxa_ep_free_request - Free usb request
676 * Wrapper around kfree to free _req
678 static void pxa_ep_free_request(struct usb_ep *_ep, struct usb_request *_req)
680 struct pxa27x_request *req;
682 req = container_of(_req, struct pxa27x_request, req);
683 WARN_ON(!list_empty(&req->queue));
688 * ep_add_request - add a request to the endpoint's queue
692 * Context: ep->lock held
694 * Queues the request in the endpoint's queue, and enables the interrupts
697 static void ep_add_request(struct pxa_ep *ep, struct pxa27x_request *req)
701 ep_vdbg(ep, "req:%p, lg=%d, udccsr=0x%03x\n", req,
702 req->req.length, udc_ep_readl(ep, UDCCSR));
705 list_add_tail(&req->queue, &ep->queue);
710 * ep_del_request - removes a request from the endpoint's queue
714 * Context: ep->lock held
716 * Unqueue the request from the endpoint's queue. If there are no more requests
717 * on the endpoint, and if it's not the control endpoint, interrupts are
718 * disabled on the endpoint.
720 static void ep_del_request(struct pxa_ep *ep, struct pxa27x_request *req)
724 ep_vdbg(ep, "req:%p, lg=%d, udccsr=0x%03x\n", req,
725 req->req.length, udc_ep_readl(ep, UDCCSR));
727 list_del_init(&req->queue);
729 if (!is_ep0(ep) && list_empty(&ep->queue))
734 * req_done - Complete an usb request
735 * @ep: pxa physical endpoint
737 * @status: usb request status sent to gadget API
738 * @pflags: flags of previous spinlock_irq_save() or NULL if no lock held
740 * Context: ep->lock held if flags not NULL, else ep->lock released
742 * Retire a pxa27x usb request. Endpoint must be locked.
744 static void req_done(struct pxa_ep *ep, struct pxa27x_request *req, int status,
745 unsigned long *pflags)
749 ep_del_request(ep, req);
750 if (likely(req->req.status == -EINPROGRESS))
751 req->req.status = status;
753 status = req->req.status;
755 if (status && status != -ESHUTDOWN)
756 ep_dbg(ep, "complete req %p stat %d len %u/%u\n",
758 req->req.actual, req->req.length);
761 spin_unlock_irqrestore(&ep->lock, *pflags);
762 local_irq_save(flags);
763 req->req.complete(&req->udc_usb_ep->usb_ep, &req->req);
764 local_irq_restore(flags);
766 spin_lock_irqsave(&ep->lock, *pflags);
770 * ep_end_out_req - Ends endpoint OUT request
771 * @ep: physical endpoint
773 * @pflags: flags of previous spinlock_irq_save() or NULL if no lock held
775 * Context: ep->lock held or released (see req_done())
777 * Ends endpoint OUT request (completes usb request).
779 static void ep_end_out_req(struct pxa_ep *ep, struct pxa27x_request *req,
780 unsigned long *pflags)
782 inc_ep_stats_reqs(ep, !USB_DIR_IN);
783 req_done(ep, req, 0, pflags);
787 * ep0_end_out_req - Ends control endpoint OUT request (ends data stage)
788 * @ep: physical endpoint
790 * @pflags: flags of previous spinlock_irq_save() or NULL if no lock held
792 * Context: ep->lock held or released (see req_done())
794 * Ends control endpoint OUT request (completes usb request), and puts
795 * control endpoint into idle state
797 static void ep0_end_out_req(struct pxa_ep *ep, struct pxa27x_request *req,
798 unsigned long *pflags)
800 set_ep0state(ep->dev, OUT_STATUS_STAGE);
801 ep_end_out_req(ep, req, pflags);
806 * ep_end_in_req - Ends endpoint IN request
807 * @ep: physical endpoint
809 * @pflags: flags of previous spinlock_irq_save() or NULL if no lock held
811 * Context: ep->lock held or released (see req_done())
813 * Ends endpoint IN request (completes usb request).
815 static void ep_end_in_req(struct pxa_ep *ep, struct pxa27x_request *req,
816 unsigned long *pflags)
818 inc_ep_stats_reqs(ep, USB_DIR_IN);
819 req_done(ep, req, 0, pflags);
823 * ep0_end_in_req - Ends control endpoint IN request (ends data stage)
824 * @ep: physical endpoint
826 * @pflags: flags of previous spinlock_irq_save() or NULL if no lock held
828 * Context: ep->lock held or released (see req_done())
830 * Ends control endpoint IN request (completes usb request), and puts
831 * control endpoint into status state
833 static void ep0_end_in_req(struct pxa_ep *ep, struct pxa27x_request *req,
834 unsigned long *pflags)
836 set_ep0state(ep->dev, IN_STATUS_STAGE);
837 ep_end_in_req(ep, req, pflags);
841 * nuke - Dequeue all requests
843 * @status: usb request status
845 * Context: ep->lock released
847 * Dequeues all requests on an endpoint. As a side effect, interrupts will be
848 * disabled on that endpoint (because no more requests).
850 static void nuke(struct pxa_ep *ep, int status)
852 struct pxa27x_request *req;
855 spin_lock_irqsave(&ep->lock, flags);
856 while (!list_empty(&ep->queue)) {
857 req = list_entry(ep->queue.next, struct pxa27x_request, queue);
858 req_done(ep, req, status, &flags);
860 spin_unlock_irqrestore(&ep->lock, flags);
864 * read_packet - transfer 1 packet from an OUT endpoint into request
865 * @ep: pxa physical endpoint
868 * Takes bytes from OUT endpoint and transfers them info the usb request.
869 * If there is less space in request than bytes received in OUT endpoint,
870 * bytes are left in the OUT endpoint.
872 * Returns how many bytes were actually transferred
874 static int read_packet(struct pxa_ep *ep, struct pxa27x_request *req)
877 int bytes_ep, bufferspace, count, i;
879 bytes_ep = ep_count_bytes_remain(ep);
880 bufferspace = req->req.length - req->req.actual;
882 buf = (u32 *)(req->req.buf + req->req.actual);
885 if (likely(!ep_is_empty(ep)))
886 count = min(bytes_ep, bufferspace);
890 for (i = count; i > 0; i -= 4)
891 *buf++ = udc_ep_readl(ep, UDCDR);
892 req->req.actual += count;
894 ep_write_UDCCSR(ep, UDCCSR_PC);
900 * write_packet - transfer 1 packet from request into an IN endpoint
901 * @ep: pxa physical endpoint
903 * @max: max bytes that fit into endpoint
905 * Takes bytes from usb request, and transfers them into the physical
906 * endpoint. If there are no bytes to transfer, doesn't write anything
907 * to physical endpoint.
909 * Returns how many bytes were actually transferred.
911 static int write_packet(struct pxa_ep *ep, struct pxa27x_request *req,
914 int length, count, remain, i;
918 buf = (u32 *)(req->req.buf + req->req.actual);
921 length = min(req->req.length - req->req.actual, max);
922 req->req.actual += length;
924 remain = length & 0x3;
925 count = length & ~(0x3);
926 for (i = count; i > 0 ; i -= 4)
927 udc_ep_writel(ep, UDCDR, *buf++);
930 for (i = remain; i > 0; i--)
931 udc_ep_writeb(ep, UDCDR, *buf_8++);
933 ep_vdbg(ep, "length=%d+%d, udccsr=0x%03x\n", count, remain,
934 udc_ep_readl(ep, UDCCSR));
940 * read_fifo - Transfer packets from OUT endpoint into usb request
941 * @ep: pxa physical endpoint
944 * Context: callable when in_interrupt()
946 * Unload as many packets as possible from the fifo we use for usb OUT
947 * transfers and put them into the request. Caller should have made sure
948 * there's at least one packet ready.
949 * Doesn't complete the request, that's the caller's job
951 * Returns 1 if the request completed, 0 otherwise
953 static int read_fifo(struct pxa_ep *ep, struct pxa27x_request *req)
955 int count, is_short, completed = 0;
957 while (epout_has_pkt(ep)) {
958 count = read_packet(ep, req);
959 inc_ep_stats_bytes(ep, count, !USB_DIR_IN);
961 is_short = (count < ep->fifo_size);
962 ep_dbg(ep, "read udccsr:%03x, count:%d bytes%s req %p %d/%d\n",
963 udc_ep_readl(ep, UDCCSR), count, is_short ? "/S" : "",
964 &req->req, req->req.actual, req->req.length);
967 if (is_short || req->req.actual == req->req.length) {
971 /* finished that packet. the next one may be waiting... */
977 * write_fifo - transfer packets from usb request into an IN endpoint
978 * @ep: pxa physical endpoint
979 * @req: pxa usb request
981 * Write to an IN endpoint fifo, as many packets as possible.
982 * irqs will use this to write the rest later.
983 * caller guarantees at least one packet buffer is ready (or a zlp).
984 * Doesn't complete the request, that's the caller's job
986 * Returns 1 if request fully transferred, 0 if partial transfer
988 static int write_fifo(struct pxa_ep *ep, struct pxa27x_request *req)
991 int count, is_short, is_last = 0, completed = 0, totcount = 0;
998 udccsr = udc_ep_readl(ep, UDCCSR);
999 if (udccsr & UDCCSR_PC) {
1000 ep_vdbg(ep, "Clearing Transmit Complete, udccsr=%x\n",
1002 ep_write_UDCCSR(ep, UDCCSR_PC);
1004 if (udccsr & UDCCSR_TRN) {
1005 ep_vdbg(ep, "Clearing Underrun on, udccsr=%x\n",
1007 ep_write_UDCCSR(ep, UDCCSR_TRN);
1010 count = write_packet(ep, req, max);
1011 inc_ep_stats_bytes(ep, count, USB_DIR_IN);
1014 /* last packet is usually short (or a zlp) */
1015 if (unlikely(count < max)) {
1019 if (likely(req->req.length > req->req.actual)
1024 /* interrupt/iso maxpacket may not fill the fifo */
1025 is_short = unlikely(max < ep->fifo_size);
1029 ep_write_UDCCSR(ep, UDCCSR_SP);
1031 /* requests complete when all IN data is in the FIFO */
1036 } while (!ep_is_full(ep));
1038 ep_dbg(ep, "wrote count:%d bytes%s%s, left:%d req=%p\n",
1039 totcount, is_last ? "/L" : "", is_short ? "/S" : "",
1040 req->req.length - req->req.actual, &req->req);
1046 * read_ep0_fifo - Transfer packets from control endpoint into usb request
1047 * @ep: control endpoint
1048 * @req: pxa usb request
1050 * Special ep0 version of the above read_fifo. Reads as many bytes from control
1051 * endpoint as can be read, and stores them into usb request (limited by request
1054 * Returns 0 if usb request only partially filled, 1 if fully filled
1056 static int read_ep0_fifo(struct pxa_ep *ep, struct pxa27x_request *req)
1058 int count, is_short, completed = 0;
1060 while (epout_has_pkt(ep)) {
1061 count = read_packet(ep, req);
1062 ep_write_UDCCSR(ep, UDCCSR0_OPC);
1063 inc_ep_stats_bytes(ep, count, !USB_DIR_IN);
1065 is_short = (count < ep->fifo_size);
1066 ep_dbg(ep, "read udccsr:%03x, count:%d bytes%s req %p %d/%d\n",
1067 udc_ep_readl(ep, UDCCSR), count, is_short ? "/S" : "",
1068 &req->req, req->req.actual, req->req.length);
1070 if (is_short || req->req.actual >= req->req.length) {
1080 * write_ep0_fifo - Send a request to control endpoint (ep0 in)
1081 * @ep: control endpoint
1084 * Context: callable when in_interrupt()
1086 * Sends a request (or a part of the request) to the control endpoint (ep0 in).
1087 * If the request doesn't fit, the remaining part will be sent from irq.
1088 * The request is considered fully written only if either :
1089 * - last write transferred all remaining bytes, but fifo was not fully filled
1090 * - last write was a 0 length write
1092 * Returns 1 if request fully written, 0 if request only partially sent
1094 static int write_ep0_fifo(struct pxa_ep *ep, struct pxa27x_request *req)
1097 int is_last, is_short;
1099 count = write_packet(ep, req, EP0_FIFO_SIZE);
1100 inc_ep_stats_bytes(ep, count, USB_DIR_IN);
1102 is_short = (count < EP0_FIFO_SIZE);
1103 is_last = ((count == 0) || (count < EP0_FIFO_SIZE));
1105 /* Sends either a short packet or a 0 length packet */
1106 if (unlikely(is_short))
1107 ep_write_UDCCSR(ep, UDCCSR0_IPR);
1109 ep_dbg(ep, "in %d bytes%s%s, %d left, req=%p, udccsr0=0x%03x\n",
1110 count, is_short ? "/S" : "", is_last ? "/L" : "",
1111 req->req.length - req->req.actual,
1112 &req->req, udc_ep_readl(ep, UDCCSR));
1118 * pxa_ep_queue - Queue a request into an IN endpoint
1119 * @_ep: usb endpoint
1120 * @_req: usb request
1123 * Context: normally called when !in_interrupt, but callable when in_interrupt()
1124 * in the special case of ep0 setup :
1125 * (irq->handle_ep0_ctrl_req->gadget_setup->pxa_ep_queue)
1127 * Returns 0 if succedeed, error otherwise
1129 static int pxa_ep_queue(struct usb_ep *_ep, struct usb_request *_req,
1132 struct udc_usb_ep *udc_usb_ep;
1134 struct pxa27x_request *req;
1135 struct pxa_udc *dev;
1136 unsigned long flags;
1140 int recursion_detected;
1142 req = container_of(_req, struct pxa27x_request, req);
1143 udc_usb_ep = container_of(_ep, struct udc_usb_ep, usb_ep);
1145 if (unlikely(!_req || !_req->complete || !_req->buf))
1151 dev = udc_usb_ep->dev;
1152 ep = udc_usb_ep->pxa_ep;
1157 if (unlikely(!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN)) {
1158 ep_dbg(ep, "bogus device state\n");
1162 /* iso is always one packet per request, that's the only way
1163 * we can report per-packet status. that also helps with dma.
1165 if (unlikely(EPXFERTYPE_is_ISO(ep)
1166 && req->req.length > ep->fifo_size))
1169 spin_lock_irqsave(&ep->lock, flags);
1170 recursion_detected = ep->in_handle_ep;
1172 is_first_req = list_empty(&ep->queue);
1173 ep_dbg(ep, "queue req %p(first=%s), len %d buf %p\n",
1174 _req, is_first_req ? "yes" : "no",
1175 _req->length, _req->buf);
1178 _req->status = -ESHUTDOWN;
1184 ep_err(ep, "refusing to queue req %p (already queued)\n", req);
1188 length = _req->length;
1189 _req->status = -EINPROGRESS;
1192 ep_add_request(ep, req);
1193 spin_unlock_irqrestore(&ep->lock, flags);
1196 switch (dev->ep0state) {
1197 case WAIT_ACK_SET_CONF_INTERF:
1199 ep_end_in_req(ep, req, NULL);
1201 ep_err(ep, "got a request of %d bytes while"
1202 "in state WAIT_ACK_SET_CONF_INTERF\n",
1204 ep_del_request(ep, req);
1210 if (!ep_is_full(ep))
1211 if (write_ep0_fifo(ep, req))
1212 ep0_end_in_req(ep, req, NULL);
1214 case OUT_DATA_STAGE:
1215 if ((length == 0) || !epout_has_pkt(ep))
1216 if (read_ep0_fifo(ep, req))
1217 ep0_end_out_req(ep, req, NULL);
1220 ep_err(ep, "odd state %s to send me a request\n",
1221 EP0_STNAME(ep->dev));
1222 ep_del_request(ep, req);
1227 if (!recursion_detected)
1234 spin_unlock_irqrestore(&ep->lock, flags);
1239 * pxa_ep_dequeue - Dequeue one request
1240 * @_ep: usb endpoint
1241 * @_req: usb request
1243 * Return 0 if no error, -EINVAL or -ECONNRESET otherwise
1245 static int pxa_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req)
1248 struct udc_usb_ep *udc_usb_ep;
1249 struct pxa27x_request *req;
1250 unsigned long flags;
1255 udc_usb_ep = container_of(_ep, struct udc_usb_ep, usb_ep);
1256 ep = udc_usb_ep->pxa_ep;
1257 if (!ep || is_ep0(ep))
1260 spin_lock_irqsave(&ep->lock, flags);
1262 /* make sure it's actually queued on this endpoint */
1263 list_for_each_entry(req, &ep->queue, queue) {
1264 if (&req->req == _req) {
1270 spin_unlock_irqrestore(&ep->lock, flags);
1272 req_done(ep, req, -ECONNRESET, NULL);
1277 * pxa_ep_set_halt - Halts operations on one endpoint
1278 * @_ep: usb endpoint
1281 * Returns 0 if no error, -EINVAL, -EROFS, -EAGAIN otherwise
1283 static int pxa_ep_set_halt(struct usb_ep *_ep, int value)
1286 struct udc_usb_ep *udc_usb_ep;
1287 unsigned long flags;
1293 udc_usb_ep = container_of(_ep, struct udc_usb_ep, usb_ep);
1294 ep = udc_usb_ep->pxa_ep;
1295 if (!ep || is_ep0(ep))
1300 * This path (reset toggle+halt) is needed to implement
1301 * SET_INTERFACE on normal hardware. but it can't be
1302 * done from software on the PXA UDC, and the hardware
1303 * forgets to do it as part of SET_INTERFACE automagic.
1305 ep_dbg(ep, "only host can clear halt\n");
1309 spin_lock_irqsave(&ep->lock, flags);
1312 if (ep->dir_in && (ep_is_full(ep) || !list_empty(&ep->queue)))
1315 /* FST, FEF bits are the same for control and non control endpoints */
1317 ep_write_UDCCSR(ep, UDCCSR_FST | UDCCSR_FEF);
1319 set_ep0state(ep->dev, STALL);
1322 spin_unlock_irqrestore(&ep->lock, flags);
1327 * pxa_ep_fifo_status - Get how many bytes in physical endpoint
1328 * @_ep: usb endpoint
1330 * Returns number of bytes in OUT fifos. Broken for IN fifos.
1332 static int pxa_ep_fifo_status(struct usb_ep *_ep)
1335 struct udc_usb_ep *udc_usb_ep;
1339 udc_usb_ep = container_of(_ep, struct udc_usb_ep, usb_ep);
1340 ep = udc_usb_ep->pxa_ep;
1341 if (!ep || is_ep0(ep))
1346 if (ep->dev->gadget.speed == USB_SPEED_UNKNOWN || ep_is_empty(ep))
1349 return ep_count_bytes_remain(ep) + 1;
1353 * pxa_ep_fifo_flush - Flushes one endpoint
1354 * @_ep: usb endpoint
1356 * Discards all data in one endpoint(IN or OUT), except control endpoint.
1358 static void pxa_ep_fifo_flush(struct usb_ep *_ep)
1361 struct udc_usb_ep *udc_usb_ep;
1362 unsigned long flags;
1366 udc_usb_ep = container_of(_ep, struct udc_usb_ep, usb_ep);
1367 ep = udc_usb_ep->pxa_ep;
1368 if (!ep || is_ep0(ep))
1371 spin_lock_irqsave(&ep->lock, flags);
1373 if (unlikely(!list_empty(&ep->queue)))
1374 ep_dbg(ep, "called while queue list not empty\n");
1375 ep_dbg(ep, "called\n");
1377 /* for OUT, just read and discard the FIFO contents. */
1379 while (!ep_is_empty(ep))
1380 udc_ep_readl(ep, UDCDR);
1382 /* most IN status is the same, but ISO can't stall */
1384 UDCCSR_PC | UDCCSR_FEF | UDCCSR_TRN
1385 | (EPXFERTYPE_is_ISO(ep) ? 0 : UDCCSR_SST));
1388 spin_unlock_irqrestore(&ep->lock, flags);
1392 * pxa_ep_enable - Enables usb endpoint
1393 * @_ep: usb endpoint
1394 * @desc: usb endpoint descriptor
1396 * Nothing much to do here, as ep configuration is done once and for all
1397 * before udc is enabled. After udc enable, no physical endpoint configuration
1399 * Function makes sanity checks and flushes the endpoint.
1401 static int pxa_ep_enable(struct usb_ep *_ep,
1402 const struct usb_endpoint_descriptor *desc)
1405 struct udc_usb_ep *udc_usb_ep;
1406 struct pxa_udc *udc;
1411 udc_usb_ep = container_of(_ep, struct udc_usb_ep, usb_ep);
1412 if (udc_usb_ep->pxa_ep) {
1413 ep = udc_usb_ep->pxa_ep;
1414 ep_warn(ep, "usb_ep %s already enabled, doing nothing\n",
1417 ep = find_pxa_ep(udc_usb_ep->dev, udc_usb_ep);
1420 if (!ep || is_ep0(ep)) {
1421 dev_err(udc_usb_ep->dev->dev,
1422 "unable to match pxa_ep for ep %s\n",
1427 if ((desc->bDescriptorType != USB_DT_ENDPOINT)
1428 || (ep->type != usb_endpoint_type(desc))) {
1429 ep_err(ep, "type mismatch\n");
1433 if (ep->fifo_size < usb_endpoint_maxp(desc)) {
1434 ep_err(ep, "bad maxpacket\n");
1438 udc_usb_ep->pxa_ep = ep;
1441 if (!udc->driver || udc->gadget.speed == USB_SPEED_UNKNOWN) {
1442 ep_err(ep, "bogus device state\n");
1448 /* flush fifo (mostly for OUT buffers) */
1449 pxa_ep_fifo_flush(_ep);
1451 ep_dbg(ep, "enabled\n");
1456 * pxa_ep_disable - Disable usb endpoint
1457 * @_ep: usb endpoint
1459 * Same as for pxa_ep_enable, no physical endpoint configuration can be
1461 * Function flushes the endpoint and related requests.
1463 static int pxa_ep_disable(struct usb_ep *_ep)
1466 struct udc_usb_ep *udc_usb_ep;
1471 udc_usb_ep = container_of(_ep, struct udc_usb_ep, usb_ep);
1472 ep = udc_usb_ep->pxa_ep;
1473 if (!ep || is_ep0(ep) || !list_empty(&ep->queue))
1477 nuke(ep, -ESHUTDOWN);
1479 pxa_ep_fifo_flush(_ep);
1480 udc_usb_ep->pxa_ep = NULL;
1482 ep_dbg(ep, "disabled\n");
1486 static struct usb_ep_ops pxa_ep_ops = {
1487 .enable = pxa_ep_enable,
1488 .disable = pxa_ep_disable,
1490 .alloc_request = pxa_ep_alloc_request,
1491 .free_request = pxa_ep_free_request,
1493 .queue = pxa_ep_queue,
1494 .dequeue = pxa_ep_dequeue,
1496 .set_halt = pxa_ep_set_halt,
1497 .fifo_status = pxa_ep_fifo_status,
1498 .fifo_flush = pxa_ep_fifo_flush,
1502 * dplus_pullup - Connect or disconnect pullup resistor to D+ pin
1504 * @on: 0 if disconnect pullup resistor, 1 otherwise
1507 * Handle D+ pullup resistor, make the device visible to the usb bus, and
1508 * declare it as a full speed usb device
1510 static void dplus_pullup(struct pxa_udc *udc, int on)
1513 if (gpio_is_valid(udc->mach->gpio_pullup))
1514 gpio_set_value(udc->mach->gpio_pullup,
1515 !udc->mach->gpio_pullup_inverted);
1516 if (udc->mach->udc_command)
1517 udc->mach->udc_command(PXA2XX_UDC_CMD_CONNECT);
1519 if (gpio_is_valid(udc->mach->gpio_pullup))
1520 gpio_set_value(udc->mach->gpio_pullup,
1521 udc->mach->gpio_pullup_inverted);
1522 if (udc->mach->udc_command)
1523 udc->mach->udc_command(PXA2XX_UDC_CMD_DISCONNECT);
1525 udc->pullup_on = on;
1529 * pxa_udc_get_frame - Returns usb frame number
1530 * @_gadget: usb gadget
1532 static int pxa_udc_get_frame(struct usb_gadget *_gadget)
1534 struct pxa_udc *udc = to_gadget_udc(_gadget);
1536 return (udc_readl(udc, UDCFNR) & 0x7ff);
1540 * pxa_udc_wakeup - Force udc device out of suspend
1541 * @_gadget: usb gadget
1543 * Returns 0 if successful, error code otherwise
1545 static int pxa_udc_wakeup(struct usb_gadget *_gadget)
1547 struct pxa_udc *udc = to_gadget_udc(_gadget);
1549 /* host may not have enabled remote wakeup */
1550 if ((udc_readl(udc, UDCCR) & UDCCR_DWRE) == 0)
1551 return -EHOSTUNREACH;
1552 udc_set_mask_UDCCR(udc, UDCCR_UDR);
1556 static void udc_enable(struct pxa_udc *udc);
1557 static void udc_disable(struct pxa_udc *udc);
1560 * should_enable_udc - Tells if UDC should be enabled
1564 * The UDC should be enabled if :
1566 * - the pullup resistor is connected
1567 * - and a gadget driver is bound
1568 * - and vbus is sensed (or no vbus sense is available)
1570 * Returns 1 if UDC should be enabled, 0 otherwise
1572 static int should_enable_udc(struct pxa_udc *udc)
1576 put_on = ((udc->pullup_on) && (udc->driver));
1577 put_on &= ((udc->vbus_sensed) || (IS_ERR_OR_NULL(udc->transceiver)));
1582 * should_disable_udc - Tells if UDC should be disabled
1586 * The UDC should be disabled if :
1587 * - the pullup resistor is not connected
1588 * - or no gadget driver is bound
1589 * - or no vbus is sensed (when vbus sesing is available)
1591 * Returns 1 if UDC should be disabled
1593 static int should_disable_udc(struct pxa_udc *udc)
1597 put_off = ((!udc->pullup_on) || (!udc->driver));
1598 put_off |= ((!udc->vbus_sensed) && (!IS_ERR_OR_NULL(udc->transceiver)));
1603 * pxa_udc_pullup - Offer manual D+ pullup control
1604 * @_gadget: usb gadget using the control
1605 * @is_active: 0 if disconnect, else connect D+ pullup resistor
1606 * Context: !in_interrupt()
1608 * Returns 0 if OK, -EOPNOTSUPP if udc driver doesn't handle D+ pullup
1610 static int pxa_udc_pullup(struct usb_gadget *_gadget, int is_active)
1612 struct pxa_udc *udc = to_gadget_udc(_gadget);
1614 if (!gpio_is_valid(udc->mach->gpio_pullup) && !udc->mach->udc_command)
1617 dplus_pullup(udc, is_active);
1619 if (should_enable_udc(udc))
1621 if (should_disable_udc(udc))
1626 static void udc_enable(struct pxa_udc *udc);
1627 static void udc_disable(struct pxa_udc *udc);
1630 * pxa_udc_vbus_session - Called by external transceiver to enable/disable udc
1631 * @_gadget: usb gadget
1632 * @is_active: 0 if should disable the udc, 1 if should enable
1634 * Enables the udc, and optionnaly activates D+ pullup resistor. Or disables the
1635 * udc, and deactivates D+ pullup resistor.
1639 static int pxa_udc_vbus_session(struct usb_gadget *_gadget, int is_active)
1641 struct pxa_udc *udc = to_gadget_udc(_gadget);
1643 udc->vbus_sensed = is_active;
1644 if (should_enable_udc(udc))
1646 if (should_disable_udc(udc))
1653 * pxa_udc_vbus_draw - Called by gadget driver after SET_CONFIGURATION completed
1654 * @_gadget: usb gadget
1655 * @mA: current drawn
1657 * Context: !in_interrupt()
1659 * Called after a configuration was chosen by a USB host, to inform how much
1660 * current can be drawn by the device from VBus line.
1662 * Returns 0 or -EOPNOTSUPP if no transceiver is handling the udc
1664 static int pxa_udc_vbus_draw(struct usb_gadget *_gadget, unsigned mA)
1666 struct pxa_udc *udc;
1668 udc = to_gadget_udc(_gadget);
1669 if (!IS_ERR_OR_NULL(udc->transceiver))
1670 return usb_phy_set_power(udc->transceiver, mA);
1674 static int pxa27x_udc_start(struct usb_gadget *g,
1675 struct usb_gadget_driver *driver);
1676 static int pxa27x_udc_stop(struct usb_gadget *g,
1677 struct usb_gadget_driver *driver);
1679 static const struct usb_gadget_ops pxa_udc_ops = {
1680 .get_frame = pxa_udc_get_frame,
1681 .wakeup = pxa_udc_wakeup,
1682 .pullup = pxa_udc_pullup,
1683 .vbus_session = pxa_udc_vbus_session,
1684 .vbus_draw = pxa_udc_vbus_draw,
1685 .udc_start = pxa27x_udc_start,
1686 .udc_stop = pxa27x_udc_stop,
1690 * udc_disable - disable udc device controller
1694 * Disables the udc device : disables clocks, udc interrupts, control endpoint
1697 static void udc_disable(struct pxa_udc *udc)
1702 udc_writel(udc, UDCICR0, 0);
1703 udc_writel(udc, UDCICR1, 0);
1705 udc_clear_mask_UDCCR(udc, UDCCR_UDE);
1706 clk_disable(udc->clk);
1709 udc->gadget.speed = USB_SPEED_UNKNOWN;
1715 * udc_init_data - Initialize udc device data structures
1718 * Initializes gadget endpoint list, endpoints locks. No action is taken
1721 static __init void udc_init_data(struct pxa_udc *dev)
1726 /* device/ep0 records init */
1727 INIT_LIST_HEAD(&dev->gadget.ep_list);
1728 INIT_LIST_HEAD(&dev->gadget.ep0->ep_list);
1729 dev->udc_usb_ep[0].pxa_ep = &dev->pxa_ep[0];
1732 /* PXA endpoints init */
1733 for (i = 0; i < NR_PXA_ENDPOINTS; i++) {
1734 ep = &dev->pxa_ep[i];
1736 ep->enabled = is_ep0(ep);
1737 INIT_LIST_HEAD(&ep->queue);
1738 spin_lock_init(&ep->lock);
1741 /* USB endpoints init */
1742 for (i = 1; i < NR_USB_ENDPOINTS; i++)
1743 list_add_tail(&dev->udc_usb_ep[i].usb_ep.ep_list,
1744 &dev->gadget.ep_list);
1748 * udc_enable - Enables the udc device
1751 * Enables the udc device : enables clocks, udc interrupts, control endpoint
1752 * interrupts, sets usb as UDC client and setups endpoints.
1754 static void udc_enable(struct pxa_udc *udc)
1759 udc_writel(udc, UDCICR0, 0);
1760 udc_writel(udc, UDCICR1, 0);
1761 udc_clear_mask_UDCCR(udc, UDCCR_UDE);
1763 clk_enable(udc->clk);
1766 udc->gadget.speed = USB_SPEED_FULL;
1767 memset(&udc->stats, 0, sizeof(udc->stats));
1769 udc_set_mask_UDCCR(udc, UDCCR_UDE);
1770 ep_write_UDCCSR(&udc->pxa_ep[0], UDCCSR0_ACM);
1772 if (udc_readl(udc, UDCCR) & UDCCR_EMCE)
1773 dev_err(udc->dev, "Configuration errors, udc disabled\n");
1776 * Caller must be able to sleep in order to cope with startup transients
1780 /* enable suspend/resume and reset irqs */
1781 udc_writel(udc, UDCICR1,
1782 UDCICR1_IECC | UDCICR1_IERU
1783 | UDCICR1_IESU | UDCICR1_IERS);
1785 /* enable ep0 irqs */
1786 pio_irq_enable(&udc->pxa_ep[0]);
1792 * pxa27x_start - Register gadget driver
1793 * @driver: gadget driver
1794 * @bind: bind function
1796 * When a driver is successfully registered, it will receive control requests
1797 * including set_configuration(), which enables non-control requests. Then
1798 * usb traffic follows until a disconnect is reported. Then a host may connect
1799 * again, or the driver might get unbound.
1801 * Note that the udc is not automatically enabled. Check function
1802 * should_enable_udc().
1804 * Returns 0 if no error, -EINVAL, -ENODEV, -EBUSY otherwise
1806 static int pxa27x_udc_start(struct usb_gadget *g,
1807 struct usb_gadget_driver *driver)
1809 struct pxa_udc *udc = to_pxa(g);
1812 /* first hook up the driver ... */
1813 udc->driver = driver;
1814 udc->gadget.dev.driver = &driver->driver;
1815 dplus_pullup(udc, 1);
1817 retval = device_add(&udc->gadget.dev);
1819 dev_err(udc->dev, "device_add error %d\n", retval);
1822 if (!IS_ERR_OR_NULL(udc->transceiver)) {
1823 retval = otg_set_peripheral(udc->transceiver->otg,
1826 dev_err(udc->dev, "can't bind to transceiver\n");
1831 if (should_enable_udc(udc))
1837 udc->gadget.dev.driver = NULL;
1842 * stop_activity - Stops udc endpoints
1844 * @driver: gadget driver
1846 * Disables all udc endpoints (even control endpoint), report disconnect to
1849 static void stop_activity(struct pxa_udc *udc, struct usb_gadget_driver *driver)
1853 /* don't disconnect drivers more than once */
1854 if (udc->gadget.speed == USB_SPEED_UNKNOWN)
1856 udc->gadget.speed = USB_SPEED_UNKNOWN;
1858 for (i = 0; i < NR_USB_ENDPOINTS; i++)
1859 pxa_ep_disable(&udc->udc_usb_ep[i].usb_ep);
1863 * pxa27x_udc_stop - Unregister the gadget driver
1864 * @driver: gadget driver
1866 * Returns 0 if no error, -ENODEV, -EINVAL otherwise
1868 static int pxa27x_udc_stop(struct usb_gadget *g,
1869 struct usb_gadget_driver *driver)
1871 struct pxa_udc *udc = to_pxa(g);
1873 stop_activity(udc, driver);
1875 dplus_pullup(udc, 0);
1879 device_del(&udc->gadget.dev);
1881 if (!IS_ERR_OR_NULL(udc->transceiver))
1882 return otg_set_peripheral(udc->transceiver->otg, NULL);
1887 * handle_ep0_ctrl_req - handle control endpoint control request
1889 * @req: control request
1891 static void handle_ep0_ctrl_req(struct pxa_udc *udc,
1892 struct pxa27x_request *req)
1894 struct pxa_ep *ep = &udc->pxa_ep[0];
1896 struct usb_ctrlrequest r;
1900 int have_extrabytes = 0;
1901 unsigned long flags;
1904 spin_lock_irqsave(&ep->lock, flags);
1907 * In the PXA320 manual, in the section about Back-to-Back setup
1908 * packets, it describes this situation. The solution is to set OPC to
1909 * get rid of the status packet, and then continue with the setup
1910 * packet. Generalize to pxa27x CPUs.
1912 if (epout_has_pkt(ep) && (ep_count_bytes_remain(ep) == 0))
1913 ep_write_UDCCSR(ep, UDCCSR0_OPC);
1915 /* read SETUP packet */
1916 for (i = 0; i < 2; i++) {
1917 if (unlikely(ep_is_empty(ep)))
1919 u.word[i] = udc_ep_readl(ep, UDCDR);
1922 have_extrabytes = !ep_is_empty(ep);
1923 while (!ep_is_empty(ep)) {
1924 i = udc_ep_readl(ep, UDCDR);
1925 ep_err(ep, "wrong to have extra bytes for setup : 0x%08x\n", i);
1928 ep_dbg(ep, "SETUP %02x.%02x v%04x i%04x l%04x\n",
1929 u.r.bRequestType, u.r.bRequest,
1930 le16_to_cpu(u.r.wValue), le16_to_cpu(u.r.wIndex),
1931 le16_to_cpu(u.r.wLength));
1932 if (unlikely(have_extrabytes))
1935 if (u.r.bRequestType & USB_DIR_IN)
1936 set_ep0state(udc, IN_DATA_STAGE);
1938 set_ep0state(udc, OUT_DATA_STAGE);
1940 /* Tell UDC to enter Data Stage */
1941 ep_write_UDCCSR(ep, UDCCSR0_SA | UDCCSR0_OPC);
1943 spin_unlock_irqrestore(&ep->lock, flags);
1944 i = udc->driver->setup(&udc->gadget, &u.r);
1945 spin_lock_irqsave(&ep->lock, flags);
1949 spin_unlock_irqrestore(&ep->lock, flags);
1952 ep_dbg(ep, "protocol STALL, udccsr0=%03x err %d\n",
1953 udc_ep_readl(ep, UDCCSR), i);
1954 ep_write_UDCCSR(ep, UDCCSR0_FST | UDCCSR0_FTF);
1955 set_ep0state(udc, STALL);
1960 * handle_ep0 - Handle control endpoint data transfers
1962 * @fifo_irq: 1 if triggered by fifo service type irq
1963 * @opc_irq: 1 if triggered by output packet complete type irq
1965 * Context : when in_interrupt() or with ep->lock held
1967 * Tries to transfer all pending request data into the endpoint and/or
1968 * transfer all pending data in the endpoint into usb requests.
1969 * Handles states of ep0 automata.
1971 * PXA27x hardware handles several standard usb control requests without
1972 * driver notification. The requests fully handled by hardware are :
1973 * SET_ADDRESS, SET_FEATURE, CLEAR_FEATURE, GET_CONFIGURATION, GET_INTERFACE,
1975 * The requests handled by hardware, but with irq notification are :
1976 * SYNCH_FRAME, SET_CONFIGURATION, SET_INTERFACE
1977 * The remaining standard requests really handled by handle_ep0 are :
1978 * GET_DESCRIPTOR, SET_DESCRIPTOR, specific requests.
1979 * Requests standardized outside of USB 2.0 chapter 9 are handled more
1980 * uniformly, by gadget drivers.
1982 * The control endpoint state machine is _not_ USB spec compliant, it's even
1983 * hardly compliant with Intel PXA270 developers guide.
1984 * The key points which inferred this state machine are :
1985 * - on every setup token, bit UDCCSR0_SA is raised and held until cleared by
1987 * - on every OUT packet received, UDCCSR0_OPC is raised and held until
1988 * cleared by software.
1989 * - clearing UDCCSR0_OPC always flushes ep0. If in setup stage, never do it
1990 * before reading ep0.
1991 * This is true only for PXA27x. This is not true anymore for PXA3xx family
1992 * (check Back-to-Back setup packet in developers guide).
1993 * - irq can be called on a "packet complete" event (opc_irq=1), while
1994 * UDCCSR0_OPC is not yet raised (delta can be as big as 100ms
1995 * from experimentation).
1996 * - as UDCCSR0_SA can be activated while in irq handling, and clearing
1997 * UDCCSR0_OPC would flush the setup data, we almost never clear UDCCSR0_OPC
1998 * => we never actually read the "status stage" packet of an IN data stage
1999 * => this is not documented in Intel documentation
2000 * - hardware as no idea of STATUS STAGE, it only handle SETUP STAGE and DATA
2001 * STAGE. The driver add STATUS STAGE to send last zero length packet in
2003 * - special attention was needed for IN_STATUS_STAGE. If a packet complete
2004 * event is detected, we terminate the status stage without ackowledging the
2005 * packet (not to risk to loose a potential SETUP packet)
2007 static void handle_ep0(struct pxa_udc *udc, int fifo_irq, int opc_irq)
2010 struct pxa_ep *ep = &udc->pxa_ep[0];
2011 struct pxa27x_request *req = NULL;
2014 if (!list_empty(&ep->queue))
2015 req = list_entry(ep->queue.next, struct pxa27x_request, queue);
2017 udccsr0 = udc_ep_readl(ep, UDCCSR);
2018 ep_dbg(ep, "state=%s, req=%p, udccsr0=0x%03x, udcbcr=%d, irq_msk=%x\n",
2019 EP0_STNAME(udc), req, udccsr0, udc_ep_readl(ep, UDCBCR),
2020 (fifo_irq << 1 | opc_irq));
2022 if (udccsr0 & UDCCSR0_SST) {
2023 ep_dbg(ep, "clearing stall status\n");
2025 ep_write_UDCCSR(ep, UDCCSR0_SST);
2029 if (udccsr0 & UDCCSR0_SA) {
2031 set_ep0state(udc, SETUP_STAGE);
2034 switch (udc->ep0state) {
2035 case WAIT_FOR_SETUP:
2037 * Hardware bug : beware, we cannot clear OPC, since we would
2038 * miss a potential OPC irq for a setup packet.
2039 * So, we only do ... nothing, and hope for a next irq with
2044 udccsr0 &= UDCCSR0_CTRL_REQ_MASK;
2045 if (likely(udccsr0 == UDCCSR0_CTRL_REQ_MASK))
2046 handle_ep0_ctrl_req(udc, req);
2048 case IN_DATA_STAGE: /* GET_DESCRIPTOR */
2049 if (epout_has_pkt(ep))
2050 ep_write_UDCCSR(ep, UDCCSR0_OPC);
2051 if (req && !ep_is_full(ep))
2052 completed = write_ep0_fifo(ep, req);
2054 ep0_end_in_req(ep, req, NULL);
2056 case OUT_DATA_STAGE: /* SET_DESCRIPTOR */
2057 if (epout_has_pkt(ep) && req)
2058 completed = read_ep0_fifo(ep, req);
2060 ep0_end_out_req(ep, req, NULL);
2063 ep_write_UDCCSR(ep, UDCCSR0_FST);
2065 case IN_STATUS_STAGE:
2067 * Hardware bug : beware, we cannot clear OPC, since we would
2068 * miss a potential PC irq for a setup packet.
2069 * So, we only put the ep0 into WAIT_FOR_SETUP state.
2074 case OUT_STATUS_STAGE:
2075 case WAIT_ACK_SET_CONF_INTERF:
2076 ep_warn(ep, "should never get in %s state here!!!\n",
2077 EP0_STNAME(ep->dev));
2084 * handle_ep - Handle endpoint data tranfers
2085 * @ep: pxa physical endpoint
2087 * Tries to transfer all pending request data into the endpoint and/or
2088 * transfer all pending data in the endpoint into usb requests.
2090 * Is always called when in_interrupt() and with ep->lock released.
2092 static void handle_ep(struct pxa_ep *ep)
2094 struct pxa27x_request *req;
2097 int is_in = ep->dir_in;
2099 unsigned long flags;
2101 spin_lock_irqsave(&ep->lock, flags);
2102 if (ep->in_handle_ep)
2103 goto recursion_detected;
2104 ep->in_handle_ep = 1;
2108 udccsr = udc_ep_readl(ep, UDCCSR);
2110 if (likely(!list_empty(&ep->queue)))
2111 req = list_entry(ep->queue.next,
2112 struct pxa27x_request, queue);
2116 ep_dbg(ep, "req:%p, udccsr 0x%03x loop=%d\n",
2117 req, udccsr, loop++);
2119 if (unlikely(udccsr & (UDCCSR_SST | UDCCSR_TRN)))
2120 udc_ep_writel(ep, UDCCSR,
2121 udccsr & (UDCCSR_SST | UDCCSR_TRN));
2125 if (unlikely(is_in)) {
2126 if (likely(!ep_is_full(ep)))
2127 completed = write_fifo(ep, req);
2129 if (likely(epout_has_pkt(ep)))
2130 completed = read_fifo(ep, req);
2135 ep_end_in_req(ep, req, &flags);
2137 ep_end_out_req(ep, req, &flags);
2139 } while (completed);
2141 ep->in_handle_ep = 0;
2143 spin_unlock_irqrestore(&ep->lock, flags);
2147 * pxa27x_change_configuration - Handle SET_CONF usb request notification
2149 * @config: usb configuration
2151 * Post the request to upper level.
2152 * Don't use any pxa specific harware configuration capabilities
2154 static void pxa27x_change_configuration(struct pxa_udc *udc, int config)
2156 struct usb_ctrlrequest req ;
2158 dev_dbg(udc->dev, "config=%d\n", config);
2160 udc->config = config;
2161 udc->last_interface = 0;
2162 udc->last_alternate = 0;
2164 req.bRequestType = 0;
2165 req.bRequest = USB_REQ_SET_CONFIGURATION;
2166 req.wValue = config;
2170 set_ep0state(udc, WAIT_ACK_SET_CONF_INTERF);
2171 udc->driver->setup(&udc->gadget, &req);
2172 ep_write_UDCCSR(&udc->pxa_ep[0], UDCCSR0_AREN);
2176 * pxa27x_change_interface - Handle SET_INTERF usb request notification
2178 * @iface: interface number
2179 * @alt: alternate setting number
2181 * Post the request to upper level.
2182 * Don't use any pxa specific harware configuration capabilities
2184 static void pxa27x_change_interface(struct pxa_udc *udc, int iface, int alt)
2186 struct usb_ctrlrequest req;
2188 dev_dbg(udc->dev, "interface=%d, alternate setting=%d\n", iface, alt);
2190 udc->last_interface = iface;
2191 udc->last_alternate = alt;
2193 req.bRequestType = USB_RECIP_INTERFACE;
2194 req.bRequest = USB_REQ_SET_INTERFACE;
2199 set_ep0state(udc, WAIT_ACK_SET_CONF_INTERF);
2200 udc->driver->setup(&udc->gadget, &req);
2201 ep_write_UDCCSR(&udc->pxa_ep[0], UDCCSR0_AREN);
2205 * irq_handle_data - Handle data transfer
2206 * @irq: irq IRQ number
2207 * @udc: dev pxa_udc device structure
2209 * Called from irq handler, transferts data to or from endpoint to queue
2211 static void irq_handle_data(int irq, struct pxa_udc *udc)
2215 u32 udcisr0 = udc_readl(udc, UDCISR0) & UDCCISR0_EP_MASK;
2216 u32 udcisr1 = udc_readl(udc, UDCISR1) & UDCCISR1_EP_MASK;
2218 if (udcisr0 & UDCISR_INT_MASK) {
2219 udc->pxa_ep[0].stats.irqs++;
2220 udc_writel(udc, UDCISR0, UDCISR_INT(0, UDCISR_INT_MASK));
2221 handle_ep0(udc, !!(udcisr0 & UDCICR_FIFOERR),
2222 !!(udcisr0 & UDCICR_PKTCOMPL));
2226 for (i = 1; udcisr0 != 0 && i < 16; udcisr0 >>= 2, i++) {
2227 if (!(udcisr0 & UDCISR_INT_MASK))
2230 udc_writel(udc, UDCISR0, UDCISR_INT(i, UDCISR_INT_MASK));
2232 WARN_ON(i >= ARRAY_SIZE(udc->pxa_ep));
2233 if (i < ARRAY_SIZE(udc->pxa_ep)) {
2234 ep = &udc->pxa_ep[i];
2240 for (i = 16; udcisr1 != 0 && i < 24; udcisr1 >>= 2, i++) {
2241 udc_writel(udc, UDCISR1, UDCISR_INT(i - 16, UDCISR_INT_MASK));
2242 if (!(udcisr1 & UDCISR_INT_MASK))
2245 WARN_ON(i >= ARRAY_SIZE(udc->pxa_ep));
2246 if (i < ARRAY_SIZE(udc->pxa_ep)) {
2247 ep = &udc->pxa_ep[i];
2256 * irq_udc_suspend - Handle IRQ "UDC Suspend"
2259 static void irq_udc_suspend(struct pxa_udc *udc)
2261 udc_writel(udc, UDCISR1, UDCISR1_IRSU);
2262 udc->stats.irqs_suspend++;
2264 if (udc->gadget.speed != USB_SPEED_UNKNOWN
2265 && udc->driver && udc->driver->suspend)
2266 udc->driver->suspend(&udc->gadget);
2271 * irq_udc_resume - Handle IRQ "UDC Resume"
2274 static void irq_udc_resume(struct pxa_udc *udc)
2276 udc_writel(udc, UDCISR1, UDCISR1_IRRU);
2277 udc->stats.irqs_resume++;
2279 if (udc->gadget.speed != USB_SPEED_UNKNOWN
2280 && udc->driver && udc->driver->resume)
2281 udc->driver->resume(&udc->gadget);
2285 * irq_udc_reconfig - Handle IRQ "UDC Change Configuration"
2288 static void irq_udc_reconfig(struct pxa_udc *udc)
2290 unsigned config, interface, alternate, config_change;
2291 u32 udccr = udc_readl(udc, UDCCR);
2293 udc_writel(udc, UDCISR1, UDCISR1_IRCC);
2294 udc->stats.irqs_reconfig++;
2296 config = (udccr & UDCCR_ACN) >> UDCCR_ACN_S;
2297 config_change = (config != udc->config);
2298 pxa27x_change_configuration(udc, config);
2300 interface = (udccr & UDCCR_AIN) >> UDCCR_AIN_S;
2301 alternate = (udccr & UDCCR_AAISN) >> UDCCR_AAISN_S;
2302 pxa27x_change_interface(udc, interface, alternate);
2305 update_pxa_ep_matches(udc);
2306 udc_set_mask_UDCCR(udc, UDCCR_SMAC);
2310 * irq_udc_reset - Handle IRQ "UDC Reset"
2313 static void irq_udc_reset(struct pxa_udc *udc)
2315 u32 udccr = udc_readl(udc, UDCCR);
2316 struct pxa_ep *ep = &udc->pxa_ep[0];
2318 dev_info(udc->dev, "USB reset\n");
2319 udc_writel(udc, UDCISR1, UDCISR1_IRRS);
2320 udc->stats.irqs_reset++;
2322 if ((udccr & UDCCR_UDA) == 0) {
2323 dev_dbg(udc->dev, "USB reset start\n");
2324 stop_activity(udc, udc->driver);
2326 udc->gadget.speed = USB_SPEED_FULL;
2327 memset(&udc->stats, 0, sizeof udc->stats);
2330 ep_write_UDCCSR(ep, UDCCSR0_FTF | UDCCSR0_OPC);
2335 * pxa_udc_irq - Main irq handler
2339 * Handles all udc interrupts
2341 static irqreturn_t pxa_udc_irq(int irq, void *_dev)
2343 struct pxa_udc *udc = _dev;
2344 u32 udcisr0 = udc_readl(udc, UDCISR0);
2345 u32 udcisr1 = udc_readl(udc, UDCISR1);
2346 u32 udccr = udc_readl(udc, UDCCR);
2349 dev_vdbg(udc->dev, "Interrupt, UDCISR0:0x%08x, UDCISR1:0x%08x, "
2350 "UDCCR:0x%08x\n", udcisr0, udcisr1, udccr);
2352 udcisr1_spec = udcisr1 & 0xf8000000;
2353 if (unlikely(udcisr1_spec & UDCISR1_IRSU))
2354 irq_udc_suspend(udc);
2355 if (unlikely(udcisr1_spec & UDCISR1_IRRU))
2356 irq_udc_resume(udc);
2357 if (unlikely(udcisr1_spec & UDCISR1_IRCC))
2358 irq_udc_reconfig(udc);
2359 if (unlikely(udcisr1_spec & UDCISR1_IRRS))
2362 if ((udcisr0 & UDCCISR0_EP_MASK) | (udcisr1 & UDCCISR1_EP_MASK))
2363 irq_handle_data(irq, udc);
2368 static struct pxa_udc memory = {
2370 .ops = &pxa_udc_ops,
2371 .ep0 = &memory.udc_usb_ep[0].usb_ep,
2372 .name = driver_name,
2374 .init_name = "gadget",
2389 /* Endpoints for gadget zero */
2390 PXA_EP_OUT_BULK(1, 1, 3, 0, 0),
2391 PXA_EP_IN_BULK(2, 2, 3, 0, 0),
2392 /* Endpoints for ether gadget, file storage gadget */
2393 PXA_EP_OUT_BULK(3, 1, 1, 0, 0),
2394 PXA_EP_IN_BULK(4, 2, 1, 0, 0),
2395 PXA_EP_IN_ISO(5, 3, 1, 0, 0),
2396 PXA_EP_OUT_ISO(6, 4, 1, 0, 0),
2397 PXA_EP_IN_INT(7, 5, 1, 0, 0),
2398 /* Endpoints for RNDIS, serial */
2399 PXA_EP_OUT_BULK(8, 1, 2, 0, 0),
2400 PXA_EP_IN_BULK(9, 2, 2, 0, 0),
2401 PXA_EP_IN_INT(10, 5, 2, 0, 0),
2403 * All the following endpoints are only for completion. They
2404 * won't never work, as multiple interfaces are really broken on
2407 PXA_EP_OUT_BULK(11, 1, 2, 1, 0),
2408 PXA_EP_IN_BULK(12, 2, 2, 1, 0),
2409 /* Endpoint for CDC Ether */
2410 PXA_EP_OUT_BULK(13, 1, 1, 1, 1),
2411 PXA_EP_IN_BULK(14, 2, 1, 1, 1),
2416 * pxa_udc_probe - probes the udc device
2417 * @_dev: platform device
2419 * Perform basic init : allocates udc clock, creates sysfs files, requests
2422 static int __init pxa_udc_probe(struct platform_device *pdev)
2424 struct resource *regs;
2425 struct pxa_udc *udc = &memory;
2426 int retval = 0, gpio;
2428 regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2431 udc->irq = platform_get_irq(pdev, 0);
2435 udc->dev = &pdev->dev;
2436 udc->mach = pdev->dev.platform_data;
2437 udc->transceiver = usb_get_phy(USB_PHY_TYPE_USB2);
2439 gpio = udc->mach->gpio_pullup;
2440 if (gpio_is_valid(gpio)) {
2441 retval = gpio_request(gpio, "USB D+ pullup");
2443 gpio_direction_output(gpio,
2444 udc->mach->gpio_pullup_inverted);
2447 dev_err(&pdev->dev, "Couldn't request gpio %d : %d\n",
2452 udc->clk = clk_get(&pdev->dev, NULL);
2453 if (IS_ERR(udc->clk)) {
2454 retval = PTR_ERR(udc->clk);
2459 udc->regs = ioremap(regs->start, resource_size(regs));
2461 dev_err(&pdev->dev, "Unable to map UDC I/O memory\n");
2465 device_initialize(&udc->gadget.dev);
2466 udc->gadget.dev.parent = &pdev->dev;
2467 udc->gadget.dev.dma_mask = NULL;
2468 udc->vbus_sensed = 0;
2470 the_controller = udc;
2471 platform_set_drvdata(pdev, udc);
2475 /* irq setup after old hardware state is cleaned up */
2476 retval = request_irq(udc->irq, pxa_udc_irq,
2477 IRQF_SHARED, driver_name, udc);
2479 dev_err(udc->dev, "%s: can't get irq %i, err %d\n",
2480 driver_name, udc->irq, retval);
2483 retval = usb_add_gadget_udc(&pdev->dev, &udc->gadget);
2487 pxa_init_debugfs(udc);
2490 free_irq(udc->irq, udc);
2501 * pxa_udc_remove - removes the udc device driver
2502 * @_dev: platform device
2504 static int __exit pxa_udc_remove(struct platform_device *_dev)
2506 struct pxa_udc *udc = platform_get_drvdata(_dev);
2507 int gpio = udc->mach->gpio_pullup;
2509 usb_del_gadget_udc(&udc->gadget);
2510 usb_gadget_unregister_driver(udc->driver);
2511 free_irq(udc->irq, udc);
2512 pxa_cleanup_debugfs(udc);
2513 if (gpio_is_valid(gpio))
2516 usb_put_phy(udc->transceiver);
2518 udc->transceiver = NULL;
2519 platform_set_drvdata(_dev, NULL);
2520 the_controller = NULL;
2527 static void pxa_udc_shutdown(struct platform_device *_dev)
2529 struct pxa_udc *udc = platform_get_drvdata(_dev);
2531 if (udc_readl(udc, UDCCR) & UDCCR_UDE)
2535 #ifdef CONFIG_PXA27x
2536 extern void pxa27x_clear_otgph(void);
2538 #define pxa27x_clear_otgph() do {} while (0)
2543 * pxa_udc_suspend - Suspend udc device
2544 * @_dev: platform device
2545 * @state: suspend state
2547 * Suspends udc : saves configuration registers (UDCCR*), then disables the udc
2550 static int pxa_udc_suspend(struct platform_device *_dev, pm_message_t state)
2553 struct pxa_udc *udc = platform_get_drvdata(_dev);
2556 ep = &udc->pxa_ep[0];
2557 udc->udccsr0 = udc_ep_readl(ep, UDCCSR);
2558 for (i = 1; i < NR_PXA_ENDPOINTS; i++) {
2559 ep = &udc->pxa_ep[i];
2560 ep->udccsr_value = udc_ep_readl(ep, UDCCSR);
2561 ep->udccr_value = udc_ep_readl(ep, UDCCR);
2562 ep_dbg(ep, "udccsr:0x%03x, udccr:0x%x\n",
2563 ep->udccsr_value, ep->udccr_value);
2567 udc->pullup_resume = udc->pullup_on;
2568 dplus_pullup(udc, 0);
2574 * pxa_udc_resume - Resume udc device
2575 * @_dev: platform device
2577 * Resumes udc : restores configuration registers (UDCCR*), then enables the udc
2580 static int pxa_udc_resume(struct platform_device *_dev)
2583 struct pxa_udc *udc = platform_get_drvdata(_dev);
2586 ep = &udc->pxa_ep[0];
2587 udc_ep_writel(ep, UDCCSR, udc->udccsr0 & (UDCCSR0_FST | UDCCSR0_DME));
2588 for (i = 1; i < NR_PXA_ENDPOINTS; i++) {
2589 ep = &udc->pxa_ep[i];
2590 udc_ep_writel(ep, UDCCSR, ep->udccsr_value);
2591 udc_ep_writel(ep, UDCCR, ep->udccr_value);
2592 ep_dbg(ep, "udccsr:0x%03x, udccr:0x%x\n",
2593 ep->udccsr_value, ep->udccr_value);
2596 dplus_pullup(udc, udc->pullup_resume);
2597 if (should_enable_udc(udc))
2600 * We do not handle OTG yet.
2602 * OTGPH bit is set when sleep mode is entered.
2603 * it indicates that OTG pad is retaining its state.
2604 * Upon exit from sleep mode and before clearing OTGPH,
2605 * Software must configure the USB OTG pad, UDC, and UHC
2606 * to the state they were in before entering sleep mode.
2608 pxa27x_clear_otgph();
2614 /* work with hotplug and coldplug */
2615 MODULE_ALIAS("platform:pxa27x-udc");
2617 static struct platform_driver udc_driver = {
2619 .name = "pxa27x-udc",
2620 .owner = THIS_MODULE,
2622 .remove = __exit_p(pxa_udc_remove),
2623 .shutdown = pxa_udc_shutdown,
2625 .suspend = pxa_udc_suspend,
2626 .resume = pxa_udc_resume
2630 static int __init udc_init(void)
2632 if (!cpu_is_pxa27x() && !cpu_is_pxa3xx())
2635 printk(KERN_INFO "%s: version %s\n", driver_name, DRIVER_VERSION);
2636 return platform_driver_probe(&udc_driver, pxa_udc_probe);
2638 module_init(udc_init);
2641 static void __exit udc_exit(void)
2643 platform_driver_unregister(&udc_driver);
2645 module_exit(udc_exit);
2647 MODULE_DESCRIPTION(DRIVER_DESC);
2648 MODULE_AUTHOR("Robert Jarzmik");
2649 MODULE_LICENSE("GPL");