drivers/usb/host/ehci-hcd.c

   1 /*
   2  * Copyright (c) 2000-2004 by David Brownell
   3  *
   4  * This program is free software; you can redistribute it and/or modify it
   5  * under the terms of the GNU General Public License as published by the
   6  * Free Software Foundation; either version 2 of the License, or (at your
   7  * option) any later version.
   8  *
   9  * This program is distributed in the hope that it will be useful, but
  10  * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  11  * or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  12  * for more details.
  13  *
  14  * You should have received a copy of the GNU General Public License
  15  * along with this program; if not, write to the Free Software Foundation,
  16  * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  17  */
  18
  19 #include <linux/module.h>
  20 #include <linux/pci.h>
  21 #include <linux/dmapool.h>
  22 #include <linux/kernel.h>
  23 #include <linux/delay.h>
  24 #include <linux/ioport.h>
  25 #include <linux/sched.h>
  26 #include <linux/vmalloc.h>
  27 #include <linux/errno.h>
  28 #include <linux/init.h>
  29 #include <linux/timer.h>
  30 #include <linux/ktime.h>
  31 #include <linux/list.h>
  32 #include <linux/interrupt.h>
  33 #include <linux/usb.h>
  34 #include <linux/usb/hcd.h>
  35 #include <linux/moduleparam.h>
  36 #include <linux/dma-mapping.h>
  37 #include <linux/debugfs.h>
  38 #include <linux/slab.h>
  39 #include <linux/uaccess.h>
  40
  41 #include <asm/byteorder.h>
  42 #include <asm/io.h>
  43 #include <asm/irq.h>
  44 #include <asm/system.h>
  45 #include <asm/unaligned.h>
  46
  47 /*-------------------------------------------------------------------------*/
  48
  49 /*
  50  * EHCI hc_driver implementation ... experimental, incomplete.
  51  * Based on the final 1.0 register interface specification.
  52  *
  53  * USB 2.0 shows up in upcoming www.pcmcia.org technology.
  54  * First was PCMCIA, like ISA; then CardBus, which is PCI.
  55  * Next comes "CardBay", using USB 2.0 signals.
  56  *
  57  * Contains additional contributions by Brad Hards, Rory Bolt, and others.
  58  * Special thanks to Intel and VIA for providing host controllers to
  59  * test this driver on, and Cypress (including In-System Design) for
  60  * providing early devices for those host controllers to talk to!
  61  */
  62
  63 #define DRIVER_AUTHOR "David Brownell"
  64 #define DRIVER_DESC "USB 2.0 'Enhanced' Host Controller (EHCI) Driver"
  65
  66 static const char       hcd_name [] = "ehci_hcd";
  67
  68
  69 #undef VERBOSE_DEBUG
  70 #undef EHCI_URB_TRACE
  71
  72 #ifdef DEBUG
  73 #define EHCI_STATS
  74 #endif
  75
  76 /* magic numbers that can affect system performance */
  77 #define EHCI_TUNE_CERR          3       /* 0-3 qtd retries; 0 == don't stop */
  78 #define EHCI_TUNE_RL_HS         4       /* nak throttle; see 4.9 */
  79 #define EHCI_TUNE_RL_TT         0
  80 #define EHCI_TUNE_MULT_HS       1       /* 1-3 transactions/uframe; 4.10.3 */
  81 #define EHCI_TUNE_MULT_TT       1
  82 /*
  83  * Some drivers think it's safe to schedule isochronous transfers more than
  84  * 256 ms into the future (partly as a result of an old bug in the scheduling
  85  * code).  In an attempt to avoid trouble, we will use a minimum scheduling
  86  * length of 512 frames instead of 256.
  87  */
  88 #define EHCI_TUNE_FLS           1       /* (medium) 512-frame schedule */
  89
  90 #define EHCI_IAA_MSECS          10              /* arbitrary */
  91 #define EHCI_IO_JIFFIES         (HZ/10)         /* io watchdog > irq_thresh */
  92 #define EHCI_ASYNC_JIFFIES      (HZ/20)         /* async idle timeout */
  93 #define EHCI_SHRINK_FRAMES      5               /* async qh unlink delay */
  94
  95 /* Initial IRQ latency:  faster than hw default */
  96 static int log2_irq_thresh = 0;         // 0 to 6
  97 module_param (log2_irq_thresh, int, S_IRUGO);
  98 MODULE_PARM_DESC (log2_irq_thresh, "log2 IRQ latency, 1-64 microframes");
  99
 100 /* initial park setting:  slower than hw default */
 101 static unsigned park = 0;
 102 module_param (park, uint, S_IRUGO);
 103 MODULE_PARM_DESC (park, "park setting; 1-3 back-to-back async packets");
 104
 105 /* for flakey hardware, ignore overcurrent indicators */
 106 static int ignore_oc = 0;
 107 module_param (ignore_oc, bool, S_IRUGO);
 108 MODULE_PARM_DESC (ignore_oc, "ignore bogus hardware overcurrent indications");
 109
 110 /* for link power management(LPM) feature */
 111 static unsigned int hird;
 112 module_param(hird, int, S_IRUGO);
 113 MODULE_PARM_DESC(hird, "host initiated resume duration, +1 for each 75us\n");
 114
 115 #define INTR_MASK (STS_IAA | STS_FATAL | STS_PCD | STS_ERR | STS_INT)
 116
 117 /*-------------------------------------------------------------------------*/
 118
 119 #include "ehci.h"
 120 #include "ehci-dbg.c"
 121 #include "pci-quirks.h"
 122
 123 /*-------------------------------------------------------------------------*/
 124
 125 static void
 126 timer_action(struct ehci_hcd *ehci, enum ehci_timer_action action)
 127 {
 128         /* Don't override timeouts which shrink or (later) disable
 129          * the async ring; just the I/O watchdog.  Note that if a
 130          * SHRINK were pending, OFF would never be requested.
 131          */
 132         if (timer_pending(&ehci->watchdog)
 133                         && ((BIT(TIMER_ASYNC_SHRINK) | BIT(TIMER_ASYNC_OFF))
 134                                 & ehci->actions))
 135                 return;
 136
 137         if (!test_and_set_bit(action, &ehci->actions)) {
 138                 unsigned long t;
 139
 140                 switch (action) {
 141                 case TIMER_IO_WATCHDOG:
 142                         if (!ehci->need_io_watchdog)
 143                                 return;
 144                         t = EHCI_IO_JIFFIES;
 145                         break;
 146                 case TIMER_ASYNC_OFF:
 147                         t = EHCI_ASYNC_JIFFIES;
 148                         break;
 149                 /* case TIMER_ASYNC_SHRINK: */
 150                 default:
 151                         /* add a jiffie since we synch against the
 152                          * 8 KHz uframe counter.
 153                          */
 154                         t = DIV_ROUND_UP(EHCI_SHRINK_FRAMES * HZ, 1000) + 1;
 155                         break;
 156                 }
 157                 mod_timer(&ehci->watchdog, t + jiffies);
 158         }
 159 }
 160
 161 /*-------------------------------------------------------------------------*/
 162
 163 /*
 164  * handshake - spin reading hc until handshake completes or fails
 165  * @ptr: address of hc register to be read
 166  * @mask: bits to look at in result of read
 167  * @done: value of those bits when handshake succeeds
 168  * @usec: timeout in microseconds
 169  *
 170  * Returns negative errno, or zero on success
 171  *
 172  * Success happens when the "mask" bits have the specified value (hardware
 173  * handshake done).  There are two failure modes:  "usec" have passed (major
 174  * hardware flakeout), or the register reads as all-ones (hardware removed).
 175  *
 176  * That last failure should_only happen in cases like physical cardbus eject
 177  * before driver shutdown. But it also seems to be caused by bugs in cardbus
 178  * bridge shutdown:  shutting down the bridge before the devices using it.
 179  */
 180 static int handshake (struct ehci_hcd *ehci, void __iomem *ptr,
 181                       u32 mask, u32 done, int usec)
 182 {
 183         u32     result;
 184
 185         do {
 186                 result = ehci_readl(ehci, ptr);
 187                 if (result == ~(u32)0)          /* card removed */
 188                         return -ENODEV;
 189                 result &= mask;
 190                 if (result == done)
 191                         return 0;
 192                 udelay (1);
 193                 usec--;
 194         } while (usec > 0);
 195         return -ETIMEDOUT;
 196 }
 197
 198 /* check TDI/ARC silicon is in host mode */
 199 static int tdi_in_host_mode (struct ehci_hcd *ehci)
 200 {
 201         u32 __iomem     *reg_ptr;
 202         u32             tmp;
 203
 204         reg_ptr = (u32 __iomem *)(((u8 __iomem *)ehci->regs) + USBMODE);
 205         tmp = ehci_readl(ehci, reg_ptr);
 206         return (tmp & 3) == USBMODE_CM_HC;
 207 }
 208
 209 /* force HC to halt state from unknown (EHCI spec section 2.3) */
 210 static int ehci_halt (struct ehci_hcd *ehci)
 211 {
 212         u32     temp = ehci_readl(ehci, &ehci->regs->status);
 213
 214         /* disable any irqs left enabled by previous code */
 215         ehci_writel(ehci, 0, &ehci->regs->intr_enable);
 216
 217         if (ehci_is_TDI(ehci) && tdi_in_host_mode(ehci) == 0) {
 218                 return 0;
 219         }
 220
 221         if ((temp & STS_HALT) != 0)
 222                 return 0;
 223
 224         temp = ehci_readl(ehci, &ehci->regs->command);
 225         temp &= ~CMD_RUN;
 226         ehci_writel(ehci, temp, &ehci->regs->command);
 227         return handshake (ehci, &ehci->regs->status,
 228                           STS_HALT, STS_HALT, 16 * 125);
 229 }
 230
 231 static int handshake_on_error_set_halt(struct ehci_hcd *ehci, void __iomem *ptr,
 232                                        u32 mask, u32 done, int usec)
 233 {
 234         int error;
 235
 236         error = handshake(ehci, ptr, mask, done, usec);
 237         if (error) {
 238                 ehci_halt(ehci);
 239                 ehci_to_hcd(ehci)->state = HC_STATE_HALT;
 240                 ehci_err(ehci, "force halt; handshake %p %08x %08x -> %d\n",
 241                         ptr, mask, done, error);
 242         }
 243
 244         return error;
 245 }
 246
 247 /* put TDI/ARC silicon into EHCI mode */
 248 static void tdi_reset (struct ehci_hcd *ehci)
 249 {
 250         u32 __iomem     *reg_ptr;
 251         u32             tmp;
 252
 253         reg_ptr = (u32 __iomem *)(((u8 __iomem *)ehci->regs) + USBMODE);
 254         tmp = ehci_readl(ehci, reg_ptr);
 255         tmp |= USBMODE_CM_HC;
 256         /* The default byte access to MMR space is LE after
 257          * controller reset. Set the required endian mode
 258          * for transfer buffers to match the host microprocessor
 259          */
 260         if (ehci_big_endian_mmio(ehci))
 261                 tmp |= USBMODE_BE;
 262         ehci_writel(ehci, tmp, reg_ptr);
 263 }
 264
 265 /* reset a non-running (STS_HALT == 1) controller */
 266 static int ehci_reset (struct ehci_hcd *ehci)
 267 {
 268         int     retval;
 269         u32     command = ehci_readl(ehci, &ehci->regs->command);
 270
 271         /* If the EHCI debug controller is active, special care must be
 272          * taken before and after a host controller reset */
 273         if (ehci->debug && !dbgp_reset_prep())
 274                 ehci->debug = NULL;
 275
 276         command |= CMD_RESET;
 277         dbg_cmd (ehci, "reset", command);
 278         ehci_writel(ehci, command, &ehci->regs->command);
 279         ehci_to_hcd(ehci)->state = HC_STATE_HALT;
 280         ehci->next_statechange = jiffies;
 281         retval = handshake (ehci, &ehci->regs->command,
 282                             CMD_RESET, 0, 250 * 1000);
 283
 284         if (ehci->has_hostpc) {
 285                 ehci_writel(ehci, USBMODE_EX_HC | USBMODE_EX_VBPS,
 286                         (u32 __iomem *)(((u8 *)ehci->regs) + USBMODE_EX));
 287                 ehci_writel(ehci, TXFIFO_DEFAULT,
 288                         (u32 __iomem *)(((u8 *)ehci->regs) + TXFILLTUNING));
 289         }
 290         if (retval)
 291                 return retval;
 292
 293         if (ehci_is_TDI(ehci))
 294                 tdi_reset (ehci);
 295
 296         if (ehci->debug)
 297                 dbgp_external_startup();
 298
 299         return retval;
 300 }
 301
 302 /* idle the controller (from running) */
 303 static void ehci_quiesce (struct ehci_hcd *ehci)
 304 {
 305         u32     temp;
 306
 307 #ifdef DEBUG
 308         if (!HC_IS_RUNNING (ehci_to_hcd(ehci)->state))
 309                 BUG ();
 310 #endif
 311
 312         /* wait for any schedule enables/disables to take effect */
 313         temp = ehci_readl(ehci, &ehci->regs->command) << 10;
 314         temp &= STS_ASS | STS_PSS;
 315         if (handshake_on_error_set_halt(ehci, &ehci->regs->status,
 316                                         STS_ASS | STS_PSS, temp, 16 * 125))
 317                 return;
 318
 319         /* then disable anything that's still active */
 320         temp = ehci_readl(ehci, &ehci->regs->command);
 321         temp &= ~(CMD_ASE | CMD_IAAD | CMD_PSE);
 322         ehci_writel(ehci, temp, &ehci->regs->command);
 323
 324         /* hardware can take 16 microframes to turn off ... */
 325         handshake_on_error_set_halt(ehci, &ehci->regs->status,
 326                                     STS_ASS | STS_PSS, 0, 16 * 125);
 327 }
 328
 329 /*-------------------------------------------------------------------------*/
 330
 331 static void end_unlink_async(struct ehci_hcd *ehci);
 332 static void ehci_work(struct ehci_hcd *ehci);
 333
 334 #include "ehci-hub.c"
 335 #include "ehci-lpm.c"
 336 #include "ehci-mem.c"
 337 #include "ehci-q.c"
 338 #include "ehci-sched.c"
 339
 340 /*-------------------------------------------------------------------------*/
 341
 342 static void ehci_iaa_watchdog(unsigned long param)
 343 {
 344         struct ehci_hcd         *ehci = (struct ehci_hcd *) param;
 345         unsigned long           flags;
 346
 347         spin_lock_irqsave (&ehci->lock, flags);
 348
 349         /* Lost IAA irqs wedge things badly; seen first with a vt8235.
 350          * So we need this watchdog, but must protect it against both
 351          * (a) SMP races against real IAA firing and retriggering, and
 352          * (b) clean HC shutdown, when IAA watchdog was pending.
 353          */
 354         if (ehci->reclaim
 355                         && !timer_pending(&ehci->iaa_watchdog)
 356                         && HC_IS_RUNNING(ehci_to_hcd(ehci)->state)) {
 357                 u32 cmd, status;
 358
 359                 /* If we get here, IAA is *REALLY* late.  It's barely
 360                  * conceivable that the system is so busy that CMD_IAAD
 361                  * is still legitimately set, so let's be sure it's
 362                  * clear before we read STS_IAA.  (The HC should clear
 363                  * CMD_IAAD when it sets STS_IAA.)
 364                  */
 365                 cmd = ehci_readl(ehci, &ehci->regs->command);
 366                 if (cmd & CMD_IAAD)
 367                         ehci_writel(ehci, cmd & ~CMD_IAAD,
 368                                         &ehci->regs->command);
 369
 370                 /* If IAA is set here it either legitimately triggered
 371                  * before we cleared IAAD above (but _way_ late, so we'll
 372                  * still count it as lost) ... or a silicon erratum:
 373                  * - VIA seems to set IAA without triggering the IRQ;
 374                  * - IAAD potentially cleared without setting IAA.
 375                  */
 376                 status = ehci_readl(ehci, &ehci->regs->status);
 377                 if ((status & STS_IAA) || !(cmd & CMD_IAAD)) {
 378                         COUNT (ehci->stats.lost_iaa);
 379                         ehci_writel(ehci, STS_IAA, &ehci->regs->status);
 380                 }
 381
 382                 ehci_vdbg(ehci, "IAA watchdog: status %x cmd %x\n",
 383                                 status, cmd);
 384                 end_unlink_async(ehci);
 385         }
 386
 387         spin_unlock_irqrestore(&ehci->lock, flags);
 388 }
 389
 390 static void ehci_watchdog(unsigned long param)
 391 {
 392         struct ehci_hcd         *ehci = (struct ehci_hcd *) param;
 393         unsigned long           flags;
 394
 395         spin_lock_irqsave(&ehci->lock, flags);
 396
 397         /* stop async processing after it's idled a bit */
 398         if (test_bit (TIMER_ASYNC_OFF, &ehci->actions))
 399                 start_unlink_async (ehci, ehci->async);
 400
 401         /* ehci could run by timer, without IRQs ... */
 402         ehci_work (ehci);
 403
 404         spin_unlock_irqrestore (&ehci->lock, flags);
 405 }
 406
 407 /* On some systems, leaving remote wakeup enabled prevents system shutdown.
 408  * The firmware seems to think that powering off is a wakeup event!
 409  * This routine turns off remote wakeup and everything else, on all ports.
 410  */
 411 static void ehci_turn_off_all_ports(struct ehci_hcd *ehci)
 412 {
 413         int     port = HCS_N_PORTS(ehci->hcs_params);
 414
 415         while (port--)
 416                 ehci_writel(ehci, PORT_RWC_BITS,
 417                                 &ehci->regs->port_status[port]);
 418 }
 419
 420 /*
 421  * Halt HC, turn off all ports, and let the BIOS use the companion controllers.
 422  * Should be called with ehci->lock held.
 423  */
 424 static void ehci_silence_controller(struct ehci_hcd *ehci)
 425 {
 426         ehci_halt(ehci);
 427         ehci_turn_off_all_ports(ehci);
 428
 429         /* make BIOS/etc use companion controller during reboot */
 430         ehci_writel(ehci, 0, &ehci->regs->configured_flag);
 431
 432         /* unblock posted writes */
 433         ehci_readl(ehci, &ehci->regs->configured_flag);
 434 }
 435
 436 /* ehci_shutdown kick in for silicon on any bus (not just pci, etc).
 437  * This forcibly disables dma and IRQs, helping kexec and other cases
 438  * where the next system software may expect clean state.
 439  */
 440 static void ehci_shutdown(struct usb_hcd *hcd)
 441 {
 442         struct ehci_hcd *ehci = hcd_to_ehci(hcd);
 443
 444         del_timer_sync(&ehci->watchdog);
 445         del_timer_sync(&ehci->iaa_watchdog);
 446
 447         spin_lock_irq(&ehci->lock);
 448         ehci_silence_controller(ehci);
 449         spin_unlock_irq(&ehci->lock);
 450 }
 451
 452 static void ehci_port_power (struct ehci_hcd *ehci, int is_on)
 453 {
 454         unsigned port;
 455
 456         if (!HCS_PPC (ehci->hcs_params))
 457                 return;
 458
 459         ehci_dbg (ehci, "...power%s ports...\n", is_on ? "up" : "down");
 460         for (port = HCS_N_PORTS (ehci->hcs_params); port > 0; )
 461                 (void) ehci_hub_control(ehci_to_hcd(ehci),
 462                                 is_on ? SetPortFeature : ClearPortFeature,
 463                                 USB_PORT_FEAT_POWER,
 464                                 port--, NULL, 0);
 465         /* Flush those writes */
 466         ehci_readl(ehci, &ehci->regs->command);
 467         msleep(20);
 468 }
 469
 470 /*-------------------------------------------------------------------------*/
 471
 472 /*
 473  * ehci_work is called from some interrupts, timers, and so on.
 474  * it calls driver completion functions, after dropping ehci->lock.
 475  */
 476 static void ehci_work (struct ehci_hcd *ehci)
 477 {
 478         timer_action_done (ehci, TIMER_IO_WATCHDOG);
 479
 480         /* another CPU may drop ehci->lock during a schedule scan while
 481          * it reports urb completions.  this flag guards against bogus
 482          * attempts at re-entrant schedule scanning.
 483          */
 484         if (ehci->scanning)
 485                 return;
 486         ehci->scanning = 1;
 487         scan_async (ehci);
 488         if (ehci->next_uframe != -1)
 489                 scan_periodic (ehci);
 490         ehci->scanning = 0;
 491
 492         /* the IO watchdog guards against hardware or driver bugs that
 493          * misplace IRQs, and should let us run completely without IRQs.
 494          * such lossage has been observed on both VT6202 and VT8235.
 495          */
 496         if (HC_IS_RUNNING (ehci_to_hcd(ehci)->state) &&
 497                         (ehci->async->qh_next.ptr != NULL ||
 498                          ehci->periodic_sched != 0))
 499                 timer_action (ehci, TIMER_IO_WATCHDOG);
 500 }
 501
 502 /*
 503  * Called when the ehci_hcd module is removed.
 504  */
 505 static void ehci_stop (struct usb_hcd *hcd)
 506 {
 507         struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
 508
 509         ehci_dbg (ehci, "stop\n");
 510
 511         /* no more interrupts ... */
 512         del_timer_sync (&ehci->watchdog);
 513         del_timer_sync(&ehci->iaa_watchdog);
 514
 515         spin_lock_irq(&ehci->lock);
 516         if (HC_IS_RUNNING (hcd->state))
 517                 ehci_quiesce (ehci);
 518
 519         ehci_silence_controller(ehci);
 520         ehci_reset (ehci);
 521         spin_unlock_irq(&ehci->lock);
 522
 523         remove_companion_file(ehci);
 524         remove_debug_files (ehci);
 525
 526         /* root hub is shut down separately (first, when possible) */
 527         spin_lock_irq (&ehci->lock);
 528         if (ehci->async)
 529                 ehci_work (ehci);
 530         spin_unlock_irq (&ehci->lock);
 531         ehci_mem_cleanup (ehci);
 532
 533         if (ehci->amd_pll_fix == 1)
 534                 usb_amd_dev_put();
 535
 536 #ifdef  EHCI_STATS
 537         ehci_dbg (ehci, "irq normal %ld err %ld reclaim %ld (lost %ld)\n",
 538                 ehci->stats.normal, ehci->stats.error, ehci->stats.reclaim,
 539                 ehci->stats.lost_iaa);
 540         ehci_dbg (ehci, "complete %ld unlink %ld\n",
 541                 ehci->stats.complete, ehci->stats.unlink);
 542 #endif
 543
 544         dbg_status (ehci, "ehci_stop completed",
 545                     ehci_readl(ehci, &ehci->regs->status));
 546 }
 547
 548 /* one-time init, only for memory state */
 549 static int ehci_init(struct usb_hcd *hcd)
 550 {
 551         struct ehci_hcd         *ehci = hcd_to_ehci(hcd);
 552         u32                     temp;
 553         int                     retval;
 554         u32                     hcc_params;
 555         struct ehci_qh_hw       *hw;
 556
 557         spin_lock_init(&ehci->lock);
 558
 559         /*
 560          * keep io watchdog by default, those good HCDs could turn off it later
 561          */
 562         ehci->need_io_watchdog = 1;
 563         init_timer(&ehci->watchdog);
 564         ehci->watchdog.function = ehci_watchdog;
 565         ehci->watchdog.data = (unsigned long) ehci;
 566
 567         init_timer(&ehci->iaa_watchdog);
 568         ehci->iaa_watchdog.function = ehci_iaa_watchdog;
 569         ehci->iaa_watchdog.data = (unsigned long) ehci;
 570
 571         /*
 572          * hw default: 1K periodic list heads, one per frame.
 573          * periodic_size can shrink by USBCMD update if hcc_params allows.
 574          */
 575         ehci->periodic_size = DEFAULT_I_TDPS;
 576         INIT_LIST_HEAD(&ehci->cached_itd_list);
 577         INIT_LIST_HEAD(&ehci->cached_sitd_list);
 578         if ((retval = ehci_mem_init(ehci, GFP_KERNEL)) < 0)
 579                 return retval;
 580
 581         /* controllers may cache some of the periodic schedule ... */
 582         hcc_params = ehci_readl(ehci, &ehci->caps->hcc_params);
 583         if (HCC_ISOC_CACHE(hcc_params))         // full frame cache
 584                 ehci->i_thresh = 2 + 8;
 585         else                                    // N microframes cached
 586                 ehci->i_thresh = 2 + HCC_ISOC_THRES(hcc_params);
 587
 588         ehci->reclaim = NULL;
 589         ehci->next_uframe = -1;
 590         ehci->clock_frame = -1;
 591
 592         /*
 593          * dedicate a qh for the async ring head, since we couldn't unlink
 594          * a 'real' qh without stopping the async schedule [4.8].  use it
 595          * as the 'reclamation list head' too.
 596          * its dummy is used in hw_alt_next of many tds, to prevent the qh
 597          * from automatically advancing to the next td after short reads.
 598          */
 599         ehci->async->qh_next.qh = NULL;
 600         hw = ehci->async->hw;
 601         hw->hw_next = QH_NEXT(ehci, ehci->async->qh_dma);
 602         hw->hw_info1 = cpu_to_hc32(ehci, QH_HEAD);
 603         hw->hw_token = cpu_to_hc32(ehci, QTD_STS_HALT);
 604         hw->hw_qtd_next = EHCI_LIST_END(ehci);
 605         ehci->async->qh_state = QH_STATE_LINKED;
 606         hw->hw_alt_next = QTD_NEXT(ehci, ehci->async->dummy->qtd_dma);
 607
 608         /* clear interrupt enables, set irq latency */
 609         if (log2_irq_thresh < 0 || log2_irq_thresh > 6)
 610                 log2_irq_thresh = 0;
 611         temp = 1 << (16 + log2_irq_thresh);
 612         if (HCC_PER_PORT_CHANGE_EVENT(hcc_params)) {
 613                 ehci->has_ppcd = 1;
 614                 ehci_dbg(ehci, "enable per-port change event\n");
 615                 temp |= CMD_PPCEE;
 616         }
 617         if (HCC_CANPARK(hcc_params)) {
 618                 /* HW default park == 3, on hardware that supports it (like
 619                  * NVidia and ALI silicon), maximizes throughput on the async
 620                  * schedule by avoiding QH fetches between transfers.
 621                  *
 622                  * With fast usb storage devices and NForce2, "park" seems to
 623                  * make problems:  throughput reduction (!), data errors...
 624                  */
 625                 if (park) {
 626                         park = min(park, (unsigned) 3);
 627                         temp |= CMD_PARK;
 628                         temp |= park << 8;
 629                 }
 630                 ehci_dbg(ehci, "park %d\n", park);
 631         }
 632         if (HCC_PGM_FRAMELISTLEN(hcc_params)) {
 633                 /* periodic schedule size can be smaller than default */
 634                 temp &= ~(3 << 2);
 635                 temp |= (EHCI_TUNE_FLS << 2);
 636                 switch (EHCI_TUNE_FLS) {
 637                 case 0: ehci->periodic_size = 1024; break;
 638                 case 1: ehci->periodic_size = 512; break;
 639                 case 2: ehci->periodic_size = 256; break;
 640                 default:        BUG();
 641                 }
 642         }
 643         if (HCC_LPM(hcc_params)) {
 644                 /* support link power management EHCI 1.1 addendum */
 645                 ehci_dbg(ehci, "support lpm\n");
 646                 ehci->has_lpm = 1;
 647                 if (hird > 0xf) {
 648                         ehci_dbg(ehci, "hird %d invalid, use default 0",
 649                         hird);
 650                         hird = 0;
 651                 }
 652                 temp |= hird << 24;
 653         }
 654         ehci->command = temp;
 655
 656         /* Accept arbitrarily long scatter-gather lists */
 657         if (!(hcd->driver->flags & HCD_LOCAL_MEM))
 658                 hcd->self.sg_tablesize = ~0;
 659         return 0;
 660 }
 661
 662 /* start HC running; it's halted, ehci_init() has been run (once) */
 663 static int ehci_run (struct usb_hcd *hcd)
 664 {
 665         struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
 666         int                     retval;
 667         u32                     temp;
 668         u32                     hcc_params;
 669
 670         hcd->uses_new_polling = 1;
 671
 672         /* EHCI spec section 4.1 */
 673         if ((retval = ehci_reset(ehci)) != 0) {
 674                 ehci_mem_cleanup(ehci);
 675                 return retval;
 676         }
 677         ehci_writel(ehci, ehci->periodic_dma, &ehci->regs->frame_list);
 678         ehci_writel(ehci, (u32)ehci->async->qh_dma, &ehci->regs->async_next);
 679
 680         /*
 681          * hcc_params controls whether ehci->regs->segment must (!!!)
 682          * be used; it constrains QH/ITD/SITD and QTD locations.
 683          * pci_pool consistent memory always uses segment zero.
 684          * streaming mappings for I/O buffers, like pci_map_single(),
 685          * can return segments above 4GB, if the device allows.
 686          *
 687          * NOTE:  the dma mask is visible through dma_supported(), so
 688          * drivers can pass this info along ... like NETIF_F_HIGHDMA,
 689          * Scsi_Host.highmem_io, and so forth.  It's readonly to all
 690          * host side drivers though.
 691          */
 692         hcc_params = ehci_readl(ehci, &ehci->caps->hcc_params);
 693         if (HCC_64BIT_ADDR(hcc_params)) {
 694                 ehci_writel(ehci, 0, &ehci->regs->segment);
 695 #if 0
 696 // this is deeply broken on almost all architectures
 697                 if (!dma_set_mask(hcd->self.controller, DMA_BIT_MASK(64)))
 698                         ehci_info(ehci, "enabled 64bit DMA\n");
 699 #endif
 700         }
 701
 702
 703         // Philips, Intel, and maybe others need CMD_RUN before the
 704         // root hub will detect new devices (why?); NEC doesn't
 705         ehci->command &= ~(CMD_LRESET|CMD_IAAD|CMD_PSE|CMD_ASE|CMD_RESET);
 706         ehci->command |= CMD_RUN;
 707         ehci_writel(ehci, ehci->command, &ehci->regs->command);
 708         dbg_cmd (ehci, "init", ehci->command);
 709
 710         /*
 711          * Start, enabling full USB 2.0 functionality ... usb 1.1 devices
 712          * are explicitly handed to companion controller(s), so no TT is
 713          * involved with the root hub.  (Except where one is integrated,
 714          * and there's no companion controller unless maybe for USB OTG.)
 715          *
 716          * Turning on the CF flag will transfer ownership of all ports
 717          * from the companions to the EHCI controller.  If any of the
 718          * companions are in the middle of a port reset at the time, it
 719          * could cause trouble.  Write-locking ehci_cf_port_reset_rwsem
 720          * guarantees that no resets are in progress.  After we set CF,
 721          * a short delay lets the hardware catch up; new resets shouldn't
 722          * be started before the port switching actions could complete.
 723          */
 724         down_write(&ehci_cf_port_reset_rwsem);
 725         hcd->state = HC_STATE_RUNNING;
 726         ehci_writel(ehci, FLAG_CF, &ehci->regs->configured_flag);
 727         ehci_readl(ehci, &ehci->regs->command); /* unblock posted writes */
 728         msleep(5);
 729         up_write(&ehci_cf_port_reset_rwsem);
 730         ehci->last_periodic_enable = ktime_get_real();
 731
 732         temp = HC_VERSION(ehci_readl(ehci, &ehci->caps->hc_capbase));
 733         ehci_info (ehci,
 734                 "USB %x.%x started, EHCI %x.%02x%s\n",
 735                 ((ehci->sbrn & 0xf0)>>4), (ehci->sbrn & 0x0f),
 736                 temp >> 8, temp & 0xff,
 737                 ignore_oc ? ", overcurrent ignored" : "");
 738
 739         ehci_writel(ehci, INTR_MASK,
 740                     &ehci->regs->intr_enable); /* Turn On Interrupts */
 741
 742         /* GRR this is run-once init(), being done every time the HC starts.
 743          * So long as they're part of class devices, we can't do it init()
 744          * since the class device isn't created that early.
 745          */
 746         create_debug_files(ehci);
 747         create_companion_file(ehci);
 748
 749         return 0;
 750 }
 751
 752 /*-------------------------------------------------------------------------*/
 753
 754 static irqreturn_t ehci_irq (struct usb_hcd *hcd)
 755 {
 756         struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
 757         u32                     status, masked_status, pcd_status = 0, cmd;
 758         int                     bh;
 759
 760         spin_lock (&ehci->lock);
 761
 762         status = ehci_readl(ehci, &ehci->regs->status);
 763
 764         /* e.g. cardbus physical eject */
 765         if (status == ~(u32) 0) {
 766                 ehci_dbg (ehci, "device removed\n");
 767                 goto dead;
 768         }
 769
 770         masked_status = status & INTR_MASK;
 771         if (!masked_status) {           /* irq sharing? */
 772                 spin_unlock(&ehci->lock);
 773                 return IRQ_NONE;
 774         }
 775
 776         /* clear (just) interrupts */
 777         ehci_writel(ehci, masked_status, &ehci->regs->status);
 778         cmd = ehci_readl(ehci, &ehci->regs->command);
 779         bh = 0;
 780
 781 #ifdef  VERBOSE_DEBUG
 782         /* unrequested/ignored: Frame List Rollover */
 783         dbg_status (ehci, "irq", status);
 784 #endif
 785
 786         /* INT, ERR, and IAA interrupt rates can be throttled */
 787
 788         /* normal [4.15.1.2] or error [4.15.1.1] completion */
 789         if (likely ((status & (STS_INT|STS_ERR)) != 0)) {
 790                 if (likely ((status & STS_ERR) == 0))
 791                         COUNT (ehci->stats.normal);
 792                 else
 793                         COUNT (ehci->stats.error);
 794                 bh = 1;
 795         }
 796
 797         /* complete the unlinking of some qh [4.15.2.3] */
 798         if (status & STS_IAA) {
 799                 /* guard against (alleged) silicon errata */
 800                 if (cmd & CMD_IAAD) {
 801                         ehci_writel(ehci, cmd & ~CMD_IAAD,
 802                                         &ehci->regs->command);
 803                         ehci_dbg(ehci, "IAA with IAAD still set?\n");
 804                 }
 805                 if (ehci->reclaim) {
 806                         COUNT(ehci->stats.reclaim);
 807                         end_unlink_async(ehci);
 808                 } else
 809                         ehci_dbg(ehci, "IAA with nothing to reclaim?\n");
 810         }
 811
 812         /* remote wakeup [4.3.1] */
 813         if (status & STS_PCD) {
 814                 unsigned        i = HCS_N_PORTS (ehci->hcs_params);
 815                 u32             ppcd = 0;
 816
 817                 /* kick root hub later */
 818                 pcd_status = status;
 819
 820                 /* resume root hub? */
 821                 if (!(cmd & CMD_RUN))
 822                         usb_hcd_resume_root_hub(hcd);
 823
 824                 /* get per-port change detect bits */
 825                 if (ehci->has_ppcd)
 826                         ppcd = status >> 16;
 827
 828                 while (i--) {
 829                         int pstatus;
 830
 831                         /* leverage per-port change bits feature */
 832                         if (ehci->has_ppcd && !(ppcd & (1 << i)))
 833                                 continue;
 834                         pstatus = ehci_readl(ehci,
 835                                          &ehci->regs->port_status[i]);
 836
 837                         if (pstatus & PORT_OWNER)
 838                                 continue;
 839                         if (!(test_bit(i, &ehci->suspended_ports) &&
 840                                         ((pstatus & PORT_RESUME) ||
 841                                                 !(pstatus & PORT_SUSPEND)) &&
 842                                         (pstatus & PORT_PE) &&
 843                                         ehci->reset_done[i] == 0))
 844                                 continue;
 845
 846                         /* start 20 msec resume signaling from this port,
 847                          * and make khubd collect PORT_STAT_C_SUSPEND to
 848                          * stop that signaling.  Use 5 ms extra for safety,
 849                          * like usb_port_resume() does.
 850                          */
 851                         ehci->reset_done[i] = jiffies + msecs_to_jiffies(25);
 852                         ehci_dbg (ehci, "port %d remote wakeup\n", i + 1);
 853                         mod_timer(&hcd->rh_timer, ehci->reset_done[i]);
 854                 }
 855         }
 856
 857         /* PCI errors [4.15.2.4] */
 858         if (unlikely ((status & STS_FATAL) != 0)) {
 859                 ehci_err(ehci, "fatal error\n");
 860                 dbg_cmd(ehci, "fatal", cmd);
 861                 dbg_status(ehci, "fatal", status);
 862                 ehci_halt(ehci);
 863 dead:
 864                 ehci_reset(ehci);
 865                 ehci_writel(ehci, 0, &ehci->regs->configured_flag);
 866                 /* generic layer kills/unlinks all urbs, then
 867                  * uses ehci_stop to clean up the rest
 868                  */
 869                 bh = 1;
 870         }
 871
 872         if (bh)
 873                 ehci_work (ehci);
 874         spin_unlock (&ehci->lock);
 875         if (pcd_status)
 876                 usb_hcd_poll_rh_status(hcd);
 877         return IRQ_HANDLED;
 878 }
 879
 880 /*-------------------------------------------------------------------------*/
 881
 882 /*
 883  * non-error returns are a promise to giveback() the urb later
 884  * we drop ownership so next owner (or urb unlink) can get it
 885  *
 886  * urb + dev is in hcd.self.controller.urb_list
 887  * we're queueing TDs onto software and hardware lists
 888  *
 889  * hcd-specific init for hcpriv hasn't been done yet
 890  *
 891  * NOTE:  control, bulk, and interrupt share the same code to append TDs
 892  * to a (possibly active) QH, and the same QH scanning code.
 893  */
 894 static int ehci_urb_enqueue (
 895         struct usb_hcd  *hcd,
 896         struct urb      *urb,
 897         gfp_t           mem_flags
 898 ) {
 899         struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
 900         struct list_head        qtd_list;
 901
 902         INIT_LIST_HEAD (&qtd_list);
 903
 904         switch (usb_pipetype (urb->pipe)) {
 905         case PIPE_CONTROL:
 906                 /* qh_completions() code doesn't handle all the fault cases
 907                  * in multi-TD control transfers.  Even 1KB is rare anyway.
 908                  */
 909                 if (urb->transfer_buffer_length > (16 * 1024))
 910                         return -EMSGSIZE;
 911                 /* FALLTHROUGH */
 912         /* case PIPE_BULK: */
 913         default:
 914                 if (!qh_urb_transaction (ehci, urb, &qtd_list, mem_flags))
 915                         return -ENOMEM;
 916                 return submit_async(ehci, urb, &qtd_list, mem_flags);
 917
 918         case PIPE_INTERRUPT:
 919                 if (!qh_urb_transaction (ehci, urb, &qtd_list, mem_flags))
 920                         return -ENOMEM;
 921                 return intr_submit(ehci, urb, &qtd_list, mem_flags);
 922
 923         case PIPE_ISOCHRONOUS:
 924                 if (urb->dev->speed == USB_SPEED_HIGH)
 925                         return itd_submit (ehci, urb, mem_flags);
 926                 else
 927                         return sitd_submit (ehci, urb, mem_flags);
 928         }
 929 }
 930
 931 static void unlink_async (struct ehci_hcd *ehci, struct ehci_qh *qh)
 932 {
 933         /* failfast */
 934         if (!HC_IS_RUNNING(ehci_to_hcd(ehci)->state) && ehci->reclaim)
 935                 end_unlink_async(ehci);
 936
 937         /* If the QH isn't linked then there's nothing we can do
 938          * unless we were called during a giveback, in which case
 939          * qh_completions() has to deal with it.
 940          */
 941         if (qh->qh_state != QH_STATE_LINKED) {
 942                 if (qh->qh_state == QH_STATE_COMPLETING)
 943                         qh->needs_rescan = 1;
 944                 return;
 945         }
 946
 947         /* defer till later if busy */
 948         if (ehci->reclaim) {
 949                 struct ehci_qh          *last;
 950
 951                 for (last = ehci->reclaim;
 952                                 last->reclaim;
 953                                 last = last->reclaim)
 954                         continue;
 955                 qh->qh_state = QH_STATE_UNLINK_WAIT;
 956                 last->reclaim = qh;
 957
 958         /* start IAA cycle */
 959         } else
 960                 start_unlink_async (ehci, qh);
 961 }
 962
 963 /* remove from hardware lists
 964  * completions normally happen asynchronously
 965  */
 966
 967 static int ehci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
 968 {
 969         struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
 970         struct ehci_qh          *qh;
 971         unsigned long           flags;
 972         int                     rc;
 973
 974         spin_lock_irqsave (&ehci->lock, flags);
 975         rc = usb_hcd_check_unlink_urb(hcd, urb, status);
 976         if (rc)
 977                 goto done;
 978
 979         switch (usb_pipetype (urb->pipe)) {
 980         // case PIPE_CONTROL:
 981         // case PIPE_BULK:
 982         default:
 983                 qh = (struct ehci_qh *) urb->hcpriv;
 984                 if (!qh)
 985                         break;
 986                 switch (qh->qh_state) {
 987                 case QH_STATE_LINKED:
 988                 case QH_STATE_COMPLETING:
 989                         unlink_async(ehci, qh);
 990                         break;
 991                 case QH_STATE_UNLINK:
 992                 case QH_STATE_UNLINK_WAIT:
 993                         /* already started */
 994                         break;
 995                 case QH_STATE_IDLE:
 996                         /* QH might be waiting for a Clear-TT-Buffer */
 997                         qh_completions(ehci, qh);
 998                         break;
 999                 }
1000                 break;
1001
1002         case PIPE_INTERRUPT:
1003                 qh = (struct ehci_qh *) urb->hcpriv;
1004                 if (!qh)
1005                         break;
1006                 switch (qh->qh_state) {
1007                 case QH_STATE_LINKED:
1008                 case QH_STATE_COMPLETING:
1009                         intr_deschedule (ehci, qh);
1010                         break;
1011                 case QH_STATE_IDLE:
1012                         qh_completions (ehci, qh);
1013                         break;
1014                 default:
1015                         ehci_dbg (ehci, "bogus qh %p state %d\n",
1016                                         qh, qh->qh_state);
1017                         goto done;
1018                 }
1019                 break;
1020
1021         case PIPE_ISOCHRONOUS:
1022                 // itd or sitd ...
1023
1024                 // wait till next completion, do it then.
1025                 // completion irqs can wait up to 1024 msec,
1026                 break;
1027         }
1028 done:
1029         spin_unlock_irqrestore (&ehci->lock, flags);
1030         return rc;
1031 }
1032
1033 /*-------------------------------------------------------------------------*/
1034
1035 // bulk qh holds the data toggle
1036
1037 static void
1038 ehci_endpoint_disable (struct usb_hcd *hcd, struct usb_host_endpoint *ep)
1039 {
1040         struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
1041         unsigned long           flags;
1042         struct ehci_qh          *qh, *tmp;
1043
1044         /* ASSERT:  any requests/urbs are being unlinked */
1045         /* ASSERT:  nobody can be submitting urbs for this any more */
1046
1047 rescan:
1048         spin_lock_irqsave (&ehci->lock, flags);
1049         qh = ep->hcpriv;
1050         if (!qh)
1051                 goto done;
1052
1053         /* endpoints can be iso streams.  for now, we don't
1054          * accelerate iso completions ... so spin a while.
1055          */
1056         if (qh->hw == NULL) {
1057                 ehci_vdbg (ehci, "iso delay\n");
1058                 goto idle_timeout;
1059         }
1060
1061         if (!HC_IS_RUNNING (hcd->state))
1062                 qh->qh_state = QH_STATE_IDLE;
1063         switch (qh->qh_state) {
1064         case QH_STATE_LINKED:
1065         case QH_STATE_COMPLETING:
1066                 for (tmp = ehci->async->qh_next.qh;
1067                                 tmp && tmp != qh;
1068                                 tmp = tmp->qh_next.qh)
1069                         continue;
1070                 /* periodic qh self-unlinks on empty, and a COMPLETING qh
1071                  * may already be unlinked.
1072                  */
1073                 if (tmp)
1074                         unlink_async(ehci, qh);
1075                 /* FALL THROUGH */
1076         case QH_STATE_UNLINK:           /* wait for hw to finish? */
1077         case QH_STATE_UNLINK_WAIT:
1078 idle_timeout:
1079                 spin_unlock_irqrestore (&ehci->lock, flags);
1080                 schedule_timeout_uninterruptible(1);
1081                 goto rescan;
1082         case QH_STATE_IDLE:             /* fully unlinked */
1083                 if (qh->clearing_tt)
1084                         goto idle_timeout;
1085                 if (list_empty (&qh->qtd_list)) {
1086                         qh_put (qh);
1087                         break;
1088                 }
1089                 /* else FALL THROUGH */
1090         default:
1091                 /* caller was supposed to have unlinked any requests;
1092                  * that's not our job.  just leak this memory.
1093                  */
1094                 ehci_err (ehci, "qh %p (#%02x) state %d%s\n",
1095                         qh, ep->desc.bEndpointAddress, qh->qh_state,
1096                         list_empty (&qh->qtd_list) ? "" : "(has tds)");
1097                 break;
1098         }
1099         ep->hcpriv = NULL;
1100 done:
1101         spin_unlock_irqrestore (&ehci->lock, flags);
1102 }
1103
1104 static void
1105 ehci_endpoint_reset(struct usb_hcd *hcd, struct usb_host_endpoint *ep)
1106 {
1107         struct ehci_hcd         *ehci = hcd_to_ehci(hcd);
1108         struct ehci_qh          *qh;
1109         int                     eptype = usb_endpoint_type(&ep->desc);
1110         int                     epnum = usb_endpoint_num(&ep->desc);
1111         int                     is_out = usb_endpoint_dir_out(&ep->desc);
1112         unsigned long           flags;
1113
1114         if (eptype != USB_ENDPOINT_XFER_BULK && eptype != USB_ENDPOINT_XFER_INT)
1115                 return;
1116
1117         spin_lock_irqsave(&ehci->lock, flags);
1118         qh = ep->hcpriv;
1119
1120         /* For Bulk and Interrupt endpoints we maintain the toggle state
1121          * in the hardware; the toggle bits in udev aren't used at all.
1122          * When an endpoint is reset by usb_clear_halt() we must reset
1123          * the toggle bit in the QH.
1124          */
1125         if (qh) {
1126                 usb_settoggle(qh->dev, epnum, is_out, 0);
1127                 if (!list_empty(&qh->qtd_list)) {
1128                         WARN_ONCE(1, "clear_halt for a busy endpoint\n");
1129                 } else if (qh->qh_state == QH_STATE_LINKED ||
1130                                 qh->qh_state == QH_STATE_COMPLETING) {
1131
1132                         /* The toggle value in the QH can't be updated
1133                          * while the QH is active.  Unlink it now;
1134                          * re-linking will call qh_refresh().
1135                          */
1136                         if (eptype == USB_ENDPOINT_XFER_BULK)
1137                                 unlink_async(ehci, qh);
1138                         else
1139                                 intr_deschedule(ehci, qh);
1140                 }
1141         }
1142         spin_unlock_irqrestore(&ehci->lock, flags);
1143 }
1144
1145 static int ehci_get_frame (struct usb_hcd *hcd)
1146 {
1147         struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
1148         return (ehci_readl(ehci, &ehci->regs->frame_index) >> 3) %
1149                 ehci->periodic_size;
1150 }
1151
1152 /*-------------------------------------------------------------------------*/
1153
1154 MODULE_DESCRIPTION(DRIVER_DESC);
1155 MODULE_AUTHOR (DRIVER_AUTHOR);
1156 MODULE_LICENSE ("GPL");
1157
1158 #ifdef CONFIG_PCI
1159 #include "ehci-pci.c"
1160 #define PCI_DRIVER              ehci_pci_driver
1161 #endif
1162
1163 #ifdef CONFIG_USB_EHCI_FSL
1164 #include "ehci-fsl.c"
1165 #define PLATFORM_DRIVER         ehci_fsl_driver
1166 #endif
1167
1168 #ifdef CONFIG_USB_EHCI_MXC
1169 #include "ehci-mxc.c"
1170 #define PLATFORM_DRIVER         ehci_mxc_driver
1171 #endif
1172
1173 #ifdef CONFIG_CPU_SUBTYPE_SH7786
1174 #include "ehci-sh.c"
1175 #define PLATFORM_DRIVER         ehci_hcd_sh_driver
1176 #endif
1177
1178 #ifdef CONFIG_SOC_AU1200
1179 #include "ehci-au1xxx.c"
1180 #define PLATFORM_DRIVER         ehci_hcd_au1xxx_driver
1181 #endif
1182
1183 #ifdef CONFIG_USB_EHCI_HCD_OMAP
1184 #include "ehci-omap.c"
1185 #define        PLATFORM_DRIVER         ehci_hcd_omap_driver
1186 #endif
1187
1188 #ifdef CONFIG_PPC_PS3
1189 #include "ehci-ps3.c"
1190 #define PS3_SYSTEM_BUS_DRIVER   ps3_ehci_driver
1191 #endif
1192
1193 #ifdef CONFIG_USB_EHCI_HCD_PPC_OF
1194 #include "ehci-ppc-of.c"
1195 #define OF_PLATFORM_DRIVER      ehci_hcd_ppc_of_driver
1196 #endif
1197
1198 #ifdef CONFIG_XPS_USB_HCD_XILINX
1199 #include "ehci-xilinx-of.c"
1200 #define XILINX_OF_PLATFORM_DRIVER       ehci_hcd_xilinx_of_driver
1201 #endif
1202
1203 #ifdef CONFIG_PLAT_ORION
1204 #include "ehci-orion.c"
1205 #define PLATFORM_DRIVER         ehci_orion_driver
1206 #endif
1207
1208 #ifdef CONFIG_ARCH_IXP4XX
1209 #include "ehci-ixp4xx.c"
1210 #define PLATFORM_DRIVER         ixp4xx_ehci_driver
1211 #endif
1212
1213 #ifdef CONFIG_USB_W90X900_EHCI
1214 #include "ehci-w90x900.c"
1215 #define PLATFORM_DRIVER         ehci_hcd_w90x900_driver
1216 #endif
1217
1218 #ifdef CONFIG_ARCH_AT91
1219 #include "ehci-atmel.c"
1220 #define PLATFORM_DRIVER         ehci_atmel_driver
1221 #endif
1222
1223 #ifdef CONFIG_USB_OCTEON_EHCI
1224 #include "ehci-octeon.c"
1225 #define PLATFORM_DRIVER         ehci_octeon_driver
1226 #endif
1227
1228 #ifdef CONFIG_USB_CNS3XXX_EHCI
1229 #include "ehci-cns3xxx.c"
1230 #define PLATFORM_DRIVER         cns3xxx_ehci_driver
1231 #endif
1232
1233 #ifdef CONFIG_ARCH_VT8500
1234 #include "ehci-vt8500.c"
1235 #define PLATFORM_DRIVER         vt8500_ehci_driver
1236 #endif
1237
1238 #ifdef CONFIG_PLAT_SPEAR
1239 #include "ehci-spear.c"
1240 #define PLATFORM_DRIVER         spear_ehci_hcd_driver
1241 #endif
1242
1243 #ifdef CONFIG_USB_EHCI_MSM
1244 #include "ehci-msm.c"
1245 #define PLATFORM_DRIVER         ehci_msm_driver
1246 #endif
1247
1248 #if !defined(PCI_DRIVER) && !defined(PLATFORM_DRIVER) && \
1249     !defined(PS3_SYSTEM_BUS_DRIVER) && !defined(OF_PLATFORM_DRIVER) && \
1250     !defined(XILINX_OF_PLATFORM_DRIVER)
1251 #error "missing bus glue for ehci-hcd"
1252 #endif
1253
1254 static int __init ehci_hcd_init(void)
1255 {
1256         int retval = 0;
1257
1258         if (usb_disabled())
1259                 return -ENODEV;
1260
1261         printk(KERN_INFO "%s: " DRIVER_DESC "\n", hcd_name);
1262         set_bit(USB_EHCI_LOADED, &usb_hcds_loaded);
1263         if (test_bit(USB_UHCI_LOADED, &usb_hcds_loaded) ||
1264                         test_bit(USB_OHCI_LOADED, &usb_hcds_loaded))
1265                 printk(KERN_WARNING "Warning! ehci_hcd should always be loaded"
1266                                 " before uhci_hcd and ohci_hcd, not after\n");
1267
1268         pr_debug("%s: block sizes: qh %Zd qtd %Zd itd %Zd sitd %Zd\n",
1269                  hcd_name,
1270                  sizeof(struct ehci_qh), sizeof(struct ehci_qtd),
1271                  sizeof(struct ehci_itd), sizeof(struct ehci_sitd));
1272
1273 #ifdef DEBUG
1274         ehci_debug_root = debugfs_create_dir("ehci", usb_debug_root);
1275         if (!ehci_debug_root) {
1276                 retval = -ENOENT;
1277                 goto err_debug;
1278         }
1279 #endif
1280
1281 #ifdef PLATFORM_DRIVER
1282         retval = platform_driver_register(&PLATFORM_DRIVER);
1283         if (retval < 0)
1284                 goto clean0;
1285 #endif
1286
1287 #ifdef PCI_DRIVER
1288         retval = pci_register_driver(&PCI_DRIVER);
1289         if (retval < 0)
1290                 goto clean1;
1291 #endif
1292
1293 #ifdef PS3_SYSTEM_BUS_DRIVER
1294         retval = ps3_ehci_driver_register(&PS3_SYSTEM_BUS_DRIVER);
1295         if (retval < 0)
1296                 goto clean2;
1297 #endif
1298
1299 #ifdef OF_PLATFORM_DRIVER
1300         retval = of_register_platform_driver(&OF_PLATFORM_DRIVER);
1301         if (retval < 0)
1302                 goto clean3;
1303 #endif
1304
1305 #ifdef XILINX_OF_PLATFORM_DRIVER
1306         retval = of_register_platform_driver(&XILINX_OF_PLATFORM_DRIVER);
1307         if (retval < 0)
1308                 goto clean4;
1309 #endif
1310         return retval;
1311
1312 #ifdef XILINX_OF_PLATFORM_DRIVER
1313         /* of_unregister_platform_driver(&XILINX_OF_PLATFORM_DRIVER); */
1314 clean4:
1315 #endif
1316 #ifdef OF_PLATFORM_DRIVER
1317         of_unregister_platform_driver(&OF_PLATFORM_DRIVER);
1318 clean3:
1319 #endif
1320 #ifdef PS3_SYSTEM_BUS_DRIVER
1321         ps3_ehci_driver_unregister(&PS3_SYSTEM_BUS_DRIVER);
1322 clean2:
1323 #endif
1324 #ifdef PCI_DRIVER
1325         pci_unregister_driver(&PCI_DRIVER);
1326 clean1:
1327 #endif
1328 #ifdef PLATFORM_DRIVER
1329         platform_driver_unregister(&PLATFORM_DRIVER);
1330 clean0:
1331 #endif
1332 #ifdef DEBUG
1333         debugfs_remove(ehci_debug_root);
1334         ehci_debug_root = NULL;
1335 err_debug:
1336 #endif
1337         clear_bit(USB_EHCI_LOADED, &usb_hcds_loaded);
1338         return retval;
1339 }
1340 module_init(ehci_hcd_init);
1341
1342 static void __exit ehci_hcd_cleanup(void)
1343 {
1344 #ifdef XILINX_OF_PLATFORM_DRIVER
1345         of_unregister_platform_driver(&XILINX_OF_PLATFORM_DRIVER);
1346 #endif
1347 #ifdef OF_PLATFORM_DRIVER
1348         of_unregister_platform_driver(&OF_PLATFORM_DRIVER);
1349 #endif
1350 #ifdef PLATFORM_DRIVER
1351         platform_driver_unregister(&PLATFORM_DRIVER);
1352 #endif
1353 #ifdef PCI_DRIVER
1354         pci_unregister_driver(&PCI_DRIVER);
1355 #endif
1356 #ifdef PS3_SYSTEM_BUS_DRIVER
1357         ps3_ehci_driver_unregister(&PS3_SYSTEM_BUS_DRIVER);
1358 #endif
1359 #ifdef DEBUG
1360         debugfs_remove(ehci_debug_root);
1361 #endif
1362         clear_bit(USB_EHCI_LOADED, &usb_hcds_loaded);
1363 }
1364 module_exit(ehci_hcd_cleanup);
1365