drivers/usb/host/ehci-hcd.c

   1 /*
   2  * Enhanced Host Controller Interface (EHCI) driver for USB.
   3  *
   4  * Maintainer: Alan Stern <stern@rowland.harvard.edu>
   5  *
   6  * Copyright (c) 2000-2004 by David Brownell
   7  *
   8  * This program is free software; you can redistribute it and/or modify it
   9  * under the terms of the GNU General Public License as published by the
  10  * Free Software Foundation; either version 2 of the License, or (at your
  11  * option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful, but
  14  * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  15  * or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  16  * for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software Foundation,
  20  * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  21  */
  22
  23 #include <linux/module.h>
  24 #include <linux/pci.h>
  25 #include <linux/dmapool.h>
  26 #include <linux/kernel.h>
  27 #include <linux/delay.h>
  28 #include <linux/ioport.h>
  29 #include <linux/sched.h>
  30 #include <linux/vmalloc.h>
  31 #include <linux/errno.h>
  32 #include <linux/init.h>
  33 #include <linux/hrtimer.h>
  34 #include <linux/list.h>
  35 #include <linux/interrupt.h>
  36 #include <linux/usb.h>
  37 #include <linux/usb/hcd.h>
  38 #include <linux/moduleparam.h>
  39 #include <linux/dma-mapping.h>
  40 #include <linux/debugfs.h>
  41 #include <linux/slab.h>
  42 #include <linux/uaccess.h>
  43
  44 #include <asm/byteorder.h>
  45 #include <asm/io.h>
  46 #include <asm/irq.h>
  47 #include <asm/unaligned.h>
  48
  49 #if defined(CONFIG_PPC_PS3)
  50 #include <asm/firmware.h>
  51 #endif
  52
  53 /*-------------------------------------------------------------------------*/
  54
  55 /*
  56  * EHCI hc_driver implementation ... experimental, incomplete.
  57  * Based on the final 1.0 register interface specification.
  58  *
  59  * USB 2.0 shows up in upcoming www.pcmcia.org technology.
  60  * First was PCMCIA, like ISA; then CardBus, which is PCI.
  61  * Next comes "CardBay", using USB 2.0 signals.
  62  *
  63  * Contains additional contributions by Brad Hards, Rory Bolt, and others.
  64  * Special thanks to Intel and VIA for providing host controllers to
  65  * test this driver on, and Cypress (including In-System Design) for
  66  * providing early devices for those host controllers to talk to!
  67  */
  68
  69 #define DRIVER_AUTHOR "David Brownell"
  70 #define DRIVER_DESC "USB 2.0 'Enhanced' Host Controller (EHCI) Driver"
  71
  72 static const char       hcd_name [] = "ehci_hcd";
  73
  74
  75 #undef VERBOSE_DEBUG
  76 #undef EHCI_URB_TRACE
  77
  78 #ifdef DEBUG
  79 #define EHCI_STATS
  80 #endif
  81
  82 /* magic numbers that can affect system performance */
  83 #define EHCI_TUNE_CERR          3       /* 0-3 qtd retries; 0 == don't stop */
  84 #define EHCI_TUNE_RL_HS         4       /* nak throttle; see 4.9 */
  85 #define EHCI_TUNE_RL_TT         0
  86 #define EHCI_TUNE_MULT_HS       1       /* 1-3 transactions/uframe; 4.10.3 */
  87 #define EHCI_TUNE_MULT_TT       1
  88 /*
  89  * Some drivers think it's safe to schedule isochronous transfers more than
  90  * 256 ms into the future (partly as a result of an old bug in the scheduling
  91  * code).  In an attempt to avoid trouble, we will use a minimum scheduling
  92  * length of 512 frames instead of 256.
  93  */
  94 #define EHCI_TUNE_FLS           1       /* (medium) 512-frame schedule */
  95
  96 /* Initial IRQ latency:  faster than hw default */
  97 static int log2_irq_thresh = 0;         // 0 to 6
  98 module_param (log2_irq_thresh, int, S_IRUGO);
  99 MODULE_PARM_DESC (log2_irq_thresh, "log2 IRQ latency, 1-64 microframes");
 100
 101 /* initial park setting:  slower than hw default */
 102 static unsigned park = 0;
 103 module_param (park, uint, S_IRUGO);
 104 MODULE_PARM_DESC (park, "park setting; 1-3 back-to-back async packets");
 105
 106 /* for flakey hardware, ignore overcurrent indicators */
 107 static bool ignore_oc = 0;
 108 module_param (ignore_oc, bool, S_IRUGO);
 109 MODULE_PARM_DESC (ignore_oc, "ignore bogus hardware overcurrent indications");
 110
 111 /* for link power management(LPM) feature */
 112 static unsigned int hird;
 113 module_param(hird, int, S_IRUGO);
 114 MODULE_PARM_DESC(hird, "host initiated resume duration, +1 for each 75us");
 115
 116 #define INTR_MASK (STS_IAA | STS_FATAL | STS_PCD | STS_ERR | STS_INT)
 117
 118 /*-------------------------------------------------------------------------*/
 119
 120 #include "ehci.h"
 121 #include "ehci-dbg.c"
 122 #include "pci-quirks.h"
 123
 124 /*-------------------------------------------------------------------------*/
 125
 126 /*
 127  * handshake - spin reading hc until handshake completes or fails
 128  * @ptr: address of hc register to be read
 129  * @mask: bits to look at in result of read
 130  * @done: value of those bits when handshake succeeds
 131  * @usec: timeout in microseconds
 132  *
 133  * Returns negative errno, or zero on success
 134  *
 135  * Success happens when the "mask" bits have the specified value (hardware
 136  * handshake done).  There are two failure modes:  "usec" have passed (major
 137  * hardware flakeout), or the register reads as all-ones (hardware removed).
 138  *
 139  * That last failure should_only happen in cases like physical cardbus eject
 140  * before driver shutdown. But it also seems to be caused by bugs in cardbus
 141  * bridge shutdown:  shutting down the bridge before the devices using it.
 142  */
 143 static int handshake (struct ehci_hcd *ehci, void __iomem *ptr,
 144                       u32 mask, u32 done, int usec)
 145 {
 146         u32     result;
 147
 148         do {
 149                 result = ehci_readl(ehci, ptr);
 150                 if (result == ~(u32)0)          /* card removed */
 151                         return -ENODEV;
 152                 result &= mask;
 153                 if (result == done)
 154                         return 0;
 155                 udelay (1);
 156                 usec--;
 157         } while (usec > 0);
 158         return -ETIMEDOUT;
 159 }
 160
 161 /* check TDI/ARC silicon is in host mode */
 162 static int tdi_in_host_mode (struct ehci_hcd *ehci)
 163 {
 164         u32             tmp;
 165
 166         tmp = ehci_readl(ehci, &ehci->regs->usbmode);
 167         return (tmp & 3) == USBMODE_CM_HC;
 168 }
 169
 170 /*
 171  * Force HC to halt state from unknown (EHCI spec section 2.3).
 172  * Must be called with interrupts enabled and the lock not held.
 173  */
 174 static int ehci_halt (struct ehci_hcd *ehci)
 175 {
 176         u32     temp;
 177
 178         spin_lock_irq(&ehci->lock);
 179
 180         /* disable any irqs left enabled by previous code */
 181         ehci_writel(ehci, 0, &ehci->regs->intr_enable);
 182
 183         if (ehci_is_TDI(ehci) && !tdi_in_host_mode(ehci)) {
 184                 spin_unlock_irq(&ehci->lock);
 185                 return 0;
 186         }
 187
 188         /*
 189          * This routine gets called during probe before ehci->command
 190          * has been initialized, so we can't rely on its value.
 191          */
 192         ehci->command &= ~CMD_RUN;
 193         temp = ehci_readl(ehci, &ehci->regs->command);
 194         temp &= ~(CMD_RUN | CMD_IAAD);
 195         ehci_writel(ehci, temp, &ehci->regs->command);
 196
 197         spin_unlock_irq(&ehci->lock);
 198         synchronize_irq(ehci_to_hcd(ehci)->irq);
 199
 200         return handshake(ehci, &ehci->regs->status,
 201                           STS_HALT, STS_HALT, 16 * 125);
 202 }
 203
 204 /* put TDI/ARC silicon into EHCI mode */
 205 static void tdi_reset (struct ehci_hcd *ehci)
 206 {
 207         u32             tmp;
 208
 209         tmp = ehci_readl(ehci, &ehci->regs->usbmode);
 210         tmp |= USBMODE_CM_HC;
 211         /* The default byte access to MMR space is LE after
 212          * controller reset. Set the required endian mode
 213          * for transfer buffers to match the host microprocessor
 214          */
 215         if (ehci_big_endian_mmio(ehci))
 216                 tmp |= USBMODE_BE;
 217         ehci_writel(ehci, tmp, &ehci->regs->usbmode);
 218 }
 219
 220 /*
 221  * Reset a non-running (STS_HALT == 1) controller.
 222  * Must be called with interrupts enabled and the lock not held.
 223  */
 224 static int ehci_reset (struct ehci_hcd *ehci)
 225 {
 226         int     retval;
 227         u32     command = ehci_readl(ehci, &ehci->regs->command);
 228
 229         /* If the EHCI debug controller is active, special care must be
 230          * taken before and after a host controller reset */
 231         if (ehci->debug && !dbgp_reset_prep(ehci_to_hcd(ehci)))
 232                 ehci->debug = NULL;
 233
 234         command |= CMD_RESET;
 235         dbg_cmd (ehci, "reset", command);
 236         ehci_writel(ehci, command, &ehci->regs->command);
 237         ehci->rh_state = EHCI_RH_HALTED;
 238         ehci->next_statechange = jiffies;
 239         retval = handshake (ehci, &ehci->regs->command,
 240                             CMD_RESET, 0, 250 * 1000);
 241
 242         if (ehci->has_hostpc) {
 243                 ehci_writel(ehci, USBMODE_EX_HC | USBMODE_EX_VBPS,
 244                                 &ehci->regs->usbmode_ex);
 245                 ehci_writel(ehci, TXFIFO_DEFAULT, &ehci->regs->txfill_tuning);
 246         }
 247         if (retval)
 248                 return retval;
 249
 250         if (ehci_is_TDI(ehci))
 251                 tdi_reset (ehci);
 252
 253         if (ehci->debug)
 254                 dbgp_external_startup(ehci_to_hcd(ehci));
 255
 256         ehci->port_c_suspend = ehci->suspended_ports =
 257                         ehci->resuming_ports = 0;
 258         return retval;
 259 }
 260
 261 /*
 262  * Idle the controller (turn off the schedules).
 263  * Must be called with interrupts enabled and the lock not held.
 264  */
 265 static void ehci_quiesce (struct ehci_hcd *ehci)
 266 {
 267         u32     temp;
 268
 269         if (ehci->rh_state != EHCI_RH_RUNNING)
 270                 return;
 271
 272         /* wait for any schedule enables/disables to take effect */
 273         temp = (ehci->command << 10) & (STS_ASS | STS_PSS);
 274         handshake(ehci, &ehci->regs->status, STS_ASS | STS_PSS, temp, 16 * 125);
 275
 276         /* then disable anything that's still active */
 277         spin_lock_irq(&ehci->lock);
 278         ehci->command &= ~(CMD_ASE | CMD_PSE);
 279         ehci_writel(ehci, ehci->command, &ehci->regs->command);
 280         spin_unlock_irq(&ehci->lock);
 281
 282         /* hardware can take 16 microframes to turn off ... */
 283         handshake(ehci, &ehci->regs->status, STS_ASS | STS_PSS, 0, 16 * 125);
 284 }
 285
 286 /*-------------------------------------------------------------------------*/
 287
 288 static void end_unlink_async(struct ehci_hcd *ehci);
 289 static void unlink_empty_async(struct ehci_hcd *ehci);
 290 static void ehci_work(struct ehci_hcd *ehci);
 291 static void start_unlink_intr(struct ehci_hcd *ehci, struct ehci_qh *qh);
 292 static void end_unlink_intr(struct ehci_hcd *ehci, struct ehci_qh *qh);
 293
 294 #include "ehci-timer.c"
 295 #include "ehci-hub.c"
 296 #include "ehci-lpm.c"
 297 #include "ehci-mem.c"
 298 #include "ehci-q.c"
 299 #include "ehci-sched.c"
 300 #include "ehci-sysfs.c"
 301
 302 /*-------------------------------------------------------------------------*/
 303
 304 /* On some systems, leaving remote wakeup enabled prevents system shutdown.
 305  * The firmware seems to think that powering off is a wakeup event!
 306  * This routine turns off remote wakeup and everything else, on all ports.
 307  */
 308 static void ehci_turn_off_all_ports(struct ehci_hcd *ehci)
 309 {
 310         int     port = HCS_N_PORTS(ehci->hcs_params);
 311
 312         while (port--)
 313                 ehci_writel(ehci, PORT_RWC_BITS,
 314                                 &ehci->regs->port_status[port]);
 315 }
 316
 317 /*
 318  * Halt HC, turn off all ports, and let the BIOS use the companion controllers.
 319  * Must be called with interrupts enabled and the lock not held.
 320  */
 321 static void ehci_silence_controller(struct ehci_hcd *ehci)
 322 {
 323         ehci_halt(ehci);
 324
 325         spin_lock_irq(&ehci->lock);
 326         ehci->rh_state = EHCI_RH_HALTED;
 327         ehci_turn_off_all_ports(ehci);
 328
 329         /* make BIOS/etc use companion controller during reboot */
 330         ehci_writel(ehci, 0, &ehci->regs->configured_flag);
 331
 332         /* unblock posted writes */
 333         ehci_readl(ehci, &ehci->regs->configured_flag);
 334         spin_unlock_irq(&ehci->lock);
 335 }
 336
 337 /* ehci_shutdown kick in for silicon on any bus (not just pci, etc).
 338  * This forcibly disables dma and IRQs, helping kexec and other cases
 339  * where the next system software may expect clean state.
 340  */
 341 static void ehci_shutdown(struct usb_hcd *hcd)
 342 {
 343         struct ehci_hcd *ehci = hcd_to_ehci(hcd);
 344
 345         spin_lock_irq(&ehci->lock);
 346         ehci->shutdown = true;
 347         ehci->rh_state = EHCI_RH_STOPPING;
 348         ehci->enabled_hrtimer_events = 0;
 349         spin_unlock_irq(&ehci->lock);
 350
 351         ehci_silence_controller(ehci);
 352
 353         hrtimer_cancel(&ehci->hrtimer);
 354 }
 355
 356 static void ehci_port_power (struct ehci_hcd *ehci, int is_on)
 357 {
 358         unsigned port;
 359
 360         if (!HCS_PPC (ehci->hcs_params))
 361                 return;
 362
 363         ehci_dbg (ehci, "...power%s ports...\n", is_on ? "up" : "down");
 364         for (port = HCS_N_PORTS (ehci->hcs_params); port > 0; )
 365                 (void) ehci_hub_control(ehci_to_hcd(ehci),
 366                                 is_on ? SetPortFeature : ClearPortFeature,
 367                                 USB_PORT_FEAT_POWER,
 368                                 port--, NULL, 0);
 369         /* Flush those writes */
 370         ehci_readl(ehci, &ehci->regs->command);
 371         msleep(20);
 372 }
 373
 374 /*-------------------------------------------------------------------------*/
 375
 376 /*
 377  * ehci_work is called from some interrupts, timers, and so on.
 378  * it calls driver completion functions, after dropping ehci->lock.
 379  */
 380 static void ehci_work (struct ehci_hcd *ehci)
 381 {
 382         /* another CPU may drop ehci->lock during a schedule scan while
 383          * it reports urb completions.  this flag guards against bogus
 384          * attempts at re-entrant schedule scanning.
 385          */
 386         if (ehci->scanning) {
 387                 ehci->need_rescan = true;
 388                 return;
 389         }
 390         ehci->scanning = true;
 391
 392  rescan:
 393         ehci->need_rescan = false;
 394         if (ehci->async_count)
 395                 scan_async(ehci);
 396         if (ehci->intr_count > 0)
 397                 scan_intr(ehci);
 398         if (ehci->isoc_count > 0)
 399                 scan_isoc(ehci);
 400         if (ehci->need_rescan)
 401                 goto rescan;
 402         ehci->scanning = false;
 403
 404         /* the IO watchdog guards against hardware or driver bugs that
 405          * misplace IRQs, and should let us run completely without IRQs.
 406          * such lossage has been observed on both VT6202 and VT8235.
 407          */
 408         turn_on_io_watchdog(ehci);
 409 }
 410
 411 /*
 412  * Called when the ehci_hcd module is removed.
 413  */
 414 static void ehci_stop (struct usb_hcd *hcd)
 415 {
 416         struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
 417
 418         ehci_dbg (ehci, "stop\n");
 419
 420         /* no more interrupts ... */
 421
 422         spin_lock_irq(&ehci->lock);
 423         ehci->enabled_hrtimer_events = 0;
 424         spin_unlock_irq(&ehci->lock);
 425
 426         ehci_quiesce(ehci);
 427         ehci_silence_controller(ehci);
 428         ehci_reset (ehci);
 429
 430         hrtimer_cancel(&ehci->hrtimer);
 431         remove_sysfs_files(ehci);
 432         remove_debug_files (ehci);
 433
 434         /* root hub is shut down separately (first, when possible) */
 435         spin_lock_irq (&ehci->lock);
 436         end_free_itds(ehci);
 437         spin_unlock_irq (&ehci->lock);
 438         ehci_mem_cleanup (ehci);
 439
 440         if (ehci->amd_pll_fix == 1)
 441                 usb_amd_dev_put();
 442
 443 #ifdef  EHCI_STATS
 444         ehci_dbg(ehci, "irq normal %ld err %ld iaa %ld (lost %ld)\n",
 445                 ehci->stats.normal, ehci->stats.error, ehci->stats.iaa,
 446                 ehci->stats.lost_iaa);
 447         ehci_dbg (ehci, "complete %ld unlink %ld\n",
 448                 ehci->stats.complete, ehci->stats.unlink);
 449 #endif
 450
 451         dbg_status (ehci, "ehci_stop completed",
 452                     ehci_readl(ehci, &ehci->regs->status));
 453 }
 454
 455 /* one-time init, only for memory state */
 456 static int ehci_init(struct usb_hcd *hcd)
 457 {
 458         struct ehci_hcd         *ehci = hcd_to_ehci(hcd);
 459         u32                     temp;
 460         int                     retval;
 461         u32                     hcc_params;
 462         struct ehci_qh_hw       *hw;
 463
 464         spin_lock_init(&ehci->lock);
 465
 466         /*
 467          * keep io watchdog by default, those good HCDs could turn off it later
 468          */
 469         ehci->need_io_watchdog = 1;
 470
 471         hrtimer_init(&ehci->hrtimer, CLOCK_MONOTONIC, HRTIMER_MODE_ABS);
 472         ehci->hrtimer.function = ehci_hrtimer_func;
 473         ehci->next_hrtimer_event = EHCI_HRTIMER_NO_EVENT;
 474
 475         hcc_params = ehci_readl(ehci, &ehci->caps->hcc_params);
 476
 477         /*
 478          * by default set standard 80% (== 100 usec/uframe) max periodic
 479          * bandwidth as required by USB 2.0
 480          */
 481         ehci->uframe_periodic_max = 100;
 482
 483         /*
 484          * hw default: 1K periodic list heads, one per frame.
 485          * periodic_size can shrink by USBCMD update if hcc_params allows.
 486          */
 487         ehci->periodic_size = DEFAULT_I_TDPS;
 488         INIT_LIST_HEAD(&ehci->intr_qh_list);
 489         INIT_LIST_HEAD(&ehci->cached_itd_list);
 490         INIT_LIST_HEAD(&ehci->cached_sitd_list);
 491
 492         if (HCC_PGM_FRAMELISTLEN(hcc_params)) {
 493                 /* periodic schedule size can be smaller than default */
 494                 switch (EHCI_TUNE_FLS) {
 495                 case 0: ehci->periodic_size = 1024; break;
 496                 case 1: ehci->periodic_size = 512; break;
 497                 case 2: ehci->periodic_size = 256; break;
 498                 default:        BUG();
 499                 }
 500         }
 501         if ((retval = ehci_mem_init(ehci, GFP_KERNEL)) < 0)
 502                 return retval;
 503
 504         /* controllers may cache some of the periodic schedule ... */
 505         if (HCC_ISOC_CACHE(hcc_params))         // full frame cache
 506                 ehci->i_thresh = 2 + 8;
 507         else                                    // N microframes cached
 508                 ehci->i_thresh = 2 + HCC_ISOC_THRES(hcc_params);
 509
 510         /*
 511          * dedicate a qh for the async ring head, since we couldn't unlink
 512          * a 'real' qh without stopping the async schedule [4.8].  use it
 513          * as the 'reclamation list head' too.
 514          * its dummy is used in hw_alt_next of many tds, to prevent the qh
 515          * from automatically advancing to the next td after short reads.
 516          */
 517         ehci->async->qh_next.qh = NULL;
 518         hw = ehci->async->hw;
 519         hw->hw_next = QH_NEXT(ehci, ehci->async->qh_dma);
 520         hw->hw_info1 = cpu_to_hc32(ehci, QH_HEAD);
 521 #if defined(CONFIG_PPC_PS3)
 522         hw->hw_info1 |= cpu_to_hc32(ehci, QH_INACTIVATE);
 523 #endif
 524         hw->hw_token = cpu_to_hc32(ehci, QTD_STS_HALT);
 525         hw->hw_qtd_next = EHCI_LIST_END(ehci);
 526         ehci->async->qh_state = QH_STATE_LINKED;
 527         hw->hw_alt_next = QTD_NEXT(ehci, ehci->async->dummy->qtd_dma);
 528
 529         /* clear interrupt enables, set irq latency */
 530         if (log2_irq_thresh < 0 || log2_irq_thresh > 6)
 531                 log2_irq_thresh = 0;
 532         temp = 1 << (16 + log2_irq_thresh);
 533         if (HCC_PER_PORT_CHANGE_EVENT(hcc_params)) {
 534                 ehci->has_ppcd = 1;
 535                 ehci_dbg(ehci, "enable per-port change event\n");
 536                 temp |= CMD_PPCEE;
 537         }
 538         if (HCC_CANPARK(hcc_params)) {
 539                 /* HW default park == 3, on hardware that supports it (like
 540                  * NVidia and ALI silicon), maximizes throughput on the async
 541                  * schedule by avoiding QH fetches between transfers.
 542                  *
 543                  * With fast usb storage devices and NForce2, "park" seems to
 544                  * make problems:  throughput reduction (!), data errors...
 545                  */
 546                 if (park) {
 547                         park = min(park, (unsigned) 3);
 548                         temp |= CMD_PARK;
 549                         temp |= park << 8;
 550                 }
 551                 ehci_dbg(ehci, "park %d\n", park);
 552         }
 553         if (HCC_PGM_FRAMELISTLEN(hcc_params)) {
 554                 /* periodic schedule size can be smaller than default */
 555                 temp &= ~(3 << 2);
 556                 temp |= (EHCI_TUNE_FLS << 2);
 557         }
 558         if (HCC_LPM(hcc_params)) {
 559                 /* support link power management EHCI 1.1 addendum */
 560                 ehci_dbg(ehci, "support lpm\n");
 561                 ehci->has_lpm = 1;
 562                 if (hird > 0xf) {
 563                         ehci_dbg(ehci, "hird %d invalid, use default 0",
 564                         hird);
 565                         hird = 0;
 566                 }
 567                 temp |= hird << 24;
 568         }
 569         ehci->command = temp;
 570
 571         /* Accept arbitrarily long scatter-gather lists */
 572         if (!(hcd->driver->flags & HCD_LOCAL_MEM))
 573                 hcd->self.sg_tablesize = ~0;
 574         return 0;
 575 }
 576
 577 /* start HC running; it's halted, ehci_init() has been run (once) */
 578 static int ehci_run (struct usb_hcd *hcd)
 579 {
 580         struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
 581         u32                     temp;
 582         u32                     hcc_params;
 583
 584         hcd->uses_new_polling = 1;
 585
 586         /* EHCI spec section 4.1 */
 587
 588         ehci_writel(ehci, ehci->periodic_dma, &ehci->regs->frame_list);
 589         ehci_writel(ehci, (u32)ehci->async->qh_dma, &ehci->regs->async_next);
 590
 591         /*
 592          * hcc_params controls whether ehci->regs->segment must (!!!)
 593          * be used; it constrains QH/ITD/SITD and QTD locations.
 594          * pci_pool consistent memory always uses segment zero.
 595          * streaming mappings for I/O buffers, like pci_map_single(),
 596          * can return segments above 4GB, if the device allows.
 597          *
 598          * NOTE:  the dma mask is visible through dma_supported(), so
 599          * drivers can pass this info along ... like NETIF_F_HIGHDMA,
 600          * Scsi_Host.highmem_io, and so forth.  It's readonly to all
 601          * host side drivers though.
 602          */
 603         hcc_params = ehci_readl(ehci, &ehci->caps->hcc_params);
 604         if (HCC_64BIT_ADDR(hcc_params)) {
 605                 ehci_writel(ehci, 0, &ehci->regs->segment);
 606 #if 0
 607 // this is deeply broken on almost all architectures
 608                 if (!dma_set_mask(hcd->self.controller, DMA_BIT_MASK(64)))
 609                         ehci_info(ehci, "enabled 64bit DMA\n");
 610 #endif
 611         }
 612
 613
 614         // Philips, Intel, and maybe others need CMD_RUN before the
 615         // root hub will detect new devices (why?); NEC doesn't
 616         ehci->command &= ~(CMD_LRESET|CMD_IAAD|CMD_PSE|CMD_ASE|CMD_RESET);
 617         ehci->command |= CMD_RUN;
 618         ehci_writel(ehci, ehci->command, &ehci->regs->command);
 619         dbg_cmd (ehci, "init", ehci->command);
 620
 621         /*
 622          * Start, enabling full USB 2.0 functionality ... usb 1.1 devices
 623          * are explicitly handed to companion controller(s), so no TT is
 624          * involved with the root hub.  (Except where one is integrated,
 625          * and there's no companion controller unless maybe for USB OTG.)
 626          *
 627          * Turning on the CF flag will transfer ownership of all ports
 628          * from the companions to the EHCI controller.  If any of the
 629          * companions are in the middle of a port reset at the time, it
 630          * could cause trouble.  Write-locking ehci_cf_port_reset_rwsem
 631          * guarantees that no resets are in progress.  After we set CF,
 632          * a short delay lets the hardware catch up; new resets shouldn't
 633          * be started before the port switching actions could complete.
 634          */
 635         down_write(&ehci_cf_port_reset_rwsem);
 636         ehci->rh_state = EHCI_RH_RUNNING;
 637         ehci_writel(ehci, FLAG_CF, &ehci->regs->configured_flag);
 638         ehci_readl(ehci, &ehci->regs->command); /* unblock posted writes */
 639         msleep(5);
 640         up_write(&ehci_cf_port_reset_rwsem);
 641         ehci->last_periodic_enable = ktime_get_real();
 642
 643         temp = HC_VERSION(ehci, ehci_readl(ehci, &ehci->caps->hc_capbase));
 644         ehci_info (ehci,
 645                 "USB %x.%x started, EHCI %x.%02x%s\n",
 646                 ((ehci->sbrn & 0xf0)>>4), (ehci->sbrn & 0x0f),
 647                 temp >> 8, temp & 0xff,
 648                 ignore_oc ? ", overcurrent ignored" : "");
 649
 650         ehci_writel(ehci, INTR_MASK,
 651                     &ehci->regs->intr_enable); /* Turn On Interrupts */
 652
 653         /* GRR this is run-once init(), being done every time the HC starts.
 654          * So long as they're part of class devices, we can't do it init()
 655          * since the class device isn't created that early.
 656          */
 657         create_debug_files(ehci);
 658         create_sysfs_files(ehci);
 659
 660         return 0;
 661 }
 662
 663 static int ehci_setup(struct usb_hcd *hcd)
 664 {
 665         struct ehci_hcd *ehci = hcd_to_ehci(hcd);
 666         int retval;
 667
 668         ehci->regs = (void __iomem *)ehci->caps +
 669             HC_LENGTH(ehci, ehci_readl(ehci, &ehci->caps->hc_capbase));
 670         dbg_hcs_params(ehci, "reset");
 671         dbg_hcc_params(ehci, "reset");
 672
 673         /* cache this readonly data; minimize chip reads */
 674         ehci->hcs_params = ehci_readl(ehci, &ehci->caps->hcs_params);
 675
 676         ehci->sbrn = HCD_USB2;
 677
 678         /* data structure init */
 679         retval = ehci_init(hcd);
 680         if (retval)
 681                 return retval;
 682
 683         retval = ehci_halt(ehci);
 684         if (retval)
 685                 return retval;
 686
 687         if (ehci_is_TDI(ehci))
 688                 tdi_reset(ehci);
 689
 690         ehci_reset(ehci);
 691
 692         return 0;
 693 }
 694
 695 /*-------------------------------------------------------------------------*/
 696
 697 static irqreturn_t ehci_irq (struct usb_hcd *hcd)
 698 {
 699         struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
 700         u32                     status, masked_status, pcd_status = 0, cmd;
 701         int                     bh;
 702
 703         spin_lock (&ehci->lock);
 704
 705         status = ehci_readl(ehci, &ehci->regs->status);
 706
 707         /* e.g. cardbus physical eject */
 708         if (status == ~(u32) 0) {
 709                 ehci_dbg (ehci, "device removed\n");
 710                 goto dead;
 711         }
 712
 713         /*
 714          * We don't use STS_FLR, but some controllers don't like it to
 715          * remain on, so mask it out along with the other status bits.
 716          */
 717         masked_status = status & (INTR_MASK | STS_FLR);
 718
 719         /* Shared IRQ? */
 720         if (!masked_status || unlikely(ehci->rh_state == EHCI_RH_HALTED)) {
 721                 spin_unlock(&ehci->lock);
 722                 return IRQ_NONE;
 723         }
 724
 725         /* clear (just) interrupts */
 726         ehci_writel(ehci, masked_status, &ehci->regs->status);
 727         cmd = ehci_readl(ehci, &ehci->regs->command);
 728         bh = 0;
 729
 730 #ifdef  VERBOSE_DEBUG
 731         /* unrequested/ignored: Frame List Rollover */
 732         dbg_status (ehci, "irq", status);
 733 #endif
 734
 735         /* INT, ERR, and IAA interrupt rates can be throttled */
 736
 737         /* normal [4.15.1.2] or error [4.15.1.1] completion */
 738         if (likely ((status & (STS_INT|STS_ERR)) != 0)) {
 739                 if (likely ((status & STS_ERR) == 0))
 740                         COUNT (ehci->stats.normal);
 741                 else
 742                         COUNT (ehci->stats.error);
 743                 bh = 1;
 744         }
 745
 746         /* complete the unlinking of some qh [4.15.2.3] */
 747         if (status & STS_IAA) {
 748
 749                 /* Turn off the IAA watchdog */
 750                 ehci->enabled_hrtimer_events &= ~BIT(EHCI_HRTIMER_IAA_WATCHDOG);
 751
 752                 /*
 753                  * Mild optimization: Allow another IAAD to reset the
 754                  * hrtimer, if one occurs before the next expiration.
 755                  * In theory we could always cancel the hrtimer, but
 756                  * tests show that about half the time it will be reset
 757                  * for some other event anyway.
 758                  */
 759                 if (ehci->next_hrtimer_event == EHCI_HRTIMER_IAA_WATCHDOG)
 760                         ++ehci->next_hrtimer_event;
 761
 762                 /* guard against (alleged) silicon errata */
 763                 if (cmd & CMD_IAAD)
 764                         ehci_dbg(ehci, "IAA with IAAD still set?\n");
 765                 if (ehci->async_iaa) {
 766                         COUNT(ehci->stats.iaa);
 767                         end_unlink_async(ehci);
 768                 } else
 769                         ehci_dbg(ehci, "IAA with nothing unlinked?\n");
 770         }
 771
 772         /* remote wakeup [4.3.1] */
 773         if (status & STS_PCD) {
 774                 unsigned        i = HCS_N_PORTS (ehci->hcs_params);
 775                 u32             ppcd = 0;
 776
 777                 /* kick root hub later */
 778                 pcd_status = status;
 779
 780                 /* resume root hub? */
 781                 if (ehci->rh_state == EHCI_RH_SUSPENDED)
 782                         usb_hcd_resume_root_hub(hcd);
 783
 784                 /* get per-port change detect bits */
 785                 if (ehci->has_ppcd)
 786                         ppcd = status >> 16;
 787
 788                 while (i--) {
 789                         int pstatus;
 790
 791                         /* leverage per-port change bits feature */
 792                         if (ehci->has_ppcd && !(ppcd & (1 << i)))
 793                                 continue;
 794                         pstatus = ehci_readl(ehci,
 795                                          &ehci->regs->port_status[i]);
 796
 797                         if (pstatus & PORT_OWNER)
 798                                 continue;
 799                         if (!(test_bit(i, &ehci->suspended_ports) &&
 800                                         ((pstatus & PORT_RESUME) ||
 801                                                 !(pstatus & PORT_SUSPEND)) &&
 802                                         (pstatus & PORT_PE) &&
 803                                         ehci->reset_done[i] == 0))
 804                                 continue;
 805
 806                         /* start 20 msec resume signaling from this port,
 807                          * and make khubd collect PORT_STAT_C_SUSPEND to
 808                          * stop that signaling.  Use 5 ms extra for safety,
 809                          * like usb_port_resume() does.
 810                          */
 811                         ehci->reset_done[i] = jiffies + msecs_to_jiffies(25);
 812                         set_bit(i, &ehci->resuming_ports);
 813                         ehci_dbg (ehci, "port %d remote wakeup\n", i + 1);
 814                         mod_timer(&hcd->rh_timer, ehci->reset_done[i]);
 815                 }
 816         }
 817
 818         /* PCI errors [4.15.2.4] */
 819         if (unlikely ((status & STS_FATAL) != 0)) {
 820                 ehci_err(ehci, "fatal error\n");
 821                 dbg_cmd(ehci, "fatal", cmd);
 822                 dbg_status(ehci, "fatal", status);
 823 dead:
 824                 usb_hc_died(hcd);
 825
 826                 /* Don't let the controller do anything more */
 827                 ehci->shutdown = true;
 828                 ehci->rh_state = EHCI_RH_STOPPING;
 829                 ehci->command &= ~(CMD_RUN | CMD_ASE | CMD_PSE);
 830                 ehci_writel(ehci, ehci->command, &ehci->regs->command);
 831                 ehci_writel(ehci, 0, &ehci->regs->intr_enable);
 832                 ehci_handle_controller_death(ehci);
 833
 834                 /* Handle completions when the controller stops */
 835                 bh = 0;
 836         }
 837
 838         if (bh)
 839                 ehci_work (ehci);
 840         spin_unlock (&ehci->lock);
 841         if (pcd_status)
 842                 usb_hcd_poll_rh_status(hcd);
 843         return IRQ_HANDLED;
 844 }
 845
 846 /*-------------------------------------------------------------------------*/
 847
 848 /*
 849  * non-error returns are a promise to giveback() the urb later
 850  * we drop ownership so next owner (or urb unlink) can get it
 851  *
 852  * urb + dev is in hcd.self.controller.urb_list
 853  * we're queueing TDs onto software and hardware lists
 854  *
 855  * hcd-specific init for hcpriv hasn't been done yet
 856  *
 857  * NOTE:  control, bulk, and interrupt share the same code to append TDs
 858  * to a (possibly active) QH, and the same QH scanning code.
 859  */
 860 static int ehci_urb_enqueue (
 861         struct usb_hcd  *hcd,
 862         struct urb      *urb,
 863         gfp_t           mem_flags
 864 ) {
 865         struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
 866         struct list_head        qtd_list;
 867
 868         INIT_LIST_HEAD (&qtd_list);
 869
 870         switch (usb_pipetype (urb->pipe)) {
 871         case PIPE_CONTROL:
 872                 /* qh_completions() code doesn't handle all the fault cases
 873                  * in multi-TD control transfers.  Even 1KB is rare anyway.
 874                  */
 875                 if (urb->transfer_buffer_length > (16 * 1024))
 876                         return -EMSGSIZE;
 877                 /* FALLTHROUGH */
 878         /* case PIPE_BULK: */
 879         default:
 880                 if (!qh_urb_transaction (ehci, urb, &qtd_list, mem_flags))
 881                         return -ENOMEM;
 882                 return submit_async(ehci, urb, &qtd_list, mem_flags);
 883
 884         case PIPE_INTERRUPT:
 885                 if (!qh_urb_transaction (ehci, urb, &qtd_list, mem_flags))
 886                         return -ENOMEM;
 887                 return intr_submit(ehci, urb, &qtd_list, mem_flags);
 888
 889         case PIPE_ISOCHRONOUS:
 890                 if (urb->dev->speed == USB_SPEED_HIGH)
 891                         return itd_submit (ehci, urb, mem_flags);
 892                 else
 893                         return sitd_submit (ehci, urb, mem_flags);
 894         }
 895 }
 896
 897 /* remove from hardware lists
 898  * completions normally happen asynchronously
 899  */
 900
 901 static int ehci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
 902 {
 903         struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
 904         struct ehci_qh          *qh;
 905         unsigned long           flags;
 906         int                     rc;
 907
 908         spin_lock_irqsave (&ehci->lock, flags);
 909         rc = usb_hcd_check_unlink_urb(hcd, urb, status);
 910         if (rc)
 911                 goto done;
 912
 913         switch (usb_pipetype (urb->pipe)) {
 914         // case PIPE_CONTROL:
 915         // case PIPE_BULK:
 916         default:
 917                 qh = (struct ehci_qh *) urb->hcpriv;
 918                 if (!qh)
 919                         break;
 920                 switch (qh->qh_state) {
 921                 case QH_STATE_LINKED:
 922                 case QH_STATE_COMPLETING:
 923                         start_unlink_async(ehci, qh);
 924                         break;
 925                 case QH_STATE_UNLINK:
 926                 case QH_STATE_UNLINK_WAIT:
 927                         /* already started */
 928                         break;
 929                 case QH_STATE_IDLE:
 930                         /* QH might be waiting for a Clear-TT-Buffer */
 931                         qh_completions(ehci, qh);
 932                         break;
 933                 }
 934                 break;
 935
 936         case PIPE_INTERRUPT:
 937                 qh = (struct ehci_qh *) urb->hcpriv;
 938                 if (!qh)
 939                         break;
 940                 switch (qh->qh_state) {
 941                 case QH_STATE_LINKED:
 942                 case QH_STATE_COMPLETING:
 943                         start_unlink_intr(ehci, qh);
 944                         break;
 945                 case QH_STATE_IDLE:
 946                         qh_completions (ehci, qh);
 947                         break;
 948                 default:
 949                         ehci_dbg (ehci, "bogus qh %p state %d\n",
 950                                         qh, qh->qh_state);
 951                         goto done;
 952                 }
 953                 break;
 954
 955         case PIPE_ISOCHRONOUS:
 956                 // itd or sitd ...
 957
 958                 // wait till next completion, do it then.
 959                 // completion irqs can wait up to 1024 msec,
 960                 break;
 961         }
 962 done:
 963         spin_unlock_irqrestore (&ehci->lock, flags);
 964         return rc;
 965 }
 966
 967 /*-------------------------------------------------------------------------*/
 968
 969 // bulk qh holds the data toggle
 970
 971 static void
 972 ehci_endpoint_disable (struct usb_hcd *hcd, struct usb_host_endpoint *ep)
 973 {
 974         struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
 975         unsigned long           flags;
 976         struct ehci_qh          *qh, *tmp;
 977
 978         /* ASSERT:  any requests/urbs are being unlinked */
 979         /* ASSERT:  nobody can be submitting urbs for this any more */
 980
 981 rescan:
 982         spin_lock_irqsave (&ehci->lock, flags);
 983         qh = ep->hcpriv;
 984         if (!qh)
 985                 goto done;
 986
 987         /* endpoints can be iso streams.  for now, we don't
 988          * accelerate iso completions ... so spin a while.
 989          */
 990         if (qh->hw == NULL) {
 991                 struct ehci_iso_stream  *stream = ep->hcpriv;
 992
 993                 if (!list_empty(&stream->td_list))
 994                         goto idle_timeout;
 995
 996                 /* BUG_ON(!list_empty(&stream->free_list)); */
 997                 kfree(stream);
 998                 goto done;
 999         }
1000
1001         if (ehci->rh_state < EHCI_RH_RUNNING)
1002                 qh->qh_state = QH_STATE_IDLE;
1003         switch (qh->qh_state) {
1004         case QH_STATE_LINKED:
1005         case QH_STATE_COMPLETING:
1006                 for (tmp = ehci->async->qh_next.qh;
1007                                 tmp && tmp != qh;
1008                                 tmp = tmp->qh_next.qh)
1009                         continue;
1010                 /* periodic qh self-unlinks on empty, and a COMPLETING qh
1011                  * may already be unlinked.
1012                  */
1013                 if (tmp)
1014                         start_unlink_async(ehci, qh);
1015                 /* FALL THROUGH */
1016         case QH_STATE_UNLINK:           /* wait for hw to finish? */
1017         case QH_STATE_UNLINK_WAIT:
1018 idle_timeout:
1019                 spin_unlock_irqrestore (&ehci->lock, flags);
1020                 schedule_timeout_uninterruptible(1);
1021                 goto rescan;
1022         case QH_STATE_IDLE:             /* fully unlinked */
1023                 if (qh->clearing_tt)
1024                         goto idle_timeout;
1025                 if (list_empty (&qh->qtd_list)) {
1026                         qh_destroy(ehci, qh);
1027                         break;
1028                 }
1029                 /* else FALL THROUGH */
1030         default:
1031                 /* caller was supposed to have unlinked any requests;
1032                  * that's not our job.  just leak this memory.
1033                  */
1034                 ehci_err (ehci, "qh %p (#%02x) state %d%s\n",
1035                         qh, ep->desc.bEndpointAddress, qh->qh_state,
1036                         list_empty (&qh->qtd_list) ? "" : "(has tds)");
1037                 break;
1038         }
1039  done:
1040         ep->hcpriv = NULL;
1041         spin_unlock_irqrestore (&ehci->lock, flags);
1042 }
1043
1044 static void
1045 ehci_endpoint_reset(struct usb_hcd *hcd, struct usb_host_endpoint *ep)
1046 {
1047         struct ehci_hcd         *ehci = hcd_to_ehci(hcd);
1048         struct ehci_qh          *qh;
1049         int                     eptype = usb_endpoint_type(&ep->desc);
1050         int                     epnum = usb_endpoint_num(&ep->desc);
1051         int                     is_out = usb_endpoint_dir_out(&ep->desc);
1052         unsigned long           flags;
1053
1054         if (eptype != USB_ENDPOINT_XFER_BULK && eptype != USB_ENDPOINT_XFER_INT)
1055                 return;
1056
1057         spin_lock_irqsave(&ehci->lock, flags);
1058         qh = ep->hcpriv;
1059
1060         /* For Bulk and Interrupt endpoints we maintain the toggle state
1061          * in the hardware; the toggle bits in udev aren't used at all.
1062          * When an endpoint is reset by usb_clear_halt() we must reset
1063          * the toggle bit in the QH.
1064          */
1065         if (qh) {
1066                 usb_settoggle(qh->dev, epnum, is_out, 0);
1067                 if (!list_empty(&qh->qtd_list)) {
1068                         WARN_ONCE(1, "clear_halt for a busy endpoint\n");
1069                 } else if (qh->qh_state == QH_STATE_LINKED ||
1070                                 qh->qh_state == QH_STATE_COMPLETING) {
1071
1072                         /* The toggle value in the QH can't be updated
1073                          * while the QH is active.  Unlink it now;
1074                          * re-linking will call qh_refresh().
1075                          */
1076                         if (eptype == USB_ENDPOINT_XFER_BULK)
1077                                 start_unlink_async(ehci, qh);
1078                         else
1079                                 start_unlink_intr(ehci, qh);
1080                 }
1081         }
1082         spin_unlock_irqrestore(&ehci->lock, flags);
1083 }
1084
1085 static int ehci_get_frame (struct usb_hcd *hcd)
1086 {
1087         struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
1088         return (ehci_read_frame_index(ehci) >> 3) % ehci->periodic_size;
1089 }
1090
1091 /*-------------------------------------------------------------------------*/
1092
1093 #ifdef  CONFIG_PM
1094
1095 /* suspend/resume, section 4.3 */
1096
1097 /* These routines handle the generic parts of controller suspend/resume */
1098
1099 static int __maybe_unused ehci_suspend(struct usb_hcd *hcd, bool do_wakeup)
1100 {
1101         struct ehci_hcd         *ehci = hcd_to_ehci(hcd);
1102
1103         if (time_before(jiffies, ehci->next_statechange))
1104                 msleep(10);
1105
1106         /*
1107          * Root hub was already suspended.  Disable IRQ emission and
1108          * mark HW unaccessible.  The PM and USB cores make sure that
1109          * the root hub is either suspended or stopped.
1110          */
1111         ehci_prepare_ports_for_controller_suspend(ehci, do_wakeup);
1112
1113         spin_lock_irq(&ehci->lock);
1114         ehci_writel(ehci, 0, &ehci->regs->intr_enable);
1115         (void) ehci_readl(ehci, &ehci->regs->intr_enable);
1116
1117         clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
1118         spin_unlock_irq(&ehci->lock);
1119
1120         return 0;
1121 }
1122
1123 /* Returns 0 if power was preserved, 1 if power was lost */
1124 static int __maybe_unused ehci_resume(struct usb_hcd *hcd, bool hibernated)
1125 {
1126         struct ehci_hcd         *ehci = hcd_to_ehci(hcd);
1127
1128         if (time_before(jiffies, ehci->next_statechange))
1129                 msleep(100);
1130
1131         /* Mark hardware accessible again as we are back to full power by now */
1132         set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
1133
1134         if (ehci->shutdown)
1135                 return 0;               /* Controller is dead */
1136
1137         /*
1138          * If CF is still set and we aren't resuming from hibernation
1139          * then we maintained suspend power.
1140          * Just undo the effect of ehci_suspend().
1141          */
1142         if (ehci_readl(ehci, &ehci->regs->configured_flag) == FLAG_CF &&
1143                         !hibernated) {
1144                 int     mask = INTR_MASK;
1145
1146                 ehci_prepare_ports_for_controller_resume(ehci);
1147
1148                 spin_lock_irq(&ehci->lock);
1149                 if (ehci->shutdown)
1150                         goto skip;
1151
1152                 if (!hcd->self.root_hub->do_remote_wakeup)
1153                         mask &= ~STS_PCD;
1154                 ehci_writel(ehci, mask, &ehci->regs->intr_enable);
1155                 ehci_readl(ehci, &ehci->regs->intr_enable);
1156  skip:
1157                 spin_unlock_irq(&ehci->lock);
1158                 return 0;
1159         }
1160
1161         /*
1162          * Else reset, to cope with power loss or resume from hibernation
1163          * having let the firmware kick in during reboot.
1164          */
1165         usb_root_hub_lost_power(hcd->self.root_hub);
1166         (void) ehci_halt(ehci);
1167         (void) ehci_reset(ehci);
1168
1169         spin_lock_irq(&ehci->lock);
1170         if (ehci->shutdown)
1171                 goto skip;
1172
1173         ehci_writel(ehci, ehci->command, &ehci->regs->command);
1174         ehci_writel(ehci, FLAG_CF, &ehci->regs->configured_flag);
1175         ehci_readl(ehci, &ehci->regs->command); /* unblock posted writes */
1176
1177         ehci->rh_state = EHCI_RH_SUSPENDED;
1178         spin_unlock_irq(&ehci->lock);
1179
1180         /* here we "know" root ports should always stay powered */
1181         ehci_port_power(ehci, 1);
1182
1183         return 1;
1184 }
1185
1186 #endif
1187
1188 /*-------------------------------------------------------------------------*/
1189
1190 /*
1191  * The EHCI in ChipIdea HDRC cannot be a separate module or device,
1192  * because its registers (and irq) are shared between host/gadget/otg
1193  * functions  and in order to facilitate role switching we cannot
1194  * give the ehci driver exclusive access to those.
1195  */
1196 #ifndef CHIPIDEA_EHCI
1197
1198 MODULE_DESCRIPTION(DRIVER_DESC);
1199 MODULE_AUTHOR (DRIVER_AUTHOR);
1200 MODULE_LICENSE ("GPL");
1201
1202 #ifdef CONFIG_PCI
1203 #include "ehci-pci.c"
1204 #define PCI_DRIVER              ehci_pci_driver
1205 #endif
1206
1207 #ifdef CONFIG_USB_EHCI_FSL
1208 #include "ehci-fsl.c"
1209 #define PLATFORM_DRIVER         ehci_fsl_driver
1210 #endif
1211
1212 #ifdef CONFIG_USB_EHCI_MXC
1213 #include "ehci-mxc.c"
1214 #define PLATFORM_DRIVER         ehci_mxc_driver
1215 #endif
1216
1217 #ifdef CONFIG_USB_EHCI_SH
1218 #include "ehci-sh.c"
1219 #define PLATFORM_DRIVER         ehci_hcd_sh_driver
1220 #endif
1221
1222 #ifdef CONFIG_MIPS_ALCHEMY
1223 #include "ehci-au1xxx.c"
1224 #define PLATFORM_DRIVER         ehci_hcd_au1xxx_driver
1225 #endif
1226
1227 #ifdef CONFIG_USB_EHCI_HCD_OMAP
1228 #include "ehci-omap.c"
1229 #define        PLATFORM_DRIVER         ehci_hcd_omap_driver
1230 #endif
1231
1232 #ifdef CONFIG_PPC_PS3
1233 #include "ehci-ps3.c"
1234 #define PS3_SYSTEM_BUS_DRIVER   ps3_ehci_driver
1235 #endif
1236
1237 #ifdef CONFIG_USB_EHCI_HCD_PPC_OF
1238 #include "ehci-ppc-of.c"
1239 #define OF_PLATFORM_DRIVER      ehci_hcd_ppc_of_driver
1240 #endif
1241
1242 #ifdef CONFIG_XPS_USB_HCD_XILINX
1243 #include "ehci-xilinx-of.c"
1244 #define XILINX_OF_PLATFORM_DRIVER       ehci_hcd_xilinx_of_driver
1245 #endif
1246
1247 #ifdef CONFIG_PLAT_ORION
1248 #include "ehci-orion.c"
1249 #define PLATFORM_DRIVER         ehci_orion_driver
1250 #endif
1251
1252 #ifdef CONFIG_ARCH_IXP4XX
1253 #include "ehci-ixp4xx.c"
1254 #define PLATFORM_DRIVER         ixp4xx_ehci_driver
1255 #endif
1256
1257 #ifdef CONFIG_USB_W90X900_EHCI
1258 #include "ehci-w90x900.c"
1259 #define PLATFORM_DRIVER         ehci_hcd_w90x900_driver
1260 #endif
1261
1262 #ifdef CONFIG_ARCH_AT91
1263 #include "ehci-atmel.c"
1264 #define PLATFORM_DRIVER         ehci_atmel_driver
1265 #endif
1266
1267 #ifdef CONFIG_USB_OCTEON_EHCI
1268 #include "ehci-octeon.c"
1269 #define PLATFORM_DRIVER         ehci_octeon_driver
1270 #endif
1271
1272 #ifdef CONFIG_USB_CNS3XXX_EHCI
1273 #include "ehci-cns3xxx.c"
1274 #define PLATFORM_DRIVER         cns3xxx_ehci_driver
1275 #endif
1276
1277 #ifdef CONFIG_ARCH_VT8500
1278 #include "ehci-vt8500.c"
1279 #define PLATFORM_DRIVER         vt8500_ehci_driver
1280 #endif
1281
1282 #ifdef CONFIG_PLAT_SPEAR
1283 #include "ehci-spear.c"
1284 #define PLATFORM_DRIVER         spear_ehci_hcd_driver
1285 #endif
1286
1287 #ifdef CONFIG_USB_EHCI_MSM
1288 #include "ehci-msm.c"
1289 #define PLATFORM_DRIVER         ehci_msm_driver
1290 #endif
1291
1292 #ifdef CONFIG_TILE_USB
1293 #include "ehci-tilegx.c"
1294 #define PLATFORM_DRIVER         ehci_hcd_tilegx_driver
1295 #endif
1296
1297 #ifdef CONFIG_USB_EHCI_HCD_PMC_MSP
1298 #include "ehci-pmcmsp.c"
1299 #define PLATFORM_DRIVER         ehci_hcd_msp_driver
1300 #endif
1301
1302 #ifdef CONFIG_USB_EHCI_TEGRA
1303 #include "ehci-tegra.c"
1304 #define PLATFORM_DRIVER         tegra_ehci_driver
1305 #endif
1306
1307 #ifdef CONFIG_USB_EHCI_S5P
1308 #include "ehci-s5p.c"
1309 #define PLATFORM_DRIVER         s5p_ehci_driver
1310 #endif
1311
1312 #ifdef CONFIG_SPARC_LEON
1313 #include "ehci-grlib.c"
1314 #define PLATFORM_DRIVER         ehci_grlib_driver
1315 #endif
1316
1317 #ifdef CONFIG_CPU_XLR
1318 #include "ehci-xls.c"
1319 #define PLATFORM_DRIVER         ehci_xls_driver
1320 #endif
1321
1322 #ifdef CONFIG_USB_EHCI_MV
1323 #include "ehci-mv.c"
1324 #define        PLATFORM_DRIVER         ehci_mv_driver
1325 #endif
1326
1327 #ifdef CONFIG_MACH_LOONGSON1
1328 #include "ehci-ls1x.c"
1329 #define PLATFORM_DRIVER         ehci_ls1x_driver
1330 #endif
1331
1332 #ifdef CONFIG_MIPS_SEAD3
1333 #include "ehci-sead3.c"
1334 #define PLATFORM_DRIVER         ehci_hcd_sead3_driver
1335 #endif
1336
1337 #ifdef CONFIG_USB_EHCI_HCD_PLATFORM
1338 #include "ehci-platform.c"
1339 #define PLATFORM_DRIVER         ehci_platform_driver
1340 #endif
1341
1342 #if !defined(PCI_DRIVER) && !defined(PLATFORM_DRIVER) && \
1343     !defined(PS3_SYSTEM_BUS_DRIVER) && !defined(OF_PLATFORM_DRIVER) && \
1344     !defined(XILINX_OF_PLATFORM_DRIVER)
1345 #error "missing bus glue for ehci-hcd"
1346 #endif
1347
1348 static int __init ehci_hcd_init(void)
1349 {
1350         int retval = 0;
1351
1352         if (usb_disabled())
1353                 return -ENODEV;
1354
1355         printk(KERN_INFO "%s: " DRIVER_DESC "\n", hcd_name);
1356         set_bit(USB_EHCI_LOADED, &usb_hcds_loaded);
1357         if (test_bit(USB_UHCI_LOADED, &usb_hcds_loaded) ||
1358                         test_bit(USB_OHCI_LOADED, &usb_hcds_loaded))
1359                 printk(KERN_WARNING "Warning! ehci_hcd should always be loaded"
1360                                 " before uhci_hcd and ohci_hcd, not after\n");
1361
1362         pr_debug("%s: block sizes: qh %Zd qtd %Zd itd %Zd sitd %Zd\n",
1363                  hcd_name,
1364                  sizeof(struct ehci_qh), sizeof(struct ehci_qtd),
1365                  sizeof(struct ehci_itd), sizeof(struct ehci_sitd));
1366
1367 #ifdef DEBUG
1368         ehci_debug_root = debugfs_create_dir("ehci", usb_debug_root);
1369         if (!ehci_debug_root) {
1370                 retval = -ENOENT;
1371                 goto err_debug;
1372         }
1373 #endif
1374
1375 #ifdef PLATFORM_DRIVER
1376         retval = platform_driver_register(&PLATFORM_DRIVER);
1377         if (retval < 0)
1378                 goto clean0;
1379 #endif
1380
1381 #ifdef PCI_DRIVER
1382         retval = pci_register_driver(&PCI_DRIVER);
1383         if (retval < 0)
1384                 goto clean1;
1385 #endif
1386
1387 #ifdef PS3_SYSTEM_BUS_DRIVER
1388         retval = ps3_ehci_driver_register(&PS3_SYSTEM_BUS_DRIVER);
1389         if (retval < 0)
1390                 goto clean2;
1391 #endif
1392
1393 #ifdef OF_PLATFORM_DRIVER
1394         retval = platform_driver_register(&OF_PLATFORM_DRIVER);
1395         if (retval < 0)
1396                 goto clean3;
1397 #endif
1398
1399 #ifdef XILINX_OF_PLATFORM_DRIVER
1400         retval = platform_driver_register(&XILINX_OF_PLATFORM_DRIVER);
1401         if (retval < 0)
1402                 goto clean4;
1403 #endif
1404         return retval;
1405
1406 #ifdef XILINX_OF_PLATFORM_DRIVER
1407         /* platform_driver_unregister(&XILINX_OF_PLATFORM_DRIVER); */
1408 clean4:
1409 #endif
1410 #ifdef OF_PLATFORM_DRIVER
1411         platform_driver_unregister(&OF_PLATFORM_DRIVER);
1412 clean3:
1413 #endif
1414 #ifdef PS3_SYSTEM_BUS_DRIVER
1415         ps3_ehci_driver_unregister(&PS3_SYSTEM_BUS_DRIVER);
1416 clean2:
1417 #endif
1418 #ifdef PCI_DRIVER
1419         pci_unregister_driver(&PCI_DRIVER);
1420 clean1:
1421 #endif
1422 #ifdef PLATFORM_DRIVER
1423         platform_driver_unregister(&PLATFORM_DRIVER);
1424 clean0:
1425 #endif
1426 #ifdef DEBUG
1427         debugfs_remove(ehci_debug_root);
1428         ehci_debug_root = NULL;
1429 err_debug:
1430 #endif
1431         clear_bit(USB_EHCI_LOADED, &usb_hcds_loaded);
1432         return retval;
1433 }
1434 module_init(ehci_hcd_init);
1435
1436 static void __exit ehci_hcd_cleanup(void)
1437 {
1438 #ifdef XILINX_OF_PLATFORM_DRIVER
1439         platform_driver_unregister(&XILINX_OF_PLATFORM_DRIVER);
1440 #endif
1441 #ifdef OF_PLATFORM_DRIVER
1442         platform_driver_unregister(&OF_PLATFORM_DRIVER);
1443 #endif
1444 #ifdef PLATFORM_DRIVER
1445         platform_driver_unregister(&PLATFORM_DRIVER);
1446 #endif
1447 #ifdef PCI_DRIVER
1448         pci_unregister_driver(&PCI_DRIVER);
1449 #endif
1450 #ifdef PS3_SYSTEM_BUS_DRIVER
1451         ps3_ehci_driver_unregister(&PS3_SYSTEM_BUS_DRIVER);
1452 #endif
1453 #ifdef DEBUG
1454         debugfs_remove(ehci_debug_root);
1455 #endif
1456         clear_bit(USB_EHCI_LOADED, &usb_hcds_loaded);
1457 }
1458 module_exit(ehci_hcd_cleanup);
1459
1460 #endif /* CHIPIDEA_EHCI */