2 * Enhanced Host Controller Interface (EHCI) driver for USB.
4 * Maintainer: Alan Stern <stern@rowland.harvard.edu>
6 * Copyright (c) 2000-2004 by David Brownell
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software Foundation,
20 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 #include <linux/module.h>
24 #include <linux/pci.h>
25 #include <linux/dmapool.h>
26 #include <linux/kernel.h>
27 #include <linux/delay.h>
28 #include <linux/ioport.h>
29 #include <linux/sched.h>
30 #include <linux/vmalloc.h>
31 #include <linux/errno.h>
32 #include <linux/init.h>
33 #include <linux/hrtimer.h>
34 #include <linux/list.h>
35 #include <linux/interrupt.h>
36 #include <linux/usb.h>
37 #include <linux/usb/hcd.h>
38 #include <linux/moduleparam.h>
39 #include <linux/dma-mapping.h>
40 #include <linux/debugfs.h>
41 #include <linux/slab.h>
43 #include <asm/byteorder.h>
46 #include <asm/unaligned.h>
48 #if defined(CONFIG_PPC_PS3)
49 #include <asm/firmware.h>
52 /*-------------------------------------------------------------------------*/
55 * EHCI hc_driver implementation ... experimental, incomplete.
56 * Based on the final 1.0 register interface specification.
58 * USB 2.0 shows up in upcoming www.pcmcia.org technology.
59 * First was PCMCIA, like ISA; then CardBus, which is PCI.
60 * Next comes "CardBay", using USB 2.0 signals.
62 * Contains additional contributions by Brad Hards, Rory Bolt, and others.
63 * Special thanks to Intel and VIA for providing host controllers to
64 * test this driver on, and Cypress (including In-System Design) for
65 * providing early devices for those host controllers to talk to!
68 #define DRIVER_AUTHOR "David Brownell"
69 #define DRIVER_DESC "USB 2.0 'Enhanced' Host Controller (EHCI) Driver"
71 static const char hcd_name [] = "ehci_hcd";
77 /* magic numbers that can affect system performance */
78 #define EHCI_TUNE_CERR 3 /* 0-3 qtd retries; 0 == don't stop */
79 #define EHCI_TUNE_RL_HS 4 /* nak throttle; see 4.9 */
80 #define EHCI_TUNE_RL_TT 0
81 #define EHCI_TUNE_MULT_HS 1 /* 1-3 transactions/uframe; 4.10.3 */
82 #define EHCI_TUNE_MULT_TT 1
84 * Some drivers think it's safe to schedule isochronous transfers more than
85 * 256 ms into the future (partly as a result of an old bug in the scheduling
86 * code). In an attempt to avoid trouble, we will use a minimum scheduling
87 * length of 512 frames instead of 256.
89 #define EHCI_TUNE_FLS 1 /* (medium) 512-frame schedule */
91 /* Initial IRQ latency: faster than hw default */
92 static int log2_irq_thresh = 0; // 0 to 6
93 module_param (log2_irq_thresh, int, S_IRUGO);
94 MODULE_PARM_DESC (log2_irq_thresh, "log2 IRQ latency, 1-64 microframes");
96 /* initial park setting: slower than hw default */
97 static unsigned park = 0;
98 module_param (park, uint, S_IRUGO);
99 MODULE_PARM_DESC (park, "park setting; 1-3 back-to-back async packets");
101 /* for flakey hardware, ignore overcurrent indicators */
102 static bool ignore_oc = 0;
103 module_param (ignore_oc, bool, S_IRUGO);
104 MODULE_PARM_DESC (ignore_oc, "ignore bogus hardware overcurrent indications");
106 #define INTR_MASK (STS_IAA | STS_FATAL | STS_PCD | STS_ERR | STS_INT)
108 /*-------------------------------------------------------------------------*/
111 #include "pci-quirks.h"
114 * The MosChip MCS9990 controller updates its microframe counter
115 * a little before the frame counter, and occasionally we will read
116 * the invalid intermediate value. Avoid problems by checking the
117 * microframe number (the low-order 3 bits); if they are 0 then
118 * re-read the register to get the correct value.
120 static unsigned ehci_moschip_read_frame_index(struct ehci_hcd *ehci)
124 uf = ehci_readl(ehci, &ehci->regs->frame_index);
125 if (unlikely((uf & 7) == 0))
126 uf = ehci_readl(ehci, &ehci->regs->frame_index);
130 static inline unsigned ehci_read_frame_index(struct ehci_hcd *ehci)
132 if (ehci->frame_index_bug)
133 return ehci_moschip_read_frame_index(ehci);
134 return ehci_readl(ehci, &ehci->regs->frame_index);
137 #include "ehci-dbg.c"
139 /*-------------------------------------------------------------------------*/
142 * ehci_handshake - spin reading hc until handshake completes or fails
143 * @ptr: address of hc register to be read
144 * @mask: bits to look at in result of read
145 * @done: value of those bits when handshake succeeds
146 * @usec: timeout in microseconds
148 * Returns negative errno, or zero on success
150 * Success happens when the "mask" bits have the specified value (hardware
151 * handshake done). There are two failure modes: "usec" have passed (major
152 * hardware flakeout), or the register reads as all-ones (hardware removed).
154 * That last failure should_only happen in cases like physical cardbus eject
155 * before driver shutdown. But it also seems to be caused by bugs in cardbus
156 * bridge shutdown: shutting down the bridge before the devices using it.
158 int ehci_handshake(struct ehci_hcd *ehci, void __iomem *ptr,
159 u32 mask, u32 done, int usec)
164 result = ehci_readl(ehci, ptr);
165 if (result == ~(u32)0) /* card removed */
175 EXPORT_SYMBOL_GPL(ehci_handshake);
177 /* check TDI/ARC silicon is in host mode */
178 static int tdi_in_host_mode (struct ehci_hcd *ehci)
182 tmp = ehci_readl(ehci, &ehci->regs->usbmode);
183 return (tmp & 3) == USBMODE_CM_HC;
187 * Force HC to halt state from unknown (EHCI spec section 2.3).
188 * Must be called with interrupts enabled and the lock not held.
190 static int ehci_halt (struct ehci_hcd *ehci)
194 spin_lock_irq(&ehci->lock);
196 /* disable any irqs left enabled by previous code */
197 ehci_writel(ehci, 0, &ehci->regs->intr_enable);
199 if (ehci_is_TDI(ehci) && !tdi_in_host_mode(ehci)) {
200 spin_unlock_irq(&ehci->lock);
205 * This routine gets called during probe before ehci->command
206 * has been initialized, so we can't rely on its value.
208 ehci->command &= ~CMD_RUN;
209 temp = ehci_readl(ehci, &ehci->regs->command);
210 temp &= ~(CMD_RUN | CMD_IAAD);
211 ehci_writel(ehci, temp, &ehci->regs->command);
213 spin_unlock_irq(&ehci->lock);
214 synchronize_irq(ehci_to_hcd(ehci)->irq);
216 return ehci_handshake(ehci, &ehci->regs->status,
217 STS_HALT, STS_HALT, 16 * 125);
220 /* put TDI/ARC silicon into EHCI mode */
221 static void tdi_reset (struct ehci_hcd *ehci)
225 tmp = ehci_readl(ehci, &ehci->regs->usbmode);
226 tmp |= USBMODE_CM_HC;
227 /* The default byte access to MMR space is LE after
228 * controller reset. Set the required endian mode
229 * for transfer buffers to match the host microprocessor
231 if (ehci_big_endian_mmio(ehci))
233 ehci_writel(ehci, tmp, &ehci->regs->usbmode);
237 * Reset a non-running (STS_HALT == 1) controller.
238 * Must be called with interrupts enabled and the lock not held.
240 static int ehci_reset (struct ehci_hcd *ehci)
243 u32 command = ehci_readl(ehci, &ehci->regs->command);
245 /* If the EHCI debug controller is active, special care must be
246 * taken before and after a host controller reset */
247 if (ehci->debug && !dbgp_reset_prep(ehci_to_hcd(ehci)))
250 command |= CMD_RESET;
251 dbg_cmd (ehci, "reset", command);
252 ehci_writel(ehci, command, &ehci->regs->command);
253 ehci->rh_state = EHCI_RH_HALTED;
254 ehci->next_statechange = jiffies;
255 retval = ehci_handshake(ehci, &ehci->regs->command,
256 CMD_RESET, 0, 250 * 1000);
258 if (ehci->has_hostpc) {
259 ehci_writel(ehci, USBMODE_EX_HC | USBMODE_EX_VBPS,
260 &ehci->regs->usbmode_ex);
261 ehci_writel(ehci, TXFIFO_DEFAULT, &ehci->regs->txfill_tuning);
266 if (ehci_is_TDI(ehci))
270 dbgp_external_startup(ehci_to_hcd(ehci));
272 ehci->port_c_suspend = ehci->suspended_ports =
273 ehci->resuming_ports = 0;
278 * Idle the controller (turn off the schedules).
279 * Must be called with interrupts enabled and the lock not held.
281 static void ehci_quiesce (struct ehci_hcd *ehci)
285 if (ehci->rh_state != EHCI_RH_RUNNING)
288 /* wait for any schedule enables/disables to take effect */
289 temp = (ehci->command << 10) & (STS_ASS | STS_PSS);
290 ehci_handshake(ehci, &ehci->regs->status, STS_ASS | STS_PSS, temp,
293 /* then disable anything that's still active */
294 spin_lock_irq(&ehci->lock);
295 ehci->command &= ~(CMD_ASE | CMD_PSE);
296 ehci_writel(ehci, ehci->command, &ehci->regs->command);
297 spin_unlock_irq(&ehci->lock);
299 /* hardware can take 16 microframes to turn off ... */
300 ehci_handshake(ehci, &ehci->regs->status, STS_ASS | STS_PSS, 0,
304 /*-------------------------------------------------------------------------*/
306 static void end_unlink_async(struct ehci_hcd *ehci);
307 static void unlink_empty_async(struct ehci_hcd *ehci);
308 static void unlink_empty_async_suspended(struct ehci_hcd *ehci);
309 static void ehci_work(struct ehci_hcd *ehci);
310 static void start_unlink_intr(struct ehci_hcd *ehci, struct ehci_qh *qh);
311 static void end_unlink_intr(struct ehci_hcd *ehci, struct ehci_qh *qh);
313 #include "ehci-timer.c"
314 #include "ehci-hub.c"
315 #include "ehci-mem.c"
317 #include "ehci-sched.c"
318 #include "ehci-sysfs.c"
320 /*-------------------------------------------------------------------------*/
322 /* On some systems, leaving remote wakeup enabled prevents system shutdown.
323 * The firmware seems to think that powering off is a wakeup event!
324 * This routine turns off remote wakeup and everything else, on all ports.
326 static void ehci_turn_off_all_ports(struct ehci_hcd *ehci)
328 int port = HCS_N_PORTS(ehci->hcs_params);
331 ehci_writel(ehci, PORT_RWC_BITS,
332 &ehci->regs->port_status[port]);
336 * Halt HC, turn off all ports, and let the BIOS use the companion controllers.
337 * Must be called with interrupts enabled and the lock not held.
339 static void ehci_silence_controller(struct ehci_hcd *ehci)
343 spin_lock_irq(&ehci->lock);
344 ehci->rh_state = EHCI_RH_HALTED;
345 ehci_turn_off_all_ports(ehci);
347 /* make BIOS/etc use companion controller during reboot */
348 ehci_writel(ehci, 0, &ehci->regs->configured_flag);
350 /* unblock posted writes */
351 ehci_readl(ehci, &ehci->regs->configured_flag);
352 spin_unlock_irq(&ehci->lock);
355 /* ehci_shutdown kick in for silicon on any bus (not just pci, etc).
356 * This forcibly disables dma and IRQs, helping kexec and other cases
357 * where the next system software may expect clean state.
359 static void ehci_shutdown(struct usb_hcd *hcd)
361 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
363 spin_lock_irq(&ehci->lock);
364 ehci->shutdown = true;
365 ehci->rh_state = EHCI_RH_STOPPING;
366 ehci->enabled_hrtimer_events = 0;
367 spin_unlock_irq(&ehci->lock);
369 ehci_silence_controller(ehci);
371 hrtimer_cancel(&ehci->hrtimer);
374 /*-------------------------------------------------------------------------*/
377 * ehci_work is called from some interrupts, timers, and so on.
378 * it calls driver completion functions, after dropping ehci->lock.
380 static void ehci_work (struct ehci_hcd *ehci)
382 /* another CPU may drop ehci->lock during a schedule scan while
383 * it reports urb completions. this flag guards against bogus
384 * attempts at re-entrant schedule scanning.
386 if (ehci->scanning) {
387 ehci->need_rescan = true;
390 ehci->scanning = true;
393 ehci->need_rescan = false;
394 if (ehci->async_count)
396 if (ehci->intr_count > 0)
398 if (ehci->isoc_count > 0)
400 if (ehci->need_rescan)
402 ehci->scanning = false;
404 /* the IO watchdog guards against hardware or driver bugs that
405 * misplace IRQs, and should let us run completely without IRQs.
406 * such lossage has been observed on both VT6202 and VT8235.
408 turn_on_io_watchdog(ehci);
412 * Called when the ehci_hcd module is removed.
414 static void ehci_stop (struct usb_hcd *hcd)
416 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
418 ehci_dbg (ehci, "stop\n");
420 /* no more interrupts ... */
422 spin_lock_irq(&ehci->lock);
423 ehci->enabled_hrtimer_events = 0;
424 spin_unlock_irq(&ehci->lock);
427 ehci_silence_controller(ehci);
430 hrtimer_cancel(&ehci->hrtimer);
431 remove_sysfs_files(ehci);
432 remove_debug_files (ehci);
434 /* root hub is shut down separately (first, when possible) */
435 spin_lock_irq (&ehci->lock);
437 spin_unlock_irq (&ehci->lock);
438 ehci_mem_cleanup (ehci);
440 if (ehci->amd_pll_fix == 1)
444 ehci_dbg(ehci, "irq normal %ld err %ld iaa %ld (lost %ld)\n",
445 ehci->stats.normal, ehci->stats.error, ehci->stats.iaa,
446 ehci->stats.lost_iaa);
447 ehci_dbg (ehci, "complete %ld unlink %ld\n",
448 ehci->stats.complete, ehci->stats.unlink);
451 dbg_status (ehci, "ehci_stop completed",
452 ehci_readl(ehci, &ehci->regs->status));
455 /* one-time init, only for memory state */
456 static int ehci_init(struct usb_hcd *hcd)
458 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
462 struct ehci_qh_hw *hw;
464 spin_lock_init(&ehci->lock);
467 * keep io watchdog by default, those good HCDs could turn off it later
469 ehci->need_io_watchdog = 1;
471 hrtimer_init(&ehci->hrtimer, CLOCK_MONOTONIC, HRTIMER_MODE_ABS);
472 ehci->hrtimer.function = ehci_hrtimer_func;
473 ehci->next_hrtimer_event = EHCI_HRTIMER_NO_EVENT;
475 hcc_params = ehci_readl(ehci, &ehci->caps->hcc_params);
478 * by default set standard 80% (== 100 usec/uframe) max periodic
479 * bandwidth as required by USB 2.0
481 ehci->uframe_periodic_max = 100;
484 * hw default: 1K periodic list heads, one per frame.
485 * periodic_size can shrink by USBCMD update if hcc_params allows.
487 ehci->periodic_size = DEFAULT_I_TDPS;
488 INIT_LIST_HEAD(&ehci->async_unlink);
489 INIT_LIST_HEAD(&ehci->async_idle);
490 INIT_LIST_HEAD(&ehci->intr_unlink);
491 INIT_LIST_HEAD(&ehci->intr_qh_list);
492 INIT_LIST_HEAD(&ehci->cached_itd_list);
493 INIT_LIST_HEAD(&ehci->cached_sitd_list);
495 if (HCC_PGM_FRAMELISTLEN(hcc_params)) {
496 /* periodic schedule size can be smaller than default */
497 switch (EHCI_TUNE_FLS) {
498 case 0: ehci->periodic_size = 1024; break;
499 case 1: ehci->periodic_size = 512; break;
500 case 2: ehci->periodic_size = 256; break;
504 if ((retval = ehci_mem_init(ehci, GFP_KERNEL)) < 0)
507 /* controllers may cache some of the periodic schedule ... */
508 if (HCC_ISOC_CACHE(hcc_params)) // full frame cache
510 else // N microframes cached
511 ehci->i_thresh = 2 + HCC_ISOC_THRES(hcc_params);
514 * dedicate a qh for the async ring head, since we couldn't unlink
515 * a 'real' qh without stopping the async schedule [4.8]. use it
516 * as the 'reclamation list head' too.
517 * its dummy is used in hw_alt_next of many tds, to prevent the qh
518 * from automatically advancing to the next td after short reads.
520 ehci->async->qh_next.qh = NULL;
521 hw = ehci->async->hw;
522 hw->hw_next = QH_NEXT(ehci, ehci->async->qh_dma);
523 hw->hw_info1 = cpu_to_hc32(ehci, QH_HEAD);
524 #if defined(CONFIG_PPC_PS3)
525 hw->hw_info1 |= cpu_to_hc32(ehci, QH_INACTIVATE);
527 hw->hw_token = cpu_to_hc32(ehci, QTD_STS_HALT);
528 hw->hw_qtd_next = EHCI_LIST_END(ehci);
529 ehci->async->qh_state = QH_STATE_LINKED;
530 hw->hw_alt_next = QTD_NEXT(ehci, ehci->async->dummy->qtd_dma);
532 /* clear interrupt enables, set irq latency */
533 if (log2_irq_thresh < 0 || log2_irq_thresh > 6)
535 temp = 1 << (16 + log2_irq_thresh);
536 if (HCC_PER_PORT_CHANGE_EVENT(hcc_params)) {
538 ehci_dbg(ehci, "enable per-port change event\n");
541 if (HCC_CANPARK(hcc_params)) {
542 /* HW default park == 3, on hardware that supports it (like
543 * NVidia and ALI silicon), maximizes throughput on the async
544 * schedule by avoiding QH fetches between transfers.
546 * With fast usb storage devices and NForce2, "park" seems to
547 * make problems: throughput reduction (!), data errors...
550 park = min(park, (unsigned) 3);
554 ehci_dbg(ehci, "park %d\n", park);
556 if (HCC_PGM_FRAMELISTLEN(hcc_params)) {
557 /* periodic schedule size can be smaller than default */
559 temp |= (EHCI_TUNE_FLS << 2);
561 ehci->command = temp;
563 /* Accept arbitrarily long scatter-gather lists */
564 if (!(hcd->driver->flags & HCD_LOCAL_MEM))
565 hcd->self.sg_tablesize = ~0;
569 /* start HC running; it's halted, ehci_init() has been run (once) */
570 static int ehci_run (struct usb_hcd *hcd)
572 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
576 hcd->uses_new_polling = 1;
578 /* EHCI spec section 4.1 */
580 ehci_writel(ehci, ehci->periodic_dma, &ehci->regs->frame_list);
581 ehci_writel(ehci, (u32)ehci->async->qh_dma, &ehci->regs->async_next);
584 * hcc_params controls whether ehci->regs->segment must (!!!)
585 * be used; it constrains QH/ITD/SITD and QTD locations.
586 * pci_pool consistent memory always uses segment zero.
587 * streaming mappings for I/O buffers, like pci_map_single(),
588 * can return segments above 4GB, if the device allows.
590 * NOTE: the dma mask is visible through dma_supported(), so
591 * drivers can pass this info along ... like NETIF_F_HIGHDMA,
592 * Scsi_Host.highmem_io, and so forth. It's readonly to all
593 * host side drivers though.
595 hcc_params = ehci_readl(ehci, &ehci->caps->hcc_params);
596 if (HCC_64BIT_ADDR(hcc_params)) {
597 ehci_writel(ehci, 0, &ehci->regs->segment);
599 // this is deeply broken on almost all architectures
600 if (!dma_set_mask(hcd->self.controller, DMA_BIT_MASK(64)))
601 ehci_info(ehci, "enabled 64bit DMA\n");
606 // Philips, Intel, and maybe others need CMD_RUN before the
607 // root hub will detect new devices (why?); NEC doesn't
608 ehci->command &= ~(CMD_LRESET|CMD_IAAD|CMD_PSE|CMD_ASE|CMD_RESET);
609 ehci->command |= CMD_RUN;
610 ehci_writel(ehci, ehci->command, &ehci->regs->command);
611 dbg_cmd (ehci, "init", ehci->command);
614 * Start, enabling full USB 2.0 functionality ... usb 1.1 devices
615 * are explicitly handed to companion controller(s), so no TT is
616 * involved with the root hub. (Except where one is integrated,
617 * and there's no companion controller unless maybe for USB OTG.)
619 * Turning on the CF flag will transfer ownership of all ports
620 * from the companions to the EHCI controller. If any of the
621 * companions are in the middle of a port reset at the time, it
622 * could cause trouble. Write-locking ehci_cf_port_reset_rwsem
623 * guarantees that no resets are in progress. After we set CF,
624 * a short delay lets the hardware catch up; new resets shouldn't
625 * be started before the port switching actions could complete.
627 down_write(&ehci_cf_port_reset_rwsem);
628 ehci->rh_state = EHCI_RH_RUNNING;
629 ehci_writel(ehci, FLAG_CF, &ehci->regs->configured_flag);
630 ehci_readl(ehci, &ehci->regs->command); /* unblock posted writes */
632 up_write(&ehci_cf_port_reset_rwsem);
633 ehci->last_periodic_enable = ktime_get_real();
635 temp = HC_VERSION(ehci, ehci_readl(ehci, &ehci->caps->hc_capbase));
637 "USB %x.%x started, EHCI %x.%02x%s\n",
638 ((ehci->sbrn & 0xf0)>>4), (ehci->sbrn & 0x0f),
639 temp >> 8, temp & 0xff,
640 ignore_oc ? ", overcurrent ignored" : "");
642 ehci_writel(ehci, INTR_MASK,
643 &ehci->regs->intr_enable); /* Turn On Interrupts */
645 /* GRR this is run-once init(), being done every time the HC starts.
646 * So long as they're part of class devices, we can't do it init()
647 * since the class device isn't created that early.
649 create_debug_files(ehci);
650 create_sysfs_files(ehci);
655 int ehci_setup(struct usb_hcd *hcd)
657 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
660 ehci->regs = (void __iomem *)ehci->caps +
661 HC_LENGTH(ehci, ehci_readl(ehci, &ehci->caps->hc_capbase));
662 dbg_hcs_params(ehci, "reset");
663 dbg_hcc_params(ehci, "reset");
665 /* cache this readonly data; minimize chip reads */
666 ehci->hcs_params = ehci_readl(ehci, &ehci->caps->hcs_params);
668 ehci->sbrn = HCD_USB2;
670 /* data structure init */
671 retval = ehci_init(hcd);
675 retval = ehci_halt(ehci);
683 EXPORT_SYMBOL_GPL(ehci_setup);
685 /*-------------------------------------------------------------------------*/
687 static irqreturn_t ehci_irq (struct usb_hcd *hcd)
689 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
690 u32 status, masked_status, pcd_status = 0, cmd;
693 spin_lock (&ehci->lock);
695 status = ehci_readl(ehci, &ehci->regs->status);
697 /* e.g. cardbus physical eject */
698 if (status == ~(u32) 0) {
699 ehci_dbg (ehci, "device removed\n");
704 * We don't use STS_FLR, but some controllers don't like it to
705 * remain on, so mask it out along with the other status bits.
707 masked_status = status & (INTR_MASK | STS_FLR);
710 if (!masked_status || unlikely(ehci->rh_state == EHCI_RH_HALTED)) {
711 spin_unlock(&ehci->lock);
715 /* clear (just) interrupts */
716 ehci_writel(ehci, masked_status, &ehci->regs->status);
717 cmd = ehci_readl(ehci, &ehci->regs->command);
721 /* unrequested/ignored: Frame List Rollover */
722 dbg_status (ehci, "irq", status);
725 /* INT, ERR, and IAA interrupt rates can be throttled */
727 /* normal [4.15.1.2] or error [4.15.1.1] completion */
728 if (likely ((status & (STS_INT|STS_ERR)) != 0)) {
729 if (likely ((status & STS_ERR) == 0))
730 COUNT (ehci->stats.normal);
732 COUNT (ehci->stats.error);
736 /* complete the unlinking of some qh [4.15.2.3] */
737 if (status & STS_IAA) {
739 /* Turn off the IAA watchdog */
740 ehci->enabled_hrtimer_events &= ~BIT(EHCI_HRTIMER_IAA_WATCHDOG);
743 * Mild optimization: Allow another IAAD to reset the
744 * hrtimer, if one occurs before the next expiration.
745 * In theory we could always cancel the hrtimer, but
746 * tests show that about half the time it will be reset
747 * for some other event anyway.
749 if (ehci->next_hrtimer_event == EHCI_HRTIMER_IAA_WATCHDOG)
750 ++ehci->next_hrtimer_event;
752 /* guard against (alleged) silicon errata */
754 ehci_dbg(ehci, "IAA with IAAD still set?\n");
755 if (ehci->iaa_in_progress)
756 COUNT(ehci->stats.iaa);
757 end_unlink_async(ehci);
760 /* remote wakeup [4.3.1] */
761 if (status & STS_PCD) {
762 unsigned i = HCS_N_PORTS (ehci->hcs_params);
765 /* kick root hub later */
768 /* resume root hub? */
769 if (ehci->rh_state == EHCI_RH_SUSPENDED)
770 usb_hcd_resume_root_hub(hcd);
772 /* get per-port change detect bits */
779 /* leverage per-port change bits feature */
780 if (!(ppcd & (1 << i)))
782 pstatus = ehci_readl(ehci,
783 &ehci->regs->port_status[i]);
785 if (pstatus & PORT_OWNER)
787 if (!(test_bit(i, &ehci->suspended_ports) &&
788 ((pstatus & PORT_RESUME) ||
789 !(pstatus & PORT_SUSPEND)) &&
790 (pstatus & PORT_PE) &&
791 ehci->reset_done[i] == 0))
794 /* start 20 msec resume signaling from this port,
795 * and make khubd collect PORT_STAT_C_SUSPEND to
796 * stop that signaling. Use 5 ms extra for safety,
797 * like usb_port_resume() does.
799 ehci->reset_done[i] = jiffies + msecs_to_jiffies(25);
800 set_bit(i, &ehci->resuming_ports);
801 ehci_dbg (ehci, "port %d remote wakeup\n", i + 1);
802 usb_hcd_start_port_resume(&hcd->self, i);
803 mod_timer(&hcd->rh_timer, ehci->reset_done[i]);
807 /* PCI errors [4.15.2.4] */
808 if (unlikely ((status & STS_FATAL) != 0)) {
809 ehci_err(ehci, "fatal error\n");
810 dbg_cmd(ehci, "fatal", cmd);
811 dbg_status(ehci, "fatal", status);
815 /* Don't let the controller do anything more */
816 ehci->shutdown = true;
817 ehci->rh_state = EHCI_RH_STOPPING;
818 ehci->command &= ~(CMD_RUN | CMD_ASE | CMD_PSE);
819 ehci_writel(ehci, ehci->command, &ehci->regs->command);
820 ehci_writel(ehci, 0, &ehci->regs->intr_enable);
821 ehci_handle_controller_death(ehci);
823 /* Handle completions when the controller stops */
829 spin_unlock (&ehci->lock);
831 usb_hcd_poll_rh_status(hcd);
835 /*-------------------------------------------------------------------------*/
838 * non-error returns are a promise to giveback() the urb later
839 * we drop ownership so next owner (or urb unlink) can get it
841 * urb + dev is in hcd.self.controller.urb_list
842 * we're queueing TDs onto software and hardware lists
844 * hcd-specific init for hcpriv hasn't been done yet
846 * NOTE: control, bulk, and interrupt share the same code to append TDs
847 * to a (possibly active) QH, and the same QH scanning code.
849 static int ehci_urb_enqueue (
854 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
855 struct list_head qtd_list;
857 INIT_LIST_HEAD (&qtd_list);
859 switch (usb_pipetype (urb->pipe)) {
861 /* qh_completions() code doesn't handle all the fault cases
862 * in multi-TD control transfers. Even 1KB is rare anyway.
864 if (urb->transfer_buffer_length > (16 * 1024))
867 /* case PIPE_BULK: */
869 if (!qh_urb_transaction (ehci, urb, &qtd_list, mem_flags))
871 return submit_async(ehci, urb, &qtd_list, mem_flags);
874 if (!qh_urb_transaction (ehci, urb, &qtd_list, mem_flags))
876 return intr_submit(ehci, urb, &qtd_list, mem_flags);
878 case PIPE_ISOCHRONOUS:
879 if (urb->dev->speed == USB_SPEED_HIGH)
880 return itd_submit (ehci, urb, mem_flags);
882 return sitd_submit (ehci, urb, mem_flags);
886 /* remove from hardware lists
887 * completions normally happen asynchronously
890 static int ehci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
892 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
897 spin_lock_irqsave (&ehci->lock, flags);
898 rc = usb_hcd_check_unlink_urb(hcd, urb, status);
902 if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS) {
904 * We don't expedite dequeue for isochronous URBs.
905 * Just wait until they complete normally or their
909 qh = (struct ehci_qh *) urb->hcpriv;
911 switch (qh->qh_state) {
912 case QH_STATE_LINKED:
913 if (usb_pipetype(urb->pipe) == PIPE_INTERRUPT)
914 start_unlink_intr(ehci, qh);
916 start_unlink_async(ehci, qh);
918 case QH_STATE_COMPLETING:
919 qh->dequeue_during_giveback = 1;
921 case QH_STATE_UNLINK:
922 case QH_STATE_UNLINK_WAIT:
923 /* already started */
926 /* QH might be waiting for a Clear-TT-Buffer */
927 qh_completions(ehci, qh);
932 spin_unlock_irqrestore (&ehci->lock, flags);
936 /*-------------------------------------------------------------------------*/
938 // bulk qh holds the data toggle
941 ehci_endpoint_disable (struct usb_hcd *hcd, struct usb_host_endpoint *ep)
943 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
945 struct ehci_qh *qh, *tmp;
947 /* ASSERT: any requests/urbs are being unlinked */
948 /* ASSERT: nobody can be submitting urbs for this any more */
951 spin_lock_irqsave (&ehci->lock, flags);
956 /* endpoints can be iso streams. for now, we don't
957 * accelerate iso completions ... so spin a while.
959 if (qh->hw == NULL) {
960 struct ehci_iso_stream *stream = ep->hcpriv;
962 if (!list_empty(&stream->td_list))
965 /* BUG_ON(!list_empty(&stream->free_list)); */
971 if (ehci->rh_state < EHCI_RH_RUNNING)
972 qh->qh_state = QH_STATE_IDLE;
973 switch (qh->qh_state) {
974 case QH_STATE_LINKED:
975 case QH_STATE_COMPLETING:
976 for (tmp = ehci->async->qh_next.qh;
978 tmp = tmp->qh_next.qh)
980 /* periodic qh self-unlinks on empty, and a COMPLETING qh
981 * may already be unlinked.
984 start_unlink_async(ehci, qh);
986 case QH_STATE_UNLINK: /* wait for hw to finish? */
987 case QH_STATE_UNLINK_WAIT:
989 spin_unlock_irqrestore (&ehci->lock, flags);
990 schedule_timeout_uninterruptible(1);
992 case QH_STATE_IDLE: /* fully unlinked */
995 if (list_empty (&qh->qtd_list)) {
996 qh_destroy(ehci, qh);
999 /* else FALL THROUGH */
1001 /* caller was supposed to have unlinked any requests;
1002 * that's not our job. just leak this memory.
1004 ehci_err (ehci, "qh %p (#%02x) state %d%s\n",
1005 qh, ep->desc.bEndpointAddress, qh->qh_state,
1006 list_empty (&qh->qtd_list) ? "" : "(has tds)");
1011 spin_unlock_irqrestore (&ehci->lock, flags);
1015 ehci_endpoint_reset(struct usb_hcd *hcd, struct usb_host_endpoint *ep)
1017 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
1019 int eptype = usb_endpoint_type(&ep->desc);
1020 int epnum = usb_endpoint_num(&ep->desc);
1021 int is_out = usb_endpoint_dir_out(&ep->desc);
1022 unsigned long flags;
1024 if (eptype != USB_ENDPOINT_XFER_BULK && eptype != USB_ENDPOINT_XFER_INT)
1027 spin_lock_irqsave(&ehci->lock, flags);
1030 /* For Bulk and Interrupt endpoints we maintain the toggle state
1031 * in the hardware; the toggle bits in udev aren't used at all.
1032 * When an endpoint is reset by usb_clear_halt() we must reset
1033 * the toggle bit in the QH.
1036 usb_settoggle(qh->dev, epnum, is_out, 0);
1037 if (!list_empty(&qh->qtd_list)) {
1038 WARN_ONCE(1, "clear_halt for a busy endpoint\n");
1040 /* The toggle value in the QH can't be updated
1041 * while the QH is active. Unlink it now;
1042 * re-linking will call qh_refresh().
1045 if (eptype == USB_ENDPOINT_XFER_BULK)
1046 start_unlink_async(ehci, qh);
1048 start_unlink_intr(ehci, qh);
1051 spin_unlock_irqrestore(&ehci->lock, flags);
1054 static int ehci_get_frame (struct usb_hcd *hcd)
1056 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
1057 return (ehci_read_frame_index(ehci) >> 3) % ehci->periodic_size;
1060 /*-------------------------------------------------------------------------*/
1064 /* suspend/resume, section 4.3 */
1066 /* These routines handle the generic parts of controller suspend/resume */
1068 int ehci_suspend(struct usb_hcd *hcd, bool do_wakeup)
1070 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
1072 if (time_before(jiffies, ehci->next_statechange))
1076 * Root hub was already suspended. Disable IRQ emission and
1077 * mark HW unaccessible. The PM and USB cores make sure that
1078 * the root hub is either suspended or stopped.
1080 ehci_prepare_ports_for_controller_suspend(ehci, do_wakeup);
1082 spin_lock_irq(&ehci->lock);
1083 ehci_writel(ehci, 0, &ehci->regs->intr_enable);
1084 (void) ehci_readl(ehci, &ehci->regs->intr_enable);
1086 clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
1087 spin_unlock_irq(&ehci->lock);
1091 EXPORT_SYMBOL_GPL(ehci_suspend);
1093 /* Returns 0 if power was preserved, 1 if power was lost */
1094 int ehci_resume(struct usb_hcd *hcd, bool hibernated)
1096 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
1098 if (time_before(jiffies, ehci->next_statechange))
1101 /* Mark hardware accessible again as we are back to full power by now */
1102 set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
1105 return 0; /* Controller is dead */
1108 * If CF is still set and we aren't resuming from hibernation
1109 * then we maintained suspend power.
1110 * Just undo the effect of ehci_suspend().
1112 if (ehci_readl(ehci, &ehci->regs->configured_flag) == FLAG_CF &&
1114 int mask = INTR_MASK;
1116 ehci_prepare_ports_for_controller_resume(ehci);
1118 spin_lock_irq(&ehci->lock);
1122 if (!hcd->self.root_hub->do_remote_wakeup)
1124 ehci_writel(ehci, mask, &ehci->regs->intr_enable);
1125 ehci_readl(ehci, &ehci->regs->intr_enable);
1127 spin_unlock_irq(&ehci->lock);
1132 * Else reset, to cope with power loss or resume from hibernation
1133 * having let the firmware kick in during reboot.
1135 usb_root_hub_lost_power(hcd->self.root_hub);
1136 (void) ehci_halt(ehci);
1137 (void) ehci_reset(ehci);
1139 spin_lock_irq(&ehci->lock);
1143 ehci_writel(ehci, ehci->command, &ehci->regs->command);
1144 ehci_writel(ehci, FLAG_CF, &ehci->regs->configured_flag);
1145 ehci_readl(ehci, &ehci->regs->command); /* unblock posted writes */
1147 ehci->rh_state = EHCI_RH_SUSPENDED;
1148 spin_unlock_irq(&ehci->lock);
1152 EXPORT_SYMBOL_GPL(ehci_resume);
1156 /*-------------------------------------------------------------------------*/
1159 * Generic structure: This gets copied for platform drivers so that
1160 * individual entries can be overridden as needed.
1163 static const struct hc_driver ehci_hc_driver = {
1164 .description = hcd_name,
1165 .product_desc = "EHCI Host Controller",
1166 .hcd_priv_size = sizeof(struct ehci_hcd),
1169 * generic hardware linkage
1172 .flags = HCD_MEMORY | HCD_USB2,
1175 * basic lifecycle operations
1177 .reset = ehci_setup,
1180 .shutdown = ehci_shutdown,
1183 * managing i/o requests and associated device resources
1185 .urb_enqueue = ehci_urb_enqueue,
1186 .urb_dequeue = ehci_urb_dequeue,
1187 .endpoint_disable = ehci_endpoint_disable,
1188 .endpoint_reset = ehci_endpoint_reset,
1189 .clear_tt_buffer_complete = ehci_clear_tt_buffer_complete,
1192 * scheduling support
1194 .get_frame_number = ehci_get_frame,
1199 .hub_status_data = ehci_hub_status_data,
1200 .hub_control = ehci_hub_control,
1201 .bus_suspend = ehci_bus_suspend,
1202 .bus_resume = ehci_bus_resume,
1203 .relinquish_port = ehci_relinquish_port,
1204 .port_handed_over = ehci_port_handed_over,
1207 void ehci_init_driver(struct hc_driver *drv,
1208 const struct ehci_driver_overrides *over)
1210 /* Copy the generic table to drv and then apply the overrides */
1211 *drv = ehci_hc_driver;
1214 drv->hcd_priv_size += over->extra_priv_size;
1216 drv->reset = over->reset;
1219 EXPORT_SYMBOL_GPL(ehci_init_driver);
1221 /*-------------------------------------------------------------------------*/
1223 MODULE_DESCRIPTION(DRIVER_DESC);
1224 MODULE_AUTHOR (DRIVER_AUTHOR);
1225 MODULE_LICENSE ("GPL");
1227 #ifdef CONFIG_USB_EHCI_FSL
1228 #include "ehci-fsl.c"
1229 #define PLATFORM_DRIVER ehci_fsl_driver
1232 #ifdef CONFIG_USB_EHCI_SH
1233 #include "ehci-sh.c"
1234 #define PLATFORM_DRIVER ehci_hcd_sh_driver
1237 #ifdef CONFIG_PPC_PS3
1238 #include "ehci-ps3.c"
1239 #define PS3_SYSTEM_BUS_DRIVER ps3_ehci_driver
1242 #ifdef CONFIG_USB_EHCI_HCD_PPC_OF
1243 #include "ehci-ppc-of.c"
1244 #define OF_PLATFORM_DRIVER ehci_hcd_ppc_of_driver
1247 #ifdef CONFIG_XPS_USB_HCD_XILINX
1248 #include "ehci-xilinx-of.c"
1249 #define XILINX_OF_PLATFORM_DRIVER ehci_hcd_xilinx_of_driver
1252 #ifdef CONFIG_USB_W90X900_EHCI
1253 #include "ehci-w90x900.c"
1254 #define PLATFORM_DRIVER ehci_hcd_w90x900_driver
1257 #ifdef CONFIG_USB_OCTEON_EHCI
1258 #include "ehci-octeon.c"
1259 #define PLATFORM_DRIVER ehci_octeon_driver
1262 #ifdef CONFIG_TILE_USB
1263 #include "ehci-tilegx.c"
1264 #define PLATFORM_DRIVER ehci_hcd_tilegx_driver
1267 #ifdef CONFIG_USB_EHCI_HCD_PMC_MSP
1268 #include "ehci-pmcmsp.c"
1269 #define PLATFORM_DRIVER ehci_hcd_msp_driver
1272 #ifdef CONFIG_SPARC_LEON
1273 #include "ehci-grlib.c"
1274 #define PLATFORM_DRIVER ehci_grlib_driver
1277 #ifdef CONFIG_USB_EHCI_MV
1278 #include "ehci-mv.c"
1279 #define PLATFORM_DRIVER ehci_mv_driver
1282 #ifdef CONFIG_MIPS_SEAD3
1283 #include "ehci-sead3.c"
1284 #define PLATFORM_DRIVER ehci_hcd_sead3_driver
1287 static int __init ehci_hcd_init(void)
1294 printk(KERN_INFO "%s: " DRIVER_DESC "\n", hcd_name);
1295 set_bit(USB_EHCI_LOADED, &usb_hcds_loaded);
1296 if (test_bit(USB_UHCI_LOADED, &usb_hcds_loaded) ||
1297 test_bit(USB_OHCI_LOADED, &usb_hcds_loaded))
1298 printk(KERN_WARNING "Warning! ehci_hcd should always be loaded"
1299 " before uhci_hcd and ohci_hcd, not after\n");
1301 pr_debug("%s: block sizes: qh %Zd qtd %Zd itd %Zd sitd %Zd\n",
1303 sizeof(struct ehci_qh), sizeof(struct ehci_qtd),
1304 sizeof(struct ehci_itd), sizeof(struct ehci_sitd));
1307 ehci_debug_root = debugfs_create_dir("ehci", usb_debug_root);
1308 if (!ehci_debug_root) {
1314 #ifdef PLATFORM_DRIVER
1315 retval = platform_driver_register(&PLATFORM_DRIVER);
1320 #ifdef PS3_SYSTEM_BUS_DRIVER
1321 retval = ps3_ehci_driver_register(&PS3_SYSTEM_BUS_DRIVER);
1326 #ifdef OF_PLATFORM_DRIVER
1327 retval = platform_driver_register(&OF_PLATFORM_DRIVER);
1332 #ifdef XILINX_OF_PLATFORM_DRIVER
1333 retval = platform_driver_register(&XILINX_OF_PLATFORM_DRIVER);
1339 #ifdef XILINX_OF_PLATFORM_DRIVER
1340 /* platform_driver_unregister(&XILINX_OF_PLATFORM_DRIVER); */
1343 #ifdef OF_PLATFORM_DRIVER
1344 platform_driver_unregister(&OF_PLATFORM_DRIVER);
1347 #ifdef PS3_SYSTEM_BUS_DRIVER
1348 ps3_ehci_driver_unregister(&PS3_SYSTEM_BUS_DRIVER);
1351 #ifdef PLATFORM_DRIVER
1352 platform_driver_unregister(&PLATFORM_DRIVER);
1356 debugfs_remove(ehci_debug_root);
1357 ehci_debug_root = NULL;
1360 clear_bit(USB_EHCI_LOADED, &usb_hcds_loaded);
1363 module_init(ehci_hcd_init);
1365 static void __exit ehci_hcd_cleanup(void)
1367 #ifdef XILINX_OF_PLATFORM_DRIVER
1368 platform_driver_unregister(&XILINX_OF_PLATFORM_DRIVER);
1370 #ifdef OF_PLATFORM_DRIVER
1371 platform_driver_unregister(&OF_PLATFORM_DRIVER);
1373 #ifdef PLATFORM_DRIVER
1374 platform_driver_unregister(&PLATFORM_DRIVER);
1376 #ifdef PS3_SYSTEM_BUS_DRIVER
1377 ps3_ehci_driver_unregister(&PS3_SYSTEM_BUS_DRIVER);
1380 debugfs_remove(ehci_debug_root);
1382 clear_bit(USB_EHCI_LOADED, &usb_hcds_loaded);
1384 module_exit(ehci_hcd_cleanup);