2 * Copyright (c) 2007-2008, Juniper Networks, Inc.
3 * Copyright (c) 2008, Excito Elektronik i Skåne AB
4 * Copyright (c) 2008, Michael Trimarchi <trimarchimichael@yahoo.it>
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation version 2 of
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
24 #include <asm/byteorder.h>
33 struct ehci_hccr *hccr; /* R/O registers, not need for volatile */
34 volatile struct ehci_hcor *hcor;
36 static uint16_t portreset;
37 static struct QH qh_list __attribute__((aligned(32)));
39 static struct descriptor {
40 struct usb_hub_descriptor hub;
41 struct usb_device_descriptor device;
42 struct usb_linux_config_descriptor config;
43 struct usb_linux_interface_descriptor interface;
44 struct usb_endpoint_descriptor endpoint;
45 } __attribute__ ((packed)) descriptor = {
47 0x8, /* bDescLength */
48 0x29, /* bDescriptorType: hub descriptor */
49 2, /* bNrPorts -- runtime modified */
50 0, /* wHubCharacteristics */
51 10, /* bPwrOn2PwrGood */
52 0, /* bHubCntrCurrent */
53 {}, /* Device removable */
54 {} /* at most 7 ports! XXX */
58 1, /* bDescriptorType: UDESC_DEVICE */
59 cpu_to_le16(0x0200), /* bcdUSB: v2.0 */
60 9, /* bDeviceClass: UDCLASS_HUB */
61 0, /* bDeviceSubClass: UDSUBCLASS_HUB */
62 1, /* bDeviceProtocol: UDPROTO_HSHUBSTT */
63 64, /* bMaxPacketSize: 64 bytes */
64 0x0000, /* idVendor */
65 0x0000, /* idProduct */
66 cpu_to_le16(0x0100), /* bcdDevice */
67 1, /* iManufacturer */
69 0, /* iSerialNumber */
70 1 /* bNumConfigurations: 1 */
74 2, /* bDescriptorType: UDESC_CONFIG */
76 1, /* bNumInterface */
77 1, /* bConfigurationValue */
78 0, /* iConfiguration */
79 0x40, /* bmAttributes: UC_SELF_POWER */
84 4, /* bDescriptorType: UDESC_INTERFACE */
85 0, /* bInterfaceNumber */
86 0, /* bAlternateSetting */
87 1, /* bNumEndpoints */
88 9, /* bInterfaceClass: UICLASS_HUB */
89 0, /* bInterfaceSubClass: UISUBCLASS_HUB */
90 0, /* bInterfaceProtocol: UIPROTO_HSHUBSTT */
95 5, /* bDescriptorType: UDESC_ENDPOINT */
96 0x81, /* bEndpointAddress:
97 * UE_DIR_IN | EHCI_INTR_ENDPT
99 3, /* bmAttributes: UE_INTERRUPT */
100 8, /* wMaxPacketSize */
105 #if defined(CONFIG_EHCI_IS_TDI)
106 #define ehci_is_TDI() (1)
108 #define ehci_is_TDI() (0)
111 #if defined(CONFIG_EHCI_DCACHE)
113 * Routines to handle (flush/invalidate) the dcache for the QH and qTD
114 * structures and data buffers. This is needed on platforms using this
115 * EHCI support with dcache enabled.
117 static void flush_invalidate(u32 addr, int size, int flush)
120 flush_dcache_range(addr, addr + size);
122 invalidate_dcache_range(addr, addr + size);
125 static void cache_qtd(struct qTD *qtd, int flush)
127 u32 *ptr = (u32 *)qtd->qt_buffer[0];
128 int len = (qtd->qt_token & 0x7fff0000) >> 16;
130 flush_invalidate((u32)qtd, sizeof(struct qTD), flush);
132 flush_invalidate((u32)ptr, len, flush);
136 static inline struct QH *qh_addr(struct QH *qh)
138 return (struct QH *)((u32)qh & 0xffffffe0);
141 static void cache_qh(struct QH *qh, int flush)
145 static struct qTD *first_qtd;
148 * Walk the QH list and flush/invalidate all entries
151 flush_invalidate((u32)qh_addr(qh), sizeof(struct QH), flush);
152 if ((u32)qh & QH_LINK_TYPE_QH)
155 qh = (struct QH *)qh->qh_link;
160 * Save first qTD pointer, needed for invalidating pass on this QH
163 first_qtd = qtd = (struct qTD *)(*(u32 *)&qh->qh_overlay &
169 * Walk the qTD list and flush/invalidate all entries
174 cache_qtd(qtd, flush);
175 next = (struct qTD *)((u32)qtd->qt_next & 0xffffffe0);
182 static inline void ehci_flush_dcache(struct QH *qh)
187 static inline void ehci_invalidate_dcache(struct QH *qh)
191 #else /* CONFIG_EHCI_DCACHE */
195 static inline void ehci_flush_dcache(struct QH *qh)
199 static inline void ehci_invalidate_dcache(struct QH *qh)
202 #endif /* CONFIG_EHCI_DCACHE */
204 void __ehci_powerup_fixup(uint32_t *status_reg, uint32_t *reg)
209 void ehci_powerup_fixup(uint32_t *status_reg, uint32_t *reg)
210 __attribute__((weak, alias("__ehci_powerup_fixup")));
212 static int handshake(uint32_t *ptr, uint32_t mask, uint32_t done, int usec)
216 result = ehci_readl(ptr);
218 if (result == ~(uint32_t)0)
228 static void ehci_free(void *p, size_t sz)
233 static int ehci_reset(void)
240 cmd = ehci_readl(&hcor->or_usbcmd);
241 cmd = (cmd & ~CMD_RUN) | CMD_RESET;
242 ehci_writel(&hcor->or_usbcmd, cmd);
243 ret = handshake((uint32_t *)&hcor->or_usbcmd, CMD_RESET, 0, 250 * 1000);
245 printf("EHCI fail to reset\n");
250 reg_ptr = (uint32_t *)((u8 *)hcor + USBMODE);
251 tmp = ehci_readl(reg_ptr);
252 tmp |= USBMODE_CM_HC;
253 #if defined(CONFIG_EHCI_MMIO_BIG_ENDIAN)
256 ehci_writel(reg_ptr, tmp);
262 static void *ehci_alloc(size_t sz, size_t align)
264 static struct QH qh __attribute__((aligned(32)));
265 static struct qTD td[3] __attribute__((aligned (32)));
270 case sizeof(struct QH):
274 case sizeof(struct qTD):
276 debug("out of TDs\n");
283 debug("unknown allocation size\n");
291 static int ehci_td_buffer(struct qTD *td, void *buf, size_t sz)
293 uint32_t addr, delta, next;
296 addr = (uint32_t) buf;
299 td->qt_buffer[idx] = cpu_to_hc32(addr);
300 td->qt_buffer_hi[idx] = 0;
301 next = (addr + 4096) & ~4095;
311 debug("out of buffer pointers (%u bytes left)\n", sz);
319 ehci_submit_async(struct usb_device *dev, unsigned long pipe, void *buffer,
320 int length, struct devrequest *req)
324 volatile struct qTD *vtd;
327 uint32_t endpt, token, usbsts;
333 debug("dev=%p, pipe=%lx, buffer=%p, length=%d, req=%p\n", dev, pipe,
334 buffer, length, req);
336 debug("req=%u (%#x), type=%u (%#x), value=%u (%#x), index=%u\n",
337 req->request, req->request,
338 req->requesttype, req->requesttype,
339 le16_to_cpu(req->value), le16_to_cpu(req->value),
340 le16_to_cpu(req->index));
342 qh = ehci_alloc(sizeof(struct QH), 32);
344 debug("unable to allocate QH\n");
347 qh->qh_link = cpu_to_hc32((uint32_t)&qh_list | QH_LINK_TYPE_QH);
348 c = (usb_pipespeed(pipe) != USB_SPEED_HIGH &&
349 usb_pipeendpoint(pipe) == 0) ? 1 : 0;
352 (usb_maxpacket(dev, pipe) << 16) |
355 (usb_pipespeed(pipe) << 12) |
356 (usb_pipeendpoint(pipe) << 8) |
357 (0 << 7) | (usb_pipedevice(pipe) << 0);
358 qh->qh_endpt1 = cpu_to_hc32(endpt);
360 (dev->portnr << 23) |
361 (dev->parent->devnum << 16) | (0 << 8) | (0 << 0);
362 qh->qh_endpt2 = cpu_to_hc32(endpt);
363 qh->qh_overlay.qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
366 tdp = &qh->qh_overlay.qt_next;
369 usb_gettoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe));
372 td = ehci_alloc(sizeof(struct qTD), 32);
374 debug("unable to allocate SETUP td\n");
377 td->qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
378 td->qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
380 (sizeof(*req) << 16) |
381 (0 << 15) | (0 << 12) | (3 << 10) | (2 << 8) | (0x80 << 0);
382 td->qt_token = cpu_to_hc32(token);
383 if (ehci_td_buffer(td, req, sizeof(*req)) != 0) {
384 debug("unable construct SETUP td\n");
385 ehci_free(td, sizeof(*td));
388 *tdp = cpu_to_hc32((uint32_t) td);
393 if (length > 0 || req == NULL) {
394 td = ehci_alloc(sizeof(struct qTD), 32);
396 debug("unable to allocate DATA td\n");
399 td->qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
400 td->qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
401 token = (toggle << 31) |
403 ((req == NULL ? 1 : 0) << 15) |
406 ((usb_pipein(pipe) ? 1 : 0) << 8) | (0x80 << 0);
407 td->qt_token = cpu_to_hc32(token);
408 if (ehci_td_buffer(td, buffer, length) != 0) {
409 debug("unable construct DATA td\n");
410 ehci_free(td, sizeof(*td));
413 *tdp = cpu_to_hc32((uint32_t) td);
418 td = ehci_alloc(sizeof(struct qTD), 32);
420 debug("unable to allocate ACK td\n");
423 td->qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
424 td->qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
425 token = (toggle << 31) |
430 ((usb_pipein(pipe) ? 0 : 1) << 8) | (0x80 << 0);
431 td->qt_token = cpu_to_hc32(token);
432 *tdp = cpu_to_hc32((uint32_t) td);
436 qh_list.qh_link = cpu_to_hc32((uint32_t) qh | QH_LINK_TYPE_QH);
439 ehci_flush_dcache(&qh_list);
441 usbsts = ehci_readl(&hcor->or_usbsts);
442 ehci_writel(&hcor->or_usbsts, (usbsts & 0x3f));
444 /* Enable async. schedule. */
445 cmd = ehci_readl(&hcor->or_usbcmd);
447 ehci_writel(&hcor->or_usbcmd, cmd);
449 ret = handshake((uint32_t *)&hcor->or_usbsts, STD_ASS, STD_ASS,
452 printf("EHCI fail timeout STD_ASS set\n");
456 /* Wait for TDs to be processed. */
459 timeout = USB_TIMEOUT_MS(pipe);
461 /* Invalidate dcache */
462 ehci_invalidate_dcache(&qh_list);
463 token = hc32_to_cpu(vtd->qt_token);
467 } while (get_timer(ts) < timeout);
469 /* Check that the TD processing happened */
471 printf("EHCI timed out on TD - token=%#x\n", token);
474 /* Disable async schedule. */
475 cmd = ehci_readl(&hcor->or_usbcmd);
477 ehci_writel(&hcor->or_usbcmd, cmd);
479 ret = handshake((uint32_t *)&hcor->or_usbsts, STD_ASS, 0,
482 printf("EHCI fail timeout STD_ASS reset\n");
486 qh_list.qh_link = cpu_to_hc32((uint32_t)&qh_list | QH_LINK_TYPE_QH);
488 token = hc32_to_cpu(qh->qh_overlay.qt_token);
489 if (!(token & 0x80)) {
490 debug("TOKEN=%#x\n", token);
491 switch (token & 0xfc) {
493 toggle = token >> 31;
494 usb_settoggle(dev, usb_pipeendpoint(pipe),
495 usb_pipeout(pipe), toggle);
499 dev->status = USB_ST_STALLED;
503 dev->status = USB_ST_BUF_ERR;
507 dev->status = USB_ST_BABBLE_DET;
510 dev->status = USB_ST_CRC_ERR;
511 if ((token & 0x40) == 0x40)
512 dev->status |= USB_ST_STALLED;
515 dev->act_len = length - ((token >> 16) & 0x7fff);
518 debug("dev=%u, usbsts=%#x, p[1]=%#x, p[2]=%#x\n",
519 dev->devnum, ehci_readl(&hcor->or_usbsts),
520 ehci_readl(&hcor->or_portsc[0]),
521 ehci_readl(&hcor->or_portsc[1]));
524 return (dev->status != USB_ST_NOT_PROC) ? 0 : -1;
527 td = (void *)hc32_to_cpu(qh->qh_overlay.qt_next);
528 while (td != (void *)QT_NEXT_TERMINATE) {
529 qh->qh_overlay.qt_next = td->qt_next;
530 ehci_free(td, sizeof(*td));
531 td = (void *)hc32_to_cpu(qh->qh_overlay.qt_next);
533 ehci_free(qh, sizeof(*qh));
537 static inline int min3(int a, int b, int c)
548 ehci_submit_root(struct usb_device *dev, unsigned long pipe, void *buffer,
549 int length, struct devrequest *req)
556 uint32_t *status_reg;
558 if (le16_to_cpu(req->index) > CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS) {
559 printf("The request port(%d) is not configured\n",
560 le16_to_cpu(req->index) - 1);
563 status_reg = (uint32_t *)&hcor->or_portsc[
564 le16_to_cpu(req->index) - 1];
567 debug("req=%u (%#x), type=%u (%#x), value=%u, index=%u\n",
568 req->request, req->request,
569 req->requesttype, req->requesttype,
570 le16_to_cpu(req->value), le16_to_cpu(req->index));
572 typeReq = req->request | req->requesttype << 8;
575 case DeviceRequest | USB_REQ_GET_DESCRIPTOR:
576 switch (le16_to_cpu(req->value) >> 8) {
578 debug("USB_DT_DEVICE request\n");
579 srcptr = &descriptor.device;
583 debug("USB_DT_CONFIG config\n");
584 srcptr = &descriptor.config;
588 debug("USB_DT_STRING config\n");
589 switch (le16_to_cpu(req->value) & 0xff) {
590 case 0: /* Language */
595 srcptr = "\16\3u\0-\0b\0o\0o\0t\0";
598 case 2: /* Product */
599 srcptr = "\52\3E\0H\0C\0I\0 "
601 "\0C\0o\0n\0t\0r\0o\0l\0l\0e\0r\0";
605 debug("unknown value DT_STRING %x\n",
606 le16_to_cpu(req->value));
611 debug("unknown value %x\n", le16_to_cpu(req->value));
615 case USB_REQ_GET_DESCRIPTOR | ((USB_DIR_IN | USB_RT_HUB) << 8):
616 switch (le16_to_cpu(req->value) >> 8) {
618 debug("USB_DT_HUB config\n");
619 srcptr = &descriptor.hub;
623 debug("unknown value %x\n", le16_to_cpu(req->value));
627 case USB_REQ_SET_ADDRESS | (USB_RECIP_DEVICE << 8):
628 debug("USB_REQ_SET_ADDRESS\n");
629 rootdev = le16_to_cpu(req->value);
631 case DeviceOutRequest | USB_REQ_SET_CONFIGURATION:
632 debug("USB_REQ_SET_CONFIGURATION\n");
635 case USB_REQ_GET_STATUS | ((USB_DIR_IN | USB_RT_HUB) << 8):
636 tmpbuf[0] = 1; /* USB_STATUS_SELFPOWERED */
641 case USB_REQ_GET_STATUS | ((USB_RT_PORT | USB_DIR_IN) << 8):
642 memset(tmpbuf, 0, 4);
643 reg = ehci_readl(status_reg);
644 if (reg & EHCI_PS_CS)
645 tmpbuf[0] |= USB_PORT_STAT_CONNECTION;
646 if (reg & EHCI_PS_PE)
647 tmpbuf[0] |= USB_PORT_STAT_ENABLE;
648 if (reg & EHCI_PS_SUSP)
649 tmpbuf[0] |= USB_PORT_STAT_SUSPEND;
650 if (reg & EHCI_PS_OCA)
651 tmpbuf[0] |= USB_PORT_STAT_OVERCURRENT;
652 if (reg & EHCI_PS_PR)
653 tmpbuf[0] |= USB_PORT_STAT_RESET;
654 if (reg & EHCI_PS_PP)
655 tmpbuf[1] |= USB_PORT_STAT_POWER >> 8;
658 switch ((reg >> 26) & 3) {
662 tmpbuf[1] |= USB_PORT_STAT_LOW_SPEED >> 8;
666 tmpbuf[1] |= USB_PORT_STAT_HIGH_SPEED >> 8;
670 tmpbuf[1] |= USB_PORT_STAT_HIGH_SPEED >> 8;
673 if (reg & EHCI_PS_CSC)
674 tmpbuf[2] |= USB_PORT_STAT_C_CONNECTION;
675 if (reg & EHCI_PS_PEC)
676 tmpbuf[2] |= USB_PORT_STAT_C_ENABLE;
677 if (reg & EHCI_PS_OCC)
678 tmpbuf[2] |= USB_PORT_STAT_C_OVERCURRENT;
679 if (portreset & (1 << le16_to_cpu(req->index)))
680 tmpbuf[2] |= USB_PORT_STAT_C_RESET;
685 case USB_REQ_SET_FEATURE | ((USB_DIR_OUT | USB_RT_PORT) << 8):
686 reg = ehci_readl(status_reg);
687 reg &= ~EHCI_PS_CLEAR;
688 switch (le16_to_cpu(req->value)) {
689 case USB_PORT_FEAT_ENABLE:
691 ehci_writel(status_reg, reg);
693 case USB_PORT_FEAT_POWER:
694 if (HCS_PPC(ehci_readl(&hccr->cr_hcsparams))) {
696 ehci_writel(status_reg, reg);
699 case USB_PORT_FEAT_RESET:
700 if ((reg & (EHCI_PS_PE | EHCI_PS_CS)) == EHCI_PS_CS &&
702 EHCI_PS_IS_LOWSPEED(reg)) {
703 /* Low speed device, give up ownership. */
704 debug("port %d low speed --> companion\n",
707 ehci_writel(status_reg, reg);
714 ehci_writel(status_reg, reg);
716 * caller must wait, then call GetPortStatus
717 * usb 2.0 specification say 50 ms resets on
720 ehci_powerup_fixup(status_reg, ®);
722 ehci_writel(status_reg, reg & ~EHCI_PS_PR);
724 * A host controller must terminate the reset
725 * and stabilize the state of the port within
728 ret = handshake(status_reg, EHCI_PS_PR, 0,
732 1 << le16_to_cpu(req->index);
734 printf("port(%d) reset error\n",
735 le16_to_cpu(req->index) - 1);
739 debug("unknown feature %x\n", le16_to_cpu(req->value));
742 /* unblock posted writes */
743 (void) ehci_readl(&hcor->or_usbcmd);
745 case USB_REQ_CLEAR_FEATURE | ((USB_DIR_OUT | USB_RT_PORT) << 8):
746 reg = ehci_readl(status_reg);
747 switch (le16_to_cpu(req->value)) {
748 case USB_PORT_FEAT_ENABLE:
751 case USB_PORT_FEAT_C_ENABLE:
752 reg = (reg & ~EHCI_PS_CLEAR) | EHCI_PS_PE;
754 case USB_PORT_FEAT_POWER:
755 if (HCS_PPC(ehci_readl(&hccr->cr_hcsparams)))
756 reg = reg & ~(EHCI_PS_CLEAR | EHCI_PS_PP);
757 case USB_PORT_FEAT_C_CONNECTION:
758 reg = (reg & ~EHCI_PS_CLEAR) | EHCI_PS_CSC;
760 case USB_PORT_FEAT_OVER_CURRENT:
761 reg = (reg & ~EHCI_PS_CLEAR) | EHCI_PS_OCC;
763 case USB_PORT_FEAT_C_RESET:
764 portreset &= ~(1 << le16_to_cpu(req->index));
767 debug("unknown feature %x\n", le16_to_cpu(req->value));
770 ehci_writel(status_reg, reg);
771 /* unblock posted write */
772 (void) ehci_readl(&hcor->or_usbcmd);
775 debug("Unknown request\n");
780 len = min3(srclen, le16_to_cpu(req->length), length);
781 if (srcptr != NULL && len > 0)
782 memcpy(buffer, srcptr, len);
791 debug("requesttype=%x, request=%x, value=%x, index=%x, length=%x\n",
792 req->requesttype, req->request, le16_to_cpu(req->value),
793 le16_to_cpu(req->index), le16_to_cpu(req->length));
796 dev->status = USB_ST_STALLED;
800 int usb_lowlevel_stop(void)
802 return ehci_hcd_stop();
805 int usb_lowlevel_init(void)
810 if (ehci_hcd_init() != 0)
813 /* EHCI spec section 4.1 */
814 if (ehci_reset() != 0)
817 #if defined(CONFIG_EHCI_HCD_INIT_AFTER_RESET)
818 if (ehci_hcd_init() != 0)
822 /* Set head of reclaim list */
823 memset(&qh_list, 0, sizeof(qh_list));
824 qh_list.qh_link = cpu_to_hc32((uint32_t)&qh_list | QH_LINK_TYPE_QH);
825 qh_list.qh_endpt1 = cpu_to_hc32((1 << 15) | (USB_SPEED_HIGH << 12));
826 qh_list.qh_curtd = cpu_to_hc32(QT_NEXT_TERMINATE);
827 qh_list.qh_overlay.qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
828 qh_list.qh_overlay.qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
829 qh_list.qh_overlay.qt_token = cpu_to_hc32(0x40);
831 /* Set async. queue head pointer. */
832 ehci_writel(&hcor->or_asynclistaddr, (uint32_t)&qh_list);
834 reg = ehci_readl(&hccr->cr_hcsparams);
835 descriptor.hub.bNbrPorts = HCS_N_PORTS(reg);
836 printf("Register %x NbrPorts %d\n", reg, descriptor.hub.bNbrPorts);
837 /* Port Indicators */
838 if (HCS_INDICATOR(reg))
839 descriptor.hub.wHubCharacteristics |= 0x80;
840 /* Port Power Control */
842 descriptor.hub.wHubCharacteristics |= 0x01;
844 /* Start the host controller. */
845 cmd = ehci_readl(&hcor->or_usbcmd);
847 * Philips, Intel, and maybe others need CMD_RUN before the
848 * root hub will detect new devices (why?); NEC doesn't
850 cmd &= ~(CMD_LRESET|CMD_IAAD|CMD_PSE|CMD_ASE|CMD_RESET);
852 ehci_writel(&hcor->or_usbcmd, cmd);
854 /* take control over the ports */
855 cmd = ehci_readl(&hcor->or_configflag);
857 ehci_writel(&hcor->or_configflag, cmd);
858 /* unblock posted write */
859 cmd = ehci_readl(&hcor->or_usbcmd);
861 reg = HC_VERSION(ehci_readl(&hccr->cr_capbase));
862 printf("USB EHCI %x.%02x\n", reg >> 8, reg & 0xff);
870 submit_bulk_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
874 if (usb_pipetype(pipe) != PIPE_BULK) {
875 debug("non-bulk pipe (type=%lu)", usb_pipetype(pipe));
878 return ehci_submit_async(dev, pipe, buffer, length, NULL);
882 submit_control_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
883 int length, struct devrequest *setup)
886 if (usb_pipetype(pipe) != PIPE_CONTROL) {
887 debug("non-control pipe (type=%lu)", usb_pipetype(pipe));
891 if (usb_pipedevice(pipe) == rootdev) {
893 dev->speed = USB_SPEED_HIGH;
894 return ehci_submit_root(dev, pipe, buffer, length, setup);
896 return ehci_submit_async(dev, pipe, buffer, length, setup);
900 submit_int_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
901 int length, int interval)
904 debug("dev=%p, pipe=%lu, buffer=%p, length=%d, interval=%d",
905 dev, pipe, buffer, length, interval);
906 return ehci_submit_async(dev, pipe, buffer, length, NULL);