1 /* ehci-msm.c - HSUSB Host Controller Driver Implementation
3 * Copyright (c) 2008-2010, Code Aurora Forum. All rights reserved.
5 * Partly derived from ehci-fsl.c and ehci-hcd.c
6 * Copyright (c) 2000-2004 by David Brownell
7 * Copyright (c) 2005 MontaVista Software
9 * All source code in this file is licensed under the following license except
12 * This program is free software; you can redistribute it and/or modify it
13 * under the terms of the GNU General Public License version 2 as published
14 * by the Free Software Foundation.
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
20 * See the GNU General Public License for more details.
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, you can find it at http://www.fsf.org
25 #include <linux/platform_device.h>
26 #include <linux/clk.h>
27 #include <linux/err.h>
28 #include <linux/pm_runtime.h>
30 #include <linux/usb/otg.h>
31 #include <linux/usb/msm_hsusb_hw.h>
33 #define MSM_USB_BASE (hcd->regs)
35 static struct otg_transceiver *otg;
38 * ehci_run defined in drivers/usb/host/ehci-hcd.c reset the controller and
39 * the configuration settings in ehci_msm_reset vanish after controller is
40 * reset. Resetting the controler in ehci_run seems to be un-necessary
41 * provided HCD reset the controller before calling ehci_run. Most of the HCD
42 * do but some are not. So this function is same as ehci_run but we don't
43 * reset the controller here.
45 static int ehci_msm_run(struct usb_hcd *hcd)
47 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
51 hcd->uses_new_polling = 1;
53 ehci_writel(ehci, ehci->periodic_dma, &ehci->regs->frame_list);
54 ehci_writel(ehci, (u32)ehci->async->qh_dma, &ehci->regs->async_next);
57 * hcc_params controls whether ehci->regs->segment must (!!!)
58 * be used; it constrains QH/ITD/SITD and QTD locations.
59 * pci_pool consistent memory always uses segment zero.
60 * streaming mappings for I/O buffers, like pci_map_single(),
61 * can return segments above 4GB, if the device allows.
63 * NOTE: the dma mask is visible through dma_supported(), so
64 * drivers can pass this info along ... like NETIF_F_HIGHDMA,
65 * Scsi_Host.highmem_io, and so forth. It's readonly to all
66 * host side drivers though.
68 hcc_params = ehci_readl(ehci, &ehci->caps->hcc_params);
69 if (HCC_64BIT_ADDR(hcc_params))
70 ehci_writel(ehci, 0, &ehci->regs->segment);
73 * Philips, Intel, and maybe others need CMD_RUN before the
74 * root hub will detect new devices (why?); NEC doesn't
76 ehci->command &= ~(CMD_LRESET|CMD_IAAD|CMD_PSE|CMD_ASE|CMD_RESET);
77 ehci->command |= CMD_RUN;
78 ehci_writel(ehci, ehci->command, &ehci->regs->command);
79 dbg_cmd(ehci, "init", ehci->command);
82 * Start, enabling full USB 2.0 functionality ... usb 1.1 devices
83 * are explicitly handed to companion controller(s), so no TT is
84 * involved with the root hub. (Except where one is integrated,
85 * and there's no companion controller unless maybe for USB OTG.)
87 * Turning on the CF flag will transfer ownership of all ports
88 * from the companions to the EHCI controller. If any of the
89 * companions are in the middle of a port reset at the time, it
90 * could cause trouble. Write-locking ehci_cf_port_reset_rwsem
91 * guarantees that no resets are in progress. After we set CF,
92 * a short delay lets the hardware catch up; new resets shouldn't
93 * be started before the port switching actions could complete.
95 down_write(&ehci_cf_port_reset_rwsem);
96 hcd->state = HC_STATE_RUNNING;
97 ehci_writel(ehci, FLAG_CF, &ehci->regs->configured_flag);
98 ehci_readl(ehci, &ehci->regs->command); /* unblock posted writes */
99 usleep_range(5000, 5500);
100 up_write(&ehci_cf_port_reset_rwsem);
101 ehci->last_periodic_enable = ktime_get_real();
103 temp = HC_VERSION(ehci_readl(ehci, &ehci->caps->hc_capbase));
105 "USB %x.%x started, EHCI %x.%02x%s\n",
106 ((ehci->sbrn & 0xf0)>>4), (ehci->sbrn & 0x0f),
107 temp >> 8, temp & 0xff,
108 ignore_oc ? ", overcurrent ignored" : "");
110 ehci_writel(ehci, INTR_MASK,
111 &ehci->regs->intr_enable); /* Turn On Interrupts */
113 /* GRR this is run-once init(), being done every time the HC starts.
114 * So long as they're part of class devices, we can't do it init()
115 * since the class device isn't created that early.
117 create_debug_files(ehci);
118 create_companion_file(ehci);
123 static int ehci_msm_reset(struct usb_hcd *hcd)
125 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
128 ehci->caps = USB_CAPLENGTH;
129 ehci->regs = USB_CAPLENGTH +
130 HC_LENGTH(ehci_readl(ehci, &ehci->caps->hc_capbase));
132 /* cache the data to minimize the chip reads*/
133 ehci->hcs_params = ehci_readl(ehci, &ehci->caps->hcs_params);
136 ehci->sbrn = HCD_USB2;
138 /* data structure init */
139 retval = ehci_init(hcd);
143 retval = ehci_reset(ehci);
147 /* bursts of unspecified length. */
148 writel(0, USB_AHBBURST);
149 /* Use the AHB transactor */
150 writel(0, USB_AHBMODE);
151 /* Disable streaming mode and select host mode */
152 writel(0x13, USB_USBMODE);
154 ehci_port_power(ehci, 1);
158 static struct hc_driver msm_hc_driver = {
159 .description = hcd_name,
160 .product_desc = "Qualcomm On-Chip EHCI Host Controller",
161 .hcd_priv_size = sizeof(struct ehci_hcd),
164 * generic hardware linkage
167 .flags = HCD_USB2 | HCD_MEMORY,
169 .reset = ehci_msm_reset,
170 .start = ehci_msm_run,
173 .shutdown = ehci_shutdown,
176 * managing i/o requests and associated device resources
178 .urb_enqueue = ehci_urb_enqueue,
179 .urb_dequeue = ehci_urb_dequeue,
180 .endpoint_disable = ehci_endpoint_disable,
181 .endpoint_reset = ehci_endpoint_reset,
182 .clear_tt_buffer_complete = ehci_clear_tt_buffer_complete,
187 .get_frame_number = ehci_get_frame,
192 .hub_status_data = ehci_hub_status_data,
193 .hub_control = ehci_hub_control,
194 .relinquish_port = ehci_relinquish_port,
195 .port_handed_over = ehci_port_handed_over,
200 .bus_suspend = ehci_bus_suspend,
201 .bus_resume = ehci_bus_resume,
204 static int ehci_msm_probe(struct platform_device *pdev)
207 struct resource *res;
210 dev_dbg(&pdev->dev, "ehci_msm proble\n");
212 hcd = usb_create_hcd(&msm_hc_driver, &pdev->dev, dev_name(&pdev->dev));
214 dev_err(&pdev->dev, "Unable to create HCD\n");
218 hcd->irq = platform_get_irq(pdev, 0);
220 dev_err(&pdev->dev, "Unable to get IRQ resource\n");
225 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
227 dev_err(&pdev->dev, "Unable to get memory resource\n");
232 hcd->rsrc_start = res->start;
233 hcd->rsrc_len = resource_size(res);
234 hcd->regs = ioremap(hcd->rsrc_start, hcd->rsrc_len);
236 dev_err(&pdev->dev, "ioremap failed\n");
242 * OTG driver takes care of PHY initialization, clock management,
243 * powering up VBUS, mapping of registers address space and power
246 otg = otg_get_transceiver();
248 dev_err(&pdev->dev, "unable to find transceiver\n");
253 ret = otg_set_host(otg, &hcd->self);
255 dev_err(&pdev->dev, "unable to register with transceiver\n");
256 goto put_transceiver;
259 device_init_wakeup(&pdev->dev, 1);
261 * OTG device parent of HCD takes care of putting
262 * hardware into low power mode.
264 pm_runtime_no_callbacks(&pdev->dev);
265 pm_runtime_enable(&pdev->dev);
270 otg_put_transceiver(otg);
279 static int __devexit ehci_msm_remove(struct platform_device *pdev)
281 struct usb_hcd *hcd = platform_get_drvdata(pdev);
283 device_init_wakeup(&pdev->dev, 0);
284 pm_runtime_disable(&pdev->dev);
285 pm_runtime_set_suspended(&pdev->dev);
287 otg_set_host(otg, NULL);
288 otg_put_transceiver(otg);
296 static int ehci_msm_pm_suspend(struct device *dev)
298 struct usb_hcd *hcd = dev_get_drvdata(dev);
299 bool wakeup = device_may_wakeup(dev);
301 dev_dbg(dev, "ehci-msm PM suspend\n");
304 * EHCI helper function has also the same check before manipulating
305 * port wakeup flags. We do check here the same condition before
306 * calling the same helper function to avoid bringing hardware
307 * from Low power mode when there is no need for adjusting port
310 if (hcd->self.root_hub->do_remote_wakeup && !wakeup) {
311 pm_runtime_resume(dev);
312 ehci_prepare_ports_for_controller_suspend(hcd_to_ehci(hcd),
319 static int ehci_msm_pm_resume(struct device *dev)
321 struct usb_hcd *hcd = dev_get_drvdata(dev);
323 dev_dbg(dev, "ehci-msm PM resume\n");
324 ehci_prepare_ports_for_controller_resume(hcd_to_ehci(hcd));
329 #define ehci_msm_pm_suspend NULL
330 #define ehci_msm_pm_resume NULL
333 static const struct dev_pm_ops ehci_msm_dev_pm_ops = {
334 .suspend = ehci_msm_pm_suspend,
335 .resume = ehci_msm_pm_resume,
338 static struct platform_driver ehci_msm_driver = {
339 .probe = ehci_msm_probe,
340 .remove = __devexit_p(ehci_msm_remove),
342 .name = "msm_hsusb_host",
343 .pm = &ehci_msm_dev_pm_ops,