2 * EHCI-compliant USB host controller driver for NVIDIA Tegra SoCs
4 * Copyright (C) 2010 Google, Inc.
5 * Copyright (C) 2009 - 2013 NVIDIA Corporation
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
19 #include <linux/clk.h>
20 #include <linux/clk/tegra.h>
21 #include <linux/dma-mapping.h>
22 #include <linux/err.h>
23 #include <linux/gpio.h>
25 #include <linux/irq.h>
26 #include <linux/module.h>
28 #include <linux/of_gpio.h>
29 #include <linux/platform_device.h>
30 #include <linux/platform_data/tegra_usb.h>
31 #include <linux/pm_runtime.h>
32 #include <linux/slab.h>
33 #include <linux/usb/ehci_def.h>
34 #include <linux/usb/tegra_usb_phy.h>
35 #include <linux/usb.h>
36 #include <linux/usb/hcd.h>
37 #include <linux/usb/otg.h>
41 #define TEGRA_USB_BASE 0xC5000000
42 #define TEGRA_USB2_BASE 0xC5004000
43 #define TEGRA_USB3_BASE 0xC5008000
45 #define PORT_WAKE_BITS (PORT_WKOC_E|PORT_WKDISC_E|PORT_WKCONN_E)
47 #define TEGRA_USB_DMA_ALIGN 32
49 #define DRIVER_DESC "Tegra EHCI driver"
50 #define DRV_NAME "tegra-ehci"
52 static struct hc_driver __read_mostly tegra_ehci_hc_driver;
54 static int (*orig_hub_control)(struct usb_hcd *hcd,
55 u16 typeReq, u16 wValue, u16 wIndex,
56 char *buf, u16 wLength);
58 struct tegra_ehci_hcd {
59 struct tegra_usb_phy *phy;
62 bool needs_double_reset;
63 enum tegra_usb_phy_port_speed port_speed;
66 static int tegra_ehci_internal_port_reset(
67 struct ehci_hcd *ehci,
68 u32 __iomem *portsc_reg
77 spin_lock_irqsave(&ehci->lock, flags);
78 saved_usbintr = ehci_readl(ehci, &ehci->regs->intr_enable);
79 /* disable USB interrupt */
80 ehci_writel(ehci, 0, &ehci->regs->intr_enable);
81 spin_unlock_irqrestore(&ehci->lock, flags);
84 * Here we have to do Port Reset at most twice for
85 * Port Enable bit to be set.
87 for (i = 0; i < 2; i++) {
88 temp = ehci_readl(ehci, portsc_reg);
90 ehci_writel(ehci, temp, portsc_reg);
93 ehci_writel(ehci, temp, portsc_reg);
99 * Up to this point, Port Enable bit is
100 * expected to be set after 2 ms waiting.
101 * USB1 usually takes extra 45 ms, for safety,
102 * we take 100 ms as timeout.
104 temp = ehci_readl(ehci, portsc_reg);
105 } while (!(temp & PORT_PE) && tries--);
113 * Clear Connect Status Change bit if it's set.
114 * We can't clear PORT_PEC. It will also cause PORT_PE to be cleared.
117 ehci_writel(ehci, PORT_CSC, portsc_reg);
120 * Write to clear any interrupt status bits that might be set
123 temp = ehci_readl(ehci, &ehci->regs->status);
124 ehci_writel(ehci, temp, &ehci->regs->status);
126 /* restore original interrupt enable bits */
127 ehci_writel(ehci, saved_usbintr, &ehci->regs->intr_enable);
131 static int tegra_ehci_hub_control(
140 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
141 struct tegra_ehci_hcd *tegra = (struct tegra_ehci_hcd *)ehci->priv;
142 u32 __iomem *status_reg;
147 status_reg = &ehci->regs->port_status[(wIndex & 0xff) - 1];
149 spin_lock_irqsave(&ehci->lock, flags);
151 if (typeReq == GetPortStatus) {
152 temp = ehci_readl(ehci, status_reg);
153 if (tegra->port_resuming && !(temp & PORT_SUSPEND)) {
154 /* Resume completed, re-enable disconnect detection */
155 tegra->port_resuming = 0;
156 tegra_usb_phy_postresume(hcd->phy);
160 else if (typeReq == SetPortFeature && wValue == USB_PORT_FEAT_SUSPEND) {
161 temp = ehci_readl(ehci, status_reg);
162 if ((temp & PORT_PE) == 0 || (temp & PORT_RESET) != 0) {
167 temp &= ~(PORT_RWC_BITS | PORT_WKCONN_E);
168 temp |= PORT_WKDISC_E | PORT_WKOC_E;
169 ehci_writel(ehci, temp | PORT_SUSPEND, status_reg);
172 * If a transaction is in progress, there may be a delay in
173 * suspending the port. Poll until the port is suspended.
175 if (ehci_handshake(ehci, status_reg, PORT_SUSPEND,
177 pr_err("%s: timeout waiting for SUSPEND\n", __func__);
179 set_bit((wIndex & 0xff) - 1, &ehci->suspended_ports);
183 /* For USB1 port we need to issue Port Reset twice internally */
184 if (tegra->needs_double_reset &&
185 (typeReq == SetPortFeature && wValue == USB_PORT_FEAT_RESET)) {
186 spin_unlock_irqrestore(&ehci->lock, flags);
187 return tegra_ehci_internal_port_reset(ehci, status_reg);
191 * Tegra host controller will time the resume operation to clear the bit
192 * when the port control state switches to HS or FS Idle. This behavior
193 * is different from EHCI where the host controller driver is required
194 * to set this bit to a zero after the resume duration is timed in the
197 else if (typeReq == ClearPortFeature &&
198 wValue == USB_PORT_FEAT_SUSPEND) {
199 temp = ehci_readl(ehci, status_reg);
200 if ((temp & PORT_RESET) || !(temp & PORT_PE)) {
205 if (!(temp & PORT_SUSPEND))
208 /* Disable disconnect detection during port resume */
209 tegra_usb_phy_preresume(hcd->phy);
211 ehci->reset_done[wIndex-1] = jiffies + msecs_to_jiffies(25);
213 temp &= ~(PORT_RWC_BITS | PORT_WAKE_BITS);
214 /* start resume signalling */
215 ehci_writel(ehci, temp | PORT_RESUME, status_reg);
216 set_bit(wIndex-1, &ehci->resuming_ports);
218 spin_unlock_irqrestore(&ehci->lock, flags);
220 spin_lock_irqsave(&ehci->lock, flags);
222 /* Poll until the controller clears RESUME and SUSPEND */
223 if (ehci_handshake(ehci, status_reg, PORT_RESUME, 0, 2000))
224 pr_err("%s: timeout waiting for RESUME\n", __func__);
225 if (ehci_handshake(ehci, status_reg, PORT_SUSPEND, 0, 2000))
226 pr_err("%s: timeout waiting for SUSPEND\n", __func__);
228 ehci->reset_done[wIndex-1] = 0;
229 clear_bit(wIndex-1, &ehci->resuming_ports);
231 tegra->port_resuming = 1;
235 spin_unlock_irqrestore(&ehci->lock, flags);
237 /* Handle the hub control events here */
238 return orig_hub_control(hcd, typeReq, wValue, wIndex, buf, wLength);
241 spin_unlock_irqrestore(&ehci->lock, flags);
245 struct dma_aligned_buffer {
247 void *old_xfer_buffer;
251 static void free_dma_aligned_buffer(struct urb *urb)
253 struct dma_aligned_buffer *temp;
255 if (!(urb->transfer_flags & URB_ALIGNED_TEMP_BUFFER))
258 temp = container_of(urb->transfer_buffer,
259 struct dma_aligned_buffer, data);
261 if (usb_urb_dir_in(urb))
262 memcpy(temp->old_xfer_buffer, temp->data,
263 urb->transfer_buffer_length);
264 urb->transfer_buffer = temp->old_xfer_buffer;
265 kfree(temp->kmalloc_ptr);
267 urb->transfer_flags &= ~URB_ALIGNED_TEMP_BUFFER;
270 static int alloc_dma_aligned_buffer(struct urb *urb, gfp_t mem_flags)
272 struct dma_aligned_buffer *temp, *kmalloc_ptr;
275 if (urb->num_sgs || urb->sg ||
276 urb->transfer_buffer_length == 0 ||
277 !((uintptr_t)urb->transfer_buffer & (TEGRA_USB_DMA_ALIGN - 1)))
280 /* Allocate a buffer with enough padding for alignment */
281 kmalloc_size = urb->transfer_buffer_length +
282 sizeof(struct dma_aligned_buffer) + TEGRA_USB_DMA_ALIGN - 1;
284 kmalloc_ptr = kmalloc(kmalloc_size, mem_flags);
288 /* Position our struct dma_aligned_buffer such that data is aligned */
289 temp = PTR_ALIGN(kmalloc_ptr + 1, TEGRA_USB_DMA_ALIGN) - 1;
290 temp->kmalloc_ptr = kmalloc_ptr;
291 temp->old_xfer_buffer = urb->transfer_buffer;
292 if (usb_urb_dir_out(urb))
293 memcpy(temp->data, urb->transfer_buffer,
294 urb->transfer_buffer_length);
295 urb->transfer_buffer = temp->data;
297 urb->transfer_flags |= URB_ALIGNED_TEMP_BUFFER;
302 static int tegra_ehci_map_urb_for_dma(struct usb_hcd *hcd, struct urb *urb,
307 ret = alloc_dma_aligned_buffer(urb, mem_flags);
311 ret = usb_hcd_map_urb_for_dma(hcd, urb, mem_flags);
313 free_dma_aligned_buffer(urb);
318 static void tegra_ehci_unmap_urb_for_dma(struct usb_hcd *hcd, struct urb *urb)
320 usb_hcd_unmap_urb_for_dma(hcd, urb);
321 free_dma_aligned_buffer(urb);
324 static int tegra_ehci_probe(struct platform_device *pdev)
326 struct resource *res;
328 struct ehci_hcd *ehci;
329 struct tegra_ehci_hcd *tegra;
330 struct tegra_ehci_platform_data *pdata;
333 struct device_node *np_phy;
334 struct usb_phy *u_phy;
336 pdata = pdev->dev.platform_data;
338 dev_err(&pdev->dev, "Platform data missing\n");
342 /* Right now device-tree probed devices don't get dma_mask set.
343 * Since shared usb code relies on it, set it here for now.
344 * Once we have dma capability bindings this can go away.
346 if (!pdev->dev.dma_mask)
347 pdev->dev.dma_mask = &pdev->dev.coherent_dma_mask;
348 if (!pdev->dev.coherent_dma_mask)
349 pdev->dev.coherent_dma_mask = DMA_BIT_MASK(32);
351 hcd = usb_create_hcd(&tegra_ehci_hc_driver, &pdev->dev,
352 dev_name(&pdev->dev));
354 dev_err(&pdev->dev, "Unable to create HCD\n");
357 platform_set_drvdata(pdev, hcd);
358 ehci = hcd_to_ehci(hcd);
359 tegra = (struct tegra_ehci_hcd *)ehci->priv;
363 tegra->clk = devm_clk_get(&pdev->dev, NULL);
364 if (IS_ERR(tegra->clk)) {
365 dev_err(&pdev->dev, "Can't get ehci clock\n");
366 err = PTR_ERR(tegra->clk);
367 goto cleanup_hcd_create;
370 err = clk_prepare_enable(tegra->clk);
372 goto cleanup_clk_get;
374 tegra_periph_reset_assert(tegra->clk);
376 tegra_periph_reset_deassert(tegra->clk);
378 np_phy = of_parse_phandle(pdev->dev.of_node, "nvidia,phy", 0);
384 u_phy = tegra_usb_get_phy(np_phy);
386 err = PTR_ERR(u_phy);
391 tegra->needs_double_reset = of_property_read_bool(pdev->dev.of_node,
392 "nvidia,needs-double-reset");
394 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
396 dev_err(&pdev->dev, "Failed to get I/O memory\n");
400 hcd->rsrc_start = res->start;
401 hcd->rsrc_len = resource_size(res);
402 hcd->regs = devm_ioremap(&pdev->dev, res->start, resource_size(res));
404 dev_err(&pdev->dev, "Failed to remap I/O memory\n");
408 ehci->caps = hcd->regs + 0x100;
410 err = usb_phy_init(hcd->phy);
412 dev_err(&pdev->dev, "Failed to initialize phy\n");
416 u_phy->otg = devm_kzalloc(&pdev->dev, sizeof(struct usb_otg),
419 dev_err(&pdev->dev, "Failed to alloc memory for otg\n");
423 u_phy->otg->host = hcd_to_bus(hcd);
425 err = usb_phy_set_suspend(hcd->phy, 0);
427 dev_err(&pdev->dev, "Failed to power on the phy\n");
431 irq = platform_get_irq(pdev, 0);
433 dev_err(&pdev->dev, "Failed to get IRQ\n");
438 otg_set_host(u_phy->otg, &hcd->self);
440 err = usb_add_hcd(hcd, irq, IRQF_SHARED);
442 dev_err(&pdev->dev, "Failed to add USB HCD\n");
443 goto cleanup_otg_set_host;
448 cleanup_otg_set_host:
449 otg_set_host(u_phy->otg, NULL);
451 usb_phy_shutdown(hcd->phy);
453 clk_disable_unprepare(tegra->clk);
461 static int tegra_ehci_remove(struct platform_device *pdev)
463 struct usb_hcd *hcd = platform_get_drvdata(pdev);
464 struct tegra_ehci_hcd *tegra =
465 (struct tegra_ehci_hcd *)hcd_to_ehci(hcd)->priv;
467 otg_set_host(hcd->phy->otg, NULL);
469 usb_phy_shutdown(hcd->phy);
473 clk_disable_unprepare(tegra->clk);
478 static void tegra_ehci_hcd_shutdown(struct platform_device *pdev)
480 struct usb_hcd *hcd = platform_get_drvdata(pdev);
482 if (hcd->driver->shutdown)
483 hcd->driver->shutdown(hcd);
486 static struct of_device_id tegra_ehci_of_match[] = {
487 { .compatible = "nvidia,tegra20-ehci", },
491 static struct platform_driver tegra_ehci_driver = {
492 .probe = tegra_ehci_probe,
493 .remove = tegra_ehci_remove,
494 .shutdown = tegra_ehci_hcd_shutdown,
497 .of_match_table = tegra_ehci_of_match,
501 static const struct ehci_driver_overrides tegra_overrides __initconst = {
502 .extra_priv_size = sizeof(struct tegra_ehci_hcd),
505 static int __init ehci_tegra_init(void)
510 pr_info(DRV_NAME ": " DRIVER_DESC "\n");
512 ehci_init_driver(&tegra_ehci_hc_driver, &tegra_overrides);
515 * The Tegra HW has some unusual quirks, which require Tegra-specific
516 * workarounds. We override certain hc_driver functions here to
517 * achieve that. We explicitly do not enhance ehci_driver_overrides to
518 * allow this more easily, since this is an unusual case, and we don't
519 * want to encourage others to override these functions by making it
523 orig_hub_control = tegra_ehci_hc_driver.hub_control;
525 tegra_ehci_hc_driver.map_urb_for_dma = tegra_ehci_map_urb_for_dma;
526 tegra_ehci_hc_driver.unmap_urb_for_dma = tegra_ehci_unmap_urb_for_dma;
527 tegra_ehci_hc_driver.hub_control = tegra_ehci_hub_control;
529 return platform_driver_register(&tegra_ehci_driver);
531 module_init(ehci_tegra_init);
533 static void __exit ehci_tegra_cleanup(void)
535 platform_driver_unregister(&tegra_ehci_driver);
537 module_exit(ehci_tegra_cleanup);
539 MODULE_DESCRIPTION(DRIVER_DESC);
540 MODULE_LICENSE("GPL");
541 MODULE_ALIAS("platform:" DRV_NAME);
542 MODULE_DEVICE_TABLE(of, tegra_ehci_of_match);