drivers/usb/host/isp1760-hcd.c

   1 /*
   2  * Driver for the NXP ISP1760 chip
   3  *
   4  * However, the code might contain some bugs. What doesn't work for sure is:
   5  * - ISO
   6  * - OTG
   7  e The interrupt line is configured as active low, level.
   8  *
   9  * (c) 2007 Sebastian Siewior <bigeasy@linutronix.de>
  10  *
  11  */
  12 #include <linux/module.h>
  13 #include <linux/kernel.h>
  14 #include <linux/slab.h>
  15 #include <linux/list.h>
  16 #include <linux/usb.h>
  17 #include <linux/usb/hcd.h>
  18 #include <linux/debugfs.h>
  19 #include <linux/uaccess.h>
  20 #include <linux/io.h>
  21 #include <linux/mm.h>
  22 #include <asm/unaligned.h>
  23 #include <asm/cacheflush.h>
  24
  25 #include "isp1760-hcd.h"
  26
  27 static struct kmem_cache *qtd_cachep;
  28 static struct kmem_cache *qh_cachep;
  29
  30 struct isp1760_hcd {
  31         u32 hcs_params;
  32         spinlock_t              lock;
  33         struct inter_packet_info atl_ints[32];
  34         struct inter_packet_info int_ints[32];
  35         struct memory_chunk memory_pool[BLOCKS];
  36         u32 atl_queued;
  37
  38         /* periodic schedule support */
  39 #define DEFAULT_I_TDPS          1024
  40         unsigned                periodic_size;
  41         unsigned                i_thresh;
  42         unsigned long           reset_done;
  43         unsigned long           next_statechange;
  44         unsigned int            devflags;
  45 };
  46
  47 static inline struct isp1760_hcd *hcd_to_priv(struct usb_hcd *hcd)
  48 {
  49         return (struct isp1760_hcd *) (hcd->hcd_priv);
  50 }
  51 static inline struct usb_hcd *priv_to_hcd(struct isp1760_hcd *priv)
  52 {
  53         return container_of((void *) priv, struct usb_hcd, hcd_priv);
  54 }
  55
  56 /* Section 2.2 Host Controller Capability Registers */
  57 #define HC_LENGTH(p)            (((p)>>00)&0x00ff)      /* bits 7:0 */
  58 #define HC_VERSION(p)           (((p)>>16)&0xffff)      /* bits 31:16 */
  59 #define HCS_INDICATOR(p)        ((p)&(1 << 16)) /* true: has port indicators */
  60 #define HCS_PPC(p)              ((p)&(1 << 4))  /* true: port power control */
  61 #define HCS_N_PORTS(p)          (((p)>>0)&0xf)  /* bits 3:0, ports on HC */
  62 #define HCC_ISOC_CACHE(p)       ((p)&(1 << 7))  /* true: can cache isoc frame */
  63 #define HCC_ISOC_THRES(p)       (((p)>>4)&0x7)  /* bits 6:4, uframes cached */
  64
  65 /* Section 2.3 Host Controller Operational Registers */
  66 #define CMD_LRESET      (1<<7)          /* partial reset (no ports, etc) */
  67 #define CMD_RESET       (1<<1)          /* reset HC not bus */
  68 #define CMD_RUN         (1<<0)          /* start/stop HC */
  69 #define STS_PCD         (1<<2)          /* port change detect */
  70 #define FLAG_CF         (1<<0)          /* true: we'll support "high speed" */
  71
  72 #define PORT_OWNER      (1<<13)         /* true: companion hc owns this port */
  73 #define PORT_POWER      (1<<12)         /* true: has power (see PPC) */
  74 #define PORT_USB11(x) (((x) & (3 << 10)) == (1 << 10))  /* USB 1.1 device */
  75 #define PORT_RESET      (1<<8)          /* reset port */
  76 #define PORT_SUSPEND    (1<<7)          /* suspend port */
  77 #define PORT_RESUME     (1<<6)          /* resume it */
  78 #define PORT_PE         (1<<2)          /* port enable */
  79 #define PORT_CSC        (1<<1)          /* connect status change */
  80 #define PORT_CONNECT    (1<<0)          /* device connected */
  81 #define PORT_RWC_BITS   (PORT_CSC)
  82
  83 struct isp1760_qtd {
  84         struct isp1760_qtd *hw_next;
  85         u8 packet_type;
  86         u8 toggle;
  87
  88         void *data_buffer;
  89         /* the rest is HCD-private */
  90         struct list_head qtd_list;
  91         struct urb *urb;
  92         size_t length;
  93
  94         /* isp special*/
  95         u32 status;
  96 #define URB_COMPLETE_NOTIFY     (1 << 0)
  97 #define URB_ENQUEUED            (1 << 1)
  98 #define URB_TYPE_ATL            (1 << 2)
  99 #define URB_TYPE_INT            (1 << 3)
 100 };
 101
 102 struct isp1760_qh {
 103         /* first part defined by EHCI spec */
 104         struct list_head qtd_list;
 105         struct isp1760_hcd *priv;
 106
 107         /* periodic schedule info */
 108         unsigned short period;          /* polling interval */
 109         struct usb_device *dev;
 110
 111         u32 toggle;
 112         u32 ping;
 113 };
 114
 115 #define ehci_port_speed(priv, portsc) USB_PORT_STAT_HIGH_SPEED
 116
 117 /*
 118  * Access functions for isp176x registers (addresses 0..0x03FF).
 119  */
 120 static u32 reg_read32(void __iomem *base, u32 reg)
 121 {
 122         return readl(base + reg);
 123 }
 124
 125 static void reg_write32(void __iomem *base, u32 reg, u32 val)
 126 {
 127         writel(val, base + reg);
 128 }
 129
 130 /*
 131  * Access functions for isp176x memory (offset >= 0x0400).
 132  *
 133  * bank_reads8() reads memory locations prefetched by an earlier write to
 134  * HC_MEMORY_REG (see isp176x datasheet). Unless you want to do fancy multi-
 135  * bank optimizations, you should use the more generic mem_reads8() below.
 136  *
 137  * For access to ptd memory, use the specialized ptd_read() and ptd_write()
 138  * below.
 139  *
 140  * These functions copy via MMIO data to/from the device. memcpy_{to|from}io()
 141  * doesn't quite work because some people have to enforce 32-bit access
 142  */
 143 static void bank_reads8(void __iomem *src_base, u32 src_offset, u32 bank_addr,
 144                                                         __u32 *dst, u32 bytes)
 145 {
 146         __u32 __iomem *src;
 147         u32 val;
 148         __u8 *src_byteptr;
 149         __u8 *dst_byteptr;
 150
 151         src = src_base + (bank_addr | src_offset);
 152
 153         if (src_offset < PAYLOAD_OFFSET) {
 154                 while (bytes >= 4) {
 155                         *dst = le32_to_cpu(__raw_readl(src));
 156                         bytes -= 4;
 157                         src++;
 158                         dst++;
 159                 }
 160         } else {
 161                 while (bytes >= 4) {
 162                         *dst = __raw_readl(src);
 163                         bytes -= 4;
 164                         src++;
 165                         dst++;
 166                 }
 167         }
 168
 169         if (!bytes)
 170                 return;
 171
 172         /* in case we have 3, 2 or 1 by left. The dst buffer may not be fully
 173          * allocated.
 174          */
 175         if (src_offset < PAYLOAD_OFFSET)
 176                 val = le32_to_cpu(__raw_readl(src));
 177         else
 178                 val = __raw_readl(src);
 179
 180         dst_byteptr = (void *) dst;
 181         src_byteptr = (void *) &val;
 182         while (bytes > 0) {
 183                 *dst_byteptr = *src_byteptr;
 184                 dst_byteptr++;
 185                 src_byteptr++;
 186                 bytes--;
 187         }
 188 }
 189
 190 static void mem_reads8(void __iomem *src_base, u32 src_offset, void *dst,
 191                                                                 u32 bytes)
 192 {
 193         reg_write32(src_base, HC_MEMORY_REG, src_offset + ISP_BANK(0));
 194         ndelay(90);
 195         bank_reads8(src_base, src_offset, ISP_BANK(0), dst, bytes);
 196 }
 197
 198 static void mem_writes8(void __iomem *dst_base, u32 dst_offset,
 199                                                 __u32 const *src, u32 bytes)
 200 {
 201         __u32 __iomem *dst;
 202
 203         dst = dst_base + dst_offset;
 204
 205         if (dst_offset < PAYLOAD_OFFSET) {
 206                 while (bytes >= 4) {
 207                         __raw_writel(cpu_to_le32(*src), dst);
 208                         bytes -= 4;
 209                         src++;
 210                         dst++;
 211                 }
 212         } else {
 213                 while (bytes >= 4) {
 214                         __raw_writel(*src, dst);
 215                         bytes -= 4;
 216                         src++;
 217                         dst++;
 218                 }
 219         }
 220
 221         if (!bytes)
 222                 return;
 223         /* in case we have 3, 2 or 1 bytes left. The buffer is allocated and the
 224          * extra bytes should not be read by the HW.
 225          */
 226
 227         if (dst_offset < PAYLOAD_OFFSET)
 228                 __raw_writel(cpu_to_le32(*src), dst);
 229         else
 230                 __raw_writel(*src, dst);
 231 }
 232
 233 /*
 234  * Read and write ptds. 'ptd_offset' should be one of ISO_PTD_OFFSET,
 235  * INT_PTD_OFFSET, and ATL_PTD_OFFSET. 'slot' should be less than 32.
 236  */
 237 static void ptd_read(void __iomem *base, u32 ptd_offset, u32 slot,
 238                                                                 struct ptd *ptd)
 239 {
 240         reg_write32(base, HC_MEMORY_REG,
 241                                 ISP_BANK(0) + ptd_offset + slot*sizeof(*ptd));
 242         ndelay(90);
 243         bank_reads8(base, ptd_offset + slot*sizeof(*ptd), ISP_BANK(0),
 244                                                 (void *) ptd, sizeof(*ptd));
 245 }
 246
 247 static void ptd_write(void __iomem *base, u32 ptd_offset, u32 slot,
 248                                                                 struct ptd *ptd)
 249 {
 250         mem_writes8(base, ptd_offset + slot*sizeof(*ptd) + sizeof(ptd->dw0),
 251                                                 &ptd->dw1, 7*sizeof(ptd->dw1));
 252         /* Make sure dw0 gets written last (after other dw's and after payload)
 253            since it contains the enable bit */
 254         wmb();
 255         mem_writes8(base, ptd_offset + slot*sizeof(*ptd), &ptd->dw0,
 256                                                         sizeof(ptd->dw0));
 257 }
 258
 259
 260 /* memory management of the 60kb on the chip from 0x1000 to 0xffff */
 261 static void init_memory(struct isp1760_hcd *priv)
 262 {
 263         int i;
 264         u32 payload;
 265
 266         payload = 0x1000;
 267         for (i = 0; i < BLOCK_1_NUM; i++) {
 268                 priv->memory_pool[i].start = payload;
 269                 priv->memory_pool[i].size = BLOCK_1_SIZE;
 270                 priv->memory_pool[i].free = 1;
 271                 payload += priv->memory_pool[i].size;
 272         }
 273
 274
 275         for (i = BLOCK_1_NUM; i < BLOCK_1_NUM + BLOCK_2_NUM; i++) {
 276                 priv->memory_pool[i].start = payload;
 277                 priv->memory_pool[i].size = BLOCK_2_SIZE;
 278                 priv->memory_pool[i].free = 1;
 279                 payload += priv->memory_pool[i].size;
 280         }
 281
 282
 283         for (i = BLOCK_1_NUM + BLOCK_2_NUM; i < BLOCKS; i++) {
 284                 priv->memory_pool[i].start = payload;
 285                 priv->memory_pool[i].size = BLOCK_3_SIZE;
 286                 priv->memory_pool[i].free = 1;
 287                 payload += priv->memory_pool[i].size;
 288         }
 289
 290         BUG_ON(payload - priv->memory_pool[i - 1].size > PAYLOAD_SIZE);
 291 }
 292
 293 static u32 alloc_mem(struct isp1760_hcd *priv, u32 size)
 294 {
 295         int i;
 296
 297         if (!size)
 298                 return ISP1760_NULL_POINTER;
 299
 300         for (i = 0; i < BLOCKS; i++) {
 301                 if (priv->memory_pool[i].size >= size &&
 302                                 priv->memory_pool[i].free) {
 303
 304                         priv->memory_pool[i].free = 0;
 305                         return priv->memory_pool[i].start;
 306                 }
 307         }
 308
 309         printk(KERN_ERR "ISP1760 MEM: can not allocate %d bytes of memory\n",
 310                         size);
 311         printk(KERN_ERR "Current memory map:\n");
 312         for (i = 0; i < BLOCKS; i++) {
 313                 printk(KERN_ERR "Pool %2d size %4d status: %d\n",
 314                                 i, priv->memory_pool[i].size,
 315                                 priv->memory_pool[i].free);
 316         }
 317         /* XXX maybe -ENOMEM could be possible */
 318         BUG();
 319         return 0;
 320 }
 321
 322 static void free_mem(struct isp1760_hcd *priv, u32 mem)
 323 {
 324         int i;
 325
 326         if (mem == ISP1760_NULL_POINTER)
 327                 return;
 328
 329         for (i = 0; i < BLOCKS; i++) {
 330                 if (priv->memory_pool[i].start == mem) {
 331
 332                         BUG_ON(priv->memory_pool[i].free);
 333
 334                         priv->memory_pool[i].free = 1;
 335                         return ;
 336                 }
 337         }
 338
 339         printk(KERN_ERR "Trying to free not-here-allocated memory :%08x\n",
 340                         mem);
 341         BUG();
 342 }
 343
 344 static void isp1760_init_regs(struct usb_hcd *hcd)
 345 {
 346         reg_write32(hcd->regs, HC_BUFFER_STATUS_REG, 0);
 347         reg_write32(hcd->regs, HC_ATL_PTD_SKIPMAP_REG, NO_TRANSFER_ACTIVE);
 348         reg_write32(hcd->regs, HC_INT_PTD_SKIPMAP_REG, NO_TRANSFER_ACTIVE);
 349         reg_write32(hcd->regs, HC_ISO_PTD_SKIPMAP_REG, NO_TRANSFER_ACTIVE);
 350
 351         reg_write32(hcd->regs, HC_ATL_PTD_DONEMAP_REG, ~NO_TRANSFER_ACTIVE);
 352         reg_write32(hcd->regs, HC_INT_PTD_DONEMAP_REG, ~NO_TRANSFER_ACTIVE);
 353         reg_write32(hcd->regs, HC_ISO_PTD_DONEMAP_REG, ~NO_TRANSFER_ACTIVE);
 354 }
 355
 356 static int handshake(struct usb_hcd *hcd, u32 reg,
 357                       u32 mask, u32 done, int usec)
 358 {
 359         u32 result;
 360
 361         do {
 362                 result = reg_read32(hcd->regs, reg);
 363                 if (result == ~0)
 364                         return -ENODEV;
 365                 result &= mask;
 366                 if (result == done)
 367                         return 0;
 368                 udelay(1);
 369                 usec--;
 370         } while (usec > 0);
 371         return -ETIMEDOUT;
 372 }
 373
 374 /* reset a non-running (STS_HALT == 1) controller */
 375 static int ehci_reset(struct isp1760_hcd *priv)
 376 {
 377         int retval;
 378         struct usb_hcd *hcd = priv_to_hcd(priv);
 379         u32 command = reg_read32(hcd->regs, HC_USBCMD);
 380
 381         command |= CMD_RESET;
 382         reg_write32(hcd->regs, HC_USBCMD, command);
 383         hcd->state = HC_STATE_HALT;
 384         priv->next_statechange = jiffies;
 385         retval = handshake(hcd, HC_USBCMD,
 386                             CMD_RESET, 0, 250 * 1000);
 387         return retval;
 388 }
 389
 390 static void qh_destroy(struct isp1760_qh *qh)
 391 {
 392         BUG_ON(!list_empty(&qh->qtd_list));
 393         kmem_cache_free(qh_cachep, qh);
 394 }
 395
 396 static struct isp1760_qh *isp1760_qh_alloc(struct isp1760_hcd *priv,
 397                 gfp_t flags)
 398 {
 399         struct isp1760_qh *qh;
 400
 401         qh = kmem_cache_zalloc(qh_cachep, flags);
 402         if (!qh)
 403                 return qh;
 404
 405         INIT_LIST_HEAD(&qh->qtd_list);
 406         qh->priv = priv;
 407         return qh;
 408 }
 409
 410 /* magic numbers that can affect system performance */
 411 #define EHCI_TUNE_CERR          3       /* 0-3 qtd retries; 0 == don't stop */
 412 #define EHCI_TUNE_RL_HS         4       /* nak throttle; see 4.9 */
 413 #define EHCI_TUNE_RL_TT         0
 414 #define EHCI_TUNE_MULT_HS       1       /* 1-3 transactions/uframe; 4.10.3 */
 415 #define EHCI_TUNE_MULT_TT       1
 416 #define EHCI_TUNE_FLS           2       /* (small) 256 frame schedule */
 417
 418 /* one-time init, only for memory state */
 419 static int priv_init(struct usb_hcd *hcd)
 420 {
 421         struct isp1760_hcd              *priv = hcd_to_priv(hcd);
 422         u32                     hcc_params;
 423
 424         spin_lock_init(&priv->lock);
 425
 426         /*
 427          * hw default: 1K periodic list heads, one per frame.
 428          * periodic_size can shrink by USBCMD update if hcc_params allows.
 429          */
 430         priv->periodic_size = DEFAULT_I_TDPS;
 431
 432         /* controllers may cache some of the periodic schedule ... */
 433         hcc_params = reg_read32(hcd->regs, HC_HCCPARAMS);
 434         /* full frame cache */
 435         if (HCC_ISOC_CACHE(hcc_params))
 436                 priv->i_thresh = 8;
 437         else /* N microframes cached */
 438                 priv->i_thresh = 2 + HCC_ISOC_THRES(hcc_params);
 439
 440         return 0;
 441 }
 442
 443 static int isp1760_hc_setup(struct usb_hcd *hcd)
 444 {
 445         struct isp1760_hcd *priv = hcd_to_priv(hcd);
 446         int result;
 447         u32 scratch, hwmode;
 448
 449         /* Setup HW Mode Control: This assumes a level active-low interrupt */
 450         hwmode = HW_DATA_BUS_32BIT;
 451
 452         if (priv->devflags & ISP1760_FLAG_BUS_WIDTH_16)
 453                 hwmode &= ~HW_DATA_BUS_32BIT;
 454         if (priv->devflags & ISP1760_FLAG_ANALOG_OC)
 455                 hwmode |= HW_ANA_DIGI_OC;
 456         if (priv->devflags & ISP1760_FLAG_DACK_POL_HIGH)
 457                 hwmode |= HW_DACK_POL_HIGH;
 458         if (priv->devflags & ISP1760_FLAG_DREQ_POL_HIGH)
 459                 hwmode |= HW_DREQ_POL_HIGH;
 460         if (priv->devflags & ISP1760_FLAG_INTR_POL_HIGH)
 461                 hwmode |= HW_INTR_HIGH_ACT;
 462         if (priv->devflags & ISP1760_FLAG_INTR_EDGE_TRIG)
 463                 hwmode |= HW_INTR_EDGE_TRIG;
 464
 465         /*
 466          * We have to set this first in case we're in 16-bit mode.
 467          * Write it twice to ensure correct upper bits if switching
 468          * to 16-bit mode.
 469          */
 470         reg_write32(hcd->regs, HC_HW_MODE_CTRL, hwmode);
 471         reg_write32(hcd->regs, HC_HW_MODE_CTRL, hwmode);
 472
 473         reg_write32(hcd->regs, HC_SCRATCH_REG, 0xdeadbabe);
 474         /* Change bus pattern */
 475         scratch = reg_read32(hcd->regs, HC_CHIP_ID_REG);
 476         scratch = reg_read32(hcd->regs, HC_SCRATCH_REG);
 477         if (scratch != 0xdeadbabe) {
 478                 printk(KERN_ERR "ISP1760: Scratch test failed.\n");
 479                 return -ENODEV;
 480         }
 481
 482         /* pre reset */
 483         isp1760_init_regs(hcd);
 484
 485         /* reset */
 486         reg_write32(hcd->regs, HC_RESET_REG, SW_RESET_RESET_ALL);
 487         mdelay(100);
 488
 489         reg_write32(hcd->regs, HC_RESET_REG, SW_RESET_RESET_HC);
 490         mdelay(100);
 491
 492         result = ehci_reset(priv);
 493         if (result)
 494                 return result;
 495
 496         /* Step 11 passed */
 497
 498         isp1760_info(priv, "bus width: %d, oc: %s\n",
 499                            (priv->devflags & ISP1760_FLAG_BUS_WIDTH_16) ?
 500                            16 : 32, (priv->devflags & ISP1760_FLAG_ANALOG_OC) ?
 501                            "analog" : "digital");
 502
 503         /* ATL reset */
 504         reg_write32(hcd->regs, HC_HW_MODE_CTRL, hwmode | ALL_ATX_RESET);
 505         mdelay(10);
 506         reg_write32(hcd->regs, HC_HW_MODE_CTRL, hwmode);
 507
 508         reg_write32(hcd->regs, HC_INTERRUPT_REG, INTERRUPT_ENABLE_MASK);
 509         reg_write32(hcd->regs, HC_INTERRUPT_ENABLE, INTERRUPT_ENABLE_MASK);
 510
 511         /*
 512          * PORT 1 Control register of the ISP1760 is the OTG control
 513          * register on ISP1761. Since there is no OTG or device controller
 514          * support in this driver, we use port 1 as a "normal" USB host port on
 515          * both chips.
 516          */
 517         reg_write32(hcd->regs, HC_PORT1_CTRL, PORT1_POWER | PORT1_INIT2);
 518         mdelay(10);
 519
 520         priv->hcs_params = reg_read32(hcd->regs, HC_HCSPARAMS);
 521
 522         return priv_init(hcd);
 523 }
 524
 525 static void isp1760_init_maps(struct usb_hcd *hcd)
 526 {
 527         /*set last maps, for iso its only 1, else 32 tds bitmap*/
 528         reg_write32(hcd->regs, HC_ATL_PTD_LASTPTD_REG, 0x80000000);
 529         reg_write32(hcd->regs, HC_INT_PTD_LASTPTD_REG, 0x80000000);
 530         reg_write32(hcd->regs, HC_ISO_PTD_LASTPTD_REG, 0x00000001);
 531 }
 532
 533 static void isp1760_enable_interrupts(struct usb_hcd *hcd)
 534 {
 535         reg_write32(hcd->regs, HC_ATL_IRQ_MASK_AND_REG, 0);
 536         reg_write32(hcd->regs, HC_ATL_IRQ_MASK_OR_REG, 0);
 537         reg_write32(hcd->regs, HC_INT_IRQ_MASK_AND_REG, 0);
 538         reg_write32(hcd->regs, HC_INT_IRQ_MASK_OR_REG, 0);
 539         reg_write32(hcd->regs, HC_ISO_IRQ_MASK_AND_REG, 0);
 540         reg_write32(hcd->regs, HC_ISO_IRQ_MASK_OR_REG, 0xffffffff);
 541         /* step 23 passed */
 542 }
 543
 544 static int isp1760_run(struct usb_hcd *hcd)
 545 {
 546         struct isp1760_hcd *priv = hcd_to_priv(hcd);
 547         int retval;
 548         u32 temp;
 549         u32 command;
 550         u32 chipid;
 551
 552         hcd->uses_new_polling = 1;
 553
 554         hcd->state = HC_STATE_RUNNING;
 555         isp1760_enable_interrupts(hcd);
 556         temp = reg_read32(hcd->regs, HC_HW_MODE_CTRL);
 557         reg_write32(hcd->regs, HC_HW_MODE_CTRL, temp | HW_GLOBAL_INTR_EN);
 558
 559         command = reg_read32(hcd->regs, HC_USBCMD);
 560         command &= ~(CMD_LRESET|CMD_RESET);
 561         command |= CMD_RUN;
 562         reg_write32(hcd->regs, HC_USBCMD, command);
 563
 564         retval = handshake(hcd, HC_USBCMD, CMD_RUN, CMD_RUN,
 565                         250 * 1000);
 566         if (retval)
 567                 return retval;
 568
 569         /*
 570          * XXX
 571          * Spec says to write FLAG_CF as last config action, priv code grabs
 572          * the semaphore while doing so.
 573          */
 574         down_write(&ehci_cf_port_reset_rwsem);
 575         reg_write32(hcd->regs, HC_CONFIGFLAG, FLAG_CF);
 576
 577         retval = handshake(hcd, HC_CONFIGFLAG, FLAG_CF, FLAG_CF, 250 * 1000);
 578         up_write(&ehci_cf_port_reset_rwsem);
 579         if (retval)
 580                 return retval;
 581
 582         chipid = reg_read32(hcd->regs, HC_CHIP_ID_REG);
 583         isp1760_info(priv, "USB ISP %04x HW rev. %d started\n", chipid & 0xffff,
 584                         chipid >> 16);
 585
 586         /* PTD Register Init Part 2, Step 28 */
 587         /* enable INTs */
 588         isp1760_init_maps(hcd);
 589
 590         /* GRR this is run-once init(), being done every time the HC starts.
 591          * So long as they're part of class devices, we can't do it init()
 592          * since the class device isn't created that early.
 593          */
 594         return 0;
 595 }
 596
 597 static u32 base_to_chip(u32 base)
 598 {
 599         return ((base - 0x400) >> 3);
 600 }
 601
 602 static void transform_into_atl(struct isp1760_hcd *priv, struct isp1760_qh *qh,
 603                         struct isp1760_qtd *qtd, struct urb *urb,
 604                         u32 payload, struct ptd *ptd)
 605 {
 606         u32 maxpacket;
 607         u32 multi;
 608         u32 pid_code;
 609         u32 rl = RL_COUNTER;
 610         u32 nak = NAK_COUNTER;
 611
 612         memset(ptd, 0, sizeof(*ptd));
 613
 614         /* according to 3.6.2, max packet len can not be > 0x400 */
 615         maxpacket = usb_maxpacket(urb->dev, urb->pipe, usb_pipeout(urb->pipe));
 616         multi =  1 + ((maxpacket >> 11) & 0x3);
 617         maxpacket &= 0x7ff;
 618
 619         /* DW0 */
 620         ptd->dw0 = PTD_VALID;
 621         ptd->dw0 |= PTD_LENGTH(qtd->length);
 622         ptd->dw0 |= PTD_MAXPACKET(maxpacket);
 623         ptd->dw0 |= PTD_ENDPOINT(usb_pipeendpoint(urb->pipe));
 624         ptd->dw1 = usb_pipeendpoint(urb->pipe) >> 1;
 625
 626         /* DW1 */
 627         ptd->dw1 |= PTD_DEVICE_ADDR(usb_pipedevice(urb->pipe));
 628
 629         pid_code = qtd->packet_type;
 630         ptd->dw1 |= PTD_PID_TOKEN(pid_code);
 631
 632         if (usb_pipebulk(urb->pipe))
 633                 ptd->dw1 |= PTD_TRANS_BULK;
 634         else if  (usb_pipeint(urb->pipe))
 635                 ptd->dw1 |= PTD_TRANS_INT;
 636
 637         if (urb->dev->speed != USB_SPEED_HIGH) {
 638                 /* split transaction */
 639
 640                 ptd->dw1 |= PTD_TRANS_SPLIT;
 641                 if (urb->dev->speed == USB_SPEED_LOW)
 642                         ptd->dw1 |= PTD_SE_USB_LOSPEED;
 643
 644                 ptd->dw1 |= PTD_PORT_NUM(urb->dev->ttport);
 645                 ptd->dw1 |= PTD_HUB_NUM(urb->dev->tt->hub->devnum);
 646
 647                 /* SE bit for Split INT transfers */
 648                 if (usb_pipeint(urb->pipe) &&
 649                                 (urb->dev->speed == USB_SPEED_LOW))
 650                         ptd->dw1 |= 2 << 16;
 651
 652                 ptd->dw3 = 0;
 653                 rl = 0;
 654                 nak = 0;
 655         } else {
 656                 ptd->dw0 |= PTD_MULTI(multi);
 657                 if (usb_pipecontrol(urb->pipe) || usb_pipebulk(urb->pipe))
 658                         ptd->dw3 = qh->ping;
 659                 else
 660                         ptd->dw3 = 0;
 661         }
 662         /* DW2 */
 663         ptd->dw2 = 0;
 664         ptd->dw2 |= PTD_DATA_START_ADDR(base_to_chip(payload));
 665         ptd->dw2 |= PTD_RL_CNT(rl);
 666         ptd->dw3 |= PTD_NAC_CNT(nak);
 667
 668         /* DW3 */
 669         if (usb_pipecontrol(urb->pipe))
 670                 ptd->dw3 |= PTD_DATA_TOGGLE(qtd->toggle);
 671         else
 672                 ptd->dw3 |= qh->toggle;
 673
 674
 675         ptd->dw3 |= PTD_ACTIVE;
 676         /* Cerr */
 677         ptd->dw3 |= PTD_CERR(ERR_COUNTER);
 678 }
 679
 680 static void transform_add_int(struct isp1760_hcd *priv, struct isp1760_qh *qh,
 681                         struct isp1760_qtd *qtd, struct urb *urb,
 682                         u32 payload, struct ptd *ptd)
 683 {
 684         u32 maxpacket;
 685         u32 multi;
 686         u32 numberofusofs;
 687         u32 i;
 688         u32 usofmask, usof;
 689         u32 period;
 690
 691         maxpacket = usb_maxpacket(urb->dev, urb->pipe, usb_pipeout(urb->pipe));
 692         multi =  1 + ((maxpacket >> 11) & 0x3);
 693         maxpacket &= 0x7ff;
 694         /* length of the data per uframe */
 695         maxpacket = multi * maxpacket;
 696
 697         numberofusofs = urb->transfer_buffer_length / maxpacket;
 698         if (urb->transfer_buffer_length % maxpacket)
 699                 numberofusofs += 1;
 700
 701         usofmask = 1;
 702         usof = 0;
 703         for (i = 0; i < numberofusofs; i++) {
 704                 usof |= usofmask;
 705                 usofmask <<= 1;
 706         }
 707
 708         if (urb->dev->speed != USB_SPEED_HIGH) {
 709                 /* split */
 710                 ptd->dw5 = 0x1c;
 711
 712                 if (qh->period >= 32)
 713                         period = qh->period / 2;
 714                 else
 715                         period = qh->period;
 716
 717         } else {
 718
 719                 if (qh->period >= 8)
 720                         period = qh->period/8;
 721                 else
 722                         period = qh->period;
 723
 724                 if (period >= 32)
 725                         period  = 16;
 726
 727                 if (qh->period >= 8) {
 728                         /* millisecond period */
 729                         period = (period << 3);
 730                 } else {
 731                         /* usof based tranmsfers */
 732                         /* minimum 4 usofs */
 733                         usof = 0x11;
 734                 }
 735         }
 736
 737         ptd->dw2 |= period;
 738         ptd->dw4 = usof;
 739 }
 740
 741 static void transform_into_int(struct isp1760_hcd *priv, struct isp1760_qh *qh,
 742                         struct isp1760_qtd *qtd, struct urb *urb,
 743                         u32 payload, struct ptd *ptd)
 744 {
 745         transform_into_atl(priv, qh, qtd, urb, payload, ptd);
 746         transform_add_int(priv, qh, qtd, urb,  payload, ptd);
 747 }
 748
 749 static int qtd_fill(struct isp1760_qtd *qtd, void *databuffer, size_t len,
 750                 u32 token)
 751 {
 752         int count;
 753
 754         qtd->data_buffer = databuffer;
 755         qtd->packet_type = GET_QTD_TOKEN_TYPE(token);
 756         qtd->toggle = GET_DATA_TOGGLE(token);
 757
 758         if (len > HC_ATL_PL_SIZE)
 759                 count = HC_ATL_PL_SIZE;
 760         else
 761                 count = len;
 762
 763         qtd->length = count;
 764         return count;
 765 }
 766
 767 static int check_error(struct ptd *ptd)
 768 {
 769         int error = 0;
 770
 771         if (ptd->dw3 & DW3_HALT_BIT) {
 772                 error = -EPIPE;
 773
 774                 if (ptd->dw3 & DW3_ERROR_BIT)
 775                         pr_err("error bit is set in DW3\n");
 776         }
 777
 778         if (ptd->dw3 & DW3_QTD_ACTIVE) {
 779                 printk(KERN_ERR "transfer active bit is set DW3\n");
 780                 printk(KERN_ERR "nak counter: %d, rl: %d\n",
 781                                 (ptd->dw3 >> 19) & 0xf, (ptd->dw2 >> 25) & 0xf);
 782         }
 783
 784         return error;
 785 }
 786
 787 static void check_int_err_status(u32 dw4)
 788 {
 789         u32 i;
 790
 791         dw4 >>= 8;
 792
 793         for (i = 0; i < 8; i++) {
 794                 switch (dw4 & 0x7) {
 795                 case INT_UNDERRUN:
 796                         printk(KERN_ERR "ERROR: under run , %d\n", i);
 797                         break;
 798
 799                 case INT_EXACT:
 800                         printk(KERN_ERR "ERROR: transaction error, %d\n", i);
 801                         break;
 802
 803                 case INT_BABBLE:
 804                         printk(KERN_ERR "ERROR: babble error, %d\n", i);
 805                         break;
 806                 }
 807                 dw4 >>= 3;
 808         }
 809 }
 810
 811 static void enqueue_one_qtd(struct isp1760_qtd *qtd, struct isp1760_hcd *priv,
 812                 u32 payload)
 813 {
 814         u32 token;
 815         struct usb_hcd *hcd = priv_to_hcd(priv);
 816
 817         token = qtd->packet_type;
 818
 819         if (qtd->length && (qtd->length <= HC_ATL_PL_SIZE)) {
 820                 switch (token) {
 821                 case IN_PID:
 822                         break;
 823                 case OUT_PID:
 824                 case SETUP_PID:
 825                         mem_writes8(hcd->regs, payload, qtd->data_buffer,
 826                                                                 qtd->length);
 827                 }
 828         }
 829 }
 830
 831 static void enqueue_one_atl_qtd(u32 payload,
 832                 struct isp1760_hcd *priv, struct isp1760_qh *qh,
 833                 struct urb *urb, u32 slot, struct isp1760_qtd *qtd)
 834 {
 835         struct ptd ptd;
 836         struct usb_hcd *hcd = priv_to_hcd(priv);
 837
 838         transform_into_atl(priv, qh, qtd, urb, payload, &ptd);
 839         ptd_write(hcd->regs, ATL_PTD_OFFSET, slot, &ptd);
 840         enqueue_one_qtd(qtd, priv, payload);
 841
 842         priv->atl_ints[slot].urb = urb;
 843         priv->atl_ints[slot].qh = qh;
 844         priv->atl_ints[slot].qtd = qtd;
 845         priv->atl_ints[slot].data_buffer = qtd->data_buffer;
 846         priv->atl_ints[slot].payload = payload;
 847         qtd->status |= URB_ENQUEUED | URB_TYPE_ATL;
 848         qtd->status |= slot << 16;
 849 }
 850
 851 static void enqueue_one_int_qtd(u32 payload,
 852                 struct isp1760_hcd *priv, struct isp1760_qh *qh,
 853                 struct urb *urb, u32 slot,  struct isp1760_qtd *qtd)
 854 {
 855         struct ptd ptd;
 856         struct usb_hcd *hcd = priv_to_hcd(priv);
 857
 858         transform_into_int(priv, qh, qtd, urb, payload, &ptd);
 859         ptd_write(hcd->regs, INT_PTD_OFFSET, slot, &ptd);
 860         enqueue_one_qtd(qtd, priv, payload);
 861
 862         priv->int_ints[slot].urb = urb;
 863         priv->int_ints[slot].qh = qh;
 864         priv->int_ints[slot].qtd = qtd;
 865         priv->int_ints[slot].data_buffer = qtd->data_buffer;
 866         priv->int_ints[slot].payload = payload;
 867         qtd->status |= URB_ENQUEUED | URB_TYPE_INT;
 868         qtd->status |= slot << 16;
 869 }
 870
 871 static void enqueue_an_ATL_packet(struct usb_hcd *hcd, struct isp1760_qh *qh,
 872                                   struct isp1760_qtd *qtd)
 873 {
 874         struct isp1760_hcd *priv = hcd_to_priv(hcd);
 875         u32 skip_map, or_map;
 876         u32 queue_entry;
 877         u32 slot;
 878         u32 payload;
 879         u32 buffstatus;
 880
 881         /*
 882          * When this function is called from the interrupt handler to enqueue
 883          * a follow-up packet, the SKIP register gets written and read back
 884          * almost immediately. With ISP1761, this register requires a delay of
 885          * 195ns between a write and subsequent read (see section 15.1.1.3).
 886          */
 887         mmiowb();
 888         ndelay(195);
 889         skip_map = reg_read32(hcd->regs, HC_ATL_PTD_SKIPMAP_REG);
 890
 891         BUG_ON(!skip_map);
 892         slot = __ffs(skip_map);
 893         queue_entry = 1 << slot;
 894
 895         payload = alloc_mem(priv, qtd->length);
 896
 897         enqueue_one_atl_qtd(payload, priv, qh, qtd->urb, slot, qtd);
 898
 899         or_map = reg_read32(hcd->regs, HC_ATL_IRQ_MASK_OR_REG);
 900         or_map |= queue_entry;
 901         reg_write32(hcd->regs, HC_ATL_IRQ_MASK_OR_REG, or_map);
 902
 903         skip_map &= ~queue_entry;
 904         reg_write32(hcd->regs, HC_ATL_PTD_SKIPMAP_REG, skip_map);
 905
 906         priv->atl_queued++;
 907         if (priv->atl_queued == 2)
 908                 reg_write32(hcd->regs, HC_INTERRUPT_ENABLE,
 909                                 INTERRUPT_ENABLE_SOT_MASK);
 910
 911         buffstatus = reg_read32(hcd->regs, HC_BUFFER_STATUS_REG);
 912         buffstatus |= ATL_BUFFER;
 913         reg_write32(hcd->regs, HC_BUFFER_STATUS_REG, buffstatus);
 914 }
 915
 916 static void enqueue_an_INT_packet(struct usb_hcd *hcd, struct isp1760_qh *qh,
 917                                   struct isp1760_qtd *qtd)
 918 {
 919         struct isp1760_hcd *priv = hcd_to_priv(hcd);
 920         u32 skip_map, or_map;
 921         u32 queue_entry;
 922         u32 slot;
 923         u32 payload;
 924         u32 buffstatus;
 925
 926         /*
 927          * When this function is called from the interrupt handler to enqueue
 928          * a follow-up packet, the SKIP register gets written and read back
 929          * almost immediately. With ISP1761, this register requires a delay of
 930          * 195ns between a write and subsequent read (see section 15.1.1.3).
 931          */
 932         mmiowb();
 933         ndelay(195);
 934         skip_map = reg_read32(hcd->regs, HC_INT_PTD_SKIPMAP_REG);
 935
 936         BUG_ON(!skip_map);
 937         slot = __ffs(skip_map);
 938         queue_entry = 1 << slot;
 939
 940         payload = alloc_mem(priv, qtd->length);
 941
 942         enqueue_one_int_qtd(payload, priv, qh, qtd->urb, slot, qtd);
 943
 944         or_map = reg_read32(hcd->regs, HC_INT_IRQ_MASK_OR_REG);
 945         or_map |= queue_entry;
 946         reg_write32(hcd->regs, HC_INT_IRQ_MASK_OR_REG, or_map);
 947
 948         skip_map &= ~queue_entry;
 949         reg_write32(hcd->regs, HC_INT_PTD_SKIPMAP_REG, skip_map);
 950
 951         buffstatus = reg_read32(hcd->regs, HC_BUFFER_STATUS_REG);
 952         buffstatus |= INT_BUFFER;
 953         reg_write32(hcd->regs, HC_BUFFER_STATUS_REG, buffstatus);
 954 }
 955
 956 static void isp1760_urb_done(struct isp1760_hcd *priv, struct urb *urb,
 957                                                                 int status)
 958 __releases(priv->lock)
 959 __acquires(priv->lock)
 960 {
 961         if (!urb->unlinked) {
 962                 if (status == -EINPROGRESS)
 963                         status = 0;
 964         }
 965
 966         if (usb_pipein(urb->pipe) && usb_pipetype(urb->pipe) != PIPE_CONTROL) {
 967                 void *ptr;
 968                 for (ptr = urb->transfer_buffer;
 969                      ptr < urb->transfer_buffer + urb->transfer_buffer_length;
 970                      ptr += PAGE_SIZE)
 971                         flush_dcache_page(virt_to_page(ptr));
 972         }
 973
 974         /* complete() can reenter this HCD */
 975         usb_hcd_unlink_urb_from_ep(priv_to_hcd(priv), urb);
 976         spin_unlock(&priv->lock);
 977         usb_hcd_giveback_urb(priv_to_hcd(priv), urb, status);
 978         spin_lock(&priv->lock);
 979 }
 980
 981 static void isp1760_qtd_free(struct isp1760_qtd *qtd)
 982 {
 983         kmem_cache_free(qtd_cachep, qtd);
 984 }
 985
 986 static struct isp1760_qtd *clean_this_qtd(struct isp1760_qtd *qtd)
 987 {
 988         struct isp1760_qtd *tmp_qtd;
 989
 990         tmp_qtd = qtd->hw_next;
 991         list_del(&qtd->qtd_list);
 992         isp1760_qtd_free(qtd);
 993         return tmp_qtd;
 994 }
 995
 996 /*
 997  * Remove this QTD from the QH list and free its memory. If this QTD
 998  * isn't the last one than remove also his successor(s).
 999  * Returns the QTD which is part of an new URB and should be enqueued.
1000  */
1001 static struct isp1760_qtd *clean_up_qtdlist(struct isp1760_qtd *qtd)
1002 {
1003         struct isp1760_qtd *tmp_qtd;
1004         int last_one;
1005
1006         do {
1007                 tmp_qtd = qtd->hw_next;
1008                 last_one = qtd->status & URB_COMPLETE_NOTIFY;
1009                 list_del(&qtd->qtd_list);
1010                 isp1760_qtd_free(qtd);
1011                 qtd = tmp_qtd;
1012         } while (!last_one && qtd);
1013
1014         return qtd;
1015 }
1016
1017 static void do_atl_int(struct usb_hcd *hcd)
1018 {
1019         struct isp1760_hcd *priv = hcd_to_priv(hcd);
1020         u32 done_map, skip_map;
1021         struct ptd ptd;
1022         struct urb *urb = NULL;
1023         u32 queue_entry;
1024         u32 payload;
1025         u32 length;
1026         u32 or_map;
1027         u32 status = -EINVAL;
1028         int error;
1029         struct isp1760_qtd *qtd;
1030         struct isp1760_qh *qh;
1031         u32 rl;
1032         u32 nakcount;
1033
1034         done_map = reg_read32(hcd->regs, HC_ATL_PTD_DONEMAP_REG);
1035         skip_map = reg_read32(hcd->regs, HC_ATL_PTD_SKIPMAP_REG);
1036
1037         or_map = reg_read32(hcd->regs, HC_ATL_IRQ_MASK_OR_REG);
1038         or_map &= ~done_map;
1039         reg_write32(hcd->regs, HC_ATL_IRQ_MASK_OR_REG, or_map);
1040
1041         while (done_map) {
1042                 status = 0;
1043                 priv->atl_queued--;
1044
1045                 queue_entry = __ffs(done_map);
1046                 done_map &= ~(1 << queue_entry);
1047                 skip_map |= 1 << queue_entry;
1048
1049                 urb = priv->atl_ints[queue_entry].urb;
1050                 qtd = priv->atl_ints[queue_entry].qtd;
1051                 qh = priv->atl_ints[queue_entry].qh;
1052                 payload = priv->atl_ints[queue_entry].payload;
1053
1054                 if (!qh) {
1055                         printk(KERN_ERR "qh is 0\n");
1056                         continue;
1057                 }
1058                 ptd_read(hcd->regs, ATL_PTD_OFFSET, queue_entry, &ptd);
1059
1060                 rl = (ptd.dw2 >> 25) & 0x0f;
1061                 nakcount = (ptd.dw3 >> 19) & 0xf;
1062
1063                 /* Transfer Error, *but* active and no HALT -> reload */
1064                 if ((ptd.dw3 & DW3_ERROR_BIT) && (ptd.dw3 & DW3_QTD_ACTIVE) &&
1065                                 !(ptd.dw3 & DW3_HALT_BIT)) {
1066
1067                         /* according to ppriv code, we have to
1068                          * reload this one if trasfered bytes != requested bytes
1069                          * else act like everything went smooth..
1070                          * XXX This just doesn't feel right and hasn't
1071                          * triggered so far.
1072                          */
1073
1074                         length = PTD_XFERRED_LENGTH(ptd.dw3);
1075                         printk(KERN_ERR "Should reload now.... transfered %d "
1076                                         "of %zu\n", length, qtd->length);
1077                         BUG();
1078                 }
1079
1080                 if (!nakcount && (ptd.dw3 & DW3_QTD_ACTIVE)) {
1081                         u32 buffstatus;
1082
1083                         /*
1084                          * NAKs are handled in HW by the chip. Usually if the
1085                          * device is not able to send data fast enough.
1086                          * This happens mostly on slower hardware.
1087                          */
1088
1089                         /* RL counter = ERR counter */
1090                         ptd.dw3 &= ~(0xf << 19);
1091                         ptd.dw3 |= rl << 19;
1092                         ptd.dw3 &= ~(3 << (55 - 32));
1093                         ptd.dw3 |= ERR_COUNTER << (55 - 32);
1094
1095                         /*
1096                          * It is not needed to write skip map back because it
1097                          * is unchanged. Just make sure that this entry is
1098                          * unskipped once it gets written to the HW.
1099                          */
1100                         skip_map &= ~(1 << queue_entry);
1101                         or_map = reg_read32(hcd->regs, HC_ATL_IRQ_MASK_OR_REG);
1102                         or_map |= 1 << queue_entry;
1103                         reg_write32(hcd->regs, HC_ATL_IRQ_MASK_OR_REG, or_map);
1104
1105                         ptd.dw0 |= PTD_VALID;
1106                         ptd_write(hcd->regs, ATL_PTD_OFFSET, queue_entry, &ptd);
1107
1108                         priv->atl_queued++;
1109                         if (priv->atl_queued == 2)
1110                                 reg_write32(hcd->regs, HC_INTERRUPT_ENABLE,
1111                                                 INTERRUPT_ENABLE_SOT_MASK);
1112
1113                         buffstatus = reg_read32(hcd->regs,
1114                                                         HC_BUFFER_STATUS_REG);
1115                         buffstatus |= ATL_BUFFER;
1116                         reg_write32(hcd->regs, HC_BUFFER_STATUS_REG,
1117                                                                 buffstatus);
1118                         continue;
1119                 }
1120
1121                 error = check_error(&ptd);
1122                 if (error) {
1123                         status = error;
1124                         priv->atl_ints[queue_entry].qh->toggle = 0;
1125                         priv->atl_ints[queue_entry].qh->ping = 0;
1126                         urb->status = -EPIPE;
1127
1128 #if 0
1129                         printk(KERN_ERR "Error in %s().\n", __func__);
1130                         printk(KERN_ERR "IN dw0: %08x dw1: %08x dw2: %08x "
1131                                         "dw3: %08x dw4: %08x dw5: %08x dw6: "
1132                                         "%08x dw7: %08x\n",
1133                                         ptd.dw0, ptd.dw1, ptd.dw2, ptd.dw3,
1134                                         ptd.dw4, ptd.dw5, ptd.dw6, ptd.dw7);
1135 #endif
1136                 } else {
1137                         if (usb_pipetype(urb->pipe) == PIPE_BULK) {
1138                                 priv->atl_ints[queue_entry].qh->toggle =
1139                                                         ptd.dw3 & (1 << 25);
1140                                 priv->atl_ints[queue_entry].qh->ping =
1141                                                         ptd.dw3 & (1 << 26);
1142                         }
1143                 }
1144
1145                 length = PTD_XFERRED_LENGTH(ptd.dw3);
1146                 if (length) {
1147                         switch (DW1_GET_PID(ptd.dw1)) {
1148                         case IN_PID:
1149                                 mem_reads8(hcd->regs, payload,
1150                                         priv->atl_ints[queue_entry].data_buffer,
1151                                         length);
1152
1153                         case OUT_PID:
1154
1155                                 urb->actual_length += length;
1156
1157                         case SETUP_PID:
1158                                 break;
1159                         }
1160                 }
1161
1162                 priv->atl_ints[queue_entry].data_buffer = NULL;
1163                 priv->atl_ints[queue_entry].urb = NULL;
1164                 priv->atl_ints[queue_entry].qtd = NULL;
1165                 priv->atl_ints[queue_entry].qh = NULL;
1166
1167                 free_mem(priv, payload);
1168
1169                 reg_write32(hcd->regs, HC_ATL_PTD_SKIPMAP_REG, skip_map);
1170
1171                 if (urb->status == -EPIPE) {
1172                         /* HALT was received */
1173
1174                         qtd = clean_up_qtdlist(qtd);
1175                         isp1760_urb_done(priv, urb, urb->status);
1176
1177                 } else if (usb_pipebulk(urb->pipe) && (length < qtd->length)) {
1178                         /* short BULK received */
1179
1180                         if (urb->transfer_flags & URB_SHORT_NOT_OK) {
1181                                 urb->status = -EREMOTEIO;
1182                                 isp1760_dbg(priv, "short bulk, %d instead %zu "
1183                                         "with URB_SHORT_NOT_OK flag.\n",
1184                                         length, qtd->length);
1185                         }
1186
1187                         if (urb->status == -EINPROGRESS)
1188                                 urb->status = 0;
1189
1190                         qtd = clean_up_qtdlist(qtd);
1191
1192                         isp1760_urb_done(priv, urb, urb->status);
1193
1194                 } else if (qtd->status & URB_COMPLETE_NOTIFY) {
1195                         /* that was the last qtd of that URB */
1196
1197                         if (urb->status == -EINPROGRESS)
1198                                 urb->status = 0;
1199
1200                         qtd = clean_this_qtd(qtd);
1201                         isp1760_urb_done(priv, urb, urb->status);
1202
1203                 } else {
1204                         /* next QTD of this URB */
1205
1206                         qtd = clean_this_qtd(qtd);
1207                         BUG_ON(!qtd);
1208                 }
1209
1210                 if (qtd)
1211                         enqueue_an_ATL_packet(hcd, qh, qtd);
1212
1213                 skip_map = reg_read32(hcd->regs, HC_ATL_PTD_SKIPMAP_REG);
1214         }
1215         if (priv->atl_queued <= 1)
1216                 reg_write32(hcd->regs, HC_INTERRUPT_ENABLE,
1217                                                         INTERRUPT_ENABLE_MASK);
1218 }
1219
1220 static void do_intl_int(struct usb_hcd *hcd)
1221 {
1222         struct isp1760_hcd *priv = hcd_to_priv(hcd);
1223         u32 done_map, skip_map;
1224         struct ptd ptd;
1225         struct urb *urb = NULL;
1226         u32 payload;
1227         u32 length;
1228         u32 or_map;
1229         int error;
1230         u32 queue_entry;
1231         struct isp1760_qtd *qtd;
1232         struct isp1760_qh *qh;
1233
1234         done_map = reg_read32(hcd->regs, HC_INT_PTD_DONEMAP_REG);
1235         skip_map = reg_read32(hcd->regs, HC_INT_PTD_SKIPMAP_REG);
1236
1237         or_map = reg_read32(hcd->regs, HC_INT_IRQ_MASK_OR_REG);
1238         or_map &= ~done_map;
1239         reg_write32(hcd->regs, HC_INT_IRQ_MASK_OR_REG, or_map);
1240
1241         while (done_map) {
1242                 queue_entry = __ffs(done_map);
1243                 done_map &= ~(1 << queue_entry);
1244                 skip_map |= 1 << queue_entry;
1245
1246                 urb = priv->int_ints[queue_entry].urb;
1247                 qtd = priv->int_ints[queue_entry].qtd;
1248                 qh = priv->int_ints[queue_entry].qh;
1249                 payload = priv->int_ints[queue_entry].payload;
1250
1251                 if (!qh) {
1252                         printk(KERN_ERR "(INT) qh is 0\n");
1253                         continue;
1254                 }
1255
1256                 ptd_read(hcd->regs, INT_PTD_OFFSET, queue_entry, &ptd);
1257                 check_int_err_status(ptd.dw4);
1258
1259                 error = check_error(&ptd);
1260                 if (error) {
1261 #if 0
1262                         printk(KERN_ERR "Error in %s().\n", __func__);
1263                         printk(KERN_ERR "IN dw0: %08x dw1: %08x dw2: %08x "
1264                                         "dw3: %08x dw4: %08x dw5: %08x dw6: "
1265                                         "%08x dw7: %08x\n",
1266                                         ptd.dw0, ptd.dw1, ptd.dw2, ptd.dw3,
1267                                         ptd.dw4, ptd.dw5, ptd.dw6, ptd.dw7);
1268 #endif
1269                         urb->status = -EPIPE;
1270                         priv->int_ints[queue_entry].qh->toggle = 0;
1271                         priv->int_ints[queue_entry].qh->ping = 0;
1272
1273                 } else {
1274                         priv->int_ints[queue_entry].qh->toggle =
1275                                                         ptd.dw3 & (1 << 25);
1276                         priv->int_ints[queue_entry].qh->ping =
1277                                                         ptd.dw3 & (1 << 26);
1278                 }
1279
1280                 if (urb->dev->speed != USB_SPEED_HIGH)
1281                         length = PTD_XFERRED_LENGTH_LO(ptd.dw3);
1282                 else
1283                         length = PTD_XFERRED_LENGTH(ptd.dw3);
1284
1285                 if (length) {
1286                         switch (DW1_GET_PID(ptd.dw1)) {
1287                         case IN_PID:
1288                                 mem_reads8(hcd->regs, payload,
1289                                         priv->int_ints[queue_entry].data_buffer,
1290                                         length);
1291                         case OUT_PID:
1292
1293                                 urb->actual_length += length;
1294
1295                         case SETUP_PID:
1296                                 break;
1297                         }
1298                 }
1299
1300                 priv->int_ints[queue_entry].data_buffer = NULL;
1301                 priv->int_ints[queue_entry].urb = NULL;
1302                 priv->int_ints[queue_entry].qtd = NULL;
1303                 priv->int_ints[queue_entry].qh = NULL;
1304
1305                 reg_write32(hcd->regs, HC_INT_PTD_SKIPMAP_REG, skip_map);
1306                 free_mem(priv, payload);
1307
1308                 if (urb->status == -EPIPE) {
1309                         /* HALT received */
1310
1311                          qtd = clean_up_qtdlist(qtd);
1312                          isp1760_urb_done(priv, urb, urb->status);
1313
1314                 } else if (qtd->status & URB_COMPLETE_NOTIFY) {
1315
1316                         if (urb->status == -EINPROGRESS)
1317                                 urb->status = 0;
1318
1319                         qtd = clean_this_qtd(qtd);
1320                         isp1760_urb_done(priv, urb, urb->status);
1321
1322                 } else {
1323                         /* next QTD of this URB */
1324
1325                         qtd = clean_this_qtd(qtd);
1326                         BUG_ON(!qtd);
1327                 }
1328
1329                 if (qtd)
1330                         enqueue_an_INT_packet(hcd, qh, qtd);
1331
1332                 skip_map = reg_read32(hcd->regs, HC_INT_PTD_SKIPMAP_REG);
1333         }
1334 }
1335
1336 #define max_packet(wMaxPacketSize) ((wMaxPacketSize) & 0x07ff)
1337 static struct isp1760_qh *qh_make(struct isp1760_hcd *priv, struct urb *urb,
1338                 gfp_t flags)
1339 {
1340         struct isp1760_qh *qh;
1341         int is_input, type;
1342
1343         qh = isp1760_qh_alloc(priv, flags);
1344         if (!qh)
1345                 return qh;
1346
1347         /*
1348          * init endpoint/device data for this QH
1349          */
1350         is_input = usb_pipein(urb->pipe);
1351         type = usb_pipetype(urb->pipe);
1352
1353         if (type == PIPE_INTERRUPT) {
1354
1355                 if (urb->dev->speed == USB_SPEED_HIGH) {
1356
1357                         qh->period = urb->interval >> 3;
1358                         if (qh->period == 0 && urb->interval != 1) {
1359                                 /* NOTE interval 2 or 4 uframes could work.
1360                                  * But interval 1 scheduling is simpler, and
1361                                  * includes high bandwidth.
1362                                  */
1363                                 printk(KERN_ERR "intr period %d uframes, NYET!",
1364                                                 urb->interval);
1365                                 qh_destroy(qh);
1366                                 return NULL;
1367                         }
1368                 } else {
1369                         qh->period = urb->interval;
1370                 }
1371         }
1372
1373         /* support for tt scheduling, and access to toggles */
1374         qh->dev = urb->dev;
1375
1376         if (!usb_pipecontrol(urb->pipe))
1377                 usb_settoggle(urb->dev, usb_pipeendpoint(urb->pipe), !is_input,
1378                                 1);
1379         return qh;
1380 }
1381
1382 /*
1383  * For control/bulk/interrupt, return QH with these TDs appended.
1384  * Allocates and initializes the QH if necessary.
1385  * Returns null if it can't allocate a QH it needs to.
1386  * If the QH has TDs (urbs) already, that's great.
1387  */
1388 static struct isp1760_qh *qh_append_tds(struct isp1760_hcd *priv,
1389                 struct urb *urb, struct list_head *qtd_list, int epnum,
1390                 void **ptr)
1391 {
1392         struct isp1760_qh *qh;
1393         struct isp1760_qtd *qtd;
1394         struct isp1760_qtd *prev_qtd;
1395
1396         qh = (struct isp1760_qh *)*ptr;
1397         if (!qh) {
1398                 /* can't sleep here, we have priv->lock... */
1399                 qh = qh_make(priv, urb, GFP_ATOMIC);
1400                 if (!qh)
1401                         return qh;
1402                 *ptr = qh;
1403         }
1404
1405         qtd = list_entry(qtd_list->next, struct isp1760_qtd,
1406                         qtd_list);
1407         if (!list_empty(&qh->qtd_list))
1408                 prev_qtd = list_entry(qh->qtd_list.prev,
1409                                 struct isp1760_qtd, qtd_list);
1410         else
1411                 prev_qtd = NULL;
1412
1413         list_splice(qtd_list, qh->qtd_list.prev);
1414         if (prev_qtd) {
1415                 BUG_ON(prev_qtd->hw_next);
1416                 prev_qtd->hw_next = qtd;
1417         }
1418
1419         urb->hcpriv = qh;
1420         return qh;
1421 }
1422
1423 static void qtd_list_free(struct isp1760_hcd *priv, struct urb *urb,
1424                 struct list_head *qtd_list)
1425 {
1426         struct list_head *entry, *temp;
1427
1428         list_for_each_safe(entry, temp, qtd_list) {
1429                 struct isp1760_qtd      *qtd;
1430
1431                 qtd = list_entry(entry, struct isp1760_qtd, qtd_list);
1432                 list_del(&qtd->qtd_list);
1433                 isp1760_qtd_free(qtd);
1434         }
1435 }
1436
1437 static int isp1760_prepare_enqueue(struct isp1760_hcd *priv, struct urb *urb,
1438                 struct list_head *qtd_list, gfp_t mem_flags, packet_enqueue *p)
1439 {
1440         struct isp1760_qtd         *qtd;
1441         int                     epnum;
1442         unsigned long           flags;
1443         struct isp1760_qh          *qh = NULL;
1444         int                     rc;
1445         int qh_busy;
1446
1447         qtd = list_entry(qtd_list->next, struct isp1760_qtd, qtd_list);
1448         epnum = urb->ep->desc.bEndpointAddress;
1449
1450         spin_lock_irqsave(&priv->lock, flags);
1451         if (!HCD_HW_ACCESSIBLE(priv_to_hcd(priv))) {
1452                 rc = -ESHUTDOWN;
1453                 goto done;
1454         }
1455         rc = usb_hcd_link_urb_to_ep(priv_to_hcd(priv), urb);
1456         if (rc)
1457                 goto done;
1458
1459         qh = urb->ep->hcpriv;
1460         if (qh)
1461                 qh_busy = !list_empty(&qh->qtd_list);
1462         else
1463                 qh_busy = 0;
1464
1465         qh = qh_append_tds(priv, urb, qtd_list, epnum, &urb->ep->hcpriv);
1466         if (!qh) {
1467                 usb_hcd_unlink_urb_from_ep(priv_to_hcd(priv), urb);
1468                 rc = -ENOMEM;
1469                 goto done;
1470         }
1471
1472         if (!qh_busy)
1473                 p(priv_to_hcd(priv), qh, qtd);
1474
1475 done:
1476         spin_unlock_irqrestore(&priv->lock, flags);
1477         if (!qh)
1478                 qtd_list_free(priv, urb, qtd_list);
1479         return rc;
1480 }
1481
1482 static struct isp1760_qtd *isp1760_qtd_alloc(struct isp1760_hcd *priv,
1483                 gfp_t flags)
1484 {
1485         struct isp1760_qtd *qtd;
1486
1487         qtd = kmem_cache_zalloc(qtd_cachep, flags);
1488         if (qtd)
1489                 INIT_LIST_HEAD(&qtd->qtd_list);
1490
1491         return qtd;
1492 }
1493
1494 /*
1495  * create a list of filled qtds for this URB; won't link into qh.
1496  */
1497 static struct list_head *qh_urb_transaction(struct isp1760_hcd *priv,
1498                 struct urb *urb, struct list_head *head, gfp_t flags)
1499 {
1500         struct isp1760_qtd *qtd, *qtd_prev;
1501         void *buf;
1502         int len, maxpacket;
1503         int is_input;
1504         u32 token;
1505
1506         /*
1507          * URBs map to sequences of QTDs:  one logical transaction
1508          */
1509         qtd = isp1760_qtd_alloc(priv, flags);
1510         if (!qtd)
1511                 return NULL;
1512
1513         list_add_tail(&qtd->qtd_list, head);
1514         qtd->urb = urb;
1515         urb->status = -EINPROGRESS;
1516
1517         token = 0;
1518         /* for split transactions, SplitXState initialized to zero */
1519
1520         len = urb->transfer_buffer_length;
1521         is_input = usb_pipein(urb->pipe);
1522         if (usb_pipecontrol(urb->pipe)) {
1523                 /* SETUP pid */
1524                 qtd_fill(qtd, urb->setup_packet,
1525                                 sizeof(struct usb_ctrlrequest),
1526                                 token | SETUP_PID);
1527
1528                 /* ... and always at least one more pid */
1529                 token ^= DATA_TOGGLE;
1530                 qtd_prev = qtd;
1531                 qtd = isp1760_qtd_alloc(priv, flags);
1532                 if (!qtd)
1533                         goto cleanup;
1534                 qtd->urb = urb;
1535                 qtd_prev->hw_next = qtd;
1536                 list_add_tail(&qtd->qtd_list, head);
1537
1538                 /* for zero length DATA stages, STATUS is always IN */
1539                 if (len == 0)
1540                         token |= IN_PID;
1541         }
1542
1543         /*
1544          * data transfer stage:  buffer setup
1545          */
1546         buf = urb->transfer_buffer;
1547
1548         if (is_input)
1549                 token |= IN_PID;
1550         else
1551                 token |= OUT_PID;
1552
1553         maxpacket = max_packet(usb_maxpacket(urb->dev, urb->pipe, !is_input));
1554
1555         /*
1556          * buffer gets wrapped in one or more qtds;
1557          * last one may be "short" (including zero len)
1558          * and may serve as a control status ack
1559          */
1560         for (;;) {
1561                 int this_qtd_len;
1562
1563                 if (!buf && len) {
1564                         /* XXX This looks like usb storage / SCSI bug */
1565                         printk(KERN_ERR "buf is null, dma is %08lx len is %d\n",
1566                                         (long unsigned)urb->transfer_dma, len);
1567                         WARN_ON(1);
1568                 }
1569
1570                 this_qtd_len = qtd_fill(qtd, buf, len, token);
1571                 len -= this_qtd_len;
1572                 buf += this_qtd_len;
1573
1574                 /* qh makes control packets use qtd toggle; maybe switch it */
1575                 if ((maxpacket & (this_qtd_len + (maxpacket - 1))) == 0)
1576                         token ^= DATA_TOGGLE;
1577
1578                 if (len <= 0)
1579                         break;
1580
1581                 qtd_prev = qtd;
1582                 qtd = isp1760_qtd_alloc(priv, flags);
1583                 if (!qtd)
1584                         goto cleanup;
1585                 qtd->urb = urb;
1586                 qtd_prev->hw_next = qtd;
1587                 list_add_tail(&qtd->qtd_list, head);
1588         }
1589
1590         /*
1591          * control requests may need a terminating data "status" ack;
1592          * bulk ones may need a terminating short packet (zero length).
1593          */
1594         if (urb->transfer_buffer_length != 0) {
1595                 int one_more = 0;
1596
1597                 if (usb_pipecontrol(urb->pipe)) {
1598                         one_more = 1;
1599                         /* "in" <--> "out"  */
1600                         token ^= IN_PID;
1601                         /* force DATA1 */
1602                         token |= DATA_TOGGLE;
1603                 } else if (usb_pipebulk(urb->pipe)
1604                                 && (urb->transfer_flags & URB_ZERO_PACKET)
1605                                 && !(urb->transfer_buffer_length % maxpacket)) {
1606                         one_more = 1;
1607                 }
1608                 if (one_more) {
1609                         qtd_prev = qtd;
1610                         qtd = isp1760_qtd_alloc(priv, flags);
1611                         if (!qtd)
1612                                 goto cleanup;
1613                         qtd->urb = urb;
1614                         qtd_prev->hw_next = qtd;
1615                         list_add_tail(&qtd->qtd_list, head);
1616
1617                         /* never any data in such packets */
1618                         qtd_fill(qtd, NULL, 0, token);
1619                 }
1620         }
1621
1622         qtd->status = URB_COMPLETE_NOTIFY;
1623         return head;
1624
1625 cleanup:
1626         qtd_list_free(priv, urb, head);
1627         return NULL;
1628 }
1629
1630 static int isp1760_urb_enqueue(struct usb_hcd *hcd, struct urb *urb,
1631                 gfp_t mem_flags)
1632 {
1633         struct isp1760_hcd *priv = hcd_to_priv(hcd);
1634         struct list_head qtd_list;
1635         packet_enqueue *pe;
1636
1637         INIT_LIST_HEAD(&qtd_list);
1638
1639         switch (usb_pipetype(urb->pipe)) {
1640         case PIPE_CONTROL:
1641         case PIPE_BULK:
1642
1643                 if (!qh_urb_transaction(priv, urb, &qtd_list, mem_flags))
1644                         return -ENOMEM;
1645                 pe =  enqueue_an_ATL_packet;
1646                 break;
1647
1648         case PIPE_INTERRUPT:
1649                 if (!qh_urb_transaction(priv, urb, &qtd_list, mem_flags))
1650                         return -ENOMEM;
1651                 pe = enqueue_an_INT_packet;
1652                 break;
1653
1654         case PIPE_ISOCHRONOUS:
1655                 printk(KERN_ERR "PIPE_ISOCHRONOUS ain't supported\n");
1656         default:
1657                 return -EPIPE;
1658         }
1659
1660         return isp1760_prepare_enqueue(priv, urb, &qtd_list, mem_flags, pe);
1661 }
1662
1663 static int isp1760_urb_dequeue(struct usb_hcd *hcd, struct urb *urb,
1664                 int status)
1665 {
1666         struct isp1760_hcd *priv = hcd_to_priv(hcd);
1667         struct inter_packet_info *ints;
1668         u32 i;
1669         u32 reg_base, or_reg, skip_reg;
1670         unsigned long flags;
1671         struct ptd ptd;
1672         packet_enqueue *pe;
1673
1674         switch (usb_pipetype(urb->pipe)) {
1675         case PIPE_ISOCHRONOUS:
1676                 return -EPIPE;
1677                 break;
1678
1679         case PIPE_INTERRUPT:
1680                 ints = priv->int_ints;
1681                 reg_base = INT_PTD_OFFSET;
1682                 or_reg = HC_INT_IRQ_MASK_OR_REG;
1683                 skip_reg = HC_INT_PTD_SKIPMAP_REG;
1684                 pe = enqueue_an_INT_packet;
1685                 break;
1686
1687         default:
1688                 ints = priv->atl_ints;
1689                 reg_base = ATL_PTD_OFFSET;
1690                 or_reg = HC_ATL_IRQ_MASK_OR_REG;
1691                 skip_reg = HC_ATL_PTD_SKIPMAP_REG;
1692                 pe =  enqueue_an_ATL_packet;
1693                 break;
1694         }
1695
1696         memset(&ptd, 0, sizeof(ptd));
1697         spin_lock_irqsave(&priv->lock, flags);
1698
1699         for (i = 0; i < 32; i++) {
1700                 if (ints->urb == urb) {
1701                         u32 skip_map;
1702                         u32 or_map;
1703                         struct isp1760_qtd *qtd;
1704                         struct isp1760_qh *qh = ints->qh;
1705
1706                         skip_map = reg_read32(hcd->regs, skip_reg);
1707                         skip_map |= 1 << i;
1708                         reg_write32(hcd->regs, skip_reg, skip_map);
1709
1710                         or_map = reg_read32(hcd->regs, or_reg);
1711                         or_map &= ~(1 << i);
1712                         reg_write32(hcd->regs, or_reg, or_map);
1713
1714                         ptd_write(hcd->regs, reg_base, i, &ptd);
1715
1716                         qtd = ints->qtd;
1717                         qtd = clean_up_qtdlist(qtd);
1718
1719                         free_mem(priv, ints->payload);
1720
1721                         ints->urb = NULL;
1722                         ints->qh = NULL;
1723                         ints->qtd = NULL;
1724                         ints->data_buffer = NULL;
1725                         ints->payload = 0;
1726
1727                         isp1760_urb_done(priv, urb, status);
1728                         if (qtd)
1729                                 pe(hcd, qh, qtd);
1730                         break;
1731
1732                 } else if (ints->qtd) {
1733                         struct isp1760_qtd *qtd, *prev_qtd = ints->qtd;
1734
1735                         for (qtd = ints->qtd->hw_next; qtd; qtd = qtd->hw_next) {
1736                                 if (qtd->urb == urb) {
1737                                         prev_qtd->hw_next =
1738                                                         clean_up_qtdlist(qtd);
1739                                         isp1760_urb_done(priv, urb, status);
1740                                         break;
1741                                 }
1742                                 prev_qtd = qtd;
1743                         }
1744                         /* we found the urb before the end of the list */
1745                         if (qtd)
1746                                 break;
1747                 }
1748                 ints++;
1749         }
1750
1751         spin_unlock_irqrestore(&priv->lock, flags);
1752         return 0;
1753 }
1754
1755 static irqreturn_t isp1760_irq(struct usb_hcd *usb_hcd)
1756 {
1757         struct isp1760_hcd *priv = hcd_to_priv(usb_hcd);
1758         u32 imask;
1759         irqreturn_t irqret = IRQ_NONE;
1760
1761         spin_lock(&priv->lock);
1762
1763         if (!(usb_hcd->state & HC_STATE_RUNNING))
1764                 goto leave;
1765
1766         imask = reg_read32(usb_hcd->regs, HC_INTERRUPT_REG);
1767         if (unlikely(!imask))
1768                 goto leave;
1769
1770         reg_write32(usb_hcd->regs, HC_INTERRUPT_REG, imask);
1771         if (imask & (HC_ATL_INT | HC_SOT_INT))
1772                 do_atl_int(usb_hcd);
1773
1774         if (imask & HC_INTL_INT)
1775                 do_intl_int(usb_hcd);
1776
1777         irqret = IRQ_HANDLED;
1778 leave:
1779         spin_unlock(&priv->lock);
1780         return irqret;
1781 }
1782
1783 static int isp1760_hub_status_data(struct usb_hcd *hcd, char *buf)
1784 {
1785         struct isp1760_hcd *priv = hcd_to_priv(hcd);
1786         u32 temp, status = 0;
1787         u32 mask;
1788         int retval = 1;
1789         unsigned long flags;
1790
1791         /* if !USB_SUSPEND, root hub timers won't get shut down ... */
1792         if (!HC_IS_RUNNING(hcd->state))
1793                 return 0;
1794
1795         /* init status to no-changes */
1796         buf[0] = 0;
1797         mask = PORT_CSC;
1798
1799         spin_lock_irqsave(&priv->lock, flags);
1800         temp = reg_read32(hcd->regs, HC_PORTSC1);
1801
1802         if (temp & PORT_OWNER) {
1803                 if (temp & PORT_CSC) {
1804                         temp &= ~PORT_CSC;
1805                         reg_write32(hcd->regs, HC_PORTSC1, temp);
1806                         goto done;
1807                 }
1808         }
1809
1810         /*
1811          * Return status information even for ports with OWNER set.
1812          * Otherwise khubd wouldn't see the disconnect event when a
1813          * high-speed device is switched over to the companion
1814          * controller by the user.
1815          */
1816
1817         if ((temp & mask) != 0
1818                         || ((temp & PORT_RESUME) != 0
1819                                 && time_after_eq(jiffies,
1820                                         priv->reset_done))) {
1821                 buf [0] |= 1 << (0 + 1);
1822                 status = STS_PCD;
1823         }
1824         /* FIXME autosuspend idle root hubs */
1825 done:
1826         spin_unlock_irqrestore(&priv->lock, flags);
1827         return status ? retval : 0;
1828 }
1829
1830 static void isp1760_hub_descriptor(struct isp1760_hcd *priv,
1831                 struct usb_hub_descriptor *desc)
1832 {
1833         int ports = HCS_N_PORTS(priv->hcs_params);
1834         u16 temp;
1835
1836         desc->bDescriptorType = 0x29;
1837         /* priv 1.0, 2.3.9 says 20ms max */
1838         desc->bPwrOn2PwrGood = 10;
1839         desc->bHubContrCurrent = 0;
1840
1841         desc->bNbrPorts = ports;
1842         temp = 1 + (ports / 8);
1843         desc->bDescLength = 7 + 2 * temp;
1844
1845         /* two bitmaps:  ports removable, and usb 1.0 legacy PortPwrCtrlMask */
1846         memset(&desc->bitmap[0], 0, temp);
1847         memset(&desc->bitmap[temp], 0xff, temp);
1848
1849         /* per-port overcurrent reporting */
1850         temp = 0x0008;
1851         if (HCS_PPC(priv->hcs_params))
1852                 /* per-port power control */
1853                 temp |= 0x0001;
1854         else
1855                 /* no power switching */
1856                 temp |= 0x0002;
1857         desc->wHubCharacteristics = cpu_to_le16(temp);
1858 }
1859
1860 #define PORT_WAKE_BITS  (PORT_WKOC_E|PORT_WKDISC_E|PORT_WKCONN_E)
1861
1862 static int check_reset_complete(struct usb_hcd *hcd, int index,
1863                 int port_status)
1864 {
1865         if (!(port_status & PORT_CONNECT))
1866                 return port_status;
1867
1868         /* if reset finished and it's still not enabled -- handoff */
1869         if (!(port_status & PORT_PE)) {
1870
1871                 printk(KERN_ERR "port %d full speed --> companion\n",
1872                         index + 1);
1873
1874                 port_status |= PORT_OWNER;
1875                 port_status &= ~PORT_RWC_BITS;
1876                 reg_write32(hcd->regs, HC_PORTSC1, port_status);
1877
1878         } else
1879                 printk(KERN_ERR "port %d high speed\n", index + 1);
1880
1881         return port_status;
1882 }
1883
1884 static int isp1760_hub_control(struct usb_hcd *hcd, u16 typeReq,
1885                 u16 wValue, u16 wIndex, char *buf, u16 wLength)
1886 {
1887         struct isp1760_hcd *priv = hcd_to_priv(hcd);
1888         int ports = HCS_N_PORTS(priv->hcs_params);
1889         u32 temp, status;
1890         unsigned long flags;
1891         int retval = 0;
1892         unsigned selector;
1893
1894         /*
1895          * FIXME:  support SetPortFeatures USB_PORT_FEAT_INDICATOR.
1896          * HCS_INDICATOR may say we can change LEDs to off/amber/green.
1897          * (track current state ourselves) ... blink for diagnostics,
1898          * power, "this is the one", etc.  EHCI spec supports this.
1899          */
1900
1901         spin_lock_irqsave(&priv->lock, flags);
1902         switch (typeReq) {
1903         case ClearHubFeature:
1904                 switch (wValue) {
1905                 case C_HUB_LOCAL_POWER:
1906                 case C_HUB_OVER_CURRENT:
1907                         /* no hub-wide feature/status flags */
1908                         break;
1909                 default:
1910                         goto error;
1911                 }
1912                 break;
1913         case ClearPortFeature:
1914                 if (!wIndex || wIndex > ports)
1915                         goto error;
1916                 wIndex--;
1917                 temp = reg_read32(hcd->regs, HC_PORTSC1);
1918
1919                 /*
1920                  * Even if OWNER is set, so the port is owned by the
1921                  * companion controller, khubd needs to be able to clear
1922                  * the port-change status bits (especially
1923                  * USB_PORT_STAT_C_CONNECTION).
1924                  */
1925
1926                 switch (wValue) {
1927                 case USB_PORT_FEAT_ENABLE:
1928                         reg_write32(hcd->regs, HC_PORTSC1, temp & ~PORT_PE);
1929                         break;
1930                 case USB_PORT_FEAT_C_ENABLE:
1931                         /* XXX error? */
1932                         break;
1933                 case USB_PORT_FEAT_SUSPEND:
1934                         if (temp & PORT_RESET)
1935                                 goto error;
1936
1937                         if (temp & PORT_SUSPEND) {
1938                                 if ((temp & PORT_PE) == 0)
1939                                         goto error;
1940                                 /* resume signaling for 20 msec */
1941                                 temp &= ~(PORT_RWC_BITS);
1942                                 reg_write32(hcd->regs, HC_PORTSC1,
1943                                                         temp | PORT_RESUME);
1944                                 priv->reset_done = jiffies +
1945                                         msecs_to_jiffies(20);
1946                         }
1947                         break;
1948                 case USB_PORT_FEAT_C_SUSPEND:
1949                         /* we auto-clear this feature */
1950                         break;
1951                 case USB_PORT_FEAT_POWER:
1952                         if (HCS_PPC(priv->hcs_params))
1953                                 reg_write32(hcd->regs, HC_PORTSC1,
1954                                                         temp & ~PORT_POWER);
1955                         break;
1956                 case USB_PORT_FEAT_C_CONNECTION:
1957                         reg_write32(hcd->regs, HC_PORTSC1, temp | PORT_CSC);
1958                         break;
1959                 case USB_PORT_FEAT_C_OVER_CURRENT:
1960                         /* XXX error ?*/
1961                         break;
1962                 case USB_PORT_FEAT_C_RESET:
1963                         /* GetPortStatus clears reset */
1964                         break;
1965                 default:
1966                         goto error;
1967                 }
1968                 reg_read32(hcd->regs, HC_USBCMD);
1969                 break;
1970         case GetHubDescriptor:
1971                 isp1760_hub_descriptor(priv, (struct usb_hub_descriptor *)
1972                         buf);
1973                 break;
1974         case GetHubStatus:
1975                 /* no hub-wide feature/status flags */
1976                 memset(buf, 0, 4);
1977                 break;
1978         case GetPortStatus:
1979                 if (!wIndex || wIndex > ports)
1980                         goto error;
1981                 wIndex--;
1982                 status = 0;
1983                 temp = reg_read32(hcd->regs, HC_PORTSC1);
1984
1985                 /* wPortChange bits */
1986                 if (temp & PORT_CSC)
1987                         status |= USB_PORT_STAT_C_CONNECTION << 16;
1988
1989
1990                 /* whoever resumes must GetPortStatus to complete it!! */
1991                 if (temp & PORT_RESUME) {
1992                         printk(KERN_ERR "Port resume should be skipped.\n");
1993
1994                         /* Remote Wakeup received? */
1995                         if (!priv->reset_done) {
1996                                 /* resume signaling for 20 msec */
1997                                 priv->reset_done = jiffies
1998                                                 + msecs_to_jiffies(20);
1999                                 /* check the port again */
2000                                 mod_timer(&priv_to_hcd(priv)->rh_timer,
2001                                                 priv->reset_done);
2002                         }
2003
2004                         /* resume completed? */
2005                         else if (time_after_eq(jiffies,
2006                                         priv->reset_done)) {
2007                                 status |= USB_PORT_STAT_C_SUSPEND << 16;
2008                                 priv->reset_done = 0;
2009
2010                                 /* stop resume signaling */
2011                                 temp = reg_read32(hcd->regs, HC_PORTSC1);
2012                                 reg_write32(hcd->regs, HC_PORTSC1,
2013                                         temp & ~(PORT_RWC_BITS | PORT_RESUME));
2014                                 retval = handshake(hcd, HC_PORTSC1,
2015                                            PORT_RESUME, 0, 2000 /* 2msec */);
2016                                 if (retval != 0) {
2017                                         isp1760_err(priv,
2018                                                 "port %d resume error %d\n",
2019                                                 wIndex + 1, retval);
2020                                         goto error;
2021                                 }
2022                                 temp &= ~(PORT_SUSPEND|PORT_RESUME|(3<<10));
2023                         }
2024                 }
2025
2026                 /* whoever resets must GetPortStatus to complete it!! */
2027                 if ((temp & PORT_RESET)
2028                                 && time_after_eq(jiffies,
2029                                         priv->reset_done)) {
2030                         status |= USB_PORT_STAT_C_RESET << 16;
2031                         priv->reset_done = 0;
2032
2033                         /* force reset to complete */
2034                         reg_write32(hcd->regs, HC_PORTSC1, temp & ~PORT_RESET);
2035                         /* REVISIT:  some hardware needs 550+ usec to clear
2036                          * this bit; seems too long to spin routinely...
2037                          */
2038                         retval = handshake(hcd, HC_PORTSC1,
2039                                         PORT_RESET, 0, 750);
2040                         if (retval != 0) {
2041                                 isp1760_err(priv, "port %d reset error %d\n",
2042                                                 wIndex + 1, retval);
2043                                 goto error;
2044                         }
2045
2046                         /* see what we found out */
2047                         temp = check_reset_complete(hcd, wIndex,
2048                                         reg_read32(hcd->regs, HC_PORTSC1));
2049                 }
2050                 /*
2051                  * Even if OWNER is set, there's no harm letting khubd
2052                  * see the wPortStatus values (they should all be 0 except
2053                  * for PORT_POWER anyway).
2054                  */
2055
2056                 if (temp & PORT_OWNER)
2057                         printk(KERN_ERR "Warning: PORT_OWNER is set\n");
2058
2059                 if (temp & PORT_CONNECT) {
2060                         status |= USB_PORT_STAT_CONNECTION;
2061                         /* status may be from integrated TT */
2062                         status |= ehci_port_speed(priv, temp);
2063                 }
2064                 if (temp & PORT_PE)
2065                         status |= USB_PORT_STAT_ENABLE;
2066                 if (temp & (PORT_SUSPEND|PORT_RESUME))
2067                         status |= USB_PORT_STAT_SUSPEND;
2068                 if (temp & PORT_RESET)
2069                         status |= USB_PORT_STAT_RESET;
2070                 if (temp & PORT_POWER)
2071                         status |= USB_PORT_STAT_POWER;
2072
2073                 put_unaligned(cpu_to_le32(status), (__le32 *) buf);
2074                 break;
2075         case SetHubFeature:
2076                 switch (wValue) {
2077                 case C_HUB_LOCAL_POWER:
2078                 case C_HUB_OVER_CURRENT:
2079                         /* no hub-wide feature/status flags */
2080                         break;
2081                 default:
2082                         goto error;
2083                 }
2084                 break;
2085         case SetPortFeature:
2086                 selector = wIndex >> 8;
2087                 wIndex &= 0xff;
2088                 if (!wIndex || wIndex > ports)
2089                         goto error;
2090                 wIndex--;
2091                 temp = reg_read32(hcd->regs, HC_PORTSC1);
2092                 if (temp & PORT_OWNER)
2093                         break;
2094
2095 /*              temp &= ~PORT_RWC_BITS; */
2096                 switch (wValue) {
2097                 case USB_PORT_FEAT_ENABLE:
2098                         reg_write32(hcd->regs, HC_PORTSC1, temp | PORT_PE);
2099                         break;
2100
2101                 case USB_PORT_FEAT_SUSPEND:
2102                         if ((temp & PORT_PE) == 0
2103                                         || (temp & PORT_RESET) != 0)
2104                                 goto error;
2105
2106                         reg_write32(hcd->regs, HC_PORTSC1, temp | PORT_SUSPEND);
2107                         break;
2108                 case USB_PORT_FEAT_POWER:
2109                         if (HCS_PPC(priv->hcs_params))
2110                                 reg_write32(hcd->regs, HC_PORTSC1,
2111                                                         temp | PORT_POWER);
2112                         break;
2113                 case USB_PORT_FEAT_RESET:
2114                         if (temp & PORT_RESUME)
2115                                 goto error;
2116                         /* line status bits may report this as low speed,
2117                          * which can be fine if this root hub has a
2118                          * transaction translator built in.
2119                          */
2120                         if ((temp & (PORT_PE|PORT_CONNECT)) == PORT_CONNECT
2121                                         && PORT_USB11(temp)) {
2122                                 temp |= PORT_OWNER;
2123                         } else {
2124                                 temp |= PORT_RESET;
2125                                 temp &= ~PORT_PE;
2126
2127                                 /*
2128                                  * caller must wait, then call GetPortStatus
2129                                  * usb 2.0 spec says 50 ms resets on root
2130                                  */
2131                                 priv->reset_done = jiffies +
2132                                         msecs_to_jiffies(50);
2133                         }
2134                         reg_write32(hcd->regs, HC_PORTSC1, temp);
2135                         break;
2136                 default:
2137                         goto error;
2138                 }
2139                 reg_read32(hcd->regs, HC_USBCMD);
2140                 break;
2141
2142         default:
2143 error:
2144                 /* "stall" on error */
2145                 retval = -EPIPE;
2146         }
2147         spin_unlock_irqrestore(&priv->lock, flags);
2148         return retval;
2149 }
2150
2151 static void isp1760_endpoint_disable(struct usb_hcd *usb_hcd,
2152                 struct usb_host_endpoint *ep)
2153 {
2154         struct isp1760_hcd *priv = hcd_to_priv(usb_hcd);
2155         struct isp1760_qh *qh;
2156         struct isp1760_qtd *qtd;
2157         unsigned long flags;
2158
2159         spin_lock_irqsave(&priv->lock, flags);
2160         qh = ep->hcpriv;
2161         if (!qh)
2162                 goto out;
2163
2164         ep->hcpriv = NULL;
2165         do {
2166                 /* more than entry might get removed */
2167                 if (list_empty(&qh->qtd_list))
2168                         break;
2169
2170                 qtd = list_first_entry(&qh->qtd_list, struct isp1760_qtd,
2171                                 qtd_list);
2172
2173                 if (qtd->status & URB_ENQUEUED) {
2174
2175                         spin_unlock_irqrestore(&priv->lock, flags);
2176                         isp1760_urb_dequeue(usb_hcd, qtd->urb, -ECONNRESET);
2177                         spin_lock_irqsave(&priv->lock, flags);
2178                 } else {
2179                         struct urb *urb;
2180
2181                         urb = qtd->urb;
2182                         clean_up_qtdlist(qtd);
2183                         isp1760_urb_done(priv, urb, -ECONNRESET);
2184                 }
2185         } while (1);
2186
2187         qh_destroy(qh);
2188         /* remove requests and leak them.
2189          * ATL are pretty fast done, INT could take a while...
2190          * The latter shoule be removed
2191          */
2192 out:
2193         spin_unlock_irqrestore(&priv->lock, flags);
2194 }
2195
2196 static int isp1760_get_frame(struct usb_hcd *hcd)
2197 {
2198         struct isp1760_hcd *priv = hcd_to_priv(hcd);
2199         u32 fr;
2200
2201         fr = reg_read32(hcd->regs, HC_FRINDEX);
2202         return (fr >> 3) % priv->periodic_size;
2203 }
2204
2205 static void isp1760_stop(struct usb_hcd *hcd)
2206 {
2207         struct isp1760_hcd *priv = hcd_to_priv(hcd);
2208         u32 temp;
2209
2210         isp1760_hub_control(hcd, ClearPortFeature, USB_PORT_FEAT_POWER, 1,
2211                         NULL, 0);
2212         mdelay(20);
2213
2214         spin_lock_irq(&priv->lock);
2215         ehci_reset(priv);
2216         /* Disable IRQ */
2217         temp = reg_read32(hcd->regs, HC_HW_MODE_CTRL);
2218         reg_write32(hcd->regs, HC_HW_MODE_CTRL, temp &= ~HW_GLOBAL_INTR_EN);
2219         spin_unlock_irq(&priv->lock);
2220
2221         reg_write32(hcd->regs, HC_CONFIGFLAG, 0);
2222 }
2223
2224 static void isp1760_shutdown(struct usb_hcd *hcd)
2225 {
2226         u32 command, temp;
2227
2228         isp1760_stop(hcd);
2229         temp = reg_read32(hcd->regs, HC_HW_MODE_CTRL);
2230         reg_write32(hcd->regs, HC_HW_MODE_CTRL, temp &= ~HW_GLOBAL_INTR_EN);
2231
2232         command = reg_read32(hcd->regs, HC_USBCMD);
2233         command &= ~CMD_RUN;
2234         reg_write32(hcd->regs, HC_USBCMD, command);
2235 }
2236
2237 static const struct hc_driver isp1760_hc_driver = {
2238         .description            = "isp1760-hcd",
2239         .product_desc           = "NXP ISP1760 USB Host Controller",
2240         .hcd_priv_size          = sizeof(struct isp1760_hcd),
2241         .irq                    = isp1760_irq,
2242         .flags                  = HCD_MEMORY | HCD_USB2,
2243         .reset                  = isp1760_hc_setup,
2244         .start                  = isp1760_run,
2245         .stop                   = isp1760_stop,
2246         .shutdown               = isp1760_shutdown,
2247         .urb_enqueue            = isp1760_urb_enqueue,
2248         .urb_dequeue            = isp1760_urb_dequeue,
2249         .endpoint_disable       = isp1760_endpoint_disable,
2250         .get_frame_number       = isp1760_get_frame,
2251         .hub_status_data        = isp1760_hub_status_data,
2252         .hub_control            = isp1760_hub_control,
2253 };
2254
2255 int __init init_kmem_once(void)
2256 {
2257         qtd_cachep = kmem_cache_create("isp1760_qtd",
2258                         sizeof(struct isp1760_qtd), 0, SLAB_TEMPORARY |
2259                         SLAB_MEM_SPREAD, NULL);
2260
2261         if (!qtd_cachep)
2262                 return -ENOMEM;
2263
2264         qh_cachep = kmem_cache_create("isp1760_qh", sizeof(struct isp1760_qh),
2265                         0, SLAB_TEMPORARY | SLAB_MEM_SPREAD, NULL);
2266
2267         if (!qh_cachep) {
2268                 kmem_cache_destroy(qtd_cachep);
2269                 return -ENOMEM;
2270         }
2271
2272         return 0;
2273 }
2274
2275 void deinit_kmem_cache(void)
2276 {
2277         kmem_cache_destroy(qtd_cachep);
2278         kmem_cache_destroy(qh_cachep);
2279 }
2280
2281 struct usb_hcd *isp1760_register(phys_addr_t res_start, resource_size_t res_len,
2282                                  int irq, unsigned long irqflags,
2283                                  struct device *dev, const char *busname,
2284                                  unsigned int devflags)
2285 {
2286         struct usb_hcd *hcd;
2287         struct isp1760_hcd *priv;
2288         int ret;
2289
2290         if (usb_disabled())
2291                 return ERR_PTR(-ENODEV);
2292
2293         /* prevent usb-core allocating DMA pages */
2294         dev->dma_mask = NULL;
2295
2296         hcd = usb_create_hcd(&isp1760_hc_driver, dev, dev_name(dev));
2297         if (!hcd)
2298                 return ERR_PTR(-ENOMEM);
2299
2300         priv = hcd_to_priv(hcd);
2301         priv->devflags = devflags;
2302         init_memory(priv);
2303         hcd->regs = ioremap(res_start, res_len);
2304         if (!hcd->regs) {
2305                 ret = -EIO;
2306                 goto err_put;
2307         }
2308
2309         hcd->irq = irq;
2310         hcd->rsrc_start = res_start;
2311         hcd->rsrc_len = res_len;
2312
2313         ret = usb_add_hcd(hcd, irq, irqflags);
2314         if (ret)
2315                 goto err_unmap;
2316
2317         return hcd;
2318
2319 err_unmap:
2320          iounmap(hcd->regs);
2321
2322 err_put:
2323          usb_put_hcd(hcd);
2324
2325          return ERR_PTR(ret);
2326 }
2327
2328 MODULE_DESCRIPTION("Driver for the ISP1760 USB-controller from NXP");
2329 MODULE_AUTHOR("Sebastian Siewior <bigeasy@linuxtronix.de>");
2330 MODULE_LICENSE("GPL v2");