2 * Driver for the NXP ISP1760 chip
4 * However, the code might contain some bugs. What doesn't work for sure is:
7 e The interrupt line is configured as active low, level.
9 * (c) 2007 Sebastian Siewior <bigeasy@linutronix.de>
12 #include <linux/module.h>
13 #include <linux/kernel.h>
14 #include <linux/slab.h>
15 #include <linux/list.h>
16 #include <linux/usb.h>
17 #include <linux/usb/hcd.h>
18 #include <linux/debugfs.h>
19 #include <linux/uaccess.h>
22 #include <asm/unaligned.h>
23 #include <asm/cacheflush.h>
25 #include "isp1760-hcd.h"
27 static struct kmem_cache *qtd_cachep;
28 static struct kmem_cache *qh_cachep;
33 struct inter_packet_info atl_ints[32];
34 struct inter_packet_info int_ints[32];
35 struct memory_chunk memory_pool[BLOCKS];
37 /* periodic schedule support */
38 #define DEFAULT_I_TDPS 1024
39 unsigned periodic_size;
41 unsigned long reset_done;
42 unsigned long next_statechange;
43 unsigned int devflags;
46 static inline struct isp1760_hcd *hcd_to_priv(struct usb_hcd *hcd)
48 return (struct isp1760_hcd *) (hcd->hcd_priv);
50 static inline struct usb_hcd *priv_to_hcd(struct isp1760_hcd *priv)
52 return container_of((void *) priv, struct usb_hcd, hcd_priv);
55 /* Section 2.2 Host Controller Capability Registers */
56 #define HC_LENGTH(p) (((p)>>00)&0x00ff) /* bits 7:0 */
57 #define HC_VERSION(p) (((p)>>16)&0xffff) /* bits 31:16 */
58 #define HCS_INDICATOR(p) ((p)&(1 << 16)) /* true: has port indicators */
59 #define HCS_PPC(p) ((p)&(1 << 4)) /* true: port power control */
60 #define HCS_N_PORTS(p) (((p)>>0)&0xf) /* bits 3:0, ports on HC */
61 #define HCC_ISOC_CACHE(p) ((p)&(1 << 7)) /* true: can cache isoc frame */
62 #define HCC_ISOC_THRES(p) (((p)>>4)&0x7) /* bits 6:4, uframes cached */
64 /* Section 2.3 Host Controller Operational Registers */
65 #define CMD_LRESET (1<<7) /* partial reset (no ports, etc) */
66 #define CMD_RESET (1<<1) /* reset HC not bus */
67 #define CMD_RUN (1<<0) /* start/stop HC */
68 #define STS_PCD (1<<2) /* port change detect */
69 #define FLAG_CF (1<<0) /* true: we'll support "high speed" */
71 #define PORT_OWNER (1<<13) /* true: companion hc owns this port */
72 #define PORT_POWER (1<<12) /* true: has power (see PPC) */
73 #define PORT_USB11(x) (((x) & (3 << 10)) == (1 << 10)) /* USB 1.1 device */
74 #define PORT_RESET (1<<8) /* reset port */
75 #define PORT_SUSPEND (1<<7) /* suspend port */
76 #define PORT_RESUME (1<<6) /* resume it */
77 #define PORT_PE (1<<2) /* port enable */
78 #define PORT_CSC (1<<1) /* connect status change */
79 #define PORT_CONNECT (1<<0) /* device connected */
80 #define PORT_RWC_BITS (PORT_CSC)
83 struct isp1760_qtd *hw_next;
88 /* the rest is HCD-private */
89 struct list_head qtd_list;
95 #define URB_COMPLETE_NOTIFY (1 << 0)
96 #define URB_ENQUEUED (1 << 1)
97 #define URB_TYPE_ATL (1 << 2)
98 #define URB_TYPE_INT (1 << 3)
102 /* first part defined by EHCI spec */
103 struct list_head qtd_list;
104 struct isp1760_hcd *priv;
106 /* periodic schedule info */
107 unsigned short period; /* polling interval */
108 struct usb_device *dev;
114 #define ehci_port_speed(priv, portsc) USB_PORT_STAT_HIGH_SPEED
116 static unsigned int isp1760_readl(__u32 __iomem *regs)
121 static void isp1760_writel(const unsigned int val, __u32 __iomem *regs)
127 * The next two copy via MMIO data to/from the device. memcpy_{to|from}io()
128 * doesn't quite work because some people have to enforce 32-bit access
130 static void priv_read_copy(struct isp1760_hcd *priv, u32 *src,
131 __u32 __iomem *dst, u32 len)
137 printk(KERN_ERR "ERROR: buffer: %p len: %d\n", src, len);
142 *src = __raw_readl(dst);
151 /* in case we have 3, 2 or 1 by left. The dst buffer may not be fully
154 val = isp1760_readl(dst);
166 static void priv_write_copy(const struct isp1760_hcd *priv, const u32 *src,
167 __u32 __iomem *dst, u32 len)
170 __raw_writel(*src, dst);
178 /* in case we have 3, 2 or 1 by left. The buffer is allocated and the
179 * extra bytes should not be read by the HW
182 __raw_writel(*src, dst);
185 /* memory management of the 60kb on the chip from 0x1000 to 0xffff */
186 static void init_memory(struct isp1760_hcd *priv)
192 for (i = 0; i < BLOCK_1_NUM; i++) {
193 priv->memory_pool[i].start = payload;
194 priv->memory_pool[i].size = BLOCK_1_SIZE;
195 priv->memory_pool[i].free = 1;
196 payload += priv->memory_pool[i].size;
200 for (i = BLOCK_1_NUM; i < BLOCK_1_NUM + BLOCK_2_NUM; i++) {
201 priv->memory_pool[i].start = payload;
202 priv->memory_pool[i].size = BLOCK_2_SIZE;
203 priv->memory_pool[i].free = 1;
204 payload += priv->memory_pool[i].size;
208 for (i = BLOCK_1_NUM + BLOCK_2_NUM; i < BLOCKS; i++) {
209 priv->memory_pool[i].start = payload;
210 priv->memory_pool[i].size = BLOCK_3_SIZE;
211 priv->memory_pool[i].free = 1;
212 payload += priv->memory_pool[i].size;
215 BUG_ON(payload - priv->memory_pool[i - 1].size > PAYLOAD_SIZE);
218 static u32 alloc_mem(struct isp1760_hcd *priv, u32 size)
223 return ISP1760_NULL_POINTER;
225 for (i = 0; i < BLOCKS; i++) {
226 if (priv->memory_pool[i].size >= size &&
227 priv->memory_pool[i].free) {
229 priv->memory_pool[i].free = 0;
230 return priv->memory_pool[i].start;
234 printk(KERN_ERR "ISP1760 MEM: can not allocate %d bytes of memory\n",
236 printk(KERN_ERR "Current memory map:\n");
237 for (i = 0; i < BLOCKS; i++) {
238 printk(KERN_ERR "Pool %2d size %4d status: %d\n",
239 i, priv->memory_pool[i].size,
240 priv->memory_pool[i].free);
242 /* XXX maybe -ENOMEM could be possible */
247 static void free_mem(struct isp1760_hcd *priv, u32 mem)
251 if (mem == ISP1760_NULL_POINTER)
254 for (i = 0; i < BLOCKS; i++) {
255 if (priv->memory_pool[i].start == mem) {
257 BUG_ON(priv->memory_pool[i].free);
259 priv->memory_pool[i].free = 1;
264 printk(KERN_ERR "Trying to free not-here-allocated memory :%08x\n",
269 static void isp1760_init_regs(struct usb_hcd *hcd)
271 isp1760_writel(0, hcd->regs + HC_BUFFER_STATUS_REG);
272 isp1760_writel(NO_TRANSFER_ACTIVE, hcd->regs +
273 HC_ATL_PTD_SKIPMAP_REG);
274 isp1760_writel(NO_TRANSFER_ACTIVE, hcd->regs +
275 HC_INT_PTD_SKIPMAP_REG);
276 isp1760_writel(NO_TRANSFER_ACTIVE, hcd->regs +
277 HC_ISO_PTD_SKIPMAP_REG);
279 isp1760_writel(~NO_TRANSFER_ACTIVE, hcd->regs +
280 HC_ATL_PTD_DONEMAP_REG);
281 isp1760_writel(~NO_TRANSFER_ACTIVE, hcd->regs +
282 HC_INT_PTD_DONEMAP_REG);
283 isp1760_writel(~NO_TRANSFER_ACTIVE, hcd->regs +
284 HC_ISO_PTD_DONEMAP_REG);
287 static int handshake(struct isp1760_hcd *priv, void __iomem *ptr,
288 u32 mask, u32 done, int usec)
293 result = isp1760_readl(ptr);
305 /* reset a non-running (STS_HALT == 1) controller */
306 static int ehci_reset(struct isp1760_hcd *priv)
309 struct usb_hcd *hcd = priv_to_hcd(priv);
310 u32 command = isp1760_readl(hcd->regs + HC_USBCMD);
312 command |= CMD_RESET;
313 isp1760_writel(command, hcd->regs + HC_USBCMD);
314 hcd->state = HC_STATE_HALT;
315 priv->next_statechange = jiffies;
316 retval = handshake(priv, hcd->regs + HC_USBCMD,
317 CMD_RESET, 0, 250 * 1000);
321 static void qh_destroy(struct isp1760_qh *qh)
323 BUG_ON(!list_empty(&qh->qtd_list));
324 kmem_cache_free(qh_cachep, qh);
327 static struct isp1760_qh *isp1760_qh_alloc(struct isp1760_hcd *priv,
330 struct isp1760_qh *qh;
332 qh = kmem_cache_zalloc(qh_cachep, flags);
336 INIT_LIST_HEAD(&qh->qtd_list);
341 /* magic numbers that can affect system performance */
342 #define EHCI_TUNE_CERR 3 /* 0-3 qtd retries; 0 == don't stop */
343 #define EHCI_TUNE_RL_HS 4 /* nak throttle; see 4.9 */
344 #define EHCI_TUNE_RL_TT 0
345 #define EHCI_TUNE_MULT_HS 1 /* 1-3 transactions/uframe; 4.10.3 */
346 #define EHCI_TUNE_MULT_TT 1
347 #define EHCI_TUNE_FLS 2 /* (small) 256 frame schedule */
349 /* one-time init, only for memory state */
350 static int priv_init(struct usb_hcd *hcd)
352 struct isp1760_hcd *priv = hcd_to_priv(hcd);
355 spin_lock_init(&priv->lock);
358 * hw default: 1K periodic list heads, one per frame.
359 * periodic_size can shrink by USBCMD update if hcc_params allows.
361 priv->periodic_size = DEFAULT_I_TDPS;
363 /* controllers may cache some of the periodic schedule ... */
364 hcc_params = isp1760_readl(hcd->regs + HC_HCCPARAMS);
365 /* full frame cache */
366 if (HCC_ISOC_CACHE(hcc_params))
368 else /* N microframes cached */
369 priv->i_thresh = 2 + HCC_ISOC_THRES(hcc_params);
374 static int isp1760_hc_setup(struct usb_hcd *hcd)
376 struct isp1760_hcd *priv = hcd_to_priv(hcd);
380 /* Setup HW Mode Control: This assumes a level active-low interrupt */
381 hwmode = HW_DATA_BUS_32BIT;
383 if (priv->devflags & ISP1760_FLAG_BUS_WIDTH_16)
384 hwmode &= ~HW_DATA_BUS_32BIT;
385 if (priv->devflags & ISP1760_FLAG_ANALOG_OC)
386 hwmode |= HW_ANA_DIGI_OC;
387 if (priv->devflags & ISP1760_FLAG_DACK_POL_HIGH)
388 hwmode |= HW_DACK_POL_HIGH;
389 if (priv->devflags & ISP1760_FLAG_DREQ_POL_HIGH)
390 hwmode |= HW_DREQ_POL_HIGH;
391 if (priv->devflags & ISP1760_FLAG_INTR_POL_HIGH)
392 hwmode |= HW_INTR_HIGH_ACT;
393 if (priv->devflags & ISP1760_FLAG_INTR_EDGE_TRIG)
394 hwmode |= HW_INTR_EDGE_TRIG;
397 * We have to set this first in case we're in 16-bit mode.
398 * Write it twice to ensure correct upper bits if switching
401 isp1760_writel(hwmode, hcd->regs + HC_HW_MODE_CTRL);
402 isp1760_writel(hwmode, hcd->regs + HC_HW_MODE_CTRL);
404 isp1760_writel(0xdeadbabe, hcd->regs + HC_SCRATCH_REG);
405 /* Change bus pattern */
406 scratch = isp1760_readl(hcd->regs + HC_CHIP_ID_REG);
407 scratch = isp1760_readl(hcd->regs + HC_SCRATCH_REG);
408 if (scratch != 0xdeadbabe) {
409 printk(KERN_ERR "ISP1760: Scratch test failed.\n");
414 isp1760_init_regs(hcd);
417 isp1760_writel(SW_RESET_RESET_ALL, hcd->regs + HC_RESET_REG);
420 isp1760_writel(SW_RESET_RESET_HC, hcd->regs + HC_RESET_REG);
423 result = ehci_reset(priv);
429 isp1760_info(priv, "bus width: %d, oc: %s\n",
430 (priv->devflags & ISP1760_FLAG_BUS_WIDTH_16) ?
431 16 : 32, (priv->devflags & ISP1760_FLAG_ANALOG_OC) ?
432 "analog" : "digital");
435 isp1760_writel(hwmode | ALL_ATX_RESET, hcd->regs + HC_HW_MODE_CTRL);
437 isp1760_writel(hwmode, hcd->regs + HC_HW_MODE_CTRL);
439 isp1760_writel(INTERRUPT_ENABLE_MASK, hcd->regs + HC_INTERRUPT_REG);
440 isp1760_writel(INTERRUPT_ENABLE_MASK, hcd->regs + HC_INTERRUPT_ENABLE);
443 * PORT 1 Control register of the ISP1760 is the OTG control
444 * register on ISP1761. Since there is no OTG or device controller
445 * support in this driver, we use port 1 as a "normal" USB host port on
448 isp1760_writel(PORT1_POWER | PORT1_INIT2,
449 hcd->regs + HC_PORT1_CTRL);
452 priv->hcs_params = isp1760_readl(hcd->regs + HC_HCSPARAMS);
454 return priv_init(hcd);
457 static void isp1760_init_maps(struct usb_hcd *hcd)
459 /*set last maps, for iso its only 1, else 32 tds bitmap*/
460 isp1760_writel(0x80000000, hcd->regs + HC_ATL_PTD_LASTPTD_REG);
461 isp1760_writel(0x80000000, hcd->regs + HC_INT_PTD_LASTPTD_REG);
462 isp1760_writel(0x00000001, hcd->regs + HC_ISO_PTD_LASTPTD_REG);
465 static void isp1760_enable_interrupts(struct usb_hcd *hcd)
467 isp1760_writel(0, hcd->regs + HC_ATL_IRQ_MASK_AND_REG);
468 isp1760_writel(0, hcd->regs + HC_ATL_IRQ_MASK_OR_REG);
469 isp1760_writel(0, hcd->regs + HC_INT_IRQ_MASK_AND_REG);
470 isp1760_writel(0, hcd->regs + HC_INT_IRQ_MASK_OR_REG);
471 isp1760_writel(0, hcd->regs + HC_ISO_IRQ_MASK_AND_REG);
472 isp1760_writel(0xffffffff, hcd->regs + HC_ISO_IRQ_MASK_OR_REG);
476 static int isp1760_run(struct usb_hcd *hcd)
478 struct isp1760_hcd *priv = hcd_to_priv(hcd);
484 hcd->uses_new_polling = 1;
486 hcd->state = HC_STATE_RUNNING;
487 isp1760_enable_interrupts(hcd);
488 temp = isp1760_readl(hcd->regs + HC_HW_MODE_CTRL);
489 isp1760_writel(temp | HW_GLOBAL_INTR_EN, hcd->regs + HC_HW_MODE_CTRL);
491 command = isp1760_readl(hcd->regs + HC_USBCMD);
492 command &= ~(CMD_LRESET|CMD_RESET);
494 isp1760_writel(command, hcd->regs + HC_USBCMD);
496 retval = handshake(priv, hcd->regs + HC_USBCMD, CMD_RUN, CMD_RUN,
503 * Spec says to write FLAG_CF as last config action, priv code grabs
504 * the semaphore while doing so.
506 down_write(&ehci_cf_port_reset_rwsem);
507 isp1760_writel(FLAG_CF, hcd->regs + HC_CONFIGFLAG);
509 retval = handshake(priv, hcd->regs + HC_CONFIGFLAG, FLAG_CF, FLAG_CF,
511 up_write(&ehci_cf_port_reset_rwsem);
515 chipid = isp1760_readl(hcd->regs + HC_CHIP_ID_REG);
516 isp1760_info(priv, "USB ISP %04x HW rev. %d started\n", chipid & 0xffff,
519 /* PTD Register Init Part 2, Step 28 */
521 isp1760_init_maps(hcd);
523 /* GRR this is run-once init(), being done every time the HC starts.
524 * So long as they're part of class devices, we can't do it init()
525 * since the class device isn't created that early.
530 static u32 base_to_chip(u32 base)
532 return ((base - 0x400) >> 3);
535 static void transform_into_atl(struct isp1760_hcd *priv, struct isp1760_qh *qh,
536 struct isp1760_qtd *qtd, struct urb *urb,
537 u32 payload, struct ptd *ptd)
547 u32 nak = NAK_COUNTER;
549 /* according to 3.6.2, max packet len can not be > 0x400 */
550 maxpacket = usb_maxpacket(urb->dev, urb->pipe, usb_pipeout(urb->pipe));
551 multi = 1 + ((maxpacket >> 11) & 0x3);
556 dw0 |= PTD_LENGTH(qtd->length);
557 dw0 |= PTD_MAXPACKET(maxpacket);
558 dw0 |= PTD_ENDPOINT(usb_pipeendpoint(urb->pipe));
559 dw1 = usb_pipeendpoint(urb->pipe) >> 1;
562 dw1 |= PTD_DEVICE_ADDR(usb_pipedevice(urb->pipe));
564 pid_code = qtd->packet_type;
565 dw1 |= PTD_PID_TOKEN(pid_code);
567 if (usb_pipebulk(urb->pipe))
568 dw1 |= PTD_TRANS_BULK;
569 else if (usb_pipeint(urb->pipe))
570 dw1 |= PTD_TRANS_INT;
572 if (urb->dev->speed != USB_SPEED_HIGH) {
573 /* split transaction */
575 dw1 |= PTD_TRANS_SPLIT;
576 if (urb->dev->speed == USB_SPEED_LOW)
577 dw1 |= PTD_SE_USB_LOSPEED;
579 dw1 |= PTD_PORT_NUM(urb->dev->ttport);
580 dw1 |= PTD_HUB_NUM(urb->dev->tt->hub->devnum);
582 /* SE bit for Split INT transfers */
583 if (usb_pipeint(urb->pipe) &&
584 (urb->dev->speed == USB_SPEED_LOW))
591 dw0 |= PTD_MULTI(multi);
592 if (usb_pipecontrol(urb->pipe) || usb_pipebulk(urb->pipe))
599 dw2 |= PTD_DATA_START_ADDR(base_to_chip(payload));
600 dw2 |= PTD_RL_CNT(rl);
601 dw3 |= PTD_NAC_CNT(nak);
604 if (usb_pipecontrol(urb->pipe))
605 dw3 |= PTD_DATA_TOGGLE(qtd->toggle);
612 dw3 |= PTD_CERR(ERR_COUNTER);
614 memset(ptd, 0, sizeof(*ptd));
616 ptd->dw0 = cpu_to_le32(dw0);
617 ptd->dw1 = cpu_to_le32(dw1);
618 ptd->dw2 = cpu_to_le32(dw2);
619 ptd->dw3 = cpu_to_le32(dw3);
622 static void transform_add_int(struct isp1760_hcd *priv, struct isp1760_qh *qh,
623 struct isp1760_qtd *qtd, struct urb *urb,
624 u32 payload, struct ptd *ptd)
633 maxpacket = usb_maxpacket(urb->dev, urb->pipe, usb_pipeout(urb->pipe));
634 multi = 1 + ((maxpacket >> 11) & 0x3);
636 /* length of the data per uframe */
637 maxpacket = multi * maxpacket;
639 numberofusofs = urb->transfer_buffer_length / maxpacket;
640 if (urb->transfer_buffer_length % maxpacket)
645 for (i = 0; i < numberofusofs; i++) {
650 if (urb->dev->speed != USB_SPEED_HIGH) {
652 ptd->dw5 = cpu_to_le32(0x1c);
654 if (qh->period >= 32)
655 period = qh->period / 2;
662 period = qh->period/8;
669 if (qh->period >= 8) {
670 /* millisecond period */
671 period = (period << 3);
673 /* usof based tranmsfers */
674 /* minimum 4 usofs */
679 ptd->dw2 |= cpu_to_le32(period);
680 ptd->dw4 = cpu_to_le32(usof);
683 static void transform_into_int(struct isp1760_hcd *priv, struct isp1760_qh *qh,
684 struct isp1760_qtd *qtd, struct urb *urb,
685 u32 payload, struct ptd *ptd)
687 transform_into_atl(priv, qh, qtd, urb, payload, ptd);
688 transform_add_int(priv, qh, qtd, urb, payload, ptd);
691 static int qtd_fill(struct isp1760_qtd *qtd, void *databuffer, size_t len,
696 qtd->data_buffer = databuffer;
697 qtd->packet_type = GET_QTD_TOKEN_TYPE(token);
698 qtd->toggle = GET_DATA_TOGGLE(token);
700 if (len > HC_ATL_PL_SIZE)
701 count = HC_ATL_PL_SIZE;
709 static int check_error(struct ptd *ptd)
714 dw3 = le32_to_cpu(ptd->dw3);
715 if (dw3 & DW3_HALT_BIT) {
718 if (dw3 & DW3_ERROR_BIT)
719 pr_err("error bit is set in DW3\n");
722 if (dw3 & DW3_QTD_ACTIVE) {
723 printk(KERN_ERR "transfer active bit is set DW3\n");
724 printk(KERN_ERR "nak counter: %d, rl: %d\n", (dw3 >> 19) & 0xf,
725 (le32_to_cpu(ptd->dw2) >> 25) & 0xf);
731 static void check_int_err_status(u32 dw4)
737 for (i = 0; i < 8; i++) {
740 printk(KERN_ERR "ERROR: under run , %d\n", i);
744 printk(KERN_ERR "ERROR: transaction error, %d\n", i);
748 printk(KERN_ERR "ERROR: babble error, %d\n", i);
755 static void enqueue_one_qtd(struct isp1760_qtd *qtd, struct isp1760_hcd *priv,
759 struct usb_hcd *hcd = priv_to_hcd(priv);
761 token = qtd->packet_type;
763 if (qtd->length && (qtd->length <= HC_ATL_PL_SIZE)) {
769 priv_write_copy(priv, qtd->data_buffer,
776 static void enqueue_one_atl_qtd(u32 atl_regs, u32 payload,
777 struct isp1760_hcd *priv, struct isp1760_qh *qh,
778 struct urb *urb, u32 slot, struct isp1760_qtd *qtd)
781 struct usb_hcd *hcd = priv_to_hcd(priv);
783 transform_into_atl(priv, qh, qtd, urb, payload, &ptd);
784 priv_write_copy(priv, (u32 *)&ptd, hcd->regs + atl_regs, sizeof(ptd));
785 enqueue_one_qtd(qtd, priv, payload);
787 priv->atl_ints[slot].urb = urb;
788 priv->atl_ints[slot].qh = qh;
789 priv->atl_ints[slot].qtd = qtd;
790 priv->atl_ints[slot].data_buffer = qtd->data_buffer;
791 priv->atl_ints[slot].payload = payload;
792 qtd->status |= URB_ENQUEUED | URB_TYPE_ATL;
793 qtd->status |= slot << 16;
796 static void enqueue_one_int_qtd(u32 int_regs, u32 payload,
797 struct isp1760_hcd *priv, struct isp1760_qh *qh,
798 struct urb *urb, u32 slot, struct isp1760_qtd *qtd)
801 struct usb_hcd *hcd = priv_to_hcd(priv);
803 transform_into_int(priv, qh, qtd, urb, payload, &ptd);
804 priv_write_copy(priv, (u32 *)&ptd, hcd->regs + int_regs, sizeof(ptd));
805 enqueue_one_qtd(qtd, priv, payload);
807 priv->int_ints[slot].urb = urb;
808 priv->int_ints[slot].qh = qh;
809 priv->int_ints[slot].qtd = qtd;
810 priv->int_ints[slot].data_buffer = qtd->data_buffer;
811 priv->int_ints[slot].payload = payload;
812 qtd->status |= URB_ENQUEUED | URB_TYPE_INT;
813 qtd->status |= slot << 16;
816 static void enqueue_an_ATL_packet(struct usb_hcd *hcd, struct isp1760_qh *qh,
817 struct isp1760_qtd *qtd)
819 struct isp1760_hcd *priv = hcd_to_priv(hcd);
820 u32 skip_map, or_map;
823 u32 atl_regs, payload;
827 * When this function is called from the interrupt handler to enqueue
828 * a follow-up packet, the SKIP register gets written and read back
829 * almost immediately. With ISP1761, this register requires a delay of
830 * 195ns between a write and subsequent read (see section 15.1.1.3).
833 skip_map = isp1760_readl(hcd->regs + HC_ATL_PTD_SKIPMAP_REG);
836 slot = __ffs(skip_map);
837 queue_entry = 1 << slot;
839 atl_regs = ATL_REGS_OFFSET + slot * sizeof(struct ptd);
841 payload = alloc_mem(priv, qtd->length);
843 enqueue_one_atl_qtd(atl_regs, payload, priv, qh, qtd->urb, slot, qtd);
845 or_map = isp1760_readl(hcd->regs + HC_ATL_IRQ_MASK_OR_REG);
846 or_map |= queue_entry;
847 isp1760_writel(or_map, hcd->regs + HC_ATL_IRQ_MASK_OR_REG);
849 skip_map &= ~queue_entry;
850 isp1760_writel(skip_map, hcd->regs + HC_ATL_PTD_SKIPMAP_REG);
852 buffstatus = isp1760_readl(hcd->regs + HC_BUFFER_STATUS_REG);
853 buffstatus |= ATL_BUFFER;
854 isp1760_writel(buffstatus, hcd->regs + HC_BUFFER_STATUS_REG);
857 static void enqueue_an_INT_packet(struct usb_hcd *hcd, struct isp1760_qh *qh,
858 struct isp1760_qtd *qtd)
860 struct isp1760_hcd *priv = hcd_to_priv(hcd);
861 u32 skip_map, or_map;
864 u32 int_regs, payload;
868 * When this function is called from the interrupt handler to enqueue
869 * a follow-up packet, the SKIP register gets written and read back
870 * almost immediately. With ISP1761, this register requires a delay of
871 * 195ns between a write and subsequent read (see section 15.1.1.3).
874 skip_map = isp1760_readl(hcd->regs + HC_INT_PTD_SKIPMAP_REG);
877 slot = __ffs(skip_map);
878 queue_entry = 1 << slot;
880 int_regs = INT_REGS_OFFSET + slot * sizeof(struct ptd);
882 payload = alloc_mem(priv, qtd->length);
884 enqueue_one_int_qtd(int_regs, payload, priv, qh, qtd->urb, slot, qtd);
886 or_map = isp1760_readl(hcd->regs + HC_INT_IRQ_MASK_OR_REG);
887 or_map |= queue_entry;
888 isp1760_writel(or_map, hcd->regs + HC_INT_IRQ_MASK_OR_REG);
890 skip_map &= ~queue_entry;
891 isp1760_writel(skip_map, hcd->regs + HC_INT_PTD_SKIPMAP_REG);
893 buffstatus = isp1760_readl(hcd->regs + HC_BUFFER_STATUS_REG);
894 buffstatus |= INT_BUFFER;
895 isp1760_writel(buffstatus, hcd->regs + HC_BUFFER_STATUS_REG);
898 static void isp1760_urb_done(struct isp1760_hcd *priv, struct urb *urb, int status)
899 __releases(priv->lock)
900 __acquires(priv->lock)
902 if (!urb->unlinked) {
903 if (status == -EINPROGRESS)
907 if (usb_pipein(urb->pipe) && usb_pipetype(urb->pipe) != PIPE_CONTROL) {
909 for (ptr = urb->transfer_buffer;
910 ptr < urb->transfer_buffer + urb->transfer_buffer_length;
912 flush_dcache_page(virt_to_page(ptr));
915 /* complete() can reenter this HCD */
916 usb_hcd_unlink_urb_from_ep(priv_to_hcd(priv), urb);
917 spin_unlock(&priv->lock);
918 usb_hcd_giveback_urb(priv_to_hcd(priv), urb, status);
919 spin_lock(&priv->lock);
922 static void isp1760_qtd_free(struct isp1760_qtd *qtd)
924 kmem_cache_free(qtd_cachep, qtd);
927 static struct isp1760_qtd *clean_this_qtd(struct isp1760_qtd *qtd)
929 struct isp1760_qtd *tmp_qtd;
931 tmp_qtd = qtd->hw_next;
932 list_del(&qtd->qtd_list);
933 isp1760_qtd_free(qtd);
938 * Remove this QTD from the QH list and free its memory. If this QTD
939 * isn't the last one than remove also his successor(s).
940 * Returns the QTD which is part of an new URB and should be enqueued.
942 static struct isp1760_qtd *clean_up_qtdlist(struct isp1760_qtd *qtd)
944 struct isp1760_qtd *tmp_qtd;
948 tmp_qtd = qtd->hw_next;
949 last_one = qtd->status & URB_COMPLETE_NOTIFY;
950 list_del(&qtd->qtd_list);
951 isp1760_qtd_free(qtd);
953 } while (!last_one && qtd);
958 static void do_atl_int(struct usb_hcd *usb_hcd)
960 struct isp1760_hcd *priv = hcd_to_priv(usb_hcd);
961 u32 done_map, skip_map;
963 struct urb *urb = NULL;
970 u32 status = -EINVAL;
972 struct isp1760_qtd *qtd;
973 struct isp1760_qh *qh;
977 done_map = isp1760_readl(usb_hcd->regs +
978 HC_ATL_PTD_DONEMAP_REG);
979 skip_map = isp1760_readl(usb_hcd->regs +
980 HC_ATL_PTD_SKIPMAP_REG);
982 or_map = isp1760_readl(usb_hcd->regs + HC_ATL_IRQ_MASK_OR_REG);
984 isp1760_writel(or_map, usb_hcd->regs + HC_ATL_IRQ_MASK_OR_REG);
986 atl_regs_base = ATL_REGS_OFFSET;
994 queue_entry = __ffs(done_map);
995 done_map &= ~(1 << queue_entry);
996 skip_map |= 1 << queue_entry;
998 atl_regs = atl_regs_base + queue_entry * sizeof(struct ptd);
1000 urb = priv->atl_ints[queue_entry].urb;
1001 qtd = priv->atl_ints[queue_entry].qtd;
1002 qh = priv->atl_ints[queue_entry].qh;
1003 payload = priv->atl_ints[queue_entry].payload;
1006 printk(KERN_ERR "qh is 0\n");
1009 isp1760_writel(atl_regs + ISP_BANK(0), usb_hcd->regs +
1011 isp1760_writel(payload + ISP_BANK(1), usb_hcd->regs +
1014 * write bank1 address twice to ensure the 90ns delay (time
1015 * between BANK0 write and the priv_read_copy() call is at
1016 * least 3*t_WHWL + 2*t_w11 = 3*25ns + 2*17ns = 109ns)
1018 isp1760_writel(payload + ISP_BANK(1), usb_hcd->regs +
1021 priv_read_copy(priv, (u32 *)&ptd, usb_hcd->regs + atl_regs +
1022 ISP_BANK(0), sizeof(ptd));
1024 dw1 = le32_to_cpu(ptd.dw1);
1025 dw2 = le32_to_cpu(ptd.dw2);
1026 dw3 = le32_to_cpu(ptd.dw3);
1027 rl = (dw2 >> 25) & 0x0f;
1028 nakcount = (dw3 >> 19) & 0xf;
1030 /* Transfer Error, *but* active and no HALT -> reload */
1031 if ((dw3 & DW3_ERROR_BIT) && (dw3 & DW3_QTD_ACTIVE) &&
1032 !(dw3 & DW3_HALT_BIT)) {
1034 /* according to ppriv code, we have to
1035 * reload this one if trasfered bytes != requested bytes
1036 * else act like everything went smooth..
1037 * XXX This just doesn't feel right and hasn't
1041 length = PTD_XFERRED_LENGTH(dw3);
1042 printk(KERN_ERR "Should reload now.... transfered %d "
1043 "of %zu\n", length, qtd->length);
1047 if (!nakcount && (dw3 & DW3_QTD_ACTIVE)) {
1051 * NAKs are handled in HW by the chip. Usually if the
1052 * device is not able to send data fast enough.
1053 * This happens mostly on slower hardware.
1055 printk(KERN_NOTICE "Reloading ptd %p/%p... qh %p read: "
1056 "%d of %zu done: %08x cur: %08x\n", qtd,
1057 urb, qh, PTD_XFERRED_LENGTH(dw3),
1058 qtd->length, done_map,
1059 (1 << queue_entry));
1061 /* RL counter = ERR counter */
1062 dw3 &= ~(0xf << 19);
1064 dw3 &= ~(3 << (55 - 32));
1065 dw3 |= ERR_COUNTER << (55 - 32);
1068 * It is not needed to write skip map back because it
1069 * is unchanged. Just make sure that this entry is
1070 * unskipped once it gets written to the HW.
1072 skip_map &= ~(1 << queue_entry);
1073 or_map = isp1760_readl(usb_hcd->regs +
1074 HC_ATL_IRQ_MASK_OR_REG);
1075 or_map |= 1 << queue_entry;
1076 isp1760_writel(or_map, usb_hcd->regs +
1077 HC_ATL_IRQ_MASK_OR_REG);
1079 ptd.dw3 = cpu_to_le32(dw3);
1080 priv_write_copy(priv, (u32 *)&ptd, usb_hcd->regs +
1081 atl_regs, sizeof(ptd));
1083 ptd.dw0 |= cpu_to_le32(PTD_VALID);
1084 priv_write_copy(priv, (u32 *)&ptd, usb_hcd->regs +
1085 atl_regs, sizeof(ptd));
1087 buffstatus = isp1760_readl(usb_hcd->regs +
1088 HC_BUFFER_STATUS_REG);
1089 buffstatus |= ATL_BUFFER;
1090 isp1760_writel(buffstatus, usb_hcd->regs +
1091 HC_BUFFER_STATUS_REG);
1095 error = check_error(&ptd);
1098 priv->atl_ints[queue_entry].qh->toggle = 0;
1099 priv->atl_ints[queue_entry].qh->ping = 0;
1100 urb->status = -EPIPE;
1103 printk(KERN_ERR "Error in %s().\n", __func__);
1104 printk(KERN_ERR "IN dw0: %08x dw1: %08x dw2: %08x "
1105 "dw3: %08x dw4: %08x dw5: %08x dw6: "
1107 ptd.dw0, ptd.dw1, ptd.dw2, ptd.dw3,
1108 ptd.dw4, ptd.dw5, ptd.dw6, ptd.dw7);
1111 if (usb_pipetype(urb->pipe) == PIPE_BULK) {
1112 priv->atl_ints[queue_entry].qh->toggle = dw3 &
1114 priv->atl_ints[queue_entry].qh->ping = dw3 &
1119 length = PTD_XFERRED_LENGTH(dw3);
1121 switch (DW1_GET_PID(dw1)) {
1123 priv_read_copy(priv,
1124 priv->atl_ints[queue_entry].data_buffer,
1125 usb_hcd->regs + payload + ISP_BANK(1),
1130 urb->actual_length += length;
1137 priv->atl_ints[queue_entry].data_buffer = NULL;
1138 priv->atl_ints[queue_entry].urb = NULL;
1139 priv->atl_ints[queue_entry].qtd = NULL;
1140 priv->atl_ints[queue_entry].qh = NULL;
1142 free_mem(priv, payload);
1144 isp1760_writel(skip_map, usb_hcd->regs +
1145 HC_ATL_PTD_SKIPMAP_REG);
1147 if (urb->status == -EPIPE) {
1148 /* HALT was received */
1150 qtd = clean_up_qtdlist(qtd);
1151 isp1760_urb_done(priv, urb, urb->status);
1153 } else if (usb_pipebulk(urb->pipe) && (length < qtd->length)) {
1154 /* short BULK received */
1156 if (urb->transfer_flags & URB_SHORT_NOT_OK) {
1157 urb->status = -EREMOTEIO;
1158 isp1760_dbg(priv, "short bulk, %d instead %zu "
1159 "with URB_SHORT_NOT_OK flag.\n",
1160 length, qtd->length);
1163 if (urb->status == -EINPROGRESS)
1166 qtd = clean_up_qtdlist(qtd);
1168 isp1760_urb_done(priv, urb, urb->status);
1170 } else if (qtd->status & URB_COMPLETE_NOTIFY) {
1171 /* that was the last qtd of that URB */
1173 if (urb->status == -EINPROGRESS)
1176 qtd = clean_this_qtd(qtd);
1177 isp1760_urb_done(priv, urb, urb->status);
1180 /* next QTD of this URB */
1182 qtd = clean_this_qtd(qtd);
1187 enqueue_an_ATL_packet(usb_hcd, qh, qtd);
1189 skip_map = isp1760_readl(usb_hcd->regs +
1190 HC_ATL_PTD_SKIPMAP_REG);
1194 static void do_intl_int(struct usb_hcd *usb_hcd)
1196 struct isp1760_hcd *priv = hcd_to_priv(usb_hcd);
1197 u32 done_map, skip_map;
1199 struct urb *urb = NULL;
1207 struct isp1760_qtd *qtd;
1208 struct isp1760_qh *qh;
1210 done_map = isp1760_readl(usb_hcd->regs +
1211 HC_INT_PTD_DONEMAP_REG);
1212 skip_map = isp1760_readl(usb_hcd->regs +
1213 HC_INT_PTD_SKIPMAP_REG);
1215 or_map = isp1760_readl(usb_hcd->regs + HC_INT_IRQ_MASK_OR_REG);
1216 or_map &= ~done_map;
1217 isp1760_writel(or_map, usb_hcd->regs + HC_INT_IRQ_MASK_OR_REG);
1219 int_regs_base = INT_REGS_OFFSET;
1225 queue_entry = __ffs(done_map);
1226 done_map &= ~(1 << queue_entry);
1227 skip_map |= 1 << queue_entry;
1229 int_regs = int_regs_base + queue_entry * sizeof(struct ptd);
1230 urb = priv->int_ints[queue_entry].urb;
1231 qtd = priv->int_ints[queue_entry].qtd;
1232 qh = priv->int_ints[queue_entry].qh;
1233 payload = priv->int_ints[queue_entry].payload;
1236 printk(KERN_ERR "(INT) qh is 0\n");
1240 isp1760_writel(int_regs + ISP_BANK(0), usb_hcd->regs +
1242 isp1760_writel(payload + ISP_BANK(1), usb_hcd->regs +
1245 * write bank1 address twice to ensure the 90ns delay (time
1246 * between BANK0 write and the priv_read_copy() call is at
1247 * least 3*t_WHWL + 2*t_w11 = 3*25ns + 2*17ns = 92ns)
1249 isp1760_writel(payload + ISP_BANK(1), usb_hcd->regs +
1252 priv_read_copy(priv, (u32 *)&ptd, usb_hcd->regs + int_regs +
1253 ISP_BANK(0), sizeof(ptd));
1254 dw1 = le32_to_cpu(ptd.dw1);
1255 dw3 = le32_to_cpu(ptd.dw3);
1256 check_int_err_status(le32_to_cpu(ptd.dw4));
1258 error = check_error(&ptd);
1261 printk(KERN_ERR "Error in %s().\n", __func__);
1262 printk(KERN_ERR "IN dw0: %08x dw1: %08x dw2: %08x "
1263 "dw3: %08x dw4: %08x dw5: %08x dw6: "
1265 ptd.dw0, ptd.dw1, ptd.dw2, ptd.dw3,
1266 ptd.dw4, ptd.dw5, ptd.dw6, ptd.dw7);
1268 urb->status = -EPIPE;
1269 priv->int_ints[queue_entry].qh->toggle = 0;
1270 priv->int_ints[queue_entry].qh->ping = 0;
1273 priv->int_ints[queue_entry].qh->toggle =
1275 priv->int_ints[queue_entry].qh->ping = dw3 & (1 << 26);
1278 if (urb->dev->speed != USB_SPEED_HIGH)
1279 length = PTD_XFERRED_LENGTH_LO(dw3);
1281 length = PTD_XFERRED_LENGTH(dw3);
1284 switch (DW1_GET_PID(dw1)) {
1286 priv_read_copy(priv,
1287 priv->int_ints[queue_entry].data_buffer,
1288 usb_hcd->regs + payload + ISP_BANK(1),
1292 urb->actual_length += length;
1299 priv->int_ints[queue_entry].data_buffer = NULL;
1300 priv->int_ints[queue_entry].urb = NULL;
1301 priv->int_ints[queue_entry].qtd = NULL;
1302 priv->int_ints[queue_entry].qh = NULL;
1304 isp1760_writel(skip_map, usb_hcd->regs +
1305 HC_INT_PTD_SKIPMAP_REG);
1306 free_mem(priv, payload);
1308 if (urb->status == -EPIPE) {
1311 qtd = clean_up_qtdlist(qtd);
1312 isp1760_urb_done(priv, urb, urb->status);
1314 } else if (qtd->status & URB_COMPLETE_NOTIFY) {
1316 if (urb->status == -EINPROGRESS)
1319 qtd = clean_this_qtd(qtd);
1320 isp1760_urb_done(priv, urb, urb->status);
1323 /* next QTD of this URB */
1325 qtd = clean_this_qtd(qtd);
1330 enqueue_an_INT_packet(usb_hcd, qh, qtd);
1332 skip_map = isp1760_readl(usb_hcd->regs +
1333 HC_INT_PTD_SKIPMAP_REG);
1337 #define max_packet(wMaxPacketSize) ((wMaxPacketSize) & 0x07ff)
1338 static struct isp1760_qh *qh_make(struct isp1760_hcd *priv, struct urb *urb,
1341 struct isp1760_qh *qh;
1344 qh = isp1760_qh_alloc(priv, flags);
1349 * init endpoint/device data for this QH
1351 is_input = usb_pipein(urb->pipe);
1352 type = usb_pipetype(urb->pipe);
1354 if (type == PIPE_INTERRUPT) {
1356 if (urb->dev->speed == USB_SPEED_HIGH) {
1358 qh->period = urb->interval >> 3;
1359 if (qh->period == 0 && urb->interval != 1) {
1360 /* NOTE interval 2 or 4 uframes could work.
1361 * But interval 1 scheduling is simpler, and
1362 * includes high bandwidth.
1364 printk(KERN_ERR "intr period %d uframes, NYET!",
1370 qh->period = urb->interval;
1374 /* support for tt scheduling, and access to toggles */
1377 if (!usb_pipecontrol(urb->pipe))
1378 usb_settoggle(urb->dev, usb_pipeendpoint(urb->pipe), !is_input,
1384 * For control/bulk/interrupt, return QH with these TDs appended.
1385 * Allocates and initializes the QH if necessary.
1386 * Returns null if it can't allocate a QH it needs to.
1387 * If the QH has TDs (urbs) already, that's great.
1389 static struct isp1760_qh *qh_append_tds(struct isp1760_hcd *priv,
1390 struct urb *urb, struct list_head *qtd_list, int epnum,
1393 struct isp1760_qh *qh;
1394 struct isp1760_qtd *qtd;
1395 struct isp1760_qtd *prev_qtd;
1397 qh = (struct isp1760_qh *)*ptr;
1399 /* can't sleep here, we have priv->lock... */
1400 qh = qh_make(priv, urb, GFP_ATOMIC);
1406 qtd = list_entry(qtd_list->next, struct isp1760_qtd,
1408 if (!list_empty(&qh->qtd_list))
1409 prev_qtd = list_entry(qh->qtd_list.prev,
1410 struct isp1760_qtd, qtd_list);
1414 list_splice(qtd_list, qh->qtd_list.prev);
1416 BUG_ON(prev_qtd->hw_next);
1417 prev_qtd->hw_next = qtd;
1424 static void qtd_list_free(struct isp1760_hcd *priv, struct urb *urb,
1425 struct list_head *qtd_list)
1427 struct list_head *entry, *temp;
1429 list_for_each_safe(entry, temp, qtd_list) {
1430 struct isp1760_qtd *qtd;
1432 qtd = list_entry(entry, struct isp1760_qtd, qtd_list);
1433 list_del(&qtd->qtd_list);
1434 isp1760_qtd_free(qtd);
1438 static int isp1760_prepare_enqueue(struct isp1760_hcd *priv, struct urb *urb,
1439 struct list_head *qtd_list, gfp_t mem_flags, packet_enqueue *p)
1441 struct isp1760_qtd *qtd;
1443 unsigned long flags;
1444 struct isp1760_qh *qh = NULL;
1448 qtd = list_entry(qtd_list->next, struct isp1760_qtd, qtd_list);
1449 epnum = urb->ep->desc.bEndpointAddress;
1451 spin_lock_irqsave(&priv->lock, flags);
1452 if (!HCD_HW_ACCESSIBLE(priv_to_hcd(priv))) {
1456 rc = usb_hcd_link_urb_to_ep(priv_to_hcd(priv), urb);
1460 qh = urb->ep->hcpriv;
1462 qh_busy = !list_empty(&qh->qtd_list);
1466 qh = qh_append_tds(priv, urb, qtd_list, epnum, &urb->ep->hcpriv);
1468 usb_hcd_unlink_urb_from_ep(priv_to_hcd(priv), urb);
1474 p(priv_to_hcd(priv), qh, qtd);
1477 spin_unlock_irqrestore(&priv->lock, flags);
1479 qtd_list_free(priv, urb, qtd_list);
1483 static struct isp1760_qtd *isp1760_qtd_alloc(struct isp1760_hcd *priv,
1486 struct isp1760_qtd *qtd;
1488 qtd = kmem_cache_zalloc(qtd_cachep, flags);
1490 INIT_LIST_HEAD(&qtd->qtd_list);
1496 * create a list of filled qtds for this URB; won't link into qh.
1498 static struct list_head *qh_urb_transaction(struct isp1760_hcd *priv,
1499 struct urb *urb, struct list_head *head, gfp_t flags)
1501 struct isp1760_qtd *qtd, *qtd_prev;
1508 * URBs map to sequences of QTDs: one logical transaction
1510 qtd = isp1760_qtd_alloc(priv, flags);
1514 list_add_tail(&qtd->qtd_list, head);
1516 urb->status = -EINPROGRESS;
1519 /* for split transactions, SplitXState initialized to zero */
1521 len = urb->transfer_buffer_length;
1522 is_input = usb_pipein(urb->pipe);
1523 if (usb_pipecontrol(urb->pipe)) {
1525 qtd_fill(qtd, urb->setup_packet,
1526 sizeof(struct usb_ctrlrequest),
1529 /* ... and always at least one more pid */
1530 token ^= DATA_TOGGLE;
1532 qtd = isp1760_qtd_alloc(priv, flags);
1536 qtd_prev->hw_next = qtd;
1537 list_add_tail(&qtd->qtd_list, head);
1539 /* for zero length DATA stages, STATUS is always IN */
1545 * data transfer stage: buffer setup
1547 buf = urb->transfer_buffer;
1554 maxpacket = max_packet(usb_maxpacket(urb->dev, urb->pipe, !is_input));
1557 * buffer gets wrapped in one or more qtds;
1558 * last one may be "short" (including zero len)
1559 * and may serve as a control status ack
1565 /* XXX This looks like usb storage / SCSI bug */
1566 printk(KERN_ERR "buf is null, dma is %08lx len is %d\n",
1567 (long unsigned)urb->transfer_dma, len);
1571 this_qtd_len = qtd_fill(qtd, buf, len, token);
1572 len -= this_qtd_len;
1573 buf += this_qtd_len;
1575 /* qh makes control packets use qtd toggle; maybe switch it */
1576 if ((maxpacket & (this_qtd_len + (maxpacket - 1))) == 0)
1577 token ^= DATA_TOGGLE;
1583 qtd = isp1760_qtd_alloc(priv, flags);
1587 qtd_prev->hw_next = qtd;
1588 list_add_tail(&qtd->qtd_list, head);
1592 * control requests may need a terminating data "status" ack;
1593 * bulk ones may need a terminating short packet (zero length).
1595 if (urb->transfer_buffer_length != 0) {
1598 if (usb_pipecontrol(urb->pipe)) {
1600 /* "in" <--> "out" */
1603 token |= DATA_TOGGLE;
1604 } else if (usb_pipebulk(urb->pipe)
1605 && (urb->transfer_flags & URB_ZERO_PACKET)
1606 && !(urb->transfer_buffer_length % maxpacket)) {
1611 qtd = isp1760_qtd_alloc(priv, flags);
1615 qtd_prev->hw_next = qtd;
1616 list_add_tail(&qtd->qtd_list, head);
1618 /* never any data in such packets */
1619 qtd_fill(qtd, NULL, 0, token);
1623 qtd->status = URB_COMPLETE_NOTIFY;
1627 qtd_list_free(priv, urb, head);
1631 static int isp1760_urb_enqueue(struct usb_hcd *hcd, struct urb *urb,
1634 struct isp1760_hcd *priv = hcd_to_priv(hcd);
1635 struct list_head qtd_list;
1638 INIT_LIST_HEAD(&qtd_list);
1640 switch (usb_pipetype(urb->pipe)) {
1644 if (!qh_urb_transaction(priv, urb, &qtd_list, mem_flags))
1646 pe = enqueue_an_ATL_packet;
1649 case PIPE_INTERRUPT:
1650 if (!qh_urb_transaction(priv, urb, &qtd_list, mem_flags))
1652 pe = enqueue_an_INT_packet;
1655 case PIPE_ISOCHRONOUS:
1656 printk(KERN_ERR "PIPE_ISOCHRONOUS ain't supported\n");
1661 return isp1760_prepare_enqueue(priv, urb, &qtd_list, mem_flags, pe);
1664 static int isp1760_urb_dequeue(struct usb_hcd *hcd, struct urb *urb,
1667 struct isp1760_hcd *priv = hcd_to_priv(hcd);
1668 struct inter_packet_info *ints;
1670 u32 reg_base, or_reg, skip_reg;
1671 unsigned long flags;
1675 switch (usb_pipetype(urb->pipe)) {
1676 case PIPE_ISOCHRONOUS:
1680 case PIPE_INTERRUPT:
1681 ints = priv->int_ints;
1682 reg_base = INT_REGS_OFFSET;
1683 or_reg = HC_INT_IRQ_MASK_OR_REG;
1684 skip_reg = HC_INT_PTD_SKIPMAP_REG;
1685 pe = enqueue_an_INT_packet;
1689 ints = priv->atl_ints;
1690 reg_base = ATL_REGS_OFFSET;
1691 or_reg = HC_ATL_IRQ_MASK_OR_REG;
1692 skip_reg = HC_ATL_PTD_SKIPMAP_REG;
1693 pe = enqueue_an_ATL_packet;
1697 memset(&ptd, 0, sizeof(ptd));
1698 spin_lock_irqsave(&priv->lock, flags);
1700 for (i = 0; i < 32; i++) {
1701 if (ints->urb == urb) {
1704 struct isp1760_qtd *qtd;
1705 struct isp1760_qh *qh = ints->qh;
1707 skip_map = isp1760_readl(hcd->regs + skip_reg);
1709 isp1760_writel(skip_map, hcd->regs + skip_reg);
1711 or_map = isp1760_readl(hcd->regs + or_reg);
1712 or_map &= ~(1 << i);
1713 isp1760_writel(or_map, hcd->regs + or_reg);
1715 priv_write_copy(priv, (u32 *)&ptd, hcd->regs + reg_base
1716 + i * sizeof(ptd), sizeof(ptd));
1718 qtd = clean_up_qtdlist(qtd);
1720 free_mem(priv, ints->payload);
1725 ints->data_buffer = NULL;
1728 isp1760_urb_done(priv, urb, status);
1733 } else if (ints->qtd) {
1734 struct isp1760_qtd *qtd, *prev_qtd = ints->qtd;
1736 for (qtd = ints->qtd->hw_next; qtd; qtd = qtd->hw_next) {
1737 if (qtd->urb == urb) {
1738 prev_qtd->hw_next = clean_up_qtdlist(qtd);
1739 isp1760_urb_done(priv, urb, status);
1744 /* we found the urb before the end of the list */
1751 spin_unlock_irqrestore(&priv->lock, flags);
1755 static irqreturn_t isp1760_irq(struct usb_hcd *usb_hcd)
1757 struct isp1760_hcd *priv = hcd_to_priv(usb_hcd);
1759 irqreturn_t irqret = IRQ_NONE;
1761 spin_lock(&priv->lock);
1763 if (!(usb_hcd->state & HC_STATE_RUNNING))
1766 imask = isp1760_readl(usb_hcd->regs + HC_INTERRUPT_REG);
1767 if (unlikely(!imask))
1770 isp1760_writel(imask, usb_hcd->regs + HC_INTERRUPT_REG);
1771 if (imask & HC_ATL_INT)
1772 do_atl_int(usb_hcd);
1774 if (imask & HC_INTL_INT)
1775 do_intl_int(usb_hcd);
1777 irqret = IRQ_HANDLED;
1779 spin_unlock(&priv->lock);
1783 static int isp1760_hub_status_data(struct usb_hcd *hcd, char *buf)
1785 struct isp1760_hcd *priv = hcd_to_priv(hcd);
1786 u32 temp, status = 0;
1789 unsigned long flags;
1791 /* if !USB_SUSPEND, root hub timers won't get shut down ... */
1792 if (!HC_IS_RUNNING(hcd->state))
1795 /* init status to no-changes */
1799 spin_lock_irqsave(&priv->lock, flags);
1800 temp = isp1760_readl(hcd->regs + HC_PORTSC1);
1802 if (temp & PORT_OWNER) {
1803 if (temp & PORT_CSC) {
1805 isp1760_writel(temp, hcd->regs + HC_PORTSC1);
1811 * Return status information even for ports with OWNER set.
1812 * Otherwise khubd wouldn't see the disconnect event when a
1813 * high-speed device is switched over to the companion
1814 * controller by the user.
1817 if ((temp & mask) != 0
1818 || ((temp & PORT_RESUME) != 0
1819 && time_after_eq(jiffies,
1820 priv->reset_done))) {
1821 buf [0] |= 1 << (0 + 1);
1824 /* FIXME autosuspend idle root hubs */
1826 spin_unlock_irqrestore(&priv->lock, flags);
1827 return status ? retval : 0;
1830 static void isp1760_hub_descriptor(struct isp1760_hcd *priv,
1831 struct usb_hub_descriptor *desc)
1833 int ports = HCS_N_PORTS(priv->hcs_params);
1836 desc->bDescriptorType = 0x29;
1837 /* priv 1.0, 2.3.9 says 20ms max */
1838 desc->bPwrOn2PwrGood = 10;
1839 desc->bHubContrCurrent = 0;
1841 desc->bNbrPorts = ports;
1842 temp = 1 + (ports / 8);
1843 desc->bDescLength = 7 + 2 * temp;
1845 /* two bitmaps: ports removable, and usb 1.0 legacy PortPwrCtrlMask */
1846 memset(&desc->bitmap[0], 0, temp);
1847 memset(&desc->bitmap[temp], 0xff, temp);
1849 /* per-port overcurrent reporting */
1851 if (HCS_PPC(priv->hcs_params))
1852 /* per-port power control */
1855 /* no power switching */
1857 desc->wHubCharacteristics = cpu_to_le16(temp);
1860 #define PORT_WAKE_BITS (PORT_WKOC_E|PORT_WKDISC_E|PORT_WKCONN_E)
1862 static int check_reset_complete(struct isp1760_hcd *priv, int index,
1863 u32 __iomem *status_reg, int port_status)
1865 if (!(port_status & PORT_CONNECT))
1868 /* if reset finished and it's still not enabled -- handoff */
1869 if (!(port_status & PORT_PE)) {
1871 printk(KERN_ERR "port %d full speed --> companion\n",
1874 port_status |= PORT_OWNER;
1875 port_status &= ~PORT_RWC_BITS;
1876 isp1760_writel(port_status, status_reg);
1879 printk(KERN_ERR "port %d high speed\n", index + 1);
1884 static int isp1760_hub_control(struct usb_hcd *hcd, u16 typeReq,
1885 u16 wValue, u16 wIndex, char *buf, u16 wLength)
1887 struct isp1760_hcd *priv = hcd_to_priv(hcd);
1888 int ports = HCS_N_PORTS(priv->hcs_params);
1889 u32 __iomem *status_reg = hcd->regs + HC_PORTSC1;
1891 unsigned long flags;
1896 * FIXME: support SetPortFeatures USB_PORT_FEAT_INDICATOR.
1897 * HCS_INDICATOR may say we can change LEDs to off/amber/green.
1898 * (track current state ourselves) ... blink for diagnostics,
1899 * power, "this is the one", etc. EHCI spec supports this.
1902 spin_lock_irqsave(&priv->lock, flags);
1904 case ClearHubFeature:
1906 case C_HUB_LOCAL_POWER:
1907 case C_HUB_OVER_CURRENT:
1908 /* no hub-wide feature/status flags */
1914 case ClearPortFeature:
1915 if (!wIndex || wIndex > ports)
1918 temp = isp1760_readl(status_reg);
1921 * Even if OWNER is set, so the port is owned by the
1922 * companion controller, khubd needs to be able to clear
1923 * the port-change status bits (especially
1924 * USB_PORT_STAT_C_CONNECTION).
1928 case USB_PORT_FEAT_ENABLE:
1929 isp1760_writel(temp & ~PORT_PE, status_reg);
1931 case USB_PORT_FEAT_C_ENABLE:
1934 case USB_PORT_FEAT_SUSPEND:
1935 if (temp & PORT_RESET)
1938 if (temp & PORT_SUSPEND) {
1939 if ((temp & PORT_PE) == 0)
1941 /* resume signaling for 20 msec */
1942 temp &= ~(PORT_RWC_BITS);
1943 isp1760_writel(temp | PORT_RESUME,
1945 priv->reset_done = jiffies +
1946 msecs_to_jiffies(20);
1949 case USB_PORT_FEAT_C_SUSPEND:
1950 /* we auto-clear this feature */
1952 case USB_PORT_FEAT_POWER:
1953 if (HCS_PPC(priv->hcs_params))
1954 isp1760_writel(temp & ~PORT_POWER, status_reg);
1956 case USB_PORT_FEAT_C_CONNECTION:
1957 isp1760_writel(temp | PORT_CSC,
1960 case USB_PORT_FEAT_C_OVER_CURRENT:
1963 case USB_PORT_FEAT_C_RESET:
1964 /* GetPortStatus clears reset */
1969 isp1760_readl(hcd->regs + HC_USBCMD);
1971 case GetHubDescriptor:
1972 isp1760_hub_descriptor(priv, (struct usb_hub_descriptor *)
1976 /* no hub-wide feature/status flags */
1980 if (!wIndex || wIndex > ports)
1984 temp = isp1760_readl(status_reg);
1986 /* wPortChange bits */
1987 if (temp & PORT_CSC)
1988 status |= USB_PORT_STAT_C_CONNECTION << 16;
1991 /* whoever resumes must GetPortStatus to complete it!! */
1992 if (temp & PORT_RESUME) {
1993 printk(KERN_ERR "Port resume should be skipped.\n");
1995 /* Remote Wakeup received? */
1996 if (!priv->reset_done) {
1997 /* resume signaling for 20 msec */
1998 priv->reset_done = jiffies
1999 + msecs_to_jiffies(20);
2000 /* check the port again */
2001 mod_timer(&priv_to_hcd(priv)->rh_timer,
2005 /* resume completed? */
2006 else if (time_after_eq(jiffies,
2007 priv->reset_done)) {
2008 status |= USB_PORT_STAT_C_SUSPEND << 16;
2009 priv->reset_done = 0;
2011 /* stop resume signaling */
2012 temp = isp1760_readl(status_reg);
2014 temp & ~(PORT_RWC_BITS | PORT_RESUME),
2016 retval = handshake(priv, status_reg,
2017 PORT_RESUME, 0, 2000 /* 2msec */);
2020 "port %d resume error %d\n",
2021 wIndex + 1, retval);
2024 temp &= ~(PORT_SUSPEND|PORT_RESUME|(3<<10));
2028 /* whoever resets must GetPortStatus to complete it!! */
2029 if ((temp & PORT_RESET)
2030 && time_after_eq(jiffies,
2031 priv->reset_done)) {
2032 status |= USB_PORT_STAT_C_RESET << 16;
2033 priv->reset_done = 0;
2035 /* force reset to complete */
2036 isp1760_writel(temp & ~PORT_RESET,
2038 /* REVISIT: some hardware needs 550+ usec to clear
2039 * this bit; seems too long to spin routinely...
2041 retval = handshake(priv, status_reg,
2042 PORT_RESET, 0, 750);
2044 isp1760_err(priv, "port %d reset error %d\n",
2045 wIndex + 1, retval);
2049 /* see what we found out */
2050 temp = check_reset_complete(priv, wIndex, status_reg,
2051 isp1760_readl(status_reg));
2054 * Even if OWNER is set, there's no harm letting khubd
2055 * see the wPortStatus values (they should all be 0 except
2056 * for PORT_POWER anyway).
2059 if (temp & PORT_OWNER)
2060 printk(KERN_ERR "Warning: PORT_OWNER is set\n");
2062 if (temp & PORT_CONNECT) {
2063 status |= USB_PORT_STAT_CONNECTION;
2064 /* status may be from integrated TT */
2065 status |= ehci_port_speed(priv, temp);
2068 status |= USB_PORT_STAT_ENABLE;
2069 if (temp & (PORT_SUSPEND|PORT_RESUME))
2070 status |= USB_PORT_STAT_SUSPEND;
2071 if (temp & PORT_RESET)
2072 status |= USB_PORT_STAT_RESET;
2073 if (temp & PORT_POWER)
2074 status |= USB_PORT_STAT_POWER;
2076 put_unaligned(cpu_to_le32(status), (__le32 *) buf);
2080 case C_HUB_LOCAL_POWER:
2081 case C_HUB_OVER_CURRENT:
2082 /* no hub-wide feature/status flags */
2088 case SetPortFeature:
2089 selector = wIndex >> 8;
2091 if (!wIndex || wIndex > ports)
2094 temp = isp1760_readl(status_reg);
2095 if (temp & PORT_OWNER)
2098 /* temp &= ~PORT_RWC_BITS; */
2100 case USB_PORT_FEAT_ENABLE:
2101 isp1760_writel(temp | PORT_PE, status_reg);
2104 case USB_PORT_FEAT_SUSPEND:
2105 if ((temp & PORT_PE) == 0
2106 || (temp & PORT_RESET) != 0)
2109 isp1760_writel(temp | PORT_SUSPEND, status_reg);
2111 case USB_PORT_FEAT_POWER:
2112 if (HCS_PPC(priv->hcs_params))
2113 isp1760_writel(temp | PORT_POWER,
2116 case USB_PORT_FEAT_RESET:
2117 if (temp & PORT_RESUME)
2119 /* line status bits may report this as low speed,
2120 * which can be fine if this root hub has a
2121 * transaction translator built in.
2123 if ((temp & (PORT_PE|PORT_CONNECT)) == PORT_CONNECT
2124 && PORT_USB11(temp)) {
2131 * caller must wait, then call GetPortStatus
2132 * usb 2.0 spec says 50 ms resets on root
2134 priv->reset_done = jiffies +
2135 msecs_to_jiffies(50);
2137 isp1760_writel(temp, status_reg);
2142 isp1760_readl(hcd->regs + HC_USBCMD);
2147 /* "stall" on error */
2150 spin_unlock_irqrestore(&priv->lock, flags);
2154 static void isp1760_endpoint_disable(struct usb_hcd *usb_hcd,
2155 struct usb_host_endpoint *ep)
2157 struct isp1760_hcd *priv = hcd_to_priv(usb_hcd);
2158 struct isp1760_qh *qh;
2159 struct isp1760_qtd *qtd;
2160 unsigned long flags;
2162 spin_lock_irqsave(&priv->lock, flags);
2169 /* more than entry might get removed */
2170 if (list_empty(&qh->qtd_list))
2173 qtd = list_first_entry(&qh->qtd_list, struct isp1760_qtd,
2176 if (qtd->status & URB_ENQUEUED) {
2178 spin_unlock_irqrestore(&priv->lock, flags);
2179 isp1760_urb_dequeue(usb_hcd, qtd->urb, -ECONNRESET);
2180 spin_lock_irqsave(&priv->lock, flags);
2185 clean_up_qtdlist(qtd);
2186 isp1760_urb_done(priv, urb, -ECONNRESET);
2191 /* remove requests and leak them.
2192 * ATL are pretty fast done, INT could take a while...
2193 * The latter shoule be removed
2196 spin_unlock_irqrestore(&priv->lock, flags);
2199 static int isp1760_get_frame(struct usb_hcd *hcd)
2201 struct isp1760_hcd *priv = hcd_to_priv(hcd);
2204 fr = isp1760_readl(hcd->regs + HC_FRINDEX);
2205 return (fr >> 3) % priv->periodic_size;
2208 static void isp1760_stop(struct usb_hcd *hcd)
2210 struct isp1760_hcd *priv = hcd_to_priv(hcd);
2213 isp1760_hub_control(hcd, ClearPortFeature, USB_PORT_FEAT_POWER, 1,
2217 spin_lock_irq(&priv->lock);
2220 temp = isp1760_readl(hcd->regs + HC_HW_MODE_CTRL);
2221 isp1760_writel(temp &= ~HW_GLOBAL_INTR_EN, hcd->regs + HC_HW_MODE_CTRL);
2222 spin_unlock_irq(&priv->lock);
2224 isp1760_writel(0, hcd->regs + HC_CONFIGFLAG);
2227 static void isp1760_shutdown(struct usb_hcd *hcd)
2232 temp = isp1760_readl(hcd->regs + HC_HW_MODE_CTRL);
2233 isp1760_writel(temp &= ~HW_GLOBAL_INTR_EN, hcd->regs + HC_HW_MODE_CTRL);
2235 command = isp1760_readl(hcd->regs + HC_USBCMD);
2236 command &= ~CMD_RUN;
2237 isp1760_writel(command, hcd->regs + HC_USBCMD);
2240 static const struct hc_driver isp1760_hc_driver = {
2241 .description = "isp1760-hcd",
2242 .product_desc = "NXP ISP1760 USB Host Controller",
2243 .hcd_priv_size = sizeof(struct isp1760_hcd),
2245 .flags = HCD_MEMORY | HCD_USB2,
2246 .reset = isp1760_hc_setup,
2247 .start = isp1760_run,
2248 .stop = isp1760_stop,
2249 .shutdown = isp1760_shutdown,
2250 .urb_enqueue = isp1760_urb_enqueue,
2251 .urb_dequeue = isp1760_urb_dequeue,
2252 .endpoint_disable = isp1760_endpoint_disable,
2253 .get_frame_number = isp1760_get_frame,
2254 .hub_status_data = isp1760_hub_status_data,
2255 .hub_control = isp1760_hub_control,
2258 int __init init_kmem_once(void)
2260 qtd_cachep = kmem_cache_create("isp1760_qtd",
2261 sizeof(struct isp1760_qtd), 0, SLAB_TEMPORARY |
2262 SLAB_MEM_SPREAD, NULL);
2267 qh_cachep = kmem_cache_create("isp1760_qh", sizeof(struct isp1760_qh),
2268 0, SLAB_TEMPORARY | SLAB_MEM_SPREAD, NULL);
2271 kmem_cache_destroy(qtd_cachep);
2278 void deinit_kmem_cache(void)
2280 kmem_cache_destroy(qtd_cachep);
2281 kmem_cache_destroy(qh_cachep);
2284 struct usb_hcd *isp1760_register(phys_addr_t res_start, resource_size_t res_len,
2285 int irq, unsigned long irqflags,
2286 struct device *dev, const char *busname,
2287 unsigned int devflags)
2289 struct usb_hcd *hcd;
2290 struct isp1760_hcd *priv;
2294 return ERR_PTR(-ENODEV);
2296 /* prevent usb-core allocating DMA pages */
2297 dev->dma_mask = NULL;
2299 hcd = usb_create_hcd(&isp1760_hc_driver, dev, dev_name(dev));
2301 return ERR_PTR(-ENOMEM);
2303 priv = hcd_to_priv(hcd);
2304 priv->devflags = devflags;
2306 hcd->regs = ioremap(res_start, res_len);
2313 hcd->rsrc_start = res_start;
2314 hcd->rsrc_len = res_len;
2316 ret = usb_add_hcd(hcd, irq, irqflags);
2328 return ERR_PTR(ret);
2331 MODULE_DESCRIPTION("Driver for the ISP1760 USB-controller from NXP");
2332 MODULE_AUTHOR("Sebastian Siewior <bigeasy@linuxtronix.de>");
2333 MODULE_LICENSE("GPL v2");