2 * Universal Host Controller Interface driver for USB.
4 * Maintainer: Alan Stern <stern@rowland.harvard.edu>
6 * (C) Copyright 1999 Linus Torvalds
7 * (C) Copyright 1999-2002 Johannes Erdfelt, johannes@erdfelt.com
8 * (C) Copyright 1999 Randy Dunlap
9 * (C) Copyright 1999 Georg Acher, acher@in.tum.de
10 * (C) Copyright 1999 Deti Fliegl, deti@fliegl.de
11 * (C) Copyright 1999 Thomas Sailer, sailer@ife.ee.ethz.ch
12 * (C) Copyright 1999 Roman Weissgaerber, weissg@vienna.at
13 * (C) Copyright 2000 Yggdrasil Computing, Inc. (port of new PCI interface
14 * support from usb-ohci.c by Adam Richter, adam@yggdrasil.com).
15 * (C) Copyright 1999 Gregory P. Smith (from usb-ohci.c)
16 * (C) Copyright 2004-2007 Alan Stern, stern@rowland.harvard.edu
21 * Technically, updating td->status here is a race, but it's not really a
22 * problem. The worst that can happen is that we set the IOC bit again
23 * generating a spurious interrupt. We could fix this by creating another
24 * QH and leaving the IOC bit always set, but then we would have to play
25 * games with the FSBR code to make sure we get the correct order in all
26 * the cases. I don't think it's worth the effort
28 static void uhci_set_next_interrupt(struct uhci_hcd *uhci)
31 mod_timer(&uhci_to_hcd(uhci)->rh_timer, jiffies);
32 uhci->term_td->status |= cpu_to_hc32(uhci, TD_CTRL_IOC);
35 static inline void uhci_clear_next_interrupt(struct uhci_hcd *uhci)
37 uhci->term_td->status &= ~cpu_to_hc32(uhci, TD_CTRL_IOC);
42 * Full-Speed Bandwidth Reclamation (FSBR).
43 * We turn on FSBR whenever a queue that wants it is advancing,
44 * and leave it on for a short time thereafter.
46 static void uhci_fsbr_on(struct uhci_hcd *uhci)
50 /* The terminating skeleton QH always points back to the first
51 * FSBR QH. Make the last async QH point to the terminating
54 lqh = list_entry(uhci->skel_async_qh->node.prev,
55 struct uhci_qh, node);
56 lqh->link = LINK_TO_QH(uhci, uhci->skel_term_qh);
59 static void uhci_fsbr_off(struct uhci_hcd *uhci)
63 /* Remove the link from the last async QH to the terminating
66 lqh = list_entry(uhci->skel_async_qh->node.prev,
67 struct uhci_qh, node);
68 lqh->link = UHCI_PTR_TERM(uhci);
71 static void uhci_add_fsbr(struct uhci_hcd *uhci, struct urb *urb)
73 struct urb_priv *urbp = urb->hcpriv;
75 if (!(urb->transfer_flags & URB_NO_FSBR))
79 static void uhci_urbp_wants_fsbr(struct uhci_hcd *uhci, struct urb_priv *urbp)
82 uhci->fsbr_is_wanted = 1;
83 if (!uhci->fsbr_is_on)
85 else if (uhci->fsbr_expiring) {
86 uhci->fsbr_expiring = 0;
87 del_timer(&uhci->fsbr_timer);
92 static void uhci_fsbr_timeout(unsigned long _uhci)
94 struct uhci_hcd *uhci = (struct uhci_hcd *) _uhci;
97 spin_lock_irqsave(&uhci->lock, flags);
98 if (uhci->fsbr_expiring) {
99 uhci->fsbr_expiring = 0;
102 spin_unlock_irqrestore(&uhci->lock, flags);
106 static struct uhci_td *uhci_alloc_td(struct uhci_hcd *uhci)
108 dma_addr_t dma_handle;
111 td = dma_pool_alloc(uhci->td_pool, GFP_ATOMIC, &dma_handle);
115 td->dma_handle = dma_handle;
118 INIT_LIST_HEAD(&td->list);
119 INIT_LIST_HEAD(&td->fl_list);
124 static void uhci_free_td(struct uhci_hcd *uhci, struct uhci_td *td)
126 dev_WARN(uhci_dev(uhci), !list_empty(&td->list),
127 "td %p still in list!\n", td);
129 dev_WARN(uhci_dev(uhci), !list_empty(&td->fl_list),
130 "td %p still in fl_list!\n", td);
132 dma_pool_free(uhci->td_pool, td, td->dma_handle);
135 static inline void uhci_fill_td(struct uhci_hcd *uhci, struct uhci_td *td,
136 u32 status, u32 token, u32 buffer)
138 td->status = cpu_to_hc32(uhci, status);
139 td->token = cpu_to_hc32(uhci, token);
140 td->buffer = cpu_to_hc32(uhci, buffer);
143 static void uhci_add_td_to_urbp(struct uhci_td *td, struct urb_priv *urbp)
145 list_add_tail(&td->list, &urbp->td_list);
148 static void uhci_remove_td_from_urbp(struct uhci_td *td)
150 list_del_init(&td->list);
154 * We insert Isochronous URBs directly into the frame list at the beginning
156 static inline void uhci_insert_td_in_frame_list(struct uhci_hcd *uhci,
157 struct uhci_td *td, unsigned framenum)
159 framenum &= (UHCI_NUMFRAMES - 1);
161 td->frame = framenum;
163 /* Is there a TD already mapped there? */
164 if (uhci->frame_cpu[framenum]) {
165 struct uhci_td *ftd, *ltd;
167 ftd = uhci->frame_cpu[framenum];
168 ltd = list_entry(ftd->fl_list.prev, struct uhci_td, fl_list);
170 list_add_tail(&td->fl_list, &ftd->fl_list);
172 td->link = ltd->link;
174 ltd->link = LINK_TO_TD(uhci, td);
176 td->link = uhci->frame[framenum];
178 uhci->frame[framenum] = LINK_TO_TD(uhci, td);
179 uhci->frame_cpu[framenum] = td;
183 static inline void uhci_remove_td_from_frame_list(struct uhci_hcd *uhci,
186 /* If it's not inserted, don't remove it */
187 if (td->frame == -1) {
188 WARN_ON(!list_empty(&td->fl_list));
192 if (uhci->frame_cpu[td->frame] == td) {
193 if (list_empty(&td->fl_list)) {
194 uhci->frame[td->frame] = td->link;
195 uhci->frame_cpu[td->frame] = NULL;
199 ntd = list_entry(td->fl_list.next,
202 uhci->frame[td->frame] = LINK_TO_TD(uhci, ntd);
203 uhci->frame_cpu[td->frame] = ntd;
208 ptd = list_entry(td->fl_list.prev, struct uhci_td, fl_list);
209 ptd->link = td->link;
212 list_del_init(&td->fl_list);
216 static inline void uhci_remove_tds_from_frame(struct uhci_hcd *uhci,
217 unsigned int framenum)
219 struct uhci_td *ftd, *ltd;
221 framenum &= (UHCI_NUMFRAMES - 1);
223 ftd = uhci->frame_cpu[framenum];
225 ltd = list_entry(ftd->fl_list.prev, struct uhci_td, fl_list);
226 uhci->frame[framenum] = ltd->link;
227 uhci->frame_cpu[framenum] = NULL;
229 while (!list_empty(&ftd->fl_list))
230 list_del_init(ftd->fl_list.prev);
235 * Remove all the TDs for an Isochronous URB from the frame list
237 static void uhci_unlink_isochronous_tds(struct uhci_hcd *uhci, struct urb *urb)
239 struct urb_priv *urbp = (struct urb_priv *) urb->hcpriv;
242 list_for_each_entry(td, &urbp->td_list, list)
243 uhci_remove_td_from_frame_list(uhci, td);
246 static struct uhci_qh *uhci_alloc_qh(struct uhci_hcd *uhci,
247 struct usb_device *udev, struct usb_host_endpoint *hep)
249 dma_addr_t dma_handle;
252 qh = dma_pool_zalloc(uhci->qh_pool, GFP_ATOMIC, &dma_handle);
256 qh->dma_handle = dma_handle;
258 qh->element = UHCI_PTR_TERM(uhci);
259 qh->link = UHCI_PTR_TERM(uhci);
261 INIT_LIST_HEAD(&qh->queue);
262 INIT_LIST_HEAD(&qh->node);
264 if (udev) { /* Normal QH */
265 qh->type = usb_endpoint_type(&hep->desc);
266 if (qh->type != USB_ENDPOINT_XFER_ISOC) {
267 qh->dummy_td = uhci_alloc_td(uhci);
269 dma_pool_free(uhci->qh_pool, qh, dma_handle);
273 qh->state = QH_STATE_IDLE;
278 if (qh->type == USB_ENDPOINT_XFER_INT ||
279 qh->type == USB_ENDPOINT_XFER_ISOC)
280 qh->load = usb_calc_bus_time(udev->speed,
281 usb_endpoint_dir_in(&hep->desc),
282 qh->type == USB_ENDPOINT_XFER_ISOC,
283 usb_endpoint_maxp(&hep->desc))
286 } else { /* Skeleton QH */
287 qh->state = QH_STATE_ACTIVE;
293 static void uhci_free_qh(struct uhci_hcd *uhci, struct uhci_qh *qh)
295 WARN_ON(qh->state != QH_STATE_IDLE && qh->udev);
297 dev_WARN(uhci_dev(uhci), !list_empty(&qh->queue),
298 "qh %p list not empty!\n", qh);
302 qh->hep->hcpriv = NULL;
304 uhci_free_td(uhci, qh->dummy_td);
306 dma_pool_free(uhci->qh_pool, qh, qh->dma_handle);
310 * When a queue is stopped and a dequeued URB is given back, adjust
311 * the previous TD link (if the URB isn't first on the queue) or
312 * save its toggle value (if it is first and is currently executing).
314 * Returns 0 if the URB should not yet be given back, 1 otherwise.
316 static int uhci_cleanup_queue(struct uhci_hcd *uhci, struct uhci_qh *qh,
319 struct urb_priv *urbp = urb->hcpriv;
323 /* Isochronous pipes don't use toggles and their TD link pointers
324 * get adjusted during uhci_urb_dequeue(). But since their queues
325 * cannot truly be stopped, we have to watch out for dequeues
326 * occurring after the nominal unlink frame. */
327 if (qh->type == USB_ENDPOINT_XFER_ISOC) {
328 ret = (uhci->frame_number + uhci->is_stopped !=
333 /* If the URB isn't first on its queue, adjust the link pointer
334 * of the last TD in the previous URB. The toggle doesn't need
335 * to be saved since this URB can't be executing yet. */
336 if (qh->queue.next != &urbp->node) {
337 struct urb_priv *purbp;
340 purbp = list_entry(urbp->node.prev, struct urb_priv, node);
341 WARN_ON(list_empty(&purbp->td_list));
342 ptd = list_entry(purbp->td_list.prev, struct uhci_td,
344 td = list_entry(urbp->td_list.prev, struct uhci_td,
346 ptd->link = td->link;
350 /* If the QH element pointer is UHCI_PTR_TERM then then currently
351 * executing URB has already been unlinked, so this one isn't it. */
352 if (qh_element(qh) == UHCI_PTR_TERM(uhci))
354 qh->element = UHCI_PTR_TERM(uhci);
356 /* Control pipes don't have to worry about toggles */
357 if (qh->type == USB_ENDPOINT_XFER_CONTROL)
360 /* Save the next toggle value */
361 WARN_ON(list_empty(&urbp->td_list));
362 td = list_entry(urbp->td_list.next, struct uhci_td, list);
364 qh->initial_toggle = uhci_toggle(td_token(uhci, td));
371 * Fix up the data toggles for URBs in a queue, when one of them
372 * terminates early (short transfer, error, or dequeued).
374 static void uhci_fixup_toggles(struct uhci_hcd *uhci, struct uhci_qh *qh,
377 struct urb_priv *urbp = NULL;
379 unsigned int toggle = qh->initial_toggle;
382 /* Fixups for a short transfer start with the second URB in the
383 * queue (the short URB is the first). */
385 urbp = list_entry(qh->queue.next, struct urb_priv, node);
387 /* When starting with the first URB, if the QH element pointer is
388 * still valid then we know the URB's toggles are okay. */
389 else if (qh_element(qh) != UHCI_PTR_TERM(uhci))
392 /* Fix up the toggle for the URBs in the queue. Normally this
393 * loop won't run more than once: When an error or short transfer
394 * occurs, the queue usually gets emptied. */
395 urbp = list_prepare_entry(urbp, &qh->queue, node);
396 list_for_each_entry_continue(urbp, &qh->queue, node) {
398 /* If the first TD has the right toggle value, we don't
399 * need to change any toggles in this URB */
400 td = list_entry(urbp->td_list.next, struct uhci_td, list);
401 if (toggle > 1 || uhci_toggle(td_token(uhci, td)) == toggle) {
402 td = list_entry(urbp->td_list.prev, struct uhci_td,
404 toggle = uhci_toggle(td_token(uhci, td)) ^ 1;
406 /* Otherwise all the toggles in the URB have to be switched */
408 list_for_each_entry(td, &urbp->td_list, list) {
409 td->token ^= cpu_to_hc32(uhci,
417 pipe = list_entry(qh->queue.next, struct urb_priv, node)->urb->pipe;
418 usb_settoggle(qh->udev, usb_pipeendpoint(pipe),
419 usb_pipeout(pipe), toggle);
424 * Link an Isochronous QH into its skeleton's list
426 static inline void link_iso(struct uhci_hcd *uhci, struct uhci_qh *qh)
428 list_add_tail(&qh->node, &uhci->skel_iso_qh->node);
430 /* Isochronous QHs aren't linked by the hardware */
434 * Link a high-period interrupt QH into the schedule at the end of its
437 static void link_interrupt(struct uhci_hcd *uhci, struct uhci_qh *qh)
441 list_add_tail(&qh->node, &uhci->skelqh[qh->skel]->node);
443 pqh = list_entry(qh->node.prev, struct uhci_qh, node);
444 qh->link = pqh->link;
446 pqh->link = LINK_TO_QH(uhci, qh);
450 * Link a period-1 interrupt or async QH into the schedule at the
451 * correct spot in the async skeleton's list, and update the FSBR link
453 static void link_async(struct uhci_hcd *uhci, struct uhci_qh *qh)
456 __hc32 link_to_new_qh;
458 /* Find the predecessor QH for our new one and insert it in the list.
459 * The list of QHs is expected to be short, so linear search won't
461 list_for_each_entry_reverse(pqh, &uhci->skel_async_qh->node, node) {
462 if (pqh->skel <= qh->skel)
465 list_add(&qh->node, &pqh->node);
467 /* Link it into the schedule */
468 qh->link = pqh->link;
470 link_to_new_qh = LINK_TO_QH(uhci, qh);
471 pqh->link = link_to_new_qh;
473 /* If this is now the first FSBR QH, link the terminating skeleton
475 if (pqh->skel < SKEL_FSBR && qh->skel >= SKEL_FSBR)
476 uhci->skel_term_qh->link = link_to_new_qh;
480 * Put a QH on the schedule in both hardware and software
482 static void uhci_activate_qh(struct uhci_hcd *uhci, struct uhci_qh *qh)
484 WARN_ON(list_empty(&qh->queue));
486 /* Set the element pointer if it isn't set already.
487 * This isn't needed for Isochronous queues, but it doesn't hurt. */
488 if (qh_element(qh) == UHCI_PTR_TERM(uhci)) {
489 struct urb_priv *urbp = list_entry(qh->queue.next,
490 struct urb_priv, node);
491 struct uhci_td *td = list_entry(urbp->td_list.next,
492 struct uhci_td, list);
494 qh->element = LINK_TO_TD(uhci, td);
497 /* Treat the queue as if it has just advanced */
498 qh->wait_expired = 0;
499 qh->advance_jiffies = jiffies;
501 if (qh->state == QH_STATE_ACTIVE)
503 qh->state = QH_STATE_ACTIVE;
505 /* Move the QH from its old list to the correct spot in the appropriate
507 if (qh == uhci->next_qh)
508 uhci->next_qh = list_entry(qh->node.next, struct uhci_qh,
512 if (qh->skel == SKEL_ISO)
514 else if (qh->skel < SKEL_ASYNC)
515 link_interrupt(uhci, qh);
517 link_async(uhci, qh);
521 * Unlink a high-period interrupt QH from the schedule
523 static void unlink_interrupt(struct uhci_hcd *uhci, struct uhci_qh *qh)
527 pqh = list_entry(qh->node.prev, struct uhci_qh, node);
528 pqh->link = qh->link;
533 * Unlink a period-1 interrupt or async QH from the schedule
535 static void unlink_async(struct uhci_hcd *uhci, struct uhci_qh *qh)
538 __hc32 link_to_next_qh = qh->link;
540 pqh = list_entry(qh->node.prev, struct uhci_qh, node);
541 pqh->link = link_to_next_qh;
543 /* If this was the old first FSBR QH, link the terminating skeleton
544 * QH to the next (new first FSBR) QH. */
545 if (pqh->skel < SKEL_FSBR && qh->skel >= SKEL_FSBR)
546 uhci->skel_term_qh->link = link_to_next_qh;
551 * Take a QH off the hardware schedule
553 static void uhci_unlink_qh(struct uhci_hcd *uhci, struct uhci_qh *qh)
555 if (qh->state == QH_STATE_UNLINKING)
557 WARN_ON(qh->state != QH_STATE_ACTIVE || !qh->udev);
558 qh->state = QH_STATE_UNLINKING;
560 /* Unlink the QH from the schedule and record when we did it */
561 if (qh->skel == SKEL_ISO)
563 else if (qh->skel < SKEL_ASYNC)
564 unlink_interrupt(uhci, qh);
566 unlink_async(uhci, qh);
568 uhci_get_current_frame_number(uhci);
569 qh->unlink_frame = uhci->frame_number;
571 /* Force an interrupt so we know when the QH is fully unlinked */
572 if (list_empty(&uhci->skel_unlink_qh->node) || uhci->is_stopped)
573 uhci_set_next_interrupt(uhci);
575 /* Move the QH from its old list to the end of the unlinking list */
576 if (qh == uhci->next_qh)
577 uhci->next_qh = list_entry(qh->node.next, struct uhci_qh,
579 list_move_tail(&qh->node, &uhci->skel_unlink_qh->node);
583 * When we and the controller are through with a QH, it becomes IDLE.
584 * This happens when a QH has been off the schedule (on the unlinking
585 * list) for more than one frame, or when an error occurs while adding
586 * the first URB onto a new QH.
588 static void uhci_make_qh_idle(struct uhci_hcd *uhci, struct uhci_qh *qh)
590 WARN_ON(qh->state == QH_STATE_ACTIVE);
592 if (qh == uhci->next_qh)
593 uhci->next_qh = list_entry(qh->node.next, struct uhci_qh,
595 list_move(&qh->node, &uhci->idle_qh_list);
596 qh->state = QH_STATE_IDLE;
598 /* Now that the QH is idle, its post_td isn't being used */
600 uhci_free_td(uhci, qh->post_td);
604 /* If anyone is waiting for a QH to become idle, wake them up */
605 if (uhci->num_waiting)
606 wake_up_all(&uhci->waitqh);
610 * Find the highest existing bandwidth load for a given phase and period.
612 static int uhci_highest_load(struct uhci_hcd *uhci, int phase, int period)
614 int highest_load = uhci->load[phase];
616 for (phase += period; phase < MAX_PHASE; phase += period)
617 highest_load = max_t(int, highest_load, uhci->load[phase]);
622 * Set qh->phase to the optimal phase for a periodic transfer and
623 * check whether the bandwidth requirement is acceptable.
625 static int uhci_check_bandwidth(struct uhci_hcd *uhci, struct uhci_qh *qh)
629 /* Find the optimal phase (unless it is already set) and get
632 minimax_load = uhci_highest_load(uhci, qh->phase, qh->period);
635 int max_phase = min_t(int, MAX_PHASE, qh->period);
638 minimax_load = uhci_highest_load(uhci, qh->phase, qh->period);
639 for (phase = 1; phase < max_phase; ++phase) {
640 load = uhci_highest_load(uhci, phase, qh->period);
641 if (load < minimax_load) {
648 /* Maximum allowable periodic bandwidth is 90%, or 900 us per frame */
649 if (minimax_load + qh->load > 900) {
650 dev_dbg(uhci_dev(uhci), "bandwidth allocation failed: "
651 "period %d, phase %d, %d + %d us\n",
652 qh->period, qh->phase, minimax_load, qh->load);
659 * Reserve a periodic QH's bandwidth in the schedule
661 static void uhci_reserve_bandwidth(struct uhci_hcd *uhci, struct uhci_qh *qh)
667 for (i = qh->phase; i < MAX_PHASE; i += qh->period) {
668 uhci->load[i] += load;
669 uhci->total_load += load;
671 uhci_to_hcd(uhci)->self.bandwidth_allocated =
672 uhci->total_load / MAX_PHASE;
674 case USB_ENDPOINT_XFER_INT:
675 ++uhci_to_hcd(uhci)->self.bandwidth_int_reqs;
678 case USB_ENDPOINT_XFER_ISOC:
679 ++uhci_to_hcd(uhci)->self.bandwidth_isoc_reqs;
683 qh->bandwidth_reserved = 1;
684 dev_dbg(uhci_dev(uhci),
685 "%s dev %d ep%02x-%s, period %d, phase %d, %d us\n",
686 "reserve", qh->udev->devnum,
687 qh->hep->desc.bEndpointAddress, p,
688 qh->period, qh->phase, load);
692 * Release a periodic QH's bandwidth reservation
694 static void uhci_release_bandwidth(struct uhci_hcd *uhci, struct uhci_qh *qh)
700 for (i = qh->phase; i < MAX_PHASE; i += qh->period) {
701 uhci->load[i] -= load;
702 uhci->total_load -= load;
704 uhci_to_hcd(uhci)->self.bandwidth_allocated =
705 uhci->total_load / MAX_PHASE;
707 case USB_ENDPOINT_XFER_INT:
708 --uhci_to_hcd(uhci)->self.bandwidth_int_reqs;
711 case USB_ENDPOINT_XFER_ISOC:
712 --uhci_to_hcd(uhci)->self.bandwidth_isoc_reqs;
716 qh->bandwidth_reserved = 0;
717 dev_dbg(uhci_dev(uhci),
718 "%s dev %d ep%02x-%s, period %d, phase %d, %d us\n",
719 "release", qh->udev->devnum,
720 qh->hep->desc.bEndpointAddress, p,
721 qh->period, qh->phase, load);
724 static inline struct urb_priv *uhci_alloc_urb_priv(struct uhci_hcd *uhci,
727 struct urb_priv *urbp;
729 urbp = kmem_cache_zalloc(uhci_up_cachep, GFP_ATOMIC);
736 INIT_LIST_HEAD(&urbp->node);
737 INIT_LIST_HEAD(&urbp->td_list);
742 static void uhci_free_urb_priv(struct uhci_hcd *uhci,
743 struct urb_priv *urbp)
745 struct uhci_td *td, *tmp;
747 dev_WARN(uhci_dev(uhci), !list_empty(&urbp->node),
748 "urb %p still on QH's list!\n",
751 list_for_each_entry_safe(td, tmp, &urbp->td_list, list) {
752 uhci_remove_td_from_urbp(td);
753 uhci_free_td(uhci, td);
756 kmem_cache_free(uhci_up_cachep, urbp);
760 * Map status to standard result codes
762 * <status> is (td_status(uhci, td) & 0xF60000), a.k.a.
763 * uhci_status_bits(td_status(uhci, td)).
764 * Note: <status> does not include the TD_CTRL_NAK bit.
765 * <dir_out> is True for output TDs and False for input TDs.
767 static int uhci_map_status(int status, int dir_out)
771 if (status & TD_CTRL_BITSTUFF) /* Bitstuff error */
773 if (status & TD_CTRL_CRCTIMEO) { /* CRC/Timeout */
779 if (status & TD_CTRL_BABBLE) /* Babble */
781 if (status & TD_CTRL_DBUFERR) /* Buffer error */
783 if (status & TD_CTRL_STALLED) /* Stalled */
791 static int uhci_submit_control(struct uhci_hcd *uhci, struct urb *urb,
795 unsigned long destination, status;
796 int maxsze = usb_endpoint_maxp(&qh->hep->desc);
797 int len = urb->transfer_buffer_length;
798 dma_addr_t data = urb->transfer_dma;
800 struct urb_priv *urbp = urb->hcpriv;
803 /* The "pipe" thing contains the destination in bits 8--18 */
804 destination = (urb->pipe & PIPE_DEVEP_MASK) | USB_PID_SETUP;
806 /* 3 errors, dummy TD remains inactive */
807 status = uhci_maxerr(3);
808 if (urb->dev->speed == USB_SPEED_LOW)
809 status |= TD_CTRL_LS;
812 * Build the TD for the control request setup packet
815 uhci_add_td_to_urbp(td, urbp);
816 uhci_fill_td(uhci, td, status, destination | uhci_explen(8),
819 status |= TD_CTRL_ACTIVE;
822 * If direction is "send", change the packet ID from SETUP (0x2D)
823 * to OUT (0xE1). Else change it from SETUP to IN (0x69) and
824 * set Short Packet Detect (SPD) for all data packets.
826 * 0-length transfers always get treated as "send".
828 if (usb_pipeout(urb->pipe) || len == 0)
829 destination ^= (USB_PID_SETUP ^ USB_PID_OUT);
831 destination ^= (USB_PID_SETUP ^ USB_PID_IN);
832 status |= TD_CTRL_SPD;
841 if (len <= pktsze) { /* The last data packet */
843 status &= ~TD_CTRL_SPD;
846 td = uhci_alloc_td(uhci);
849 *plink = LINK_TO_TD(uhci, td);
851 /* Alternate Data0/1 (start with Data1) */
852 destination ^= TD_TOKEN_TOGGLE;
854 uhci_add_td_to_urbp(td, urbp);
855 uhci_fill_td(uhci, td, status,
856 destination | uhci_explen(pktsze), data);
864 * Build the final TD for control status
866 td = uhci_alloc_td(uhci);
869 *plink = LINK_TO_TD(uhci, td);
871 /* Change direction for the status transaction */
872 destination ^= (USB_PID_IN ^ USB_PID_OUT);
873 destination |= TD_TOKEN_TOGGLE; /* End in Data1 */
875 uhci_add_td_to_urbp(td, urbp);
876 uhci_fill_td(uhci, td, status | TD_CTRL_IOC,
877 destination | uhci_explen(0), 0);
881 * Build the new dummy TD and activate the old one
883 td = uhci_alloc_td(uhci);
886 *plink = LINK_TO_TD(uhci, td);
888 uhci_fill_td(uhci, td, 0, USB_PID_OUT | uhci_explen(0), 0);
890 qh->dummy_td->status |= cpu_to_hc32(uhci, TD_CTRL_ACTIVE);
893 /* Low-speed transfers get a different queue, and won't hog the bus.
894 * Also, some devices enumerate better without FSBR; the easiest way
895 * to do that is to put URBs on the low-speed queue while the device
896 * isn't in the CONFIGURED state. */
897 if (urb->dev->speed == USB_SPEED_LOW ||
898 urb->dev->state != USB_STATE_CONFIGURED)
899 skel = SKEL_LS_CONTROL;
901 skel = SKEL_FS_CONTROL;
902 uhci_add_fsbr(uhci, urb);
904 if (qh->state != QH_STATE_ACTIVE)
909 /* Remove the dummy TD from the td_list so it doesn't get freed */
910 uhci_remove_td_from_urbp(qh->dummy_td);
915 * Common submit for bulk and interrupt
917 static int uhci_submit_common(struct uhci_hcd *uhci, struct urb *urb,
921 unsigned long destination, status;
922 int maxsze = usb_endpoint_maxp(&qh->hep->desc);
923 int len = urb->transfer_buffer_length;
927 struct urb_priv *urbp = urb->hcpriv;
929 struct scatterlist *sg;
935 /* The "pipe" thing contains the destination in bits 8--18 */
936 destination = (urb->pipe & PIPE_DEVEP_MASK) | usb_packetid(urb->pipe);
937 toggle = usb_gettoggle(urb->dev, usb_pipeendpoint(urb->pipe),
938 usb_pipeout(urb->pipe));
940 /* 3 errors, dummy TD remains inactive */
941 status = uhci_maxerr(3);
942 if (urb->dev->speed == USB_SPEED_LOW)
943 status |= TD_CTRL_LS;
944 if (usb_pipein(urb->pipe))
945 status |= TD_CTRL_SPD;
947 i = urb->num_mapped_sgs;
948 if (len > 0 && i > 0) {
950 data = sg_dma_address(sg);
952 /* urb->transfer_buffer_length may be smaller than the
953 * size of the scatterlist (or vice versa)
955 this_sg_len = min_t(int, sg_dma_len(sg), len);
958 data = urb->transfer_dma;
966 for (;;) { /* Allow zero length packets */
969 if (len <= pktsze) { /* The last packet */
971 if (!(urb->transfer_flags & URB_SHORT_NOT_OK))
972 status &= ~TD_CTRL_SPD;
976 td = uhci_alloc_td(uhci);
979 *plink = LINK_TO_TD(uhci, td);
981 uhci_add_td_to_urbp(td, urbp);
982 uhci_fill_td(uhci, td, status,
983 destination | uhci_explen(pktsze) |
984 (toggle << TD_TOKEN_TOGGLE_SHIFT),
987 status |= TD_CTRL_ACTIVE;
991 this_sg_len -= pktsze;
993 if (this_sg_len <= 0) {
994 if (--i <= 0 || len <= 0)
997 data = sg_dma_address(sg);
998 this_sg_len = min_t(int, sg_dma_len(sg), len);
1003 * URB_ZERO_PACKET means adding a 0-length packet, if direction
1004 * is OUT and the transfer_length was an exact multiple of maxsze,
1005 * hence (len = transfer_length - N * maxsze) == 0
1006 * however, if transfer_length == 0, the zero packet was already
1009 if ((urb->transfer_flags & URB_ZERO_PACKET) &&
1010 usb_pipeout(urb->pipe) && len == 0 &&
1011 urb->transfer_buffer_length > 0) {
1012 td = uhci_alloc_td(uhci);
1015 *plink = LINK_TO_TD(uhci, td);
1017 uhci_add_td_to_urbp(td, urbp);
1018 uhci_fill_td(uhci, td, status,
1019 destination | uhci_explen(0) |
1020 (toggle << TD_TOKEN_TOGGLE_SHIFT),
1027 /* Set the interrupt-on-completion flag on the last packet.
1028 * A more-or-less typical 4 KB URB (= size of one memory page)
1029 * will require about 3 ms to transfer; that's a little on the
1030 * fast side but not enough to justify delaying an interrupt
1031 * more than 2 or 3 URBs, so we will ignore the URB_NO_INTERRUPT
1033 td->status |= cpu_to_hc32(uhci, TD_CTRL_IOC);
1036 * Build the new dummy TD and activate the old one
1038 td = uhci_alloc_td(uhci);
1041 *plink = LINK_TO_TD(uhci, td);
1043 uhci_fill_td(uhci, td, 0, USB_PID_OUT | uhci_explen(0), 0);
1045 qh->dummy_td->status |= cpu_to_hc32(uhci, TD_CTRL_ACTIVE);
1048 usb_settoggle(urb->dev, usb_pipeendpoint(urb->pipe),
1049 usb_pipeout(urb->pipe), toggle);
1053 /* Remove the dummy TD from the td_list so it doesn't get freed */
1054 uhci_remove_td_from_urbp(qh->dummy_td);
1058 static int uhci_submit_bulk(struct uhci_hcd *uhci, struct urb *urb,
1063 /* Can't have low-speed bulk transfers */
1064 if (urb->dev->speed == USB_SPEED_LOW)
1067 if (qh->state != QH_STATE_ACTIVE)
1068 qh->skel = SKEL_BULK;
1069 ret = uhci_submit_common(uhci, urb, qh);
1071 uhci_add_fsbr(uhci, urb);
1075 static int uhci_submit_interrupt(struct uhci_hcd *uhci, struct urb *urb,
1080 /* USB 1.1 interrupt transfers only involve one packet per interval.
1081 * Drivers can submit URBs of any length, but longer ones will need
1082 * multiple intervals to complete.
1085 if (!qh->bandwidth_reserved) {
1088 /* Figure out which power-of-two queue to use */
1089 for (exponent = 7; exponent >= 0; --exponent) {
1090 if ((1 << exponent) <= urb->interval)
1096 /* If the slot is full, try a lower period */
1098 qh->period = 1 << exponent;
1099 qh->skel = SKEL_INDEX(exponent);
1101 /* For now, interrupt phase is fixed by the layout
1104 qh->phase = (qh->period / 2) & (MAX_PHASE - 1);
1105 ret = uhci_check_bandwidth(uhci, qh);
1106 } while (ret != 0 && --exponent >= 0);
1109 } else if (qh->period > urb->interval)
1110 return -EINVAL; /* Can't decrease the period */
1112 ret = uhci_submit_common(uhci, urb, qh);
1114 urb->interval = qh->period;
1115 if (!qh->bandwidth_reserved)
1116 uhci_reserve_bandwidth(uhci, qh);
1122 * Fix up the data structures following a short transfer
1124 static int uhci_fixup_short_transfer(struct uhci_hcd *uhci,
1125 struct uhci_qh *qh, struct urb_priv *urbp)
1128 struct list_head *tmp;
1131 td = list_entry(urbp->td_list.prev, struct uhci_td, list);
1132 if (qh->type == USB_ENDPOINT_XFER_CONTROL) {
1134 /* When a control transfer is short, we have to restart
1135 * the queue at the status stage transaction, which is
1137 WARN_ON(list_empty(&urbp->td_list));
1138 qh->element = LINK_TO_TD(uhci, td);
1139 tmp = td->list.prev;
1144 /* When a bulk/interrupt transfer is short, we have to
1145 * fix up the toggles of the following URBs on the queue
1146 * before restarting the queue at the next URB. */
1147 qh->initial_toggle =
1148 uhci_toggle(td_token(uhci, qh->post_td)) ^ 1;
1149 uhci_fixup_toggles(uhci, qh, 1);
1151 if (list_empty(&urbp->td_list))
1153 qh->element = td->link;
1154 tmp = urbp->td_list.prev;
1158 /* Remove all the TDs we skipped over, from tmp back to the start */
1159 while (tmp != &urbp->td_list) {
1160 td = list_entry(tmp, struct uhci_td, list);
1163 uhci_remove_td_from_urbp(td);
1164 uhci_free_td(uhci, td);
1170 * Common result for control, bulk, and interrupt
1172 static int uhci_result_common(struct uhci_hcd *uhci, struct urb *urb)
1174 struct urb_priv *urbp = urb->hcpriv;
1175 struct uhci_qh *qh = urbp->qh;
1176 struct uhci_td *td, *tmp;
1180 list_for_each_entry_safe(td, tmp, &urbp->td_list, list) {
1181 unsigned int ctrlstat;
1184 ctrlstat = td_status(uhci, td);
1185 status = uhci_status_bits(ctrlstat);
1186 if (status & TD_CTRL_ACTIVE)
1187 return -EINPROGRESS;
1189 len = uhci_actual_length(ctrlstat);
1190 urb->actual_length += len;
1193 ret = uhci_map_status(status,
1194 uhci_packetout(td_token(uhci, td)));
1195 if ((debug == 1 && ret != -EPIPE) || debug > 1) {
1196 /* Some debugging code */
1197 dev_dbg(&urb->dev->dev,
1198 "%s: failed with status %x\n",
1201 if (debug > 1 && errbuf) {
1202 /* Print the chain for debugging */
1203 uhci_show_qh(uhci, urbp->qh, errbuf,
1204 ERRBUF_LEN - EXTRA_SPACE, 0);
1209 /* Did we receive a short packet? */
1210 } else if (len < uhci_expected_length(td_token(uhci, td))) {
1212 /* For control transfers, go to the status TD if
1213 * this isn't already the last data TD */
1214 if (qh->type == USB_ENDPOINT_XFER_CONTROL) {
1215 if (td->list.next != urbp->td_list.prev)
1219 /* For bulk and interrupt, this may be an error */
1220 else if (urb->transfer_flags & URB_SHORT_NOT_OK)
1223 /* Fixup needed only if this isn't the URB's last TD */
1224 else if (&td->list != urbp->td_list.prev)
1228 uhci_remove_td_from_urbp(td);
1230 uhci_free_td(uhci, qh->post_td);
1240 /* Note that the queue has stopped and save
1241 * the next toggle value */
1242 qh->element = UHCI_PTR_TERM(uhci);
1244 qh->needs_fixup = (qh->type != USB_ENDPOINT_XFER_CONTROL);
1245 qh->initial_toggle = uhci_toggle(td_token(uhci, td)) ^
1246 (ret == -EREMOTEIO);
1248 } else /* Short packet received */
1249 ret = uhci_fixup_short_transfer(uhci, qh, urbp);
1254 * Isochronous transfers
1256 static int uhci_submit_isochronous(struct uhci_hcd *uhci, struct urb *urb,
1259 struct uhci_td *td = NULL; /* Since urb->number_of_packets > 0 */
1261 unsigned frame, next;
1262 unsigned long destination, status;
1263 struct urb_priv *urbp = (struct urb_priv *) urb->hcpriv;
1265 /* Values must not be too big (could overflow below) */
1266 if (urb->interval >= UHCI_NUMFRAMES ||
1267 urb->number_of_packets >= UHCI_NUMFRAMES)
1270 uhci_get_current_frame_number(uhci);
1272 /* Check the period and figure out the starting frame number */
1273 if (!qh->bandwidth_reserved) {
1274 qh->period = urb->interval;
1275 qh->phase = -1; /* Find the best phase */
1276 i = uhci_check_bandwidth(uhci, qh);
1280 /* Allow a little time to allocate the TDs */
1281 next = uhci->frame_number + 10;
1284 /* Round up to the first available slot */
1285 frame += (next - frame + qh->period - 1) & -qh->period;
1287 } else if (qh->period != urb->interval) {
1288 return -EINVAL; /* Can't change the period */
1291 next = uhci->frame_number + 1;
1293 /* Find the next unused frame */
1294 if (list_empty(&qh->queue)) {
1295 frame = qh->iso_frame;
1299 lurb = list_entry(qh->queue.prev,
1300 struct urb_priv, node)->urb;
1301 frame = lurb->start_frame +
1302 lurb->number_of_packets *
1307 if (!uhci_frame_before_eq(next, frame)) {
1309 /* USB_ISO_ASAP: Round up to the first available slot */
1310 if (urb->transfer_flags & URB_ISO_ASAP)
1311 frame += (next - frame + qh->period - 1) &
1315 * Not ASAP: Use the next slot in the stream,
1318 else if (!uhci_frame_before_eq(next,
1319 frame + (urb->number_of_packets - 1) *
1321 dev_dbg(uhci_dev(uhci), "iso underrun %p (%u+%u < %u)\n",
1323 (urb->number_of_packets - 1) *
1329 /* Make sure we won't have to go too far into the future */
1330 if (uhci_frame_before_eq(uhci->last_iso_frame + UHCI_NUMFRAMES,
1331 frame + urb->number_of_packets * urb->interval))
1333 urb->start_frame = frame;
1335 status = TD_CTRL_ACTIVE | TD_CTRL_IOS;
1336 destination = (urb->pipe & PIPE_DEVEP_MASK) | usb_packetid(urb->pipe);
1338 for (i = 0; i < urb->number_of_packets; i++) {
1339 td = uhci_alloc_td(uhci);
1343 uhci_add_td_to_urbp(td, urbp);
1344 uhci_fill_td(uhci, td, status, destination |
1345 uhci_explen(urb->iso_frame_desc[i].length),
1347 urb->iso_frame_desc[i].offset);
1350 /* Set the interrupt-on-completion flag on the last packet. */
1351 td->status |= cpu_to_hc32(uhci, TD_CTRL_IOC);
1353 /* Add the TDs to the frame list */
1354 frame = urb->start_frame;
1355 list_for_each_entry(td, &urbp->td_list, list) {
1356 uhci_insert_td_in_frame_list(uhci, td, frame);
1357 frame += qh->period;
1360 if (list_empty(&qh->queue)) {
1361 qh->iso_packet_desc = &urb->iso_frame_desc[0];
1362 qh->iso_frame = urb->start_frame;
1365 qh->skel = SKEL_ISO;
1366 if (!qh->bandwidth_reserved)
1367 uhci_reserve_bandwidth(uhci, qh);
1371 static int uhci_result_isochronous(struct uhci_hcd *uhci, struct urb *urb)
1373 struct uhci_td *td, *tmp;
1374 struct urb_priv *urbp = urb->hcpriv;
1375 struct uhci_qh *qh = urbp->qh;
1377 list_for_each_entry_safe(td, tmp, &urbp->td_list, list) {
1378 unsigned int ctrlstat;
1382 if (uhci_frame_before_eq(uhci->cur_iso_frame, qh->iso_frame))
1383 return -EINPROGRESS;
1385 uhci_remove_tds_from_frame(uhci, qh->iso_frame);
1387 ctrlstat = td_status(uhci, td);
1388 if (ctrlstat & TD_CTRL_ACTIVE) {
1389 status = -EXDEV; /* TD was added too late? */
1391 status = uhci_map_status(uhci_status_bits(ctrlstat),
1392 usb_pipeout(urb->pipe));
1393 actlength = uhci_actual_length(ctrlstat);
1395 urb->actual_length += actlength;
1396 qh->iso_packet_desc->actual_length = actlength;
1397 qh->iso_packet_desc->status = status;
1402 uhci_remove_td_from_urbp(td);
1403 uhci_free_td(uhci, td);
1404 qh->iso_frame += qh->period;
1405 ++qh->iso_packet_desc;
1410 static int uhci_urb_enqueue(struct usb_hcd *hcd,
1411 struct urb *urb, gfp_t mem_flags)
1414 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
1415 unsigned long flags;
1416 struct urb_priv *urbp;
1419 spin_lock_irqsave(&uhci->lock, flags);
1421 ret = usb_hcd_link_urb_to_ep(hcd, urb);
1423 goto done_not_linked;
1426 urbp = uhci_alloc_urb_priv(uhci, urb);
1430 if (urb->ep->hcpriv)
1431 qh = urb->ep->hcpriv;
1433 qh = uhci_alloc_qh(uhci, urb->dev, urb->ep);
1440 case USB_ENDPOINT_XFER_CONTROL:
1441 ret = uhci_submit_control(uhci, urb, qh);
1443 case USB_ENDPOINT_XFER_BULK:
1444 ret = uhci_submit_bulk(uhci, urb, qh);
1446 case USB_ENDPOINT_XFER_INT:
1447 ret = uhci_submit_interrupt(uhci, urb, qh);
1449 case USB_ENDPOINT_XFER_ISOC:
1450 urb->error_count = 0;
1451 ret = uhci_submit_isochronous(uhci, urb, qh);
1455 goto err_submit_failed;
1457 /* Add this URB to the QH */
1458 list_add_tail(&urbp->node, &qh->queue);
1460 /* If the new URB is the first and only one on this QH then either
1461 * the QH is new and idle or else it's unlinked and waiting to
1462 * become idle, so we can activate it right away. But only if the
1463 * queue isn't stopped. */
1464 if (qh->queue.next == &urbp->node && !qh->is_stopped) {
1465 uhci_activate_qh(uhci, qh);
1466 uhci_urbp_wants_fsbr(uhci, urbp);
1471 if (qh->state == QH_STATE_IDLE)
1472 uhci_make_qh_idle(uhci, qh); /* Reclaim unused QH */
1474 uhci_free_urb_priv(uhci, urbp);
1477 usb_hcd_unlink_urb_from_ep(hcd, urb);
1479 spin_unlock_irqrestore(&uhci->lock, flags);
1483 static int uhci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
1485 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
1486 unsigned long flags;
1490 spin_lock_irqsave(&uhci->lock, flags);
1491 rc = usb_hcd_check_unlink_urb(hcd, urb, status);
1495 qh = ((struct urb_priv *) urb->hcpriv)->qh;
1497 /* Remove Isochronous TDs from the frame list ASAP */
1498 if (qh->type == USB_ENDPOINT_XFER_ISOC) {
1499 uhci_unlink_isochronous_tds(uhci, urb);
1502 /* If the URB has already started, update the QH unlink time */
1503 uhci_get_current_frame_number(uhci);
1504 if (uhci_frame_before_eq(urb->start_frame, uhci->frame_number))
1505 qh->unlink_frame = uhci->frame_number;
1508 uhci_unlink_qh(uhci, qh);
1511 spin_unlock_irqrestore(&uhci->lock, flags);
1516 * Finish unlinking an URB and give it back
1518 static void uhci_giveback_urb(struct uhci_hcd *uhci, struct uhci_qh *qh,
1519 struct urb *urb, int status)
1520 __releases(uhci->lock)
1521 __acquires(uhci->lock)
1523 struct urb_priv *urbp = (struct urb_priv *) urb->hcpriv;
1525 if (qh->type == USB_ENDPOINT_XFER_CONTROL) {
1527 /* Subtract off the length of the SETUP packet from
1528 * urb->actual_length.
1530 urb->actual_length -= min_t(u32, 8, urb->actual_length);
1533 /* When giving back the first URB in an Isochronous queue,
1534 * reinitialize the QH's iso-related members for the next URB. */
1535 else if (qh->type == USB_ENDPOINT_XFER_ISOC &&
1536 urbp->node.prev == &qh->queue &&
1537 urbp->node.next != &qh->queue) {
1538 struct urb *nurb = list_entry(urbp->node.next,
1539 struct urb_priv, node)->urb;
1541 qh->iso_packet_desc = &nurb->iso_frame_desc[0];
1542 qh->iso_frame = nurb->start_frame;
1545 /* Take the URB off the QH's queue. If the queue is now empty,
1546 * this is a perfect time for a toggle fixup. */
1547 list_del_init(&urbp->node);
1548 if (list_empty(&qh->queue) && qh->needs_fixup) {
1549 usb_settoggle(urb->dev, usb_pipeendpoint(urb->pipe),
1550 usb_pipeout(urb->pipe), qh->initial_toggle);
1551 qh->needs_fixup = 0;
1554 uhci_free_urb_priv(uhci, urbp);
1555 usb_hcd_unlink_urb_from_ep(uhci_to_hcd(uhci), urb);
1557 spin_unlock(&uhci->lock);
1558 usb_hcd_giveback_urb(uhci_to_hcd(uhci), urb, status);
1559 spin_lock(&uhci->lock);
1561 /* If the queue is now empty, we can unlink the QH and give up its
1562 * reserved bandwidth. */
1563 if (list_empty(&qh->queue)) {
1564 uhci_unlink_qh(uhci, qh);
1565 if (qh->bandwidth_reserved)
1566 uhci_release_bandwidth(uhci, qh);
1571 * Scan the URBs in a QH's queue
1573 #define QH_FINISHED_UNLINKING(qh) \
1574 (qh->state == QH_STATE_UNLINKING && \
1575 uhci->frame_number + uhci->is_stopped != qh->unlink_frame)
1577 static void uhci_scan_qh(struct uhci_hcd *uhci, struct uhci_qh *qh)
1579 struct urb_priv *urbp;
1583 while (!list_empty(&qh->queue)) {
1584 urbp = list_entry(qh->queue.next, struct urb_priv, node);
1587 if (qh->type == USB_ENDPOINT_XFER_ISOC)
1588 status = uhci_result_isochronous(uhci, urb);
1590 status = uhci_result_common(uhci, urb);
1591 if (status == -EINPROGRESS)
1594 /* Dequeued but completed URBs can't be given back unless
1595 * the QH is stopped or has finished unlinking. */
1596 if (urb->unlinked) {
1597 if (QH_FINISHED_UNLINKING(qh))
1599 else if (!qh->is_stopped)
1603 uhci_giveback_urb(uhci, qh, urb, status);
1608 /* If the QH is neither stopped nor finished unlinking (normal case),
1609 * our work here is done. */
1610 if (QH_FINISHED_UNLINKING(qh))
1612 else if (!qh->is_stopped)
1615 /* Otherwise give back each of the dequeued URBs */
1617 list_for_each_entry(urbp, &qh->queue, node) {
1619 if (urb->unlinked) {
1621 /* Fix up the TD links and save the toggles for
1622 * non-Isochronous queues. For Isochronous queues,
1623 * test for too-recent dequeues. */
1624 if (!uhci_cleanup_queue(uhci, qh, urb)) {
1628 uhci_giveback_urb(uhci, qh, urb, 0);
1634 /* There are no more dequeued URBs. If there are still URBs on the
1635 * queue, the QH can now be re-activated. */
1636 if (!list_empty(&qh->queue)) {
1637 if (qh->needs_fixup)
1638 uhci_fixup_toggles(uhci, qh, 0);
1640 /* If the first URB on the queue wants FSBR but its time
1641 * limit has expired, set the next TD to interrupt on
1642 * completion before reactivating the QH. */
1643 urbp = list_entry(qh->queue.next, struct urb_priv, node);
1644 if (urbp->fsbr && qh->wait_expired) {
1645 struct uhci_td *td = list_entry(urbp->td_list.next,
1646 struct uhci_td, list);
1648 td->status |= cpu_to_hc32(uhci, TD_CTRL_IOC);
1651 uhci_activate_qh(uhci, qh);
1654 /* The queue is empty. The QH can become idle if it is fully
1656 else if (QH_FINISHED_UNLINKING(qh))
1657 uhci_make_qh_idle(uhci, qh);
1661 * Check for queues that have made some forward progress.
1662 * Returns 0 if the queue is not Isochronous, is ACTIVE, and
1663 * has not advanced since last examined; 1 otherwise.
1665 * Early Intel controllers have a bug which causes qh->element sometimes
1666 * not to advance when a TD completes successfully. The queue remains
1667 * stuck on the inactive completed TD. We detect such cases and advance
1668 * the element pointer by hand.
1670 static int uhci_advance_check(struct uhci_hcd *uhci, struct uhci_qh *qh)
1672 struct urb_priv *urbp = NULL;
1677 if (qh->type == USB_ENDPOINT_XFER_ISOC)
1680 /* Treat an UNLINKING queue as though it hasn't advanced.
1681 * This is okay because reactivation will treat it as though
1682 * it has advanced, and if it is going to become IDLE then
1683 * this doesn't matter anyway. Furthermore it's possible
1684 * for an UNLINKING queue not to have any URBs at all, or
1685 * for its first URB not to have any TDs (if it was dequeued
1686 * just as it completed). So it's not easy in any case to
1687 * test whether such queues have advanced. */
1688 if (qh->state != QH_STATE_ACTIVE) {
1693 urbp = list_entry(qh->queue.next, struct urb_priv, node);
1694 td = list_entry(urbp->td_list.next, struct uhci_td, list);
1695 status = td_status(uhci, td);
1696 if (!(status & TD_CTRL_ACTIVE)) {
1698 /* We're okay, the queue has advanced */
1699 qh->wait_expired = 0;
1700 qh->advance_jiffies = jiffies;
1703 ret = uhci->is_stopped;
1706 /* The queue hasn't advanced; check for timeout */
1707 if (qh->wait_expired)
1710 if (time_after(jiffies, qh->advance_jiffies + QH_WAIT_TIMEOUT)) {
1712 /* Detect the Intel bug and work around it */
1713 if (qh->post_td && qh_element(qh) ==
1714 LINK_TO_TD(uhci, qh->post_td)) {
1715 qh->element = qh->post_td->link;
1716 qh->advance_jiffies = jiffies;
1721 qh->wait_expired = 1;
1723 /* If the current URB wants FSBR, unlink it temporarily
1724 * so that we can safely set the next TD to interrupt on
1725 * completion. That way we'll know as soon as the queue
1726 * starts moving again. */
1727 if (urbp && urbp->fsbr && !(status & TD_CTRL_IOC))
1728 uhci_unlink_qh(uhci, qh);
1731 /* Unmoving but not-yet-expired queues keep FSBR alive */
1733 uhci_urbp_wants_fsbr(uhci, urbp);
1741 * Process events in the schedule, but only in one thread at a time
1743 static void uhci_scan_schedule(struct uhci_hcd *uhci)
1748 /* Don't allow re-entrant calls */
1749 if (uhci->scan_in_progress) {
1750 uhci->need_rescan = 1;
1753 uhci->scan_in_progress = 1;
1755 uhci->need_rescan = 0;
1756 uhci->fsbr_is_wanted = 0;
1758 uhci_clear_next_interrupt(uhci);
1759 uhci_get_current_frame_number(uhci);
1760 uhci->cur_iso_frame = uhci->frame_number;
1762 /* Go through all the QH queues and process the URBs in each one */
1763 for (i = 0; i < UHCI_NUM_SKELQH - 1; ++i) {
1764 uhci->next_qh = list_entry(uhci->skelqh[i]->node.next,
1765 struct uhci_qh, node);
1766 while ((qh = uhci->next_qh) != uhci->skelqh[i]) {
1767 uhci->next_qh = list_entry(qh->node.next,
1768 struct uhci_qh, node);
1770 if (uhci_advance_check(uhci, qh)) {
1771 uhci_scan_qh(uhci, qh);
1772 if (qh->state == QH_STATE_ACTIVE) {
1773 uhci_urbp_wants_fsbr(uhci,
1774 list_entry(qh->queue.next, struct urb_priv, node));
1780 uhci->last_iso_frame = uhci->cur_iso_frame;
1781 if (uhci->need_rescan)
1783 uhci->scan_in_progress = 0;
1785 if (uhci->fsbr_is_on && !uhci->fsbr_is_wanted &&
1786 !uhci->fsbr_expiring) {
1787 uhci->fsbr_expiring = 1;
1788 mod_timer(&uhci->fsbr_timer, jiffies + FSBR_OFF_DELAY);
1791 if (list_empty(&uhci->skel_unlink_qh->node))
1792 uhci_clear_next_interrupt(uhci);
1794 uhci_set_next_interrupt(uhci);