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1 /*
2  * xHCI host controller driver
3  *
4  * Copyright (C) 2008 Intel Corp.
5  *
6  * Author: Sarah Sharp
7  * Some code borrowed from the Linux EHCI driver.
8  *
9  * This program is free software; you can redistribute it and/or modify
10  * it under the terms of the GNU General Public License version 2 as
11  * published by the Free Software Foundation.
12  *
13  * This program is distributed in the hope that it will be useful, but
14  * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15  * or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
16  * for more details.
17  *
18  * You should have received a copy of the GNU General Public License
19  * along with this program; if not, write to the Free Software Foundation,
20  * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21  */
22
23 #include <asm/unaligned.h>
24
25 #include "xhci.h"
26
27 #define PORT_WAKE_BITS  (PORT_WKOC_E | PORT_WKDISC_E | PORT_WKCONN_E)
28 #define PORT_RWC_BITS   (PORT_CSC | PORT_PEC | PORT_WRC | PORT_OCC | \
29                          PORT_RC | PORT_PLC | PORT_PE)
30
31 static void xhci_common_hub_descriptor(struct xhci_hcd *xhci,
32                 struct usb_hub_descriptor *desc, int ports)
33 {
34         u16 temp;
35
36         desc->bPwrOn2PwrGood = 10;      /* xhci section 5.4.9 says 20ms max */
37         desc->bHubContrCurrent = 0;
38
39         desc->bNbrPorts = ports;
40         /* Ugh, these should be #defines, FIXME */
41         /* Using table 11-13 in USB 2.0 spec. */
42         temp = 0;
43         /* Bits 1:0 - support port power switching, or power always on */
44         if (HCC_PPC(xhci->hcc_params))
45                 temp |= 0x0001;
46         else
47                 temp |= 0x0002;
48         /* Bit  2 - root hubs are not part of a compound device */
49         /* Bits 4:3 - individual port over current protection */
50         temp |= 0x0008;
51         /* Bits 6:5 - no TTs in root ports */
52         /* Bit  7 - no port indicators */
53         desc->wHubCharacteristics = (__force __u16) cpu_to_le16(temp);
54 }
55
56 /* Fill in the USB 2.0 roothub descriptor */
57 static void xhci_usb2_hub_descriptor(struct usb_hcd *hcd, struct xhci_hcd *xhci,
58                 struct usb_hub_descriptor *desc)
59 {
60         int ports;
61         u16 temp;
62         __u8 port_removable[(USB_MAXCHILDREN + 1 + 7) / 8];
63         u32 portsc;
64         unsigned int i;
65
66         ports = xhci->num_usb2_ports;
67
68         xhci_common_hub_descriptor(xhci, desc, ports);
69         desc->bDescriptorType = 0x29;
70         temp = 1 + (ports / 8);
71         desc->bDescLength = 7 + 2 * temp;
72
73         /* The Device Removable bits are reported on a byte granularity.
74          * If the port doesn't exist within that byte, the bit is set to 0.
75          */
76         memset(port_removable, 0, sizeof(port_removable));
77         for (i = 0; i < ports; i++) {
78                 portsc = xhci_readl(xhci, xhci->usb3_ports[i]);
79                 /* If a device is removable, PORTSC reports a 0, same as in the
80                  * hub descriptor DeviceRemovable bits.
81                  */
82                 if (portsc & PORT_DEV_REMOVE)
83                         /* This math is hairy because bit 0 of DeviceRemovable
84                          * is reserved, and bit 1 is for port 1, etc.
85                          */
86                         port_removable[(i + 1) / 8] |= 1 << ((i + 1) % 8);
87         }
88
89         /* ch11.h defines a hub descriptor that has room for USB_MAXCHILDREN
90          * ports on it.  The USB 2.0 specification says that there are two
91          * variable length fields at the end of the hub descriptor:
92          * DeviceRemovable and PortPwrCtrlMask.  But since we can have less than
93          * USB_MAXCHILDREN ports, we may need to use the DeviceRemovable array
94          * to set PortPwrCtrlMask bits.  PortPwrCtrlMask must always be set to
95          * 0xFF, so we initialize the both arrays (DeviceRemovable and
96          * PortPwrCtrlMask) to 0xFF.  Then we set the DeviceRemovable for each
97          * set of ports that actually exist.
98          */
99         memset(desc->u.hs.DeviceRemovable, 0xff,
100                         sizeof(desc->u.hs.DeviceRemovable));
101         memset(desc->u.hs.PortPwrCtrlMask, 0xff,
102                         sizeof(desc->u.hs.PortPwrCtrlMask));
103
104         for (i = 0; i < (ports + 1 + 7) / 8; i++)
105                 memset(&desc->u.hs.DeviceRemovable[i], port_removable[i],
106                                 sizeof(__u8));
107 }
108
109 /* Fill in the USB 3.0 roothub descriptor */
110 static void xhci_usb3_hub_descriptor(struct usb_hcd *hcd, struct xhci_hcd *xhci,
111                 struct usb_hub_descriptor *desc)
112 {
113         int ports;
114         u16 port_removable;
115         u32 portsc;
116         unsigned int i;
117
118         ports = xhci->num_usb3_ports;
119         xhci_common_hub_descriptor(xhci, desc, ports);
120         desc->bDescriptorType = 0x2a;
121         desc->bDescLength = 12;
122
123         /* header decode latency should be zero for roothubs,
124          * see section 4.23.5.2.
125          */
126         desc->u.ss.bHubHdrDecLat = 0;
127         desc->u.ss.wHubDelay = 0;
128
129         port_removable = 0;
130         /* bit 0 is reserved, bit 1 is for port 1, etc. */
131         for (i = 0; i < ports; i++) {
132                 portsc = xhci_readl(xhci, xhci->usb3_ports[i]);
133                 if (portsc & PORT_DEV_REMOVE)
134                         port_removable |= 1 << (i + 1);
135         }
136         memset(&desc->u.ss.DeviceRemovable,
137                         (__force __u16) cpu_to_le16(port_removable),
138                         sizeof(__u16));
139 }
140
141 static void xhci_hub_descriptor(struct usb_hcd *hcd, struct xhci_hcd *xhci,
142                 struct usb_hub_descriptor *desc)
143 {
144
145         if (hcd->speed == HCD_USB3)
146                 xhci_usb3_hub_descriptor(hcd, xhci, desc);
147         else
148                 xhci_usb2_hub_descriptor(hcd, xhci, desc);
149
150 }
151
152 static unsigned int xhci_port_speed(unsigned int port_status)
153 {
154         if (DEV_LOWSPEED(port_status))
155                 return USB_PORT_STAT_LOW_SPEED;
156         if (DEV_HIGHSPEED(port_status))
157                 return USB_PORT_STAT_HIGH_SPEED;
158         if (DEV_SUPERSPEED(port_status))
159                 return USB_PORT_STAT_SUPER_SPEED;
160         /*
161          * FIXME: Yes, we should check for full speed, but the core uses that as
162          * a default in portspeed() in usb/core/hub.c (which is the only place
163          * USB_PORT_STAT_*_SPEED is used).
164          */
165         return 0;
166 }
167
168 /*
169  * These bits are Read Only (RO) and should be saved and written to the
170  * registers: 0, 3, 10:13, 30
171  * connect status, over-current status, port speed, and device removable.
172  * connect status and port speed are also sticky - meaning they're in
173  * the AUX well and they aren't changed by a hot, warm, or cold reset.
174  */
175 #define XHCI_PORT_RO    ((1<<0) | (1<<3) | (0xf<<10) | (1<<30))
176 /*
177  * These bits are RW; writing a 0 clears the bit, writing a 1 sets the bit:
178  * bits 5:8, 9, 14:15, 25:27
179  * link state, port power, port indicator state, "wake on" enable state
180  */
181 #define XHCI_PORT_RWS   ((0xf<<5) | (1<<9) | (0x3<<14) | (0x7<<25))
182 /*
183  * These bits are RW; writing a 1 sets the bit, writing a 0 has no effect:
184  * bit 4 (port reset)
185  */
186 #define XHCI_PORT_RW1S  ((1<<4))
187 /*
188  * These bits are RW; writing a 1 clears the bit, writing a 0 has no effect:
189  * bits 1, 17, 18, 19, 20, 21, 22, 23
190  * port enable/disable, and
191  * change bits: connect, PED, warm port reset changed (reserved zero for USB 2.0 ports),
192  * over-current, reset, link state, and L1 change
193  */
194 #define XHCI_PORT_RW1CS ((1<<1) | (0x7f<<17))
195 /*
196  * Bit 16 is RW, and writing a '1' to it causes the link state control to be
197  * latched in
198  */
199 #define XHCI_PORT_RW    ((1<<16))
200 /*
201  * These bits are Reserved Zero (RsvdZ) and zero should be written to them:
202  * bits 2, 24, 28:31
203  */
204 #define XHCI_PORT_RZ    ((1<<2) | (1<<24) | (0xf<<28))
205
206 /*
207  * Given a port state, this function returns a value that would result in the
208  * port being in the same state, if the value was written to the port status
209  * control register.
210  * Save Read Only (RO) bits and save read/write bits where
211  * writing a 0 clears the bit and writing a 1 sets the bit (RWS).
212  * For all other types (RW1S, RW1CS, RW, and RZ), writing a '0' has no effect.
213  */
214 u32 xhci_port_state_to_neutral(u32 state)
215 {
216         /* Save read-only status and port state */
217         return (state & XHCI_PORT_RO) | (state & XHCI_PORT_RWS);
218 }
219
220 /*
221  * find slot id based on port number.
222  * @port: The one-based port number from one of the two split roothubs.
223  */
224 int xhci_find_slot_id_by_port(struct usb_hcd *hcd, struct xhci_hcd *xhci,
225                 u16 port)
226 {
227         int slot_id;
228         int i;
229         enum usb_device_speed speed;
230
231         slot_id = 0;
232         for (i = 0; i < MAX_HC_SLOTS; i++) {
233                 if (!xhci->devs[i])
234                         continue;
235                 speed = xhci->devs[i]->udev->speed;
236                 if (((speed == USB_SPEED_SUPER) == (hcd->speed == HCD_USB3))
237                                 && xhci->devs[i]->port == port) {
238                         slot_id = i;
239                         break;
240                 }
241         }
242
243         return slot_id;
244 }
245
246 /*
247  * Stop device
248  * It issues stop endpoint command for EP 0 to 30. And wait the last command
249  * to complete.
250  * suspend will set to 1, if suspend bit need to set in command.
251  */
252 static int xhci_stop_device(struct xhci_hcd *xhci, int slot_id, int suspend)
253 {
254         struct xhci_virt_device *virt_dev;
255         struct xhci_command *cmd;
256         unsigned long flags;
257         int timeleft;
258         int ret;
259         int i;
260
261         ret = 0;
262         virt_dev = xhci->devs[slot_id];
263         cmd = xhci_alloc_command(xhci, false, true, GFP_NOIO);
264         if (!cmd) {
265                 xhci_dbg(xhci, "Couldn't allocate command structure.\n");
266                 return -ENOMEM;
267         }
268
269         spin_lock_irqsave(&xhci->lock, flags);
270         for (i = LAST_EP_INDEX; i > 0; i--) {
271                 if (virt_dev->eps[i].ring && virt_dev->eps[i].ring->dequeue)
272                         xhci_queue_stop_endpoint(xhci, slot_id, i, suspend);
273         }
274         cmd->command_trb = xhci->cmd_ring->enqueue;
275         list_add_tail(&cmd->cmd_list, &virt_dev->cmd_list);
276         xhci_queue_stop_endpoint(xhci, slot_id, 0, suspend);
277         xhci_ring_cmd_db(xhci);
278         spin_unlock_irqrestore(&xhci->lock, flags);
279
280         /* Wait for last stop endpoint command to finish */
281         timeleft = wait_for_completion_interruptible_timeout(
282                         cmd->completion,
283                         USB_CTRL_SET_TIMEOUT);
284         if (timeleft <= 0) {
285                 xhci_warn(xhci, "%s while waiting for stop endpoint command\n",
286                                 timeleft == 0 ? "Timeout" : "Signal");
287                 spin_lock_irqsave(&xhci->lock, flags);
288                 /* The timeout might have raced with the event ring handler, so
289                  * only delete from the list if the item isn't poisoned.
290                  */
291                 if (cmd->cmd_list.next != LIST_POISON1)
292                         list_del(&cmd->cmd_list);
293                 spin_unlock_irqrestore(&xhci->lock, flags);
294                 ret = -ETIME;
295                 goto command_cleanup;
296         }
297
298 command_cleanup:
299         xhci_free_command(xhci, cmd);
300         return ret;
301 }
302
303 /*
304  * Ring device, it rings the all doorbells unconditionally.
305  */
306 void xhci_ring_device(struct xhci_hcd *xhci, int slot_id)
307 {
308         int i;
309
310         for (i = 0; i < LAST_EP_INDEX + 1; i++)
311                 if (xhci->devs[slot_id]->eps[i].ring &&
312                     xhci->devs[slot_id]->eps[i].ring->dequeue)
313                         xhci_ring_ep_doorbell(xhci, slot_id, i, 0);
314
315         return;
316 }
317
318 static void xhci_disable_port(struct usb_hcd *hcd, struct xhci_hcd *xhci,
319                 u16 wIndex, u32 __iomem *addr, u32 port_status)
320 {
321         /* Don't allow the USB core to disable SuperSpeed ports. */
322         if (hcd->speed == HCD_USB3) {
323                 xhci_dbg(xhci, "Ignoring request to disable "
324                                 "SuperSpeed port.\n");
325                 return;
326         }
327
328         /* Write 1 to disable the port */
329         xhci_writel(xhci, port_status | PORT_PE, addr);
330         port_status = xhci_readl(xhci, addr);
331         xhci_dbg(xhci, "disable port, actual port %d status  = 0x%x\n",
332                         wIndex, port_status);
333 }
334
335 static void xhci_clear_port_change_bit(struct xhci_hcd *xhci, u16 wValue,
336                 u16 wIndex, u32 __iomem *addr, u32 port_status)
337 {
338         char *port_change_bit;
339         u32 status;
340
341         switch (wValue) {
342         case USB_PORT_FEAT_C_RESET:
343                 status = PORT_RC;
344                 port_change_bit = "reset";
345                 break;
346         case USB_PORT_FEAT_C_CONNECTION:
347                 status = PORT_CSC;
348                 port_change_bit = "connect";
349                 break;
350         case USB_PORT_FEAT_C_OVER_CURRENT:
351                 status = PORT_OCC;
352                 port_change_bit = "over-current";
353                 break;
354         case USB_PORT_FEAT_C_ENABLE:
355                 status = PORT_PEC;
356                 port_change_bit = "enable/disable";
357                 break;
358         case USB_PORT_FEAT_C_SUSPEND:
359                 status = PORT_PLC;
360                 port_change_bit = "suspend/resume";
361                 break;
362         default:
363                 /* Should never happen */
364                 return;
365         }
366         /* Change bits are all write 1 to clear */
367         xhci_writel(xhci, port_status | status, addr);
368         port_status = xhci_readl(xhci, addr);
369         xhci_dbg(xhci, "clear port %s change, actual port %d status  = 0x%x\n",
370                         port_change_bit, wIndex, port_status);
371 }
372
373 int xhci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue,
374                 u16 wIndex, char *buf, u16 wLength)
375 {
376         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
377         int ports;
378         unsigned long flags;
379         u32 temp, temp1, status;
380         int retval = 0;
381         u32 __iomem **port_array;
382         int slot_id;
383         struct xhci_bus_state *bus_state;
384
385         if (hcd->speed == HCD_USB3) {
386                 ports = xhci->num_usb3_ports;
387                 port_array = xhci->usb3_ports;
388         } else {
389                 ports = xhci->num_usb2_ports;
390                 port_array = xhci->usb2_ports;
391         }
392         bus_state = &xhci->bus_state[hcd_index(hcd)];
393
394         spin_lock_irqsave(&xhci->lock, flags);
395         switch (typeReq) {
396         case GetHubStatus:
397                 /* No power source, over-current reported per port */
398                 memset(buf, 0, 4);
399                 break;
400         case GetHubDescriptor:
401                 /* Check to make sure userspace is asking for the USB 3.0 hub
402                  * descriptor for the USB 3.0 roothub.  If not, we stall the
403                  * endpoint, like external hubs do.
404                  */
405                 if (hcd->speed == HCD_USB3 &&
406                                 (wLength < USB_DT_SS_HUB_SIZE ||
407                                  wValue != (USB_DT_SS_HUB << 8))) {
408                         xhci_dbg(xhci, "Wrong hub descriptor type for "
409                                         "USB 3.0 roothub.\n");
410                         goto error;
411                 }
412                 xhci_hub_descriptor(hcd, xhci,
413                                 (struct usb_hub_descriptor *) buf);
414                 break;
415         case GetPortStatus:
416                 if (!wIndex || wIndex > ports)
417                         goto error;
418                 wIndex--;
419                 status = 0;
420                 temp = xhci_readl(xhci, port_array[wIndex]);
421                 if (temp == 0xffffffff) {
422                         retval = -ENODEV;
423                         break;
424                 }
425                 xhci_dbg(xhci, "get port status, actual port %d status  = 0x%x\n", wIndex, temp);
426
427                 /* FIXME - should we return a port status value like the USB
428                  * 3.0 external hubs do?
429                  */
430                 /* wPortChange bits */
431                 if (temp & PORT_CSC)
432                         status |= USB_PORT_STAT_C_CONNECTION << 16;
433                 if (temp & PORT_PEC)
434                         status |= USB_PORT_STAT_C_ENABLE << 16;
435                 if ((temp & PORT_OCC))
436                         status |= USB_PORT_STAT_C_OVERCURRENT << 16;
437                 /*
438                  * FIXME ignoring reset and USB 2.1/3.0 specific
439                  * changes
440                  */
441                 if ((temp & PORT_PLS_MASK) == XDEV_U3
442                         && (temp & PORT_POWER))
443                         status |= 1 << USB_PORT_FEAT_SUSPEND;
444                 if ((temp & PORT_PLS_MASK) == XDEV_RESUME) {
445                         if ((temp & PORT_RESET) || !(temp & PORT_PE))
446                                 goto error;
447                         if (!DEV_SUPERSPEED(temp) && time_after_eq(jiffies,
448                                                 bus_state->resume_done[wIndex])) {
449                                 xhci_dbg(xhci, "Resume USB2 port %d\n",
450                                         wIndex + 1);
451                                 bus_state->resume_done[wIndex] = 0;
452                                 temp1 = xhci_port_state_to_neutral(temp);
453                                 temp1 &= ~PORT_PLS_MASK;
454                                 temp1 |= PORT_LINK_STROBE | XDEV_U0;
455                                 xhci_writel(xhci, temp1, port_array[wIndex]);
456
457                                 xhci_dbg(xhci, "set port %d resume\n",
458                                         wIndex + 1);
459                                 slot_id = xhci_find_slot_id_by_port(hcd, xhci,
460                                                                  wIndex + 1);
461                                 if (!slot_id) {
462                                         xhci_dbg(xhci, "slot_id is zero\n");
463                                         goto error;
464                                 }
465                                 xhci_ring_device(xhci, slot_id);
466                                 bus_state->port_c_suspend |= 1 << wIndex;
467                                 bus_state->suspended_ports &= ~(1 << wIndex);
468                         }
469                 }
470                 if ((temp & PORT_PLS_MASK) == XDEV_U0
471                         && (temp & PORT_POWER)
472                         && (bus_state->suspended_ports & (1 << wIndex))) {
473                         bus_state->suspended_ports &= ~(1 << wIndex);
474                         bus_state->port_c_suspend |= 1 << wIndex;
475                 }
476                 if (temp & PORT_CONNECT) {
477                         status |= USB_PORT_STAT_CONNECTION;
478                         status |= xhci_port_speed(temp);
479                 }
480                 if (temp & PORT_PE)
481                         status |= USB_PORT_STAT_ENABLE;
482                 if (temp & PORT_OC)
483                         status |= USB_PORT_STAT_OVERCURRENT;
484                 if (temp & PORT_RESET)
485                         status |= USB_PORT_STAT_RESET;
486                 if (temp & PORT_POWER)
487                         status |= USB_PORT_STAT_POWER;
488                 if (bus_state->port_c_suspend & (1 << wIndex))
489                         status |= 1 << USB_PORT_FEAT_C_SUSPEND;
490                 xhci_dbg(xhci, "Get port status returned 0x%x\n", status);
491                 put_unaligned(cpu_to_le32(status), (__le32 *) buf);
492                 break;
493         case SetPortFeature:
494                 wIndex &= 0xff;
495                 if (!wIndex || wIndex > ports)
496                         goto error;
497                 wIndex--;
498                 temp = xhci_readl(xhci, port_array[wIndex]);
499                 if (temp == 0xffffffff) {
500                         retval = -ENODEV;
501                         break;
502                 }
503                 temp = xhci_port_state_to_neutral(temp);
504                 /* FIXME: What new port features do we need to support? */
505                 switch (wValue) {
506                 case USB_PORT_FEAT_SUSPEND:
507                         temp = xhci_readl(xhci, port_array[wIndex]);
508                         /* In spec software should not attempt to suspend
509                          * a port unless the port reports that it is in the
510                          * enabled (PED = â€˜1’,PLS < â€˜3’) state.
511                          */
512                         if ((temp & PORT_PE) == 0 || (temp & PORT_RESET)
513                                 || (temp & PORT_PLS_MASK) >= XDEV_U3) {
514                                 xhci_warn(xhci, "USB core suspending device "
515                                           "not in U0/U1/U2.\n");
516                                 goto error;
517                         }
518
519                         slot_id = xhci_find_slot_id_by_port(hcd, xhci,
520                                         wIndex + 1);
521                         if (!slot_id) {
522                                 xhci_warn(xhci, "slot_id is zero\n");
523                                 goto error;
524                         }
525                         /* unlock to execute stop endpoint commands */
526                         spin_unlock_irqrestore(&xhci->lock, flags);
527                         xhci_stop_device(xhci, slot_id, 1);
528                         spin_lock_irqsave(&xhci->lock, flags);
529
530                         temp = xhci_port_state_to_neutral(temp);
531                         temp &= ~PORT_PLS_MASK;
532                         temp |= PORT_LINK_STROBE | XDEV_U3;
533                         xhci_writel(xhci, temp, port_array[wIndex]);
534
535                         spin_unlock_irqrestore(&xhci->lock, flags);
536                         msleep(10); /* wait device to enter */
537                         spin_lock_irqsave(&xhci->lock, flags);
538
539                         temp = xhci_readl(xhci, port_array[wIndex]);
540                         bus_state->suspended_ports |= 1 << wIndex;
541                         break;
542                 case USB_PORT_FEAT_POWER:
543                         /*
544                          * Turn on ports, even if there isn't per-port switching.
545                          * HC will report connect events even before this is set.
546                          * However, khubd will ignore the roothub events until
547                          * the roothub is registered.
548                          */
549                         xhci_writel(xhci, temp | PORT_POWER,
550                                         port_array[wIndex]);
551
552                         temp = xhci_readl(xhci, port_array[wIndex]);
553                         xhci_dbg(xhci, "set port power, actual port %d status  = 0x%x\n", wIndex, temp);
554                         break;
555                 case USB_PORT_FEAT_RESET:
556                         temp = (temp | PORT_RESET);
557                         xhci_writel(xhci, temp, port_array[wIndex]);
558
559                         temp = xhci_readl(xhci, port_array[wIndex]);
560                         xhci_dbg(xhci, "set port reset, actual port %d status  = 0x%x\n", wIndex, temp);
561                         break;
562                 default:
563                         goto error;
564                 }
565                 /* unblock any posted writes */
566                 temp = xhci_readl(xhci, port_array[wIndex]);
567                 break;
568         case ClearPortFeature:
569                 if (!wIndex || wIndex > ports)
570                         goto error;
571                 wIndex--;
572                 temp = xhci_readl(xhci, port_array[wIndex]);
573                 if (temp == 0xffffffff) {
574                         retval = -ENODEV;
575                         break;
576                 }
577                 /* FIXME: What new port features do we need to support? */
578                 temp = xhci_port_state_to_neutral(temp);
579                 switch (wValue) {
580                 case USB_PORT_FEAT_SUSPEND:
581                         temp = xhci_readl(xhci, port_array[wIndex]);
582                         xhci_dbg(xhci, "clear USB_PORT_FEAT_SUSPEND\n");
583                         xhci_dbg(xhci, "PORTSC %04x\n", temp);
584                         if (temp & PORT_RESET)
585                                 goto error;
586                         if (temp & XDEV_U3) {
587                                 if ((temp & PORT_PE) == 0)
588                                         goto error;
589                                 if (DEV_SUPERSPEED(temp)) {
590                                         temp = xhci_port_state_to_neutral(temp);
591                                         temp &= ~PORT_PLS_MASK;
592                                         temp |= PORT_LINK_STROBE | XDEV_U0;
593                                         xhci_writel(xhci, temp,
594                                                         port_array[wIndex]);
595                                         xhci_readl(xhci, port_array[wIndex]);
596                                 } else {
597                                         temp = xhci_port_state_to_neutral(temp);
598                                         temp &= ~PORT_PLS_MASK;
599                                         temp |= PORT_LINK_STROBE | XDEV_RESUME;
600                                         xhci_writel(xhci, temp,
601                                                         port_array[wIndex]);
602
603                                         spin_unlock_irqrestore(&xhci->lock,
604                                                                flags);
605                                         msleep(20);
606                                         spin_lock_irqsave(&xhci->lock, flags);
607
608                                         temp = xhci_readl(xhci,
609                                                         port_array[wIndex]);
610                                         temp = xhci_port_state_to_neutral(temp);
611                                         temp &= ~PORT_PLS_MASK;
612                                         temp |= PORT_LINK_STROBE | XDEV_U0;
613                                         xhci_writel(xhci, temp,
614                                                         port_array[wIndex]);
615                                 }
616                                 bus_state->port_c_suspend |= 1 << wIndex;
617                         }
618
619                         slot_id = xhci_find_slot_id_by_port(hcd, xhci,
620                                         wIndex + 1);
621                         if (!slot_id) {
622                                 xhci_dbg(xhci, "slot_id is zero\n");
623                                 goto error;
624                         }
625                         xhci_ring_device(xhci, slot_id);
626                         break;
627                 case USB_PORT_FEAT_C_SUSPEND:
628                         bus_state->port_c_suspend &= ~(1 << wIndex);
629                 case USB_PORT_FEAT_C_RESET:
630                 case USB_PORT_FEAT_C_CONNECTION:
631                 case USB_PORT_FEAT_C_OVER_CURRENT:
632                 case USB_PORT_FEAT_C_ENABLE:
633                         xhci_clear_port_change_bit(xhci, wValue, wIndex,
634                                         port_array[wIndex], temp);
635                         break;
636                 case USB_PORT_FEAT_ENABLE:
637                         xhci_disable_port(hcd, xhci, wIndex,
638                                         port_array[wIndex], temp);
639                         break;
640                 default:
641                         goto error;
642                 }
643                 break;
644         default:
645 error:
646                 /* "stall" on error */
647                 retval = -EPIPE;
648         }
649         spin_unlock_irqrestore(&xhci->lock, flags);
650         return retval;
651 }
652
653 /*
654  * Returns 0 if the status hasn't changed, or the number of bytes in buf.
655  * Ports are 0-indexed from the HCD point of view,
656  * and 1-indexed from the USB core pointer of view.
657  *
658  * Note that the status change bits will be cleared as soon as a port status
659  * change event is generated, so we use the saved status from that event.
660  */
661 int xhci_hub_status_data(struct usb_hcd *hcd, char *buf)
662 {
663         unsigned long flags;
664         u32 temp, status;
665         u32 mask;
666         int i, retval;
667         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
668         int ports;
669         u32 __iomem **port_array;
670         struct xhci_bus_state *bus_state;
671
672         if (hcd->speed == HCD_USB3) {
673                 ports = xhci->num_usb3_ports;
674                 port_array = xhci->usb3_ports;
675         } else {
676                 ports = xhci->num_usb2_ports;
677                 port_array = xhci->usb2_ports;
678         }
679         bus_state = &xhci->bus_state[hcd_index(hcd)];
680
681         /* Initial status is no changes */
682         retval = (ports + 8) / 8;
683         memset(buf, 0, retval);
684         status = 0;
685
686         mask = PORT_CSC | PORT_PEC | PORT_OCC;
687
688         spin_lock_irqsave(&xhci->lock, flags);
689         /* For each port, did anything change?  If so, set that bit in buf. */
690         for (i = 0; i < ports; i++) {
691                 temp = xhci_readl(xhci, port_array[i]);
692                 if (temp == 0xffffffff) {
693                         retval = -ENODEV;
694                         break;
695                 }
696                 if ((temp & mask) != 0 ||
697                         (bus_state->port_c_suspend & 1 << i) ||
698                         (bus_state->resume_done[i] && time_after_eq(
699                             jiffies, bus_state->resume_done[i]))) {
700                         buf[(i + 1) / 8] |= 1 << (i + 1) % 8;
701                         status = 1;
702                 }
703         }
704         spin_unlock_irqrestore(&xhci->lock, flags);
705         return status ? retval : 0;
706 }
707
708 #ifdef CONFIG_PM
709
710 int xhci_bus_suspend(struct usb_hcd *hcd)
711 {
712         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
713         int max_ports, port_index;
714         u32 __iomem **port_array;
715         struct xhci_bus_state *bus_state;
716         unsigned long flags;
717
718         if (hcd->speed == HCD_USB3) {
719                 max_ports = xhci->num_usb3_ports;
720                 port_array = xhci->usb3_ports;
721                 xhci_dbg(xhci, "suspend USB 3.0 root hub\n");
722         } else {
723                 max_ports = xhci->num_usb2_ports;
724                 port_array = xhci->usb2_ports;
725                 xhci_dbg(xhci, "suspend USB 2.0 root hub\n");
726         }
727         bus_state = &xhci->bus_state[hcd_index(hcd)];
728
729         spin_lock_irqsave(&xhci->lock, flags);
730
731         if (hcd->self.root_hub->do_remote_wakeup) {
732                 port_index = max_ports;
733                 while (port_index--) {
734                         if (bus_state->resume_done[port_index] != 0) {
735                                 spin_unlock_irqrestore(&xhci->lock, flags);
736                                 xhci_dbg(xhci, "suspend failed because "
737                                                 "port %d is resuming\n",
738                                                 port_index + 1);
739                                 return -EBUSY;
740                         }
741                 }
742         }
743
744         port_index = max_ports;
745         bus_state->bus_suspended = 0;
746         while (port_index--) {
747                 /* suspend the port if the port is not suspended */
748                 u32 t1, t2;
749                 int slot_id;
750
751                 t1 = xhci_readl(xhci, port_array[port_index]);
752                 t2 = xhci_port_state_to_neutral(t1);
753
754                 if ((t1 & PORT_PE) && !(t1 & PORT_PLS_MASK)) {
755                         xhci_dbg(xhci, "port %d not suspended\n", port_index);
756                         slot_id = xhci_find_slot_id_by_port(hcd, xhci,
757                                         port_index + 1);
758                         if (slot_id) {
759                                 spin_unlock_irqrestore(&xhci->lock, flags);
760                                 xhci_stop_device(xhci, slot_id, 1);
761                                 spin_lock_irqsave(&xhci->lock, flags);
762                         }
763                         t2 &= ~PORT_PLS_MASK;
764                         t2 |= PORT_LINK_STROBE | XDEV_U3;
765                         set_bit(port_index, &bus_state->bus_suspended);
766                 }
767                 if (hcd->self.root_hub->do_remote_wakeup) {
768                         if (t1 & PORT_CONNECT) {
769                                 t2 |= PORT_WKOC_E | PORT_WKDISC_E;
770                                 t2 &= ~PORT_WKCONN_E;
771                         } else {
772                                 t2 |= PORT_WKOC_E | PORT_WKCONN_E;
773                                 t2 &= ~PORT_WKDISC_E;
774                         }
775                 } else
776                         t2 &= ~PORT_WAKE_BITS;
777
778                 t1 = xhci_port_state_to_neutral(t1);
779                 if (t1 != t2)
780                         xhci_writel(xhci, t2, port_array[port_index]);
781
782                 if (DEV_HIGHSPEED(t1)) {
783                         /* enable remote wake up for USB 2.0 */
784                         u32 __iomem *addr;
785                         u32 tmp;
786
787                         /* Add one to the port status register address to get
788                          * the port power control register address.
789                          */
790                         addr = port_array[port_index] + 1;
791                         tmp = xhci_readl(xhci, addr);
792                         tmp |= PORT_RWE;
793                         xhci_writel(xhci, tmp, addr);
794                 }
795         }
796         hcd->state = HC_STATE_SUSPENDED;
797         bus_state->next_statechange = jiffies + msecs_to_jiffies(10);
798         spin_unlock_irqrestore(&xhci->lock, flags);
799         return 0;
800 }
801
802 int xhci_bus_resume(struct usb_hcd *hcd)
803 {
804         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
805         int max_ports, port_index;
806         u32 __iomem **port_array;
807         struct xhci_bus_state *bus_state;
808         u32 temp;
809         unsigned long flags;
810
811         if (hcd->speed == HCD_USB3) {
812                 max_ports = xhci->num_usb3_ports;
813                 port_array = xhci->usb3_ports;
814                 xhci_dbg(xhci, "resume USB 3.0 root hub\n");
815         } else {
816                 max_ports = xhci->num_usb2_ports;
817                 port_array = xhci->usb2_ports;
818                 xhci_dbg(xhci, "resume USB 2.0 root hub\n");
819         }
820         bus_state = &xhci->bus_state[hcd_index(hcd)];
821
822         if (time_before(jiffies, bus_state->next_statechange))
823                 msleep(5);
824
825         spin_lock_irqsave(&xhci->lock, flags);
826         if (!HCD_HW_ACCESSIBLE(hcd)) {
827                 spin_unlock_irqrestore(&xhci->lock, flags);
828                 return -ESHUTDOWN;
829         }
830
831         /* delay the irqs */
832         temp = xhci_readl(xhci, &xhci->op_regs->command);
833         temp &= ~CMD_EIE;
834         xhci_writel(xhci, temp, &xhci->op_regs->command);
835
836         port_index = max_ports;
837         while (port_index--) {
838                 /* Check whether need resume ports. If needed
839                    resume port and disable remote wakeup */
840                 u32 temp;
841                 int slot_id;
842
843                 temp = xhci_readl(xhci, port_array[port_index]);
844                 if (DEV_SUPERSPEED(temp))
845                         temp &= ~(PORT_RWC_BITS | PORT_CEC | PORT_WAKE_BITS);
846                 else
847                         temp &= ~(PORT_RWC_BITS | PORT_WAKE_BITS);
848                 if (test_bit(port_index, &bus_state->bus_suspended) &&
849                     (temp & PORT_PLS_MASK)) {
850                         if (DEV_SUPERSPEED(temp)) {
851                                 temp = xhci_port_state_to_neutral(temp);
852                                 temp &= ~PORT_PLS_MASK;
853                                 temp |= PORT_LINK_STROBE | XDEV_U0;
854                                 xhci_writel(xhci, temp, port_array[port_index]);
855                         } else {
856                                 temp = xhci_port_state_to_neutral(temp);
857                                 temp &= ~PORT_PLS_MASK;
858                                 temp |= PORT_LINK_STROBE | XDEV_RESUME;
859                                 xhci_writel(xhci, temp, port_array[port_index]);
860
861                                 spin_unlock_irqrestore(&xhci->lock, flags);
862                                 msleep(20);
863                                 spin_lock_irqsave(&xhci->lock, flags);
864
865                                 temp = xhci_readl(xhci, port_array[port_index]);
866                                 temp = xhci_port_state_to_neutral(temp);
867                                 temp &= ~PORT_PLS_MASK;
868                                 temp |= PORT_LINK_STROBE | XDEV_U0;
869                                 xhci_writel(xhci, temp, port_array[port_index]);
870                         }
871                         slot_id = xhci_find_slot_id_by_port(hcd,
872                                         xhci, port_index + 1);
873                         if (slot_id)
874                                 xhci_ring_device(xhci, slot_id);
875                 } else
876                         xhci_writel(xhci, temp, port_array[port_index]);
877
878                 if (DEV_HIGHSPEED(temp)) {
879                         /* disable remote wake up for USB 2.0 */
880                         u32 __iomem *addr;
881                         u32 tmp;
882
883                         /* Add one to the port status register address to get
884                          * the port power control register address.
885                          */
886                         addr = port_array[port_index] + 1;
887                         tmp = xhci_readl(xhci, addr);
888                         tmp &= ~PORT_RWE;
889                         xhci_writel(xhci, tmp, addr);
890                 }
891         }
892
893         (void) xhci_readl(xhci, &xhci->op_regs->command);
894
895         bus_state->next_statechange = jiffies + msecs_to_jiffies(5);
896         /* re-enable irqs */
897         temp = xhci_readl(xhci, &xhci->op_regs->command);
898         temp |= CMD_EIE;
899         xhci_writel(xhci, temp, &xhci->op_regs->command);
900         temp = xhci_readl(xhci, &xhci->op_regs->command);
901
902         spin_unlock_irqrestore(&xhci->lock, flags);
903         return 0;
904 }
905
906 #endif  /* CONFIG_PM */