2 * xHCI host controller driver
4 * Copyright (C) 2008 Intel Corp.
7 * Some code borrowed from the Linux EHCI driver.
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software Foundation,
20 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 #include <linux/pci.h>
24 #include <linux/irq.h>
25 #include <linux/log2.h>
26 #include <linux/module.h>
27 #include <linux/moduleparam.h>
28 #include <linux/slab.h>
29 #include <linux/dmi.h>
30 #include <linux/dma-mapping.h>
34 #define DRIVER_AUTHOR "Sarah Sharp"
35 #define DRIVER_DESC "'eXtensible' Host Controller (xHC) Driver"
37 /* Some 0.95 hardware can't handle the chain bit on a Link TRB being cleared */
38 static int link_quirk;
39 module_param(link_quirk, int, S_IRUGO | S_IWUSR);
40 MODULE_PARM_DESC(link_quirk, "Don't clear the chain bit on a link TRB");
42 /* TODO: copied from ehci-hcd.c - can this be refactored? */
44 * xhci_handshake - spin reading hc until handshake completes or fails
45 * @ptr: address of hc register to be read
46 * @mask: bits to look at in result of read
47 * @done: value of those bits when handshake succeeds
48 * @usec: timeout in microseconds
50 * Returns negative errno, or zero on success
52 * Success happens when the "mask" bits have the specified value (hardware
53 * handshake done). There are two failure modes: "usec" have passed (major
54 * hardware flakeout), or the register reads as all-ones (hardware removed).
56 int xhci_handshake(struct xhci_hcd *xhci, void __iomem *ptr,
57 u32 mask, u32 done, int usec)
62 result = xhci_readl(xhci, ptr);
63 if (result == ~(u32)0) /* card removed */
75 * Disable interrupts and begin the xHCI halting process.
77 void xhci_quiesce(struct xhci_hcd *xhci)
84 halted = xhci_readl(xhci, &xhci->op_regs->status) & STS_HALT;
88 cmd = xhci_readl(xhci, &xhci->op_regs->command);
90 xhci_writel(xhci, cmd, &xhci->op_regs->command);
94 * Force HC into halt state.
96 * Disable any IRQs and clear the run/stop bit.
97 * HC will complete any current and actively pipelined transactions, and
98 * should halt within 16 ms of the run/stop bit being cleared.
99 * Read HC Halted bit in the status register to see when the HC is finished.
101 int xhci_halt(struct xhci_hcd *xhci)
104 xhci_dbg(xhci, "// Halt the HC\n");
107 ret = xhci_handshake(xhci, &xhci->op_regs->status,
108 STS_HALT, STS_HALT, XHCI_MAX_HALT_USEC);
110 xhci->xhc_state |= XHCI_STATE_HALTED;
111 xhci->cmd_ring_state = CMD_RING_STATE_STOPPED;
113 xhci_warn(xhci, "Host not halted after %u microseconds.\n",
119 * Set the run bit and wait for the host to be running.
121 static int xhci_start(struct xhci_hcd *xhci)
126 temp = xhci_readl(xhci, &xhci->op_regs->command);
128 xhci_dbg(xhci, "// Turn on HC, cmd = 0x%x.\n",
130 xhci_writel(xhci, temp, &xhci->op_regs->command);
133 * Wait for the HCHalted Status bit to be 0 to indicate the host is
136 ret = xhci_handshake(xhci, &xhci->op_regs->status,
137 STS_HALT, 0, XHCI_MAX_HALT_USEC);
138 if (ret == -ETIMEDOUT)
139 xhci_err(xhci, "Host took too long to start, "
140 "waited %u microseconds.\n",
143 xhci->xhc_state &= ~XHCI_STATE_HALTED;
150 * This resets pipelines, timers, counters, state machines, etc.
151 * Transactions will be terminated immediately, and operational registers
152 * will be set to their defaults.
154 int xhci_reset(struct xhci_hcd *xhci)
160 state = xhci_readl(xhci, &xhci->op_regs->status);
161 if ((state & STS_HALT) == 0) {
162 xhci_warn(xhci, "Host controller not halted, aborting reset.\n");
166 xhci_dbg(xhci, "// Reset the HC\n");
167 command = xhci_readl(xhci, &xhci->op_regs->command);
168 command |= CMD_RESET;
169 xhci_writel(xhci, command, &xhci->op_regs->command);
171 ret = xhci_handshake(xhci, &xhci->op_regs->command,
172 CMD_RESET, 0, 10 * 1000 * 1000);
176 xhci_dbg(xhci, "Wait for controller to be ready for doorbell rings\n");
178 * xHCI cannot write to any doorbells or operational registers other
179 * than status until the "Controller Not Ready" flag is cleared.
181 ret = xhci_handshake(xhci, &xhci->op_regs->status,
182 STS_CNR, 0, 10 * 1000 * 1000);
184 for (i = 0; i < 2; ++i) {
185 xhci->bus_state[i].port_c_suspend = 0;
186 xhci->bus_state[i].suspended_ports = 0;
187 xhci->bus_state[i].resuming_ports = 0;
194 static int xhci_free_msi(struct xhci_hcd *xhci)
198 if (!xhci->msix_entries)
201 for (i = 0; i < xhci->msix_count; i++)
202 if (xhci->msix_entries[i].vector)
203 free_irq(xhci->msix_entries[i].vector,
211 static int xhci_setup_msi(struct xhci_hcd *xhci)
214 struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
216 ret = pci_enable_msi(pdev);
218 xhci_dbg(xhci, "failed to allocate MSI entry\n");
222 ret = request_irq(pdev->irq, xhci_msi_irq,
223 0, "xhci_hcd", xhci_to_hcd(xhci));
225 xhci_dbg(xhci, "disable MSI interrupt\n");
226 pci_disable_msi(pdev);
234 * free all IRQs request
236 static void xhci_free_irq(struct xhci_hcd *xhci)
238 struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
241 /* return if using legacy interrupt */
242 if (xhci_to_hcd(xhci)->irq > 0)
245 ret = xhci_free_msi(xhci);
249 free_irq(pdev->irq, xhci_to_hcd(xhci));
257 static int xhci_setup_msix(struct xhci_hcd *xhci)
260 struct usb_hcd *hcd = xhci_to_hcd(xhci);
261 struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
264 * calculate number of msi-x vectors supported.
265 * - HCS_MAX_INTRS: the max number of interrupts the host can handle,
266 * with max number of interrupters based on the xhci HCSPARAMS1.
267 * - num_online_cpus: maximum msi-x vectors per CPUs core.
268 * Add additional 1 vector to ensure always available interrupt.
270 xhci->msix_count = min(num_online_cpus() + 1,
271 HCS_MAX_INTRS(xhci->hcs_params1));
274 kmalloc((sizeof(struct msix_entry))*xhci->msix_count,
276 if (!xhci->msix_entries) {
277 xhci_err(xhci, "Failed to allocate MSI-X entries\n");
281 for (i = 0; i < xhci->msix_count; i++) {
282 xhci->msix_entries[i].entry = i;
283 xhci->msix_entries[i].vector = 0;
286 ret = pci_enable_msix(pdev, xhci->msix_entries, xhci->msix_count);
288 xhci_dbg(xhci, "Failed to enable MSI-X\n");
292 for (i = 0; i < xhci->msix_count; i++) {
293 ret = request_irq(xhci->msix_entries[i].vector,
295 0, "xhci_hcd", xhci_to_hcd(xhci));
300 hcd->msix_enabled = 1;
304 xhci_dbg(xhci, "disable MSI-X interrupt\n");
306 pci_disable_msix(pdev);
308 kfree(xhci->msix_entries);
309 xhci->msix_entries = NULL;
313 /* Free any IRQs and disable MSI-X */
314 static void xhci_cleanup_msix(struct xhci_hcd *xhci)
316 struct usb_hcd *hcd = xhci_to_hcd(xhci);
317 struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
321 if (xhci->msix_entries) {
322 pci_disable_msix(pdev);
323 kfree(xhci->msix_entries);
324 xhci->msix_entries = NULL;
326 pci_disable_msi(pdev);
329 hcd->msix_enabled = 0;
333 static void __maybe_unused xhci_msix_sync_irqs(struct xhci_hcd *xhci)
337 if (xhci->msix_entries) {
338 for (i = 0; i < xhci->msix_count; i++)
339 synchronize_irq(xhci->msix_entries[i].vector);
343 static int xhci_try_enable_msi(struct usb_hcd *hcd)
345 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
346 struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
350 * Some Fresco Logic host controllers advertise MSI, but fail to
351 * generate interrupts. Don't even try to enable MSI.
353 if (xhci->quirks & XHCI_BROKEN_MSI)
356 /* unregister the legacy interrupt */
358 free_irq(hcd->irq, hcd);
361 ret = xhci_setup_msix(xhci);
363 /* fall back to msi*/
364 ret = xhci_setup_msi(xhci);
367 /* hcd->irq is 0, we have MSI */
371 xhci_err(xhci, "No msi-x/msi found and no IRQ in BIOS\n");
376 /* fall back to legacy interrupt*/
377 ret = request_irq(pdev->irq, &usb_hcd_irq, IRQF_SHARED,
378 hcd->irq_descr, hcd);
380 xhci_err(xhci, "request interrupt %d failed\n",
384 hcd->irq = pdev->irq;
390 static int xhci_try_enable_msi(struct usb_hcd *hcd)
395 static void xhci_cleanup_msix(struct xhci_hcd *xhci)
399 static void xhci_msix_sync_irqs(struct xhci_hcd *xhci)
405 static void compliance_mode_recovery(unsigned long arg)
407 struct xhci_hcd *xhci;
412 xhci = (struct xhci_hcd *)arg;
414 for (i = 0; i < xhci->num_usb3_ports; i++) {
415 temp = xhci_readl(xhci, xhci->usb3_ports[i]);
416 if ((temp & PORT_PLS_MASK) == USB_SS_PORT_LS_COMP_MOD) {
418 * Compliance Mode Detected. Letting USB Core
419 * handle the Warm Reset
421 xhci_dbg(xhci, "Compliance mode detected->port %d\n",
423 xhci_dbg(xhci, "Attempting compliance mode recovery\n");
424 hcd = xhci->shared_hcd;
426 if (hcd->state == HC_STATE_SUSPENDED)
427 usb_hcd_resume_root_hub(hcd);
429 usb_hcd_poll_rh_status(hcd);
433 if (xhci->port_status_u0 != ((1 << xhci->num_usb3_ports)-1))
434 mod_timer(&xhci->comp_mode_recovery_timer,
435 jiffies + msecs_to_jiffies(COMP_MODE_RCVRY_MSECS));
439 * Quirk to work around issue generated by the SN65LVPE502CP USB3.0 re-driver
440 * that causes ports behind that hardware to enter compliance mode sometimes.
441 * The quirk creates a timer that polls every 2 seconds the link state of
442 * each host controller's port and recovers it by issuing a Warm reset
443 * if Compliance mode is detected, otherwise the port will become "dead" (no
444 * device connections or disconnections will be detected anymore). Becasue no
445 * status event is generated when entering compliance mode (per xhci spec),
446 * this quirk is needed on systems that have the failing hardware installed.
448 static void compliance_mode_recovery_timer_init(struct xhci_hcd *xhci)
450 xhci->port_status_u0 = 0;
451 init_timer(&xhci->comp_mode_recovery_timer);
453 xhci->comp_mode_recovery_timer.data = (unsigned long) xhci;
454 xhci->comp_mode_recovery_timer.function = compliance_mode_recovery;
455 xhci->comp_mode_recovery_timer.expires = jiffies +
456 msecs_to_jiffies(COMP_MODE_RCVRY_MSECS);
458 set_timer_slack(&xhci->comp_mode_recovery_timer,
459 msecs_to_jiffies(COMP_MODE_RCVRY_MSECS));
460 add_timer(&xhci->comp_mode_recovery_timer);
461 xhci_dbg(xhci, "Compliance mode recovery timer initialized\n");
465 * This function identifies the systems that have installed the SN65LVPE502CP
466 * USB3.0 re-driver and that need the Compliance Mode Quirk.
468 * Vendor: Hewlett-Packard -> System Models: Z420, Z620 and Z820
470 bool xhci_compliance_mode_recovery_timer_quirk_check(void)
472 const char *dmi_product_name, *dmi_sys_vendor;
474 dmi_product_name = dmi_get_system_info(DMI_PRODUCT_NAME);
475 dmi_sys_vendor = dmi_get_system_info(DMI_SYS_VENDOR);
476 if (!dmi_product_name || !dmi_sys_vendor)
479 if (!(strstr(dmi_sys_vendor, "Hewlett-Packard")))
482 if (strstr(dmi_product_name, "Z420") ||
483 strstr(dmi_product_name, "Z620") ||
484 strstr(dmi_product_name, "Z820") ||
485 strstr(dmi_product_name, "Z1 Workstation"))
491 static int xhci_all_ports_seen_u0(struct xhci_hcd *xhci)
493 return (xhci->port_status_u0 == ((1 << xhci->num_usb3_ports)-1));
498 * Initialize memory for HCD and xHC (one-time init).
500 * Program the PAGESIZE register, initialize the device context array, create
501 * device contexts (?), set up a command ring segment (or two?), create event
502 * ring (one for now).
504 int xhci_init(struct usb_hcd *hcd)
506 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
509 xhci_dbg(xhci, "xhci_init\n");
510 spin_lock_init(&xhci->lock);
511 if (xhci->hci_version == 0x95 && link_quirk) {
512 xhci_dbg(xhci, "QUIRK: Not clearing Link TRB chain bits.\n");
513 xhci->quirks |= XHCI_LINK_TRB_QUIRK;
515 xhci_dbg(xhci, "xHCI doesn't need link TRB QUIRK\n");
517 retval = xhci_mem_init(xhci, GFP_KERNEL);
518 xhci_dbg(xhci, "Finished xhci_init\n");
520 /* Initializing Compliance Mode Recovery Data If Needed */
521 if (xhci_compliance_mode_recovery_timer_quirk_check()) {
522 xhci->quirks |= XHCI_COMP_MODE_QUIRK;
523 compliance_mode_recovery_timer_init(xhci);
529 /*-------------------------------------------------------------------------*/
532 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
533 static void xhci_event_ring_work(unsigned long arg)
538 struct xhci_hcd *xhci = (struct xhci_hcd *) arg;
541 xhci_dbg(xhci, "Poll event ring: %lu\n", jiffies);
543 spin_lock_irqsave(&xhci->lock, flags);
544 temp = xhci_readl(xhci, &xhci->op_regs->status);
545 xhci_dbg(xhci, "op reg status = 0x%x\n", temp);
546 if (temp == 0xffffffff || (xhci->xhc_state & XHCI_STATE_DYING) ||
547 (xhci->xhc_state & XHCI_STATE_HALTED)) {
548 xhci_dbg(xhci, "HW died, polling stopped.\n");
549 spin_unlock_irqrestore(&xhci->lock, flags);
553 temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
554 xhci_dbg(xhci, "ir_set 0 pending = 0x%x\n", temp);
555 xhci_dbg(xhci, "HC error bitmask = 0x%x\n", xhci->error_bitmask);
556 xhci->error_bitmask = 0;
557 xhci_dbg(xhci, "Event ring:\n");
558 xhci_debug_segment(xhci, xhci->event_ring->deq_seg);
559 xhci_dbg_ring_ptrs(xhci, xhci->event_ring);
560 temp_64 = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
561 temp_64 &= ~ERST_PTR_MASK;
562 xhci_dbg(xhci, "ERST deq = 64'h%0lx\n", (long unsigned int) temp_64);
563 xhci_dbg(xhci, "Command ring:\n");
564 xhci_debug_segment(xhci, xhci->cmd_ring->deq_seg);
565 xhci_dbg_ring_ptrs(xhci, xhci->cmd_ring);
566 xhci_dbg_cmd_ptrs(xhci);
567 for (i = 0; i < MAX_HC_SLOTS; ++i) {
570 for (j = 0; j < 31; ++j) {
571 xhci_dbg_ep_rings(xhci, i, j, &xhci->devs[i]->eps[j]);
574 spin_unlock_irqrestore(&xhci->lock, flags);
577 mod_timer(&xhci->event_ring_timer, jiffies + POLL_TIMEOUT * HZ);
579 xhci_dbg(xhci, "Quit polling the event ring.\n");
583 static int xhci_run_finished(struct xhci_hcd *xhci)
585 if (xhci_start(xhci)) {
589 xhci->shared_hcd->state = HC_STATE_RUNNING;
590 xhci->cmd_ring_state = CMD_RING_STATE_RUNNING;
592 if (xhci->quirks & XHCI_NEC_HOST)
593 xhci_ring_cmd_db(xhci);
595 xhci_dbg(xhci, "Finished xhci_run for USB3 roothub\n");
600 * Start the HC after it was halted.
602 * This function is called by the USB core when the HC driver is added.
603 * Its opposite is xhci_stop().
605 * xhci_init() must be called once before this function can be called.
606 * Reset the HC, enable device slot contexts, program DCBAAP, and
607 * set command ring pointer and event ring pointer.
609 * Setup MSI-X vectors and enable interrupts.
611 int xhci_run(struct usb_hcd *hcd)
616 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
618 /* Start the xHCI host controller running only after the USB 2.0 roothub
622 hcd->uses_new_polling = 1;
623 if (!usb_hcd_is_primary_hcd(hcd))
624 return xhci_run_finished(xhci);
626 xhci_dbg(xhci, "xhci_run\n");
628 ret = xhci_try_enable_msi(hcd);
632 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
633 init_timer(&xhci->event_ring_timer);
634 xhci->event_ring_timer.data = (unsigned long) xhci;
635 xhci->event_ring_timer.function = xhci_event_ring_work;
636 /* Poll the event ring */
637 xhci->event_ring_timer.expires = jiffies + POLL_TIMEOUT * HZ;
639 xhci_dbg(xhci, "Setting event ring polling timer\n");
640 add_timer(&xhci->event_ring_timer);
643 xhci_dbg(xhci, "Command ring memory map follows:\n");
644 xhci_debug_ring(xhci, xhci->cmd_ring);
645 xhci_dbg_ring_ptrs(xhci, xhci->cmd_ring);
646 xhci_dbg_cmd_ptrs(xhci);
648 xhci_dbg(xhci, "ERST memory map follows:\n");
649 xhci_dbg_erst(xhci, &xhci->erst);
650 xhci_dbg(xhci, "Event ring:\n");
651 xhci_debug_ring(xhci, xhci->event_ring);
652 xhci_dbg_ring_ptrs(xhci, xhci->event_ring);
653 temp_64 = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
654 temp_64 &= ~ERST_PTR_MASK;
655 xhci_dbg(xhci, "ERST deq = 64'h%0lx\n", (long unsigned int) temp_64);
657 xhci_dbg(xhci, "// Set the interrupt modulation register\n");
658 temp = xhci_readl(xhci, &xhci->ir_set->irq_control);
659 temp &= ~ER_IRQ_INTERVAL_MASK;
661 xhci_writel(xhci, temp, &xhci->ir_set->irq_control);
663 /* Set the HCD state before we enable the irqs */
664 temp = xhci_readl(xhci, &xhci->op_regs->command);
666 xhci_dbg(xhci, "// Enable interrupts, cmd = 0x%x.\n",
668 xhci_writel(xhci, temp, &xhci->op_regs->command);
670 temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
671 xhci_dbg(xhci, "// Enabling event ring interrupter %p by writing 0x%x to irq_pending\n",
672 xhci->ir_set, (unsigned int) ER_IRQ_ENABLE(temp));
673 xhci_writel(xhci, ER_IRQ_ENABLE(temp),
674 &xhci->ir_set->irq_pending);
675 xhci_print_ir_set(xhci, 0);
677 if (xhci->quirks & XHCI_NEC_HOST)
678 xhci_queue_vendor_command(xhci, 0, 0, 0,
679 TRB_TYPE(TRB_NEC_GET_FW));
681 xhci_dbg(xhci, "Finished xhci_run for USB2 roothub\n");
685 static void xhci_only_stop_hcd(struct usb_hcd *hcd)
687 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
689 spin_lock_irq(&xhci->lock);
692 /* The shared_hcd is going to be deallocated shortly (the USB core only
693 * calls this function when allocation fails in usb_add_hcd(), or
694 * usb_remove_hcd() is called). So we need to unset xHCI's pointer.
696 xhci->shared_hcd = NULL;
697 spin_unlock_irq(&xhci->lock);
703 * This function is called by the USB core when the HC driver is removed.
704 * Its opposite is xhci_run().
706 * Disable device contexts, disable IRQs, and quiesce the HC.
707 * Reset the HC, finish any completed transactions, and cleanup memory.
709 void xhci_stop(struct usb_hcd *hcd)
712 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
714 if (!usb_hcd_is_primary_hcd(hcd)) {
715 xhci_only_stop_hcd(xhci->shared_hcd);
719 spin_lock_irq(&xhci->lock);
720 /* Make sure the xHC is halted for a USB3 roothub
721 * (xhci_stop() could be called as part of failed init).
725 spin_unlock_irq(&xhci->lock);
727 xhci_cleanup_msix(xhci);
729 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
730 /* Tell the event ring poll function not to reschedule */
732 del_timer_sync(&xhci->event_ring_timer);
735 /* Deleting Compliance Mode Recovery Timer */
736 if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) &&
737 (!(xhci_all_ports_seen_u0(xhci)))) {
738 del_timer_sync(&xhci->comp_mode_recovery_timer);
739 xhci_dbg(xhci, "%s: compliance mode recovery timer deleted\n",
743 if (xhci->quirks & XHCI_AMD_PLL_FIX)
746 xhci_dbg(xhci, "// Disabling event ring interrupts\n");
747 temp = xhci_readl(xhci, &xhci->op_regs->status);
748 xhci_writel(xhci, temp & ~STS_EINT, &xhci->op_regs->status);
749 temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
750 xhci_writel(xhci, ER_IRQ_DISABLE(temp),
751 &xhci->ir_set->irq_pending);
752 xhci_print_ir_set(xhci, 0);
754 xhci_dbg(xhci, "cleaning up memory\n");
755 xhci_mem_cleanup(xhci);
756 xhci_dbg(xhci, "xhci_stop completed - status = %x\n",
757 xhci_readl(xhci, &xhci->op_regs->status));
761 * Shutdown HC (not bus-specific)
763 * This is called when the machine is rebooting or halting. We assume that the
764 * machine will be powered off, and the HC's internal state will be reset.
765 * Don't bother to free memory.
767 * This will only ever be called with the main usb_hcd (the USB3 roothub).
769 void xhci_shutdown(struct usb_hcd *hcd)
771 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
773 if (xhci->quirks & XHCI_SPURIOUS_REBOOT)
774 usb_disable_xhci_ports(to_pci_dev(hcd->self.controller));
776 spin_lock_irq(&xhci->lock);
778 spin_unlock_irq(&xhci->lock);
780 xhci_cleanup_msix(xhci);
782 xhci_dbg(xhci, "xhci_shutdown completed - status = %x\n",
783 xhci_readl(xhci, &xhci->op_regs->status));
787 static void xhci_save_registers(struct xhci_hcd *xhci)
789 xhci->s3.command = xhci_readl(xhci, &xhci->op_regs->command);
790 xhci->s3.dev_nt = xhci_readl(xhci, &xhci->op_regs->dev_notification);
791 xhci->s3.dcbaa_ptr = xhci_read_64(xhci, &xhci->op_regs->dcbaa_ptr);
792 xhci->s3.config_reg = xhci_readl(xhci, &xhci->op_regs->config_reg);
793 xhci->s3.erst_size = xhci_readl(xhci, &xhci->ir_set->erst_size);
794 xhci->s3.erst_base = xhci_read_64(xhci, &xhci->ir_set->erst_base);
795 xhci->s3.erst_dequeue = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
796 xhci->s3.irq_pending = xhci_readl(xhci, &xhci->ir_set->irq_pending);
797 xhci->s3.irq_control = xhci_readl(xhci, &xhci->ir_set->irq_control);
800 static void xhci_restore_registers(struct xhci_hcd *xhci)
802 xhci_writel(xhci, xhci->s3.command, &xhci->op_regs->command);
803 xhci_writel(xhci, xhci->s3.dev_nt, &xhci->op_regs->dev_notification);
804 xhci_write_64(xhci, xhci->s3.dcbaa_ptr, &xhci->op_regs->dcbaa_ptr);
805 xhci_writel(xhci, xhci->s3.config_reg, &xhci->op_regs->config_reg);
806 xhci_writel(xhci, xhci->s3.erst_size, &xhci->ir_set->erst_size);
807 xhci_write_64(xhci, xhci->s3.erst_base, &xhci->ir_set->erst_base);
808 xhci_write_64(xhci, xhci->s3.erst_dequeue, &xhci->ir_set->erst_dequeue);
809 xhci_writel(xhci, xhci->s3.irq_pending, &xhci->ir_set->irq_pending);
810 xhci_writel(xhci, xhci->s3.irq_control, &xhci->ir_set->irq_control);
813 static void xhci_set_cmd_ring_deq(struct xhci_hcd *xhci)
817 /* step 2: initialize command ring buffer */
818 val_64 = xhci_read_64(xhci, &xhci->op_regs->cmd_ring);
819 val_64 = (val_64 & (u64) CMD_RING_RSVD_BITS) |
820 (xhci_trb_virt_to_dma(xhci->cmd_ring->deq_seg,
821 xhci->cmd_ring->dequeue) &
822 (u64) ~CMD_RING_RSVD_BITS) |
823 xhci->cmd_ring->cycle_state;
824 xhci_dbg(xhci, "// Setting command ring address to 0x%llx\n",
825 (long unsigned long) val_64);
826 xhci_write_64(xhci, val_64, &xhci->op_regs->cmd_ring);
830 * The whole command ring must be cleared to zero when we suspend the host.
832 * The host doesn't save the command ring pointer in the suspend well, so we
833 * need to re-program it on resume. Unfortunately, the pointer must be 64-byte
834 * aligned, because of the reserved bits in the command ring dequeue pointer
835 * register. Therefore, we can't just set the dequeue pointer back in the
836 * middle of the ring (TRBs are 16-byte aligned).
838 static void xhci_clear_command_ring(struct xhci_hcd *xhci)
840 struct xhci_ring *ring;
841 struct xhci_segment *seg;
843 ring = xhci->cmd_ring;
847 sizeof(union xhci_trb) * (TRBS_PER_SEGMENT - 1));
848 seg->trbs[TRBS_PER_SEGMENT - 1].link.control &=
849 cpu_to_le32(~TRB_CYCLE);
851 } while (seg != ring->deq_seg);
853 /* Reset the software enqueue and dequeue pointers */
854 ring->deq_seg = ring->first_seg;
855 ring->dequeue = ring->first_seg->trbs;
856 ring->enq_seg = ring->deq_seg;
857 ring->enqueue = ring->dequeue;
859 ring->num_trbs_free = ring->num_segs * (TRBS_PER_SEGMENT - 1) - 1;
861 * Ring is now zeroed, so the HW should look for change of ownership
862 * when the cycle bit is set to 1.
864 ring->cycle_state = 1;
867 * Reset the hardware dequeue pointer.
868 * Yes, this will need to be re-written after resume, but we're paranoid
869 * and want to make sure the hardware doesn't access bogus memory
870 * because, say, the BIOS or an SMI started the host without changing
871 * the command ring pointers.
873 xhci_set_cmd_ring_deq(xhci);
877 * Stop HC (not bus-specific)
879 * This is called when the machine transition into S3/S4 mode.
882 int xhci_suspend(struct xhci_hcd *xhci)
885 struct usb_hcd *hcd = xhci_to_hcd(xhci);
888 if (hcd->state != HC_STATE_SUSPENDED ||
889 xhci->shared_hcd->state != HC_STATE_SUSPENDED)
892 /* Don't poll the roothubs on bus suspend. */
893 xhci_dbg(xhci, "%s: stopping port polling.\n", __func__);
894 clear_bit(HCD_FLAG_POLL_RH, &hcd->flags);
895 del_timer_sync(&hcd->rh_timer);
897 spin_lock_irq(&xhci->lock);
898 clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
899 clear_bit(HCD_FLAG_HW_ACCESSIBLE, &xhci->shared_hcd->flags);
900 /* step 1: stop endpoint */
901 /* skipped assuming that port suspend has done */
903 /* step 2: clear Run/Stop bit */
904 command = xhci_readl(xhci, &xhci->op_regs->command);
906 xhci_writel(xhci, command, &xhci->op_regs->command);
907 if (xhci_handshake(xhci, &xhci->op_regs->status,
908 STS_HALT, STS_HALT, XHCI_MAX_HALT_USEC)) {
909 xhci_warn(xhci, "WARN: xHC CMD_RUN timeout\n");
910 spin_unlock_irq(&xhci->lock);
913 xhci_clear_command_ring(xhci);
915 /* step 3: save registers */
916 xhci_save_registers(xhci);
918 /* step 4: set CSS flag */
919 command = xhci_readl(xhci, &xhci->op_regs->command);
921 xhci_writel(xhci, command, &xhci->op_regs->command);
922 if (xhci_handshake(xhci, &xhci->op_regs->status,
923 STS_SAVE, 0, 10 * 1000)) {
924 xhci_warn(xhci, "WARN: xHC save state timeout\n");
925 spin_unlock_irq(&xhci->lock);
928 spin_unlock_irq(&xhci->lock);
931 * Deleting Compliance Mode Recovery Timer because the xHCI Host
932 * is about to be suspended.
934 if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) &&
935 (!(xhci_all_ports_seen_u0(xhci)))) {
936 del_timer_sync(&xhci->comp_mode_recovery_timer);
937 xhci_dbg(xhci, "%s: compliance mode recovery timer deleted\n",
941 /* step 5: remove core well power */
942 /* synchronize irq when using MSI-X */
943 xhci_msix_sync_irqs(xhci);
949 * start xHC (not bus-specific)
951 * This is called when the machine transition from S3/S4 mode.
954 int xhci_resume(struct xhci_hcd *xhci, bool hibernated)
956 u32 command, temp = 0;
957 struct usb_hcd *hcd = xhci_to_hcd(xhci);
958 struct usb_hcd *secondary_hcd;
960 bool comp_timer_running = false;
962 /* Wait a bit if either of the roothubs need to settle from the
963 * transition into bus suspend.
965 if (time_before(jiffies, xhci->bus_state[0].next_statechange) ||
967 xhci->bus_state[1].next_statechange))
970 set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
971 set_bit(HCD_FLAG_HW_ACCESSIBLE, &xhci->shared_hcd->flags);
973 spin_lock_irq(&xhci->lock);
974 if (xhci->quirks & XHCI_RESET_ON_RESUME)
978 /* step 1: restore register */
979 xhci_restore_registers(xhci);
980 /* step 2: initialize command ring buffer */
981 xhci_set_cmd_ring_deq(xhci);
982 /* step 3: restore state and start state*/
983 /* step 3: set CRS flag */
984 command = xhci_readl(xhci, &xhci->op_regs->command);
986 xhci_writel(xhci, command, &xhci->op_regs->command);
987 if (xhci_handshake(xhci, &xhci->op_regs->status,
988 STS_RESTORE, 0, 10 * 1000)) {
989 xhci_warn(xhci, "WARN: xHC restore state timeout\n");
990 spin_unlock_irq(&xhci->lock);
993 temp = xhci_readl(xhci, &xhci->op_regs->status);
996 /* If restore operation fails, re-initialize the HC during resume */
997 if ((temp & STS_SRE) || hibernated) {
999 if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) &&
1000 !(xhci_all_ports_seen_u0(xhci))) {
1001 del_timer_sync(&xhci->comp_mode_recovery_timer);
1002 xhci_dbg(xhci, "Compliance Mode Recovery Timer deleted!\n");
1005 /* Let the USB core know _both_ roothubs lost power. */
1006 usb_root_hub_lost_power(xhci->main_hcd->self.root_hub);
1007 usb_root_hub_lost_power(xhci->shared_hcd->self.root_hub);
1009 xhci_dbg(xhci, "Stop HCD\n");
1012 spin_unlock_irq(&xhci->lock);
1013 xhci_cleanup_msix(xhci);
1015 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
1016 /* Tell the event ring poll function not to reschedule */
1018 del_timer_sync(&xhci->event_ring_timer);
1021 xhci_dbg(xhci, "// Disabling event ring interrupts\n");
1022 temp = xhci_readl(xhci, &xhci->op_regs->status);
1023 xhci_writel(xhci, temp & ~STS_EINT, &xhci->op_regs->status);
1024 temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
1025 xhci_writel(xhci, ER_IRQ_DISABLE(temp),
1026 &xhci->ir_set->irq_pending);
1027 xhci_print_ir_set(xhci, 0);
1029 xhci_dbg(xhci, "cleaning up memory\n");
1030 xhci_mem_cleanup(xhci);
1031 xhci_dbg(xhci, "xhci_stop completed - status = %x\n",
1032 xhci_readl(xhci, &xhci->op_regs->status));
1034 /* USB core calls the PCI reinit and start functions twice:
1035 * first with the primary HCD, and then with the secondary HCD.
1036 * If we don't do the same, the host will never be started.
1038 if (!usb_hcd_is_primary_hcd(hcd))
1039 secondary_hcd = hcd;
1041 secondary_hcd = xhci->shared_hcd;
1043 xhci_dbg(xhci, "Initialize the xhci_hcd\n");
1044 retval = xhci_init(hcd->primary_hcd);
1047 comp_timer_running = true;
1049 xhci_dbg(xhci, "Start the primary HCD\n");
1050 retval = xhci_run(hcd->primary_hcd);
1052 xhci_dbg(xhci, "Start the secondary HCD\n");
1053 retval = xhci_run(secondary_hcd);
1055 hcd->state = HC_STATE_SUSPENDED;
1056 xhci->shared_hcd->state = HC_STATE_SUSPENDED;
1060 /* step 4: set Run/Stop bit */
1061 command = xhci_readl(xhci, &xhci->op_regs->command);
1063 xhci_writel(xhci, command, &xhci->op_regs->command);
1064 xhci_handshake(xhci, &xhci->op_regs->status, STS_HALT,
1067 /* step 5: walk topology and initialize portsc,
1068 * portpmsc and portli
1070 /* this is done in bus_resume */
1072 /* step 6: restart each of the previously
1073 * Running endpoints by ringing their doorbells
1076 spin_unlock_irq(&xhci->lock);
1080 usb_hcd_resume_root_hub(hcd);
1081 usb_hcd_resume_root_hub(xhci->shared_hcd);
1085 * If system is subject to the Quirk, Compliance Mode Timer needs to
1086 * be re-initialized Always after a system resume. Ports are subject
1087 * to suffer the Compliance Mode issue again. It doesn't matter if
1088 * ports have entered previously to U0 before system's suspension.
1090 if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) && !comp_timer_running)
1091 compliance_mode_recovery_timer_init(xhci);
1093 /* Re-enable port polling. */
1094 xhci_dbg(xhci, "%s: starting port polling.\n", __func__);
1095 set_bit(HCD_FLAG_POLL_RH, &hcd->flags);
1096 usb_hcd_poll_rh_status(hcd);
1100 #endif /* CONFIG_PM */
1102 /*-------------------------------------------------------------------------*/
1105 * xhci_get_endpoint_index - Used for passing endpoint bitmasks between the core and
1106 * HCDs. Find the index for an endpoint given its descriptor. Use the return
1107 * value to right shift 1 for the bitmask.
1109 * Index = (epnum * 2) + direction - 1,
1110 * where direction = 0 for OUT, 1 for IN.
1111 * For control endpoints, the IN index is used (OUT index is unused), so
1112 * index = (epnum * 2) + direction - 1 = (epnum * 2) + 1 - 1 = (epnum * 2)
1114 unsigned int xhci_get_endpoint_index(struct usb_endpoint_descriptor *desc)
1117 if (usb_endpoint_xfer_control(desc))
1118 index = (unsigned int) (usb_endpoint_num(desc)*2);
1120 index = (unsigned int) (usb_endpoint_num(desc)*2) +
1121 (usb_endpoint_dir_in(desc) ? 1 : 0) - 1;
1125 /* The reverse operation to xhci_get_endpoint_index. Calculate the USB endpoint
1126 * address from the XHCI endpoint index.
1128 unsigned int xhci_get_endpoint_address(unsigned int ep_index)
1130 unsigned int number = DIV_ROUND_UP(ep_index, 2);
1131 unsigned int direction = ep_index % 2 ? USB_DIR_OUT : USB_DIR_IN;
1132 return direction | number;
1135 /* Find the flag for this endpoint (for use in the control context). Use the
1136 * endpoint index to create a bitmask. The slot context is bit 0, endpoint 0 is
1139 unsigned int xhci_get_endpoint_flag(struct usb_endpoint_descriptor *desc)
1141 return 1 << (xhci_get_endpoint_index(desc) + 1);
1144 /* Find the flag for this endpoint (for use in the control context). Use the
1145 * endpoint index to create a bitmask. The slot context is bit 0, endpoint 0 is
1148 unsigned int xhci_get_endpoint_flag_from_index(unsigned int ep_index)
1150 return 1 << (ep_index + 1);
1153 /* Compute the last valid endpoint context index. Basically, this is the
1154 * endpoint index plus one. For slot contexts with more than valid endpoint,
1155 * we find the most significant bit set in the added contexts flags.
1156 * e.g. ep 1 IN (with epnum 0x81) => added_ctxs = 0b1000
1157 * fls(0b1000) = 4, but the endpoint context index is 3, so subtract one.
1159 unsigned int xhci_last_valid_endpoint(u32 added_ctxs)
1161 return fls(added_ctxs) - 1;
1164 /* Returns 1 if the arguments are OK;
1165 * returns 0 this is a root hub; returns -EINVAL for NULL pointers.
1167 static int xhci_check_args(struct usb_hcd *hcd, struct usb_device *udev,
1168 struct usb_host_endpoint *ep, int check_ep, bool check_virt_dev,
1170 struct xhci_hcd *xhci;
1171 struct xhci_virt_device *virt_dev;
1173 if (!hcd || (check_ep && !ep) || !udev) {
1174 printk(KERN_DEBUG "xHCI %s called with invalid args\n",
1178 if (!udev->parent) {
1179 printk(KERN_DEBUG "xHCI %s called for root hub\n",
1184 xhci = hcd_to_xhci(hcd);
1185 if (check_virt_dev) {
1186 if (!udev->slot_id || !xhci->devs[udev->slot_id]) {
1187 printk(KERN_DEBUG "xHCI %s called with unaddressed "
1192 virt_dev = xhci->devs[udev->slot_id];
1193 if (virt_dev->udev != udev) {
1194 printk(KERN_DEBUG "xHCI %s called with udev and "
1195 "virt_dev does not match\n", func);
1200 if (xhci->xhc_state & XHCI_STATE_HALTED)
1206 static int xhci_configure_endpoint(struct xhci_hcd *xhci,
1207 struct usb_device *udev, struct xhci_command *command,
1208 bool ctx_change, bool must_succeed);
1211 * Full speed devices may have a max packet size greater than 8 bytes, but the
1212 * USB core doesn't know that until it reads the first 8 bytes of the
1213 * descriptor. If the usb_device's max packet size changes after that point,
1214 * we need to issue an evaluate context command and wait on it.
1216 static int xhci_check_maxpacket(struct xhci_hcd *xhci, unsigned int slot_id,
1217 unsigned int ep_index, struct urb *urb)
1219 struct xhci_container_ctx *in_ctx;
1220 struct xhci_container_ctx *out_ctx;
1221 struct xhci_input_control_ctx *ctrl_ctx;
1222 struct xhci_ep_ctx *ep_ctx;
1223 int max_packet_size;
1224 int hw_max_packet_size;
1227 out_ctx = xhci->devs[slot_id]->out_ctx;
1228 ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
1229 hw_max_packet_size = MAX_PACKET_DECODED(le32_to_cpu(ep_ctx->ep_info2));
1230 max_packet_size = usb_endpoint_maxp(&urb->dev->ep0.desc);
1231 if (hw_max_packet_size != max_packet_size) {
1232 xhci_dbg(xhci, "Max Packet Size for ep 0 changed.\n");
1233 xhci_dbg(xhci, "Max packet size in usb_device = %d\n",
1235 xhci_dbg(xhci, "Max packet size in xHCI HW = %d\n",
1236 hw_max_packet_size);
1237 xhci_dbg(xhci, "Issuing evaluate context command.\n");
1239 /* Set up the input context flags for the command */
1240 /* FIXME: This won't work if a non-default control endpoint
1241 * changes max packet sizes.
1243 in_ctx = xhci->devs[slot_id]->in_ctx;
1244 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1246 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
1250 /* Set up the modified control endpoint 0 */
1251 xhci_endpoint_copy(xhci, xhci->devs[slot_id]->in_ctx,
1252 xhci->devs[slot_id]->out_ctx, ep_index);
1254 ep_ctx = xhci_get_ep_ctx(xhci, in_ctx, ep_index);
1255 ep_ctx->ep_info2 &= cpu_to_le32(~MAX_PACKET_MASK);
1256 ep_ctx->ep_info2 |= cpu_to_le32(MAX_PACKET(max_packet_size));
1258 ctrl_ctx->add_flags = cpu_to_le32(EP0_FLAG);
1259 ctrl_ctx->drop_flags = 0;
1261 xhci_dbg(xhci, "Slot %d input context\n", slot_id);
1262 xhci_dbg_ctx(xhci, in_ctx, ep_index);
1263 xhci_dbg(xhci, "Slot %d output context\n", slot_id);
1264 xhci_dbg_ctx(xhci, out_ctx, ep_index);
1266 ret = xhci_configure_endpoint(xhci, urb->dev, NULL,
1269 /* Clean up the input context for later use by bandwidth
1272 ctrl_ctx->add_flags = cpu_to_le32(SLOT_FLAG);
1278 * non-error returns are a promise to giveback() the urb later
1279 * we drop ownership so next owner (or urb unlink) can get it
1281 int xhci_urb_enqueue(struct usb_hcd *hcd, struct urb *urb, gfp_t mem_flags)
1283 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
1284 struct xhci_td *buffer;
1285 unsigned long flags;
1287 unsigned int slot_id, ep_index;
1288 struct urb_priv *urb_priv;
1291 if (!urb || xhci_check_args(hcd, urb->dev, urb->ep,
1292 true, true, __func__) <= 0)
1295 slot_id = urb->dev->slot_id;
1296 ep_index = xhci_get_endpoint_index(&urb->ep->desc);
1298 if (!HCD_HW_ACCESSIBLE(hcd)) {
1299 if (!in_interrupt())
1300 xhci_dbg(xhci, "urb submitted during PCI suspend\n");
1305 if (usb_endpoint_xfer_isoc(&urb->ep->desc))
1306 size = urb->number_of_packets;
1310 urb_priv = kzalloc(sizeof(struct urb_priv) +
1311 size * sizeof(struct xhci_td *), mem_flags);
1315 buffer = kzalloc(size * sizeof(struct xhci_td), mem_flags);
1321 for (i = 0; i < size; i++) {
1322 urb_priv->td[i] = buffer;
1326 urb_priv->length = size;
1327 urb_priv->td_cnt = 0;
1328 urb->hcpriv = urb_priv;
1330 if (usb_endpoint_xfer_control(&urb->ep->desc)) {
1331 /* Check to see if the max packet size for the default control
1332 * endpoint changed during FS device enumeration
1334 if (urb->dev->speed == USB_SPEED_FULL) {
1335 ret = xhci_check_maxpacket(xhci, slot_id,
1338 xhci_urb_free_priv(xhci, urb_priv);
1344 /* We have a spinlock and interrupts disabled, so we must pass
1345 * atomic context to this function, which may allocate memory.
1347 spin_lock_irqsave(&xhci->lock, flags);
1348 if (xhci->xhc_state & XHCI_STATE_DYING)
1350 ret = xhci_queue_ctrl_tx(xhci, GFP_ATOMIC, urb,
1354 spin_unlock_irqrestore(&xhci->lock, flags);
1355 } else if (usb_endpoint_xfer_bulk(&urb->ep->desc)) {
1356 spin_lock_irqsave(&xhci->lock, flags);
1357 if (xhci->xhc_state & XHCI_STATE_DYING)
1359 if (xhci->devs[slot_id]->eps[ep_index].ep_state &
1360 EP_GETTING_STREAMS) {
1361 xhci_warn(xhci, "WARN: Can't enqueue URB while bulk ep "
1362 "is transitioning to using streams.\n");
1364 } else if (xhci->devs[slot_id]->eps[ep_index].ep_state &
1365 EP_GETTING_NO_STREAMS) {
1366 xhci_warn(xhci, "WARN: Can't enqueue URB while bulk ep "
1367 "is transitioning to "
1368 "not having streams.\n");
1371 ret = xhci_queue_bulk_tx(xhci, GFP_ATOMIC, urb,
1376 spin_unlock_irqrestore(&xhci->lock, flags);
1377 } else if (usb_endpoint_xfer_int(&urb->ep->desc)) {
1378 spin_lock_irqsave(&xhci->lock, flags);
1379 if (xhci->xhc_state & XHCI_STATE_DYING)
1381 ret = xhci_queue_intr_tx(xhci, GFP_ATOMIC, urb,
1385 spin_unlock_irqrestore(&xhci->lock, flags);
1387 spin_lock_irqsave(&xhci->lock, flags);
1388 if (xhci->xhc_state & XHCI_STATE_DYING)
1390 ret = xhci_queue_isoc_tx_prepare(xhci, GFP_ATOMIC, urb,
1394 spin_unlock_irqrestore(&xhci->lock, flags);
1399 xhci_dbg(xhci, "Ep 0x%x: URB %p submitted for "
1400 "non-responsive xHCI host.\n",
1401 urb->ep->desc.bEndpointAddress, urb);
1404 xhci_urb_free_priv(xhci, urb_priv);
1406 spin_unlock_irqrestore(&xhci->lock, flags);
1410 /* Get the right ring for the given URB.
1411 * If the endpoint supports streams, boundary check the URB's stream ID.
1412 * If the endpoint doesn't support streams, return the singular endpoint ring.
1414 static struct xhci_ring *xhci_urb_to_transfer_ring(struct xhci_hcd *xhci,
1417 unsigned int slot_id;
1418 unsigned int ep_index;
1419 unsigned int stream_id;
1420 struct xhci_virt_ep *ep;
1422 slot_id = urb->dev->slot_id;
1423 ep_index = xhci_get_endpoint_index(&urb->ep->desc);
1424 stream_id = urb->stream_id;
1425 ep = &xhci->devs[slot_id]->eps[ep_index];
1426 /* Common case: no streams */
1427 if (!(ep->ep_state & EP_HAS_STREAMS))
1430 if (stream_id == 0) {
1432 "WARN: Slot ID %u, ep index %u has streams, "
1433 "but URB has no stream ID.\n",
1438 if (stream_id < ep->stream_info->num_streams)
1439 return ep->stream_info->stream_rings[stream_id];
1442 "WARN: Slot ID %u, ep index %u has "
1443 "stream IDs 1 to %u allocated, "
1444 "but stream ID %u is requested.\n",
1446 ep->stream_info->num_streams - 1,
1452 * Remove the URB's TD from the endpoint ring. This may cause the HC to stop
1453 * USB transfers, potentially stopping in the middle of a TRB buffer. The HC
1454 * should pick up where it left off in the TD, unless a Set Transfer Ring
1455 * Dequeue Pointer is issued.
1457 * The TRBs that make up the buffers for the canceled URB will be "removed" from
1458 * the ring. Since the ring is a contiguous structure, they can't be physically
1459 * removed. Instead, there are two options:
1461 * 1) If the HC is in the middle of processing the URB to be canceled, we
1462 * simply move the ring's dequeue pointer past those TRBs using the Set
1463 * Transfer Ring Dequeue Pointer command. This will be the common case,
1464 * when drivers timeout on the last submitted URB and attempt to cancel.
1466 * 2) If the HC is in the middle of a different TD, we turn the TRBs into a
1467 * series of 1-TRB transfer no-op TDs. (No-ops shouldn't be chained.) The
1468 * HC will need to invalidate the any TRBs it has cached after the stop
1469 * endpoint command, as noted in the xHCI 0.95 errata.
1471 * 3) The TD may have completed by the time the Stop Endpoint Command
1472 * completes, so software needs to handle that case too.
1474 * This function should protect against the TD enqueueing code ringing the
1475 * doorbell while this code is waiting for a Stop Endpoint command to complete.
1476 * It also needs to account for multiple cancellations on happening at the same
1477 * time for the same endpoint.
1479 * Note that this function can be called in any context, or so says
1480 * usb_hcd_unlink_urb()
1482 int xhci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
1484 unsigned long flags;
1487 struct xhci_hcd *xhci;
1488 struct urb_priv *urb_priv;
1490 unsigned int ep_index;
1491 struct xhci_ring *ep_ring;
1492 struct xhci_virt_ep *ep;
1494 xhci = hcd_to_xhci(hcd);
1495 spin_lock_irqsave(&xhci->lock, flags);
1496 /* Make sure the URB hasn't completed or been unlinked already */
1497 ret = usb_hcd_check_unlink_urb(hcd, urb, status);
1498 if (ret || !urb->hcpriv)
1500 temp = xhci_readl(xhci, &xhci->op_regs->status);
1501 if (temp == 0xffffffff || (xhci->xhc_state & XHCI_STATE_HALTED)) {
1502 xhci_dbg(xhci, "HW died, freeing TD.\n");
1503 urb_priv = urb->hcpriv;
1504 for (i = urb_priv->td_cnt; i < urb_priv->length; i++) {
1505 td = urb_priv->td[i];
1506 if (!list_empty(&td->td_list))
1507 list_del_init(&td->td_list);
1508 if (!list_empty(&td->cancelled_td_list))
1509 list_del_init(&td->cancelled_td_list);
1512 usb_hcd_unlink_urb_from_ep(hcd, urb);
1513 spin_unlock_irqrestore(&xhci->lock, flags);
1514 usb_hcd_giveback_urb(hcd, urb, -ESHUTDOWN);
1515 xhci_urb_free_priv(xhci, urb_priv);
1518 if ((xhci->xhc_state & XHCI_STATE_DYING) ||
1519 (xhci->xhc_state & XHCI_STATE_HALTED)) {
1520 xhci_dbg(xhci, "Ep 0x%x: URB %p to be canceled on "
1521 "non-responsive xHCI host.\n",
1522 urb->ep->desc.bEndpointAddress, urb);
1523 /* Let the stop endpoint command watchdog timer (which set this
1524 * state) finish cleaning up the endpoint TD lists. We must
1525 * have caught it in the middle of dropping a lock and giving
1531 ep_index = xhci_get_endpoint_index(&urb->ep->desc);
1532 ep = &xhci->devs[urb->dev->slot_id]->eps[ep_index];
1533 ep_ring = xhci_urb_to_transfer_ring(xhci, urb);
1539 urb_priv = urb->hcpriv;
1540 i = urb_priv->td_cnt;
1541 if (i < urb_priv->length)
1542 xhci_dbg(xhci, "Cancel URB %p, dev %s, ep 0x%x, "
1543 "starting at offset 0x%llx\n",
1544 urb, urb->dev->devpath,
1545 urb->ep->desc.bEndpointAddress,
1546 (unsigned long long) xhci_trb_virt_to_dma(
1547 urb_priv->td[i]->start_seg,
1548 urb_priv->td[i]->first_trb));
1550 for (; i < urb_priv->length; i++) {
1551 td = urb_priv->td[i];
1552 list_add_tail(&td->cancelled_td_list, &ep->cancelled_td_list);
1555 /* Queue a stop endpoint command, but only if this is
1556 * the first cancellation to be handled.
1558 if (!(ep->ep_state & EP_HALT_PENDING)) {
1559 ep->ep_state |= EP_HALT_PENDING;
1560 ep->stop_cmds_pending++;
1561 ep->stop_cmd_timer.expires = jiffies +
1562 XHCI_STOP_EP_CMD_TIMEOUT * HZ;
1563 add_timer(&ep->stop_cmd_timer);
1564 xhci_queue_stop_endpoint(xhci, urb->dev->slot_id, ep_index, 0);
1565 xhci_ring_cmd_db(xhci);
1568 spin_unlock_irqrestore(&xhci->lock, flags);
1572 /* Drop an endpoint from a new bandwidth configuration for this device.
1573 * Only one call to this function is allowed per endpoint before
1574 * check_bandwidth() or reset_bandwidth() must be called.
1575 * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
1576 * add the endpoint to the schedule with possibly new parameters denoted by a
1577 * different endpoint descriptor in usb_host_endpoint.
1578 * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
1581 * The USB core will not allow URBs to be queued to an endpoint that is being
1582 * disabled, so there's no need for mutual exclusion to protect
1583 * the xhci->devs[slot_id] structure.
1585 int xhci_drop_endpoint(struct usb_hcd *hcd, struct usb_device *udev,
1586 struct usb_host_endpoint *ep)
1588 struct xhci_hcd *xhci;
1589 struct xhci_container_ctx *in_ctx, *out_ctx;
1590 struct xhci_input_control_ctx *ctrl_ctx;
1591 struct xhci_slot_ctx *slot_ctx;
1592 unsigned int last_ctx;
1593 unsigned int ep_index;
1594 struct xhci_ep_ctx *ep_ctx;
1596 u32 new_add_flags, new_drop_flags, new_slot_info;
1599 ret = xhci_check_args(hcd, udev, ep, 1, true, __func__);
1602 xhci = hcd_to_xhci(hcd);
1603 if (xhci->xhc_state & XHCI_STATE_DYING)
1606 xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
1607 drop_flag = xhci_get_endpoint_flag(&ep->desc);
1608 if (drop_flag == SLOT_FLAG || drop_flag == EP0_FLAG) {
1609 xhci_dbg(xhci, "xHCI %s - can't drop slot or ep 0 %#x\n",
1610 __func__, drop_flag);
1614 in_ctx = xhci->devs[udev->slot_id]->in_ctx;
1615 out_ctx = xhci->devs[udev->slot_id]->out_ctx;
1616 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1618 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
1623 ep_index = xhci_get_endpoint_index(&ep->desc);
1624 ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
1625 /* If the HC already knows the endpoint is disabled,
1626 * or the HCD has noted it is disabled, ignore this request
1628 if (((ep_ctx->ep_info & cpu_to_le32(EP_STATE_MASK)) ==
1629 cpu_to_le32(EP_STATE_DISABLED)) ||
1630 le32_to_cpu(ctrl_ctx->drop_flags) &
1631 xhci_get_endpoint_flag(&ep->desc)) {
1632 xhci_warn(xhci, "xHCI %s called with disabled ep %p\n",
1637 ctrl_ctx->drop_flags |= cpu_to_le32(drop_flag);
1638 new_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags);
1640 ctrl_ctx->add_flags &= cpu_to_le32(~drop_flag);
1641 new_add_flags = le32_to_cpu(ctrl_ctx->add_flags);
1643 last_ctx = xhci_last_valid_endpoint(le32_to_cpu(ctrl_ctx->add_flags));
1644 slot_ctx = xhci_get_slot_ctx(xhci, in_ctx);
1645 /* Update the last valid endpoint context, if we deleted the last one */
1646 if ((le32_to_cpu(slot_ctx->dev_info) & LAST_CTX_MASK) >
1647 LAST_CTX(last_ctx)) {
1648 slot_ctx->dev_info &= cpu_to_le32(~LAST_CTX_MASK);
1649 slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(last_ctx));
1651 new_slot_info = le32_to_cpu(slot_ctx->dev_info);
1653 xhci_endpoint_zero(xhci, xhci->devs[udev->slot_id], ep);
1655 xhci_dbg(xhci, "drop ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x, new slot info = %#x\n",
1656 (unsigned int) ep->desc.bEndpointAddress,
1658 (unsigned int) new_drop_flags,
1659 (unsigned int) new_add_flags,
1660 (unsigned int) new_slot_info);
1664 /* Add an endpoint to a new possible bandwidth configuration for this device.
1665 * Only one call to this function is allowed per endpoint before
1666 * check_bandwidth() or reset_bandwidth() must be called.
1667 * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
1668 * add the endpoint to the schedule with possibly new parameters denoted by a
1669 * different endpoint descriptor in usb_host_endpoint.
1670 * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
1673 * The USB core will not allow URBs to be queued to an endpoint until the
1674 * configuration or alt setting is installed in the device, so there's no need
1675 * for mutual exclusion to protect the xhci->devs[slot_id] structure.
1677 int xhci_add_endpoint(struct usb_hcd *hcd, struct usb_device *udev,
1678 struct usb_host_endpoint *ep)
1680 struct xhci_hcd *xhci;
1681 struct xhci_container_ctx *in_ctx, *out_ctx;
1682 unsigned int ep_index;
1683 struct xhci_slot_ctx *slot_ctx;
1684 struct xhci_input_control_ctx *ctrl_ctx;
1686 unsigned int last_ctx;
1687 u32 new_add_flags, new_drop_flags, new_slot_info;
1688 struct xhci_virt_device *virt_dev;
1691 ret = xhci_check_args(hcd, udev, ep, 1, true, __func__);
1693 /* So we won't queue a reset ep command for a root hub */
1697 xhci = hcd_to_xhci(hcd);
1698 if (xhci->xhc_state & XHCI_STATE_DYING)
1701 added_ctxs = xhci_get_endpoint_flag(&ep->desc);
1702 last_ctx = xhci_last_valid_endpoint(added_ctxs);
1703 if (added_ctxs == SLOT_FLAG || added_ctxs == EP0_FLAG) {
1704 /* FIXME when we have to issue an evaluate endpoint command to
1705 * deal with ep0 max packet size changing once we get the
1708 xhci_dbg(xhci, "xHCI %s - can't add slot or ep 0 %#x\n",
1709 __func__, added_ctxs);
1713 virt_dev = xhci->devs[udev->slot_id];
1714 in_ctx = virt_dev->in_ctx;
1715 out_ctx = virt_dev->out_ctx;
1716 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1718 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
1723 ep_index = xhci_get_endpoint_index(&ep->desc);
1724 /* If this endpoint is already in use, and the upper layers are trying
1725 * to add it again without dropping it, reject the addition.
1727 if (virt_dev->eps[ep_index].ring &&
1728 !(le32_to_cpu(ctrl_ctx->drop_flags) &
1729 xhci_get_endpoint_flag(&ep->desc))) {
1730 xhci_warn(xhci, "Trying to add endpoint 0x%x "
1731 "without dropping it.\n",
1732 (unsigned int) ep->desc.bEndpointAddress);
1736 /* If the HCD has already noted the endpoint is enabled,
1737 * ignore this request.
1739 if (le32_to_cpu(ctrl_ctx->add_flags) &
1740 xhci_get_endpoint_flag(&ep->desc)) {
1741 xhci_warn(xhci, "xHCI %s called with enabled ep %p\n",
1747 * Configuration and alternate setting changes must be done in
1748 * process context, not interrupt context (or so documenation
1749 * for usb_set_interface() and usb_set_configuration() claim).
1751 if (xhci_endpoint_init(xhci, virt_dev, udev, ep, GFP_NOIO) < 0) {
1752 dev_dbg(&udev->dev, "%s - could not initialize ep %#x\n",
1753 __func__, ep->desc.bEndpointAddress);
1757 ctrl_ctx->add_flags |= cpu_to_le32(added_ctxs);
1758 new_add_flags = le32_to_cpu(ctrl_ctx->add_flags);
1760 /* If xhci_endpoint_disable() was called for this endpoint, but the
1761 * xHC hasn't been notified yet through the check_bandwidth() call,
1762 * this re-adds a new state for the endpoint from the new endpoint
1763 * descriptors. We must drop and re-add this endpoint, so we leave the
1766 new_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags);
1768 slot_ctx = xhci_get_slot_ctx(xhci, in_ctx);
1769 /* Update the last valid endpoint context, if we just added one past */
1770 if ((le32_to_cpu(slot_ctx->dev_info) & LAST_CTX_MASK) <
1771 LAST_CTX(last_ctx)) {
1772 slot_ctx->dev_info &= cpu_to_le32(~LAST_CTX_MASK);
1773 slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(last_ctx));
1775 new_slot_info = le32_to_cpu(slot_ctx->dev_info);
1777 /* Store the usb_device pointer for later use */
1780 xhci_dbg(xhci, "add ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x, new slot info = %#x\n",
1781 (unsigned int) ep->desc.bEndpointAddress,
1783 (unsigned int) new_drop_flags,
1784 (unsigned int) new_add_flags,
1785 (unsigned int) new_slot_info);
1789 static void xhci_zero_in_ctx(struct xhci_hcd *xhci, struct xhci_virt_device *virt_dev)
1791 struct xhci_input_control_ctx *ctrl_ctx;
1792 struct xhci_ep_ctx *ep_ctx;
1793 struct xhci_slot_ctx *slot_ctx;
1796 ctrl_ctx = xhci_get_input_control_ctx(xhci, virt_dev->in_ctx);
1798 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
1803 /* When a device's add flag and drop flag are zero, any subsequent
1804 * configure endpoint command will leave that endpoint's state
1805 * untouched. Make sure we don't leave any old state in the input
1806 * endpoint contexts.
1808 ctrl_ctx->drop_flags = 0;
1809 ctrl_ctx->add_flags = 0;
1810 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
1811 slot_ctx->dev_info &= cpu_to_le32(~LAST_CTX_MASK);
1812 /* Endpoint 0 is always valid */
1813 slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(1));
1814 for (i = 1; i < 31; ++i) {
1815 ep_ctx = xhci_get_ep_ctx(xhci, virt_dev->in_ctx, i);
1816 ep_ctx->ep_info = 0;
1817 ep_ctx->ep_info2 = 0;
1819 ep_ctx->tx_info = 0;
1823 static int xhci_configure_endpoint_result(struct xhci_hcd *xhci,
1824 struct usb_device *udev, u32 *cmd_status)
1828 switch (*cmd_status) {
1830 dev_warn(&udev->dev, "Not enough host controller resources "
1831 "for new device state.\n");
1833 /* FIXME: can we allocate more resources for the HC? */
1836 case COMP_2ND_BW_ERR:
1837 dev_warn(&udev->dev, "Not enough bandwidth "
1838 "for new device state.\n");
1840 /* FIXME: can we go back to the old state? */
1843 /* the HCD set up something wrong */
1844 dev_warn(&udev->dev, "ERROR: Endpoint drop flag = 0, "
1846 "and endpoint is not disabled.\n");
1850 dev_warn(&udev->dev, "ERROR: Incompatible device for endpoint "
1851 "configure command.\n");
1855 dev_dbg(&udev->dev, "Successful Endpoint Configure command\n");
1859 xhci_err(xhci, "ERROR: unexpected command completion "
1860 "code 0x%x.\n", *cmd_status);
1867 static int xhci_evaluate_context_result(struct xhci_hcd *xhci,
1868 struct usb_device *udev, u32 *cmd_status)
1871 struct xhci_virt_device *virt_dev = xhci->devs[udev->slot_id];
1873 switch (*cmd_status) {
1875 dev_warn(&udev->dev, "WARN: xHCI driver setup invalid evaluate "
1876 "context command.\n");
1880 dev_warn(&udev->dev, "WARN: slot not enabled for"
1881 "evaluate context command.\n");
1884 case COMP_CTX_STATE:
1885 dev_warn(&udev->dev, "WARN: invalid context state for "
1886 "evaluate context command.\n");
1887 xhci_dbg_ctx(xhci, virt_dev->out_ctx, 1);
1891 dev_warn(&udev->dev, "ERROR: Incompatible device for evaluate "
1892 "context command.\n");
1896 /* Max Exit Latency too large error */
1897 dev_warn(&udev->dev, "WARN: Max Exit Latency too large\n");
1901 dev_dbg(&udev->dev, "Successful evaluate context command\n");
1905 xhci_err(xhci, "ERROR: unexpected command completion "
1906 "code 0x%x.\n", *cmd_status);
1913 static u32 xhci_count_num_new_endpoints(struct xhci_hcd *xhci,
1914 struct xhci_input_control_ctx *ctrl_ctx)
1916 u32 valid_add_flags;
1917 u32 valid_drop_flags;
1919 /* Ignore the slot flag (bit 0), and the default control endpoint flag
1920 * (bit 1). The default control endpoint is added during the Address
1921 * Device command and is never removed until the slot is disabled.
1923 valid_add_flags = ctrl_ctx->add_flags >> 2;
1924 valid_drop_flags = ctrl_ctx->drop_flags >> 2;
1926 /* Use hweight32 to count the number of ones in the add flags, or
1927 * number of endpoints added. Don't count endpoints that are changed
1928 * (both added and dropped).
1930 return hweight32(valid_add_flags) -
1931 hweight32(valid_add_flags & valid_drop_flags);
1934 static unsigned int xhci_count_num_dropped_endpoints(struct xhci_hcd *xhci,
1935 struct xhci_input_control_ctx *ctrl_ctx)
1937 u32 valid_add_flags;
1938 u32 valid_drop_flags;
1940 valid_add_flags = ctrl_ctx->add_flags >> 2;
1941 valid_drop_flags = ctrl_ctx->drop_flags >> 2;
1943 return hweight32(valid_drop_flags) -
1944 hweight32(valid_add_flags & valid_drop_flags);
1948 * We need to reserve the new number of endpoints before the configure endpoint
1949 * command completes. We can't subtract the dropped endpoints from the number
1950 * of active endpoints until the command completes because we can oversubscribe
1951 * the host in this case:
1953 * - the first configure endpoint command drops more endpoints than it adds
1954 * - a second configure endpoint command that adds more endpoints is queued
1955 * - the first configure endpoint command fails, so the config is unchanged
1956 * - the second command may succeed, even though there isn't enough resources
1958 * Must be called with xhci->lock held.
1960 static int xhci_reserve_host_resources(struct xhci_hcd *xhci,
1961 struct xhci_input_control_ctx *ctrl_ctx)
1965 added_eps = xhci_count_num_new_endpoints(xhci, ctrl_ctx);
1966 if (xhci->num_active_eps + added_eps > xhci->limit_active_eps) {
1967 xhci_dbg(xhci, "Not enough ep ctxs: "
1968 "%u active, need to add %u, limit is %u.\n",
1969 xhci->num_active_eps, added_eps,
1970 xhci->limit_active_eps);
1973 xhci->num_active_eps += added_eps;
1974 xhci_dbg(xhci, "Adding %u ep ctxs, %u now active.\n", added_eps,
1975 xhci->num_active_eps);
1980 * The configure endpoint was failed by the xHC for some other reason, so we
1981 * need to revert the resources that failed configuration would have used.
1983 * Must be called with xhci->lock held.
1985 static void xhci_free_host_resources(struct xhci_hcd *xhci,
1986 struct xhci_input_control_ctx *ctrl_ctx)
1990 num_failed_eps = xhci_count_num_new_endpoints(xhci, ctrl_ctx);
1991 xhci->num_active_eps -= num_failed_eps;
1992 xhci_dbg(xhci, "Removing %u failed ep ctxs, %u now active.\n",
1994 xhci->num_active_eps);
1998 * Now that the command has completed, clean up the active endpoint count by
1999 * subtracting out the endpoints that were dropped (but not changed).
2001 * Must be called with xhci->lock held.
2003 static void xhci_finish_resource_reservation(struct xhci_hcd *xhci,
2004 struct xhci_input_control_ctx *ctrl_ctx)
2006 u32 num_dropped_eps;
2008 num_dropped_eps = xhci_count_num_dropped_endpoints(xhci, ctrl_ctx);
2009 xhci->num_active_eps -= num_dropped_eps;
2010 if (num_dropped_eps)
2011 xhci_dbg(xhci, "Removing %u dropped ep ctxs, %u now active.\n",
2013 xhci->num_active_eps);
2016 static unsigned int xhci_get_block_size(struct usb_device *udev)
2018 switch (udev->speed) {
2020 case USB_SPEED_FULL:
2022 case USB_SPEED_HIGH:
2024 case USB_SPEED_SUPER:
2026 case USB_SPEED_UNKNOWN:
2027 case USB_SPEED_WIRELESS:
2029 /* Should never happen */
2035 xhci_get_largest_overhead(struct xhci_interval_bw *interval_bw)
2037 if (interval_bw->overhead[LS_OVERHEAD_TYPE])
2039 if (interval_bw->overhead[FS_OVERHEAD_TYPE])
2044 /* If we are changing a LS/FS device under a HS hub,
2045 * make sure (if we are activating a new TT) that the HS bus has enough
2046 * bandwidth for this new TT.
2048 static int xhci_check_tt_bw_table(struct xhci_hcd *xhci,
2049 struct xhci_virt_device *virt_dev,
2052 struct xhci_interval_bw_table *bw_table;
2053 struct xhci_tt_bw_info *tt_info;
2055 /* Find the bandwidth table for the root port this TT is attached to. */
2056 bw_table = &xhci->rh_bw[virt_dev->real_port - 1].bw_table;
2057 tt_info = virt_dev->tt_info;
2058 /* If this TT already had active endpoints, the bandwidth for this TT
2059 * has already been added. Removing all periodic endpoints (and thus
2060 * making the TT enactive) will only decrease the bandwidth used.
2064 if (old_active_eps == 0 && tt_info->active_eps != 0) {
2065 if (bw_table->bw_used + TT_HS_OVERHEAD > HS_BW_LIMIT)
2069 /* Not sure why we would have no new active endpoints...
2071 * Maybe because of an Evaluate Context change for a hub update or a
2072 * control endpoint 0 max packet size change?
2073 * FIXME: skip the bandwidth calculation in that case.
2078 static int xhci_check_ss_bw(struct xhci_hcd *xhci,
2079 struct xhci_virt_device *virt_dev)
2081 unsigned int bw_reserved;
2083 bw_reserved = DIV_ROUND_UP(SS_BW_RESERVED*SS_BW_LIMIT_IN, 100);
2084 if (virt_dev->bw_table->ss_bw_in > (SS_BW_LIMIT_IN - bw_reserved))
2087 bw_reserved = DIV_ROUND_UP(SS_BW_RESERVED*SS_BW_LIMIT_OUT, 100);
2088 if (virt_dev->bw_table->ss_bw_out > (SS_BW_LIMIT_OUT - bw_reserved))
2095 * This algorithm is a very conservative estimate of the worst-case scheduling
2096 * scenario for any one interval. The hardware dynamically schedules the
2097 * packets, so we can't tell which microframe could be the limiting factor in
2098 * the bandwidth scheduling. This only takes into account periodic endpoints.
2100 * Obviously, we can't solve an NP complete problem to find the minimum worst
2101 * case scenario. Instead, we come up with an estimate that is no less than
2102 * the worst case bandwidth used for any one microframe, but may be an
2105 * We walk the requirements for each endpoint by interval, starting with the
2106 * smallest interval, and place packets in the schedule where there is only one
2107 * possible way to schedule packets for that interval. In order to simplify
2108 * this algorithm, we record the largest max packet size for each interval, and
2109 * assume all packets will be that size.
2111 * For interval 0, we obviously must schedule all packets for each interval.
2112 * The bandwidth for interval 0 is just the amount of data to be transmitted
2113 * (the sum of all max ESIT payload sizes, plus any overhead per packet times
2114 * the number of packets).
2116 * For interval 1, we have two possible microframes to schedule those packets
2117 * in. For this algorithm, if we can schedule the same number of packets for
2118 * each possible scheduling opportunity (each microframe), we will do so. The
2119 * remaining number of packets will be saved to be transmitted in the gaps in
2120 * the next interval's scheduling sequence.
2122 * As we move those remaining packets to be scheduled with interval 2 packets,
2123 * we have to double the number of remaining packets to transmit. This is
2124 * because the intervals are actually powers of 2, and we would be transmitting
2125 * the previous interval's packets twice in this interval. We also have to be
2126 * sure that when we look at the largest max packet size for this interval, we
2127 * also look at the largest max packet size for the remaining packets and take
2128 * the greater of the two.
2130 * The algorithm continues to evenly distribute packets in each scheduling
2131 * opportunity, and push the remaining packets out, until we get to the last
2132 * interval. Then those packets and their associated overhead are just added
2133 * to the bandwidth used.
2135 static int xhci_check_bw_table(struct xhci_hcd *xhci,
2136 struct xhci_virt_device *virt_dev,
2139 unsigned int bw_reserved;
2140 unsigned int max_bandwidth;
2141 unsigned int bw_used;
2142 unsigned int block_size;
2143 struct xhci_interval_bw_table *bw_table;
2144 unsigned int packet_size = 0;
2145 unsigned int overhead = 0;
2146 unsigned int packets_transmitted = 0;
2147 unsigned int packets_remaining = 0;
2150 if (virt_dev->udev->speed == USB_SPEED_SUPER)
2151 return xhci_check_ss_bw(xhci, virt_dev);
2153 if (virt_dev->udev->speed == USB_SPEED_HIGH) {
2154 max_bandwidth = HS_BW_LIMIT;
2155 /* Convert percent of bus BW reserved to blocks reserved */
2156 bw_reserved = DIV_ROUND_UP(HS_BW_RESERVED * max_bandwidth, 100);
2158 max_bandwidth = FS_BW_LIMIT;
2159 bw_reserved = DIV_ROUND_UP(FS_BW_RESERVED * max_bandwidth, 100);
2162 bw_table = virt_dev->bw_table;
2163 /* We need to translate the max packet size and max ESIT payloads into
2164 * the units the hardware uses.
2166 block_size = xhci_get_block_size(virt_dev->udev);
2168 /* If we are manipulating a LS/FS device under a HS hub, double check
2169 * that the HS bus has enough bandwidth if we are activing a new TT.
2171 if (virt_dev->tt_info) {
2172 xhci_dbg(xhci, "Recalculating BW for rootport %u\n",
2173 virt_dev->real_port);
2174 if (xhci_check_tt_bw_table(xhci, virt_dev, old_active_eps)) {
2175 xhci_warn(xhci, "Not enough bandwidth on HS bus for "
2176 "newly activated TT.\n");
2179 xhci_dbg(xhci, "Recalculating BW for TT slot %u port %u\n",
2180 virt_dev->tt_info->slot_id,
2181 virt_dev->tt_info->ttport);
2183 xhci_dbg(xhci, "Recalculating BW for rootport %u\n",
2184 virt_dev->real_port);
2187 /* Add in how much bandwidth will be used for interval zero, or the
2188 * rounded max ESIT payload + number of packets * largest overhead.
2190 bw_used = DIV_ROUND_UP(bw_table->interval0_esit_payload, block_size) +
2191 bw_table->interval_bw[0].num_packets *
2192 xhci_get_largest_overhead(&bw_table->interval_bw[0]);
2194 for (i = 1; i < XHCI_MAX_INTERVAL; i++) {
2195 unsigned int bw_added;
2196 unsigned int largest_mps;
2197 unsigned int interval_overhead;
2200 * How many packets could we transmit in this interval?
2201 * If packets didn't fit in the previous interval, we will need
2202 * to transmit that many packets twice within this interval.
2204 packets_remaining = 2 * packets_remaining +
2205 bw_table->interval_bw[i].num_packets;
2207 /* Find the largest max packet size of this or the previous
2210 if (list_empty(&bw_table->interval_bw[i].endpoints))
2213 struct xhci_virt_ep *virt_ep;
2214 struct list_head *ep_entry;
2216 ep_entry = bw_table->interval_bw[i].endpoints.next;
2217 virt_ep = list_entry(ep_entry,
2218 struct xhci_virt_ep, bw_endpoint_list);
2219 /* Convert to blocks, rounding up */
2220 largest_mps = DIV_ROUND_UP(
2221 virt_ep->bw_info.max_packet_size,
2224 if (largest_mps > packet_size)
2225 packet_size = largest_mps;
2227 /* Use the larger overhead of this or the previous interval. */
2228 interval_overhead = xhci_get_largest_overhead(
2229 &bw_table->interval_bw[i]);
2230 if (interval_overhead > overhead)
2231 overhead = interval_overhead;
2233 /* How many packets can we evenly distribute across
2234 * (1 << (i + 1)) possible scheduling opportunities?
2236 packets_transmitted = packets_remaining >> (i + 1);
2238 /* Add in the bandwidth used for those scheduled packets */
2239 bw_added = packets_transmitted * (overhead + packet_size);
2241 /* How many packets do we have remaining to transmit? */
2242 packets_remaining = packets_remaining % (1 << (i + 1));
2244 /* What largest max packet size should those packets have? */
2245 /* If we've transmitted all packets, don't carry over the
2246 * largest packet size.
2248 if (packets_remaining == 0) {
2251 } else if (packets_transmitted > 0) {
2252 /* Otherwise if we do have remaining packets, and we've
2253 * scheduled some packets in this interval, take the
2254 * largest max packet size from endpoints with this
2257 packet_size = largest_mps;
2258 overhead = interval_overhead;
2260 /* Otherwise carry over packet_size and overhead from the last
2261 * time we had a remainder.
2263 bw_used += bw_added;
2264 if (bw_used > max_bandwidth) {
2265 xhci_warn(xhci, "Not enough bandwidth. "
2266 "Proposed: %u, Max: %u\n",
2267 bw_used, max_bandwidth);
2272 * Ok, we know we have some packets left over after even-handedly
2273 * scheduling interval 15. We don't know which microframes they will
2274 * fit into, so we over-schedule and say they will be scheduled every
2277 if (packets_remaining > 0)
2278 bw_used += overhead + packet_size;
2280 if (!virt_dev->tt_info && virt_dev->udev->speed == USB_SPEED_HIGH) {
2281 unsigned int port_index = virt_dev->real_port - 1;
2283 /* OK, we're manipulating a HS device attached to a
2284 * root port bandwidth domain. Include the number of active TTs
2285 * in the bandwidth used.
2287 bw_used += TT_HS_OVERHEAD *
2288 xhci->rh_bw[port_index].num_active_tts;
2291 xhci_dbg(xhci, "Final bandwidth: %u, Limit: %u, Reserved: %u, "
2292 "Available: %u " "percent\n",
2293 bw_used, max_bandwidth, bw_reserved,
2294 (max_bandwidth - bw_used - bw_reserved) * 100 /
2297 bw_used += bw_reserved;
2298 if (bw_used > max_bandwidth) {
2299 xhci_warn(xhci, "Not enough bandwidth. Proposed: %u, Max: %u\n",
2300 bw_used, max_bandwidth);
2304 bw_table->bw_used = bw_used;
2308 static bool xhci_is_async_ep(unsigned int ep_type)
2310 return (ep_type != ISOC_OUT_EP && ep_type != INT_OUT_EP &&
2311 ep_type != ISOC_IN_EP &&
2312 ep_type != INT_IN_EP);
2315 static bool xhci_is_sync_in_ep(unsigned int ep_type)
2317 return (ep_type == ISOC_IN_EP || ep_type == INT_IN_EP);
2320 static unsigned int xhci_get_ss_bw_consumed(struct xhci_bw_info *ep_bw)
2322 unsigned int mps = DIV_ROUND_UP(ep_bw->max_packet_size, SS_BLOCK);
2324 if (ep_bw->ep_interval == 0)
2325 return SS_OVERHEAD_BURST +
2326 (ep_bw->mult * ep_bw->num_packets *
2327 (SS_OVERHEAD + mps));
2328 return DIV_ROUND_UP(ep_bw->mult * ep_bw->num_packets *
2329 (SS_OVERHEAD + mps + SS_OVERHEAD_BURST),
2330 1 << ep_bw->ep_interval);
2334 void xhci_drop_ep_from_interval_table(struct xhci_hcd *xhci,
2335 struct xhci_bw_info *ep_bw,
2336 struct xhci_interval_bw_table *bw_table,
2337 struct usb_device *udev,
2338 struct xhci_virt_ep *virt_ep,
2339 struct xhci_tt_bw_info *tt_info)
2341 struct xhci_interval_bw *interval_bw;
2342 int normalized_interval;
2344 if (xhci_is_async_ep(ep_bw->type))
2347 if (udev->speed == USB_SPEED_SUPER) {
2348 if (xhci_is_sync_in_ep(ep_bw->type))
2349 xhci->devs[udev->slot_id]->bw_table->ss_bw_in -=
2350 xhci_get_ss_bw_consumed(ep_bw);
2352 xhci->devs[udev->slot_id]->bw_table->ss_bw_out -=
2353 xhci_get_ss_bw_consumed(ep_bw);
2357 /* SuperSpeed endpoints never get added to intervals in the table, so
2358 * this check is only valid for HS/FS/LS devices.
2360 if (list_empty(&virt_ep->bw_endpoint_list))
2362 /* For LS/FS devices, we need to translate the interval expressed in
2363 * microframes to frames.
2365 if (udev->speed == USB_SPEED_HIGH)
2366 normalized_interval = ep_bw->ep_interval;
2368 normalized_interval = ep_bw->ep_interval - 3;
2370 if (normalized_interval == 0)
2371 bw_table->interval0_esit_payload -= ep_bw->max_esit_payload;
2372 interval_bw = &bw_table->interval_bw[normalized_interval];
2373 interval_bw->num_packets -= ep_bw->num_packets;
2374 switch (udev->speed) {
2376 interval_bw->overhead[LS_OVERHEAD_TYPE] -= 1;
2378 case USB_SPEED_FULL:
2379 interval_bw->overhead[FS_OVERHEAD_TYPE] -= 1;
2381 case USB_SPEED_HIGH:
2382 interval_bw->overhead[HS_OVERHEAD_TYPE] -= 1;
2384 case USB_SPEED_SUPER:
2385 case USB_SPEED_UNKNOWN:
2386 case USB_SPEED_WIRELESS:
2387 /* Should never happen because only LS/FS/HS endpoints will get
2388 * added to the endpoint list.
2393 tt_info->active_eps -= 1;
2394 list_del_init(&virt_ep->bw_endpoint_list);
2397 static void xhci_add_ep_to_interval_table(struct xhci_hcd *xhci,
2398 struct xhci_bw_info *ep_bw,
2399 struct xhci_interval_bw_table *bw_table,
2400 struct usb_device *udev,
2401 struct xhci_virt_ep *virt_ep,
2402 struct xhci_tt_bw_info *tt_info)
2404 struct xhci_interval_bw *interval_bw;
2405 struct xhci_virt_ep *smaller_ep;
2406 int normalized_interval;
2408 if (xhci_is_async_ep(ep_bw->type))
2411 if (udev->speed == USB_SPEED_SUPER) {
2412 if (xhci_is_sync_in_ep(ep_bw->type))
2413 xhci->devs[udev->slot_id]->bw_table->ss_bw_in +=
2414 xhci_get_ss_bw_consumed(ep_bw);
2416 xhci->devs[udev->slot_id]->bw_table->ss_bw_out +=
2417 xhci_get_ss_bw_consumed(ep_bw);
2421 /* For LS/FS devices, we need to translate the interval expressed in
2422 * microframes to frames.
2424 if (udev->speed == USB_SPEED_HIGH)
2425 normalized_interval = ep_bw->ep_interval;
2427 normalized_interval = ep_bw->ep_interval - 3;
2429 if (normalized_interval == 0)
2430 bw_table->interval0_esit_payload += ep_bw->max_esit_payload;
2431 interval_bw = &bw_table->interval_bw[normalized_interval];
2432 interval_bw->num_packets += ep_bw->num_packets;
2433 switch (udev->speed) {
2435 interval_bw->overhead[LS_OVERHEAD_TYPE] += 1;
2437 case USB_SPEED_FULL:
2438 interval_bw->overhead[FS_OVERHEAD_TYPE] += 1;
2440 case USB_SPEED_HIGH:
2441 interval_bw->overhead[HS_OVERHEAD_TYPE] += 1;
2443 case USB_SPEED_SUPER:
2444 case USB_SPEED_UNKNOWN:
2445 case USB_SPEED_WIRELESS:
2446 /* Should never happen because only LS/FS/HS endpoints will get
2447 * added to the endpoint list.
2453 tt_info->active_eps += 1;
2454 /* Insert the endpoint into the list, largest max packet size first. */
2455 list_for_each_entry(smaller_ep, &interval_bw->endpoints,
2457 if (ep_bw->max_packet_size >=
2458 smaller_ep->bw_info.max_packet_size) {
2459 /* Add the new ep before the smaller endpoint */
2460 list_add_tail(&virt_ep->bw_endpoint_list,
2461 &smaller_ep->bw_endpoint_list);
2465 /* Add the new endpoint at the end of the list. */
2466 list_add_tail(&virt_ep->bw_endpoint_list,
2467 &interval_bw->endpoints);
2470 void xhci_update_tt_active_eps(struct xhci_hcd *xhci,
2471 struct xhci_virt_device *virt_dev,
2474 struct xhci_root_port_bw_info *rh_bw_info;
2475 if (!virt_dev->tt_info)
2478 rh_bw_info = &xhci->rh_bw[virt_dev->real_port - 1];
2479 if (old_active_eps == 0 &&
2480 virt_dev->tt_info->active_eps != 0) {
2481 rh_bw_info->num_active_tts += 1;
2482 rh_bw_info->bw_table.bw_used += TT_HS_OVERHEAD;
2483 } else if (old_active_eps != 0 &&
2484 virt_dev->tt_info->active_eps == 0) {
2485 rh_bw_info->num_active_tts -= 1;
2486 rh_bw_info->bw_table.bw_used -= TT_HS_OVERHEAD;
2490 static int xhci_reserve_bandwidth(struct xhci_hcd *xhci,
2491 struct xhci_virt_device *virt_dev,
2492 struct xhci_container_ctx *in_ctx)
2494 struct xhci_bw_info ep_bw_info[31];
2496 struct xhci_input_control_ctx *ctrl_ctx;
2497 int old_active_eps = 0;
2499 if (virt_dev->tt_info)
2500 old_active_eps = virt_dev->tt_info->active_eps;
2502 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
2504 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
2509 for (i = 0; i < 31; i++) {
2510 if (!EP_IS_ADDED(ctrl_ctx, i) && !EP_IS_DROPPED(ctrl_ctx, i))
2513 /* Make a copy of the BW info in case we need to revert this */
2514 memcpy(&ep_bw_info[i], &virt_dev->eps[i].bw_info,
2515 sizeof(ep_bw_info[i]));
2516 /* Drop the endpoint from the interval table if the endpoint is
2517 * being dropped or changed.
2519 if (EP_IS_DROPPED(ctrl_ctx, i))
2520 xhci_drop_ep_from_interval_table(xhci,
2521 &virt_dev->eps[i].bw_info,
2527 /* Overwrite the information stored in the endpoints' bw_info */
2528 xhci_update_bw_info(xhci, virt_dev->in_ctx, ctrl_ctx, virt_dev);
2529 for (i = 0; i < 31; i++) {
2530 /* Add any changed or added endpoints to the interval table */
2531 if (EP_IS_ADDED(ctrl_ctx, i))
2532 xhci_add_ep_to_interval_table(xhci,
2533 &virt_dev->eps[i].bw_info,
2540 if (!xhci_check_bw_table(xhci, virt_dev, old_active_eps)) {
2541 /* Ok, this fits in the bandwidth we have.
2542 * Update the number of active TTs.
2544 xhci_update_tt_active_eps(xhci, virt_dev, old_active_eps);
2548 /* We don't have enough bandwidth for this, revert the stored info. */
2549 for (i = 0; i < 31; i++) {
2550 if (!EP_IS_ADDED(ctrl_ctx, i) && !EP_IS_DROPPED(ctrl_ctx, i))
2553 /* Drop the new copies of any added or changed endpoints from
2554 * the interval table.
2556 if (EP_IS_ADDED(ctrl_ctx, i)) {
2557 xhci_drop_ep_from_interval_table(xhci,
2558 &virt_dev->eps[i].bw_info,
2564 /* Revert the endpoint back to its old information */
2565 memcpy(&virt_dev->eps[i].bw_info, &ep_bw_info[i],
2566 sizeof(ep_bw_info[i]));
2567 /* Add any changed or dropped endpoints back into the table */
2568 if (EP_IS_DROPPED(ctrl_ctx, i))
2569 xhci_add_ep_to_interval_table(xhci,
2570 &virt_dev->eps[i].bw_info,
2580 /* Issue a configure endpoint command or evaluate context command
2581 * and wait for it to finish.
2583 static int xhci_configure_endpoint(struct xhci_hcd *xhci,
2584 struct usb_device *udev,
2585 struct xhci_command *command,
2586 bool ctx_change, bool must_succeed)
2590 unsigned long flags;
2591 struct xhci_container_ctx *in_ctx;
2592 struct xhci_input_control_ctx *ctrl_ctx;
2593 struct completion *cmd_completion;
2595 struct xhci_virt_device *virt_dev;
2596 union xhci_trb *cmd_trb;
2598 spin_lock_irqsave(&xhci->lock, flags);
2599 virt_dev = xhci->devs[udev->slot_id];
2602 in_ctx = command->in_ctx;
2604 in_ctx = virt_dev->in_ctx;
2605 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
2607 spin_unlock_irqrestore(&xhci->lock, flags);
2608 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
2613 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK) &&
2614 xhci_reserve_host_resources(xhci, ctrl_ctx)) {
2615 spin_unlock_irqrestore(&xhci->lock, flags);
2616 xhci_warn(xhci, "Not enough host resources, "
2617 "active endpoint contexts = %u\n",
2618 xhci->num_active_eps);
2621 if ((xhci->quirks & XHCI_SW_BW_CHECKING) &&
2622 xhci_reserve_bandwidth(xhci, virt_dev, in_ctx)) {
2623 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK))
2624 xhci_free_host_resources(xhci, ctrl_ctx);
2625 spin_unlock_irqrestore(&xhci->lock, flags);
2626 xhci_warn(xhci, "Not enough bandwidth\n");
2631 cmd_completion = command->completion;
2632 cmd_status = &command->status;
2633 command->command_trb = xhci->cmd_ring->enqueue;
2635 /* Enqueue pointer can be left pointing to the link TRB,
2636 * we must handle that
2638 if (TRB_TYPE_LINK_LE32(command->command_trb->link.control))
2639 command->command_trb =
2640 xhci->cmd_ring->enq_seg->next->trbs;
2642 list_add_tail(&command->cmd_list, &virt_dev->cmd_list);
2644 cmd_completion = &virt_dev->cmd_completion;
2645 cmd_status = &virt_dev->cmd_status;
2647 init_completion(cmd_completion);
2649 cmd_trb = xhci->cmd_ring->dequeue;
2651 ret = xhci_queue_configure_endpoint(xhci, in_ctx->dma,
2652 udev->slot_id, must_succeed);
2654 ret = xhci_queue_evaluate_context(xhci, in_ctx->dma,
2655 udev->slot_id, must_succeed);
2658 list_del(&command->cmd_list);
2659 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK))
2660 xhci_free_host_resources(xhci, ctrl_ctx);
2661 spin_unlock_irqrestore(&xhci->lock, flags);
2662 xhci_dbg(xhci, "FIXME allocate a new ring segment\n");
2665 xhci_ring_cmd_db(xhci);
2666 spin_unlock_irqrestore(&xhci->lock, flags);
2668 /* Wait for the configure endpoint command to complete */
2669 timeleft = wait_for_completion_interruptible_timeout(
2671 XHCI_CMD_DEFAULT_TIMEOUT);
2672 if (timeleft <= 0) {
2673 xhci_warn(xhci, "%s while waiting for %s command\n",
2674 timeleft == 0 ? "Timeout" : "Signal",
2676 "configure endpoint" :
2677 "evaluate context");
2678 /* cancel the configure endpoint command */
2679 ret = xhci_cancel_cmd(xhci, command, cmd_trb);
2686 ret = xhci_configure_endpoint_result(xhci, udev, cmd_status);
2688 ret = xhci_evaluate_context_result(xhci, udev, cmd_status);
2690 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) {
2691 spin_lock_irqsave(&xhci->lock, flags);
2692 /* If the command failed, remove the reserved resources.
2693 * Otherwise, clean up the estimate to include dropped eps.
2696 xhci_free_host_resources(xhci, ctrl_ctx);
2698 xhci_finish_resource_reservation(xhci, ctrl_ctx);
2699 spin_unlock_irqrestore(&xhci->lock, flags);
2704 /* Called after one or more calls to xhci_add_endpoint() or
2705 * xhci_drop_endpoint(). If this call fails, the USB core is expected
2706 * to call xhci_reset_bandwidth().
2708 * Since we are in the middle of changing either configuration or
2709 * installing a new alt setting, the USB core won't allow URBs to be
2710 * enqueued for any endpoint on the old config or interface. Nothing
2711 * else should be touching the xhci->devs[slot_id] structure, so we
2712 * don't need to take the xhci->lock for manipulating that.
2714 int xhci_check_bandwidth(struct usb_hcd *hcd, struct usb_device *udev)
2718 struct xhci_hcd *xhci;
2719 struct xhci_virt_device *virt_dev;
2720 struct xhci_input_control_ctx *ctrl_ctx;
2721 struct xhci_slot_ctx *slot_ctx;
2723 ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
2726 xhci = hcd_to_xhci(hcd);
2727 if (xhci->xhc_state & XHCI_STATE_DYING)
2730 xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
2731 virt_dev = xhci->devs[udev->slot_id];
2733 /* See section 4.6.6 - A0 = 1; A1 = D0 = D1 = 0 */
2734 ctrl_ctx = xhci_get_input_control_ctx(xhci, virt_dev->in_ctx);
2736 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
2740 ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
2741 ctrl_ctx->add_flags &= cpu_to_le32(~EP0_FLAG);
2742 ctrl_ctx->drop_flags &= cpu_to_le32(~(SLOT_FLAG | EP0_FLAG));
2744 /* Don't issue the command if there's no endpoints to update. */
2745 if (ctrl_ctx->add_flags == cpu_to_le32(SLOT_FLAG) &&
2746 ctrl_ctx->drop_flags == 0)
2749 xhci_dbg(xhci, "New Input Control Context:\n");
2750 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
2751 xhci_dbg_ctx(xhci, virt_dev->in_ctx,
2752 LAST_CTX_TO_EP_NUM(le32_to_cpu(slot_ctx->dev_info)));
2754 ret = xhci_configure_endpoint(xhci, udev, NULL,
2757 /* Callee should call reset_bandwidth() */
2761 xhci_dbg(xhci, "Output context after successful config ep cmd:\n");
2762 xhci_dbg_ctx(xhci, virt_dev->out_ctx,
2763 LAST_CTX_TO_EP_NUM(le32_to_cpu(slot_ctx->dev_info)));
2765 /* Free any rings that were dropped, but not changed. */
2766 for (i = 1; i < 31; ++i) {
2767 if ((le32_to_cpu(ctrl_ctx->drop_flags) & (1 << (i + 1))) &&
2768 !(le32_to_cpu(ctrl_ctx->add_flags) & (1 << (i + 1))))
2769 xhci_free_or_cache_endpoint_ring(xhci, virt_dev, i);
2771 xhci_zero_in_ctx(xhci, virt_dev);
2773 * Install any rings for completely new endpoints or changed endpoints,
2774 * and free or cache any old rings from changed endpoints.
2776 for (i = 1; i < 31; ++i) {
2777 if (!virt_dev->eps[i].new_ring)
2779 /* Only cache or free the old ring if it exists.
2780 * It may not if this is the first add of an endpoint.
2782 if (virt_dev->eps[i].ring) {
2783 xhci_free_or_cache_endpoint_ring(xhci, virt_dev, i);
2785 virt_dev->eps[i].ring = virt_dev->eps[i].new_ring;
2786 virt_dev->eps[i].new_ring = NULL;
2792 void xhci_reset_bandwidth(struct usb_hcd *hcd, struct usb_device *udev)
2794 struct xhci_hcd *xhci;
2795 struct xhci_virt_device *virt_dev;
2798 ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
2801 xhci = hcd_to_xhci(hcd);
2803 xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
2804 virt_dev = xhci->devs[udev->slot_id];
2805 /* Free any rings allocated for added endpoints */
2806 for (i = 0; i < 31; ++i) {
2807 if (virt_dev->eps[i].new_ring) {
2808 xhci_ring_free(xhci, virt_dev->eps[i].new_ring);
2809 virt_dev->eps[i].new_ring = NULL;
2812 xhci_zero_in_ctx(xhci, virt_dev);
2815 static void xhci_setup_input_ctx_for_config_ep(struct xhci_hcd *xhci,
2816 struct xhci_container_ctx *in_ctx,
2817 struct xhci_container_ctx *out_ctx,
2818 struct xhci_input_control_ctx *ctrl_ctx,
2819 u32 add_flags, u32 drop_flags)
2821 ctrl_ctx->add_flags = cpu_to_le32(add_flags);
2822 ctrl_ctx->drop_flags = cpu_to_le32(drop_flags);
2823 xhci_slot_copy(xhci, in_ctx, out_ctx);
2824 ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
2826 xhci_dbg(xhci, "Input Context:\n");
2827 xhci_dbg_ctx(xhci, in_ctx, xhci_last_valid_endpoint(add_flags));
2830 static void xhci_setup_input_ctx_for_quirk(struct xhci_hcd *xhci,
2831 unsigned int slot_id, unsigned int ep_index,
2832 struct xhci_dequeue_state *deq_state)
2834 struct xhci_input_control_ctx *ctrl_ctx;
2835 struct xhci_container_ctx *in_ctx;
2836 struct xhci_ep_ctx *ep_ctx;
2840 in_ctx = xhci->devs[slot_id]->in_ctx;
2841 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
2843 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
2848 xhci_endpoint_copy(xhci, xhci->devs[slot_id]->in_ctx,
2849 xhci->devs[slot_id]->out_ctx, ep_index);
2850 ep_ctx = xhci_get_ep_ctx(xhci, in_ctx, ep_index);
2851 addr = xhci_trb_virt_to_dma(deq_state->new_deq_seg,
2852 deq_state->new_deq_ptr);
2854 xhci_warn(xhci, "WARN Cannot submit config ep after "
2855 "reset ep command\n");
2856 xhci_warn(xhci, "WARN deq seg = %p, deq ptr = %p\n",
2857 deq_state->new_deq_seg,
2858 deq_state->new_deq_ptr);
2861 ep_ctx->deq = cpu_to_le64(addr | deq_state->new_cycle_state);
2863 added_ctxs = xhci_get_endpoint_flag_from_index(ep_index);
2864 xhci_setup_input_ctx_for_config_ep(xhci, xhci->devs[slot_id]->in_ctx,
2865 xhci->devs[slot_id]->out_ctx, ctrl_ctx,
2866 added_ctxs, added_ctxs);
2869 void xhci_cleanup_stalled_ring(struct xhci_hcd *xhci,
2870 struct usb_device *udev, unsigned int ep_index)
2872 struct xhci_dequeue_state deq_state;
2873 struct xhci_virt_ep *ep;
2875 xhci_dbg(xhci, "Cleaning up stalled endpoint ring\n");
2876 ep = &xhci->devs[udev->slot_id]->eps[ep_index];
2877 /* We need to move the HW's dequeue pointer past this TD,
2878 * or it will attempt to resend it on the next doorbell ring.
2880 xhci_find_new_dequeue_state(xhci, udev->slot_id,
2881 ep_index, ep->stopped_stream, ep->stopped_td,
2884 /* HW with the reset endpoint quirk will use the saved dequeue state to
2885 * issue a configure endpoint command later.
2887 if (!(xhci->quirks & XHCI_RESET_EP_QUIRK)) {
2888 xhci_dbg(xhci, "Queueing new dequeue state\n");
2889 xhci_queue_new_dequeue_state(xhci, udev->slot_id,
2890 ep_index, ep->stopped_stream, &deq_state);
2892 /* Better hope no one uses the input context between now and the
2893 * reset endpoint completion!
2894 * XXX: No idea how this hardware will react when stream rings
2897 xhci_dbg(xhci, "Setting up input context for "
2898 "configure endpoint command\n");
2899 xhci_setup_input_ctx_for_quirk(xhci, udev->slot_id,
2900 ep_index, &deq_state);
2904 /* Deal with stalled endpoints. The core should have sent the control message
2905 * to clear the halt condition. However, we need to make the xHCI hardware
2906 * reset its sequence number, since a device will expect a sequence number of
2907 * zero after the halt condition is cleared.
2908 * Context: in_interrupt
2910 void xhci_endpoint_reset(struct usb_hcd *hcd,
2911 struct usb_host_endpoint *ep)
2913 struct xhci_hcd *xhci;
2914 struct usb_device *udev;
2915 unsigned int ep_index;
2916 unsigned long flags;
2918 struct xhci_virt_ep *virt_ep;
2920 xhci = hcd_to_xhci(hcd);
2921 udev = (struct usb_device *) ep->hcpriv;
2922 /* Called with a root hub endpoint (or an endpoint that wasn't added
2923 * with xhci_add_endpoint()
2927 ep_index = xhci_get_endpoint_index(&ep->desc);
2928 virt_ep = &xhci->devs[udev->slot_id]->eps[ep_index];
2929 if (!virt_ep->stopped_td) {
2930 xhci_dbg(xhci, "Endpoint 0x%x not halted, refusing to reset.\n",
2931 ep->desc.bEndpointAddress);
2934 if (usb_endpoint_xfer_control(&ep->desc)) {
2935 xhci_dbg(xhci, "Control endpoint stall already handled.\n");
2939 xhci_dbg(xhci, "Queueing reset endpoint command\n");
2940 spin_lock_irqsave(&xhci->lock, flags);
2941 ret = xhci_queue_reset_ep(xhci, udev->slot_id, ep_index);
2943 * Can't change the ring dequeue pointer until it's transitioned to the
2944 * stopped state, which is only upon a successful reset endpoint
2945 * command. Better hope that last command worked!
2948 xhci_cleanup_stalled_ring(xhci, udev, ep_index);
2949 kfree(virt_ep->stopped_td);
2950 xhci_ring_cmd_db(xhci);
2952 virt_ep->stopped_td = NULL;
2953 virt_ep->stopped_trb = NULL;
2954 virt_ep->stopped_stream = 0;
2955 spin_unlock_irqrestore(&xhci->lock, flags);
2958 xhci_warn(xhci, "FIXME allocate a new ring segment\n");
2961 static int xhci_check_streams_endpoint(struct xhci_hcd *xhci,
2962 struct usb_device *udev, struct usb_host_endpoint *ep,
2963 unsigned int slot_id)
2966 unsigned int ep_index;
2967 unsigned int ep_state;
2971 ret = xhci_check_args(xhci_to_hcd(xhci), udev, ep, 1, true, __func__);
2974 if (ep->ss_ep_comp.bmAttributes == 0) {
2975 xhci_warn(xhci, "WARN: SuperSpeed Endpoint Companion"
2976 " descriptor for ep 0x%x does not support streams\n",
2977 ep->desc.bEndpointAddress);
2981 ep_index = xhci_get_endpoint_index(&ep->desc);
2982 ep_state = xhci->devs[slot_id]->eps[ep_index].ep_state;
2983 if (ep_state & EP_HAS_STREAMS ||
2984 ep_state & EP_GETTING_STREAMS) {
2985 xhci_warn(xhci, "WARN: SuperSpeed bulk endpoint 0x%x "
2986 "already has streams set up.\n",
2987 ep->desc.bEndpointAddress);
2988 xhci_warn(xhci, "Send email to xHCI maintainer and ask for "
2989 "dynamic stream context array reallocation.\n");
2992 if (!list_empty(&xhci->devs[slot_id]->eps[ep_index].ring->td_list)) {
2993 xhci_warn(xhci, "Cannot setup streams for SuperSpeed bulk "
2994 "endpoint 0x%x; URBs are pending.\n",
2995 ep->desc.bEndpointAddress);
3001 static void xhci_calculate_streams_entries(struct xhci_hcd *xhci,
3002 unsigned int *num_streams, unsigned int *num_stream_ctxs)
3004 unsigned int max_streams;
3006 /* The stream context array size must be a power of two */
3007 *num_stream_ctxs = roundup_pow_of_two(*num_streams);
3009 * Find out how many primary stream array entries the host controller
3010 * supports. Later we may use secondary stream arrays (similar to 2nd
3011 * level page entries), but that's an optional feature for xHCI host
3012 * controllers. xHCs must support at least 4 stream IDs.
3014 max_streams = HCC_MAX_PSA(xhci->hcc_params);
3015 if (*num_stream_ctxs > max_streams) {
3016 xhci_dbg(xhci, "xHCI HW only supports %u stream ctx entries.\n",
3018 *num_stream_ctxs = max_streams;
3019 *num_streams = max_streams;
3023 /* Returns an error code if one of the endpoint already has streams.
3024 * This does not change any data structures, it only checks and gathers
3027 static int xhci_calculate_streams_and_bitmask(struct xhci_hcd *xhci,
3028 struct usb_device *udev,
3029 struct usb_host_endpoint **eps, unsigned int num_eps,
3030 unsigned int *num_streams, u32 *changed_ep_bitmask)
3032 unsigned int max_streams;
3033 unsigned int endpoint_flag;
3037 for (i = 0; i < num_eps; i++) {
3038 ret = xhci_check_streams_endpoint(xhci, udev,
3039 eps[i], udev->slot_id);
3043 max_streams = usb_ss_max_streams(&eps[i]->ss_ep_comp);
3044 if (max_streams < (*num_streams - 1)) {
3045 xhci_dbg(xhci, "Ep 0x%x only supports %u stream IDs.\n",
3046 eps[i]->desc.bEndpointAddress,
3048 *num_streams = max_streams+1;
3051 endpoint_flag = xhci_get_endpoint_flag(&eps[i]->desc);
3052 if (*changed_ep_bitmask & endpoint_flag)
3054 *changed_ep_bitmask |= endpoint_flag;
3059 static u32 xhci_calculate_no_streams_bitmask(struct xhci_hcd *xhci,
3060 struct usb_device *udev,
3061 struct usb_host_endpoint **eps, unsigned int num_eps)
3063 u32 changed_ep_bitmask = 0;
3064 unsigned int slot_id;
3065 unsigned int ep_index;
3066 unsigned int ep_state;
3069 slot_id = udev->slot_id;
3070 if (!xhci->devs[slot_id])
3073 for (i = 0; i < num_eps; i++) {
3074 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3075 ep_state = xhci->devs[slot_id]->eps[ep_index].ep_state;
3076 /* Are streams already being freed for the endpoint? */
3077 if (ep_state & EP_GETTING_NO_STREAMS) {
3078 xhci_warn(xhci, "WARN Can't disable streams for "
3080 "streams are being disabled already.",
3081 eps[i]->desc.bEndpointAddress);
3084 /* Are there actually any streams to free? */
3085 if (!(ep_state & EP_HAS_STREAMS) &&
3086 !(ep_state & EP_GETTING_STREAMS)) {
3087 xhci_warn(xhci, "WARN Can't disable streams for "
3089 "streams are already disabled!",
3090 eps[i]->desc.bEndpointAddress);
3091 xhci_warn(xhci, "WARN xhci_free_streams() called "
3092 "with non-streams endpoint\n");
3095 changed_ep_bitmask |= xhci_get_endpoint_flag(&eps[i]->desc);
3097 return changed_ep_bitmask;
3101 * The USB device drivers use this function (though the HCD interface in USB
3102 * core) to prepare a set of bulk endpoints to use streams. Streams are used to
3103 * coordinate mass storage command queueing across multiple endpoints (basically
3104 * a stream ID == a task ID).
3106 * Setting up streams involves allocating the same size stream context array
3107 * for each endpoint and issuing a configure endpoint command for all endpoints.
3109 * Don't allow the call to succeed if one endpoint only supports one stream
3110 * (which means it doesn't support streams at all).
3112 * Drivers may get less stream IDs than they asked for, if the host controller
3113 * hardware or endpoints claim they can't support the number of requested
3116 int xhci_alloc_streams(struct usb_hcd *hcd, struct usb_device *udev,
3117 struct usb_host_endpoint **eps, unsigned int num_eps,
3118 unsigned int num_streams, gfp_t mem_flags)
3121 struct xhci_hcd *xhci;
3122 struct xhci_virt_device *vdev;
3123 struct xhci_command *config_cmd;
3124 struct xhci_input_control_ctx *ctrl_ctx;
3125 unsigned int ep_index;
3126 unsigned int num_stream_ctxs;
3127 unsigned long flags;
3128 u32 changed_ep_bitmask = 0;
3133 /* Add one to the number of streams requested to account for
3134 * stream 0 that is reserved for xHCI usage.
3137 xhci = hcd_to_xhci(hcd);
3138 xhci_dbg(xhci, "Driver wants %u stream IDs (including stream 0).\n",
3141 config_cmd = xhci_alloc_command(xhci, true, true, mem_flags);
3143 xhci_dbg(xhci, "Could not allocate xHCI command structure.\n");
3146 ctrl_ctx = xhci_get_input_control_ctx(xhci, config_cmd->in_ctx);
3148 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
3150 xhci_free_command(xhci, config_cmd);
3154 /* Check to make sure all endpoints are not already configured for
3155 * streams. While we're at it, find the maximum number of streams that
3156 * all the endpoints will support and check for duplicate endpoints.
3158 spin_lock_irqsave(&xhci->lock, flags);
3159 ret = xhci_calculate_streams_and_bitmask(xhci, udev, eps,
3160 num_eps, &num_streams, &changed_ep_bitmask);
3162 xhci_free_command(xhci, config_cmd);
3163 spin_unlock_irqrestore(&xhci->lock, flags);
3166 if (num_streams <= 1) {
3167 xhci_warn(xhci, "WARN: endpoints can't handle "
3168 "more than one stream.\n");
3169 xhci_free_command(xhci, config_cmd);
3170 spin_unlock_irqrestore(&xhci->lock, flags);
3173 vdev = xhci->devs[udev->slot_id];
3174 /* Mark each endpoint as being in transition, so
3175 * xhci_urb_enqueue() will reject all URBs.
3177 for (i = 0; i < num_eps; i++) {
3178 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3179 vdev->eps[ep_index].ep_state |= EP_GETTING_STREAMS;
3181 spin_unlock_irqrestore(&xhci->lock, flags);
3183 /* Setup internal data structures and allocate HW data structures for
3184 * streams (but don't install the HW structures in the input context
3185 * until we're sure all memory allocation succeeded).
3187 xhci_calculate_streams_entries(xhci, &num_streams, &num_stream_ctxs);
3188 xhci_dbg(xhci, "Need %u stream ctx entries for %u stream IDs.\n",
3189 num_stream_ctxs, num_streams);
3191 for (i = 0; i < num_eps; i++) {
3192 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3193 vdev->eps[ep_index].stream_info = xhci_alloc_stream_info(xhci,
3195 num_streams, mem_flags);
3196 if (!vdev->eps[ep_index].stream_info)
3198 /* Set maxPstreams in endpoint context and update deq ptr to
3199 * point to stream context array. FIXME
3203 /* Set up the input context for a configure endpoint command. */
3204 for (i = 0; i < num_eps; i++) {
3205 struct xhci_ep_ctx *ep_ctx;
3207 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3208 ep_ctx = xhci_get_ep_ctx(xhci, config_cmd->in_ctx, ep_index);
3210 xhci_endpoint_copy(xhci, config_cmd->in_ctx,
3211 vdev->out_ctx, ep_index);
3212 xhci_setup_streams_ep_input_ctx(xhci, ep_ctx,
3213 vdev->eps[ep_index].stream_info);
3215 /* Tell the HW to drop its old copy of the endpoint context info
3216 * and add the updated copy from the input context.
3218 xhci_setup_input_ctx_for_config_ep(xhci, config_cmd->in_ctx,
3219 vdev->out_ctx, ctrl_ctx,
3220 changed_ep_bitmask, changed_ep_bitmask);
3222 /* Issue and wait for the configure endpoint command */
3223 ret = xhci_configure_endpoint(xhci, udev, config_cmd,
3226 /* xHC rejected the configure endpoint command for some reason, so we
3227 * leave the old ring intact and free our internal streams data
3233 spin_lock_irqsave(&xhci->lock, flags);
3234 for (i = 0; i < num_eps; i++) {
3235 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3236 vdev->eps[ep_index].ep_state &= ~EP_GETTING_STREAMS;
3237 xhci_dbg(xhci, "Slot %u ep ctx %u now has streams.\n",
3238 udev->slot_id, ep_index);
3239 vdev->eps[ep_index].ep_state |= EP_HAS_STREAMS;
3241 xhci_free_command(xhci, config_cmd);
3242 spin_unlock_irqrestore(&xhci->lock, flags);
3244 /* Subtract 1 for stream 0, which drivers can't use */
3245 return num_streams - 1;
3248 /* If it didn't work, free the streams! */
3249 for (i = 0; i < num_eps; i++) {
3250 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3251 xhci_free_stream_info(xhci, vdev->eps[ep_index].stream_info);
3252 vdev->eps[ep_index].stream_info = NULL;
3253 /* FIXME Unset maxPstreams in endpoint context and
3254 * update deq ptr to point to normal string ring.
3256 vdev->eps[ep_index].ep_state &= ~EP_GETTING_STREAMS;
3257 vdev->eps[ep_index].ep_state &= ~EP_HAS_STREAMS;
3258 xhci_endpoint_zero(xhci, vdev, eps[i]);
3260 xhci_free_command(xhci, config_cmd);
3264 /* Transition the endpoint from using streams to being a "normal" endpoint
3267 * Modify the endpoint context state, submit a configure endpoint command,
3268 * and free all endpoint rings for streams if that completes successfully.
3270 int xhci_free_streams(struct usb_hcd *hcd, struct usb_device *udev,
3271 struct usb_host_endpoint **eps, unsigned int num_eps,
3275 struct xhci_hcd *xhci;
3276 struct xhci_virt_device *vdev;
3277 struct xhci_command *command;
3278 struct xhci_input_control_ctx *ctrl_ctx;
3279 unsigned int ep_index;
3280 unsigned long flags;
3281 u32 changed_ep_bitmask;
3283 xhci = hcd_to_xhci(hcd);
3284 vdev = xhci->devs[udev->slot_id];
3286 /* Set up a configure endpoint command to remove the streams rings */
3287 spin_lock_irqsave(&xhci->lock, flags);
3288 changed_ep_bitmask = xhci_calculate_no_streams_bitmask(xhci,
3289 udev, eps, num_eps);
3290 if (changed_ep_bitmask == 0) {
3291 spin_unlock_irqrestore(&xhci->lock, flags);
3295 /* Use the xhci_command structure from the first endpoint. We may have
3296 * allocated too many, but the driver may call xhci_free_streams() for
3297 * each endpoint it grouped into one call to xhci_alloc_streams().
3299 ep_index = xhci_get_endpoint_index(&eps[0]->desc);
3300 command = vdev->eps[ep_index].stream_info->free_streams_command;
3301 ctrl_ctx = xhci_get_input_control_ctx(xhci, command->in_ctx);
3303 spin_unlock_irqrestore(&xhci->lock, flags);
3304 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
3309 for (i = 0; i < num_eps; i++) {
3310 struct xhci_ep_ctx *ep_ctx;
3312 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3313 ep_ctx = xhci_get_ep_ctx(xhci, command->in_ctx, ep_index);
3314 xhci->devs[udev->slot_id]->eps[ep_index].ep_state |=
3315 EP_GETTING_NO_STREAMS;
3317 xhci_endpoint_copy(xhci, command->in_ctx,
3318 vdev->out_ctx, ep_index);
3319 xhci_setup_no_streams_ep_input_ctx(xhci, ep_ctx,
3320 &vdev->eps[ep_index]);
3322 xhci_setup_input_ctx_for_config_ep(xhci, command->in_ctx,
3323 vdev->out_ctx, ctrl_ctx,
3324 changed_ep_bitmask, changed_ep_bitmask);
3325 spin_unlock_irqrestore(&xhci->lock, flags);
3327 /* Issue and wait for the configure endpoint command,
3328 * which must succeed.
3330 ret = xhci_configure_endpoint(xhci, udev, command,
3333 /* xHC rejected the configure endpoint command for some reason, so we
3334 * leave the streams rings intact.
3339 spin_lock_irqsave(&xhci->lock, flags);
3340 for (i = 0; i < num_eps; i++) {
3341 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3342 xhci_free_stream_info(xhci, vdev->eps[ep_index].stream_info);
3343 vdev->eps[ep_index].stream_info = NULL;
3344 /* FIXME Unset maxPstreams in endpoint context and
3345 * update deq ptr to point to normal string ring.
3347 vdev->eps[ep_index].ep_state &= ~EP_GETTING_NO_STREAMS;
3348 vdev->eps[ep_index].ep_state &= ~EP_HAS_STREAMS;
3350 spin_unlock_irqrestore(&xhci->lock, flags);
3356 * Deletes endpoint resources for endpoints that were active before a Reset
3357 * Device command, or a Disable Slot command. The Reset Device command leaves
3358 * the control endpoint intact, whereas the Disable Slot command deletes it.
3360 * Must be called with xhci->lock held.
3362 void xhci_free_device_endpoint_resources(struct xhci_hcd *xhci,
3363 struct xhci_virt_device *virt_dev, bool drop_control_ep)
3366 unsigned int num_dropped_eps = 0;
3367 unsigned int drop_flags = 0;
3369 for (i = (drop_control_ep ? 0 : 1); i < 31; i++) {
3370 if (virt_dev->eps[i].ring) {
3371 drop_flags |= 1 << i;
3375 xhci->num_active_eps -= num_dropped_eps;
3376 if (num_dropped_eps)
3377 xhci_dbg(xhci, "Dropped %u ep ctxs, flags = 0x%x, "
3379 num_dropped_eps, drop_flags,
3380 xhci->num_active_eps);
3384 * This submits a Reset Device Command, which will set the device state to 0,
3385 * set the device address to 0, and disable all the endpoints except the default
3386 * control endpoint. The USB core should come back and call
3387 * xhci_address_device(), and then re-set up the configuration. If this is
3388 * called because of a usb_reset_and_verify_device(), then the old alternate
3389 * settings will be re-installed through the normal bandwidth allocation
3392 * Wait for the Reset Device command to finish. Remove all structures
3393 * associated with the endpoints that were disabled. Clear the input device
3394 * structure? Cache the rings? Reset the control endpoint 0 max packet size?
3396 * If the virt_dev to be reset does not exist or does not match the udev,
3397 * it means the device is lost, possibly due to the xHC restore error and
3398 * re-initialization during S3/S4. In this case, call xhci_alloc_dev() to
3399 * re-allocate the device.
3401 int xhci_discover_or_reset_device(struct usb_hcd *hcd, struct usb_device *udev)
3404 unsigned long flags;
3405 struct xhci_hcd *xhci;
3406 unsigned int slot_id;
3407 struct xhci_virt_device *virt_dev;
3408 struct xhci_command *reset_device_cmd;
3410 int last_freed_endpoint;
3411 struct xhci_slot_ctx *slot_ctx;
3412 int old_active_eps = 0;
3414 ret = xhci_check_args(hcd, udev, NULL, 0, false, __func__);
3417 xhci = hcd_to_xhci(hcd);
3418 slot_id = udev->slot_id;
3419 virt_dev = xhci->devs[slot_id];
3421 xhci_dbg(xhci, "The device to be reset with slot ID %u does "
3422 "not exist. Re-allocate the device\n", slot_id);
3423 ret = xhci_alloc_dev(hcd, udev);
3430 if (virt_dev->udev != udev) {
3431 /* If the virt_dev and the udev does not match, this virt_dev
3432 * may belong to another udev.
3433 * Re-allocate the device.
3435 xhci_dbg(xhci, "The device to be reset with slot ID %u does "
3436 "not match the udev. Re-allocate the device\n",
3438 ret = xhci_alloc_dev(hcd, udev);
3445 /* If device is not setup, there is no point in resetting it */
3446 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->out_ctx);
3447 if (GET_SLOT_STATE(le32_to_cpu(slot_ctx->dev_state)) ==
3448 SLOT_STATE_DISABLED)
3451 xhci_dbg(xhci, "Resetting device with slot ID %u\n", slot_id);
3452 /* Allocate the command structure that holds the struct completion.
3453 * Assume we're in process context, since the normal device reset
3454 * process has to wait for the device anyway. Storage devices are
3455 * reset as part of error handling, so use GFP_NOIO instead of
3458 reset_device_cmd = xhci_alloc_command(xhci, false, true, GFP_NOIO);
3459 if (!reset_device_cmd) {
3460 xhci_dbg(xhci, "Couldn't allocate command structure.\n");
3464 /* Attempt to submit the Reset Device command to the command ring */
3465 spin_lock_irqsave(&xhci->lock, flags);
3466 reset_device_cmd->command_trb = xhci->cmd_ring->enqueue;
3468 /* Enqueue pointer can be left pointing to the link TRB,
3469 * we must handle that
3471 if (TRB_TYPE_LINK_LE32(reset_device_cmd->command_trb->link.control))
3472 reset_device_cmd->command_trb =
3473 xhci->cmd_ring->enq_seg->next->trbs;
3475 list_add_tail(&reset_device_cmd->cmd_list, &virt_dev->cmd_list);
3476 ret = xhci_queue_reset_device(xhci, slot_id);
3478 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
3479 list_del(&reset_device_cmd->cmd_list);
3480 spin_unlock_irqrestore(&xhci->lock, flags);
3481 goto command_cleanup;
3483 xhci_ring_cmd_db(xhci);
3484 spin_unlock_irqrestore(&xhci->lock, flags);
3486 /* Wait for the Reset Device command to finish */
3487 timeleft = wait_for_completion_interruptible_timeout(
3488 reset_device_cmd->completion,
3489 USB_CTRL_SET_TIMEOUT);
3490 if (timeleft <= 0) {
3491 xhci_warn(xhci, "%s while waiting for reset device command\n",
3492 timeleft == 0 ? "Timeout" : "Signal");
3493 spin_lock_irqsave(&xhci->lock, flags);
3494 /* The timeout might have raced with the event ring handler, so
3495 * only delete from the list if the item isn't poisoned.
3497 if (reset_device_cmd->cmd_list.next != LIST_POISON1)
3498 list_del(&reset_device_cmd->cmd_list);
3499 spin_unlock_irqrestore(&xhci->lock, flags);
3501 goto command_cleanup;
3504 /* The Reset Device command can't fail, according to the 0.95/0.96 spec,
3505 * unless we tried to reset a slot ID that wasn't enabled,
3506 * or the device wasn't in the addressed or configured state.
3508 ret = reset_device_cmd->status;
3510 case COMP_EBADSLT: /* 0.95 completion code for bad slot ID */
3511 case COMP_CTX_STATE: /* 0.96 completion code for same thing */
3512 xhci_info(xhci, "Can't reset device (slot ID %u) in %s state\n",
3514 xhci_get_slot_state(xhci, virt_dev->out_ctx));
3515 xhci_info(xhci, "Not freeing device rings.\n");
3516 /* Don't treat this as an error. May change my mind later. */
3518 goto command_cleanup;
3520 xhci_dbg(xhci, "Successful reset device command.\n");
3523 if (xhci_is_vendor_info_code(xhci, ret))
3525 xhci_warn(xhci, "Unknown completion code %u for "
3526 "reset device command.\n", ret);
3528 goto command_cleanup;
3531 /* Free up host controller endpoint resources */
3532 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) {
3533 spin_lock_irqsave(&xhci->lock, flags);
3534 /* Don't delete the default control endpoint resources */
3535 xhci_free_device_endpoint_resources(xhci, virt_dev, false);
3536 spin_unlock_irqrestore(&xhci->lock, flags);
3539 /* Everything but endpoint 0 is disabled, so free or cache the rings. */
3540 last_freed_endpoint = 1;
3541 for (i = 1; i < 31; ++i) {
3542 struct xhci_virt_ep *ep = &virt_dev->eps[i];
3544 if (ep->ep_state & EP_HAS_STREAMS) {
3545 xhci_free_stream_info(xhci, ep->stream_info);
3546 ep->stream_info = NULL;
3547 ep->ep_state &= ~EP_HAS_STREAMS;
3551 xhci_free_or_cache_endpoint_ring(xhci, virt_dev, i);
3552 last_freed_endpoint = i;
3554 if (!list_empty(&virt_dev->eps[i].bw_endpoint_list))
3555 xhci_drop_ep_from_interval_table(xhci,
3556 &virt_dev->eps[i].bw_info,
3561 xhci_clear_endpoint_bw_info(&virt_dev->eps[i].bw_info);
3563 /* If necessary, update the number of active TTs on this root port */
3564 xhci_update_tt_active_eps(xhci, virt_dev, old_active_eps);
3566 xhci_dbg(xhci, "Output context after successful reset device cmd:\n");
3567 xhci_dbg_ctx(xhci, virt_dev->out_ctx, last_freed_endpoint);
3571 xhci_free_command(xhci, reset_device_cmd);
3576 * At this point, the struct usb_device is about to go away, the device has
3577 * disconnected, and all traffic has been stopped and the endpoints have been
3578 * disabled. Free any HC data structures associated with that device.
3580 void xhci_free_dev(struct usb_hcd *hcd, struct usb_device *udev)
3582 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3583 struct xhci_virt_device *virt_dev;
3584 unsigned long flags;
3588 ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
3589 /* If the host is halted due to driver unload, we still need to free the
3592 if (ret <= 0 && ret != -ENODEV)
3595 virt_dev = xhci->devs[udev->slot_id];
3597 /* Stop any wayward timer functions (which may grab the lock) */
3598 for (i = 0; i < 31; ++i) {
3599 virt_dev->eps[i].ep_state &= ~EP_HALT_PENDING;
3600 del_timer_sync(&virt_dev->eps[i].stop_cmd_timer);
3603 if (udev->usb2_hw_lpm_enabled) {
3604 xhci_set_usb2_hardware_lpm(hcd, udev, 0);
3605 udev->usb2_hw_lpm_enabled = 0;
3608 spin_lock_irqsave(&xhci->lock, flags);
3609 /* Don't disable the slot if the host controller is dead. */
3610 state = xhci_readl(xhci, &xhci->op_regs->status);
3611 if (state == 0xffffffff || (xhci->xhc_state & XHCI_STATE_DYING) ||
3612 (xhci->xhc_state & XHCI_STATE_HALTED)) {
3613 xhci_free_virt_device(xhci, udev->slot_id);
3614 spin_unlock_irqrestore(&xhci->lock, flags);
3618 if (xhci_queue_slot_control(xhci, TRB_DISABLE_SLOT, udev->slot_id)) {
3619 spin_unlock_irqrestore(&xhci->lock, flags);
3620 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
3623 xhci_ring_cmd_db(xhci);
3624 spin_unlock_irqrestore(&xhci->lock, flags);
3626 * Event command completion handler will free any data structures
3627 * associated with the slot. XXX Can free sleep?
3632 * Checks if we have enough host controller resources for the default control
3635 * Must be called with xhci->lock held.
3637 static int xhci_reserve_host_control_ep_resources(struct xhci_hcd *xhci)
3639 if (xhci->num_active_eps + 1 > xhci->limit_active_eps) {
3640 xhci_dbg(xhci, "Not enough ep ctxs: "
3641 "%u active, need to add 1, limit is %u.\n",
3642 xhci->num_active_eps, xhci->limit_active_eps);
3645 xhci->num_active_eps += 1;
3646 xhci_dbg(xhci, "Adding 1 ep ctx, %u now active.\n",
3647 xhci->num_active_eps);
3653 * Returns 0 if the xHC ran out of device slots, the Enable Slot command
3654 * timed out, or allocating memory failed. Returns 1 on success.
3656 int xhci_alloc_dev(struct usb_hcd *hcd, struct usb_device *udev)
3658 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3659 unsigned long flags;
3662 union xhci_trb *cmd_trb;
3664 spin_lock_irqsave(&xhci->lock, flags);
3665 cmd_trb = xhci->cmd_ring->dequeue;
3666 ret = xhci_queue_slot_control(xhci, TRB_ENABLE_SLOT, 0);
3668 spin_unlock_irqrestore(&xhci->lock, flags);
3669 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
3672 xhci_ring_cmd_db(xhci);
3673 spin_unlock_irqrestore(&xhci->lock, flags);
3675 /* XXX: how much time for xHC slot assignment? */
3676 timeleft = wait_for_completion_interruptible_timeout(&xhci->addr_dev,
3677 XHCI_CMD_DEFAULT_TIMEOUT);
3678 if (timeleft <= 0) {
3679 xhci_warn(xhci, "%s while waiting for a slot\n",
3680 timeleft == 0 ? "Timeout" : "Signal");
3681 /* cancel the enable slot request */
3682 return xhci_cancel_cmd(xhci, NULL, cmd_trb);
3685 if (!xhci->slot_id) {
3686 xhci_err(xhci, "Error while assigning device slot ID\n");
3690 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) {
3691 spin_lock_irqsave(&xhci->lock, flags);
3692 ret = xhci_reserve_host_control_ep_resources(xhci);
3694 spin_unlock_irqrestore(&xhci->lock, flags);
3695 xhci_warn(xhci, "Not enough host resources, "
3696 "active endpoint contexts = %u\n",
3697 xhci->num_active_eps);
3700 spin_unlock_irqrestore(&xhci->lock, flags);
3702 /* Use GFP_NOIO, since this function can be called from
3703 * xhci_discover_or_reset_device(), which may be called as part of
3704 * mass storage driver error handling.
3706 if (!xhci_alloc_virt_device(xhci, xhci->slot_id, udev, GFP_NOIO)) {
3707 xhci_warn(xhci, "Could not allocate xHCI USB device data structures\n");
3710 udev->slot_id = xhci->slot_id;
3711 /* Is this a LS or FS device under a HS hub? */
3712 /* Hub or peripherial? */
3716 /* Disable slot, if we can do it without mem alloc */
3717 spin_lock_irqsave(&xhci->lock, flags);
3718 if (!xhci_queue_slot_control(xhci, TRB_DISABLE_SLOT, udev->slot_id))
3719 xhci_ring_cmd_db(xhci);
3720 spin_unlock_irqrestore(&xhci->lock, flags);
3725 * Issue an Address Device command (which will issue a SetAddress request to
3727 * We should be protected by the usb_address0_mutex in khubd's hub_port_init, so
3728 * we should only issue and wait on one address command at the same time.
3730 * We add one to the device address issued by the hardware because the USB core
3731 * uses address 1 for the root hubs (even though they're not really devices).
3733 int xhci_address_device(struct usb_hcd *hcd, struct usb_device *udev)
3735 unsigned long flags;
3737 struct xhci_virt_device *virt_dev;
3739 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3740 struct xhci_slot_ctx *slot_ctx;
3741 struct xhci_input_control_ctx *ctrl_ctx;
3743 union xhci_trb *cmd_trb;
3745 if (!udev->slot_id) {
3746 xhci_dbg(xhci, "Bad Slot ID %d\n", udev->slot_id);
3750 virt_dev = xhci->devs[udev->slot_id];
3752 if (WARN_ON(!virt_dev)) {
3754 * In plug/unplug torture test with an NEC controller,
3755 * a zero-dereference was observed once due to virt_dev = 0.
3756 * Print useful debug rather than crash if it is observed again!
3758 xhci_warn(xhci, "Virt dev invalid for slot_id 0x%x!\n",
3763 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
3764 ctrl_ctx = xhci_get_input_control_ctx(xhci, virt_dev->in_ctx);
3766 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
3771 * If this is the first Set Address since device plug-in or
3772 * virt_device realloaction after a resume with an xHCI power loss,
3773 * then set up the slot context.
3775 if (!slot_ctx->dev_info)
3776 xhci_setup_addressable_virt_dev(xhci, udev);
3777 /* Otherwise, update the control endpoint ring enqueue pointer. */
3779 xhci_copy_ep0_dequeue_into_input_ctx(xhci, udev);
3780 ctrl_ctx->add_flags = cpu_to_le32(SLOT_FLAG | EP0_FLAG);
3781 ctrl_ctx->drop_flags = 0;
3783 xhci_dbg(xhci, "Slot ID %d Input Context:\n", udev->slot_id);
3784 xhci_dbg_ctx(xhci, virt_dev->in_ctx, 2);
3786 spin_lock_irqsave(&xhci->lock, flags);
3787 cmd_trb = xhci->cmd_ring->dequeue;
3788 ret = xhci_queue_address_device(xhci, virt_dev->in_ctx->dma,
3791 spin_unlock_irqrestore(&xhci->lock, flags);
3792 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
3795 xhci_ring_cmd_db(xhci);
3796 spin_unlock_irqrestore(&xhci->lock, flags);
3798 /* ctrl tx can take up to 5 sec; XXX: need more time for xHC? */
3799 timeleft = wait_for_completion_interruptible_timeout(&xhci->addr_dev,
3800 XHCI_CMD_DEFAULT_TIMEOUT);
3801 /* FIXME: From section 4.3.4: "Software shall be responsible for timing
3802 * the SetAddress() "recovery interval" required by USB and aborting the
3803 * command on a timeout.
3805 if (timeleft <= 0) {
3806 xhci_warn(xhci, "%s while waiting for address device command\n",
3807 timeleft == 0 ? "Timeout" : "Signal");
3808 /* cancel the address device command */
3809 ret = xhci_cancel_cmd(xhci, NULL, cmd_trb);
3815 switch (virt_dev->cmd_status) {
3816 case COMP_CTX_STATE:
3818 xhci_err(xhci, "Setup ERROR: address device command for slot %d.\n",
3823 dev_warn(&udev->dev, "Device not responding to set address.\n");
3827 dev_warn(&udev->dev, "ERROR: Incompatible device for address "
3828 "device command.\n");
3832 xhci_dbg(xhci, "Successful Address Device command\n");
3835 xhci_err(xhci, "ERROR: unexpected command completion "
3836 "code 0x%x.\n", virt_dev->cmd_status);
3837 xhci_dbg(xhci, "Slot ID %d Output Context:\n", udev->slot_id);
3838 xhci_dbg_ctx(xhci, virt_dev->out_ctx, 2);
3845 temp_64 = xhci_read_64(xhci, &xhci->op_regs->dcbaa_ptr);
3846 xhci_dbg(xhci, "Op regs DCBAA ptr = %#016llx\n", temp_64);
3847 xhci_dbg(xhci, "Slot ID %d dcbaa entry @%p = %#016llx\n",
3849 &xhci->dcbaa->dev_context_ptrs[udev->slot_id],
3850 (unsigned long long)
3851 le64_to_cpu(xhci->dcbaa->dev_context_ptrs[udev->slot_id]));
3852 xhci_dbg(xhci, "Output Context DMA address = %#08llx\n",
3853 (unsigned long long)virt_dev->out_ctx->dma);
3854 xhci_dbg(xhci, "Slot ID %d Input Context:\n", udev->slot_id);
3855 xhci_dbg_ctx(xhci, virt_dev->in_ctx, 2);
3856 xhci_dbg(xhci, "Slot ID %d Output Context:\n", udev->slot_id);
3857 xhci_dbg_ctx(xhci, virt_dev->out_ctx, 2);
3859 * USB core uses address 1 for the roothubs, so we add one to the
3860 * address given back to us by the HC.
3862 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->out_ctx);
3863 /* Use kernel assigned address for devices; store xHC assigned
3864 * address locally. */
3865 virt_dev->address = (le32_to_cpu(slot_ctx->dev_state) & DEV_ADDR_MASK)
3867 /* Zero the input context control for later use */
3868 ctrl_ctx->add_flags = 0;
3869 ctrl_ctx->drop_flags = 0;
3871 xhci_dbg(xhci, "Internal device address = %d\n", virt_dev->address);
3877 * Transfer the port index into real index in the HW port status
3878 * registers. Caculate offset between the port's PORTSC register
3879 * and port status base. Divide the number of per port register
3880 * to get the real index. The raw port number bases 1.
3882 int xhci_find_raw_port_number(struct usb_hcd *hcd, int port1)
3884 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3885 __le32 __iomem *base_addr = &xhci->op_regs->port_status_base;
3886 __le32 __iomem *addr;
3889 if (hcd->speed != HCD_USB3)
3890 addr = xhci->usb2_ports[port1 - 1];
3892 addr = xhci->usb3_ports[port1 - 1];
3894 raw_port = (addr - base_addr)/NUM_PORT_REGS + 1;
3899 * Issue an Evaluate Context command to change the Maximum Exit Latency in the
3900 * slot context. If that succeeds, store the new MEL in the xhci_virt_device.
3902 static int __maybe_unused xhci_change_max_exit_latency(struct xhci_hcd *xhci,
3903 struct usb_device *udev, u16 max_exit_latency)
3905 struct xhci_virt_device *virt_dev;
3906 struct xhci_command *command;
3907 struct xhci_input_control_ctx *ctrl_ctx;
3908 struct xhci_slot_ctx *slot_ctx;
3909 unsigned long flags;
3912 spin_lock_irqsave(&xhci->lock, flags);
3913 if (max_exit_latency == xhci->devs[udev->slot_id]->current_mel) {
3914 spin_unlock_irqrestore(&xhci->lock, flags);
3918 /* Attempt to issue an Evaluate Context command to change the MEL. */
3919 virt_dev = xhci->devs[udev->slot_id];
3920 command = xhci->lpm_command;
3921 ctrl_ctx = xhci_get_input_control_ctx(xhci, command->in_ctx);
3923 spin_unlock_irqrestore(&xhci->lock, flags);
3924 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
3929 xhci_slot_copy(xhci, command->in_ctx, virt_dev->out_ctx);
3930 spin_unlock_irqrestore(&xhci->lock, flags);
3932 ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
3933 slot_ctx = xhci_get_slot_ctx(xhci, command->in_ctx);
3934 slot_ctx->dev_info2 &= cpu_to_le32(~((u32) MAX_EXIT));
3935 slot_ctx->dev_info2 |= cpu_to_le32(max_exit_latency);
3937 xhci_dbg(xhci, "Set up evaluate context for LPM MEL change.\n");
3938 xhci_dbg(xhci, "Slot %u Input Context:\n", udev->slot_id);
3939 xhci_dbg_ctx(xhci, command->in_ctx, 0);
3941 /* Issue and wait for the evaluate context command. */
3942 ret = xhci_configure_endpoint(xhci, udev, command,
3944 xhci_dbg(xhci, "Slot %u Output Context:\n", udev->slot_id);
3945 xhci_dbg_ctx(xhci, virt_dev->out_ctx, 0);
3948 spin_lock_irqsave(&xhci->lock, flags);
3949 virt_dev->current_mel = max_exit_latency;
3950 spin_unlock_irqrestore(&xhci->lock, flags);
3955 #ifdef CONFIG_PM_RUNTIME
3957 /* BESL to HIRD Encoding array for USB2 LPM */
3958 static int xhci_besl_encoding[16] = {125, 150, 200, 300, 400, 500, 1000, 2000,
3959 3000, 4000, 5000, 6000, 7000, 8000, 9000, 10000};
3961 /* Calculate HIRD/BESL for USB2 PORTPMSC*/
3962 static int xhci_calculate_hird_besl(struct xhci_hcd *xhci,
3963 struct usb_device *udev)
3965 int u2del, besl, besl_host;
3966 int besl_device = 0;
3969 u2del = HCS_U2_LATENCY(xhci->hcs_params3);
3970 field = le32_to_cpu(udev->bos->ext_cap->bmAttributes);
3972 if (field & USB_BESL_SUPPORT) {
3973 for (besl_host = 0; besl_host < 16; besl_host++) {
3974 if (xhci_besl_encoding[besl_host] >= u2del)
3977 /* Use baseline BESL value as default */
3978 if (field & USB_BESL_BASELINE_VALID)
3979 besl_device = USB_GET_BESL_BASELINE(field);
3980 else if (field & USB_BESL_DEEP_VALID)
3981 besl_device = USB_GET_BESL_DEEP(field);
3986 besl_host = (u2del - 51) / 75 + 1;
3989 besl = besl_host + besl_device;
3996 /* Calculate BESLD, L1 timeout and HIRDM for USB2 PORTHLPMC */
3997 static int xhci_calculate_usb2_hw_lpm_params(struct usb_device *udev)
4004 field = le32_to_cpu(udev->bos->ext_cap->bmAttributes);
4006 /* xHCI l1 is set in steps of 256us, xHCI 1.0 section 5.4.11.2 */
4007 l1 = udev->l1_params.timeout / 256;
4009 /* device has preferred BESLD */
4010 if (field & USB_BESL_DEEP_VALID) {
4011 besld = USB_GET_BESL_DEEP(field);
4015 return PORT_BESLD(besld) | PORT_L1_TIMEOUT(l1) | PORT_HIRDM(hirdm);
4018 static int xhci_usb2_software_lpm_test(struct usb_hcd *hcd,
4019 struct usb_device *udev)
4021 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
4022 struct dev_info *dev_info;
4023 __le32 __iomem **port_array;
4024 __le32 __iomem *addr, *pm_addr;
4026 unsigned int port_num;
4027 unsigned long flags;
4031 if (hcd->speed == HCD_USB3 || !xhci->sw_lpm_support ||
4035 /* we only support lpm for non-hub device connected to root hub yet */
4036 if (!udev->parent || udev->parent->parent ||
4037 udev->descriptor.bDeviceClass == USB_CLASS_HUB)
4040 spin_lock_irqsave(&xhci->lock, flags);
4042 /* Look for devices in lpm_failed_devs list */
4043 dev_id = le16_to_cpu(udev->descriptor.idVendor) << 16 |
4044 le16_to_cpu(udev->descriptor.idProduct);
4045 list_for_each_entry(dev_info, &xhci->lpm_failed_devs, list) {
4046 if (dev_info->dev_id == dev_id) {
4052 port_array = xhci->usb2_ports;
4053 port_num = udev->portnum - 1;
4055 if (port_num > HCS_MAX_PORTS(xhci->hcs_params1)) {
4056 xhci_dbg(xhci, "invalid port number %d\n", udev->portnum);
4062 * Test USB 2.0 software LPM.
4063 * FIXME: some xHCI 1.0 hosts may implement a new register to set up
4064 * hardware-controlled USB 2.0 LPM. See section 5.4.11 and 4.23.5.1.1.1
4065 * in the June 2011 errata release.
4067 xhci_dbg(xhci, "test port %d software LPM\n", port_num);
4069 * Set L1 Device Slot and HIRD/BESL.
4070 * Check device's USB 2.0 extension descriptor to determine whether
4071 * HIRD or BESL shoule be used. See USB2.0 LPM errata.
4073 pm_addr = port_array[port_num] + PORTPMSC;
4074 hird = xhci_calculate_hird_besl(xhci, udev);
4075 temp = PORT_L1DS(udev->slot_id) | PORT_HIRD(hird);
4076 xhci_writel(xhci, temp, pm_addr);
4078 /* Set port link state to U2(L1) */
4079 addr = port_array[port_num];
4080 xhci_set_link_state(xhci, port_array, port_num, XDEV_U2);
4083 spin_unlock_irqrestore(&xhci->lock, flags);
4085 spin_lock_irqsave(&xhci->lock, flags);
4087 /* Check L1 Status */
4088 ret = xhci_handshake(xhci, pm_addr,
4089 PORT_L1S_MASK, PORT_L1S_SUCCESS, 125);
4090 if (ret != -ETIMEDOUT) {
4091 /* enter L1 successfully */
4092 temp = xhci_readl(xhci, addr);
4093 xhci_dbg(xhci, "port %d entered L1 state, port status 0x%x\n",
4097 temp = xhci_readl(xhci, pm_addr);
4098 xhci_dbg(xhci, "port %d software lpm failed, L1 status %d\n",
4099 port_num, temp & PORT_L1S_MASK);
4103 /* Resume the port */
4104 xhci_set_link_state(xhci, port_array, port_num, XDEV_U0);
4106 spin_unlock_irqrestore(&xhci->lock, flags);
4108 spin_lock_irqsave(&xhci->lock, flags);
4111 xhci_test_and_clear_bit(xhci, port_array, port_num, PORT_PLC);
4113 /* Check PORTSC to make sure the device is in the right state */
4115 temp = xhci_readl(xhci, addr);
4116 xhci_dbg(xhci, "resumed port %d status 0x%x\n", port_num, temp);
4117 if (!(temp & PORT_CONNECT) || !(temp & PORT_PE) ||
4118 (temp & PORT_PLS_MASK) != XDEV_U0) {
4119 xhci_dbg(xhci, "port L1 resume fail\n");
4125 /* Insert dev to lpm_failed_devs list */
4126 xhci_warn(xhci, "device LPM test failed, may disconnect and "
4128 dev_info = kzalloc(sizeof(struct dev_info), GFP_ATOMIC);
4133 dev_info->dev_id = dev_id;
4134 INIT_LIST_HEAD(&dev_info->list);
4135 list_add(&dev_info->list, &xhci->lpm_failed_devs);
4137 xhci_ring_device(xhci, udev->slot_id);
4141 spin_unlock_irqrestore(&xhci->lock, flags);
4145 int xhci_set_usb2_hardware_lpm(struct usb_hcd *hcd,
4146 struct usb_device *udev, int enable)
4148 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
4149 __le32 __iomem **port_array;
4150 __le32 __iomem *pm_addr, *hlpm_addr;
4151 u32 pm_val, hlpm_val, field;
4152 unsigned int port_num;
4153 unsigned long flags;
4154 int hird, exit_latency;
4157 if (hcd->speed == HCD_USB3 || !xhci->hw_lpm_support ||
4161 if (!udev->parent || udev->parent->parent ||
4162 udev->descriptor.bDeviceClass == USB_CLASS_HUB)
4165 if (udev->usb2_hw_lpm_capable != 1)
4168 spin_lock_irqsave(&xhci->lock, flags);
4170 port_array = xhci->usb2_ports;
4171 port_num = udev->portnum - 1;
4172 pm_addr = port_array[port_num] + PORTPMSC;
4173 pm_val = xhci_readl(xhci, pm_addr);
4174 hlpm_addr = port_array[port_num] + PORTHLPMC;
4175 field = le32_to_cpu(udev->bos->ext_cap->bmAttributes);
4177 xhci_dbg(xhci, "%s port %d USB2 hardware LPM\n",
4178 enable ? "enable" : "disable", port_num);
4181 /* Host supports BESL timeout instead of HIRD */
4182 if (udev->usb2_hw_lpm_besl_capable) {
4183 /* if device doesn't have a preferred BESL value use a
4184 * default one which works with mixed HIRD and BESL
4185 * systems. See XHCI_DEFAULT_BESL definition in xhci.h
4187 if ((field & USB_BESL_SUPPORT) &&
4188 (field & USB_BESL_BASELINE_VALID))
4189 hird = USB_GET_BESL_BASELINE(field);
4191 hird = udev->l1_params.besl;
4193 exit_latency = xhci_besl_encoding[hird];
4194 spin_unlock_irqrestore(&xhci->lock, flags);
4196 /* USB 3.0 code dedicate one xhci->lpm_command->in_ctx
4197 * input context for link powermanagement evaluate
4198 * context commands. It is protected by hcd->bandwidth
4199 * mutex and is shared by all devices. We need to set
4200 * the max ext latency in USB 2 BESL LPM as well, so
4201 * use the same mutex and xhci_change_max_exit_latency()
4203 mutex_lock(hcd->bandwidth_mutex);
4204 ret = xhci_change_max_exit_latency(xhci, udev,
4206 mutex_unlock(hcd->bandwidth_mutex);
4210 spin_lock_irqsave(&xhci->lock, flags);
4212 hlpm_val = xhci_calculate_usb2_hw_lpm_params(udev);
4213 xhci_writel(xhci, hlpm_val, hlpm_addr);
4215 xhci_readl(xhci, hlpm_addr);
4217 hird = xhci_calculate_hird_besl(xhci, udev);
4220 pm_val &= ~PORT_HIRD_MASK;
4221 pm_val |= PORT_HIRD(hird) | PORT_RWE;
4222 xhci_writel(xhci, pm_val, pm_addr);
4223 pm_val = xhci_readl(xhci, pm_addr);
4225 xhci_writel(xhci, pm_val, pm_addr);
4227 xhci_readl(xhci, pm_addr);
4229 pm_val &= ~(PORT_HLE | PORT_RWE | PORT_HIRD_MASK);
4230 xhci_writel(xhci, pm_val, pm_addr);
4232 xhci_readl(xhci, pm_addr);
4233 if (udev->usb2_hw_lpm_besl_capable) {
4234 spin_unlock_irqrestore(&xhci->lock, flags);
4235 mutex_lock(hcd->bandwidth_mutex);
4236 xhci_change_max_exit_latency(xhci, udev, 0);
4237 mutex_unlock(hcd->bandwidth_mutex);
4242 spin_unlock_irqrestore(&xhci->lock, flags);
4246 /* check if a usb2 port supports a given extened capability protocol
4247 * only USB2 ports extended protocol capability values are cached.
4248 * Return 1 if capability is supported
4250 static int xhci_check_usb2_port_capability(struct xhci_hcd *xhci, int port,
4251 unsigned capability)
4253 u32 port_offset, port_count;
4256 for (i = 0; i < xhci->num_ext_caps; i++) {
4257 if (xhci->ext_caps[i] & capability) {
4258 /* port offsets starts at 1 */
4259 port_offset = XHCI_EXT_PORT_OFF(xhci->ext_caps[i]) - 1;
4260 port_count = XHCI_EXT_PORT_COUNT(xhci->ext_caps[i]);
4261 if (port >= port_offset &&
4262 port < port_offset + port_count)
4269 int xhci_update_device(struct usb_hcd *hcd, struct usb_device *udev)
4271 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
4273 int portnum = udev->portnum - 1;
4275 ret = xhci_usb2_software_lpm_test(hcd, udev);
4277 xhci_dbg(xhci, "software LPM test succeed\n");
4278 if (xhci->hw_lpm_support == 1 &&
4279 xhci_check_usb2_port_capability(xhci, portnum, XHCI_HLC)) {
4280 udev->usb2_hw_lpm_capable = 1;
4281 udev->l1_params.timeout = XHCI_L1_TIMEOUT;
4282 udev->l1_params.besl = XHCI_DEFAULT_BESL;
4283 if (xhci_check_usb2_port_capability(xhci, portnum,
4285 udev->usb2_hw_lpm_besl_capable = 1;
4286 ret = xhci_set_usb2_hardware_lpm(hcd, udev, 1);
4288 udev->usb2_hw_lpm_enabled = 1;
4297 int xhci_set_usb2_hardware_lpm(struct usb_hcd *hcd,
4298 struct usb_device *udev, int enable)
4303 int xhci_update_device(struct usb_hcd *hcd, struct usb_device *udev)
4308 #endif /* CONFIG_PM_RUNTIME */
4310 /*---------------------- USB 3.0 Link PM functions ------------------------*/
4313 /* Service interval in nanoseconds = 2^(bInterval - 1) * 125us * 1000ns / 1us */
4314 static unsigned long long xhci_service_interval_to_ns(
4315 struct usb_endpoint_descriptor *desc)
4317 return (1ULL << (desc->bInterval - 1)) * 125 * 1000;
4320 static u16 xhci_get_timeout_no_hub_lpm(struct usb_device *udev,
4321 enum usb3_link_state state)
4323 unsigned long long sel;
4324 unsigned long long pel;
4325 unsigned int max_sel_pel;
4330 /* Convert SEL and PEL stored in nanoseconds to microseconds */
4331 sel = DIV_ROUND_UP(udev->u1_params.sel, 1000);
4332 pel = DIV_ROUND_UP(udev->u1_params.pel, 1000);
4333 max_sel_pel = USB3_LPM_MAX_U1_SEL_PEL;
4337 sel = DIV_ROUND_UP(udev->u2_params.sel, 1000);
4338 pel = DIV_ROUND_UP(udev->u2_params.pel, 1000);
4339 max_sel_pel = USB3_LPM_MAX_U2_SEL_PEL;
4343 dev_warn(&udev->dev, "%s: Can't get timeout for non-U1 or U2 state.\n",
4345 return USB3_LPM_DISABLED;
4348 if (sel <= max_sel_pel && pel <= max_sel_pel)
4349 return USB3_LPM_DEVICE_INITIATED;
4351 if (sel > max_sel_pel)
4352 dev_dbg(&udev->dev, "Device-initiated %s disabled "
4353 "due to long SEL %llu ms\n",
4356 dev_dbg(&udev->dev, "Device-initiated %s disabled "
4357 "due to long PEL %llu\n ms",
4359 return USB3_LPM_DISABLED;
4362 /* Returns the hub-encoded U1 timeout value.
4363 * The U1 timeout should be the maximum of the following values:
4364 * - For control endpoints, U1 system exit latency (SEL) * 3
4365 * - For bulk endpoints, U1 SEL * 5
4366 * - For interrupt endpoints:
4367 * - Notification EPs, U1 SEL * 3
4368 * - Periodic EPs, max(105% of bInterval, U1 SEL * 2)
4369 * - For isochronous endpoints, max(105% of bInterval, U1 SEL * 2)
4371 static u16 xhci_calculate_intel_u1_timeout(struct usb_device *udev,
4372 struct usb_endpoint_descriptor *desc)
4374 unsigned long long timeout_ns;
4378 ep_type = usb_endpoint_type(desc);
4380 case USB_ENDPOINT_XFER_CONTROL:
4381 timeout_ns = udev->u1_params.sel * 3;
4383 case USB_ENDPOINT_XFER_BULK:
4384 timeout_ns = udev->u1_params.sel * 5;
4386 case USB_ENDPOINT_XFER_INT:
4387 intr_type = usb_endpoint_interrupt_type(desc);
4388 if (intr_type == USB_ENDPOINT_INTR_NOTIFICATION) {
4389 timeout_ns = udev->u1_params.sel * 3;
4392 /* Otherwise the calculation is the same as isoc eps */
4393 case USB_ENDPOINT_XFER_ISOC:
4394 timeout_ns = xhci_service_interval_to_ns(desc);
4395 timeout_ns = DIV_ROUND_UP_ULL(timeout_ns * 105, 100);
4396 if (timeout_ns < udev->u1_params.sel * 2)
4397 timeout_ns = udev->u1_params.sel * 2;
4403 /* The U1 timeout is encoded in 1us intervals. */
4404 timeout_ns = DIV_ROUND_UP_ULL(timeout_ns, 1000);
4405 /* Don't return a timeout of zero, because that's USB3_LPM_DISABLED. */
4406 if (timeout_ns == USB3_LPM_DISABLED)
4409 /* If the necessary timeout value is bigger than what we can set in the
4410 * USB 3.0 hub, we have to disable hub-initiated U1.
4412 if (timeout_ns <= USB3_LPM_U1_MAX_TIMEOUT)
4414 dev_dbg(&udev->dev, "Hub-initiated U1 disabled "
4415 "due to long timeout %llu ms\n", timeout_ns);
4416 return xhci_get_timeout_no_hub_lpm(udev, USB3_LPM_U1);
4419 /* Returns the hub-encoded U2 timeout value.
4420 * The U2 timeout should be the maximum of:
4421 * - 10 ms (to avoid the bandwidth impact on the scheduler)
4422 * - largest bInterval of any active periodic endpoint (to avoid going
4423 * into lower power link states between intervals).
4424 * - the U2 Exit Latency of the device
4426 static u16 xhci_calculate_intel_u2_timeout(struct usb_device *udev,
4427 struct usb_endpoint_descriptor *desc)
4429 unsigned long long timeout_ns;
4430 unsigned long long u2_del_ns;
4432 timeout_ns = 10 * 1000 * 1000;
4434 if ((usb_endpoint_xfer_int(desc) || usb_endpoint_xfer_isoc(desc)) &&
4435 (xhci_service_interval_to_ns(desc) > timeout_ns))
4436 timeout_ns = xhci_service_interval_to_ns(desc);
4438 u2_del_ns = le16_to_cpu(udev->bos->ss_cap->bU2DevExitLat) * 1000ULL;
4439 if (u2_del_ns > timeout_ns)
4440 timeout_ns = u2_del_ns;
4442 /* The U2 timeout is encoded in 256us intervals */
4443 timeout_ns = DIV_ROUND_UP_ULL(timeout_ns, 256 * 1000);
4444 /* If the necessary timeout value is bigger than what we can set in the
4445 * USB 3.0 hub, we have to disable hub-initiated U2.
4447 if (timeout_ns <= USB3_LPM_U2_MAX_TIMEOUT)
4449 dev_dbg(&udev->dev, "Hub-initiated U2 disabled "
4450 "due to long timeout %llu ms\n", timeout_ns);
4451 return xhci_get_timeout_no_hub_lpm(udev, USB3_LPM_U2);
4454 static u16 xhci_call_host_update_timeout_for_endpoint(struct xhci_hcd *xhci,
4455 struct usb_device *udev,
4456 struct usb_endpoint_descriptor *desc,
4457 enum usb3_link_state state,
4460 if (state == USB3_LPM_U1) {
4461 if (xhci->quirks & XHCI_INTEL_HOST)
4462 return xhci_calculate_intel_u1_timeout(udev, desc);
4464 if (xhci->quirks & XHCI_INTEL_HOST)
4465 return xhci_calculate_intel_u2_timeout(udev, desc);
4468 return USB3_LPM_DISABLED;
4471 static int xhci_update_timeout_for_endpoint(struct xhci_hcd *xhci,
4472 struct usb_device *udev,
4473 struct usb_endpoint_descriptor *desc,
4474 enum usb3_link_state state,
4479 alt_timeout = xhci_call_host_update_timeout_for_endpoint(xhci, udev,
4480 desc, state, timeout);
4482 /* If we found we can't enable hub-initiated LPM, or
4483 * the U1 or U2 exit latency was too high to allow
4484 * device-initiated LPM as well, just stop searching.
4486 if (alt_timeout == USB3_LPM_DISABLED ||
4487 alt_timeout == USB3_LPM_DEVICE_INITIATED) {
4488 *timeout = alt_timeout;
4491 if (alt_timeout > *timeout)
4492 *timeout = alt_timeout;
4496 static int xhci_update_timeout_for_interface(struct xhci_hcd *xhci,
4497 struct usb_device *udev,
4498 struct usb_host_interface *alt,
4499 enum usb3_link_state state,
4504 for (j = 0; j < alt->desc.bNumEndpoints; j++) {
4505 if (xhci_update_timeout_for_endpoint(xhci, udev,
4506 &alt->endpoint[j].desc, state, timeout))
4513 static int xhci_check_intel_tier_policy(struct usb_device *udev,
4514 enum usb3_link_state state)
4516 struct usb_device *parent;
4517 unsigned int num_hubs;
4519 if (state == USB3_LPM_U2)
4522 /* Don't enable U1 if the device is on a 2nd tier hub or lower. */
4523 for (parent = udev->parent, num_hubs = 0; parent->parent;
4524 parent = parent->parent)
4530 dev_dbg(&udev->dev, "Disabling U1 link state for device"
4531 " below second-tier hub.\n");
4532 dev_dbg(&udev->dev, "Plug device into first-tier hub "
4533 "to decrease power consumption.\n");
4537 static int xhci_check_tier_policy(struct xhci_hcd *xhci,
4538 struct usb_device *udev,
4539 enum usb3_link_state state)
4541 if (xhci->quirks & XHCI_INTEL_HOST)
4542 return xhci_check_intel_tier_policy(udev, state);
4546 /* Returns the U1 or U2 timeout that should be enabled.
4547 * If the tier check or timeout setting functions return with a non-zero exit
4548 * code, that means the timeout value has been finalized and we shouldn't look
4549 * at any more endpoints.
4551 static u16 xhci_calculate_lpm_timeout(struct usb_hcd *hcd,
4552 struct usb_device *udev, enum usb3_link_state state)
4554 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
4555 struct usb_host_config *config;
4558 u16 timeout = USB3_LPM_DISABLED;
4560 if (state == USB3_LPM_U1)
4562 else if (state == USB3_LPM_U2)
4565 dev_warn(&udev->dev, "Can't enable unknown link state %i\n",
4570 if (xhci_check_tier_policy(xhci, udev, state) < 0)
4573 /* Gather some information about the currently installed configuration
4574 * and alternate interface settings.
4576 if (xhci_update_timeout_for_endpoint(xhci, udev, &udev->ep0.desc,
4580 config = udev->actconfig;
4584 for (i = 0; i < USB_MAXINTERFACES; i++) {
4585 struct usb_driver *driver;
4586 struct usb_interface *intf = config->interface[i];
4591 /* Check if any currently bound drivers want hub-initiated LPM
4594 if (intf->dev.driver) {
4595 driver = to_usb_driver(intf->dev.driver);
4596 if (driver && driver->disable_hub_initiated_lpm) {
4597 dev_dbg(&udev->dev, "Hub-initiated %s disabled "
4598 "at request of driver %s\n",
4599 state_name, driver->name);
4600 return xhci_get_timeout_no_hub_lpm(udev, state);
4604 /* Not sure how this could happen... */
4605 if (!intf->cur_altsetting)
4608 if (xhci_update_timeout_for_interface(xhci, udev,
4609 intf->cur_altsetting,
4616 static int calculate_max_exit_latency(struct usb_device *udev,
4617 enum usb3_link_state state_changed,
4618 u16 hub_encoded_timeout)
4620 unsigned long long u1_mel_us = 0;
4621 unsigned long long u2_mel_us = 0;
4622 unsigned long long mel_us = 0;
4628 disabling_u1 = (state_changed == USB3_LPM_U1 &&
4629 hub_encoded_timeout == USB3_LPM_DISABLED);
4630 disabling_u2 = (state_changed == USB3_LPM_U2 &&
4631 hub_encoded_timeout == USB3_LPM_DISABLED);
4633 enabling_u1 = (state_changed == USB3_LPM_U1 &&
4634 hub_encoded_timeout != USB3_LPM_DISABLED);
4635 enabling_u2 = (state_changed == USB3_LPM_U2 &&
4636 hub_encoded_timeout != USB3_LPM_DISABLED);
4638 /* If U1 was already enabled and we're not disabling it,
4639 * or we're going to enable U1, account for the U1 max exit latency.
4641 if ((udev->u1_params.timeout != USB3_LPM_DISABLED && !disabling_u1) ||
4643 u1_mel_us = DIV_ROUND_UP(udev->u1_params.mel, 1000);
4644 if ((udev->u2_params.timeout != USB3_LPM_DISABLED && !disabling_u2) ||
4646 u2_mel_us = DIV_ROUND_UP(udev->u2_params.mel, 1000);
4648 if (u1_mel_us > u2_mel_us)
4652 /* xHCI host controller max exit latency field is only 16 bits wide. */
4653 if (mel_us > MAX_EXIT) {
4654 dev_warn(&udev->dev, "Link PM max exit latency of %lluus "
4655 "is too big.\n", mel_us);
4661 /* Returns the USB3 hub-encoded value for the U1/U2 timeout. */
4662 int xhci_enable_usb3_lpm_timeout(struct usb_hcd *hcd,
4663 struct usb_device *udev, enum usb3_link_state state)
4665 struct xhci_hcd *xhci;
4666 u16 hub_encoded_timeout;
4670 xhci = hcd_to_xhci(hcd);
4671 /* The LPM timeout values are pretty host-controller specific, so don't
4672 * enable hub-initiated timeouts unless the vendor has provided
4673 * information about their timeout algorithm.
4675 if (!xhci || !(xhci->quirks & XHCI_LPM_SUPPORT) ||
4676 !xhci->devs[udev->slot_id])
4677 return USB3_LPM_DISABLED;
4679 hub_encoded_timeout = xhci_calculate_lpm_timeout(hcd, udev, state);
4680 mel = calculate_max_exit_latency(udev, state, hub_encoded_timeout);
4682 /* Max Exit Latency is too big, disable LPM. */
4683 hub_encoded_timeout = USB3_LPM_DISABLED;
4687 ret = xhci_change_max_exit_latency(xhci, udev, mel);
4690 return hub_encoded_timeout;
4693 int xhci_disable_usb3_lpm_timeout(struct usb_hcd *hcd,
4694 struct usb_device *udev, enum usb3_link_state state)
4696 struct xhci_hcd *xhci;
4700 xhci = hcd_to_xhci(hcd);
4701 if (!xhci || !(xhci->quirks & XHCI_LPM_SUPPORT) ||
4702 !xhci->devs[udev->slot_id])
4705 mel = calculate_max_exit_latency(udev, state, USB3_LPM_DISABLED);
4706 ret = xhci_change_max_exit_latency(xhci, udev, mel);
4711 #else /* CONFIG_PM */
4713 int xhci_enable_usb3_lpm_timeout(struct usb_hcd *hcd,
4714 struct usb_device *udev, enum usb3_link_state state)
4716 return USB3_LPM_DISABLED;
4719 int xhci_disable_usb3_lpm_timeout(struct usb_hcd *hcd,
4720 struct usb_device *udev, enum usb3_link_state state)
4724 #endif /* CONFIG_PM */
4726 /*-------------------------------------------------------------------------*/
4728 /* Once a hub descriptor is fetched for a device, we need to update the xHC's
4729 * internal data structures for the device.
4731 int xhci_update_hub_device(struct usb_hcd *hcd, struct usb_device *hdev,
4732 struct usb_tt *tt, gfp_t mem_flags)
4734 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
4735 struct xhci_virt_device *vdev;
4736 struct xhci_command *config_cmd;
4737 struct xhci_input_control_ctx *ctrl_ctx;
4738 struct xhci_slot_ctx *slot_ctx;
4739 unsigned long flags;
4740 unsigned think_time;
4743 /* Ignore root hubs */
4747 vdev = xhci->devs[hdev->slot_id];
4749 xhci_warn(xhci, "Cannot update hub desc for unknown device.\n");
4752 config_cmd = xhci_alloc_command(xhci, true, true, mem_flags);
4754 xhci_dbg(xhci, "Could not allocate xHCI command structure.\n");
4757 ctrl_ctx = xhci_get_input_control_ctx(xhci, config_cmd->in_ctx);
4759 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
4761 xhci_free_command(xhci, config_cmd);
4765 spin_lock_irqsave(&xhci->lock, flags);
4766 if (hdev->speed == USB_SPEED_HIGH &&
4767 xhci_alloc_tt_info(xhci, vdev, hdev, tt, GFP_ATOMIC)) {
4768 xhci_dbg(xhci, "Could not allocate xHCI TT structure.\n");
4769 xhci_free_command(xhci, config_cmd);
4770 spin_unlock_irqrestore(&xhci->lock, flags);
4774 xhci_slot_copy(xhci, config_cmd->in_ctx, vdev->out_ctx);
4775 ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
4776 slot_ctx = xhci_get_slot_ctx(xhci, config_cmd->in_ctx);
4777 slot_ctx->dev_info |= cpu_to_le32(DEV_HUB);
4779 slot_ctx->dev_info |= cpu_to_le32(DEV_MTT);
4780 if (xhci->hci_version > 0x95) {
4781 xhci_dbg(xhci, "xHCI version %x needs hub "
4782 "TT think time and number of ports\n",
4783 (unsigned int) xhci->hci_version);
4784 slot_ctx->dev_info2 |= cpu_to_le32(XHCI_MAX_PORTS(hdev->maxchild));
4785 /* Set TT think time - convert from ns to FS bit times.
4786 * 0 = 8 FS bit times, 1 = 16 FS bit times,
4787 * 2 = 24 FS bit times, 3 = 32 FS bit times.
4789 * xHCI 1.0: this field shall be 0 if the device is not a
4792 think_time = tt->think_time;
4793 if (think_time != 0)
4794 think_time = (think_time / 666) - 1;
4795 if (xhci->hci_version < 0x100 || hdev->speed == USB_SPEED_HIGH)
4796 slot_ctx->tt_info |=
4797 cpu_to_le32(TT_THINK_TIME(think_time));
4799 xhci_dbg(xhci, "xHCI version %x doesn't need hub "
4800 "TT think time or number of ports\n",
4801 (unsigned int) xhci->hci_version);
4803 slot_ctx->dev_state = 0;
4804 spin_unlock_irqrestore(&xhci->lock, flags);
4806 xhci_dbg(xhci, "Set up %s for hub device.\n",
4807 (xhci->hci_version > 0x95) ?
4808 "configure endpoint" : "evaluate context");
4809 xhci_dbg(xhci, "Slot %u Input Context:\n", hdev->slot_id);
4810 xhci_dbg_ctx(xhci, config_cmd->in_ctx, 0);
4812 /* Issue and wait for the configure endpoint or
4813 * evaluate context command.
4815 if (xhci->hci_version > 0x95)
4816 ret = xhci_configure_endpoint(xhci, hdev, config_cmd,
4819 ret = xhci_configure_endpoint(xhci, hdev, config_cmd,
4822 xhci_dbg(xhci, "Slot %u Output Context:\n", hdev->slot_id);
4823 xhci_dbg_ctx(xhci, vdev->out_ctx, 0);
4825 xhci_free_command(xhci, config_cmd);
4829 int xhci_get_frame(struct usb_hcd *hcd)
4831 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
4832 /* EHCI mods by the periodic size. Why? */
4833 return xhci_readl(xhci, &xhci->run_regs->microframe_index) >> 3;
4836 int xhci_gen_setup(struct usb_hcd *hcd, xhci_get_quirks_t get_quirks)
4838 struct xhci_hcd *xhci;
4839 struct device *dev = hcd->self.controller;
4843 /* Accept arbitrarily long scatter-gather lists */
4844 hcd->self.sg_tablesize = ~0;
4845 /* XHCI controllers don't stop the ep queue on short packets :| */
4846 hcd->self.no_stop_on_short = 1;
4848 if (usb_hcd_is_primary_hcd(hcd)) {
4849 xhci = kzalloc(sizeof(struct xhci_hcd), GFP_KERNEL);
4852 *((struct xhci_hcd **) hcd->hcd_priv) = xhci;
4853 xhci->main_hcd = hcd;
4854 /* Mark the first roothub as being USB 2.0.
4855 * The xHCI driver will register the USB 3.0 roothub.
4857 hcd->speed = HCD_USB2;
4858 hcd->self.root_hub->speed = USB_SPEED_HIGH;
4860 * USB 2.0 roothub under xHCI has an integrated TT,
4861 * (rate matching hub) as opposed to having an OHCI/UHCI
4862 * companion controller.
4866 /* xHCI private pointer was set in xhci_pci_probe for the second
4867 * registered roothub.
4869 xhci = hcd_to_xhci(hcd);
4870 temp = xhci_readl(xhci, &xhci->cap_regs->hcc_params);
4871 if (HCC_64BIT_ADDR(temp)) {
4872 xhci_dbg(xhci, "Enabling 64-bit DMA addresses.\n");
4873 dma_set_mask(hcd->self.controller, DMA_BIT_MASK(64));
4875 dma_set_mask(hcd->self.controller, DMA_BIT_MASK(32));
4880 xhci->cap_regs = hcd->regs;
4881 xhci->op_regs = hcd->regs +
4882 HC_LENGTH(xhci_readl(xhci, &xhci->cap_regs->hc_capbase));
4883 xhci->run_regs = hcd->regs +
4884 (xhci_readl(xhci, &xhci->cap_regs->run_regs_off) & RTSOFF_MASK);
4885 /* Cache read-only capability registers */
4886 xhci->hcs_params1 = xhci_readl(xhci, &xhci->cap_regs->hcs_params1);
4887 xhci->hcs_params2 = xhci_readl(xhci, &xhci->cap_regs->hcs_params2);
4888 xhci->hcs_params3 = xhci_readl(xhci, &xhci->cap_regs->hcs_params3);
4889 xhci->hcc_params = xhci_readl(xhci, &xhci->cap_regs->hc_capbase);
4890 xhci->hci_version = HC_VERSION(xhci->hcc_params);
4891 xhci->hcc_params = xhci_readl(xhci, &xhci->cap_regs->hcc_params);
4892 xhci_print_registers(xhci);
4894 get_quirks(dev, xhci);
4896 /* In xhci controllers which follow xhci 1.0 spec gives a spurious
4897 * success event after a short transfer. This quirk will ignore such
4900 if (xhci->hci_version > 0x96)
4901 xhci->quirks |= XHCI_SPURIOUS_SUCCESS;
4903 /* Make sure the HC is halted. */
4904 retval = xhci_halt(xhci);
4908 xhci_dbg(xhci, "Resetting HCD\n");
4909 /* Reset the internal HC memory state and registers. */
4910 retval = xhci_reset(xhci);
4913 xhci_dbg(xhci, "Reset complete\n");
4915 temp = xhci_readl(xhci, &xhci->cap_regs->hcc_params);
4916 if (HCC_64BIT_ADDR(temp)) {
4917 xhci_dbg(xhci, "Enabling 64-bit DMA addresses.\n");
4918 dma_set_mask(hcd->self.controller, DMA_BIT_MASK(64));
4920 dma_set_mask(hcd->self.controller, DMA_BIT_MASK(32));
4923 xhci_dbg(xhci, "Calling HCD init\n");
4924 /* Initialize HCD and host controller data structures. */
4925 retval = xhci_init(hcd);
4928 xhci_dbg(xhci, "Called HCD init\n");
4935 MODULE_DESCRIPTION(DRIVER_DESC);
4936 MODULE_AUTHOR(DRIVER_AUTHOR);
4937 MODULE_LICENSE("GPL");
4939 static int __init xhci_hcd_init(void)
4943 retval = xhci_register_pci();
4945 printk(KERN_DEBUG "Problem registering PCI driver.");
4948 retval = xhci_register_plat();
4950 printk(KERN_DEBUG "Problem registering platform driver.");
4954 * Check the compiler generated sizes of structures that must be laid
4955 * out in specific ways for hardware access.
4957 BUILD_BUG_ON(sizeof(struct xhci_doorbell_array) != 256*32/8);
4958 BUILD_BUG_ON(sizeof(struct xhci_slot_ctx) != 8*32/8);
4959 BUILD_BUG_ON(sizeof(struct xhci_ep_ctx) != 8*32/8);
4960 /* xhci_device_control has eight fields, and also
4961 * embeds one xhci_slot_ctx and 31 xhci_ep_ctx
4963 BUILD_BUG_ON(sizeof(struct xhci_stream_ctx) != 4*32/8);
4964 BUILD_BUG_ON(sizeof(union xhci_trb) != 4*32/8);
4965 BUILD_BUG_ON(sizeof(struct xhci_erst_entry) != 4*32/8);
4966 BUILD_BUG_ON(sizeof(struct xhci_cap_regs) != 7*32/8);
4967 BUILD_BUG_ON(sizeof(struct xhci_intr_reg) != 8*32/8);
4968 /* xhci_run_regs has eight fields and embeds 128 xhci_intr_regs */
4969 BUILD_BUG_ON(sizeof(struct xhci_run_regs) != (8+8*128)*32/8);
4972 xhci_unregister_pci();
4975 module_init(xhci_hcd_init);
4977 static void __exit xhci_hcd_cleanup(void)
4979 xhci_unregister_pci();
4980 xhci_unregister_plat();
4982 module_exit(xhci_hcd_cleanup);