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xhci: add traces for debug messages in xhci_address_device()
[karo-tx-linux.git] / drivers / usb / host / xhci.c
1 /*
2  * xHCI host controller driver
3  *
4  * Copyright (C) 2008 Intel Corp.
5  *
6  * Author: Sarah Sharp
7  * Some code borrowed from the Linux EHCI driver.
8  *
9  * This program is free software; you can redistribute it and/or modify
10  * it under the terms of the GNU General Public License version 2 as
11  * published by the Free Software Foundation.
12  *
13  * This program is distributed in the hope that it will be useful, but
14  * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15  * or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
16  * for more details.
17  *
18  * You should have received a copy of the GNU General Public License
19  * along with this program; if not, write to the Free Software Foundation,
20  * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21  */
22
23 #include <linux/pci.h>
24 #include <linux/irq.h>
25 #include <linux/log2.h>
26 #include <linux/module.h>
27 #include <linux/moduleparam.h>
28 #include <linux/slab.h>
29 #include <linux/dmi.h>
30
31 #include "xhci.h"
32 #include "xhci-trace.h"
33
34 #define DRIVER_AUTHOR "Sarah Sharp"
35 #define DRIVER_DESC "'eXtensible' Host Controller (xHC) Driver"
36
37 /* Some 0.95 hardware can't handle the chain bit on a Link TRB being cleared */
38 static int link_quirk;
39 module_param(link_quirk, int, S_IRUGO | S_IWUSR);
40 MODULE_PARM_DESC(link_quirk, "Don't clear the chain bit on a link TRB");
41
42 /* TODO: copied from ehci-hcd.c - can this be refactored? */
43 /*
44  * xhci_handshake - spin reading hc until handshake completes or fails
45  * @ptr: address of hc register to be read
46  * @mask: bits to look at in result of read
47  * @done: value of those bits when handshake succeeds
48  * @usec: timeout in microseconds
49  *
50  * Returns negative errno, or zero on success
51  *
52  * Success happens when the "mask" bits have the specified value (hardware
53  * handshake done).  There are two failure modes:  "usec" have passed (major
54  * hardware flakeout), or the register reads as all-ones (hardware removed).
55  */
56 int xhci_handshake(struct xhci_hcd *xhci, void __iomem *ptr,
57                       u32 mask, u32 done, int usec)
58 {
59         u32     result;
60
61         do {
62                 result = xhci_readl(xhci, ptr);
63                 if (result == ~(u32)0)          /* card removed */
64                         return -ENODEV;
65                 result &= mask;
66                 if (result == done)
67                         return 0;
68                 udelay(1);
69                 usec--;
70         } while (usec > 0);
71         return -ETIMEDOUT;
72 }
73
74 /*
75  * Disable interrupts and begin the xHCI halting process.
76  */
77 void xhci_quiesce(struct xhci_hcd *xhci)
78 {
79         u32 halted;
80         u32 cmd;
81         u32 mask;
82
83         mask = ~(XHCI_IRQS);
84         halted = xhci_readl(xhci, &xhci->op_regs->status) & STS_HALT;
85         if (!halted)
86                 mask &= ~CMD_RUN;
87
88         cmd = xhci_readl(xhci, &xhci->op_regs->command);
89         cmd &= mask;
90         xhci_writel(xhci, cmd, &xhci->op_regs->command);
91 }
92
93 /*
94  * Force HC into halt state.
95  *
96  * Disable any IRQs and clear the run/stop bit.
97  * HC will complete any current and actively pipelined transactions, and
98  * should halt within 16 ms of the run/stop bit being cleared.
99  * Read HC Halted bit in the status register to see when the HC is finished.
100  */
101 int xhci_halt(struct xhci_hcd *xhci)
102 {
103         int ret;
104         xhci_dbg(xhci, "// Halt the HC\n");
105         xhci_quiesce(xhci);
106
107         ret = xhci_handshake(xhci, &xhci->op_regs->status,
108                         STS_HALT, STS_HALT, XHCI_MAX_HALT_USEC);
109         if (!ret) {
110                 xhci->xhc_state |= XHCI_STATE_HALTED;
111                 xhci->cmd_ring_state = CMD_RING_STATE_STOPPED;
112         } else
113                 xhci_warn(xhci, "Host not halted after %u microseconds.\n",
114                                 XHCI_MAX_HALT_USEC);
115         return ret;
116 }
117
118 /*
119  * Set the run bit and wait for the host to be running.
120  */
121 static int xhci_start(struct xhci_hcd *xhci)
122 {
123         u32 temp;
124         int ret;
125
126         temp = xhci_readl(xhci, &xhci->op_regs->command);
127         temp |= (CMD_RUN);
128         xhci_dbg(xhci, "// Turn on HC, cmd = 0x%x.\n",
129                         temp);
130         xhci_writel(xhci, temp, &xhci->op_regs->command);
131
132         /*
133          * Wait for the HCHalted Status bit to be 0 to indicate the host is
134          * running.
135          */
136         ret = xhci_handshake(xhci, &xhci->op_regs->status,
137                         STS_HALT, 0, XHCI_MAX_HALT_USEC);
138         if (ret == -ETIMEDOUT)
139                 xhci_err(xhci, "Host took too long to start, "
140                                 "waited %u microseconds.\n",
141                                 XHCI_MAX_HALT_USEC);
142         if (!ret)
143                 xhci->xhc_state &= ~XHCI_STATE_HALTED;
144         return ret;
145 }
146
147 /*
148  * Reset a halted HC.
149  *
150  * This resets pipelines, timers, counters, state machines, etc.
151  * Transactions will be terminated immediately, and operational registers
152  * will be set to their defaults.
153  */
154 int xhci_reset(struct xhci_hcd *xhci)
155 {
156         u32 command;
157         u32 state;
158         int ret, i;
159
160         state = xhci_readl(xhci, &xhci->op_regs->status);
161         if ((state & STS_HALT) == 0) {
162                 xhci_warn(xhci, "Host controller not halted, aborting reset.\n");
163                 return 0;
164         }
165
166         xhci_dbg(xhci, "// Reset the HC\n");
167         command = xhci_readl(xhci, &xhci->op_regs->command);
168         command |= CMD_RESET;
169         xhci_writel(xhci, command, &xhci->op_regs->command);
170
171         ret = xhci_handshake(xhci, &xhci->op_regs->command,
172                         CMD_RESET, 0, 10 * 1000 * 1000);
173         if (ret)
174                 return ret;
175
176         xhci_dbg(xhci, "Wait for controller to be ready for doorbell rings\n");
177         /*
178          * xHCI cannot write to any doorbells or operational registers other
179          * than status until the "Controller Not Ready" flag is cleared.
180          */
181         ret = xhci_handshake(xhci, &xhci->op_regs->status,
182                         STS_CNR, 0, 10 * 1000 * 1000);
183
184         for (i = 0; i < 2; ++i) {
185                 xhci->bus_state[i].port_c_suspend = 0;
186                 xhci->bus_state[i].suspended_ports = 0;
187                 xhci->bus_state[i].resuming_ports = 0;
188         }
189
190         return ret;
191 }
192
193 #ifdef CONFIG_PCI
194 static int xhci_free_msi(struct xhci_hcd *xhci)
195 {
196         int i;
197
198         if (!xhci->msix_entries)
199                 return -EINVAL;
200
201         for (i = 0; i < xhci->msix_count; i++)
202                 if (xhci->msix_entries[i].vector)
203                         free_irq(xhci->msix_entries[i].vector,
204                                         xhci_to_hcd(xhci));
205         return 0;
206 }
207
208 /*
209  * Set up MSI
210  */
211 static int xhci_setup_msi(struct xhci_hcd *xhci)
212 {
213         int ret;
214         struct pci_dev  *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
215
216         ret = pci_enable_msi(pdev);
217         if (ret) {
218                 xhci_dbg(xhci, "failed to allocate MSI entry\n");
219                 return ret;
220         }
221
222         ret = request_irq(pdev->irq, xhci_msi_irq,
223                                 0, "xhci_hcd", xhci_to_hcd(xhci));
224         if (ret) {
225                 xhci_dbg(xhci, "disable MSI interrupt\n");
226                 pci_disable_msi(pdev);
227         }
228
229         return ret;
230 }
231
232 /*
233  * Free IRQs
234  * free all IRQs request
235  */
236 static void xhci_free_irq(struct xhci_hcd *xhci)
237 {
238         struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
239         int ret;
240
241         /* return if using legacy interrupt */
242         if (xhci_to_hcd(xhci)->irq > 0)
243                 return;
244
245         ret = xhci_free_msi(xhci);
246         if (!ret)
247                 return;
248         if (pdev->irq > 0)
249                 free_irq(pdev->irq, xhci_to_hcd(xhci));
250
251         return;
252 }
253
254 /*
255  * Set up MSI-X
256  */
257 static int xhci_setup_msix(struct xhci_hcd *xhci)
258 {
259         int i, ret = 0;
260         struct usb_hcd *hcd = xhci_to_hcd(xhci);
261         struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
262
263         /*
264          * calculate number of msi-x vectors supported.
265          * - HCS_MAX_INTRS: the max number of interrupts the host can handle,
266          *   with max number of interrupters based on the xhci HCSPARAMS1.
267          * - num_online_cpus: maximum msi-x vectors per CPUs core.
268          *   Add additional 1 vector to ensure always available interrupt.
269          */
270         xhci->msix_count = min(num_online_cpus() + 1,
271                                 HCS_MAX_INTRS(xhci->hcs_params1));
272
273         xhci->msix_entries =
274                 kmalloc((sizeof(struct msix_entry))*xhci->msix_count,
275                                 GFP_KERNEL);
276         if (!xhci->msix_entries) {
277                 xhci_err(xhci, "Failed to allocate MSI-X entries\n");
278                 return -ENOMEM;
279         }
280
281         for (i = 0; i < xhci->msix_count; i++) {
282                 xhci->msix_entries[i].entry = i;
283                 xhci->msix_entries[i].vector = 0;
284         }
285
286         ret = pci_enable_msix(pdev, xhci->msix_entries, xhci->msix_count);
287         if (ret) {
288                 xhci_dbg(xhci, "Failed to enable MSI-X\n");
289                 goto free_entries;
290         }
291
292         for (i = 0; i < xhci->msix_count; i++) {
293                 ret = request_irq(xhci->msix_entries[i].vector,
294                                 xhci_msi_irq,
295                                 0, "xhci_hcd", xhci_to_hcd(xhci));
296                 if (ret)
297                         goto disable_msix;
298         }
299
300         hcd->msix_enabled = 1;
301         return ret;
302
303 disable_msix:
304         xhci_dbg(xhci, "disable MSI-X interrupt\n");
305         xhci_free_irq(xhci);
306         pci_disable_msix(pdev);
307 free_entries:
308         kfree(xhci->msix_entries);
309         xhci->msix_entries = NULL;
310         return ret;
311 }
312
313 /* Free any IRQs and disable MSI-X */
314 static void xhci_cleanup_msix(struct xhci_hcd *xhci)
315 {
316         struct usb_hcd *hcd = xhci_to_hcd(xhci);
317         struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
318
319         xhci_free_irq(xhci);
320
321         if (xhci->msix_entries) {
322                 pci_disable_msix(pdev);
323                 kfree(xhci->msix_entries);
324                 xhci->msix_entries = NULL;
325         } else {
326                 pci_disable_msi(pdev);
327         }
328
329         hcd->msix_enabled = 0;
330         return;
331 }
332
333 static void __maybe_unused xhci_msix_sync_irqs(struct xhci_hcd *xhci)
334 {
335         int i;
336
337         if (xhci->msix_entries) {
338                 for (i = 0; i < xhci->msix_count; i++)
339                         synchronize_irq(xhci->msix_entries[i].vector);
340         }
341 }
342
343 static int xhci_try_enable_msi(struct usb_hcd *hcd)
344 {
345         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
346         struct pci_dev  *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
347         int ret;
348
349         /*
350          * Some Fresco Logic host controllers advertise MSI, but fail to
351          * generate interrupts.  Don't even try to enable MSI.
352          */
353         if (xhci->quirks & XHCI_BROKEN_MSI)
354                 goto legacy_irq;
355
356         /* unregister the legacy interrupt */
357         if (hcd->irq)
358                 free_irq(hcd->irq, hcd);
359         hcd->irq = 0;
360
361         ret = xhci_setup_msix(xhci);
362         if (ret)
363                 /* fall back to msi*/
364                 ret = xhci_setup_msi(xhci);
365
366         if (!ret)
367                 /* hcd->irq is 0, we have MSI */
368                 return 0;
369
370         if (!pdev->irq) {
371                 xhci_err(xhci, "No msi-x/msi found and no IRQ in BIOS\n");
372                 return -EINVAL;
373         }
374
375  legacy_irq:
376         /* fall back to legacy interrupt*/
377         ret = request_irq(pdev->irq, &usb_hcd_irq, IRQF_SHARED,
378                         hcd->irq_descr, hcd);
379         if (ret) {
380                 xhci_err(xhci, "request interrupt %d failed\n",
381                                 pdev->irq);
382                 return ret;
383         }
384         hcd->irq = pdev->irq;
385         return 0;
386 }
387
388 #else
389
390 static int xhci_try_enable_msi(struct usb_hcd *hcd)
391 {
392         return 0;
393 }
394
395 static void xhci_cleanup_msix(struct xhci_hcd *xhci)
396 {
397 }
398
399 static void xhci_msix_sync_irqs(struct xhci_hcd *xhci)
400 {
401 }
402
403 #endif
404
405 static void compliance_mode_recovery(unsigned long arg)
406 {
407         struct xhci_hcd *xhci;
408         struct usb_hcd *hcd;
409         u32 temp;
410         int i;
411
412         xhci = (struct xhci_hcd *)arg;
413
414         for (i = 0; i < xhci->num_usb3_ports; i++) {
415                 temp = xhci_readl(xhci, xhci->usb3_ports[i]);
416                 if ((temp & PORT_PLS_MASK) == USB_SS_PORT_LS_COMP_MOD) {
417                         /*
418                          * Compliance Mode Detected. Letting USB Core
419                          * handle the Warm Reset
420                          */
421                         xhci_dbg(xhci, "Compliance mode detected->port %d\n",
422                                         i + 1);
423                         xhci_dbg(xhci, "Attempting compliance mode recovery\n");
424                         hcd = xhci->shared_hcd;
425
426                         if (hcd->state == HC_STATE_SUSPENDED)
427                                 usb_hcd_resume_root_hub(hcd);
428
429                         usb_hcd_poll_rh_status(hcd);
430                 }
431         }
432
433         if (xhci->port_status_u0 != ((1 << xhci->num_usb3_ports)-1))
434                 mod_timer(&xhci->comp_mode_recovery_timer,
435                         jiffies + msecs_to_jiffies(COMP_MODE_RCVRY_MSECS));
436 }
437
438 /*
439  * Quirk to work around issue generated by the SN65LVPE502CP USB3.0 re-driver
440  * that causes ports behind that hardware to enter compliance mode sometimes.
441  * The quirk creates a timer that polls every 2 seconds the link state of
442  * each host controller's port and recovers it by issuing a Warm reset
443  * if Compliance mode is detected, otherwise the port will become "dead" (no
444  * device connections or disconnections will be detected anymore). Becasue no
445  * status event is generated when entering compliance mode (per xhci spec),
446  * this quirk is needed on systems that have the failing hardware installed.
447  */
448 static void compliance_mode_recovery_timer_init(struct xhci_hcd *xhci)
449 {
450         xhci->port_status_u0 = 0;
451         init_timer(&xhci->comp_mode_recovery_timer);
452
453         xhci->comp_mode_recovery_timer.data = (unsigned long) xhci;
454         xhci->comp_mode_recovery_timer.function = compliance_mode_recovery;
455         xhci->comp_mode_recovery_timer.expires = jiffies +
456                         msecs_to_jiffies(COMP_MODE_RCVRY_MSECS);
457
458         set_timer_slack(&xhci->comp_mode_recovery_timer,
459                         msecs_to_jiffies(COMP_MODE_RCVRY_MSECS));
460         add_timer(&xhci->comp_mode_recovery_timer);
461         xhci_dbg(xhci, "Compliance mode recovery timer initialized\n");
462 }
463
464 /*
465  * This function identifies the systems that have installed the SN65LVPE502CP
466  * USB3.0 re-driver and that need the Compliance Mode Quirk.
467  * Systems:
468  * Vendor: Hewlett-Packard -> System Models: Z420, Z620 and Z820
469  */
470 bool xhci_compliance_mode_recovery_timer_quirk_check(void)
471 {
472         const char *dmi_product_name, *dmi_sys_vendor;
473
474         dmi_product_name = dmi_get_system_info(DMI_PRODUCT_NAME);
475         dmi_sys_vendor = dmi_get_system_info(DMI_SYS_VENDOR);
476         if (!dmi_product_name || !dmi_sys_vendor)
477                 return false;
478
479         if (!(strstr(dmi_sys_vendor, "Hewlett-Packard")))
480                 return false;
481
482         if (strstr(dmi_product_name, "Z420") ||
483                         strstr(dmi_product_name, "Z620") ||
484                         strstr(dmi_product_name, "Z820") ||
485                         strstr(dmi_product_name, "Z1 Workstation"))
486                 return true;
487
488         return false;
489 }
490
491 static int xhci_all_ports_seen_u0(struct xhci_hcd *xhci)
492 {
493         return (xhci->port_status_u0 == ((1 << xhci->num_usb3_ports)-1));
494 }
495
496
497 /*
498  * Initialize memory for HCD and xHC (one-time init).
499  *
500  * Program the PAGESIZE register, initialize the device context array, create
501  * device contexts (?), set up a command ring segment (or two?), create event
502  * ring (one for now).
503  */
504 int xhci_init(struct usb_hcd *hcd)
505 {
506         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
507         int retval = 0;
508
509         xhci_dbg(xhci, "xhci_init\n");
510         spin_lock_init(&xhci->lock);
511         if (xhci->hci_version == 0x95 && link_quirk) {
512                 xhci_dbg(xhci, "QUIRK: Not clearing Link TRB chain bits.\n");
513                 xhci->quirks |= XHCI_LINK_TRB_QUIRK;
514         } else {
515                 xhci_dbg(xhci, "xHCI doesn't need link TRB QUIRK\n");
516         }
517         retval = xhci_mem_init(xhci, GFP_KERNEL);
518         xhci_dbg(xhci, "Finished xhci_init\n");
519
520         /* Initializing Compliance Mode Recovery Data If Needed */
521         if (xhci_compliance_mode_recovery_timer_quirk_check()) {
522                 xhci->quirks |= XHCI_COMP_MODE_QUIRK;
523                 compliance_mode_recovery_timer_init(xhci);
524         }
525
526         return retval;
527 }
528
529 /*-------------------------------------------------------------------------*/
530
531
532 static int xhci_run_finished(struct xhci_hcd *xhci)
533 {
534         if (xhci_start(xhci)) {
535                 xhci_halt(xhci);
536                 return -ENODEV;
537         }
538         xhci->shared_hcd->state = HC_STATE_RUNNING;
539         xhci->cmd_ring_state = CMD_RING_STATE_RUNNING;
540
541         if (xhci->quirks & XHCI_NEC_HOST)
542                 xhci_ring_cmd_db(xhci);
543
544         xhci_dbg(xhci, "Finished xhci_run for USB3 roothub\n");
545         return 0;
546 }
547
548 /*
549  * Start the HC after it was halted.
550  *
551  * This function is called by the USB core when the HC driver is added.
552  * Its opposite is xhci_stop().
553  *
554  * xhci_init() must be called once before this function can be called.
555  * Reset the HC, enable device slot contexts, program DCBAAP, and
556  * set command ring pointer and event ring pointer.
557  *
558  * Setup MSI-X vectors and enable interrupts.
559  */
560 int xhci_run(struct usb_hcd *hcd)
561 {
562         u32 temp;
563         u64 temp_64;
564         int ret;
565         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
566
567         /* Start the xHCI host controller running only after the USB 2.0 roothub
568          * is setup.
569          */
570
571         hcd->uses_new_polling = 1;
572         if (!usb_hcd_is_primary_hcd(hcd))
573                 return xhci_run_finished(xhci);
574
575         xhci_dbg(xhci, "xhci_run\n");
576
577         ret = xhci_try_enable_msi(hcd);
578         if (ret)
579                 return ret;
580
581         xhci_dbg(xhci, "Command ring memory map follows:\n");
582         xhci_debug_ring(xhci, xhci->cmd_ring);
583         xhci_dbg_ring_ptrs(xhci, xhci->cmd_ring);
584         xhci_dbg_cmd_ptrs(xhci);
585
586         xhci_dbg(xhci, "ERST memory map follows:\n");
587         xhci_dbg_erst(xhci, &xhci->erst);
588         xhci_dbg(xhci, "Event ring:\n");
589         xhci_debug_ring(xhci, xhci->event_ring);
590         xhci_dbg_ring_ptrs(xhci, xhci->event_ring);
591         temp_64 = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
592         temp_64 &= ~ERST_PTR_MASK;
593         xhci_dbg(xhci, "ERST deq = 64'h%0lx\n", (long unsigned int) temp_64);
594
595         xhci_dbg(xhci, "// Set the interrupt modulation register\n");
596         temp = xhci_readl(xhci, &xhci->ir_set->irq_control);
597         temp &= ~ER_IRQ_INTERVAL_MASK;
598         temp |= (u32) 160;
599         xhci_writel(xhci, temp, &xhci->ir_set->irq_control);
600
601         /* Set the HCD state before we enable the irqs */
602         temp = xhci_readl(xhci, &xhci->op_regs->command);
603         temp |= (CMD_EIE);
604         xhci_dbg(xhci, "// Enable interrupts, cmd = 0x%x.\n",
605                         temp);
606         xhci_writel(xhci, temp, &xhci->op_regs->command);
607
608         temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
609         xhci_dbg(xhci, "// Enabling event ring interrupter %p by writing 0x%x to irq_pending\n",
610                         xhci->ir_set, (unsigned int) ER_IRQ_ENABLE(temp));
611         xhci_writel(xhci, ER_IRQ_ENABLE(temp),
612                         &xhci->ir_set->irq_pending);
613         xhci_print_ir_set(xhci, 0);
614
615         if (xhci->quirks & XHCI_NEC_HOST)
616                 xhci_queue_vendor_command(xhci, 0, 0, 0,
617                                 TRB_TYPE(TRB_NEC_GET_FW));
618
619         xhci_dbg(xhci, "Finished xhci_run for USB2 roothub\n");
620         return 0;
621 }
622
623 static void xhci_only_stop_hcd(struct usb_hcd *hcd)
624 {
625         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
626
627         spin_lock_irq(&xhci->lock);
628         xhci_halt(xhci);
629
630         /* The shared_hcd is going to be deallocated shortly (the USB core only
631          * calls this function when allocation fails in usb_add_hcd(), or
632          * usb_remove_hcd() is called).  So we need to unset xHCI's pointer.
633          */
634         xhci->shared_hcd = NULL;
635         spin_unlock_irq(&xhci->lock);
636 }
637
638 /*
639  * Stop xHCI driver.
640  *
641  * This function is called by the USB core when the HC driver is removed.
642  * Its opposite is xhci_run().
643  *
644  * Disable device contexts, disable IRQs, and quiesce the HC.
645  * Reset the HC, finish any completed transactions, and cleanup memory.
646  */
647 void xhci_stop(struct usb_hcd *hcd)
648 {
649         u32 temp;
650         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
651
652         if (!usb_hcd_is_primary_hcd(hcd)) {
653                 xhci_only_stop_hcd(xhci->shared_hcd);
654                 return;
655         }
656
657         spin_lock_irq(&xhci->lock);
658         /* Make sure the xHC is halted for a USB3 roothub
659          * (xhci_stop() could be called as part of failed init).
660          */
661         xhci_halt(xhci);
662         xhci_reset(xhci);
663         spin_unlock_irq(&xhci->lock);
664
665         xhci_cleanup_msix(xhci);
666
667         /* Deleting Compliance Mode Recovery Timer */
668         if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) &&
669                         (!(xhci_all_ports_seen_u0(xhci)))) {
670                 del_timer_sync(&xhci->comp_mode_recovery_timer);
671                 xhci_dbg(xhci, "%s: compliance mode recovery timer deleted\n",
672                                 __func__);
673         }
674
675         if (xhci->quirks & XHCI_AMD_PLL_FIX)
676                 usb_amd_dev_put();
677
678         xhci_dbg(xhci, "// Disabling event ring interrupts\n");
679         temp = xhci_readl(xhci, &xhci->op_regs->status);
680         xhci_writel(xhci, temp & ~STS_EINT, &xhci->op_regs->status);
681         temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
682         xhci_writel(xhci, ER_IRQ_DISABLE(temp),
683                         &xhci->ir_set->irq_pending);
684         xhci_print_ir_set(xhci, 0);
685
686         xhci_dbg(xhci, "cleaning up memory\n");
687         xhci_mem_cleanup(xhci);
688         xhci_dbg(xhci, "xhci_stop completed - status = %x\n",
689                     xhci_readl(xhci, &xhci->op_regs->status));
690 }
691
692 /*
693  * Shutdown HC (not bus-specific)
694  *
695  * This is called when the machine is rebooting or halting.  We assume that the
696  * machine will be powered off, and the HC's internal state will be reset.
697  * Don't bother to free memory.
698  *
699  * This will only ever be called with the main usb_hcd (the USB3 roothub).
700  */
701 void xhci_shutdown(struct usb_hcd *hcd)
702 {
703         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
704
705         if (xhci->quirks & XHCI_SPURIOUS_REBOOT)
706                 usb_disable_xhci_ports(to_pci_dev(hcd->self.controller));
707
708         spin_lock_irq(&xhci->lock);
709         xhci_halt(xhci);
710         spin_unlock_irq(&xhci->lock);
711
712         xhci_cleanup_msix(xhci);
713
714         xhci_dbg(xhci, "xhci_shutdown completed - status = %x\n",
715                     xhci_readl(xhci, &xhci->op_regs->status));
716 }
717
718 #ifdef CONFIG_PM
719 static void xhci_save_registers(struct xhci_hcd *xhci)
720 {
721         xhci->s3.command = xhci_readl(xhci, &xhci->op_regs->command);
722         xhci->s3.dev_nt = xhci_readl(xhci, &xhci->op_regs->dev_notification);
723         xhci->s3.dcbaa_ptr = xhci_read_64(xhci, &xhci->op_regs->dcbaa_ptr);
724         xhci->s3.config_reg = xhci_readl(xhci, &xhci->op_regs->config_reg);
725         xhci->s3.erst_size = xhci_readl(xhci, &xhci->ir_set->erst_size);
726         xhci->s3.erst_base = xhci_read_64(xhci, &xhci->ir_set->erst_base);
727         xhci->s3.erst_dequeue = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
728         xhci->s3.irq_pending = xhci_readl(xhci, &xhci->ir_set->irq_pending);
729         xhci->s3.irq_control = xhci_readl(xhci, &xhci->ir_set->irq_control);
730 }
731
732 static void xhci_restore_registers(struct xhci_hcd *xhci)
733 {
734         xhci_writel(xhci, xhci->s3.command, &xhci->op_regs->command);
735         xhci_writel(xhci, xhci->s3.dev_nt, &xhci->op_regs->dev_notification);
736         xhci_write_64(xhci, xhci->s3.dcbaa_ptr, &xhci->op_regs->dcbaa_ptr);
737         xhci_writel(xhci, xhci->s3.config_reg, &xhci->op_regs->config_reg);
738         xhci_writel(xhci, xhci->s3.erst_size, &xhci->ir_set->erst_size);
739         xhci_write_64(xhci, xhci->s3.erst_base, &xhci->ir_set->erst_base);
740         xhci_write_64(xhci, xhci->s3.erst_dequeue, &xhci->ir_set->erst_dequeue);
741         xhci_writel(xhci, xhci->s3.irq_pending, &xhci->ir_set->irq_pending);
742         xhci_writel(xhci, xhci->s3.irq_control, &xhci->ir_set->irq_control);
743 }
744
745 static void xhci_set_cmd_ring_deq(struct xhci_hcd *xhci)
746 {
747         u64     val_64;
748
749         /* step 2: initialize command ring buffer */
750         val_64 = xhci_read_64(xhci, &xhci->op_regs->cmd_ring);
751         val_64 = (val_64 & (u64) CMD_RING_RSVD_BITS) |
752                 (xhci_trb_virt_to_dma(xhci->cmd_ring->deq_seg,
753                                       xhci->cmd_ring->dequeue) &
754                  (u64) ~CMD_RING_RSVD_BITS) |
755                 xhci->cmd_ring->cycle_state;
756         xhci_dbg(xhci, "// Setting command ring address to 0x%llx\n",
757                         (long unsigned long) val_64);
758         xhci_write_64(xhci, val_64, &xhci->op_regs->cmd_ring);
759 }
760
761 /*
762  * The whole command ring must be cleared to zero when we suspend the host.
763  *
764  * The host doesn't save the command ring pointer in the suspend well, so we
765  * need to re-program it on resume.  Unfortunately, the pointer must be 64-byte
766  * aligned, because of the reserved bits in the command ring dequeue pointer
767  * register.  Therefore, we can't just set the dequeue pointer back in the
768  * middle of the ring (TRBs are 16-byte aligned).
769  */
770 static void xhci_clear_command_ring(struct xhci_hcd *xhci)
771 {
772         struct xhci_ring *ring;
773         struct xhci_segment *seg;
774
775         ring = xhci->cmd_ring;
776         seg = ring->deq_seg;
777         do {
778                 memset(seg->trbs, 0,
779                         sizeof(union xhci_trb) * (TRBS_PER_SEGMENT - 1));
780                 seg->trbs[TRBS_PER_SEGMENT - 1].link.control &=
781                         cpu_to_le32(~TRB_CYCLE);
782                 seg = seg->next;
783         } while (seg != ring->deq_seg);
784
785         /* Reset the software enqueue and dequeue pointers */
786         ring->deq_seg = ring->first_seg;
787         ring->dequeue = ring->first_seg->trbs;
788         ring->enq_seg = ring->deq_seg;
789         ring->enqueue = ring->dequeue;
790
791         ring->num_trbs_free = ring->num_segs * (TRBS_PER_SEGMENT - 1) - 1;
792         /*
793          * Ring is now zeroed, so the HW should look for change of ownership
794          * when the cycle bit is set to 1.
795          */
796         ring->cycle_state = 1;
797
798         /*
799          * Reset the hardware dequeue pointer.
800          * Yes, this will need to be re-written after resume, but we're paranoid
801          * and want to make sure the hardware doesn't access bogus memory
802          * because, say, the BIOS or an SMI started the host without changing
803          * the command ring pointers.
804          */
805         xhci_set_cmd_ring_deq(xhci);
806 }
807
808 /*
809  * Stop HC (not bus-specific)
810  *
811  * This is called when the machine transition into S3/S4 mode.
812  *
813  */
814 int xhci_suspend(struct xhci_hcd *xhci)
815 {
816         int                     rc = 0;
817         struct usb_hcd          *hcd = xhci_to_hcd(xhci);
818         u32                     command;
819
820         if (hcd->state != HC_STATE_SUSPENDED ||
821                         xhci->shared_hcd->state != HC_STATE_SUSPENDED)
822                 return -EINVAL;
823
824         /* Don't poll the roothubs on bus suspend. */
825         xhci_dbg(xhci, "%s: stopping port polling.\n", __func__);
826         clear_bit(HCD_FLAG_POLL_RH, &hcd->flags);
827         del_timer_sync(&hcd->rh_timer);
828
829         spin_lock_irq(&xhci->lock);
830         clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
831         clear_bit(HCD_FLAG_HW_ACCESSIBLE, &xhci->shared_hcd->flags);
832         /* step 1: stop endpoint */
833         /* skipped assuming that port suspend has done */
834
835         /* step 2: clear Run/Stop bit */
836         command = xhci_readl(xhci, &xhci->op_regs->command);
837         command &= ~CMD_RUN;
838         xhci_writel(xhci, command, &xhci->op_regs->command);
839         if (xhci_handshake(xhci, &xhci->op_regs->status,
840                       STS_HALT, STS_HALT, XHCI_MAX_HALT_USEC)) {
841                 xhci_warn(xhci, "WARN: xHC CMD_RUN timeout\n");
842                 spin_unlock_irq(&xhci->lock);
843                 return -ETIMEDOUT;
844         }
845         xhci_clear_command_ring(xhci);
846
847         /* step 3: save registers */
848         xhci_save_registers(xhci);
849
850         /* step 4: set CSS flag */
851         command = xhci_readl(xhci, &xhci->op_regs->command);
852         command |= CMD_CSS;
853         xhci_writel(xhci, command, &xhci->op_regs->command);
854         if (xhci_handshake(xhci, &xhci->op_regs->status,
855                                 STS_SAVE, 0, 10 * 1000)) {
856                 xhci_warn(xhci, "WARN: xHC save state timeout\n");
857                 spin_unlock_irq(&xhci->lock);
858                 return -ETIMEDOUT;
859         }
860         spin_unlock_irq(&xhci->lock);
861
862         /*
863          * Deleting Compliance Mode Recovery Timer because the xHCI Host
864          * is about to be suspended.
865          */
866         if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) &&
867                         (!(xhci_all_ports_seen_u0(xhci)))) {
868                 del_timer_sync(&xhci->comp_mode_recovery_timer);
869                 xhci_dbg(xhci, "%s: compliance mode recovery timer deleted\n",
870                                 __func__);
871         }
872
873         /* step 5: remove core well power */
874         /* synchronize irq when using MSI-X */
875         xhci_msix_sync_irqs(xhci);
876
877         return rc;
878 }
879
880 /*
881  * start xHC (not bus-specific)
882  *
883  * This is called when the machine transition from S3/S4 mode.
884  *
885  */
886 int xhci_resume(struct xhci_hcd *xhci, bool hibernated)
887 {
888         u32                     command, temp = 0;
889         struct usb_hcd          *hcd = xhci_to_hcd(xhci);
890         struct usb_hcd          *secondary_hcd;
891         int                     retval = 0;
892         bool                    comp_timer_running = false;
893
894         /* Wait a bit if either of the roothubs need to settle from the
895          * transition into bus suspend.
896          */
897         if (time_before(jiffies, xhci->bus_state[0].next_statechange) ||
898                         time_before(jiffies,
899                                 xhci->bus_state[1].next_statechange))
900                 msleep(100);
901
902         set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
903         set_bit(HCD_FLAG_HW_ACCESSIBLE, &xhci->shared_hcd->flags);
904
905         spin_lock_irq(&xhci->lock);
906         if (xhci->quirks & XHCI_RESET_ON_RESUME)
907                 hibernated = true;
908
909         if (!hibernated) {
910                 /* step 1: restore register */
911                 xhci_restore_registers(xhci);
912                 /* step 2: initialize command ring buffer */
913                 xhci_set_cmd_ring_deq(xhci);
914                 /* step 3: restore state and start state*/
915                 /* step 3: set CRS flag */
916                 command = xhci_readl(xhci, &xhci->op_regs->command);
917                 command |= CMD_CRS;
918                 xhci_writel(xhci, command, &xhci->op_regs->command);
919                 if (xhci_handshake(xhci, &xhci->op_regs->status,
920                               STS_RESTORE, 0, 10 * 1000)) {
921                         xhci_warn(xhci, "WARN: xHC restore state timeout\n");
922                         spin_unlock_irq(&xhci->lock);
923                         return -ETIMEDOUT;
924                 }
925                 temp = xhci_readl(xhci, &xhci->op_regs->status);
926         }
927
928         /* If restore operation fails, re-initialize the HC during resume */
929         if ((temp & STS_SRE) || hibernated) {
930
931                 if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) &&
932                                 !(xhci_all_ports_seen_u0(xhci))) {
933                         del_timer_sync(&xhci->comp_mode_recovery_timer);
934                         xhci_dbg(xhci, "Compliance Mode Recovery Timer deleted!\n");
935                 }
936
937                 /* Let the USB core know _both_ roothubs lost power. */
938                 usb_root_hub_lost_power(xhci->main_hcd->self.root_hub);
939                 usb_root_hub_lost_power(xhci->shared_hcd->self.root_hub);
940
941                 xhci_dbg(xhci, "Stop HCD\n");
942                 xhci_halt(xhci);
943                 xhci_reset(xhci);
944                 spin_unlock_irq(&xhci->lock);
945                 xhci_cleanup_msix(xhci);
946
947                 xhci_dbg(xhci, "// Disabling event ring interrupts\n");
948                 temp = xhci_readl(xhci, &xhci->op_regs->status);
949                 xhci_writel(xhci, temp & ~STS_EINT, &xhci->op_regs->status);
950                 temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
951                 xhci_writel(xhci, ER_IRQ_DISABLE(temp),
952                                 &xhci->ir_set->irq_pending);
953                 xhci_print_ir_set(xhci, 0);
954
955                 xhci_dbg(xhci, "cleaning up memory\n");
956                 xhci_mem_cleanup(xhci);
957                 xhci_dbg(xhci, "xhci_stop completed - status = %x\n",
958                             xhci_readl(xhci, &xhci->op_regs->status));
959
960                 /* USB core calls the PCI reinit and start functions twice:
961                  * first with the primary HCD, and then with the secondary HCD.
962                  * If we don't do the same, the host will never be started.
963                  */
964                 if (!usb_hcd_is_primary_hcd(hcd))
965                         secondary_hcd = hcd;
966                 else
967                         secondary_hcd = xhci->shared_hcd;
968
969                 xhci_dbg(xhci, "Initialize the xhci_hcd\n");
970                 retval = xhci_init(hcd->primary_hcd);
971                 if (retval)
972                         return retval;
973                 comp_timer_running = true;
974
975                 xhci_dbg(xhci, "Start the primary HCD\n");
976                 retval = xhci_run(hcd->primary_hcd);
977                 if (!retval) {
978                         xhci_dbg(xhci, "Start the secondary HCD\n");
979                         retval = xhci_run(secondary_hcd);
980                 }
981                 hcd->state = HC_STATE_SUSPENDED;
982                 xhci->shared_hcd->state = HC_STATE_SUSPENDED;
983                 goto done;
984         }
985
986         /* step 4: set Run/Stop bit */
987         command = xhci_readl(xhci, &xhci->op_regs->command);
988         command |= CMD_RUN;
989         xhci_writel(xhci, command, &xhci->op_regs->command);
990         xhci_handshake(xhci, &xhci->op_regs->status, STS_HALT,
991                   0, 250 * 1000);
992
993         /* step 5: walk topology and initialize portsc,
994          * portpmsc and portli
995          */
996         /* this is done in bus_resume */
997
998         /* step 6: restart each of the previously
999          * Running endpoints by ringing their doorbells
1000          */
1001
1002         spin_unlock_irq(&xhci->lock);
1003
1004  done:
1005         if (retval == 0) {
1006                 usb_hcd_resume_root_hub(hcd);
1007                 usb_hcd_resume_root_hub(xhci->shared_hcd);
1008         }
1009
1010         /*
1011          * If system is subject to the Quirk, Compliance Mode Timer needs to
1012          * be re-initialized Always after a system resume. Ports are subject
1013          * to suffer the Compliance Mode issue again. It doesn't matter if
1014          * ports have entered previously to U0 before system's suspension.
1015          */
1016         if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) && !comp_timer_running)
1017                 compliance_mode_recovery_timer_init(xhci);
1018
1019         /* Re-enable port polling. */
1020         xhci_dbg(xhci, "%s: starting port polling.\n", __func__);
1021         set_bit(HCD_FLAG_POLL_RH, &hcd->flags);
1022         usb_hcd_poll_rh_status(hcd);
1023
1024         return retval;
1025 }
1026 #endif  /* CONFIG_PM */
1027
1028 /*-------------------------------------------------------------------------*/
1029
1030 /**
1031  * xhci_get_endpoint_index - Used for passing endpoint bitmasks between the core and
1032  * HCDs.  Find the index for an endpoint given its descriptor.  Use the return
1033  * value to right shift 1 for the bitmask.
1034  *
1035  * Index  = (epnum * 2) + direction - 1,
1036  * where direction = 0 for OUT, 1 for IN.
1037  * For control endpoints, the IN index is used (OUT index is unused), so
1038  * index = (epnum * 2) + direction - 1 = (epnum * 2) + 1 - 1 = (epnum * 2)
1039  */
1040 unsigned int xhci_get_endpoint_index(struct usb_endpoint_descriptor *desc)
1041 {
1042         unsigned int index;
1043         if (usb_endpoint_xfer_control(desc))
1044                 index = (unsigned int) (usb_endpoint_num(desc)*2);
1045         else
1046                 index = (unsigned int) (usb_endpoint_num(desc)*2) +
1047                         (usb_endpoint_dir_in(desc) ? 1 : 0) - 1;
1048         return index;
1049 }
1050
1051 /* The reverse operation to xhci_get_endpoint_index. Calculate the USB endpoint
1052  * address from the XHCI endpoint index.
1053  */
1054 unsigned int xhci_get_endpoint_address(unsigned int ep_index)
1055 {
1056         unsigned int number = DIV_ROUND_UP(ep_index, 2);
1057         unsigned int direction = ep_index % 2 ? USB_DIR_OUT : USB_DIR_IN;
1058         return direction | number;
1059 }
1060
1061 /* Find the flag for this endpoint (for use in the control context).  Use the
1062  * endpoint index to create a bitmask.  The slot context is bit 0, endpoint 0 is
1063  * bit 1, etc.
1064  */
1065 unsigned int xhci_get_endpoint_flag(struct usb_endpoint_descriptor *desc)
1066 {
1067         return 1 << (xhci_get_endpoint_index(desc) + 1);
1068 }
1069
1070 /* Find the flag for this endpoint (for use in the control context).  Use the
1071  * endpoint index to create a bitmask.  The slot context is bit 0, endpoint 0 is
1072  * bit 1, etc.
1073  */
1074 unsigned int xhci_get_endpoint_flag_from_index(unsigned int ep_index)
1075 {
1076         return 1 << (ep_index + 1);
1077 }
1078
1079 /* Compute the last valid endpoint context index.  Basically, this is the
1080  * endpoint index plus one.  For slot contexts with more than valid endpoint,
1081  * we find the most significant bit set in the added contexts flags.
1082  * e.g. ep 1 IN (with epnum 0x81) => added_ctxs = 0b1000
1083  * fls(0b1000) = 4, but the endpoint context index is 3, so subtract one.
1084  */
1085 unsigned int xhci_last_valid_endpoint(u32 added_ctxs)
1086 {
1087         return fls(added_ctxs) - 1;
1088 }
1089
1090 /* Returns 1 if the arguments are OK;
1091  * returns 0 this is a root hub; returns -EINVAL for NULL pointers.
1092  */
1093 static int xhci_check_args(struct usb_hcd *hcd, struct usb_device *udev,
1094                 struct usb_host_endpoint *ep, int check_ep, bool check_virt_dev,
1095                 const char *func) {
1096         struct xhci_hcd *xhci;
1097         struct xhci_virt_device *virt_dev;
1098
1099         if (!hcd || (check_ep && !ep) || !udev) {
1100                 pr_debug("xHCI %s called with invalid args\n", func);
1101                 return -EINVAL;
1102         }
1103         if (!udev->parent) {
1104                 pr_debug("xHCI %s called for root hub\n", func);
1105                 return 0;
1106         }
1107
1108         xhci = hcd_to_xhci(hcd);
1109         if (check_virt_dev) {
1110                 if (!udev->slot_id || !xhci->devs[udev->slot_id]) {
1111                         xhci_dbg(xhci, "xHCI %s called with unaddressed device\n",
1112                                         func);
1113                         return -EINVAL;
1114                 }
1115
1116                 virt_dev = xhci->devs[udev->slot_id];
1117                 if (virt_dev->udev != udev) {
1118                         xhci_dbg(xhci, "xHCI %s called with udev and "
1119                                           "virt_dev does not match\n", func);
1120                         return -EINVAL;
1121                 }
1122         }
1123
1124         if (xhci->xhc_state & XHCI_STATE_HALTED)
1125                 return -ENODEV;
1126
1127         return 1;
1128 }
1129
1130 static int xhci_configure_endpoint(struct xhci_hcd *xhci,
1131                 struct usb_device *udev, struct xhci_command *command,
1132                 bool ctx_change, bool must_succeed);
1133
1134 /*
1135  * Full speed devices may have a max packet size greater than 8 bytes, but the
1136  * USB core doesn't know that until it reads the first 8 bytes of the
1137  * descriptor.  If the usb_device's max packet size changes after that point,
1138  * we need to issue an evaluate context command and wait on it.
1139  */
1140 static int xhci_check_maxpacket(struct xhci_hcd *xhci, unsigned int slot_id,
1141                 unsigned int ep_index, struct urb *urb)
1142 {
1143         struct xhci_container_ctx *in_ctx;
1144         struct xhci_container_ctx *out_ctx;
1145         struct xhci_input_control_ctx *ctrl_ctx;
1146         struct xhci_ep_ctx *ep_ctx;
1147         int max_packet_size;
1148         int hw_max_packet_size;
1149         int ret = 0;
1150
1151         out_ctx = xhci->devs[slot_id]->out_ctx;
1152         ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
1153         hw_max_packet_size = MAX_PACKET_DECODED(le32_to_cpu(ep_ctx->ep_info2));
1154         max_packet_size = usb_endpoint_maxp(&urb->dev->ep0.desc);
1155         if (hw_max_packet_size != max_packet_size) {
1156                 xhci_dbg(xhci, "Max Packet Size for ep 0 changed.\n");
1157                 xhci_dbg(xhci, "Max packet size in usb_device = %d\n",
1158                                 max_packet_size);
1159                 xhci_dbg(xhci, "Max packet size in xHCI HW = %d\n",
1160                                 hw_max_packet_size);
1161                 xhci_dbg(xhci, "Issuing evaluate context command.\n");
1162
1163                 /* Set up the input context flags for the command */
1164                 /* FIXME: This won't work if a non-default control endpoint
1165                  * changes max packet sizes.
1166                  */
1167                 in_ctx = xhci->devs[slot_id]->in_ctx;
1168                 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1169                 if (!ctrl_ctx) {
1170                         xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
1171                                         __func__);
1172                         return -ENOMEM;
1173                 }
1174                 /* Set up the modified control endpoint 0 */
1175                 xhci_endpoint_copy(xhci, xhci->devs[slot_id]->in_ctx,
1176                                 xhci->devs[slot_id]->out_ctx, ep_index);
1177
1178                 ep_ctx = xhci_get_ep_ctx(xhci, in_ctx, ep_index);
1179                 ep_ctx->ep_info2 &= cpu_to_le32(~MAX_PACKET_MASK);
1180                 ep_ctx->ep_info2 |= cpu_to_le32(MAX_PACKET(max_packet_size));
1181
1182                 ctrl_ctx->add_flags = cpu_to_le32(EP0_FLAG);
1183                 ctrl_ctx->drop_flags = 0;
1184
1185                 xhci_dbg(xhci, "Slot %d input context\n", slot_id);
1186                 xhci_dbg_ctx(xhci, in_ctx, ep_index);
1187                 xhci_dbg(xhci, "Slot %d output context\n", slot_id);
1188                 xhci_dbg_ctx(xhci, out_ctx, ep_index);
1189
1190                 ret = xhci_configure_endpoint(xhci, urb->dev, NULL,
1191                                 true, false);
1192
1193                 /* Clean up the input context for later use by bandwidth
1194                  * functions.
1195                  */
1196                 ctrl_ctx->add_flags = cpu_to_le32(SLOT_FLAG);
1197         }
1198         return ret;
1199 }
1200
1201 /*
1202  * non-error returns are a promise to giveback() the urb later
1203  * we drop ownership so next owner (or urb unlink) can get it
1204  */
1205 int xhci_urb_enqueue(struct usb_hcd *hcd, struct urb *urb, gfp_t mem_flags)
1206 {
1207         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
1208         struct xhci_td *buffer;
1209         unsigned long flags;
1210         int ret = 0;
1211         unsigned int slot_id, ep_index;
1212         struct urb_priv *urb_priv;
1213         int size, i;
1214
1215         if (!urb || xhci_check_args(hcd, urb->dev, urb->ep,
1216                                         true, true, __func__) <= 0)
1217                 return -EINVAL;
1218
1219         slot_id = urb->dev->slot_id;
1220         ep_index = xhci_get_endpoint_index(&urb->ep->desc);
1221
1222         if (!HCD_HW_ACCESSIBLE(hcd)) {
1223                 if (!in_interrupt())
1224                         xhci_dbg(xhci, "urb submitted during PCI suspend\n");
1225                 ret = -ESHUTDOWN;
1226                 goto exit;
1227         }
1228
1229         if (usb_endpoint_xfer_isoc(&urb->ep->desc))
1230                 size = urb->number_of_packets;
1231         else
1232                 size = 1;
1233
1234         urb_priv = kzalloc(sizeof(struct urb_priv) +
1235                                   size * sizeof(struct xhci_td *), mem_flags);
1236         if (!urb_priv)
1237                 return -ENOMEM;
1238
1239         buffer = kzalloc(size * sizeof(struct xhci_td), mem_flags);
1240         if (!buffer) {
1241                 kfree(urb_priv);
1242                 return -ENOMEM;
1243         }
1244
1245         for (i = 0; i < size; i++) {
1246                 urb_priv->td[i] = buffer;
1247                 buffer++;
1248         }
1249
1250         urb_priv->length = size;
1251         urb_priv->td_cnt = 0;
1252         urb->hcpriv = urb_priv;
1253
1254         if (usb_endpoint_xfer_control(&urb->ep->desc)) {
1255                 /* Check to see if the max packet size for the default control
1256                  * endpoint changed during FS device enumeration
1257                  */
1258                 if (urb->dev->speed == USB_SPEED_FULL) {
1259                         ret = xhci_check_maxpacket(xhci, slot_id,
1260                                         ep_index, urb);
1261                         if (ret < 0) {
1262                                 xhci_urb_free_priv(xhci, urb_priv);
1263                                 urb->hcpriv = NULL;
1264                                 return ret;
1265                         }
1266                 }
1267
1268                 /* We have a spinlock and interrupts disabled, so we must pass
1269                  * atomic context to this function, which may allocate memory.
1270                  */
1271                 spin_lock_irqsave(&xhci->lock, flags);
1272                 if (xhci->xhc_state & XHCI_STATE_DYING)
1273                         goto dying;
1274                 ret = xhci_queue_ctrl_tx(xhci, GFP_ATOMIC, urb,
1275                                 slot_id, ep_index);
1276                 if (ret)
1277                         goto free_priv;
1278                 spin_unlock_irqrestore(&xhci->lock, flags);
1279         } else if (usb_endpoint_xfer_bulk(&urb->ep->desc)) {
1280                 spin_lock_irqsave(&xhci->lock, flags);
1281                 if (xhci->xhc_state & XHCI_STATE_DYING)
1282                         goto dying;
1283                 if (xhci->devs[slot_id]->eps[ep_index].ep_state &
1284                                 EP_GETTING_STREAMS) {
1285                         xhci_warn(xhci, "WARN: Can't enqueue URB while bulk ep "
1286                                         "is transitioning to using streams.\n");
1287                         ret = -EINVAL;
1288                 } else if (xhci->devs[slot_id]->eps[ep_index].ep_state &
1289                                 EP_GETTING_NO_STREAMS) {
1290                         xhci_warn(xhci, "WARN: Can't enqueue URB while bulk ep "
1291                                         "is transitioning to "
1292                                         "not having streams.\n");
1293                         ret = -EINVAL;
1294                 } else {
1295                         ret = xhci_queue_bulk_tx(xhci, GFP_ATOMIC, urb,
1296                                         slot_id, ep_index);
1297                 }
1298                 if (ret)
1299                         goto free_priv;
1300                 spin_unlock_irqrestore(&xhci->lock, flags);
1301         } else if (usb_endpoint_xfer_int(&urb->ep->desc)) {
1302                 spin_lock_irqsave(&xhci->lock, flags);
1303                 if (xhci->xhc_state & XHCI_STATE_DYING)
1304                         goto dying;
1305                 ret = xhci_queue_intr_tx(xhci, GFP_ATOMIC, urb,
1306                                 slot_id, ep_index);
1307                 if (ret)
1308                         goto free_priv;
1309                 spin_unlock_irqrestore(&xhci->lock, flags);
1310         } else {
1311                 spin_lock_irqsave(&xhci->lock, flags);
1312                 if (xhci->xhc_state & XHCI_STATE_DYING)
1313                         goto dying;
1314                 ret = xhci_queue_isoc_tx_prepare(xhci, GFP_ATOMIC, urb,
1315                                 slot_id, ep_index);
1316                 if (ret)
1317                         goto free_priv;
1318                 spin_unlock_irqrestore(&xhci->lock, flags);
1319         }
1320 exit:
1321         return ret;
1322 dying:
1323         xhci_dbg(xhci, "Ep 0x%x: URB %p submitted for "
1324                         "non-responsive xHCI host.\n",
1325                         urb->ep->desc.bEndpointAddress, urb);
1326         ret = -ESHUTDOWN;
1327 free_priv:
1328         xhci_urb_free_priv(xhci, urb_priv);
1329         urb->hcpriv = NULL;
1330         spin_unlock_irqrestore(&xhci->lock, flags);
1331         return ret;
1332 }
1333
1334 /* Get the right ring for the given URB.
1335  * If the endpoint supports streams, boundary check the URB's stream ID.
1336  * If the endpoint doesn't support streams, return the singular endpoint ring.
1337  */
1338 static struct xhci_ring *xhci_urb_to_transfer_ring(struct xhci_hcd *xhci,
1339                 struct urb *urb)
1340 {
1341         unsigned int slot_id;
1342         unsigned int ep_index;
1343         unsigned int stream_id;
1344         struct xhci_virt_ep *ep;
1345
1346         slot_id = urb->dev->slot_id;
1347         ep_index = xhci_get_endpoint_index(&urb->ep->desc);
1348         stream_id = urb->stream_id;
1349         ep = &xhci->devs[slot_id]->eps[ep_index];
1350         /* Common case: no streams */
1351         if (!(ep->ep_state & EP_HAS_STREAMS))
1352                 return ep->ring;
1353
1354         if (stream_id == 0) {
1355                 xhci_warn(xhci,
1356                                 "WARN: Slot ID %u, ep index %u has streams, "
1357                                 "but URB has no stream ID.\n",
1358                                 slot_id, ep_index);
1359                 return NULL;
1360         }
1361
1362         if (stream_id < ep->stream_info->num_streams)
1363                 return ep->stream_info->stream_rings[stream_id];
1364
1365         xhci_warn(xhci,
1366                         "WARN: Slot ID %u, ep index %u has "
1367                         "stream IDs 1 to %u allocated, "
1368                         "but stream ID %u is requested.\n",
1369                         slot_id, ep_index,
1370                         ep->stream_info->num_streams - 1,
1371                         stream_id);
1372         return NULL;
1373 }
1374
1375 /*
1376  * Remove the URB's TD from the endpoint ring.  This may cause the HC to stop
1377  * USB transfers, potentially stopping in the middle of a TRB buffer.  The HC
1378  * should pick up where it left off in the TD, unless a Set Transfer Ring
1379  * Dequeue Pointer is issued.
1380  *
1381  * The TRBs that make up the buffers for the canceled URB will be "removed" from
1382  * the ring.  Since the ring is a contiguous structure, they can't be physically
1383  * removed.  Instead, there are two options:
1384  *
1385  *  1) If the HC is in the middle of processing the URB to be canceled, we
1386  *     simply move the ring's dequeue pointer past those TRBs using the Set
1387  *     Transfer Ring Dequeue Pointer command.  This will be the common case,
1388  *     when drivers timeout on the last submitted URB and attempt to cancel.
1389  *
1390  *  2) If the HC is in the middle of a different TD, we turn the TRBs into a
1391  *     series of 1-TRB transfer no-op TDs.  (No-ops shouldn't be chained.)  The
1392  *     HC will need to invalidate the any TRBs it has cached after the stop
1393  *     endpoint command, as noted in the xHCI 0.95 errata.
1394  *
1395  *  3) The TD may have completed by the time the Stop Endpoint Command
1396  *     completes, so software needs to handle that case too.
1397  *
1398  * This function should protect against the TD enqueueing code ringing the
1399  * doorbell while this code is waiting for a Stop Endpoint command to complete.
1400  * It also needs to account for multiple cancellations on happening at the same
1401  * time for the same endpoint.
1402  *
1403  * Note that this function can be called in any context, or so says
1404  * usb_hcd_unlink_urb()
1405  */
1406 int xhci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
1407 {
1408         unsigned long flags;
1409         int ret, i;
1410         u32 temp;
1411         struct xhci_hcd *xhci;
1412         struct urb_priv *urb_priv;
1413         struct xhci_td *td;
1414         unsigned int ep_index;
1415         struct xhci_ring *ep_ring;
1416         struct xhci_virt_ep *ep;
1417
1418         xhci = hcd_to_xhci(hcd);
1419         spin_lock_irqsave(&xhci->lock, flags);
1420         /* Make sure the URB hasn't completed or been unlinked already */
1421         ret = usb_hcd_check_unlink_urb(hcd, urb, status);
1422         if (ret || !urb->hcpriv)
1423                 goto done;
1424         temp = xhci_readl(xhci, &xhci->op_regs->status);
1425         if (temp == 0xffffffff || (xhci->xhc_state & XHCI_STATE_HALTED)) {
1426                 xhci_dbg(xhci, "HW died, freeing TD.\n");
1427                 urb_priv = urb->hcpriv;
1428                 for (i = urb_priv->td_cnt; i < urb_priv->length; i++) {
1429                         td = urb_priv->td[i];
1430                         if (!list_empty(&td->td_list))
1431                                 list_del_init(&td->td_list);
1432                         if (!list_empty(&td->cancelled_td_list))
1433                                 list_del_init(&td->cancelled_td_list);
1434                 }
1435
1436                 usb_hcd_unlink_urb_from_ep(hcd, urb);
1437                 spin_unlock_irqrestore(&xhci->lock, flags);
1438                 usb_hcd_giveback_urb(hcd, urb, -ESHUTDOWN);
1439                 xhci_urb_free_priv(xhci, urb_priv);
1440                 return ret;
1441         }
1442         if ((xhci->xhc_state & XHCI_STATE_DYING) ||
1443                         (xhci->xhc_state & XHCI_STATE_HALTED)) {
1444                 xhci_dbg(xhci, "Ep 0x%x: URB %p to be canceled on "
1445                                 "non-responsive xHCI host.\n",
1446                                 urb->ep->desc.bEndpointAddress, urb);
1447                 /* Let the stop endpoint command watchdog timer (which set this
1448                  * state) finish cleaning up the endpoint TD lists.  We must
1449                  * have caught it in the middle of dropping a lock and giving
1450                  * back an URB.
1451                  */
1452                 goto done;
1453         }
1454
1455         ep_index = xhci_get_endpoint_index(&urb->ep->desc);
1456         ep = &xhci->devs[urb->dev->slot_id]->eps[ep_index];
1457         ep_ring = xhci_urb_to_transfer_ring(xhci, urb);
1458         if (!ep_ring) {
1459                 ret = -EINVAL;
1460                 goto done;
1461         }
1462
1463         urb_priv = urb->hcpriv;
1464         i = urb_priv->td_cnt;
1465         if (i < urb_priv->length)
1466                 xhci_dbg(xhci, "Cancel URB %p, dev %s, ep 0x%x, "
1467                                 "starting at offset 0x%llx\n",
1468                                 urb, urb->dev->devpath,
1469                                 urb->ep->desc.bEndpointAddress,
1470                                 (unsigned long long) xhci_trb_virt_to_dma(
1471                                         urb_priv->td[i]->start_seg,
1472                                         urb_priv->td[i]->first_trb));
1473
1474         for (; i < urb_priv->length; i++) {
1475                 td = urb_priv->td[i];
1476                 list_add_tail(&td->cancelled_td_list, &ep->cancelled_td_list);
1477         }
1478
1479         /* Queue a stop endpoint command, but only if this is
1480          * the first cancellation to be handled.
1481          */
1482         if (!(ep->ep_state & EP_HALT_PENDING)) {
1483                 ep->ep_state |= EP_HALT_PENDING;
1484                 ep->stop_cmds_pending++;
1485                 ep->stop_cmd_timer.expires = jiffies +
1486                         XHCI_STOP_EP_CMD_TIMEOUT * HZ;
1487                 add_timer(&ep->stop_cmd_timer);
1488                 xhci_queue_stop_endpoint(xhci, urb->dev->slot_id, ep_index, 0);
1489                 xhci_ring_cmd_db(xhci);
1490         }
1491 done:
1492         spin_unlock_irqrestore(&xhci->lock, flags);
1493         return ret;
1494 }
1495
1496 /* Drop an endpoint from a new bandwidth configuration for this device.
1497  * Only one call to this function is allowed per endpoint before
1498  * check_bandwidth() or reset_bandwidth() must be called.
1499  * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
1500  * add the endpoint to the schedule with possibly new parameters denoted by a
1501  * different endpoint descriptor in usb_host_endpoint.
1502  * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
1503  * not allowed.
1504  *
1505  * The USB core will not allow URBs to be queued to an endpoint that is being
1506  * disabled, so there's no need for mutual exclusion to protect
1507  * the xhci->devs[slot_id] structure.
1508  */
1509 int xhci_drop_endpoint(struct usb_hcd *hcd, struct usb_device *udev,
1510                 struct usb_host_endpoint *ep)
1511 {
1512         struct xhci_hcd *xhci;
1513         struct xhci_container_ctx *in_ctx, *out_ctx;
1514         struct xhci_input_control_ctx *ctrl_ctx;
1515         struct xhci_slot_ctx *slot_ctx;
1516         unsigned int last_ctx;
1517         unsigned int ep_index;
1518         struct xhci_ep_ctx *ep_ctx;
1519         u32 drop_flag;
1520         u32 new_add_flags, new_drop_flags, new_slot_info;
1521         int ret;
1522
1523         ret = xhci_check_args(hcd, udev, ep, 1, true, __func__);
1524         if (ret <= 0)
1525                 return ret;
1526         xhci = hcd_to_xhci(hcd);
1527         if (xhci->xhc_state & XHCI_STATE_DYING)
1528                 return -ENODEV;
1529
1530         xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
1531         drop_flag = xhci_get_endpoint_flag(&ep->desc);
1532         if (drop_flag == SLOT_FLAG || drop_flag == EP0_FLAG) {
1533                 xhci_dbg(xhci, "xHCI %s - can't drop slot or ep 0 %#x\n",
1534                                 __func__, drop_flag);
1535                 return 0;
1536         }
1537
1538         in_ctx = xhci->devs[udev->slot_id]->in_ctx;
1539         out_ctx = xhci->devs[udev->slot_id]->out_ctx;
1540         ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1541         if (!ctrl_ctx) {
1542                 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
1543                                 __func__);
1544                 return 0;
1545         }
1546
1547         ep_index = xhci_get_endpoint_index(&ep->desc);
1548         ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
1549         /* If the HC already knows the endpoint is disabled,
1550          * or the HCD has noted it is disabled, ignore this request
1551          */
1552         if (((ep_ctx->ep_info & cpu_to_le32(EP_STATE_MASK)) ==
1553              cpu_to_le32(EP_STATE_DISABLED)) ||
1554             le32_to_cpu(ctrl_ctx->drop_flags) &
1555             xhci_get_endpoint_flag(&ep->desc)) {
1556                 xhci_warn(xhci, "xHCI %s called with disabled ep %p\n",
1557                                 __func__, ep);
1558                 return 0;
1559         }
1560
1561         ctrl_ctx->drop_flags |= cpu_to_le32(drop_flag);
1562         new_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags);
1563
1564         ctrl_ctx->add_flags &= cpu_to_le32(~drop_flag);
1565         new_add_flags = le32_to_cpu(ctrl_ctx->add_flags);
1566
1567         last_ctx = xhci_last_valid_endpoint(le32_to_cpu(ctrl_ctx->add_flags));
1568         slot_ctx = xhci_get_slot_ctx(xhci, in_ctx);
1569         /* Update the last valid endpoint context, if we deleted the last one */
1570         if ((le32_to_cpu(slot_ctx->dev_info) & LAST_CTX_MASK) >
1571             LAST_CTX(last_ctx)) {
1572                 slot_ctx->dev_info &= cpu_to_le32(~LAST_CTX_MASK);
1573                 slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(last_ctx));
1574         }
1575         new_slot_info = le32_to_cpu(slot_ctx->dev_info);
1576
1577         xhci_endpoint_zero(xhci, xhci->devs[udev->slot_id], ep);
1578
1579         xhci_dbg(xhci, "drop ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x, new slot info = %#x\n",
1580                         (unsigned int) ep->desc.bEndpointAddress,
1581                         udev->slot_id,
1582                         (unsigned int) new_drop_flags,
1583                         (unsigned int) new_add_flags,
1584                         (unsigned int) new_slot_info);
1585         return 0;
1586 }
1587
1588 /* Add an endpoint to a new possible bandwidth configuration for this device.
1589  * Only one call to this function is allowed per endpoint before
1590  * check_bandwidth() or reset_bandwidth() must be called.
1591  * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
1592  * add the endpoint to the schedule with possibly new parameters denoted by a
1593  * different endpoint descriptor in usb_host_endpoint.
1594  * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
1595  * not allowed.
1596  *
1597  * The USB core will not allow URBs to be queued to an endpoint until the
1598  * configuration or alt setting is installed in the device, so there's no need
1599  * for mutual exclusion to protect the xhci->devs[slot_id] structure.
1600  */
1601 int xhci_add_endpoint(struct usb_hcd *hcd, struct usb_device *udev,
1602                 struct usb_host_endpoint *ep)
1603 {
1604         struct xhci_hcd *xhci;
1605         struct xhci_container_ctx *in_ctx, *out_ctx;
1606         unsigned int ep_index;
1607         struct xhci_slot_ctx *slot_ctx;
1608         struct xhci_input_control_ctx *ctrl_ctx;
1609         u32 added_ctxs;
1610         unsigned int last_ctx;
1611         u32 new_add_flags, new_drop_flags, new_slot_info;
1612         struct xhci_virt_device *virt_dev;
1613         int ret = 0;
1614
1615         ret = xhci_check_args(hcd, udev, ep, 1, true, __func__);
1616         if (ret <= 0) {
1617                 /* So we won't queue a reset ep command for a root hub */
1618                 ep->hcpriv = NULL;
1619                 return ret;
1620         }
1621         xhci = hcd_to_xhci(hcd);
1622         if (xhci->xhc_state & XHCI_STATE_DYING)
1623                 return -ENODEV;
1624
1625         added_ctxs = xhci_get_endpoint_flag(&ep->desc);
1626         last_ctx = xhci_last_valid_endpoint(added_ctxs);
1627         if (added_ctxs == SLOT_FLAG || added_ctxs == EP0_FLAG) {
1628                 /* FIXME when we have to issue an evaluate endpoint command to
1629                  * deal with ep0 max packet size changing once we get the
1630                  * descriptors
1631                  */
1632                 xhci_dbg(xhci, "xHCI %s - can't add slot or ep 0 %#x\n",
1633                                 __func__, added_ctxs);
1634                 return 0;
1635         }
1636
1637         virt_dev = xhci->devs[udev->slot_id];
1638         in_ctx = virt_dev->in_ctx;
1639         out_ctx = virt_dev->out_ctx;
1640         ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1641         if (!ctrl_ctx) {
1642                 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
1643                                 __func__);
1644                 return 0;
1645         }
1646
1647         ep_index = xhci_get_endpoint_index(&ep->desc);
1648         /* If this endpoint is already in use, and the upper layers are trying
1649          * to add it again without dropping it, reject the addition.
1650          */
1651         if (virt_dev->eps[ep_index].ring &&
1652                         !(le32_to_cpu(ctrl_ctx->drop_flags) &
1653                                 xhci_get_endpoint_flag(&ep->desc))) {
1654                 xhci_warn(xhci, "Trying to add endpoint 0x%x "
1655                                 "without dropping it.\n",
1656                                 (unsigned int) ep->desc.bEndpointAddress);
1657                 return -EINVAL;
1658         }
1659
1660         /* If the HCD has already noted the endpoint is enabled,
1661          * ignore this request.
1662          */
1663         if (le32_to_cpu(ctrl_ctx->add_flags) &
1664             xhci_get_endpoint_flag(&ep->desc)) {
1665                 xhci_warn(xhci, "xHCI %s called with enabled ep %p\n",
1666                                 __func__, ep);
1667                 return 0;
1668         }
1669
1670         /*
1671          * Configuration and alternate setting changes must be done in
1672          * process context, not interrupt context (or so documenation
1673          * for usb_set_interface() and usb_set_configuration() claim).
1674          */
1675         if (xhci_endpoint_init(xhci, virt_dev, udev, ep, GFP_NOIO) < 0) {
1676                 dev_dbg(&udev->dev, "%s - could not initialize ep %#x\n",
1677                                 __func__, ep->desc.bEndpointAddress);
1678                 return -ENOMEM;
1679         }
1680
1681         ctrl_ctx->add_flags |= cpu_to_le32(added_ctxs);
1682         new_add_flags = le32_to_cpu(ctrl_ctx->add_flags);
1683
1684         /* If xhci_endpoint_disable() was called for this endpoint, but the
1685          * xHC hasn't been notified yet through the check_bandwidth() call,
1686          * this re-adds a new state for the endpoint from the new endpoint
1687          * descriptors.  We must drop and re-add this endpoint, so we leave the
1688          * drop flags alone.
1689          */
1690         new_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags);
1691
1692         slot_ctx = xhci_get_slot_ctx(xhci, in_ctx);
1693         /* Update the last valid endpoint context, if we just added one past */
1694         if ((le32_to_cpu(slot_ctx->dev_info) & LAST_CTX_MASK) <
1695             LAST_CTX(last_ctx)) {
1696                 slot_ctx->dev_info &= cpu_to_le32(~LAST_CTX_MASK);
1697                 slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(last_ctx));
1698         }
1699         new_slot_info = le32_to_cpu(slot_ctx->dev_info);
1700
1701         /* Store the usb_device pointer for later use */
1702         ep->hcpriv = udev;
1703
1704         xhci_dbg(xhci, "add ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x, new slot info = %#x\n",
1705                         (unsigned int) ep->desc.bEndpointAddress,
1706                         udev->slot_id,
1707                         (unsigned int) new_drop_flags,
1708                         (unsigned int) new_add_flags,
1709                         (unsigned int) new_slot_info);
1710         return 0;
1711 }
1712
1713 static void xhci_zero_in_ctx(struct xhci_hcd *xhci, struct xhci_virt_device *virt_dev)
1714 {
1715         struct xhci_input_control_ctx *ctrl_ctx;
1716         struct xhci_ep_ctx *ep_ctx;
1717         struct xhci_slot_ctx *slot_ctx;
1718         int i;
1719
1720         ctrl_ctx = xhci_get_input_control_ctx(xhci, virt_dev->in_ctx);
1721         if (!ctrl_ctx) {
1722                 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
1723                                 __func__);
1724                 return;
1725         }
1726
1727         /* When a device's add flag and drop flag are zero, any subsequent
1728          * configure endpoint command will leave that endpoint's state
1729          * untouched.  Make sure we don't leave any old state in the input
1730          * endpoint contexts.
1731          */
1732         ctrl_ctx->drop_flags = 0;
1733         ctrl_ctx->add_flags = 0;
1734         slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
1735         slot_ctx->dev_info &= cpu_to_le32(~LAST_CTX_MASK);
1736         /* Endpoint 0 is always valid */
1737         slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(1));
1738         for (i = 1; i < 31; ++i) {
1739                 ep_ctx = xhci_get_ep_ctx(xhci, virt_dev->in_ctx, i);
1740                 ep_ctx->ep_info = 0;
1741                 ep_ctx->ep_info2 = 0;
1742                 ep_ctx->deq = 0;
1743                 ep_ctx->tx_info = 0;
1744         }
1745 }
1746
1747 static int xhci_configure_endpoint_result(struct xhci_hcd *xhci,
1748                 struct usb_device *udev, u32 *cmd_status)
1749 {
1750         int ret;
1751
1752         switch (*cmd_status) {
1753         case COMP_ENOMEM:
1754                 dev_warn(&udev->dev, "Not enough host controller resources "
1755                                 "for new device state.\n");
1756                 ret = -ENOMEM;
1757                 /* FIXME: can we allocate more resources for the HC? */
1758                 break;
1759         case COMP_BW_ERR:
1760         case COMP_2ND_BW_ERR:
1761                 dev_warn(&udev->dev, "Not enough bandwidth "
1762                                 "for new device state.\n");
1763                 ret = -ENOSPC;
1764                 /* FIXME: can we go back to the old state? */
1765                 break;
1766         case COMP_TRB_ERR:
1767                 /* the HCD set up something wrong */
1768                 dev_warn(&udev->dev, "ERROR: Endpoint drop flag = 0, "
1769                                 "add flag = 1, "
1770                                 "and endpoint is not disabled.\n");
1771                 ret = -EINVAL;
1772                 break;
1773         case COMP_DEV_ERR:
1774                 dev_warn(&udev->dev, "ERROR: Incompatible device for endpoint "
1775                                 "configure command.\n");
1776                 ret = -ENODEV;
1777                 break;
1778         case COMP_SUCCESS:
1779                 dev_dbg(&udev->dev, "Successful Endpoint Configure command\n");
1780                 ret = 0;
1781                 break;
1782         default:
1783                 xhci_err(xhci, "ERROR: unexpected command completion "
1784                                 "code 0x%x.\n", *cmd_status);
1785                 ret = -EINVAL;
1786                 break;
1787         }
1788         return ret;
1789 }
1790
1791 static int xhci_evaluate_context_result(struct xhci_hcd *xhci,
1792                 struct usb_device *udev, u32 *cmd_status)
1793 {
1794         int ret;
1795         struct xhci_virt_device *virt_dev = xhci->devs[udev->slot_id];
1796
1797         switch (*cmd_status) {
1798         case COMP_EINVAL:
1799                 dev_warn(&udev->dev, "WARN: xHCI driver setup invalid evaluate "
1800                                 "context command.\n");
1801                 ret = -EINVAL;
1802                 break;
1803         case COMP_EBADSLT:
1804                 dev_warn(&udev->dev, "WARN: slot not enabled for"
1805                                 "evaluate context command.\n");
1806                 ret = -EINVAL;
1807                 break;
1808         case COMP_CTX_STATE:
1809                 dev_warn(&udev->dev, "WARN: invalid context state for "
1810                                 "evaluate context command.\n");
1811                 xhci_dbg_ctx(xhci, virt_dev->out_ctx, 1);
1812                 ret = -EINVAL;
1813                 break;
1814         case COMP_DEV_ERR:
1815                 dev_warn(&udev->dev, "ERROR: Incompatible device for evaluate "
1816                                 "context command.\n");
1817                 ret = -ENODEV;
1818                 break;
1819         case COMP_MEL_ERR:
1820                 /* Max Exit Latency too large error */
1821                 dev_warn(&udev->dev, "WARN: Max Exit Latency too large\n");
1822                 ret = -EINVAL;
1823                 break;
1824         case COMP_SUCCESS:
1825                 dev_dbg(&udev->dev, "Successful evaluate context command\n");
1826                 ret = 0;
1827                 break;
1828         default:
1829                 xhci_err(xhci, "ERROR: unexpected command completion "
1830                                 "code 0x%x.\n", *cmd_status);
1831                 ret = -EINVAL;
1832                 break;
1833         }
1834         return ret;
1835 }
1836
1837 static u32 xhci_count_num_new_endpoints(struct xhci_hcd *xhci,
1838                 struct xhci_input_control_ctx *ctrl_ctx)
1839 {
1840         u32 valid_add_flags;
1841         u32 valid_drop_flags;
1842
1843         /* Ignore the slot flag (bit 0), and the default control endpoint flag
1844          * (bit 1).  The default control endpoint is added during the Address
1845          * Device command and is never removed until the slot is disabled.
1846          */
1847         valid_add_flags = ctrl_ctx->add_flags >> 2;
1848         valid_drop_flags = ctrl_ctx->drop_flags >> 2;
1849
1850         /* Use hweight32 to count the number of ones in the add flags, or
1851          * number of endpoints added.  Don't count endpoints that are changed
1852          * (both added and dropped).
1853          */
1854         return hweight32(valid_add_flags) -
1855                 hweight32(valid_add_flags & valid_drop_flags);
1856 }
1857
1858 static unsigned int xhci_count_num_dropped_endpoints(struct xhci_hcd *xhci,
1859                 struct xhci_input_control_ctx *ctrl_ctx)
1860 {
1861         u32 valid_add_flags;
1862         u32 valid_drop_flags;
1863
1864         valid_add_flags = ctrl_ctx->add_flags >> 2;
1865         valid_drop_flags = ctrl_ctx->drop_flags >> 2;
1866
1867         return hweight32(valid_drop_flags) -
1868                 hweight32(valid_add_flags & valid_drop_flags);
1869 }
1870
1871 /*
1872  * We need to reserve the new number of endpoints before the configure endpoint
1873  * command completes.  We can't subtract the dropped endpoints from the number
1874  * of active endpoints until the command completes because we can oversubscribe
1875  * the host in this case:
1876  *
1877  *  - the first configure endpoint command drops more endpoints than it adds
1878  *  - a second configure endpoint command that adds more endpoints is queued
1879  *  - the first configure endpoint command fails, so the config is unchanged
1880  *  - the second command may succeed, even though there isn't enough resources
1881  *
1882  * Must be called with xhci->lock held.
1883  */
1884 static int xhci_reserve_host_resources(struct xhci_hcd *xhci,
1885                 struct xhci_input_control_ctx *ctrl_ctx)
1886 {
1887         u32 added_eps;
1888
1889         added_eps = xhci_count_num_new_endpoints(xhci, ctrl_ctx);
1890         if (xhci->num_active_eps + added_eps > xhci->limit_active_eps) {
1891                 xhci_dbg(xhci, "Not enough ep ctxs: "
1892                                 "%u active, need to add %u, limit is %u.\n",
1893                                 xhci->num_active_eps, added_eps,
1894                                 xhci->limit_active_eps);
1895                 return -ENOMEM;
1896         }
1897         xhci->num_active_eps += added_eps;
1898         xhci_dbg(xhci, "Adding %u ep ctxs, %u now active.\n", added_eps,
1899                         xhci->num_active_eps);
1900         return 0;
1901 }
1902
1903 /*
1904  * The configure endpoint was failed by the xHC for some other reason, so we
1905  * need to revert the resources that failed configuration would have used.
1906  *
1907  * Must be called with xhci->lock held.
1908  */
1909 static void xhci_free_host_resources(struct xhci_hcd *xhci,
1910                 struct xhci_input_control_ctx *ctrl_ctx)
1911 {
1912         u32 num_failed_eps;
1913
1914         num_failed_eps = xhci_count_num_new_endpoints(xhci, ctrl_ctx);
1915         xhci->num_active_eps -= num_failed_eps;
1916         xhci_dbg(xhci, "Removing %u failed ep ctxs, %u now active.\n",
1917                         num_failed_eps,
1918                         xhci->num_active_eps);
1919 }
1920
1921 /*
1922  * Now that the command has completed, clean up the active endpoint count by
1923  * subtracting out the endpoints that were dropped (but not changed).
1924  *
1925  * Must be called with xhci->lock held.
1926  */
1927 static void xhci_finish_resource_reservation(struct xhci_hcd *xhci,
1928                 struct xhci_input_control_ctx *ctrl_ctx)
1929 {
1930         u32 num_dropped_eps;
1931
1932         num_dropped_eps = xhci_count_num_dropped_endpoints(xhci, ctrl_ctx);
1933         xhci->num_active_eps -= num_dropped_eps;
1934         if (num_dropped_eps)
1935                 xhci_dbg(xhci, "Removing %u dropped ep ctxs, %u now active.\n",
1936                                 num_dropped_eps,
1937                                 xhci->num_active_eps);
1938 }
1939
1940 static unsigned int xhci_get_block_size(struct usb_device *udev)
1941 {
1942         switch (udev->speed) {
1943         case USB_SPEED_LOW:
1944         case USB_SPEED_FULL:
1945                 return FS_BLOCK;
1946         case USB_SPEED_HIGH:
1947                 return HS_BLOCK;
1948         case USB_SPEED_SUPER:
1949                 return SS_BLOCK;
1950         case USB_SPEED_UNKNOWN:
1951         case USB_SPEED_WIRELESS:
1952         default:
1953                 /* Should never happen */
1954                 return 1;
1955         }
1956 }
1957
1958 static unsigned int
1959 xhci_get_largest_overhead(struct xhci_interval_bw *interval_bw)
1960 {
1961         if (interval_bw->overhead[LS_OVERHEAD_TYPE])
1962                 return LS_OVERHEAD;
1963         if (interval_bw->overhead[FS_OVERHEAD_TYPE])
1964                 return FS_OVERHEAD;
1965         return HS_OVERHEAD;
1966 }
1967
1968 /* If we are changing a LS/FS device under a HS hub,
1969  * make sure (if we are activating a new TT) that the HS bus has enough
1970  * bandwidth for this new TT.
1971  */
1972 static int xhci_check_tt_bw_table(struct xhci_hcd *xhci,
1973                 struct xhci_virt_device *virt_dev,
1974                 int old_active_eps)
1975 {
1976         struct xhci_interval_bw_table *bw_table;
1977         struct xhci_tt_bw_info *tt_info;
1978
1979         /* Find the bandwidth table for the root port this TT is attached to. */
1980         bw_table = &xhci->rh_bw[virt_dev->real_port - 1].bw_table;
1981         tt_info = virt_dev->tt_info;
1982         /* If this TT already had active endpoints, the bandwidth for this TT
1983          * has already been added.  Removing all periodic endpoints (and thus
1984          * making the TT enactive) will only decrease the bandwidth used.
1985          */
1986         if (old_active_eps)
1987                 return 0;
1988         if (old_active_eps == 0 && tt_info->active_eps != 0) {
1989                 if (bw_table->bw_used + TT_HS_OVERHEAD > HS_BW_LIMIT)
1990                         return -ENOMEM;
1991                 return 0;
1992         }
1993         /* Not sure why we would have no new active endpoints...
1994          *
1995          * Maybe because of an Evaluate Context change for a hub update or a
1996          * control endpoint 0 max packet size change?
1997          * FIXME: skip the bandwidth calculation in that case.
1998          */
1999         return 0;
2000 }
2001
2002 static int xhci_check_ss_bw(struct xhci_hcd *xhci,
2003                 struct xhci_virt_device *virt_dev)
2004 {
2005         unsigned int bw_reserved;
2006
2007         bw_reserved = DIV_ROUND_UP(SS_BW_RESERVED*SS_BW_LIMIT_IN, 100);
2008         if (virt_dev->bw_table->ss_bw_in > (SS_BW_LIMIT_IN - bw_reserved))
2009                 return -ENOMEM;
2010
2011         bw_reserved = DIV_ROUND_UP(SS_BW_RESERVED*SS_BW_LIMIT_OUT, 100);
2012         if (virt_dev->bw_table->ss_bw_out > (SS_BW_LIMIT_OUT - bw_reserved))
2013                 return -ENOMEM;
2014
2015         return 0;
2016 }
2017
2018 /*
2019  * This algorithm is a very conservative estimate of the worst-case scheduling
2020  * scenario for any one interval.  The hardware dynamically schedules the
2021  * packets, so we can't tell which microframe could be the limiting factor in
2022  * the bandwidth scheduling.  This only takes into account periodic endpoints.
2023  *
2024  * Obviously, we can't solve an NP complete problem to find the minimum worst
2025  * case scenario.  Instead, we come up with an estimate that is no less than
2026  * the worst case bandwidth used for any one microframe, but may be an
2027  * over-estimate.
2028  *
2029  * We walk the requirements for each endpoint by interval, starting with the
2030  * smallest interval, and place packets in the schedule where there is only one
2031  * possible way to schedule packets for that interval.  In order to simplify
2032  * this algorithm, we record the largest max packet size for each interval, and
2033  * assume all packets will be that size.
2034  *
2035  * For interval 0, we obviously must schedule all packets for each interval.
2036  * The bandwidth for interval 0 is just the amount of data to be transmitted
2037  * (the sum of all max ESIT payload sizes, plus any overhead per packet times
2038  * the number of packets).
2039  *
2040  * For interval 1, we have two possible microframes to schedule those packets
2041  * in.  For this algorithm, if we can schedule the same number of packets for
2042  * each possible scheduling opportunity (each microframe), we will do so.  The
2043  * remaining number of packets will be saved to be transmitted in the gaps in
2044  * the next interval's scheduling sequence.
2045  *
2046  * As we move those remaining packets to be scheduled with interval 2 packets,
2047  * we have to double the number of remaining packets to transmit.  This is
2048  * because the intervals are actually powers of 2, and we would be transmitting
2049  * the previous interval's packets twice in this interval.  We also have to be
2050  * sure that when we look at the largest max packet size for this interval, we
2051  * also look at the largest max packet size for the remaining packets and take
2052  * the greater of the two.
2053  *
2054  * The algorithm continues to evenly distribute packets in each scheduling
2055  * opportunity, and push the remaining packets out, until we get to the last
2056  * interval.  Then those packets and their associated overhead are just added
2057  * to the bandwidth used.
2058  */
2059 static int xhci_check_bw_table(struct xhci_hcd *xhci,
2060                 struct xhci_virt_device *virt_dev,
2061                 int old_active_eps)
2062 {
2063         unsigned int bw_reserved;
2064         unsigned int max_bandwidth;
2065         unsigned int bw_used;
2066         unsigned int block_size;
2067         struct xhci_interval_bw_table *bw_table;
2068         unsigned int packet_size = 0;
2069         unsigned int overhead = 0;
2070         unsigned int packets_transmitted = 0;
2071         unsigned int packets_remaining = 0;
2072         unsigned int i;
2073
2074         if (virt_dev->udev->speed == USB_SPEED_SUPER)
2075                 return xhci_check_ss_bw(xhci, virt_dev);
2076
2077         if (virt_dev->udev->speed == USB_SPEED_HIGH) {
2078                 max_bandwidth = HS_BW_LIMIT;
2079                 /* Convert percent of bus BW reserved to blocks reserved */
2080                 bw_reserved = DIV_ROUND_UP(HS_BW_RESERVED * max_bandwidth, 100);
2081         } else {
2082                 max_bandwidth = FS_BW_LIMIT;
2083                 bw_reserved = DIV_ROUND_UP(FS_BW_RESERVED * max_bandwidth, 100);
2084         }
2085
2086         bw_table = virt_dev->bw_table;
2087         /* We need to translate the max packet size and max ESIT payloads into
2088          * the units the hardware uses.
2089          */
2090         block_size = xhci_get_block_size(virt_dev->udev);
2091
2092         /* If we are manipulating a LS/FS device under a HS hub, double check
2093          * that the HS bus has enough bandwidth if we are activing a new TT.
2094          */
2095         if (virt_dev->tt_info) {
2096                 xhci_dbg(xhci, "Recalculating BW for rootport %u\n",
2097                                 virt_dev->real_port);
2098                 if (xhci_check_tt_bw_table(xhci, virt_dev, old_active_eps)) {
2099                         xhci_warn(xhci, "Not enough bandwidth on HS bus for "
2100                                         "newly activated TT.\n");
2101                         return -ENOMEM;
2102                 }
2103                 xhci_dbg(xhci, "Recalculating BW for TT slot %u port %u\n",
2104                                 virt_dev->tt_info->slot_id,
2105                                 virt_dev->tt_info->ttport);
2106         } else {
2107                 xhci_dbg(xhci, "Recalculating BW for rootport %u\n",
2108                                 virt_dev->real_port);
2109         }
2110
2111         /* Add in how much bandwidth will be used for interval zero, or the
2112          * rounded max ESIT payload + number of packets * largest overhead.
2113          */
2114         bw_used = DIV_ROUND_UP(bw_table->interval0_esit_payload, block_size) +
2115                 bw_table->interval_bw[0].num_packets *
2116                 xhci_get_largest_overhead(&bw_table->interval_bw[0]);
2117
2118         for (i = 1; i < XHCI_MAX_INTERVAL; i++) {
2119                 unsigned int bw_added;
2120                 unsigned int largest_mps;
2121                 unsigned int interval_overhead;
2122
2123                 /*
2124                  * How many packets could we transmit in this interval?
2125                  * If packets didn't fit in the previous interval, we will need
2126                  * to transmit that many packets twice within this interval.
2127                  */
2128                 packets_remaining = 2 * packets_remaining +
2129                         bw_table->interval_bw[i].num_packets;
2130
2131                 /* Find the largest max packet size of this or the previous
2132                  * interval.
2133                  */
2134                 if (list_empty(&bw_table->interval_bw[i].endpoints))
2135                         largest_mps = 0;
2136                 else {
2137                         struct xhci_virt_ep *virt_ep;
2138                         struct list_head *ep_entry;
2139
2140                         ep_entry = bw_table->interval_bw[i].endpoints.next;
2141                         virt_ep = list_entry(ep_entry,
2142                                         struct xhci_virt_ep, bw_endpoint_list);
2143                         /* Convert to blocks, rounding up */
2144                         largest_mps = DIV_ROUND_UP(
2145                                         virt_ep->bw_info.max_packet_size,
2146                                         block_size);
2147                 }
2148                 if (largest_mps > packet_size)
2149                         packet_size = largest_mps;
2150
2151                 /* Use the larger overhead of this or the previous interval. */
2152                 interval_overhead = xhci_get_largest_overhead(
2153                                 &bw_table->interval_bw[i]);
2154                 if (interval_overhead > overhead)
2155                         overhead = interval_overhead;
2156
2157                 /* How many packets can we evenly distribute across
2158                  * (1 << (i + 1)) possible scheduling opportunities?
2159                  */
2160                 packets_transmitted = packets_remaining >> (i + 1);
2161
2162                 /* Add in the bandwidth used for those scheduled packets */
2163                 bw_added = packets_transmitted * (overhead + packet_size);
2164
2165                 /* How many packets do we have remaining to transmit? */
2166                 packets_remaining = packets_remaining % (1 << (i + 1));
2167
2168                 /* What largest max packet size should those packets have? */
2169                 /* If we've transmitted all packets, don't carry over the
2170                  * largest packet size.
2171                  */
2172                 if (packets_remaining == 0) {
2173                         packet_size = 0;
2174                         overhead = 0;
2175                 } else if (packets_transmitted > 0) {
2176                         /* Otherwise if we do have remaining packets, and we've
2177                          * scheduled some packets in this interval, take the
2178                          * largest max packet size from endpoints with this
2179                          * interval.
2180                          */
2181                         packet_size = largest_mps;
2182                         overhead = interval_overhead;
2183                 }
2184                 /* Otherwise carry over packet_size and overhead from the last
2185                  * time we had a remainder.
2186                  */
2187                 bw_used += bw_added;
2188                 if (bw_used > max_bandwidth) {
2189                         xhci_warn(xhci, "Not enough bandwidth. "
2190                                         "Proposed: %u, Max: %u\n",
2191                                 bw_used, max_bandwidth);
2192                         return -ENOMEM;
2193                 }
2194         }
2195         /*
2196          * Ok, we know we have some packets left over after even-handedly
2197          * scheduling interval 15.  We don't know which microframes they will
2198          * fit into, so we over-schedule and say they will be scheduled every
2199          * microframe.
2200          */
2201         if (packets_remaining > 0)
2202                 bw_used += overhead + packet_size;
2203
2204         if (!virt_dev->tt_info && virt_dev->udev->speed == USB_SPEED_HIGH) {
2205                 unsigned int port_index = virt_dev->real_port - 1;
2206
2207                 /* OK, we're manipulating a HS device attached to a
2208                  * root port bandwidth domain.  Include the number of active TTs
2209                  * in the bandwidth used.
2210                  */
2211                 bw_used += TT_HS_OVERHEAD *
2212                         xhci->rh_bw[port_index].num_active_tts;
2213         }
2214
2215         xhci_dbg(xhci, "Final bandwidth: %u, Limit: %u, Reserved: %u, "
2216                 "Available: %u " "percent\n",
2217                 bw_used, max_bandwidth, bw_reserved,
2218                 (max_bandwidth - bw_used - bw_reserved) * 100 /
2219                 max_bandwidth);
2220
2221         bw_used += bw_reserved;
2222         if (bw_used > max_bandwidth) {
2223                 xhci_warn(xhci, "Not enough bandwidth. Proposed: %u, Max: %u\n",
2224                                 bw_used, max_bandwidth);
2225                 return -ENOMEM;
2226         }
2227
2228         bw_table->bw_used = bw_used;
2229         return 0;
2230 }
2231
2232 static bool xhci_is_async_ep(unsigned int ep_type)
2233 {
2234         return (ep_type != ISOC_OUT_EP && ep_type != INT_OUT_EP &&
2235                                         ep_type != ISOC_IN_EP &&
2236                                         ep_type != INT_IN_EP);
2237 }
2238
2239 static bool xhci_is_sync_in_ep(unsigned int ep_type)
2240 {
2241         return (ep_type == ISOC_IN_EP || ep_type == INT_IN_EP);
2242 }
2243
2244 static unsigned int xhci_get_ss_bw_consumed(struct xhci_bw_info *ep_bw)
2245 {
2246         unsigned int mps = DIV_ROUND_UP(ep_bw->max_packet_size, SS_BLOCK);
2247
2248         if (ep_bw->ep_interval == 0)
2249                 return SS_OVERHEAD_BURST +
2250                         (ep_bw->mult * ep_bw->num_packets *
2251                                         (SS_OVERHEAD + mps));
2252         return DIV_ROUND_UP(ep_bw->mult * ep_bw->num_packets *
2253                                 (SS_OVERHEAD + mps + SS_OVERHEAD_BURST),
2254                                 1 << ep_bw->ep_interval);
2255
2256 }
2257
2258 void xhci_drop_ep_from_interval_table(struct xhci_hcd *xhci,
2259                 struct xhci_bw_info *ep_bw,
2260                 struct xhci_interval_bw_table *bw_table,
2261                 struct usb_device *udev,
2262                 struct xhci_virt_ep *virt_ep,
2263                 struct xhci_tt_bw_info *tt_info)
2264 {
2265         struct xhci_interval_bw *interval_bw;
2266         int normalized_interval;
2267
2268         if (xhci_is_async_ep(ep_bw->type))
2269                 return;
2270
2271         if (udev->speed == USB_SPEED_SUPER) {
2272                 if (xhci_is_sync_in_ep(ep_bw->type))
2273                         xhci->devs[udev->slot_id]->bw_table->ss_bw_in -=
2274                                 xhci_get_ss_bw_consumed(ep_bw);
2275                 else
2276                         xhci->devs[udev->slot_id]->bw_table->ss_bw_out -=
2277                                 xhci_get_ss_bw_consumed(ep_bw);
2278                 return;
2279         }
2280
2281         /* SuperSpeed endpoints never get added to intervals in the table, so
2282          * this check is only valid for HS/FS/LS devices.
2283          */
2284         if (list_empty(&virt_ep->bw_endpoint_list))
2285                 return;
2286         /* For LS/FS devices, we need to translate the interval expressed in
2287          * microframes to frames.
2288          */
2289         if (udev->speed == USB_SPEED_HIGH)
2290                 normalized_interval = ep_bw->ep_interval;
2291         else
2292                 normalized_interval = ep_bw->ep_interval - 3;
2293
2294         if (normalized_interval == 0)
2295                 bw_table->interval0_esit_payload -= ep_bw->max_esit_payload;
2296         interval_bw = &bw_table->interval_bw[normalized_interval];
2297         interval_bw->num_packets -= ep_bw->num_packets;
2298         switch (udev->speed) {
2299         case USB_SPEED_LOW:
2300                 interval_bw->overhead[LS_OVERHEAD_TYPE] -= 1;
2301                 break;
2302         case USB_SPEED_FULL:
2303                 interval_bw->overhead[FS_OVERHEAD_TYPE] -= 1;
2304                 break;
2305         case USB_SPEED_HIGH:
2306                 interval_bw->overhead[HS_OVERHEAD_TYPE] -= 1;
2307                 break;
2308         case USB_SPEED_SUPER:
2309         case USB_SPEED_UNKNOWN:
2310         case USB_SPEED_WIRELESS:
2311                 /* Should never happen because only LS/FS/HS endpoints will get
2312                  * added to the endpoint list.
2313                  */
2314                 return;
2315         }
2316         if (tt_info)
2317                 tt_info->active_eps -= 1;
2318         list_del_init(&virt_ep->bw_endpoint_list);
2319 }
2320
2321 static void xhci_add_ep_to_interval_table(struct xhci_hcd *xhci,
2322                 struct xhci_bw_info *ep_bw,
2323                 struct xhci_interval_bw_table *bw_table,
2324                 struct usb_device *udev,
2325                 struct xhci_virt_ep *virt_ep,
2326                 struct xhci_tt_bw_info *tt_info)
2327 {
2328         struct xhci_interval_bw *interval_bw;
2329         struct xhci_virt_ep *smaller_ep;
2330         int normalized_interval;
2331
2332         if (xhci_is_async_ep(ep_bw->type))
2333                 return;
2334
2335         if (udev->speed == USB_SPEED_SUPER) {
2336                 if (xhci_is_sync_in_ep(ep_bw->type))
2337                         xhci->devs[udev->slot_id]->bw_table->ss_bw_in +=
2338                                 xhci_get_ss_bw_consumed(ep_bw);
2339                 else
2340                         xhci->devs[udev->slot_id]->bw_table->ss_bw_out +=
2341                                 xhci_get_ss_bw_consumed(ep_bw);
2342                 return;
2343         }
2344
2345         /* For LS/FS devices, we need to translate the interval expressed in
2346          * microframes to frames.
2347          */
2348         if (udev->speed == USB_SPEED_HIGH)
2349                 normalized_interval = ep_bw->ep_interval;
2350         else
2351                 normalized_interval = ep_bw->ep_interval - 3;
2352
2353         if (normalized_interval == 0)
2354                 bw_table->interval0_esit_payload += ep_bw->max_esit_payload;
2355         interval_bw = &bw_table->interval_bw[normalized_interval];
2356         interval_bw->num_packets += ep_bw->num_packets;
2357         switch (udev->speed) {
2358         case USB_SPEED_LOW:
2359                 interval_bw->overhead[LS_OVERHEAD_TYPE] += 1;
2360                 break;
2361         case USB_SPEED_FULL:
2362                 interval_bw->overhead[FS_OVERHEAD_TYPE] += 1;
2363                 break;
2364         case USB_SPEED_HIGH:
2365                 interval_bw->overhead[HS_OVERHEAD_TYPE] += 1;
2366                 break;
2367         case USB_SPEED_SUPER:
2368         case USB_SPEED_UNKNOWN:
2369         case USB_SPEED_WIRELESS:
2370                 /* Should never happen because only LS/FS/HS endpoints will get
2371                  * added to the endpoint list.
2372                  */
2373                 return;
2374         }
2375
2376         if (tt_info)
2377                 tt_info->active_eps += 1;
2378         /* Insert the endpoint into the list, largest max packet size first. */
2379         list_for_each_entry(smaller_ep, &interval_bw->endpoints,
2380                         bw_endpoint_list) {
2381                 if (ep_bw->max_packet_size >=
2382                                 smaller_ep->bw_info.max_packet_size) {
2383                         /* Add the new ep before the smaller endpoint */
2384                         list_add_tail(&virt_ep->bw_endpoint_list,
2385                                         &smaller_ep->bw_endpoint_list);
2386                         return;
2387                 }
2388         }
2389         /* Add the new endpoint at the end of the list. */
2390         list_add_tail(&virt_ep->bw_endpoint_list,
2391                         &interval_bw->endpoints);
2392 }
2393
2394 void xhci_update_tt_active_eps(struct xhci_hcd *xhci,
2395                 struct xhci_virt_device *virt_dev,
2396                 int old_active_eps)
2397 {
2398         struct xhci_root_port_bw_info *rh_bw_info;
2399         if (!virt_dev->tt_info)
2400                 return;
2401
2402         rh_bw_info = &xhci->rh_bw[virt_dev->real_port - 1];
2403         if (old_active_eps == 0 &&
2404                                 virt_dev->tt_info->active_eps != 0) {
2405                 rh_bw_info->num_active_tts += 1;
2406                 rh_bw_info->bw_table.bw_used += TT_HS_OVERHEAD;
2407         } else if (old_active_eps != 0 &&
2408                                 virt_dev->tt_info->active_eps == 0) {
2409                 rh_bw_info->num_active_tts -= 1;
2410                 rh_bw_info->bw_table.bw_used -= TT_HS_OVERHEAD;
2411         }
2412 }
2413
2414 static int xhci_reserve_bandwidth(struct xhci_hcd *xhci,
2415                 struct xhci_virt_device *virt_dev,
2416                 struct xhci_container_ctx *in_ctx)
2417 {
2418         struct xhci_bw_info ep_bw_info[31];
2419         int i;
2420         struct xhci_input_control_ctx *ctrl_ctx;
2421         int old_active_eps = 0;
2422
2423         if (virt_dev->tt_info)
2424                 old_active_eps = virt_dev->tt_info->active_eps;
2425
2426         ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
2427         if (!ctrl_ctx) {
2428                 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
2429                                 __func__);
2430                 return -ENOMEM;
2431         }
2432
2433         for (i = 0; i < 31; i++) {
2434                 if (!EP_IS_ADDED(ctrl_ctx, i) && !EP_IS_DROPPED(ctrl_ctx, i))
2435                         continue;
2436
2437                 /* Make a copy of the BW info in case we need to revert this */
2438                 memcpy(&ep_bw_info[i], &virt_dev->eps[i].bw_info,
2439                                 sizeof(ep_bw_info[i]));
2440                 /* Drop the endpoint from the interval table if the endpoint is
2441                  * being dropped or changed.
2442                  */
2443                 if (EP_IS_DROPPED(ctrl_ctx, i))
2444                         xhci_drop_ep_from_interval_table(xhci,
2445                                         &virt_dev->eps[i].bw_info,
2446                                         virt_dev->bw_table,
2447                                         virt_dev->udev,
2448                                         &virt_dev->eps[i],
2449                                         virt_dev->tt_info);
2450         }
2451         /* Overwrite the information stored in the endpoints' bw_info */
2452         xhci_update_bw_info(xhci, virt_dev->in_ctx, ctrl_ctx, virt_dev);
2453         for (i = 0; i < 31; i++) {
2454                 /* Add any changed or added endpoints to the interval table */
2455                 if (EP_IS_ADDED(ctrl_ctx, i))
2456                         xhci_add_ep_to_interval_table(xhci,
2457                                         &virt_dev->eps[i].bw_info,
2458                                         virt_dev->bw_table,
2459                                         virt_dev->udev,
2460                                         &virt_dev->eps[i],
2461                                         virt_dev->tt_info);
2462         }
2463
2464         if (!xhci_check_bw_table(xhci, virt_dev, old_active_eps)) {
2465                 /* Ok, this fits in the bandwidth we have.
2466                  * Update the number of active TTs.
2467                  */
2468                 xhci_update_tt_active_eps(xhci, virt_dev, old_active_eps);
2469                 return 0;
2470         }
2471
2472         /* We don't have enough bandwidth for this, revert the stored info. */
2473         for (i = 0; i < 31; i++) {
2474                 if (!EP_IS_ADDED(ctrl_ctx, i) && !EP_IS_DROPPED(ctrl_ctx, i))
2475                         continue;
2476
2477                 /* Drop the new copies of any added or changed endpoints from
2478                  * the interval table.
2479                  */
2480                 if (EP_IS_ADDED(ctrl_ctx, i)) {
2481                         xhci_drop_ep_from_interval_table(xhci,
2482                                         &virt_dev->eps[i].bw_info,
2483                                         virt_dev->bw_table,
2484                                         virt_dev->udev,
2485                                         &virt_dev->eps[i],
2486                                         virt_dev->tt_info);
2487                 }
2488                 /* Revert the endpoint back to its old information */
2489                 memcpy(&virt_dev->eps[i].bw_info, &ep_bw_info[i],
2490                                 sizeof(ep_bw_info[i]));
2491                 /* Add any changed or dropped endpoints back into the table */
2492                 if (EP_IS_DROPPED(ctrl_ctx, i))
2493                         xhci_add_ep_to_interval_table(xhci,
2494                                         &virt_dev->eps[i].bw_info,
2495                                         virt_dev->bw_table,
2496                                         virt_dev->udev,
2497                                         &virt_dev->eps[i],
2498                                         virt_dev->tt_info);
2499         }
2500         return -ENOMEM;
2501 }
2502
2503
2504 /* Issue a configure endpoint command or evaluate context command
2505  * and wait for it to finish.
2506  */
2507 static int xhci_configure_endpoint(struct xhci_hcd *xhci,
2508                 struct usb_device *udev,
2509                 struct xhci_command *command,
2510                 bool ctx_change, bool must_succeed)
2511 {
2512         int ret;
2513         int timeleft;
2514         unsigned long flags;
2515         struct xhci_container_ctx *in_ctx;
2516         struct xhci_input_control_ctx *ctrl_ctx;
2517         struct completion *cmd_completion;
2518         u32 *cmd_status;
2519         struct xhci_virt_device *virt_dev;
2520         union xhci_trb *cmd_trb;
2521
2522         spin_lock_irqsave(&xhci->lock, flags);
2523         virt_dev = xhci->devs[udev->slot_id];
2524
2525         if (command)
2526                 in_ctx = command->in_ctx;
2527         else
2528                 in_ctx = virt_dev->in_ctx;
2529         ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
2530         if (!ctrl_ctx) {
2531                 spin_unlock_irqrestore(&xhci->lock, flags);
2532                 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
2533                                 __func__);
2534                 return -ENOMEM;
2535         }
2536
2537         if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK) &&
2538                         xhci_reserve_host_resources(xhci, ctrl_ctx)) {
2539                 spin_unlock_irqrestore(&xhci->lock, flags);
2540                 xhci_warn(xhci, "Not enough host resources, "
2541                                 "active endpoint contexts = %u\n",
2542                                 xhci->num_active_eps);
2543                 return -ENOMEM;
2544         }
2545         if ((xhci->quirks & XHCI_SW_BW_CHECKING) &&
2546                         xhci_reserve_bandwidth(xhci, virt_dev, in_ctx)) {
2547                 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK))
2548                         xhci_free_host_resources(xhci, ctrl_ctx);
2549                 spin_unlock_irqrestore(&xhci->lock, flags);
2550                 xhci_warn(xhci, "Not enough bandwidth\n");
2551                 return -ENOMEM;
2552         }
2553
2554         if (command) {
2555                 cmd_completion = command->completion;
2556                 cmd_status = &command->status;
2557                 command->command_trb = xhci->cmd_ring->enqueue;
2558
2559                 /* Enqueue pointer can be left pointing to the link TRB,
2560                  * we must handle that
2561                  */
2562                 if (TRB_TYPE_LINK_LE32(command->command_trb->link.control))
2563                         command->command_trb =
2564                                 xhci->cmd_ring->enq_seg->next->trbs;
2565
2566                 list_add_tail(&command->cmd_list, &virt_dev->cmd_list);
2567         } else {
2568                 cmd_completion = &virt_dev->cmd_completion;
2569                 cmd_status = &virt_dev->cmd_status;
2570         }
2571         init_completion(cmd_completion);
2572
2573         cmd_trb = xhci->cmd_ring->dequeue;
2574         if (!ctx_change)
2575                 ret = xhci_queue_configure_endpoint(xhci, in_ctx->dma,
2576                                 udev->slot_id, must_succeed);
2577         else
2578                 ret = xhci_queue_evaluate_context(xhci, in_ctx->dma,
2579                                 udev->slot_id, must_succeed);
2580         if (ret < 0) {
2581                 if (command)
2582                         list_del(&command->cmd_list);
2583                 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK))
2584                         xhci_free_host_resources(xhci, ctrl_ctx);
2585                 spin_unlock_irqrestore(&xhci->lock, flags);
2586                 xhci_dbg(xhci, "FIXME allocate a new ring segment\n");
2587                 return -ENOMEM;
2588         }
2589         xhci_ring_cmd_db(xhci);
2590         spin_unlock_irqrestore(&xhci->lock, flags);
2591
2592         /* Wait for the configure endpoint command to complete */
2593         timeleft = wait_for_completion_interruptible_timeout(
2594                         cmd_completion,
2595                         XHCI_CMD_DEFAULT_TIMEOUT);
2596         if (timeleft <= 0) {
2597                 xhci_warn(xhci, "%s while waiting for %s command\n",
2598                                 timeleft == 0 ? "Timeout" : "Signal",
2599                                 ctx_change == 0 ?
2600                                         "configure endpoint" :
2601                                         "evaluate context");
2602                 /* cancel the configure endpoint command */
2603                 ret = xhci_cancel_cmd(xhci, command, cmd_trb);
2604                 if (ret < 0)
2605                         return ret;
2606                 return -ETIME;
2607         }
2608
2609         if (!ctx_change)
2610                 ret = xhci_configure_endpoint_result(xhci, udev, cmd_status);
2611         else
2612                 ret = xhci_evaluate_context_result(xhci, udev, cmd_status);
2613
2614         if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) {
2615                 spin_lock_irqsave(&xhci->lock, flags);
2616                 /* If the command failed, remove the reserved resources.
2617                  * Otherwise, clean up the estimate to include dropped eps.
2618                  */
2619                 if (ret)
2620                         xhci_free_host_resources(xhci, ctrl_ctx);
2621                 else
2622                         xhci_finish_resource_reservation(xhci, ctrl_ctx);
2623                 spin_unlock_irqrestore(&xhci->lock, flags);
2624         }
2625         return ret;
2626 }
2627
2628 /* Called after one or more calls to xhci_add_endpoint() or
2629  * xhci_drop_endpoint().  If this call fails, the USB core is expected
2630  * to call xhci_reset_bandwidth().
2631  *
2632  * Since we are in the middle of changing either configuration or
2633  * installing a new alt setting, the USB core won't allow URBs to be
2634  * enqueued for any endpoint on the old config or interface.  Nothing
2635  * else should be touching the xhci->devs[slot_id] structure, so we
2636  * don't need to take the xhci->lock for manipulating that.
2637  */
2638 int xhci_check_bandwidth(struct usb_hcd *hcd, struct usb_device *udev)
2639 {
2640         int i;
2641         int ret = 0;
2642         struct xhci_hcd *xhci;
2643         struct xhci_virt_device *virt_dev;
2644         struct xhci_input_control_ctx *ctrl_ctx;
2645         struct xhci_slot_ctx *slot_ctx;
2646
2647         ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
2648         if (ret <= 0)
2649                 return ret;
2650         xhci = hcd_to_xhci(hcd);
2651         if (xhci->xhc_state & XHCI_STATE_DYING)
2652                 return -ENODEV;
2653
2654         xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
2655         virt_dev = xhci->devs[udev->slot_id];
2656
2657         /* See section 4.6.6 - A0 = 1; A1 = D0 = D1 = 0 */
2658         ctrl_ctx = xhci_get_input_control_ctx(xhci, virt_dev->in_ctx);
2659         if (!ctrl_ctx) {
2660                 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
2661                                 __func__);
2662                 return -ENOMEM;
2663         }
2664         ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
2665         ctrl_ctx->add_flags &= cpu_to_le32(~EP0_FLAG);
2666         ctrl_ctx->drop_flags &= cpu_to_le32(~(SLOT_FLAG | EP0_FLAG));
2667
2668         /* Don't issue the command if there's no endpoints to update. */
2669         if (ctrl_ctx->add_flags == cpu_to_le32(SLOT_FLAG) &&
2670                         ctrl_ctx->drop_flags == 0)
2671                 return 0;
2672
2673         xhci_dbg(xhci, "New Input Control Context:\n");
2674         slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
2675         xhci_dbg_ctx(xhci, virt_dev->in_ctx,
2676                      LAST_CTX_TO_EP_NUM(le32_to_cpu(slot_ctx->dev_info)));
2677
2678         ret = xhci_configure_endpoint(xhci, udev, NULL,
2679                         false, false);
2680         if (ret) {
2681                 /* Callee should call reset_bandwidth() */
2682                 return ret;
2683         }
2684
2685         xhci_dbg(xhci, "Output context after successful config ep cmd:\n");
2686         xhci_dbg_ctx(xhci, virt_dev->out_ctx,
2687                      LAST_CTX_TO_EP_NUM(le32_to_cpu(slot_ctx->dev_info)));
2688
2689         /* Free any rings that were dropped, but not changed. */
2690         for (i = 1; i < 31; ++i) {
2691                 if ((le32_to_cpu(ctrl_ctx->drop_flags) & (1 << (i + 1))) &&
2692                     !(le32_to_cpu(ctrl_ctx->add_flags) & (1 << (i + 1))))
2693                         xhci_free_or_cache_endpoint_ring(xhci, virt_dev, i);
2694         }
2695         xhci_zero_in_ctx(xhci, virt_dev);
2696         /*
2697          * Install any rings for completely new endpoints or changed endpoints,
2698          * and free or cache any old rings from changed endpoints.
2699          */
2700         for (i = 1; i < 31; ++i) {
2701                 if (!virt_dev->eps[i].new_ring)
2702                         continue;
2703                 /* Only cache or free the old ring if it exists.
2704                  * It may not if this is the first add of an endpoint.
2705                  */
2706                 if (virt_dev->eps[i].ring) {
2707                         xhci_free_or_cache_endpoint_ring(xhci, virt_dev, i);
2708                 }
2709                 virt_dev->eps[i].ring = virt_dev->eps[i].new_ring;
2710                 virt_dev->eps[i].new_ring = NULL;
2711         }
2712
2713         return ret;
2714 }
2715
2716 void xhci_reset_bandwidth(struct usb_hcd *hcd, struct usb_device *udev)
2717 {
2718         struct xhci_hcd *xhci;
2719         struct xhci_virt_device *virt_dev;
2720         int i, ret;
2721
2722         ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
2723         if (ret <= 0)
2724                 return;
2725         xhci = hcd_to_xhci(hcd);
2726
2727         xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
2728         virt_dev = xhci->devs[udev->slot_id];
2729         /* Free any rings allocated for added endpoints */
2730         for (i = 0; i < 31; ++i) {
2731                 if (virt_dev->eps[i].new_ring) {
2732                         xhci_ring_free(xhci, virt_dev->eps[i].new_ring);
2733                         virt_dev->eps[i].new_ring = NULL;
2734                 }
2735         }
2736         xhci_zero_in_ctx(xhci, virt_dev);
2737 }
2738
2739 static void xhci_setup_input_ctx_for_config_ep(struct xhci_hcd *xhci,
2740                 struct xhci_container_ctx *in_ctx,
2741                 struct xhci_container_ctx *out_ctx,
2742                 struct xhci_input_control_ctx *ctrl_ctx,
2743                 u32 add_flags, u32 drop_flags)
2744 {
2745         ctrl_ctx->add_flags = cpu_to_le32(add_flags);
2746         ctrl_ctx->drop_flags = cpu_to_le32(drop_flags);
2747         xhci_slot_copy(xhci, in_ctx, out_ctx);
2748         ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
2749
2750         xhci_dbg(xhci, "Input Context:\n");
2751         xhci_dbg_ctx(xhci, in_ctx, xhci_last_valid_endpoint(add_flags));
2752 }
2753
2754 static void xhci_setup_input_ctx_for_quirk(struct xhci_hcd *xhci,
2755                 unsigned int slot_id, unsigned int ep_index,
2756                 struct xhci_dequeue_state *deq_state)
2757 {
2758         struct xhci_input_control_ctx *ctrl_ctx;
2759         struct xhci_container_ctx *in_ctx;
2760         struct xhci_ep_ctx *ep_ctx;
2761         u32 added_ctxs;
2762         dma_addr_t addr;
2763
2764         in_ctx = xhci->devs[slot_id]->in_ctx;
2765         ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
2766         if (!ctrl_ctx) {
2767                 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
2768                                 __func__);
2769                 return;
2770         }
2771
2772         xhci_endpoint_copy(xhci, xhci->devs[slot_id]->in_ctx,
2773                         xhci->devs[slot_id]->out_ctx, ep_index);
2774         ep_ctx = xhci_get_ep_ctx(xhci, in_ctx, ep_index);
2775         addr = xhci_trb_virt_to_dma(deq_state->new_deq_seg,
2776                         deq_state->new_deq_ptr);
2777         if (addr == 0) {
2778                 xhci_warn(xhci, "WARN Cannot submit config ep after "
2779                                 "reset ep command\n");
2780                 xhci_warn(xhci, "WARN deq seg = %p, deq ptr = %p\n",
2781                                 deq_state->new_deq_seg,
2782                                 deq_state->new_deq_ptr);
2783                 return;
2784         }
2785         ep_ctx->deq = cpu_to_le64(addr | deq_state->new_cycle_state);
2786
2787         added_ctxs = xhci_get_endpoint_flag_from_index(ep_index);
2788         xhci_setup_input_ctx_for_config_ep(xhci, xhci->devs[slot_id]->in_ctx,
2789                         xhci->devs[slot_id]->out_ctx, ctrl_ctx,
2790                         added_ctxs, added_ctxs);
2791 }
2792
2793 void xhci_cleanup_stalled_ring(struct xhci_hcd *xhci,
2794                 struct usb_device *udev, unsigned int ep_index)
2795 {
2796         struct xhci_dequeue_state deq_state;
2797         struct xhci_virt_ep *ep;
2798
2799         xhci_dbg(xhci, "Cleaning up stalled endpoint ring\n");
2800         ep = &xhci->devs[udev->slot_id]->eps[ep_index];
2801         /* We need to move the HW's dequeue pointer past this TD,
2802          * or it will attempt to resend it on the next doorbell ring.
2803          */
2804         xhci_find_new_dequeue_state(xhci, udev->slot_id,
2805                         ep_index, ep->stopped_stream, ep->stopped_td,
2806                         &deq_state);
2807
2808         /* HW with the reset endpoint quirk will use the saved dequeue state to
2809          * issue a configure endpoint command later.
2810          */
2811         if (!(xhci->quirks & XHCI_RESET_EP_QUIRK)) {
2812                 xhci_dbg(xhci, "Queueing new dequeue state\n");
2813                 xhci_queue_new_dequeue_state(xhci, udev->slot_id,
2814                                 ep_index, ep->stopped_stream, &deq_state);
2815         } else {
2816                 /* Better hope no one uses the input context between now and the
2817                  * reset endpoint completion!
2818                  * XXX: No idea how this hardware will react when stream rings
2819                  * are enabled.
2820                  */
2821                 xhci_dbg(xhci, "Setting up input context for "
2822                                 "configure endpoint command\n");
2823                 xhci_setup_input_ctx_for_quirk(xhci, udev->slot_id,
2824                                 ep_index, &deq_state);
2825         }
2826 }
2827
2828 /* Deal with stalled endpoints.  The core should have sent the control message
2829  * to clear the halt condition.  However, we need to make the xHCI hardware
2830  * reset its sequence number, since a device will expect a sequence number of
2831  * zero after the halt condition is cleared.
2832  * Context: in_interrupt
2833  */
2834 void xhci_endpoint_reset(struct usb_hcd *hcd,
2835                 struct usb_host_endpoint *ep)
2836 {
2837         struct xhci_hcd *xhci;
2838         struct usb_device *udev;
2839         unsigned int ep_index;
2840         unsigned long flags;
2841         int ret;
2842         struct xhci_virt_ep *virt_ep;
2843
2844         xhci = hcd_to_xhci(hcd);
2845         udev = (struct usb_device *) ep->hcpriv;
2846         /* Called with a root hub endpoint (or an endpoint that wasn't added
2847          * with xhci_add_endpoint()
2848          */
2849         if (!ep->hcpriv)
2850                 return;
2851         ep_index = xhci_get_endpoint_index(&ep->desc);
2852         virt_ep = &xhci->devs[udev->slot_id]->eps[ep_index];
2853         if (!virt_ep->stopped_td) {
2854                 xhci_dbg(xhci, "Endpoint 0x%x not halted, refusing to reset.\n",
2855                                 ep->desc.bEndpointAddress);
2856                 return;
2857         }
2858         if (usb_endpoint_xfer_control(&ep->desc)) {
2859                 xhci_dbg(xhci, "Control endpoint stall already handled.\n");
2860                 return;
2861         }
2862
2863         xhci_dbg(xhci, "Queueing reset endpoint command\n");
2864         spin_lock_irqsave(&xhci->lock, flags);
2865         ret = xhci_queue_reset_ep(xhci, udev->slot_id, ep_index);
2866         /*
2867          * Can't change the ring dequeue pointer until it's transitioned to the
2868          * stopped state, which is only upon a successful reset endpoint
2869          * command.  Better hope that last command worked!
2870          */
2871         if (!ret) {
2872                 xhci_cleanup_stalled_ring(xhci, udev, ep_index);
2873                 kfree(virt_ep->stopped_td);
2874                 xhci_ring_cmd_db(xhci);
2875         }
2876         virt_ep->stopped_td = NULL;
2877         virt_ep->stopped_trb = NULL;
2878         virt_ep->stopped_stream = 0;
2879         spin_unlock_irqrestore(&xhci->lock, flags);
2880
2881         if (ret)
2882                 xhci_warn(xhci, "FIXME allocate a new ring segment\n");
2883 }
2884
2885 static int xhci_check_streams_endpoint(struct xhci_hcd *xhci,
2886                 struct usb_device *udev, struct usb_host_endpoint *ep,
2887                 unsigned int slot_id)
2888 {
2889         int ret;
2890         unsigned int ep_index;
2891         unsigned int ep_state;
2892
2893         if (!ep)
2894                 return -EINVAL;
2895         ret = xhci_check_args(xhci_to_hcd(xhci), udev, ep, 1, true, __func__);
2896         if (ret <= 0)
2897                 return -EINVAL;
2898         if (ep->ss_ep_comp.bmAttributes == 0) {
2899                 xhci_warn(xhci, "WARN: SuperSpeed Endpoint Companion"
2900                                 " descriptor for ep 0x%x does not support streams\n",
2901                                 ep->desc.bEndpointAddress);
2902                 return -EINVAL;
2903         }
2904
2905         ep_index = xhci_get_endpoint_index(&ep->desc);
2906         ep_state = xhci->devs[slot_id]->eps[ep_index].ep_state;
2907         if (ep_state & EP_HAS_STREAMS ||
2908                         ep_state & EP_GETTING_STREAMS) {
2909                 xhci_warn(xhci, "WARN: SuperSpeed bulk endpoint 0x%x "
2910                                 "already has streams set up.\n",
2911                                 ep->desc.bEndpointAddress);
2912                 xhci_warn(xhci, "Send email to xHCI maintainer and ask for "
2913                                 "dynamic stream context array reallocation.\n");
2914                 return -EINVAL;
2915         }
2916         if (!list_empty(&xhci->devs[slot_id]->eps[ep_index].ring->td_list)) {
2917                 xhci_warn(xhci, "Cannot setup streams for SuperSpeed bulk "
2918                                 "endpoint 0x%x; URBs are pending.\n",
2919                                 ep->desc.bEndpointAddress);
2920                 return -EINVAL;
2921         }
2922         return 0;
2923 }
2924
2925 static void xhci_calculate_streams_entries(struct xhci_hcd *xhci,
2926                 unsigned int *num_streams, unsigned int *num_stream_ctxs)
2927 {
2928         unsigned int max_streams;
2929
2930         /* The stream context array size must be a power of two */
2931         *num_stream_ctxs = roundup_pow_of_two(*num_streams);
2932         /*
2933          * Find out how many primary stream array entries the host controller
2934          * supports.  Later we may use secondary stream arrays (similar to 2nd
2935          * level page entries), but that's an optional feature for xHCI host
2936          * controllers. xHCs must support at least 4 stream IDs.
2937          */
2938         max_streams = HCC_MAX_PSA(xhci->hcc_params);
2939         if (*num_stream_ctxs > max_streams) {
2940                 xhci_dbg(xhci, "xHCI HW only supports %u stream ctx entries.\n",
2941                                 max_streams);
2942                 *num_stream_ctxs = max_streams;
2943                 *num_streams = max_streams;
2944         }
2945 }
2946
2947 /* Returns an error code if one of the endpoint already has streams.
2948  * This does not change any data structures, it only checks and gathers
2949  * information.
2950  */
2951 static int xhci_calculate_streams_and_bitmask(struct xhci_hcd *xhci,
2952                 struct usb_device *udev,
2953                 struct usb_host_endpoint **eps, unsigned int num_eps,
2954                 unsigned int *num_streams, u32 *changed_ep_bitmask)
2955 {
2956         unsigned int max_streams;
2957         unsigned int endpoint_flag;
2958         int i;
2959         int ret;
2960
2961         for (i = 0; i < num_eps; i++) {
2962                 ret = xhci_check_streams_endpoint(xhci, udev,
2963                                 eps[i], udev->slot_id);
2964                 if (ret < 0)
2965                         return ret;
2966
2967                 max_streams = usb_ss_max_streams(&eps[i]->ss_ep_comp);
2968                 if (max_streams < (*num_streams - 1)) {
2969                         xhci_dbg(xhci, "Ep 0x%x only supports %u stream IDs.\n",
2970                                         eps[i]->desc.bEndpointAddress,
2971                                         max_streams);
2972                         *num_streams = max_streams+1;
2973                 }
2974
2975                 endpoint_flag = xhci_get_endpoint_flag(&eps[i]->desc);
2976                 if (*changed_ep_bitmask & endpoint_flag)
2977                         return -EINVAL;
2978                 *changed_ep_bitmask |= endpoint_flag;
2979         }
2980         return 0;
2981 }
2982
2983 static u32 xhci_calculate_no_streams_bitmask(struct xhci_hcd *xhci,
2984                 struct usb_device *udev,
2985                 struct usb_host_endpoint **eps, unsigned int num_eps)
2986 {
2987         u32 changed_ep_bitmask = 0;
2988         unsigned int slot_id;
2989         unsigned int ep_index;
2990         unsigned int ep_state;
2991         int i;
2992
2993         slot_id = udev->slot_id;
2994         if (!xhci->devs[slot_id])
2995                 return 0;
2996
2997         for (i = 0; i < num_eps; i++) {
2998                 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
2999                 ep_state = xhci->devs[slot_id]->eps[ep_index].ep_state;
3000                 /* Are streams already being freed for the endpoint? */
3001                 if (ep_state & EP_GETTING_NO_STREAMS) {
3002                         xhci_warn(xhci, "WARN Can't disable streams for "
3003                                         "endpoint 0x%x, "
3004                                         "streams are being disabled already\n",
3005                                         eps[i]->desc.bEndpointAddress);
3006                         return 0;
3007                 }
3008                 /* Are there actually any streams to free? */
3009                 if (!(ep_state & EP_HAS_STREAMS) &&
3010                                 !(ep_state & EP_GETTING_STREAMS)) {
3011                         xhci_warn(xhci, "WARN Can't disable streams for "
3012                                         "endpoint 0x%x, "
3013                                         "streams are already disabled!\n",
3014                                         eps[i]->desc.bEndpointAddress);
3015                         xhci_warn(xhci, "WARN xhci_free_streams() called "
3016                                         "with non-streams endpoint\n");
3017                         return 0;
3018                 }
3019                 changed_ep_bitmask |= xhci_get_endpoint_flag(&eps[i]->desc);
3020         }
3021         return changed_ep_bitmask;
3022 }
3023
3024 /*
3025  * The USB device drivers use this function (though the HCD interface in USB
3026  * core) to prepare a set of bulk endpoints to use streams.  Streams are used to
3027  * coordinate mass storage command queueing across multiple endpoints (basically
3028  * a stream ID == a task ID).
3029  *
3030  * Setting up streams involves allocating the same size stream context array
3031  * for each endpoint and issuing a configure endpoint command for all endpoints.
3032  *
3033  * Don't allow the call to succeed if one endpoint only supports one stream
3034  * (which means it doesn't support streams at all).
3035  *
3036  * Drivers may get less stream IDs than they asked for, if the host controller
3037  * hardware or endpoints claim they can't support the number of requested
3038  * stream IDs.
3039  */
3040 int xhci_alloc_streams(struct usb_hcd *hcd, struct usb_device *udev,
3041                 struct usb_host_endpoint **eps, unsigned int num_eps,
3042                 unsigned int num_streams, gfp_t mem_flags)
3043 {
3044         int i, ret;
3045         struct xhci_hcd *xhci;
3046         struct xhci_virt_device *vdev;
3047         struct xhci_command *config_cmd;
3048         struct xhci_input_control_ctx *ctrl_ctx;
3049         unsigned int ep_index;
3050         unsigned int num_stream_ctxs;
3051         unsigned long flags;
3052         u32 changed_ep_bitmask = 0;
3053
3054         if (!eps)
3055                 return -EINVAL;
3056
3057         /* Add one to the number of streams requested to account for
3058          * stream 0 that is reserved for xHCI usage.
3059          */
3060         num_streams += 1;
3061         xhci = hcd_to_xhci(hcd);
3062         xhci_dbg(xhci, "Driver wants %u stream IDs (including stream 0).\n",
3063                         num_streams);
3064
3065         config_cmd = xhci_alloc_command(xhci, true, true, mem_flags);
3066         if (!config_cmd) {
3067                 xhci_dbg(xhci, "Could not allocate xHCI command structure.\n");
3068                 return -ENOMEM;
3069         }
3070         ctrl_ctx = xhci_get_input_control_ctx(xhci, config_cmd->in_ctx);
3071         if (!ctrl_ctx) {
3072                 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
3073                                 __func__);
3074                 xhci_free_command(xhci, config_cmd);
3075                 return -ENOMEM;
3076         }
3077
3078         /* Check to make sure all endpoints are not already configured for
3079          * streams.  While we're at it, find the maximum number of streams that
3080          * all the endpoints will support and check for duplicate endpoints.
3081          */
3082         spin_lock_irqsave(&xhci->lock, flags);
3083         ret = xhci_calculate_streams_and_bitmask(xhci, udev, eps,
3084                         num_eps, &num_streams, &changed_ep_bitmask);
3085         if (ret < 0) {
3086                 xhci_free_command(xhci, config_cmd);
3087                 spin_unlock_irqrestore(&xhci->lock, flags);
3088                 return ret;
3089         }
3090         if (num_streams <= 1) {
3091                 xhci_warn(xhci, "WARN: endpoints can't handle "
3092                                 "more than one stream.\n");
3093                 xhci_free_command(xhci, config_cmd);
3094                 spin_unlock_irqrestore(&xhci->lock, flags);
3095                 return -EINVAL;
3096         }
3097         vdev = xhci->devs[udev->slot_id];
3098         /* Mark each endpoint as being in transition, so
3099          * xhci_urb_enqueue() will reject all URBs.
3100          */
3101         for (i = 0; i < num_eps; i++) {
3102                 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3103                 vdev->eps[ep_index].ep_state |= EP_GETTING_STREAMS;
3104         }
3105         spin_unlock_irqrestore(&xhci->lock, flags);
3106
3107         /* Setup internal data structures and allocate HW data structures for
3108          * streams (but don't install the HW structures in the input context
3109          * until we're sure all memory allocation succeeded).
3110          */
3111         xhci_calculate_streams_entries(xhci, &num_streams, &num_stream_ctxs);
3112         xhci_dbg(xhci, "Need %u stream ctx entries for %u stream IDs.\n",
3113                         num_stream_ctxs, num_streams);
3114
3115         for (i = 0; i < num_eps; i++) {
3116                 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3117                 vdev->eps[ep_index].stream_info = xhci_alloc_stream_info(xhci,
3118                                 num_stream_ctxs,
3119                                 num_streams, mem_flags);
3120                 if (!vdev->eps[ep_index].stream_info)
3121                         goto cleanup;
3122                 /* Set maxPstreams in endpoint context and update deq ptr to
3123                  * point to stream context array. FIXME
3124                  */
3125         }
3126
3127         /* Set up the input context for a configure endpoint command. */
3128         for (i = 0; i < num_eps; i++) {
3129                 struct xhci_ep_ctx *ep_ctx;
3130
3131                 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3132                 ep_ctx = xhci_get_ep_ctx(xhci, config_cmd->in_ctx, ep_index);
3133
3134                 xhci_endpoint_copy(xhci, config_cmd->in_ctx,
3135                                 vdev->out_ctx, ep_index);
3136                 xhci_setup_streams_ep_input_ctx(xhci, ep_ctx,
3137                                 vdev->eps[ep_index].stream_info);
3138         }
3139         /* Tell the HW to drop its old copy of the endpoint context info
3140          * and add the updated copy from the input context.
3141          */
3142         xhci_setup_input_ctx_for_config_ep(xhci, config_cmd->in_ctx,
3143                         vdev->out_ctx, ctrl_ctx,
3144                         changed_ep_bitmask, changed_ep_bitmask);
3145
3146         /* Issue and wait for the configure endpoint command */
3147         ret = xhci_configure_endpoint(xhci, udev, config_cmd,
3148                         false, false);
3149
3150         /* xHC rejected the configure endpoint command for some reason, so we
3151          * leave the old ring intact and free our internal streams data
3152          * structure.
3153          */
3154         if (ret < 0)
3155                 goto cleanup;
3156
3157         spin_lock_irqsave(&xhci->lock, flags);
3158         for (i = 0; i < num_eps; i++) {
3159                 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3160                 vdev->eps[ep_index].ep_state &= ~EP_GETTING_STREAMS;
3161                 xhci_dbg(xhci, "Slot %u ep ctx %u now has streams.\n",
3162                          udev->slot_id, ep_index);
3163                 vdev->eps[ep_index].ep_state |= EP_HAS_STREAMS;
3164         }
3165         xhci_free_command(xhci, config_cmd);
3166         spin_unlock_irqrestore(&xhci->lock, flags);
3167
3168         /* Subtract 1 for stream 0, which drivers can't use */
3169         return num_streams - 1;
3170
3171 cleanup:
3172         /* If it didn't work, free the streams! */
3173         for (i = 0; i < num_eps; i++) {
3174                 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3175                 xhci_free_stream_info(xhci, vdev->eps[ep_index].stream_info);
3176                 vdev->eps[ep_index].stream_info = NULL;
3177                 /* FIXME Unset maxPstreams in endpoint context and
3178                  * update deq ptr to point to normal string ring.
3179                  */
3180                 vdev->eps[ep_index].ep_state &= ~EP_GETTING_STREAMS;
3181                 vdev->eps[ep_index].ep_state &= ~EP_HAS_STREAMS;
3182                 xhci_endpoint_zero(xhci, vdev, eps[i]);
3183         }
3184         xhci_free_command(xhci, config_cmd);
3185         return -ENOMEM;
3186 }
3187
3188 /* Transition the endpoint from using streams to being a "normal" endpoint
3189  * without streams.
3190  *
3191  * Modify the endpoint context state, submit a configure endpoint command,
3192  * and free all endpoint rings for streams if that completes successfully.
3193  */
3194 int xhci_free_streams(struct usb_hcd *hcd, struct usb_device *udev,
3195                 struct usb_host_endpoint **eps, unsigned int num_eps,
3196                 gfp_t mem_flags)
3197 {
3198         int i, ret;
3199         struct xhci_hcd *xhci;
3200         struct xhci_virt_device *vdev;
3201         struct xhci_command *command;
3202         struct xhci_input_control_ctx *ctrl_ctx;
3203         unsigned int ep_index;
3204         unsigned long flags;
3205         u32 changed_ep_bitmask;
3206
3207         xhci = hcd_to_xhci(hcd);
3208         vdev = xhci->devs[udev->slot_id];
3209
3210         /* Set up a configure endpoint command to remove the streams rings */
3211         spin_lock_irqsave(&xhci->lock, flags);
3212         changed_ep_bitmask = xhci_calculate_no_streams_bitmask(xhci,
3213                         udev, eps, num_eps);
3214         if (changed_ep_bitmask == 0) {
3215                 spin_unlock_irqrestore(&xhci->lock, flags);
3216                 return -EINVAL;
3217         }
3218
3219         /* Use the xhci_command structure from the first endpoint.  We may have
3220          * allocated too many, but the driver may call xhci_free_streams() for
3221          * each endpoint it grouped into one call to xhci_alloc_streams().
3222          */
3223         ep_index = xhci_get_endpoint_index(&eps[0]->desc);
3224         command = vdev->eps[ep_index].stream_info->free_streams_command;
3225         ctrl_ctx = xhci_get_input_control_ctx(xhci, command->in_ctx);
3226         if (!ctrl_ctx) {
3227                 spin_unlock_irqrestore(&xhci->lock, flags);
3228                 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
3229                                 __func__);
3230                 return -EINVAL;
3231         }
3232
3233         for (i = 0; i < num_eps; i++) {
3234                 struct xhci_ep_ctx *ep_ctx;
3235
3236                 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3237                 ep_ctx = xhci_get_ep_ctx(xhci, command->in_ctx, ep_index);
3238                 xhci->devs[udev->slot_id]->eps[ep_index].ep_state |=
3239                         EP_GETTING_NO_STREAMS;
3240
3241                 xhci_endpoint_copy(xhci, command->in_ctx,
3242                                 vdev->out_ctx, ep_index);
3243                 xhci_setup_no_streams_ep_input_ctx(xhci, ep_ctx,
3244                                 &vdev->eps[ep_index]);
3245         }
3246         xhci_setup_input_ctx_for_config_ep(xhci, command->in_ctx,
3247                         vdev->out_ctx, ctrl_ctx,
3248                         changed_ep_bitmask, changed_ep_bitmask);
3249         spin_unlock_irqrestore(&xhci->lock, flags);
3250
3251         /* Issue and wait for the configure endpoint command,
3252          * which must succeed.
3253          */
3254         ret = xhci_configure_endpoint(xhci, udev, command,
3255                         false, true);
3256
3257         /* xHC rejected the configure endpoint command for some reason, so we
3258          * leave the streams rings intact.
3259          */
3260         if (ret < 0)
3261                 return ret;
3262
3263         spin_lock_irqsave(&xhci->lock, flags);
3264         for (i = 0; i < num_eps; i++) {
3265                 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3266                 xhci_free_stream_info(xhci, vdev->eps[ep_index].stream_info);
3267                 vdev->eps[ep_index].stream_info = NULL;
3268                 /* FIXME Unset maxPstreams in endpoint context and
3269                  * update deq ptr to point to normal string ring.
3270                  */
3271                 vdev->eps[ep_index].ep_state &= ~EP_GETTING_NO_STREAMS;
3272                 vdev->eps[ep_index].ep_state &= ~EP_HAS_STREAMS;
3273         }
3274         spin_unlock_irqrestore(&xhci->lock, flags);
3275
3276         return 0;
3277 }
3278
3279 /*
3280  * Deletes endpoint resources for endpoints that were active before a Reset
3281  * Device command, or a Disable Slot command.  The Reset Device command leaves
3282  * the control endpoint intact, whereas the Disable Slot command deletes it.
3283  *
3284  * Must be called with xhci->lock held.
3285  */
3286 void xhci_free_device_endpoint_resources(struct xhci_hcd *xhci,
3287         struct xhci_virt_device *virt_dev, bool drop_control_ep)
3288 {
3289         int i;
3290         unsigned int num_dropped_eps = 0;
3291         unsigned int drop_flags = 0;
3292
3293         for (i = (drop_control_ep ? 0 : 1); i < 31; i++) {
3294                 if (virt_dev->eps[i].ring) {
3295                         drop_flags |= 1 << i;
3296                         num_dropped_eps++;
3297                 }
3298         }
3299         xhci->num_active_eps -= num_dropped_eps;
3300         if (num_dropped_eps)
3301                 xhci_dbg(xhci, "Dropped %u ep ctxs, flags = 0x%x, "
3302                                 "%u now active.\n",
3303                                 num_dropped_eps, drop_flags,
3304                                 xhci->num_active_eps);
3305 }
3306
3307 /*
3308  * This submits a Reset Device Command, which will set the device state to 0,
3309  * set the device address to 0, and disable all the endpoints except the default
3310  * control endpoint.  The USB core should come back and call
3311  * xhci_address_device(), and then re-set up the configuration.  If this is
3312  * called because of a usb_reset_and_verify_device(), then the old alternate
3313  * settings will be re-installed through the normal bandwidth allocation
3314  * functions.
3315  *
3316  * Wait for the Reset Device command to finish.  Remove all structures
3317  * associated with the endpoints that were disabled.  Clear the input device
3318  * structure?  Cache the rings?  Reset the control endpoint 0 max packet size?
3319  *
3320  * If the virt_dev to be reset does not exist or does not match the udev,
3321  * it means the device is lost, possibly due to the xHC restore error and
3322  * re-initialization during S3/S4. In this case, call xhci_alloc_dev() to
3323  * re-allocate the device.
3324  */
3325 int xhci_discover_or_reset_device(struct usb_hcd *hcd, struct usb_device *udev)
3326 {
3327         int ret, i;
3328         unsigned long flags;
3329         struct xhci_hcd *xhci;
3330         unsigned int slot_id;
3331         struct xhci_virt_device *virt_dev;
3332         struct xhci_command *reset_device_cmd;
3333         int timeleft;
3334         int last_freed_endpoint;
3335         struct xhci_slot_ctx *slot_ctx;
3336         int old_active_eps = 0;
3337
3338         ret = xhci_check_args(hcd, udev, NULL, 0, false, __func__);
3339         if (ret <= 0)
3340                 return ret;
3341         xhci = hcd_to_xhci(hcd);
3342         slot_id = udev->slot_id;
3343         virt_dev = xhci->devs[slot_id];
3344         if (!virt_dev) {
3345                 xhci_dbg(xhci, "The device to be reset with slot ID %u does "
3346                                 "not exist. Re-allocate the device\n", slot_id);
3347                 ret = xhci_alloc_dev(hcd, udev);
3348                 if (ret == 1)
3349                         return 0;
3350                 else
3351                         return -EINVAL;
3352         }
3353
3354         if (virt_dev->udev != udev) {
3355                 /* If the virt_dev and the udev does not match, this virt_dev
3356                  * may belong to another udev.
3357                  * Re-allocate the device.
3358                  */
3359                 xhci_dbg(xhci, "The device to be reset with slot ID %u does "
3360                                 "not match the udev. Re-allocate the device\n",
3361                                 slot_id);
3362                 ret = xhci_alloc_dev(hcd, udev);
3363                 if (ret == 1)
3364                         return 0;
3365                 else
3366                         return -EINVAL;
3367         }
3368
3369         /* If device is not setup, there is no point in resetting it */
3370         slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->out_ctx);
3371         if (GET_SLOT_STATE(le32_to_cpu(slot_ctx->dev_state)) ==
3372                                                 SLOT_STATE_DISABLED)
3373                 return 0;
3374
3375         xhci_dbg(xhci, "Resetting device with slot ID %u\n", slot_id);
3376         /* Allocate the command structure that holds the struct completion.
3377          * Assume we're in process context, since the normal device reset
3378          * process has to wait for the device anyway.  Storage devices are
3379          * reset as part of error handling, so use GFP_NOIO instead of
3380          * GFP_KERNEL.
3381          */
3382         reset_device_cmd = xhci_alloc_command(xhci, false, true, GFP_NOIO);
3383         if (!reset_device_cmd) {
3384                 xhci_dbg(xhci, "Couldn't allocate command structure.\n");
3385                 return -ENOMEM;
3386         }
3387
3388         /* Attempt to submit the Reset Device command to the command ring */
3389         spin_lock_irqsave(&xhci->lock, flags);
3390         reset_device_cmd->command_trb = xhci->cmd_ring->enqueue;
3391
3392         /* Enqueue pointer can be left pointing to the link TRB,
3393          * we must handle that
3394          */
3395         if (TRB_TYPE_LINK_LE32(reset_device_cmd->command_trb->link.control))
3396                 reset_device_cmd->command_trb =
3397                         xhci->cmd_ring->enq_seg->next->trbs;
3398
3399         list_add_tail(&reset_device_cmd->cmd_list, &virt_dev->cmd_list);
3400         ret = xhci_queue_reset_device(xhci, slot_id);
3401         if (ret) {
3402                 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
3403                 list_del(&reset_device_cmd->cmd_list);
3404                 spin_unlock_irqrestore(&xhci->lock, flags);
3405                 goto command_cleanup;
3406         }
3407         xhci_ring_cmd_db(xhci);
3408         spin_unlock_irqrestore(&xhci->lock, flags);
3409
3410         /* Wait for the Reset Device command to finish */
3411         timeleft = wait_for_completion_interruptible_timeout(
3412                         reset_device_cmd->completion,
3413                         USB_CTRL_SET_TIMEOUT);
3414         if (timeleft <= 0) {
3415                 xhci_warn(xhci, "%s while waiting for reset device command\n",
3416                                 timeleft == 0 ? "Timeout" : "Signal");
3417                 spin_lock_irqsave(&xhci->lock, flags);
3418                 /* The timeout might have raced with the event ring handler, so
3419                  * only delete from the list if the item isn't poisoned.
3420                  */
3421                 if (reset_device_cmd->cmd_list.next != LIST_POISON1)
3422                         list_del(&reset_device_cmd->cmd_list);
3423                 spin_unlock_irqrestore(&xhci->lock, flags);
3424                 ret = -ETIME;
3425                 goto command_cleanup;
3426         }
3427
3428         /* The Reset Device command can't fail, according to the 0.95/0.96 spec,
3429          * unless we tried to reset a slot ID that wasn't enabled,
3430          * or the device wasn't in the addressed or configured state.
3431          */
3432         ret = reset_device_cmd->status;
3433         switch (ret) {
3434         case COMP_EBADSLT: /* 0.95 completion code for bad slot ID */
3435         case COMP_CTX_STATE: /* 0.96 completion code for same thing */
3436                 xhci_dbg(xhci, "Can't reset device (slot ID %u) in %s state\n",
3437                                 slot_id,
3438                                 xhci_get_slot_state(xhci, virt_dev->out_ctx));
3439                 xhci_dbg(xhci, "Not freeing device rings.\n");
3440                 /* Don't treat this as an error.  May change my mind later. */
3441                 ret = 0;
3442                 goto command_cleanup;
3443         case COMP_SUCCESS:
3444                 xhci_dbg(xhci, "Successful reset device command.\n");
3445                 break;
3446         default:
3447                 if (xhci_is_vendor_info_code(xhci, ret))
3448                         break;
3449                 xhci_warn(xhci, "Unknown completion code %u for "
3450                                 "reset device command.\n", ret);
3451                 ret = -EINVAL;
3452                 goto command_cleanup;
3453         }
3454
3455         /* Free up host controller endpoint resources */
3456         if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) {
3457                 spin_lock_irqsave(&xhci->lock, flags);
3458                 /* Don't delete the default control endpoint resources */
3459                 xhci_free_device_endpoint_resources(xhci, virt_dev, false);
3460                 spin_unlock_irqrestore(&xhci->lock, flags);
3461         }
3462
3463         /* Everything but endpoint 0 is disabled, so free or cache the rings. */
3464         last_freed_endpoint = 1;
3465         for (i = 1; i < 31; ++i) {
3466                 struct xhci_virt_ep *ep = &virt_dev->eps[i];
3467
3468                 if (ep->ep_state & EP_HAS_STREAMS) {
3469                         xhci_free_stream_info(xhci, ep->stream_info);
3470                         ep->stream_info = NULL;
3471                         ep->ep_state &= ~EP_HAS_STREAMS;
3472                 }
3473
3474                 if (ep->ring) {
3475                         xhci_free_or_cache_endpoint_ring(xhci, virt_dev, i);
3476                         last_freed_endpoint = i;
3477                 }
3478                 if (!list_empty(&virt_dev->eps[i].bw_endpoint_list))
3479                         xhci_drop_ep_from_interval_table(xhci,
3480                                         &virt_dev->eps[i].bw_info,
3481                                         virt_dev->bw_table,
3482                                         udev,
3483                                         &virt_dev->eps[i],
3484                                         virt_dev->tt_info);
3485                 xhci_clear_endpoint_bw_info(&virt_dev->eps[i].bw_info);
3486         }
3487         /* If necessary, update the number of active TTs on this root port */
3488         xhci_update_tt_active_eps(xhci, virt_dev, old_active_eps);
3489
3490         xhci_dbg(xhci, "Output context after successful reset device cmd:\n");
3491         xhci_dbg_ctx(xhci, virt_dev->out_ctx, last_freed_endpoint);
3492         ret = 0;
3493
3494 command_cleanup:
3495         xhci_free_command(xhci, reset_device_cmd);
3496         return ret;
3497 }
3498
3499 /*
3500  * At this point, the struct usb_device is about to go away, the device has
3501  * disconnected, and all traffic has been stopped and the endpoints have been
3502  * disabled.  Free any HC data structures associated with that device.
3503  */
3504 void xhci_free_dev(struct usb_hcd *hcd, struct usb_device *udev)
3505 {
3506         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3507         struct xhci_virt_device *virt_dev;
3508         unsigned long flags;
3509         u32 state;
3510         int i, ret;
3511
3512         ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
3513         /* If the host is halted due to driver unload, we still need to free the
3514          * device.
3515          */
3516         if (ret <= 0 && ret != -ENODEV)
3517                 return;
3518
3519         virt_dev = xhci->devs[udev->slot_id];
3520
3521         /* Stop any wayward timer functions (which may grab the lock) */
3522         for (i = 0; i < 31; ++i) {
3523                 virt_dev->eps[i].ep_state &= ~EP_HALT_PENDING;
3524                 del_timer_sync(&virt_dev->eps[i].stop_cmd_timer);
3525         }
3526
3527         if (udev->usb2_hw_lpm_enabled) {
3528                 xhci_set_usb2_hardware_lpm(hcd, udev, 0);
3529                 udev->usb2_hw_lpm_enabled = 0;
3530         }
3531
3532         spin_lock_irqsave(&xhci->lock, flags);
3533         /* Don't disable the slot if the host controller is dead. */
3534         state = xhci_readl(xhci, &xhci->op_regs->status);
3535         if (state == 0xffffffff || (xhci->xhc_state & XHCI_STATE_DYING) ||
3536                         (xhci->xhc_state & XHCI_STATE_HALTED)) {
3537                 xhci_free_virt_device(xhci, udev->slot_id);
3538                 spin_unlock_irqrestore(&xhci->lock, flags);
3539                 return;
3540         }
3541
3542         if (xhci_queue_slot_control(xhci, TRB_DISABLE_SLOT, udev->slot_id)) {
3543                 spin_unlock_irqrestore(&xhci->lock, flags);
3544                 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
3545                 return;
3546         }
3547         xhci_ring_cmd_db(xhci);
3548         spin_unlock_irqrestore(&xhci->lock, flags);
3549         /*
3550          * Event command completion handler will free any data structures
3551          * associated with the slot.  XXX Can free sleep?
3552          */
3553 }
3554
3555 /*
3556  * Checks if we have enough host controller resources for the default control
3557  * endpoint.
3558  *
3559  * Must be called with xhci->lock held.
3560  */
3561 static int xhci_reserve_host_control_ep_resources(struct xhci_hcd *xhci)
3562 {
3563         if (xhci->num_active_eps + 1 > xhci->limit_active_eps) {
3564                 xhci_dbg(xhci, "Not enough ep ctxs: "
3565                                 "%u active, need to add 1, limit is %u.\n",
3566                                 xhci->num_active_eps, xhci->limit_active_eps);
3567                 return -ENOMEM;
3568         }
3569         xhci->num_active_eps += 1;
3570         xhci_dbg(xhci, "Adding 1 ep ctx, %u now active.\n",
3571                         xhci->num_active_eps);
3572         return 0;
3573 }
3574
3575
3576 /*
3577  * Returns 0 if the xHC ran out of device slots, the Enable Slot command
3578  * timed out, or allocating memory failed.  Returns 1 on success.
3579  */
3580 int xhci_alloc_dev(struct usb_hcd *hcd, struct usb_device *udev)
3581 {
3582         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3583         unsigned long flags;
3584         int timeleft;
3585         int ret;
3586         union xhci_trb *cmd_trb;
3587
3588         spin_lock_irqsave(&xhci->lock, flags);
3589         cmd_trb = xhci->cmd_ring->dequeue;
3590         ret = xhci_queue_slot_control(xhci, TRB_ENABLE_SLOT, 0);
3591         if (ret) {
3592                 spin_unlock_irqrestore(&xhci->lock, flags);
3593                 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
3594                 return 0;
3595         }
3596         xhci_ring_cmd_db(xhci);
3597         spin_unlock_irqrestore(&xhci->lock, flags);
3598
3599         /* XXX: how much time for xHC slot assignment? */
3600         timeleft = wait_for_completion_interruptible_timeout(&xhci->addr_dev,
3601                         XHCI_CMD_DEFAULT_TIMEOUT);
3602         if (timeleft <= 0) {
3603                 xhci_warn(xhci, "%s while waiting for a slot\n",
3604                                 timeleft == 0 ? "Timeout" : "Signal");
3605                 /* cancel the enable slot request */
3606                 return xhci_cancel_cmd(xhci, NULL, cmd_trb);
3607         }
3608
3609         if (!xhci->slot_id) {
3610                 xhci_err(xhci, "Error while assigning device slot ID\n");
3611                 return 0;
3612         }
3613
3614         if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) {
3615                 spin_lock_irqsave(&xhci->lock, flags);
3616                 ret = xhci_reserve_host_control_ep_resources(xhci);
3617                 if (ret) {
3618                         spin_unlock_irqrestore(&xhci->lock, flags);
3619                         xhci_warn(xhci, "Not enough host resources, "
3620                                         "active endpoint contexts = %u\n",
3621                                         xhci->num_active_eps);
3622                         goto disable_slot;
3623                 }
3624                 spin_unlock_irqrestore(&xhci->lock, flags);
3625         }
3626         /* Use GFP_NOIO, since this function can be called from
3627          * xhci_discover_or_reset_device(), which may be called as part of
3628          * mass storage driver error handling.
3629          */
3630         if (!xhci_alloc_virt_device(xhci, xhci->slot_id, udev, GFP_NOIO)) {
3631                 xhci_warn(xhci, "Could not allocate xHCI USB device data structures\n");
3632                 goto disable_slot;
3633         }
3634         udev->slot_id = xhci->slot_id;
3635         /* Is this a LS or FS device under a HS hub? */
3636         /* Hub or peripherial? */
3637         return 1;
3638
3639 disable_slot:
3640         /* Disable slot, if we can do it without mem alloc */
3641         spin_lock_irqsave(&xhci->lock, flags);
3642         if (!xhci_queue_slot_control(xhci, TRB_DISABLE_SLOT, udev->slot_id))
3643                 xhci_ring_cmd_db(xhci);
3644         spin_unlock_irqrestore(&xhci->lock, flags);
3645         return 0;
3646 }
3647
3648 /*
3649  * Issue an Address Device command (which will issue a SetAddress request to
3650  * the device).
3651  * We should be protected by the usb_address0_mutex in khubd's hub_port_init, so
3652  * we should only issue and wait on one address command at the same time.
3653  *
3654  * We add one to the device address issued by the hardware because the USB core
3655  * uses address 1 for the root hubs (even though they're not really devices).
3656  */
3657 int xhci_address_device(struct usb_hcd *hcd, struct usb_device *udev)
3658 {
3659         unsigned long flags;
3660         int timeleft;
3661         struct xhci_virt_device *virt_dev;
3662         int ret = 0;
3663         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3664         struct xhci_slot_ctx *slot_ctx;
3665         struct xhci_input_control_ctx *ctrl_ctx;
3666         u64 temp_64;
3667         union xhci_trb *cmd_trb;
3668
3669         if (!udev->slot_id) {
3670                 xhci_dbg_trace(xhci, trace_xhci_dbg_address,
3671                                 "Bad Slot ID %d", udev->slot_id);
3672                 return -EINVAL;
3673         }
3674
3675         virt_dev = xhci->devs[udev->slot_id];
3676
3677         if (WARN_ON(!virt_dev)) {
3678                 /*
3679                  * In plug/unplug torture test with an NEC controller,
3680                  * a zero-dereference was observed once due to virt_dev = 0.
3681                  * Print useful debug rather than crash if it is observed again!
3682                  */
3683                 xhci_warn(xhci, "Virt dev invalid for slot_id 0x%x!\n",
3684                         udev->slot_id);
3685                 return -EINVAL;
3686         }
3687
3688         slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
3689         ctrl_ctx = xhci_get_input_control_ctx(xhci, virt_dev->in_ctx);
3690         if (!ctrl_ctx) {
3691                 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
3692                                 __func__);
3693                 return -EINVAL;
3694         }
3695         /*
3696          * If this is the first Set Address since device plug-in or
3697          * virt_device realloaction after a resume with an xHCI power loss,
3698          * then set up the slot context.
3699          */
3700         if (!slot_ctx->dev_info)
3701                 xhci_setup_addressable_virt_dev(xhci, udev);
3702         /* Otherwise, update the control endpoint ring enqueue pointer. */
3703         else
3704                 xhci_copy_ep0_dequeue_into_input_ctx(xhci, udev);
3705         ctrl_ctx->add_flags = cpu_to_le32(SLOT_FLAG | EP0_FLAG);
3706         ctrl_ctx->drop_flags = 0;
3707
3708         xhci_dbg(xhci, "Slot ID %d Input Context:\n", udev->slot_id);
3709         xhci_dbg_ctx(xhci, virt_dev->in_ctx, 2);
3710
3711         spin_lock_irqsave(&xhci->lock, flags);
3712         cmd_trb = xhci->cmd_ring->dequeue;
3713         ret = xhci_queue_address_device(xhci, virt_dev->in_ctx->dma,
3714                                         udev->slot_id);
3715         if (ret) {
3716                 spin_unlock_irqrestore(&xhci->lock, flags);
3717                 xhci_dbg_trace(xhci, trace_xhci_dbg_address,
3718                                 "FIXME: allocate a command ring segment");
3719                 return ret;
3720         }
3721         xhci_ring_cmd_db(xhci);
3722         spin_unlock_irqrestore(&xhci->lock, flags);
3723
3724         /* ctrl tx can take up to 5 sec; XXX: need more time for xHC? */
3725         timeleft = wait_for_completion_interruptible_timeout(&xhci->addr_dev,
3726                         XHCI_CMD_DEFAULT_TIMEOUT);
3727         /* FIXME: From section 4.3.4: "Software shall be responsible for timing
3728          * the SetAddress() "recovery interval" required by USB and aborting the
3729          * command on a timeout.
3730          */
3731         if (timeleft <= 0) {
3732                 xhci_warn(xhci, "%s while waiting for address device command\n",
3733                                 timeleft == 0 ? "Timeout" : "Signal");
3734                 /* cancel the address device command */
3735                 ret = xhci_cancel_cmd(xhci, NULL, cmd_trb);
3736                 if (ret < 0)
3737                         return ret;
3738                 return -ETIME;
3739         }
3740
3741         switch (virt_dev->cmd_status) {
3742         case COMP_CTX_STATE:
3743         case COMP_EBADSLT:
3744                 xhci_err(xhci, "Setup ERROR: address device command for slot %d.\n",
3745                                 udev->slot_id);
3746                 ret = -EINVAL;
3747                 break;
3748         case COMP_TX_ERR:
3749                 dev_warn(&udev->dev, "Device not responding to set address.\n");
3750                 ret = -EPROTO;
3751                 break;
3752         case COMP_DEV_ERR:
3753                 dev_warn(&udev->dev, "ERROR: Incompatible device for address "
3754                                 "device command.\n");
3755                 ret = -ENODEV;
3756                 break;
3757         case COMP_SUCCESS:
3758                 xhci_dbg_trace(xhci, trace_xhci_dbg_address,
3759                                 "Successful Address Device command");
3760                 break;
3761         default:
3762                 xhci_err(xhci, "ERROR: unexpected command completion "
3763                                 "code 0x%x.\n", virt_dev->cmd_status);
3764                 xhci_dbg(xhci, "Slot ID %d Output Context:\n", udev->slot_id);
3765                 xhci_dbg_ctx(xhci, virt_dev->out_ctx, 2);
3766                 ret = -EINVAL;
3767                 break;
3768         }
3769         if (ret) {
3770                 return ret;
3771         }
3772         temp_64 = xhci_read_64(xhci, &xhci->op_regs->dcbaa_ptr);
3773         xhci_dbg_trace(xhci, trace_xhci_dbg_address,
3774                         "Op regs DCBAA ptr = %#016llx", temp_64);
3775         xhci_dbg_trace(xhci, trace_xhci_dbg_address,
3776                 "Slot ID %d dcbaa entry @%p = %#016llx",
3777                 udev->slot_id,
3778                 &xhci->dcbaa->dev_context_ptrs[udev->slot_id],
3779                 (unsigned long long)
3780                 le64_to_cpu(xhci->dcbaa->dev_context_ptrs[udev->slot_id]));
3781         xhci_dbg_trace(xhci, trace_xhci_dbg_address,
3782                         "Output Context DMA address = %#08llx",
3783                         (unsigned long long)virt_dev->out_ctx->dma);
3784         xhci_dbg(xhci, "Slot ID %d Input Context:\n", udev->slot_id);
3785         xhci_dbg_ctx(xhci, virt_dev->in_ctx, 2);
3786         xhci_dbg(xhci, "Slot ID %d Output Context:\n", udev->slot_id);
3787         xhci_dbg_ctx(xhci, virt_dev->out_ctx, 2);
3788         /*
3789          * USB core uses address 1 for the roothubs, so we add one to the
3790          * address given back to us by the HC.
3791          */
3792         slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->out_ctx);
3793         /* Use kernel assigned address for devices; store xHC assigned
3794          * address locally. */
3795         virt_dev->address = (le32_to_cpu(slot_ctx->dev_state) & DEV_ADDR_MASK)
3796                 + 1;
3797         /* Zero the input context control for later use */
3798         ctrl_ctx->add_flags = 0;
3799         ctrl_ctx->drop_flags = 0;
3800
3801         xhci_dbg_trace(xhci, trace_xhci_dbg_address,
3802                         "Internal device address = %d", virt_dev->address);
3803
3804         return 0;
3805 }
3806
3807 /*
3808  * Transfer the port index into real index in the HW port status
3809  * registers. Caculate offset between the port's PORTSC register
3810  * and port status base. Divide the number of per port register
3811  * to get the real index. The raw port number bases 1.
3812  */
3813 int xhci_find_raw_port_number(struct usb_hcd *hcd, int port1)
3814 {
3815         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3816         __le32 __iomem *base_addr = &xhci->op_regs->port_status_base;
3817         __le32 __iomem *addr;
3818         int raw_port;
3819
3820         if (hcd->speed != HCD_USB3)
3821                 addr = xhci->usb2_ports[port1 - 1];
3822         else
3823                 addr = xhci->usb3_ports[port1 - 1];
3824
3825         raw_port = (addr - base_addr)/NUM_PORT_REGS + 1;
3826         return raw_port;
3827 }
3828
3829 /*
3830  * Issue an Evaluate Context command to change the Maximum Exit Latency in the
3831  * slot context.  If that succeeds, store the new MEL in the xhci_virt_device.
3832  */
3833 static int __maybe_unused xhci_change_max_exit_latency(struct xhci_hcd *xhci,
3834                         struct usb_device *udev, u16 max_exit_latency)
3835 {
3836         struct xhci_virt_device *virt_dev;
3837         struct xhci_command *command;
3838         struct xhci_input_control_ctx *ctrl_ctx;
3839         struct xhci_slot_ctx *slot_ctx;
3840         unsigned long flags;
3841         int ret;
3842
3843         spin_lock_irqsave(&xhci->lock, flags);
3844         if (max_exit_latency == xhci->devs[udev->slot_id]->current_mel) {
3845                 spin_unlock_irqrestore(&xhci->lock, flags);
3846                 return 0;
3847         }
3848
3849         /* Attempt to issue an Evaluate Context command to change the MEL. */
3850         virt_dev = xhci->devs[udev->slot_id];
3851         command = xhci->lpm_command;
3852         ctrl_ctx = xhci_get_input_control_ctx(xhci, command->in_ctx);
3853         if (!ctrl_ctx) {
3854                 spin_unlock_irqrestore(&xhci->lock, flags);
3855                 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
3856                                 __func__);
3857                 return -ENOMEM;
3858         }
3859
3860         xhci_slot_copy(xhci, command->in_ctx, virt_dev->out_ctx);
3861         spin_unlock_irqrestore(&xhci->lock, flags);
3862
3863         ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
3864         slot_ctx = xhci_get_slot_ctx(xhci, command->in_ctx);
3865         slot_ctx->dev_info2 &= cpu_to_le32(~((u32) MAX_EXIT));
3866         slot_ctx->dev_info2 |= cpu_to_le32(max_exit_latency);
3867
3868         xhci_dbg(xhci, "Set up evaluate context for LPM MEL change.\n");
3869         xhci_dbg(xhci, "Slot %u Input Context:\n", udev->slot_id);
3870         xhci_dbg_ctx(xhci, command->in_ctx, 0);
3871
3872         /* Issue and wait for the evaluate context command. */
3873         ret = xhci_configure_endpoint(xhci, udev, command,
3874                         true, true);
3875         xhci_dbg(xhci, "Slot %u Output Context:\n", udev->slot_id);
3876         xhci_dbg_ctx(xhci, virt_dev->out_ctx, 0);
3877
3878         if (!ret) {
3879                 spin_lock_irqsave(&xhci->lock, flags);
3880                 virt_dev->current_mel = max_exit_latency;
3881                 spin_unlock_irqrestore(&xhci->lock, flags);
3882         }
3883         return ret;
3884 }
3885
3886 #ifdef CONFIG_PM_RUNTIME
3887
3888 /* BESL to HIRD Encoding array for USB2 LPM */
3889 static int xhci_besl_encoding[16] = {125, 150, 200, 300, 400, 500, 1000, 2000,
3890         3000, 4000, 5000, 6000, 7000, 8000, 9000, 10000};
3891
3892 /* Calculate HIRD/BESL for USB2 PORTPMSC*/
3893 static int xhci_calculate_hird_besl(struct xhci_hcd *xhci,
3894                                         struct usb_device *udev)
3895 {
3896         int u2del, besl, besl_host;
3897         int besl_device = 0;
3898         u32 field;
3899
3900         u2del = HCS_U2_LATENCY(xhci->hcs_params3);
3901         field = le32_to_cpu(udev->bos->ext_cap->bmAttributes);
3902
3903         if (field & USB_BESL_SUPPORT) {
3904                 for (besl_host = 0; besl_host < 16; besl_host++) {
3905                         if (xhci_besl_encoding[besl_host] >= u2del)
3906                                 break;
3907                 }
3908                 /* Use baseline BESL value as default */
3909                 if (field & USB_BESL_BASELINE_VALID)
3910                         besl_device = USB_GET_BESL_BASELINE(field);
3911                 else if (field & USB_BESL_DEEP_VALID)
3912                         besl_device = USB_GET_BESL_DEEP(field);
3913         } else {
3914                 if (u2del <= 50)
3915                         besl_host = 0;
3916                 else
3917                         besl_host = (u2del - 51) / 75 + 1;
3918         }
3919
3920         besl = besl_host + besl_device;
3921         if (besl > 15)
3922                 besl = 15;
3923
3924         return besl;
3925 }
3926
3927 /* Calculate BESLD, L1 timeout and HIRDM for USB2 PORTHLPMC */
3928 static int xhci_calculate_usb2_hw_lpm_params(struct usb_device *udev)
3929 {
3930         u32 field;
3931         int l1;
3932         int besld = 0;
3933         int hirdm = 0;
3934
3935         field = le32_to_cpu(udev->bos->ext_cap->bmAttributes);
3936
3937         /* xHCI l1 is set in steps of 256us, xHCI 1.0 section 5.4.11.2 */
3938         l1 = udev->l1_params.timeout / 256;
3939
3940         /* device has preferred BESLD */
3941         if (field & USB_BESL_DEEP_VALID) {
3942                 besld = USB_GET_BESL_DEEP(field);
3943                 hirdm = 1;
3944         }
3945
3946         return PORT_BESLD(besld) | PORT_L1_TIMEOUT(l1) | PORT_HIRDM(hirdm);
3947 }
3948
3949 static int xhci_usb2_software_lpm_test(struct usb_hcd *hcd,
3950                                         struct usb_device *udev)
3951 {
3952         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3953         struct dev_info *dev_info;
3954         __le32 __iomem  **port_array;
3955         __le32 __iomem  *addr, *pm_addr;
3956         u32             temp, dev_id;
3957         unsigned int    port_num;
3958         unsigned long   flags;
3959         int             hird;
3960         int             ret;
3961
3962         if (hcd->speed == HCD_USB3 || !xhci->sw_lpm_support ||
3963                         !udev->lpm_capable)
3964                 return -EINVAL;
3965
3966         /* we only support lpm for non-hub device connected to root hub yet */
3967         if (!udev->parent || udev->parent->parent ||
3968                         udev->descriptor.bDeviceClass == USB_CLASS_HUB)
3969                 return -EINVAL;
3970
3971         spin_lock_irqsave(&xhci->lock, flags);
3972
3973         /* Look for devices in lpm_failed_devs list */
3974         dev_id = le16_to_cpu(udev->descriptor.idVendor) << 16 |
3975                         le16_to_cpu(udev->descriptor.idProduct);
3976         list_for_each_entry(dev_info, &xhci->lpm_failed_devs, list) {
3977                 if (dev_info->dev_id == dev_id) {
3978                         ret = -EINVAL;
3979                         goto finish;
3980                 }
3981         }
3982
3983         port_array = xhci->usb2_ports;
3984         port_num = udev->portnum - 1;
3985
3986         if (port_num > HCS_MAX_PORTS(xhci->hcs_params1)) {
3987                 xhci_dbg(xhci, "invalid port number %d\n", udev->portnum);
3988                 ret = -EINVAL;
3989                 goto finish;
3990         }
3991
3992         /*
3993          * Test USB 2.0 software LPM.
3994          * FIXME: some xHCI 1.0 hosts may implement a new register to set up
3995          * hardware-controlled USB 2.0 LPM. See section 5.4.11 and 4.23.5.1.1.1
3996          * in the June 2011 errata release.
3997          */
3998         xhci_dbg(xhci, "test port %d software LPM\n", port_num);
3999         /*
4000          * Set L1 Device Slot and HIRD/BESL.
4001          * Check device's USB 2.0 extension descriptor to determine whether
4002          * HIRD or BESL shoule be used. See USB2.0 LPM errata.
4003          */
4004         pm_addr = port_array[port_num] + PORTPMSC;
4005         hird = xhci_calculate_hird_besl(xhci, udev);
4006         temp = PORT_L1DS(udev->slot_id) | PORT_HIRD(hird);
4007         xhci_writel(xhci, temp, pm_addr);
4008
4009         /* Set port link state to U2(L1) */
4010         addr = port_array[port_num];
4011         xhci_set_link_state(xhci, port_array, port_num, XDEV_U2);
4012
4013         /* wait for ACK */
4014         spin_unlock_irqrestore(&xhci->lock, flags);
4015         msleep(10);
4016         spin_lock_irqsave(&xhci->lock, flags);
4017
4018         /* Check L1 Status */
4019         ret = xhci_handshake(xhci, pm_addr,
4020                         PORT_L1S_MASK, PORT_L1S_SUCCESS, 125);
4021         if (ret != -ETIMEDOUT) {
4022                 /* enter L1 successfully */
4023                 temp = xhci_readl(xhci, addr);
4024                 xhci_dbg(xhci, "port %d entered L1 state, port status 0x%x\n",
4025                                 port_num, temp);
4026                 ret = 0;
4027         } else {
4028                 temp = xhci_readl(xhci, pm_addr);
4029                 xhci_dbg(xhci, "port %d software lpm failed, L1 status %d\n",
4030                                 port_num, temp & PORT_L1S_MASK);
4031                 ret = -EINVAL;
4032         }
4033
4034         /* Resume the port */
4035         xhci_set_link_state(xhci, port_array, port_num, XDEV_U0);
4036
4037         spin_unlock_irqrestore(&xhci->lock, flags);
4038         msleep(10);
4039         spin_lock_irqsave(&xhci->lock, flags);
4040
4041         /* Clear PLC */
4042         xhci_test_and_clear_bit(xhci, port_array, port_num, PORT_PLC);
4043
4044         /* Check PORTSC to make sure the device is in the right state */
4045         if (!ret) {
4046                 temp = xhci_readl(xhci, addr);
4047                 xhci_dbg(xhci, "resumed port %d status 0x%x\n", port_num, temp);
4048                 if (!(temp & PORT_CONNECT) || !(temp & PORT_PE) ||
4049                                 (temp & PORT_PLS_MASK) != XDEV_U0) {
4050                         xhci_dbg(xhci, "port L1 resume fail\n");
4051                         ret = -EINVAL;
4052                 }
4053         }
4054
4055         if (ret) {
4056                 /* Insert dev to lpm_failed_devs list */
4057                 xhci_warn(xhci, "device LPM test failed, may disconnect and "
4058                                 "re-enumerate\n");
4059                 dev_info = kzalloc(sizeof(struct dev_info), GFP_ATOMIC);
4060                 if (!dev_info) {
4061                         ret = -ENOMEM;
4062                         goto finish;
4063                 }
4064                 dev_info->dev_id = dev_id;
4065                 INIT_LIST_HEAD(&dev_info->list);
4066                 list_add(&dev_info->list, &xhci->lpm_failed_devs);
4067         } else {
4068                 xhci_ring_device(xhci, udev->slot_id);
4069         }
4070
4071 finish:
4072         spin_unlock_irqrestore(&xhci->lock, flags);
4073         return ret;
4074 }
4075
4076 int xhci_set_usb2_hardware_lpm(struct usb_hcd *hcd,
4077                         struct usb_device *udev, int enable)
4078 {
4079         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
4080         __le32 __iomem  **port_array;
4081         __le32 __iomem  *pm_addr, *hlpm_addr;
4082         u32             pm_val, hlpm_val, field;
4083         unsigned int    port_num;
4084         unsigned long   flags;
4085         int             hird, exit_latency;
4086         int             ret;
4087
4088         if (hcd->speed == HCD_USB3 || !xhci->hw_lpm_support ||
4089                         !udev->lpm_capable)
4090                 return -EPERM;
4091
4092         if (!udev->parent || udev->parent->parent ||
4093                         udev->descriptor.bDeviceClass == USB_CLASS_HUB)
4094                 return -EPERM;
4095
4096         if (udev->usb2_hw_lpm_capable != 1)
4097                 return -EPERM;
4098
4099         spin_lock_irqsave(&xhci->lock, flags);
4100
4101         port_array = xhci->usb2_ports;
4102         port_num = udev->portnum - 1;
4103         pm_addr = port_array[port_num] + PORTPMSC;
4104         pm_val = xhci_readl(xhci, pm_addr);
4105         hlpm_addr = port_array[port_num] + PORTHLPMC;
4106         field = le32_to_cpu(udev->bos->ext_cap->bmAttributes);
4107
4108         xhci_dbg(xhci, "%s port %d USB2 hardware LPM\n",
4109                         enable ? "enable" : "disable", port_num);
4110
4111         if (enable) {
4112                 /* Host supports BESL timeout instead of HIRD */
4113                 if (udev->usb2_hw_lpm_besl_capable) {
4114                         /* if device doesn't have a preferred BESL value use a
4115                          * default one which works with mixed HIRD and BESL
4116                          * systems. See XHCI_DEFAULT_BESL definition in xhci.h
4117                          */
4118                         if ((field & USB_BESL_SUPPORT) &&
4119                             (field & USB_BESL_BASELINE_VALID))
4120                                 hird = USB_GET_BESL_BASELINE(field);
4121                         else
4122                                 hird = udev->l1_params.besl;
4123
4124                         exit_latency = xhci_besl_encoding[hird];
4125                         spin_unlock_irqrestore(&xhci->lock, flags);
4126
4127                         /* USB 3.0 code dedicate one xhci->lpm_command->in_ctx
4128                          * input context for link powermanagement evaluate
4129                          * context commands. It is protected by hcd->bandwidth
4130                          * mutex and is shared by all devices. We need to set
4131                          * the max ext latency in USB 2 BESL LPM as well, so
4132                          * use the same mutex and xhci_change_max_exit_latency()
4133                          */
4134                         mutex_lock(hcd->bandwidth_mutex);
4135                         ret = xhci_change_max_exit_latency(xhci, udev,
4136                                                            exit_latency);
4137                         mutex_unlock(hcd->bandwidth_mutex);
4138
4139                         if (ret < 0)
4140                                 return ret;
4141                         spin_lock_irqsave(&xhci->lock, flags);
4142
4143                         hlpm_val = xhci_calculate_usb2_hw_lpm_params(udev);
4144                         xhci_writel(xhci, hlpm_val, hlpm_addr);
4145                         /* flush write */
4146                         xhci_readl(xhci, hlpm_addr);
4147                 } else {
4148                         hird = xhci_calculate_hird_besl(xhci, udev);
4149                 }
4150
4151                 pm_val &= ~PORT_HIRD_MASK;
4152                 pm_val |= PORT_HIRD(hird) | PORT_RWE;
4153                 xhci_writel(xhci, pm_val, pm_addr);
4154                 pm_val = xhci_readl(xhci, pm_addr);
4155                 pm_val |= PORT_HLE;
4156                 xhci_writel(xhci, pm_val, pm_addr);
4157                 /* flush write */
4158                 xhci_readl(xhci, pm_addr);
4159         } else {
4160                 pm_val &= ~(PORT_HLE | PORT_RWE | PORT_HIRD_MASK);
4161                 xhci_writel(xhci, pm_val, pm_addr);
4162                 /* flush write */
4163                 xhci_readl(xhci, pm_addr);
4164                 if (udev->usb2_hw_lpm_besl_capable) {
4165                         spin_unlock_irqrestore(&xhci->lock, flags);
4166                         mutex_lock(hcd->bandwidth_mutex);
4167                         xhci_change_max_exit_latency(xhci, udev, 0);
4168                         mutex_unlock(hcd->bandwidth_mutex);
4169                         return 0;
4170                 }
4171         }
4172
4173         spin_unlock_irqrestore(&xhci->lock, flags);
4174         return 0;
4175 }
4176
4177 /* check if a usb2 port supports a given extened capability protocol
4178  * only USB2 ports extended protocol capability values are cached.
4179  * Return 1 if capability is supported
4180  */
4181 static int xhci_check_usb2_port_capability(struct xhci_hcd *xhci, int port,
4182                                            unsigned capability)
4183 {
4184         u32 port_offset, port_count;
4185         int i;
4186
4187         for (i = 0; i < xhci->num_ext_caps; i++) {
4188                 if (xhci->ext_caps[i] & capability) {
4189                         /* port offsets starts at 1 */
4190                         port_offset = XHCI_EXT_PORT_OFF(xhci->ext_caps[i]) - 1;
4191                         port_count = XHCI_EXT_PORT_COUNT(xhci->ext_caps[i]);
4192                         if (port >= port_offset &&
4193                             port < port_offset + port_count)
4194                                 return 1;
4195                 }
4196         }
4197         return 0;
4198 }
4199
4200 int xhci_update_device(struct usb_hcd *hcd, struct usb_device *udev)
4201 {
4202         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
4203         int             ret;
4204         int             portnum = udev->portnum - 1;
4205
4206         ret = xhci_usb2_software_lpm_test(hcd, udev);
4207         if (!ret) {
4208                 xhci_dbg(xhci, "software LPM test succeed\n");
4209                 if (xhci->hw_lpm_support == 1 &&
4210                     xhci_check_usb2_port_capability(xhci, portnum, XHCI_HLC)) {
4211                         udev->usb2_hw_lpm_capable = 1;
4212                         udev->l1_params.timeout = XHCI_L1_TIMEOUT;
4213                         udev->l1_params.besl = XHCI_DEFAULT_BESL;
4214                         if (xhci_check_usb2_port_capability(xhci, portnum,
4215                                                             XHCI_BLC))
4216                                 udev->usb2_hw_lpm_besl_capable = 1;
4217                         ret = xhci_set_usb2_hardware_lpm(hcd, udev, 1);
4218                         if (!ret)
4219                                 udev->usb2_hw_lpm_enabled = 1;
4220                 }
4221         }
4222
4223         return 0;
4224 }
4225
4226 #else
4227
4228 int xhci_set_usb2_hardware_lpm(struct usb_hcd *hcd,
4229                                 struct usb_device *udev, int enable)
4230 {
4231         return 0;
4232 }
4233
4234 int xhci_update_device(struct usb_hcd *hcd, struct usb_device *udev)
4235 {
4236         return 0;
4237 }
4238
4239 #endif /* CONFIG_PM_RUNTIME */
4240
4241 /*---------------------- USB 3.0 Link PM functions ------------------------*/
4242
4243 #ifdef CONFIG_PM
4244 /* Service interval in nanoseconds = 2^(bInterval - 1) * 125us * 1000ns / 1us */
4245 static unsigned long long xhci_service_interval_to_ns(
4246                 struct usb_endpoint_descriptor *desc)
4247 {
4248         return (1ULL << (desc->bInterval - 1)) * 125 * 1000;
4249 }
4250
4251 static u16 xhci_get_timeout_no_hub_lpm(struct usb_device *udev,
4252                 enum usb3_link_state state)
4253 {
4254         unsigned long long sel;
4255         unsigned long long pel;
4256         unsigned int max_sel_pel;
4257         char *state_name;
4258
4259         switch (state) {
4260         case USB3_LPM_U1:
4261                 /* Convert SEL and PEL stored in nanoseconds to microseconds */
4262                 sel = DIV_ROUND_UP(udev->u1_params.sel, 1000);
4263                 pel = DIV_ROUND_UP(udev->u1_params.pel, 1000);
4264                 max_sel_pel = USB3_LPM_MAX_U1_SEL_PEL;
4265                 state_name = "U1";
4266                 break;
4267         case USB3_LPM_U2:
4268                 sel = DIV_ROUND_UP(udev->u2_params.sel, 1000);
4269                 pel = DIV_ROUND_UP(udev->u2_params.pel, 1000);
4270                 max_sel_pel = USB3_LPM_MAX_U2_SEL_PEL;
4271                 state_name = "U2";
4272                 break;
4273         default:
4274                 dev_warn(&udev->dev, "%s: Can't get timeout for non-U1 or U2 state.\n",
4275                                 __func__);
4276                 return USB3_LPM_DISABLED;
4277         }
4278
4279         if (sel <= max_sel_pel && pel <= max_sel_pel)
4280                 return USB3_LPM_DEVICE_INITIATED;
4281
4282         if (sel > max_sel_pel)
4283                 dev_dbg(&udev->dev, "Device-initiated %s disabled "
4284                                 "due to long SEL %llu ms\n",
4285                                 state_name, sel);
4286         else
4287                 dev_dbg(&udev->dev, "Device-initiated %s disabled "
4288                                 "due to long PEL %llu ms\n",
4289                                 state_name, pel);
4290         return USB3_LPM_DISABLED;
4291 }
4292
4293 /* Returns the hub-encoded U1 timeout value.
4294  * The U1 timeout should be the maximum of the following values:
4295  *  - For control endpoints, U1 system exit latency (SEL) * 3
4296  *  - For bulk endpoints, U1 SEL * 5
4297  *  - For interrupt endpoints:
4298  *    - Notification EPs, U1 SEL * 3
4299  *    - Periodic EPs, max(105% of bInterval, U1 SEL * 2)
4300  *  - For isochronous endpoints, max(105% of bInterval, U1 SEL * 2)
4301  */
4302 static u16 xhci_calculate_intel_u1_timeout(struct usb_device *udev,
4303                 struct usb_endpoint_descriptor *desc)
4304 {
4305         unsigned long long timeout_ns;
4306         int ep_type;
4307         int intr_type;
4308
4309         ep_type = usb_endpoint_type(desc);
4310         switch (ep_type) {
4311         case USB_ENDPOINT_XFER_CONTROL:
4312                 timeout_ns = udev->u1_params.sel * 3;
4313                 break;
4314         case USB_ENDPOINT_XFER_BULK:
4315                 timeout_ns = udev->u1_params.sel * 5;
4316                 break;
4317         case USB_ENDPOINT_XFER_INT:
4318                 intr_type = usb_endpoint_interrupt_type(desc);
4319                 if (intr_type == USB_ENDPOINT_INTR_NOTIFICATION) {
4320                         timeout_ns = udev->u1_params.sel * 3;
4321                         break;
4322                 }
4323                 /* Otherwise the calculation is the same as isoc eps */
4324         case USB_ENDPOINT_XFER_ISOC:
4325                 timeout_ns = xhci_service_interval_to_ns(desc);
4326                 timeout_ns = DIV_ROUND_UP_ULL(timeout_ns * 105, 100);
4327                 if (timeout_ns < udev->u1_params.sel * 2)
4328                         timeout_ns = udev->u1_params.sel * 2;
4329                 break;
4330         default:
4331                 return 0;
4332         }
4333
4334         /* The U1 timeout is encoded in 1us intervals. */
4335         timeout_ns = DIV_ROUND_UP_ULL(timeout_ns, 1000);
4336         /* Don't return a timeout of zero, because that's USB3_LPM_DISABLED. */
4337         if (timeout_ns == USB3_LPM_DISABLED)
4338                 timeout_ns++;
4339
4340         /* If the necessary timeout value is bigger than what we can set in the
4341          * USB 3.0 hub, we have to disable hub-initiated U1.
4342          */
4343         if (timeout_ns <= USB3_LPM_U1_MAX_TIMEOUT)
4344                 return timeout_ns;
4345         dev_dbg(&udev->dev, "Hub-initiated U1 disabled "
4346                         "due to long timeout %llu ms\n", timeout_ns);
4347         return xhci_get_timeout_no_hub_lpm(udev, USB3_LPM_U1);
4348 }
4349
4350 /* Returns the hub-encoded U2 timeout value.
4351  * The U2 timeout should be the maximum of:
4352  *  - 10 ms (to avoid the bandwidth impact on the scheduler)
4353  *  - largest bInterval of any active periodic endpoint (to avoid going
4354  *    into lower power link states between intervals).
4355  *  - the U2 Exit Latency of the device
4356  */
4357 static u16 xhci_calculate_intel_u2_timeout(struct usb_device *udev,
4358                 struct usb_endpoint_descriptor *desc)
4359 {
4360         unsigned long long timeout_ns;
4361         unsigned long long u2_del_ns;
4362
4363         timeout_ns = 10 * 1000 * 1000;
4364
4365         if ((usb_endpoint_xfer_int(desc) || usb_endpoint_xfer_isoc(desc)) &&
4366                         (xhci_service_interval_to_ns(desc) > timeout_ns))
4367                 timeout_ns = xhci_service_interval_to_ns(desc);
4368
4369         u2_del_ns = le16_to_cpu(udev->bos->ss_cap->bU2DevExitLat) * 1000ULL;
4370         if (u2_del_ns > timeout_ns)
4371                 timeout_ns = u2_del_ns;
4372
4373         /* The U2 timeout is encoded in 256us intervals */
4374         timeout_ns = DIV_ROUND_UP_ULL(timeout_ns, 256 * 1000);
4375         /* If the necessary timeout value is bigger than what we can set in the
4376          * USB 3.0 hub, we have to disable hub-initiated U2.
4377          */
4378         if (timeout_ns <= USB3_LPM_U2_MAX_TIMEOUT)
4379                 return timeout_ns;
4380         dev_dbg(&udev->dev, "Hub-initiated U2 disabled "
4381                         "due to long timeout %llu ms\n", timeout_ns);
4382         return xhci_get_timeout_no_hub_lpm(udev, USB3_LPM_U2);
4383 }
4384
4385 static u16 xhci_call_host_update_timeout_for_endpoint(struct xhci_hcd *xhci,
4386                 struct usb_device *udev,
4387                 struct usb_endpoint_descriptor *desc,
4388                 enum usb3_link_state state,
4389                 u16 *timeout)
4390 {
4391         if (state == USB3_LPM_U1) {
4392                 if (xhci->quirks & XHCI_INTEL_HOST)
4393                         return xhci_calculate_intel_u1_timeout(udev, desc);
4394         } else {
4395                 if (xhci->quirks & XHCI_INTEL_HOST)
4396                         return xhci_calculate_intel_u2_timeout(udev, desc);
4397         }
4398
4399         return USB3_LPM_DISABLED;
4400 }
4401
4402 static int xhci_update_timeout_for_endpoint(struct xhci_hcd *xhci,
4403                 struct usb_device *udev,
4404                 struct usb_endpoint_descriptor *desc,
4405                 enum usb3_link_state state,
4406                 u16 *timeout)
4407 {
4408         u16 alt_timeout;
4409
4410         alt_timeout = xhci_call_host_update_timeout_for_endpoint(xhci, udev,
4411                 desc, state, timeout);
4412
4413         /* If we found we can't enable hub-initiated LPM, or
4414          * the U1 or U2 exit latency was too high to allow
4415          * device-initiated LPM as well, just stop searching.
4416          */
4417         if (alt_timeout == USB3_LPM_DISABLED ||
4418                         alt_timeout == USB3_LPM_DEVICE_INITIATED) {
4419                 *timeout = alt_timeout;
4420                 return -E2BIG;
4421         }
4422         if (alt_timeout > *timeout)
4423                 *timeout = alt_timeout;
4424         return 0;
4425 }
4426
4427 static int xhci_update_timeout_for_interface(struct xhci_hcd *xhci,
4428                 struct usb_device *udev,
4429                 struct usb_host_interface *alt,
4430                 enum usb3_link_state state,
4431                 u16 *timeout)
4432 {
4433         int j;
4434
4435         for (j = 0; j < alt->desc.bNumEndpoints; j++) {
4436                 if (xhci_update_timeout_for_endpoint(xhci, udev,
4437                                         &alt->endpoint[j].desc, state, timeout))
4438                         return -E2BIG;
4439                 continue;
4440         }
4441         return 0;
4442 }
4443
4444 static int xhci_check_intel_tier_policy(struct usb_device *udev,
4445                 enum usb3_link_state state)
4446 {
4447         struct usb_device *parent;
4448         unsigned int num_hubs;
4449
4450         if (state == USB3_LPM_U2)
4451                 return 0;
4452
4453         /* Don't enable U1 if the device is on a 2nd tier hub or lower. */
4454         for (parent = udev->parent, num_hubs = 0; parent->parent;
4455                         parent = parent->parent)
4456                 num_hubs++;
4457
4458         if (num_hubs < 2)
4459                 return 0;
4460
4461         dev_dbg(&udev->dev, "Disabling U1 link state for device"
4462                         " below second-tier hub.\n");
4463         dev_dbg(&udev->dev, "Plug device into first-tier hub "
4464                         "to decrease power consumption.\n");
4465         return -E2BIG;
4466 }
4467
4468 static int xhci_check_tier_policy(struct xhci_hcd *xhci,
4469                 struct usb_device *udev,
4470                 enum usb3_link_state state)
4471 {
4472         if (xhci->quirks & XHCI_INTEL_HOST)
4473                 return xhci_check_intel_tier_policy(udev, state);
4474         return -EINVAL;
4475 }
4476
4477 /* Returns the U1 or U2 timeout that should be enabled.
4478  * If the tier check or timeout setting functions return with a non-zero exit
4479  * code, that means the timeout value has been finalized and we shouldn't look
4480  * at any more endpoints.
4481  */
4482 static u16 xhci_calculate_lpm_timeout(struct usb_hcd *hcd,
4483                         struct usb_device *udev, enum usb3_link_state state)
4484 {
4485         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
4486         struct usb_host_config *config;
4487         char *state_name;
4488         int i;
4489         u16 timeout = USB3_LPM_DISABLED;
4490
4491         if (state == USB3_LPM_U1)
4492                 state_name = "U1";
4493         else if (state == USB3_LPM_U2)
4494                 state_name = "U2";
4495         else {
4496                 dev_warn(&udev->dev, "Can't enable unknown link state %i\n",
4497                                 state);
4498                 return timeout;
4499         }
4500
4501         if (xhci_check_tier_policy(xhci, udev, state) < 0)
4502                 return timeout;
4503
4504         /* Gather some information about the currently installed configuration
4505          * and alternate interface settings.
4506          */
4507         if (xhci_update_timeout_for_endpoint(xhci, udev, &udev->ep0.desc,
4508                         state, &timeout))
4509                 return timeout;
4510
4511         config = udev->actconfig;
4512         if (!config)
4513                 return timeout;
4514
4515         for (i = 0; i < USB_MAXINTERFACES; i++) {
4516                 struct usb_driver *driver;
4517                 struct usb_interface *intf = config->interface[i];
4518
4519                 if (!intf)
4520                         continue;
4521
4522                 /* Check if any currently bound drivers want hub-initiated LPM
4523                  * disabled.
4524                  */
4525                 if (intf->dev.driver) {
4526                         driver = to_usb_driver(intf->dev.driver);
4527                         if (driver && driver->disable_hub_initiated_lpm) {
4528                                 dev_dbg(&udev->dev, "Hub-initiated %s disabled "
4529                                                 "at request of driver %s\n",
4530                                                 state_name, driver->name);
4531                                 return xhci_get_timeout_no_hub_lpm(udev, state);
4532                         }
4533                 }
4534
4535                 /* Not sure how this could happen... */
4536                 if (!intf->cur_altsetting)
4537                         continue;
4538
4539                 if (xhci_update_timeout_for_interface(xhci, udev,
4540                                         intf->cur_altsetting,
4541                                         state, &timeout))
4542                         return timeout;
4543         }
4544         return timeout;
4545 }
4546
4547 static int calculate_max_exit_latency(struct usb_device *udev,
4548                 enum usb3_link_state state_changed,
4549                 u16 hub_encoded_timeout)
4550 {
4551         unsigned long long u1_mel_us = 0;
4552         unsigned long long u2_mel_us = 0;
4553         unsigned long long mel_us = 0;
4554         bool disabling_u1;
4555         bool disabling_u2;
4556         bool enabling_u1;
4557         bool enabling_u2;
4558
4559         disabling_u1 = (state_changed == USB3_LPM_U1 &&
4560                         hub_encoded_timeout == USB3_LPM_DISABLED);
4561         disabling_u2 = (state_changed == USB3_LPM_U2 &&
4562                         hub_encoded_timeout == USB3_LPM_DISABLED);
4563
4564         enabling_u1 = (state_changed == USB3_LPM_U1 &&
4565                         hub_encoded_timeout != USB3_LPM_DISABLED);
4566         enabling_u2 = (state_changed == USB3_LPM_U2 &&
4567                         hub_encoded_timeout != USB3_LPM_DISABLED);
4568
4569         /* If U1 was already enabled and we're not disabling it,
4570          * or we're going to enable U1, account for the U1 max exit latency.
4571          */
4572         if ((udev->u1_params.timeout != USB3_LPM_DISABLED && !disabling_u1) ||
4573                         enabling_u1)
4574                 u1_mel_us = DIV_ROUND_UP(udev->u1_params.mel, 1000);
4575         if ((udev->u2_params.timeout != USB3_LPM_DISABLED && !disabling_u2) ||
4576                         enabling_u2)
4577                 u2_mel_us = DIV_ROUND_UP(udev->u2_params.mel, 1000);
4578
4579         if (u1_mel_us > u2_mel_us)
4580                 mel_us = u1_mel_us;
4581         else
4582                 mel_us = u2_mel_us;
4583         /* xHCI host controller max exit latency field is only 16 bits wide. */
4584         if (mel_us > MAX_EXIT) {
4585                 dev_warn(&udev->dev, "Link PM max exit latency of %lluus "
4586                                 "is too big.\n", mel_us);
4587                 return -E2BIG;
4588         }
4589         return mel_us;
4590 }
4591
4592 /* Returns the USB3 hub-encoded value for the U1/U2 timeout. */
4593 int xhci_enable_usb3_lpm_timeout(struct usb_hcd *hcd,
4594                         struct usb_device *udev, enum usb3_link_state state)
4595 {
4596         struct xhci_hcd *xhci;
4597         u16 hub_encoded_timeout;
4598         int mel;
4599         int ret;
4600
4601         xhci = hcd_to_xhci(hcd);
4602         /* The LPM timeout values are pretty host-controller specific, so don't
4603          * enable hub-initiated timeouts unless the vendor has provided
4604          * information about their timeout algorithm.
4605          */
4606         if (!xhci || !(xhci->quirks & XHCI_LPM_SUPPORT) ||
4607                         !xhci->devs[udev->slot_id])
4608                 return USB3_LPM_DISABLED;
4609
4610         hub_encoded_timeout = xhci_calculate_lpm_timeout(hcd, udev, state);
4611         mel = calculate_max_exit_latency(udev, state, hub_encoded_timeout);
4612         if (mel < 0) {
4613                 /* Max Exit Latency is too big, disable LPM. */
4614                 hub_encoded_timeout = USB3_LPM_DISABLED;
4615                 mel = 0;
4616         }
4617
4618         ret = xhci_change_max_exit_latency(xhci, udev, mel);
4619         if (ret)
4620                 return ret;
4621         return hub_encoded_timeout;
4622 }
4623
4624 int xhci_disable_usb3_lpm_timeout(struct usb_hcd *hcd,
4625                         struct usb_device *udev, enum usb3_link_state state)
4626 {
4627         struct xhci_hcd *xhci;
4628         u16 mel;
4629         int ret;
4630
4631         xhci = hcd_to_xhci(hcd);
4632         if (!xhci || !(xhci->quirks & XHCI_LPM_SUPPORT) ||
4633                         !xhci->devs[udev->slot_id])
4634                 return 0;
4635
4636         mel = calculate_max_exit_latency(udev, state, USB3_LPM_DISABLED);
4637         ret = xhci_change_max_exit_latency(xhci, udev, mel);
4638         if (ret)
4639                 return ret;
4640         return 0;
4641 }
4642 #else /* CONFIG_PM */
4643
4644 int xhci_enable_usb3_lpm_timeout(struct usb_hcd *hcd,
4645                         struct usb_device *udev, enum usb3_link_state state)
4646 {
4647         return USB3_LPM_DISABLED;
4648 }
4649
4650 int xhci_disable_usb3_lpm_timeout(struct usb_hcd *hcd,
4651                         struct usb_device *udev, enum usb3_link_state state)
4652 {
4653         return 0;
4654 }
4655 #endif  /* CONFIG_PM */
4656
4657 /*-------------------------------------------------------------------------*/
4658
4659 /* Once a hub descriptor is fetched for a device, we need to update the xHC's
4660  * internal data structures for the device.
4661  */
4662 int xhci_update_hub_device(struct usb_hcd *hcd, struct usb_device *hdev,
4663                         struct usb_tt *tt, gfp_t mem_flags)
4664 {
4665         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
4666         struct xhci_virt_device *vdev;
4667         struct xhci_command *config_cmd;
4668         struct xhci_input_control_ctx *ctrl_ctx;
4669         struct xhci_slot_ctx *slot_ctx;
4670         unsigned long flags;
4671         unsigned think_time;
4672         int ret;
4673
4674         /* Ignore root hubs */
4675         if (!hdev->parent)
4676                 return 0;
4677
4678         vdev = xhci->devs[hdev->slot_id];
4679         if (!vdev) {
4680                 xhci_warn(xhci, "Cannot update hub desc for unknown device.\n");
4681                 return -EINVAL;
4682         }
4683         config_cmd = xhci_alloc_command(xhci, true, true, mem_flags);
4684         if (!config_cmd) {
4685                 xhci_dbg(xhci, "Could not allocate xHCI command structure.\n");
4686                 return -ENOMEM;
4687         }
4688         ctrl_ctx = xhci_get_input_control_ctx(xhci, config_cmd->in_ctx);
4689         if (!ctrl_ctx) {
4690                 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
4691                                 __func__);
4692                 xhci_free_command(xhci, config_cmd);
4693                 return -ENOMEM;
4694         }
4695
4696         spin_lock_irqsave(&xhci->lock, flags);
4697         if (hdev->speed == USB_SPEED_HIGH &&
4698                         xhci_alloc_tt_info(xhci, vdev, hdev, tt, GFP_ATOMIC)) {
4699                 xhci_dbg(xhci, "Could not allocate xHCI TT structure.\n");
4700                 xhci_free_command(xhci, config_cmd);
4701                 spin_unlock_irqrestore(&xhci->lock, flags);
4702                 return -ENOMEM;
4703         }
4704
4705         xhci_slot_copy(xhci, config_cmd->in_ctx, vdev->out_ctx);
4706         ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
4707         slot_ctx = xhci_get_slot_ctx(xhci, config_cmd->in_ctx);
4708         slot_ctx->dev_info |= cpu_to_le32(DEV_HUB);
4709         if (tt->multi)
4710                 slot_ctx->dev_info |= cpu_to_le32(DEV_MTT);
4711         if (xhci->hci_version > 0x95) {
4712                 xhci_dbg(xhci, "xHCI version %x needs hub "
4713                                 "TT think time and number of ports\n",
4714                                 (unsigned int) xhci->hci_version);
4715                 slot_ctx->dev_info2 |= cpu_to_le32(XHCI_MAX_PORTS(hdev->maxchild));
4716                 /* Set TT think time - convert from ns to FS bit times.
4717                  * 0 = 8 FS bit times, 1 = 16 FS bit times,
4718                  * 2 = 24 FS bit times, 3 = 32 FS bit times.
4719                  *
4720                  * xHCI 1.0: this field shall be 0 if the device is not a
4721                  * High-spped hub.
4722                  */
4723                 think_time = tt->think_time;
4724                 if (think_time != 0)
4725                         think_time = (think_time / 666) - 1;
4726                 if (xhci->hci_version < 0x100 || hdev->speed == USB_SPEED_HIGH)
4727                         slot_ctx->tt_info |=
4728                                 cpu_to_le32(TT_THINK_TIME(think_time));
4729         } else {
4730                 xhci_dbg(xhci, "xHCI version %x doesn't need hub "
4731                                 "TT think time or number of ports\n",
4732                                 (unsigned int) xhci->hci_version);
4733         }
4734         slot_ctx->dev_state = 0;
4735         spin_unlock_irqrestore(&xhci->lock, flags);
4736
4737         xhci_dbg(xhci, "Set up %s for hub device.\n",
4738                         (xhci->hci_version > 0x95) ?
4739                         "configure endpoint" : "evaluate context");
4740         xhci_dbg(xhci, "Slot %u Input Context:\n", hdev->slot_id);
4741         xhci_dbg_ctx(xhci, config_cmd->in_ctx, 0);
4742
4743         /* Issue and wait for the configure endpoint or
4744          * evaluate context command.
4745          */
4746         if (xhci->hci_version > 0x95)
4747                 ret = xhci_configure_endpoint(xhci, hdev, config_cmd,
4748                                 false, false);
4749         else
4750                 ret = xhci_configure_endpoint(xhci, hdev, config_cmd,
4751                                 true, false);
4752
4753         xhci_dbg(xhci, "Slot %u Output Context:\n", hdev->slot_id);
4754         xhci_dbg_ctx(xhci, vdev->out_ctx, 0);
4755
4756         xhci_free_command(xhci, config_cmd);
4757         return ret;
4758 }
4759
4760 int xhci_get_frame(struct usb_hcd *hcd)
4761 {
4762         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
4763         /* EHCI mods by the periodic size.  Why? */
4764         return xhci_readl(xhci, &xhci->run_regs->microframe_index) >> 3;
4765 }
4766
4767 int xhci_gen_setup(struct usb_hcd *hcd, xhci_get_quirks_t get_quirks)
4768 {
4769         struct xhci_hcd         *xhci;
4770         struct device           *dev = hcd->self.controller;
4771         int                     retval;
4772         u32                     temp;
4773
4774         /* Accept arbitrarily long scatter-gather lists */
4775         hcd->self.sg_tablesize = ~0;
4776         /* XHCI controllers don't stop the ep queue on short packets :| */
4777         hcd->self.no_stop_on_short = 1;
4778
4779         if (usb_hcd_is_primary_hcd(hcd)) {
4780                 xhci = kzalloc(sizeof(struct xhci_hcd), GFP_KERNEL);
4781                 if (!xhci)
4782                         return -ENOMEM;
4783                 *((struct xhci_hcd **) hcd->hcd_priv) = xhci;
4784                 xhci->main_hcd = hcd;
4785                 /* Mark the first roothub as being USB 2.0.
4786                  * The xHCI driver will register the USB 3.0 roothub.
4787                  */
4788                 hcd->speed = HCD_USB2;
4789                 hcd->self.root_hub->speed = USB_SPEED_HIGH;
4790                 /*
4791                  * USB 2.0 roothub under xHCI has an integrated TT,
4792                  * (rate matching hub) as opposed to having an OHCI/UHCI
4793                  * companion controller.
4794                  */
4795                 hcd->has_tt = 1;
4796         } else {
4797                 /* xHCI private pointer was set in xhci_pci_probe for the second
4798                  * registered roothub.
4799                  */
4800                 xhci = hcd_to_xhci(hcd);
4801                 temp = xhci_readl(xhci, &xhci->cap_regs->hcc_params);
4802                 if (HCC_64BIT_ADDR(temp)) {
4803                         xhci_dbg(xhci, "Enabling 64-bit DMA addresses.\n");
4804                         dma_set_mask(hcd->self.controller, DMA_BIT_MASK(64));
4805                 } else {
4806                         dma_set_mask(hcd->self.controller, DMA_BIT_MASK(32));
4807                 }
4808                 return 0;
4809         }
4810
4811         xhci->cap_regs = hcd->regs;
4812         xhci->op_regs = hcd->regs +
4813                 HC_LENGTH(xhci_readl(xhci, &xhci->cap_regs->hc_capbase));
4814         xhci->run_regs = hcd->regs +
4815                 (xhci_readl(xhci, &xhci->cap_regs->run_regs_off) & RTSOFF_MASK);
4816         /* Cache read-only capability registers */
4817         xhci->hcs_params1 = xhci_readl(xhci, &xhci->cap_regs->hcs_params1);
4818         xhci->hcs_params2 = xhci_readl(xhci, &xhci->cap_regs->hcs_params2);
4819         xhci->hcs_params3 = xhci_readl(xhci, &xhci->cap_regs->hcs_params3);
4820         xhci->hcc_params = xhci_readl(xhci, &xhci->cap_regs->hc_capbase);
4821         xhci->hci_version = HC_VERSION(xhci->hcc_params);
4822         xhci->hcc_params = xhci_readl(xhci, &xhci->cap_regs->hcc_params);
4823         xhci_print_registers(xhci);
4824
4825         get_quirks(dev, xhci);
4826
4827         /* In xhci controllers which follow xhci 1.0 spec gives a spurious
4828          * success event after a short transfer. This quirk will ignore such
4829          * spurious event.
4830          */
4831         if (xhci->hci_version > 0x96)
4832                 xhci->quirks |= XHCI_SPURIOUS_SUCCESS;
4833
4834         /* Make sure the HC is halted. */
4835         retval = xhci_halt(xhci);
4836         if (retval)
4837                 goto error;
4838
4839         xhci_dbg(xhci, "Resetting HCD\n");
4840         /* Reset the internal HC memory state and registers. */
4841         retval = xhci_reset(xhci);
4842         if (retval)
4843                 goto error;
4844         xhci_dbg(xhci, "Reset complete\n");
4845
4846         temp = xhci_readl(xhci, &xhci->cap_regs->hcc_params);
4847         if (HCC_64BIT_ADDR(temp)) {
4848                 xhci_dbg(xhci, "Enabling 64-bit DMA addresses.\n");
4849                 dma_set_mask(hcd->self.controller, DMA_BIT_MASK(64));
4850         } else {
4851                 dma_set_mask(hcd->self.controller, DMA_BIT_MASK(32));
4852         }
4853
4854         xhci_dbg(xhci, "Calling HCD init\n");
4855         /* Initialize HCD and host controller data structures. */
4856         retval = xhci_init(hcd);
4857         if (retval)
4858                 goto error;
4859         xhci_dbg(xhci, "Called HCD init\n");
4860         return 0;
4861 error:
4862         kfree(xhci);
4863         return retval;
4864 }
4865
4866 MODULE_DESCRIPTION(DRIVER_DESC);
4867 MODULE_AUTHOR(DRIVER_AUTHOR);
4868 MODULE_LICENSE("GPL");
4869
4870 static int __init xhci_hcd_init(void)
4871 {
4872         int retval;
4873
4874         retval = xhci_register_pci();
4875         if (retval < 0) {
4876                 pr_debug("Problem registering PCI driver.\n");
4877                 return retval;
4878         }
4879         retval = xhci_register_plat();
4880         if (retval < 0) {
4881                 pr_debug("Problem registering platform driver.\n");
4882                 goto unreg_pci;
4883         }
4884         /*
4885          * Check the compiler generated sizes of structures that must be laid
4886          * out in specific ways for hardware access.
4887          */
4888         BUILD_BUG_ON(sizeof(struct xhci_doorbell_array) != 256*32/8);
4889         BUILD_BUG_ON(sizeof(struct xhci_slot_ctx) != 8*32/8);
4890         BUILD_BUG_ON(sizeof(struct xhci_ep_ctx) != 8*32/8);
4891         /* xhci_device_control has eight fields, and also
4892          * embeds one xhci_slot_ctx and 31 xhci_ep_ctx
4893          */
4894         BUILD_BUG_ON(sizeof(struct xhci_stream_ctx) != 4*32/8);
4895         BUILD_BUG_ON(sizeof(union xhci_trb) != 4*32/8);
4896         BUILD_BUG_ON(sizeof(struct xhci_erst_entry) != 4*32/8);
4897         BUILD_BUG_ON(sizeof(struct xhci_cap_regs) != 7*32/8);
4898         BUILD_BUG_ON(sizeof(struct xhci_intr_reg) != 8*32/8);
4899         /* xhci_run_regs has eight fields and embeds 128 xhci_intr_regs */
4900         BUILD_BUG_ON(sizeof(struct xhci_run_regs) != (8+8*128)*32/8);
4901         return 0;
4902 unreg_pci:
4903         xhci_unregister_pci();
4904         return retval;
4905 }
4906 module_init(xhci_hcd_init);
4907
4908 static void __exit xhci_hcd_cleanup(void)
4909 {
4910         xhci_unregister_pci();
4911         xhci_unregister_plat();
4912 }
4913 module_exit(xhci_hcd_cleanup);