2 * xHCI host controller driver
4 * Copyright (C) 2008 Intel Corp.
7 * Some code borrowed from the Linux EHCI driver.
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software Foundation,
20 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 #include <linux/pci.h>
24 #include <linux/irq.h>
25 #include <linux/log2.h>
26 #include <linux/module.h>
27 #include <linux/moduleparam.h>
28 #include <linux/slab.h>
32 #define DRIVER_AUTHOR "Sarah Sharp"
33 #define DRIVER_DESC "'eXtensible' Host Controller (xHC) Driver"
35 /* Some 0.95 hardware can't handle the chain bit on a Link TRB being cleared */
36 static int link_quirk;
37 module_param(link_quirk, int, S_IRUGO | S_IWUSR);
38 MODULE_PARM_DESC(link_quirk, "Don't clear the chain bit on a link TRB");
40 /* TODO: copied from ehci-hcd.c - can this be refactored? */
42 * handshake - spin reading hc until handshake completes or fails
43 * @ptr: address of hc register to be read
44 * @mask: bits to look at in result of read
45 * @done: value of those bits when handshake succeeds
46 * @usec: timeout in microseconds
48 * Returns negative errno, or zero on success
50 * Success happens when the "mask" bits have the specified value (hardware
51 * handshake done). There are two failure modes: "usec" have passed (major
52 * hardware flakeout), or the register reads as all-ones (hardware removed).
54 static int handshake(struct xhci_hcd *xhci, void __iomem *ptr,
55 u32 mask, u32 done, int usec)
60 result = xhci_readl(xhci, ptr);
61 if (result == ~(u32)0) /* card removed */
73 * Disable interrupts and begin the xHCI halting process.
75 void xhci_quiesce(struct xhci_hcd *xhci)
82 halted = xhci_readl(xhci, &xhci->op_regs->status) & STS_HALT;
86 cmd = xhci_readl(xhci, &xhci->op_regs->command);
88 xhci_writel(xhci, cmd, &xhci->op_regs->command);
92 * Force HC into halt state.
94 * Disable any IRQs and clear the run/stop bit.
95 * HC will complete any current and actively pipelined transactions, and
96 * should halt within 16 microframes of the run/stop bit being cleared.
97 * Read HC Halted bit in the status register to see when the HC is finished.
98 * XXX: shouldn't we set HC_STATE_HALT here somewhere?
100 int xhci_halt(struct xhci_hcd *xhci)
102 xhci_dbg(xhci, "// Halt the HC\n");
105 return handshake(xhci, &xhci->op_regs->status,
106 STS_HALT, STS_HALT, XHCI_MAX_HALT_USEC);
110 * Set the run bit and wait for the host to be running.
112 int xhci_start(struct xhci_hcd *xhci)
117 temp = xhci_readl(xhci, &xhci->op_regs->command);
119 xhci_dbg(xhci, "// Turn on HC, cmd = 0x%x.\n",
121 xhci_writel(xhci, temp, &xhci->op_regs->command);
124 * Wait for the HCHalted Status bit to be 0 to indicate the host is
127 ret = handshake(xhci, &xhci->op_regs->status,
128 STS_HALT, 0, XHCI_MAX_HALT_USEC);
129 if (ret == -ETIMEDOUT)
130 xhci_err(xhci, "Host took too long to start, "
131 "waited %u microseconds.\n",
137 * Reset a halted HC, and set the internal HC state to HC_STATE_HALT.
139 * This resets pipelines, timers, counters, state machines, etc.
140 * Transactions will be terminated immediately, and operational registers
141 * will be set to their defaults.
143 int xhci_reset(struct xhci_hcd *xhci)
149 state = xhci_readl(xhci, &xhci->op_regs->status);
150 if ((state & STS_HALT) == 0) {
151 xhci_warn(xhci, "Host controller not halted, aborting reset.\n");
155 xhci_dbg(xhci, "// Reset the HC\n");
156 command = xhci_readl(xhci, &xhci->op_regs->command);
157 command |= CMD_RESET;
158 xhci_writel(xhci, command, &xhci->op_regs->command);
159 /* XXX: Why does EHCI set this here? Shouldn't other code do this? */
160 xhci_to_hcd(xhci)->state = HC_STATE_HALT;
162 ret = handshake(xhci, &xhci->op_regs->command,
163 CMD_RESET, 0, 250 * 1000);
167 xhci_dbg(xhci, "Wait for controller to be ready for doorbell rings\n");
169 * xHCI cannot write to any doorbells or operational registers other
170 * than status until the "Controller Not Ready" flag is cleared.
172 return handshake(xhci, &xhci->op_regs->status, STS_CNR, 0, 250 * 1000);
177 * free all IRQs request
179 static void xhci_free_irq(struct xhci_hcd *xhci)
182 struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
184 /* return if using legacy interrupt */
185 if (xhci_to_hcd(xhci)->irq >= 0)
188 if (xhci->msix_entries) {
189 for (i = 0; i < xhci->msix_count; i++)
190 if (xhci->msix_entries[i].vector)
191 free_irq(xhci->msix_entries[i].vector,
193 } else if (pdev->irq >= 0)
194 free_irq(pdev->irq, xhci_to_hcd(xhci));
202 static int xhci_setup_msi(struct xhci_hcd *xhci)
205 struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
207 ret = pci_enable_msi(pdev);
209 xhci_err(xhci, "failed to allocate MSI entry\n");
213 ret = request_irq(pdev->irq, (irq_handler_t)xhci_msi_irq,
214 0, "xhci_hcd", xhci_to_hcd(xhci));
216 xhci_err(xhci, "disable MSI interrupt\n");
217 pci_disable_msi(pdev);
226 static int xhci_setup_msix(struct xhci_hcd *xhci)
229 struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
232 * calculate number of msi-x vectors supported.
233 * - HCS_MAX_INTRS: the max number of interrupts the host can handle,
234 * with max number of interrupters based on the xhci HCSPARAMS1.
235 * - num_online_cpus: maximum msi-x vectors per CPUs core.
236 * Add additional 1 vector to ensure always available interrupt.
238 xhci->msix_count = min(num_online_cpus() + 1,
239 HCS_MAX_INTRS(xhci->hcs_params1));
242 kmalloc((sizeof(struct msix_entry))*xhci->msix_count,
244 if (!xhci->msix_entries) {
245 xhci_err(xhci, "Failed to allocate MSI-X entries\n");
249 for (i = 0; i < xhci->msix_count; i++) {
250 xhci->msix_entries[i].entry = i;
251 xhci->msix_entries[i].vector = 0;
254 ret = pci_enable_msix(pdev, xhci->msix_entries, xhci->msix_count);
256 xhci_err(xhci, "Failed to enable MSI-X\n");
260 for (i = 0; i < xhci->msix_count; i++) {
261 ret = request_irq(xhci->msix_entries[i].vector,
262 (irq_handler_t)xhci_msi_irq,
263 0, "xhci_hcd", xhci_to_hcd(xhci));
271 xhci_err(xhci, "disable MSI-X interrupt\n");
273 pci_disable_msix(pdev);
275 kfree(xhci->msix_entries);
276 xhci->msix_entries = NULL;
280 /* Free any IRQs and disable MSI-X */
281 static void xhci_cleanup_msix(struct xhci_hcd *xhci)
283 struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
287 if (xhci->msix_entries) {
288 pci_disable_msix(pdev);
289 kfree(xhci->msix_entries);
290 xhci->msix_entries = NULL;
292 pci_disable_msi(pdev);
299 * Initialize memory for HCD and xHC (one-time init).
301 * Program the PAGESIZE register, initialize the device context array, create
302 * device contexts (?), set up a command ring segment (or two?), create event
303 * ring (one for now).
305 int xhci_init(struct usb_hcd *hcd)
307 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
310 xhci_dbg(xhci, "xhci_init\n");
311 spin_lock_init(&xhci->lock);
313 xhci_dbg(xhci, "QUIRK: Not clearing Link TRB chain bits.\n");
314 xhci->quirks |= XHCI_LINK_TRB_QUIRK;
316 xhci_dbg(xhci, "xHCI doesn't need link TRB QUIRK\n");
318 retval = xhci_mem_init(xhci, GFP_KERNEL);
319 xhci_dbg(xhci, "Finished xhci_init\n");
324 /*-------------------------------------------------------------------------*/
327 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
328 void xhci_event_ring_work(unsigned long arg)
333 struct xhci_hcd *xhci = (struct xhci_hcd *) arg;
336 xhci_dbg(xhci, "Poll event ring: %lu\n", jiffies);
338 spin_lock_irqsave(&xhci->lock, flags);
339 temp = xhci_readl(xhci, &xhci->op_regs->status);
340 xhci_dbg(xhci, "op reg status = 0x%x\n", temp);
341 if (temp == 0xffffffff || (xhci->xhc_state & XHCI_STATE_DYING)) {
342 xhci_dbg(xhci, "HW died, polling stopped.\n");
343 spin_unlock_irqrestore(&xhci->lock, flags);
347 temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
348 xhci_dbg(xhci, "ir_set 0 pending = 0x%x\n", temp);
349 xhci_dbg(xhci, "No-op commands handled = %d\n", xhci->noops_handled);
350 xhci_dbg(xhci, "HC error bitmask = 0x%x\n", xhci->error_bitmask);
351 xhci->error_bitmask = 0;
352 xhci_dbg(xhci, "Event ring:\n");
353 xhci_debug_segment(xhci, xhci->event_ring->deq_seg);
354 xhci_dbg_ring_ptrs(xhci, xhci->event_ring);
355 temp_64 = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
356 temp_64 &= ~ERST_PTR_MASK;
357 xhci_dbg(xhci, "ERST deq = 64'h%0lx\n", (long unsigned int) temp_64);
358 xhci_dbg(xhci, "Command ring:\n");
359 xhci_debug_segment(xhci, xhci->cmd_ring->deq_seg);
360 xhci_dbg_ring_ptrs(xhci, xhci->cmd_ring);
361 xhci_dbg_cmd_ptrs(xhci);
362 for (i = 0; i < MAX_HC_SLOTS; ++i) {
365 for (j = 0; j < 31; ++j) {
366 xhci_dbg_ep_rings(xhci, i, j, &xhci->devs[i]->eps[j]);
370 if (xhci->noops_submitted != NUM_TEST_NOOPS)
371 if (xhci_setup_one_noop(xhci))
372 xhci_ring_cmd_db(xhci);
373 spin_unlock_irqrestore(&xhci->lock, flags);
376 mod_timer(&xhci->event_ring_timer, jiffies + POLL_TIMEOUT * HZ);
378 xhci_dbg(xhci, "Quit polling the event ring.\n");
383 * Start the HC after it was halted.
385 * This function is called by the USB core when the HC driver is added.
386 * Its opposite is xhci_stop().
388 * xhci_init() must be called once before this function can be called.
389 * Reset the HC, enable device slot contexts, program DCBAAP, and
390 * set command ring pointer and event ring pointer.
392 * Setup MSI-X vectors and enable interrupts.
394 int xhci_run(struct usb_hcd *hcd)
399 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
400 struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
401 void (*doorbell)(struct xhci_hcd *) = NULL;
403 hcd->uses_new_polling = 1;
405 xhci_dbg(xhci, "xhci_run\n");
406 /* unregister the legacy interrupt */
408 free_irq(hcd->irq, hcd);
411 ret = xhci_setup_msix(xhci);
413 /* fall back to msi*/
414 ret = xhci_setup_msi(xhci);
417 /* fall back to legacy interrupt*/
418 ret = request_irq(pdev->irq, &usb_hcd_irq, IRQF_SHARED,
419 hcd->irq_descr, hcd);
421 xhci_err(xhci, "request interrupt %d failed\n",
425 hcd->irq = pdev->irq;
428 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
429 init_timer(&xhci->event_ring_timer);
430 xhci->event_ring_timer.data = (unsigned long) xhci;
431 xhci->event_ring_timer.function = xhci_event_ring_work;
432 /* Poll the event ring */
433 xhci->event_ring_timer.expires = jiffies + POLL_TIMEOUT * HZ;
435 xhci_dbg(xhci, "Setting event ring polling timer\n");
436 add_timer(&xhci->event_ring_timer);
439 xhci_dbg(xhci, "Command ring memory map follows:\n");
440 xhci_debug_ring(xhci, xhci->cmd_ring);
441 xhci_dbg_ring_ptrs(xhci, xhci->cmd_ring);
442 xhci_dbg_cmd_ptrs(xhci);
444 xhci_dbg(xhci, "ERST memory map follows:\n");
445 xhci_dbg_erst(xhci, &xhci->erst);
446 xhci_dbg(xhci, "Event ring:\n");
447 xhci_debug_ring(xhci, xhci->event_ring);
448 xhci_dbg_ring_ptrs(xhci, xhci->event_ring);
449 temp_64 = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
450 temp_64 &= ~ERST_PTR_MASK;
451 xhci_dbg(xhci, "ERST deq = 64'h%0lx\n", (long unsigned int) temp_64);
453 xhci_dbg(xhci, "// Set the interrupt modulation register\n");
454 temp = xhci_readl(xhci, &xhci->ir_set->irq_control);
455 temp &= ~ER_IRQ_INTERVAL_MASK;
457 xhci_writel(xhci, temp, &xhci->ir_set->irq_control);
459 /* Set the HCD state before we enable the irqs */
460 hcd->state = HC_STATE_RUNNING;
461 temp = xhci_readl(xhci, &xhci->op_regs->command);
463 xhci_dbg(xhci, "// Enable interrupts, cmd = 0x%x.\n",
465 xhci_writel(xhci, temp, &xhci->op_regs->command);
467 temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
468 xhci_dbg(xhci, "// Enabling event ring interrupter %p by writing 0x%x to irq_pending\n",
469 xhci->ir_set, (unsigned int) ER_IRQ_ENABLE(temp));
470 xhci_writel(xhci, ER_IRQ_ENABLE(temp),
471 &xhci->ir_set->irq_pending);
472 xhci_print_ir_set(xhci, xhci->ir_set, 0);
474 if (NUM_TEST_NOOPS > 0)
475 doorbell = xhci_setup_one_noop(xhci);
476 if (xhci->quirks & XHCI_NEC_HOST)
477 xhci_queue_vendor_command(xhci, 0, 0, 0,
478 TRB_TYPE(TRB_NEC_GET_FW));
480 if (xhci_start(xhci)) {
487 if (xhci->quirks & XHCI_NEC_HOST)
488 xhci_ring_cmd_db(xhci);
490 xhci_dbg(xhci, "Finished xhci_run\n");
497 * This function is called by the USB core when the HC driver is removed.
498 * Its opposite is xhci_run().
500 * Disable device contexts, disable IRQs, and quiesce the HC.
501 * Reset the HC, finish any completed transactions, and cleanup memory.
503 void xhci_stop(struct usb_hcd *hcd)
506 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
508 spin_lock_irq(&xhci->lock);
511 xhci_cleanup_msix(xhci);
512 spin_unlock_irq(&xhci->lock);
514 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
515 /* Tell the event ring poll function not to reschedule */
517 del_timer_sync(&xhci->event_ring_timer);
520 xhci_dbg(xhci, "// Disabling event ring interrupts\n");
521 temp = xhci_readl(xhci, &xhci->op_regs->status);
522 xhci_writel(xhci, temp & ~STS_EINT, &xhci->op_regs->status);
523 temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
524 xhci_writel(xhci, ER_IRQ_DISABLE(temp),
525 &xhci->ir_set->irq_pending);
526 xhci_print_ir_set(xhci, xhci->ir_set, 0);
528 xhci_dbg(xhci, "cleaning up memory\n");
529 xhci_mem_cleanup(xhci);
530 xhci_dbg(xhci, "xhci_stop completed - status = %x\n",
531 xhci_readl(xhci, &xhci->op_regs->status));
535 * Shutdown HC (not bus-specific)
537 * This is called when the machine is rebooting or halting. We assume that the
538 * machine will be powered off, and the HC's internal state will be reset.
539 * Don't bother to free memory.
541 void xhci_shutdown(struct usb_hcd *hcd)
543 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
545 spin_lock_irq(&xhci->lock);
547 xhci_cleanup_msix(xhci);
548 spin_unlock_irq(&xhci->lock);
550 xhci_dbg(xhci, "xhci_shutdown completed - status = %x\n",
551 xhci_readl(xhci, &xhci->op_regs->status));
555 static void xhci_save_registers(struct xhci_hcd *xhci)
557 xhci->s3.command = xhci_readl(xhci, &xhci->op_regs->command);
558 xhci->s3.dev_nt = xhci_readl(xhci, &xhci->op_regs->dev_notification);
559 xhci->s3.dcbaa_ptr = xhci_read_64(xhci, &xhci->op_regs->dcbaa_ptr);
560 xhci->s3.config_reg = xhci_readl(xhci, &xhci->op_regs->config_reg);
561 xhci->s3.irq_pending = xhci_readl(xhci, &xhci->ir_set->irq_pending);
562 xhci->s3.irq_control = xhci_readl(xhci, &xhci->ir_set->irq_control);
563 xhci->s3.erst_size = xhci_readl(xhci, &xhci->ir_set->erst_size);
564 xhci->s3.erst_base = xhci_read_64(xhci, &xhci->ir_set->erst_base);
565 xhci->s3.erst_dequeue = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
568 static void xhci_restore_registers(struct xhci_hcd *xhci)
570 xhci_writel(xhci, xhci->s3.command, &xhci->op_regs->command);
571 xhci_writel(xhci, xhci->s3.dev_nt, &xhci->op_regs->dev_notification);
572 xhci_write_64(xhci, xhci->s3.dcbaa_ptr, &xhci->op_regs->dcbaa_ptr);
573 xhci_writel(xhci, xhci->s3.config_reg, &xhci->op_regs->config_reg);
574 xhci_writel(xhci, xhci->s3.irq_pending, &xhci->ir_set->irq_pending);
575 xhci_writel(xhci, xhci->s3.irq_control, &xhci->ir_set->irq_control);
576 xhci_writel(xhci, xhci->s3.erst_size, &xhci->ir_set->erst_size);
577 xhci_write_64(xhci, xhci->s3.erst_base, &xhci->ir_set->erst_base);
580 static void xhci_set_cmd_ring_deq(struct xhci_hcd *xhci)
584 /* step 2: initialize command ring buffer */
585 val_64 = xhci_read_64(xhci, &xhci->op_regs->cmd_ring);
586 val_64 = (val_64 & (u64) CMD_RING_RSVD_BITS) |
587 (xhci_trb_virt_to_dma(xhci->cmd_ring->deq_seg,
588 xhci->cmd_ring->dequeue) &
589 (u64) ~CMD_RING_RSVD_BITS) |
590 xhci->cmd_ring->cycle_state;
591 xhci_dbg(xhci, "// Setting command ring address to 0x%llx\n",
592 (long unsigned long) val_64);
593 xhci_write_64(xhci, val_64, &xhci->op_regs->cmd_ring);
597 * The whole command ring must be cleared to zero when we suspend the host.
599 * The host doesn't save the command ring pointer in the suspend well, so we
600 * need to re-program it on resume. Unfortunately, the pointer must be 64-byte
601 * aligned, because of the reserved bits in the command ring dequeue pointer
602 * register. Therefore, we can't just set the dequeue pointer back in the
603 * middle of the ring (TRBs are 16-byte aligned).
605 static void xhci_clear_command_ring(struct xhci_hcd *xhci)
607 struct xhci_ring *ring;
608 struct xhci_segment *seg;
610 ring = xhci->cmd_ring;
613 memset(seg->trbs, 0, SEGMENT_SIZE);
615 } while (seg != ring->deq_seg);
617 /* Reset the software enqueue and dequeue pointers */
618 ring->deq_seg = ring->first_seg;
619 ring->dequeue = ring->first_seg->trbs;
620 ring->enq_seg = ring->deq_seg;
621 ring->enqueue = ring->dequeue;
624 * Ring is now zeroed, so the HW should look for change of ownership
625 * when the cycle bit is set to 1.
627 ring->cycle_state = 1;
630 * Reset the hardware dequeue pointer.
631 * Yes, this will need to be re-written after resume, but we're paranoid
632 * and want to make sure the hardware doesn't access bogus memory
633 * because, say, the BIOS or an SMI started the host without changing
634 * the command ring pointers.
636 xhci_set_cmd_ring_deq(xhci);
640 * Stop HC (not bus-specific)
642 * This is called when the machine transition into S3/S4 mode.
645 int xhci_suspend(struct xhci_hcd *xhci)
648 struct usb_hcd *hcd = xhci_to_hcd(xhci);
651 spin_lock_irq(&xhci->lock);
652 clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
653 /* step 1: stop endpoint */
654 /* skipped assuming that port suspend has done */
656 /* step 2: clear Run/Stop bit */
657 command = xhci_readl(xhci, &xhci->op_regs->command);
659 xhci_writel(xhci, command, &xhci->op_regs->command);
660 if (handshake(xhci, &xhci->op_regs->status,
661 STS_HALT, STS_HALT, 100*100)) {
662 xhci_warn(xhci, "WARN: xHC CMD_RUN timeout\n");
663 spin_unlock_irq(&xhci->lock);
666 xhci_clear_command_ring(xhci);
668 /* step 3: save registers */
669 xhci_save_registers(xhci);
671 /* step 4: set CSS flag */
672 command = xhci_readl(xhci, &xhci->op_regs->command);
674 xhci_writel(xhci, command, &xhci->op_regs->command);
675 if (handshake(xhci, &xhci->op_regs->status, STS_SAVE, 0, 10*100)) {
676 xhci_warn(xhci, "WARN: xHC CMD_CSS timeout\n");
677 spin_unlock_irq(&xhci->lock);
680 /* step 5: remove core well power */
681 xhci_cleanup_msix(xhci);
682 spin_unlock_irq(&xhci->lock);
688 * start xHC (not bus-specific)
690 * This is called when the machine transition from S3/S4 mode.
693 int xhci_resume(struct xhci_hcd *xhci, bool hibernated)
695 u32 command, temp = 0;
696 struct usb_hcd *hcd = xhci_to_hcd(xhci);
697 struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
698 int old_state, retval;
700 old_state = hcd->state;
701 if (time_before(jiffies, xhci->next_statechange))
704 spin_lock_irq(&xhci->lock);
707 /* step 1: restore register */
708 xhci_restore_registers(xhci);
709 /* step 2: initialize command ring buffer */
710 xhci_set_cmd_ring_deq(xhci);
711 /* step 3: restore state and start state*/
712 /* step 3: set CRS flag */
713 command = xhci_readl(xhci, &xhci->op_regs->command);
715 xhci_writel(xhci, command, &xhci->op_regs->command);
716 if (handshake(xhci, &xhci->op_regs->status,
717 STS_RESTORE, 0, 10*100)) {
718 xhci_dbg(xhci, "WARN: xHC CMD_CSS timeout\n");
719 spin_unlock_irq(&xhci->lock);
722 temp = xhci_readl(xhci, &xhci->op_regs->status);
725 /* If restore operation fails, re-initialize the HC during resume */
726 if ((temp & STS_SRE) || hibernated) {
727 usb_root_hub_lost_power(hcd->self.root_hub);
729 xhci_dbg(xhci, "Stop HCD\n");
733 xhci_cleanup_msix(xhci);
734 spin_unlock_irq(&xhci->lock);
736 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
737 /* Tell the event ring poll function not to reschedule */
739 del_timer_sync(&xhci->event_ring_timer);
742 xhci_dbg(xhci, "// Disabling event ring interrupts\n");
743 temp = xhci_readl(xhci, &xhci->op_regs->status);
744 xhci_writel(xhci, temp & ~STS_EINT, &xhci->op_regs->status);
745 temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
746 xhci_writel(xhci, ER_IRQ_DISABLE(temp),
747 &xhci->ir_set->irq_pending);
748 xhci_print_ir_set(xhci, xhci->ir_set, 0);
750 xhci_dbg(xhci, "cleaning up memory\n");
751 xhci_mem_cleanup(xhci);
752 xhci_dbg(xhci, "xhci_stop completed - status = %x\n",
753 xhci_readl(xhci, &xhci->op_regs->status));
755 xhci_dbg(xhci, "Initialize the HCD\n");
756 retval = xhci_init(hcd);
760 xhci_dbg(xhci, "Start the HCD\n");
761 retval = xhci_run(hcd);
763 set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
764 hcd->state = HC_STATE_SUSPENDED;
768 spin_unlock_irq(&xhci->lock);
771 free_irq(hcd->irq, hcd);
774 retval = xhci_setup_msix(xhci);
776 /* fall back to msi*/
777 retval = xhci_setup_msi(xhci);
780 /* fall back to legacy interrupt*/
781 retval = request_irq(pdev->irq, &usb_hcd_irq, IRQF_SHARED,
782 hcd->irq_descr, hcd);
784 xhci_err(xhci, "request interrupt %d failed\n",
788 hcd->irq = pdev->irq;
791 spin_lock_irq(&xhci->lock);
792 /* step 4: set Run/Stop bit */
793 command = xhci_readl(xhci, &xhci->op_regs->command);
795 xhci_writel(xhci, command, &xhci->op_regs->command);
796 handshake(xhci, &xhci->op_regs->status, STS_HALT,
799 /* step 5: walk topology and initialize portsc,
800 * portpmsc and portli
802 /* this is done in bus_resume */
804 /* step 6: restart each of the previously
805 * Running endpoints by ringing their doorbells
808 set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
810 hcd->state = old_state;
812 hcd->state = HC_STATE_SUSPENDED;
814 spin_unlock_irq(&xhci->lock);
817 #endif /* CONFIG_PM */
819 /*-------------------------------------------------------------------------*/
822 * xhci_get_endpoint_index - Used for passing endpoint bitmasks between the core and
823 * HCDs. Find the index for an endpoint given its descriptor. Use the return
824 * value to right shift 1 for the bitmask.
826 * Index = (epnum * 2) + direction - 1,
827 * where direction = 0 for OUT, 1 for IN.
828 * For control endpoints, the IN index is used (OUT index is unused), so
829 * index = (epnum * 2) + direction - 1 = (epnum * 2) + 1 - 1 = (epnum * 2)
831 unsigned int xhci_get_endpoint_index(struct usb_endpoint_descriptor *desc)
834 if (usb_endpoint_xfer_control(desc))
835 index = (unsigned int) (usb_endpoint_num(desc)*2);
837 index = (unsigned int) (usb_endpoint_num(desc)*2) +
838 (usb_endpoint_dir_in(desc) ? 1 : 0) - 1;
842 /* Find the flag for this endpoint (for use in the control context). Use the
843 * endpoint index to create a bitmask. The slot context is bit 0, endpoint 0 is
846 unsigned int xhci_get_endpoint_flag(struct usb_endpoint_descriptor *desc)
848 return 1 << (xhci_get_endpoint_index(desc) + 1);
851 /* Find the flag for this endpoint (for use in the control context). Use the
852 * endpoint index to create a bitmask. The slot context is bit 0, endpoint 0 is
855 unsigned int xhci_get_endpoint_flag_from_index(unsigned int ep_index)
857 return 1 << (ep_index + 1);
860 /* Compute the last valid endpoint context index. Basically, this is the
861 * endpoint index plus one. For slot contexts with more than valid endpoint,
862 * we find the most significant bit set in the added contexts flags.
863 * e.g. ep 1 IN (with epnum 0x81) => added_ctxs = 0b1000
864 * fls(0b1000) = 4, but the endpoint context index is 3, so subtract one.
866 unsigned int xhci_last_valid_endpoint(u32 added_ctxs)
868 return fls(added_ctxs) - 1;
871 /* Returns 1 if the arguments are OK;
872 * returns 0 this is a root hub; returns -EINVAL for NULL pointers.
874 int xhci_check_args(struct usb_hcd *hcd, struct usb_device *udev,
875 struct usb_host_endpoint *ep, int check_ep, bool check_virt_dev,
877 struct xhci_hcd *xhci;
878 struct xhci_virt_device *virt_dev;
880 if (!hcd || (check_ep && !ep) || !udev) {
881 printk(KERN_DEBUG "xHCI %s called with invalid args\n",
886 printk(KERN_DEBUG "xHCI %s called for root hub\n",
891 if (check_virt_dev) {
892 xhci = hcd_to_xhci(hcd);
893 if (!udev->slot_id || !xhci->devs
894 || !xhci->devs[udev->slot_id]) {
895 printk(KERN_DEBUG "xHCI %s called with unaddressed "
900 virt_dev = xhci->devs[udev->slot_id];
901 if (virt_dev->udev != udev) {
902 printk(KERN_DEBUG "xHCI %s called with udev and "
903 "virt_dev does not match\n", func);
911 static int xhci_configure_endpoint(struct xhci_hcd *xhci,
912 struct usb_device *udev, struct xhci_command *command,
913 bool ctx_change, bool must_succeed);
916 * Full speed devices may have a max packet size greater than 8 bytes, but the
917 * USB core doesn't know that until it reads the first 8 bytes of the
918 * descriptor. If the usb_device's max packet size changes after that point,
919 * we need to issue an evaluate context command and wait on it.
921 static int xhci_check_maxpacket(struct xhci_hcd *xhci, unsigned int slot_id,
922 unsigned int ep_index, struct urb *urb)
924 struct xhci_container_ctx *in_ctx;
925 struct xhci_container_ctx *out_ctx;
926 struct xhci_input_control_ctx *ctrl_ctx;
927 struct xhci_ep_ctx *ep_ctx;
929 int hw_max_packet_size;
932 out_ctx = xhci->devs[slot_id]->out_ctx;
933 ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
934 hw_max_packet_size = MAX_PACKET_DECODED(ep_ctx->ep_info2);
935 max_packet_size = urb->dev->ep0.desc.wMaxPacketSize;
936 if (hw_max_packet_size != max_packet_size) {
937 xhci_dbg(xhci, "Max Packet Size for ep 0 changed.\n");
938 xhci_dbg(xhci, "Max packet size in usb_device = %d\n",
940 xhci_dbg(xhci, "Max packet size in xHCI HW = %d\n",
942 xhci_dbg(xhci, "Issuing evaluate context command.\n");
944 /* Set up the modified control endpoint 0 */
945 xhci_endpoint_copy(xhci, xhci->devs[slot_id]->in_ctx,
946 xhci->devs[slot_id]->out_ctx, ep_index);
947 in_ctx = xhci->devs[slot_id]->in_ctx;
948 ep_ctx = xhci_get_ep_ctx(xhci, in_ctx, ep_index);
949 ep_ctx->ep_info2 &= ~MAX_PACKET_MASK;
950 ep_ctx->ep_info2 |= MAX_PACKET(max_packet_size);
952 /* Set up the input context flags for the command */
953 /* FIXME: This won't work if a non-default control endpoint
954 * changes max packet sizes.
956 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
957 ctrl_ctx->add_flags = EP0_FLAG;
958 ctrl_ctx->drop_flags = 0;
960 xhci_dbg(xhci, "Slot %d input context\n", slot_id);
961 xhci_dbg_ctx(xhci, in_ctx, ep_index);
962 xhci_dbg(xhci, "Slot %d output context\n", slot_id);
963 xhci_dbg_ctx(xhci, out_ctx, ep_index);
965 ret = xhci_configure_endpoint(xhci, urb->dev, NULL,
968 /* Clean up the input context for later use by bandwidth
971 ctrl_ctx->add_flags = SLOT_FLAG;
977 * non-error returns are a promise to giveback() the urb later
978 * we drop ownership so next owner (or urb unlink) can get it
980 int xhci_urb_enqueue(struct usb_hcd *hcd, struct urb *urb, gfp_t mem_flags)
982 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
985 unsigned int slot_id, ep_index;
986 struct urb_priv *urb_priv;
989 if (!urb || xhci_check_args(hcd, urb->dev, urb->ep,
990 true, true, __func__) <= 0)
993 slot_id = urb->dev->slot_id;
994 ep_index = xhci_get_endpoint_index(&urb->ep->desc);
996 if (!HCD_HW_ACCESSIBLE(hcd)) {
998 xhci_dbg(xhci, "urb submitted during PCI suspend\n");
1003 if (usb_endpoint_xfer_isoc(&urb->ep->desc))
1004 size = urb->number_of_packets;
1008 urb_priv = kzalloc(sizeof(struct urb_priv) +
1009 size * sizeof(struct xhci_td *), mem_flags);
1013 for (i = 0; i < size; i++) {
1014 urb_priv->td[i] = kzalloc(sizeof(struct xhci_td), mem_flags);
1015 if (!urb_priv->td[i]) {
1016 urb_priv->length = i;
1017 xhci_urb_free_priv(xhci, urb_priv);
1022 urb_priv->length = size;
1023 urb_priv->td_cnt = 0;
1024 urb->hcpriv = urb_priv;
1026 if (usb_endpoint_xfer_control(&urb->ep->desc)) {
1027 /* Check to see if the max packet size for the default control
1028 * endpoint changed during FS device enumeration
1030 if (urb->dev->speed == USB_SPEED_FULL) {
1031 ret = xhci_check_maxpacket(xhci, slot_id,
1037 /* We have a spinlock and interrupts disabled, so we must pass
1038 * atomic context to this function, which may allocate memory.
1040 spin_lock_irqsave(&xhci->lock, flags);
1041 if (xhci->xhc_state & XHCI_STATE_DYING)
1043 ret = xhci_queue_ctrl_tx(xhci, GFP_ATOMIC, urb,
1045 spin_unlock_irqrestore(&xhci->lock, flags);
1046 } else if (usb_endpoint_xfer_bulk(&urb->ep->desc)) {
1047 spin_lock_irqsave(&xhci->lock, flags);
1048 if (xhci->xhc_state & XHCI_STATE_DYING)
1050 if (xhci->devs[slot_id]->eps[ep_index].ep_state &
1051 EP_GETTING_STREAMS) {
1052 xhci_warn(xhci, "WARN: Can't enqueue URB while bulk ep "
1053 "is transitioning to using streams.\n");
1055 } else if (xhci->devs[slot_id]->eps[ep_index].ep_state &
1056 EP_GETTING_NO_STREAMS) {
1057 xhci_warn(xhci, "WARN: Can't enqueue URB while bulk ep "
1058 "is transitioning to "
1059 "not having streams.\n");
1062 ret = xhci_queue_bulk_tx(xhci, GFP_ATOMIC, urb,
1065 spin_unlock_irqrestore(&xhci->lock, flags);
1066 } else if (usb_endpoint_xfer_int(&urb->ep->desc)) {
1067 spin_lock_irqsave(&xhci->lock, flags);
1068 if (xhci->xhc_state & XHCI_STATE_DYING)
1070 ret = xhci_queue_intr_tx(xhci, GFP_ATOMIC, urb,
1072 spin_unlock_irqrestore(&xhci->lock, flags);
1074 spin_lock_irqsave(&xhci->lock, flags);
1075 if (xhci->xhc_state & XHCI_STATE_DYING)
1077 ret = xhci_queue_isoc_tx_prepare(xhci, GFP_ATOMIC, urb,
1079 spin_unlock_irqrestore(&xhci->lock, flags);
1084 xhci_urb_free_priv(xhci, urb_priv);
1086 xhci_dbg(xhci, "Ep 0x%x: URB %p submitted for "
1087 "non-responsive xHCI host.\n",
1088 urb->ep->desc.bEndpointAddress, urb);
1089 spin_unlock_irqrestore(&xhci->lock, flags);
1093 /* Get the right ring for the given URB.
1094 * If the endpoint supports streams, boundary check the URB's stream ID.
1095 * If the endpoint doesn't support streams, return the singular endpoint ring.
1097 static struct xhci_ring *xhci_urb_to_transfer_ring(struct xhci_hcd *xhci,
1100 unsigned int slot_id;
1101 unsigned int ep_index;
1102 unsigned int stream_id;
1103 struct xhci_virt_ep *ep;
1105 slot_id = urb->dev->slot_id;
1106 ep_index = xhci_get_endpoint_index(&urb->ep->desc);
1107 stream_id = urb->stream_id;
1108 ep = &xhci->devs[slot_id]->eps[ep_index];
1109 /* Common case: no streams */
1110 if (!(ep->ep_state & EP_HAS_STREAMS))
1113 if (stream_id == 0) {
1115 "WARN: Slot ID %u, ep index %u has streams, "
1116 "but URB has no stream ID.\n",
1121 if (stream_id < ep->stream_info->num_streams)
1122 return ep->stream_info->stream_rings[stream_id];
1125 "WARN: Slot ID %u, ep index %u has "
1126 "stream IDs 1 to %u allocated, "
1127 "but stream ID %u is requested.\n",
1129 ep->stream_info->num_streams - 1,
1135 * Remove the URB's TD from the endpoint ring. This may cause the HC to stop
1136 * USB transfers, potentially stopping in the middle of a TRB buffer. The HC
1137 * should pick up where it left off in the TD, unless a Set Transfer Ring
1138 * Dequeue Pointer is issued.
1140 * The TRBs that make up the buffers for the canceled URB will be "removed" from
1141 * the ring. Since the ring is a contiguous structure, they can't be physically
1142 * removed. Instead, there are two options:
1144 * 1) If the HC is in the middle of processing the URB to be canceled, we
1145 * simply move the ring's dequeue pointer past those TRBs using the Set
1146 * Transfer Ring Dequeue Pointer command. This will be the common case,
1147 * when drivers timeout on the last submitted URB and attempt to cancel.
1149 * 2) If the HC is in the middle of a different TD, we turn the TRBs into a
1150 * series of 1-TRB transfer no-op TDs. (No-ops shouldn't be chained.) The
1151 * HC will need to invalidate the any TRBs it has cached after the stop
1152 * endpoint command, as noted in the xHCI 0.95 errata.
1154 * 3) The TD may have completed by the time the Stop Endpoint Command
1155 * completes, so software needs to handle that case too.
1157 * This function should protect against the TD enqueueing code ringing the
1158 * doorbell while this code is waiting for a Stop Endpoint command to complete.
1159 * It also needs to account for multiple cancellations on happening at the same
1160 * time for the same endpoint.
1162 * Note that this function can be called in any context, or so says
1163 * usb_hcd_unlink_urb()
1165 int xhci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
1167 unsigned long flags;
1170 struct xhci_hcd *xhci;
1171 struct urb_priv *urb_priv;
1173 unsigned int ep_index;
1174 struct xhci_ring *ep_ring;
1175 struct xhci_virt_ep *ep;
1177 xhci = hcd_to_xhci(hcd);
1178 spin_lock_irqsave(&xhci->lock, flags);
1179 /* Make sure the URB hasn't completed or been unlinked already */
1180 ret = usb_hcd_check_unlink_urb(hcd, urb, status);
1181 if (ret || !urb->hcpriv)
1183 temp = xhci_readl(xhci, &xhci->op_regs->status);
1184 if (temp == 0xffffffff) {
1185 xhci_dbg(xhci, "HW died, freeing TD.\n");
1186 urb_priv = urb->hcpriv;
1188 usb_hcd_unlink_urb_from_ep(hcd, urb);
1189 spin_unlock_irqrestore(&xhci->lock, flags);
1190 usb_hcd_giveback_urb(xhci_to_hcd(xhci), urb, -ESHUTDOWN);
1191 xhci_urb_free_priv(xhci, urb_priv);
1194 if (xhci->xhc_state & XHCI_STATE_DYING) {
1195 xhci_dbg(xhci, "Ep 0x%x: URB %p to be canceled on "
1196 "non-responsive xHCI host.\n",
1197 urb->ep->desc.bEndpointAddress, urb);
1198 /* Let the stop endpoint command watchdog timer (which set this
1199 * state) finish cleaning up the endpoint TD lists. We must
1200 * have caught it in the middle of dropping a lock and giving
1206 xhci_dbg(xhci, "Cancel URB %p\n", urb);
1207 xhci_dbg(xhci, "Event ring:\n");
1208 xhci_debug_ring(xhci, xhci->event_ring);
1209 ep_index = xhci_get_endpoint_index(&urb->ep->desc);
1210 ep = &xhci->devs[urb->dev->slot_id]->eps[ep_index];
1211 ep_ring = xhci_urb_to_transfer_ring(xhci, urb);
1217 xhci_dbg(xhci, "Endpoint ring:\n");
1218 xhci_debug_ring(xhci, ep_ring);
1220 urb_priv = urb->hcpriv;
1222 for (i = urb_priv->td_cnt; i < urb_priv->length; i++) {
1223 td = urb_priv->td[i];
1224 list_add_tail(&td->cancelled_td_list, &ep->cancelled_td_list);
1227 /* Queue a stop endpoint command, but only if this is
1228 * the first cancellation to be handled.
1230 if (!(ep->ep_state & EP_HALT_PENDING)) {
1231 ep->ep_state |= EP_HALT_PENDING;
1232 ep->stop_cmds_pending++;
1233 ep->stop_cmd_timer.expires = jiffies +
1234 XHCI_STOP_EP_CMD_TIMEOUT * HZ;
1235 add_timer(&ep->stop_cmd_timer);
1236 xhci_queue_stop_endpoint(xhci, urb->dev->slot_id, ep_index, 0);
1237 xhci_ring_cmd_db(xhci);
1240 spin_unlock_irqrestore(&xhci->lock, flags);
1244 /* Drop an endpoint from a new bandwidth configuration for this device.
1245 * Only one call to this function is allowed per endpoint before
1246 * check_bandwidth() or reset_bandwidth() must be called.
1247 * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
1248 * add the endpoint to the schedule with possibly new parameters denoted by a
1249 * different endpoint descriptor in usb_host_endpoint.
1250 * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
1253 * The USB core will not allow URBs to be queued to an endpoint that is being
1254 * disabled, so there's no need for mutual exclusion to protect
1255 * the xhci->devs[slot_id] structure.
1257 int xhci_drop_endpoint(struct usb_hcd *hcd, struct usb_device *udev,
1258 struct usb_host_endpoint *ep)
1260 struct xhci_hcd *xhci;
1261 struct xhci_container_ctx *in_ctx, *out_ctx;
1262 struct xhci_input_control_ctx *ctrl_ctx;
1263 struct xhci_slot_ctx *slot_ctx;
1264 unsigned int last_ctx;
1265 unsigned int ep_index;
1266 struct xhci_ep_ctx *ep_ctx;
1268 u32 new_add_flags, new_drop_flags, new_slot_info;
1271 ret = xhci_check_args(hcd, udev, ep, 1, true, __func__);
1274 xhci = hcd_to_xhci(hcd);
1275 xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
1277 drop_flag = xhci_get_endpoint_flag(&ep->desc);
1278 if (drop_flag == SLOT_FLAG || drop_flag == EP0_FLAG) {
1279 xhci_dbg(xhci, "xHCI %s - can't drop slot or ep 0 %#x\n",
1280 __func__, drop_flag);
1284 in_ctx = xhci->devs[udev->slot_id]->in_ctx;
1285 out_ctx = xhci->devs[udev->slot_id]->out_ctx;
1286 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1287 ep_index = xhci_get_endpoint_index(&ep->desc);
1288 ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
1289 /* If the HC already knows the endpoint is disabled,
1290 * or the HCD has noted it is disabled, ignore this request
1292 if ((ep_ctx->ep_info & EP_STATE_MASK) == EP_STATE_DISABLED ||
1293 ctrl_ctx->drop_flags & xhci_get_endpoint_flag(&ep->desc)) {
1294 xhci_warn(xhci, "xHCI %s called with disabled ep %p\n",
1299 ctrl_ctx->drop_flags |= drop_flag;
1300 new_drop_flags = ctrl_ctx->drop_flags;
1302 ctrl_ctx->add_flags &= ~drop_flag;
1303 new_add_flags = ctrl_ctx->add_flags;
1305 last_ctx = xhci_last_valid_endpoint(ctrl_ctx->add_flags);
1306 slot_ctx = xhci_get_slot_ctx(xhci, in_ctx);
1307 /* Update the last valid endpoint context, if we deleted the last one */
1308 if ((slot_ctx->dev_info & LAST_CTX_MASK) > LAST_CTX(last_ctx)) {
1309 slot_ctx->dev_info &= ~LAST_CTX_MASK;
1310 slot_ctx->dev_info |= LAST_CTX(last_ctx);
1312 new_slot_info = slot_ctx->dev_info;
1314 xhci_endpoint_zero(xhci, xhci->devs[udev->slot_id], ep);
1316 xhci_dbg(xhci, "drop ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x, new slot info = %#x\n",
1317 (unsigned int) ep->desc.bEndpointAddress,
1319 (unsigned int) new_drop_flags,
1320 (unsigned int) new_add_flags,
1321 (unsigned int) new_slot_info);
1325 /* Add an endpoint to a new possible bandwidth configuration for this device.
1326 * Only one call to this function is allowed per endpoint before
1327 * check_bandwidth() or reset_bandwidth() must be called.
1328 * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
1329 * add the endpoint to the schedule with possibly new parameters denoted by a
1330 * different endpoint descriptor in usb_host_endpoint.
1331 * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
1334 * The USB core will not allow URBs to be queued to an endpoint until the
1335 * configuration or alt setting is installed in the device, so there's no need
1336 * for mutual exclusion to protect the xhci->devs[slot_id] structure.
1338 int xhci_add_endpoint(struct usb_hcd *hcd, struct usb_device *udev,
1339 struct usb_host_endpoint *ep)
1341 struct xhci_hcd *xhci;
1342 struct xhci_container_ctx *in_ctx, *out_ctx;
1343 unsigned int ep_index;
1344 struct xhci_ep_ctx *ep_ctx;
1345 struct xhci_slot_ctx *slot_ctx;
1346 struct xhci_input_control_ctx *ctrl_ctx;
1348 unsigned int last_ctx;
1349 u32 new_add_flags, new_drop_flags, new_slot_info;
1352 ret = xhci_check_args(hcd, udev, ep, 1, true, __func__);
1354 /* So we won't queue a reset ep command for a root hub */
1358 xhci = hcd_to_xhci(hcd);
1360 added_ctxs = xhci_get_endpoint_flag(&ep->desc);
1361 last_ctx = xhci_last_valid_endpoint(added_ctxs);
1362 if (added_ctxs == SLOT_FLAG || added_ctxs == EP0_FLAG) {
1363 /* FIXME when we have to issue an evaluate endpoint command to
1364 * deal with ep0 max packet size changing once we get the
1367 xhci_dbg(xhci, "xHCI %s - can't add slot or ep 0 %#x\n",
1368 __func__, added_ctxs);
1372 in_ctx = xhci->devs[udev->slot_id]->in_ctx;
1373 out_ctx = xhci->devs[udev->slot_id]->out_ctx;
1374 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1375 ep_index = xhci_get_endpoint_index(&ep->desc);
1376 ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
1377 /* If the HCD has already noted the endpoint is enabled,
1378 * ignore this request.
1380 if (ctrl_ctx->add_flags & xhci_get_endpoint_flag(&ep->desc)) {
1381 xhci_warn(xhci, "xHCI %s called with enabled ep %p\n",
1387 * Configuration and alternate setting changes must be done in
1388 * process context, not interrupt context (or so documenation
1389 * for usb_set_interface() and usb_set_configuration() claim).
1391 if (xhci_endpoint_init(xhci, xhci->devs[udev->slot_id],
1392 udev, ep, GFP_NOIO) < 0) {
1393 dev_dbg(&udev->dev, "%s - could not initialize ep %#x\n",
1394 __func__, ep->desc.bEndpointAddress);
1398 ctrl_ctx->add_flags |= added_ctxs;
1399 new_add_flags = ctrl_ctx->add_flags;
1401 /* If xhci_endpoint_disable() was called for this endpoint, but the
1402 * xHC hasn't been notified yet through the check_bandwidth() call,
1403 * this re-adds a new state for the endpoint from the new endpoint
1404 * descriptors. We must drop and re-add this endpoint, so we leave the
1407 new_drop_flags = ctrl_ctx->drop_flags;
1409 slot_ctx = xhci_get_slot_ctx(xhci, in_ctx);
1410 /* Update the last valid endpoint context, if we just added one past */
1411 if ((slot_ctx->dev_info & LAST_CTX_MASK) < LAST_CTX(last_ctx)) {
1412 slot_ctx->dev_info &= ~LAST_CTX_MASK;
1413 slot_ctx->dev_info |= LAST_CTX(last_ctx);
1415 new_slot_info = slot_ctx->dev_info;
1417 /* Store the usb_device pointer for later use */
1420 xhci_dbg(xhci, "add ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x, new slot info = %#x\n",
1421 (unsigned int) ep->desc.bEndpointAddress,
1423 (unsigned int) new_drop_flags,
1424 (unsigned int) new_add_flags,
1425 (unsigned int) new_slot_info);
1429 static void xhci_zero_in_ctx(struct xhci_hcd *xhci, struct xhci_virt_device *virt_dev)
1431 struct xhci_input_control_ctx *ctrl_ctx;
1432 struct xhci_ep_ctx *ep_ctx;
1433 struct xhci_slot_ctx *slot_ctx;
1436 /* When a device's add flag and drop flag are zero, any subsequent
1437 * configure endpoint command will leave that endpoint's state
1438 * untouched. Make sure we don't leave any old state in the input
1439 * endpoint contexts.
1441 ctrl_ctx = xhci_get_input_control_ctx(xhci, virt_dev->in_ctx);
1442 ctrl_ctx->drop_flags = 0;
1443 ctrl_ctx->add_flags = 0;
1444 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
1445 slot_ctx->dev_info &= ~LAST_CTX_MASK;
1446 /* Endpoint 0 is always valid */
1447 slot_ctx->dev_info |= LAST_CTX(1);
1448 for (i = 1; i < 31; ++i) {
1449 ep_ctx = xhci_get_ep_ctx(xhci, virt_dev->in_ctx, i);
1450 ep_ctx->ep_info = 0;
1451 ep_ctx->ep_info2 = 0;
1453 ep_ctx->tx_info = 0;
1457 static int xhci_configure_endpoint_result(struct xhci_hcd *xhci,
1458 struct usb_device *udev, int *cmd_status)
1462 switch (*cmd_status) {
1464 dev_warn(&udev->dev, "Not enough host controller resources "
1465 "for new device state.\n");
1467 /* FIXME: can we allocate more resources for the HC? */
1470 dev_warn(&udev->dev, "Not enough bandwidth "
1471 "for new device state.\n");
1473 /* FIXME: can we go back to the old state? */
1476 /* the HCD set up something wrong */
1477 dev_warn(&udev->dev, "ERROR: Endpoint drop flag = 0, "
1479 "and endpoint is not disabled.\n");
1483 dev_dbg(&udev->dev, "Successful Endpoint Configure command\n");
1487 xhci_err(xhci, "ERROR: unexpected command completion "
1488 "code 0x%x.\n", *cmd_status);
1495 static int xhci_evaluate_context_result(struct xhci_hcd *xhci,
1496 struct usb_device *udev, int *cmd_status)
1499 struct xhci_virt_device *virt_dev = xhci->devs[udev->slot_id];
1501 switch (*cmd_status) {
1503 dev_warn(&udev->dev, "WARN: xHCI driver setup invalid evaluate "
1504 "context command.\n");
1508 dev_warn(&udev->dev, "WARN: slot not enabled for"
1509 "evaluate context command.\n");
1510 case COMP_CTX_STATE:
1511 dev_warn(&udev->dev, "WARN: invalid context state for "
1512 "evaluate context command.\n");
1513 xhci_dbg_ctx(xhci, virt_dev->out_ctx, 1);
1517 dev_dbg(&udev->dev, "Successful evaluate context command\n");
1521 xhci_err(xhci, "ERROR: unexpected command completion "
1522 "code 0x%x.\n", *cmd_status);
1529 /* Issue a configure endpoint command or evaluate context command
1530 * and wait for it to finish.
1532 static int xhci_configure_endpoint(struct xhci_hcd *xhci,
1533 struct usb_device *udev,
1534 struct xhci_command *command,
1535 bool ctx_change, bool must_succeed)
1539 unsigned long flags;
1540 struct xhci_container_ctx *in_ctx;
1541 struct completion *cmd_completion;
1543 struct xhci_virt_device *virt_dev;
1545 spin_lock_irqsave(&xhci->lock, flags);
1546 virt_dev = xhci->devs[udev->slot_id];
1548 in_ctx = command->in_ctx;
1549 cmd_completion = command->completion;
1550 cmd_status = &command->status;
1551 command->command_trb = xhci->cmd_ring->enqueue;
1552 list_add_tail(&command->cmd_list, &virt_dev->cmd_list);
1554 in_ctx = virt_dev->in_ctx;
1555 cmd_completion = &virt_dev->cmd_completion;
1556 cmd_status = &virt_dev->cmd_status;
1558 init_completion(cmd_completion);
1561 ret = xhci_queue_configure_endpoint(xhci, in_ctx->dma,
1562 udev->slot_id, must_succeed);
1564 ret = xhci_queue_evaluate_context(xhci, in_ctx->dma,
1568 list_del(&command->cmd_list);
1569 spin_unlock_irqrestore(&xhci->lock, flags);
1570 xhci_dbg(xhci, "FIXME allocate a new ring segment\n");
1573 xhci_ring_cmd_db(xhci);
1574 spin_unlock_irqrestore(&xhci->lock, flags);
1576 /* Wait for the configure endpoint command to complete */
1577 timeleft = wait_for_completion_interruptible_timeout(
1579 USB_CTRL_SET_TIMEOUT);
1580 if (timeleft <= 0) {
1581 xhci_warn(xhci, "%s while waiting for %s command\n",
1582 timeleft == 0 ? "Timeout" : "Signal",
1584 "configure endpoint" :
1585 "evaluate context");
1586 /* FIXME cancel the configure endpoint command */
1591 return xhci_configure_endpoint_result(xhci, udev, cmd_status);
1592 return xhci_evaluate_context_result(xhci, udev, cmd_status);
1595 /* Called after one or more calls to xhci_add_endpoint() or
1596 * xhci_drop_endpoint(). If this call fails, the USB core is expected
1597 * to call xhci_reset_bandwidth().
1599 * Since we are in the middle of changing either configuration or
1600 * installing a new alt setting, the USB core won't allow URBs to be
1601 * enqueued for any endpoint on the old config or interface. Nothing
1602 * else should be touching the xhci->devs[slot_id] structure, so we
1603 * don't need to take the xhci->lock for manipulating that.
1605 int xhci_check_bandwidth(struct usb_hcd *hcd, struct usb_device *udev)
1609 struct xhci_hcd *xhci;
1610 struct xhci_virt_device *virt_dev;
1611 struct xhci_input_control_ctx *ctrl_ctx;
1612 struct xhci_slot_ctx *slot_ctx;
1614 ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
1617 xhci = hcd_to_xhci(hcd);
1619 xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
1620 virt_dev = xhci->devs[udev->slot_id];
1622 /* See section 4.6.6 - A0 = 1; A1 = D0 = D1 = 0 */
1623 ctrl_ctx = xhci_get_input_control_ctx(xhci, virt_dev->in_ctx);
1624 ctrl_ctx->add_flags |= SLOT_FLAG;
1625 ctrl_ctx->add_flags &= ~EP0_FLAG;
1626 ctrl_ctx->drop_flags &= ~SLOT_FLAG;
1627 ctrl_ctx->drop_flags &= ~EP0_FLAG;
1628 xhci_dbg(xhci, "New Input Control Context:\n");
1629 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
1630 xhci_dbg_ctx(xhci, virt_dev->in_ctx,
1631 LAST_CTX_TO_EP_NUM(slot_ctx->dev_info));
1633 ret = xhci_configure_endpoint(xhci, udev, NULL,
1636 /* Callee should call reset_bandwidth() */
1640 xhci_dbg(xhci, "Output context after successful config ep cmd:\n");
1641 xhci_dbg_ctx(xhci, virt_dev->out_ctx,
1642 LAST_CTX_TO_EP_NUM(slot_ctx->dev_info));
1644 xhci_zero_in_ctx(xhci, virt_dev);
1645 /* Install new rings and free or cache any old rings */
1646 for (i = 1; i < 31; ++i) {
1647 if (!virt_dev->eps[i].new_ring)
1649 /* Only cache or free the old ring if it exists.
1650 * It may not if this is the first add of an endpoint.
1652 if (virt_dev->eps[i].ring) {
1653 xhci_free_or_cache_endpoint_ring(xhci, virt_dev, i);
1655 virt_dev->eps[i].ring = virt_dev->eps[i].new_ring;
1656 virt_dev->eps[i].new_ring = NULL;
1662 void xhci_reset_bandwidth(struct usb_hcd *hcd, struct usb_device *udev)
1664 struct xhci_hcd *xhci;
1665 struct xhci_virt_device *virt_dev;
1668 ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
1671 xhci = hcd_to_xhci(hcd);
1673 xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
1674 virt_dev = xhci->devs[udev->slot_id];
1675 /* Free any rings allocated for added endpoints */
1676 for (i = 0; i < 31; ++i) {
1677 if (virt_dev->eps[i].new_ring) {
1678 xhci_ring_free(xhci, virt_dev->eps[i].new_ring);
1679 virt_dev->eps[i].new_ring = NULL;
1682 xhci_zero_in_ctx(xhci, virt_dev);
1685 static void xhci_setup_input_ctx_for_config_ep(struct xhci_hcd *xhci,
1686 struct xhci_container_ctx *in_ctx,
1687 struct xhci_container_ctx *out_ctx,
1688 u32 add_flags, u32 drop_flags)
1690 struct xhci_input_control_ctx *ctrl_ctx;
1691 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1692 ctrl_ctx->add_flags = add_flags;
1693 ctrl_ctx->drop_flags = drop_flags;
1694 xhci_slot_copy(xhci, in_ctx, out_ctx);
1695 ctrl_ctx->add_flags |= SLOT_FLAG;
1697 xhci_dbg(xhci, "Input Context:\n");
1698 xhci_dbg_ctx(xhci, in_ctx, xhci_last_valid_endpoint(add_flags));
1701 void xhci_setup_input_ctx_for_quirk(struct xhci_hcd *xhci,
1702 unsigned int slot_id, unsigned int ep_index,
1703 struct xhci_dequeue_state *deq_state)
1705 struct xhci_container_ctx *in_ctx;
1706 struct xhci_ep_ctx *ep_ctx;
1710 xhci_endpoint_copy(xhci, xhci->devs[slot_id]->in_ctx,
1711 xhci->devs[slot_id]->out_ctx, ep_index);
1712 in_ctx = xhci->devs[slot_id]->in_ctx;
1713 ep_ctx = xhci_get_ep_ctx(xhci, in_ctx, ep_index);
1714 addr = xhci_trb_virt_to_dma(deq_state->new_deq_seg,
1715 deq_state->new_deq_ptr);
1717 xhci_warn(xhci, "WARN Cannot submit config ep after "
1718 "reset ep command\n");
1719 xhci_warn(xhci, "WARN deq seg = %p, deq ptr = %p\n",
1720 deq_state->new_deq_seg,
1721 deq_state->new_deq_ptr);
1724 ep_ctx->deq = addr | deq_state->new_cycle_state;
1726 added_ctxs = xhci_get_endpoint_flag_from_index(ep_index);
1727 xhci_setup_input_ctx_for_config_ep(xhci, xhci->devs[slot_id]->in_ctx,
1728 xhci->devs[slot_id]->out_ctx, added_ctxs, added_ctxs);
1731 void xhci_cleanup_stalled_ring(struct xhci_hcd *xhci,
1732 struct usb_device *udev, unsigned int ep_index)
1734 struct xhci_dequeue_state deq_state;
1735 struct xhci_virt_ep *ep;
1737 xhci_dbg(xhci, "Cleaning up stalled endpoint ring\n");
1738 ep = &xhci->devs[udev->slot_id]->eps[ep_index];
1739 /* We need to move the HW's dequeue pointer past this TD,
1740 * or it will attempt to resend it on the next doorbell ring.
1742 xhci_find_new_dequeue_state(xhci, udev->slot_id,
1743 ep_index, ep->stopped_stream, ep->stopped_td,
1746 /* HW with the reset endpoint quirk will use the saved dequeue state to
1747 * issue a configure endpoint command later.
1749 if (!(xhci->quirks & XHCI_RESET_EP_QUIRK)) {
1750 xhci_dbg(xhci, "Queueing new dequeue state\n");
1751 xhci_queue_new_dequeue_state(xhci, udev->slot_id,
1752 ep_index, ep->stopped_stream, &deq_state);
1754 /* Better hope no one uses the input context between now and the
1755 * reset endpoint completion!
1756 * XXX: No idea how this hardware will react when stream rings
1759 xhci_dbg(xhci, "Setting up input context for "
1760 "configure endpoint command\n");
1761 xhci_setup_input_ctx_for_quirk(xhci, udev->slot_id,
1762 ep_index, &deq_state);
1766 /* Deal with stalled endpoints. The core should have sent the control message
1767 * to clear the halt condition. However, we need to make the xHCI hardware
1768 * reset its sequence number, since a device will expect a sequence number of
1769 * zero after the halt condition is cleared.
1770 * Context: in_interrupt
1772 void xhci_endpoint_reset(struct usb_hcd *hcd,
1773 struct usb_host_endpoint *ep)
1775 struct xhci_hcd *xhci;
1776 struct usb_device *udev;
1777 unsigned int ep_index;
1778 unsigned long flags;
1780 struct xhci_virt_ep *virt_ep;
1782 xhci = hcd_to_xhci(hcd);
1783 udev = (struct usb_device *) ep->hcpriv;
1784 /* Called with a root hub endpoint (or an endpoint that wasn't added
1785 * with xhci_add_endpoint()
1789 ep_index = xhci_get_endpoint_index(&ep->desc);
1790 virt_ep = &xhci->devs[udev->slot_id]->eps[ep_index];
1791 if (!virt_ep->stopped_td) {
1792 xhci_dbg(xhci, "Endpoint 0x%x not halted, refusing to reset.\n",
1793 ep->desc.bEndpointAddress);
1796 if (usb_endpoint_xfer_control(&ep->desc)) {
1797 xhci_dbg(xhci, "Control endpoint stall already handled.\n");
1801 xhci_dbg(xhci, "Queueing reset endpoint command\n");
1802 spin_lock_irqsave(&xhci->lock, flags);
1803 ret = xhci_queue_reset_ep(xhci, udev->slot_id, ep_index);
1805 * Can't change the ring dequeue pointer until it's transitioned to the
1806 * stopped state, which is only upon a successful reset endpoint
1807 * command. Better hope that last command worked!
1810 xhci_cleanup_stalled_ring(xhci, udev, ep_index);
1811 kfree(virt_ep->stopped_td);
1812 xhci_ring_cmd_db(xhci);
1814 virt_ep->stopped_td = NULL;
1815 virt_ep->stopped_trb = NULL;
1816 virt_ep->stopped_stream = 0;
1817 spin_unlock_irqrestore(&xhci->lock, flags);
1820 xhci_warn(xhci, "FIXME allocate a new ring segment\n");
1823 static int xhci_check_streams_endpoint(struct xhci_hcd *xhci,
1824 struct usb_device *udev, struct usb_host_endpoint *ep,
1825 unsigned int slot_id)
1828 unsigned int ep_index;
1829 unsigned int ep_state;
1833 ret = xhci_check_args(xhci_to_hcd(xhci), udev, ep, 1, true, __func__);
1836 if (ep->ss_ep_comp.bmAttributes == 0) {
1837 xhci_warn(xhci, "WARN: SuperSpeed Endpoint Companion"
1838 " descriptor for ep 0x%x does not support streams\n",
1839 ep->desc.bEndpointAddress);
1843 ep_index = xhci_get_endpoint_index(&ep->desc);
1844 ep_state = xhci->devs[slot_id]->eps[ep_index].ep_state;
1845 if (ep_state & EP_HAS_STREAMS ||
1846 ep_state & EP_GETTING_STREAMS) {
1847 xhci_warn(xhci, "WARN: SuperSpeed bulk endpoint 0x%x "
1848 "already has streams set up.\n",
1849 ep->desc.bEndpointAddress);
1850 xhci_warn(xhci, "Send email to xHCI maintainer and ask for "
1851 "dynamic stream context array reallocation.\n");
1854 if (!list_empty(&xhci->devs[slot_id]->eps[ep_index].ring->td_list)) {
1855 xhci_warn(xhci, "Cannot setup streams for SuperSpeed bulk "
1856 "endpoint 0x%x; URBs are pending.\n",
1857 ep->desc.bEndpointAddress);
1863 static void xhci_calculate_streams_entries(struct xhci_hcd *xhci,
1864 unsigned int *num_streams, unsigned int *num_stream_ctxs)
1866 unsigned int max_streams;
1868 /* The stream context array size must be a power of two */
1869 *num_stream_ctxs = roundup_pow_of_two(*num_streams);
1871 * Find out how many primary stream array entries the host controller
1872 * supports. Later we may use secondary stream arrays (similar to 2nd
1873 * level page entries), but that's an optional feature for xHCI host
1874 * controllers. xHCs must support at least 4 stream IDs.
1876 max_streams = HCC_MAX_PSA(xhci->hcc_params);
1877 if (*num_stream_ctxs > max_streams) {
1878 xhci_dbg(xhci, "xHCI HW only supports %u stream ctx entries.\n",
1880 *num_stream_ctxs = max_streams;
1881 *num_streams = max_streams;
1885 /* Returns an error code if one of the endpoint already has streams.
1886 * This does not change any data structures, it only checks and gathers
1889 static int xhci_calculate_streams_and_bitmask(struct xhci_hcd *xhci,
1890 struct usb_device *udev,
1891 struct usb_host_endpoint **eps, unsigned int num_eps,
1892 unsigned int *num_streams, u32 *changed_ep_bitmask)
1894 unsigned int max_streams;
1895 unsigned int endpoint_flag;
1899 for (i = 0; i < num_eps; i++) {
1900 ret = xhci_check_streams_endpoint(xhci, udev,
1901 eps[i], udev->slot_id);
1905 max_streams = USB_SS_MAX_STREAMS(
1906 eps[i]->ss_ep_comp.bmAttributes);
1907 if (max_streams < (*num_streams - 1)) {
1908 xhci_dbg(xhci, "Ep 0x%x only supports %u stream IDs.\n",
1909 eps[i]->desc.bEndpointAddress,
1911 *num_streams = max_streams+1;
1914 endpoint_flag = xhci_get_endpoint_flag(&eps[i]->desc);
1915 if (*changed_ep_bitmask & endpoint_flag)
1917 *changed_ep_bitmask |= endpoint_flag;
1922 static u32 xhci_calculate_no_streams_bitmask(struct xhci_hcd *xhci,
1923 struct usb_device *udev,
1924 struct usb_host_endpoint **eps, unsigned int num_eps)
1926 u32 changed_ep_bitmask = 0;
1927 unsigned int slot_id;
1928 unsigned int ep_index;
1929 unsigned int ep_state;
1932 slot_id = udev->slot_id;
1933 if (!xhci->devs[slot_id])
1936 for (i = 0; i < num_eps; i++) {
1937 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
1938 ep_state = xhci->devs[slot_id]->eps[ep_index].ep_state;
1939 /* Are streams already being freed for the endpoint? */
1940 if (ep_state & EP_GETTING_NO_STREAMS) {
1941 xhci_warn(xhci, "WARN Can't disable streams for "
1943 "streams are being disabled already.",
1944 eps[i]->desc.bEndpointAddress);
1947 /* Are there actually any streams to free? */
1948 if (!(ep_state & EP_HAS_STREAMS) &&
1949 !(ep_state & EP_GETTING_STREAMS)) {
1950 xhci_warn(xhci, "WARN Can't disable streams for "
1952 "streams are already disabled!",
1953 eps[i]->desc.bEndpointAddress);
1954 xhci_warn(xhci, "WARN xhci_free_streams() called "
1955 "with non-streams endpoint\n");
1958 changed_ep_bitmask |= xhci_get_endpoint_flag(&eps[i]->desc);
1960 return changed_ep_bitmask;
1964 * The USB device drivers use this function (though the HCD interface in USB
1965 * core) to prepare a set of bulk endpoints to use streams. Streams are used to
1966 * coordinate mass storage command queueing across multiple endpoints (basically
1967 * a stream ID == a task ID).
1969 * Setting up streams involves allocating the same size stream context array
1970 * for each endpoint and issuing a configure endpoint command for all endpoints.
1972 * Don't allow the call to succeed if one endpoint only supports one stream
1973 * (which means it doesn't support streams at all).
1975 * Drivers may get less stream IDs than they asked for, if the host controller
1976 * hardware or endpoints claim they can't support the number of requested
1979 int xhci_alloc_streams(struct usb_hcd *hcd, struct usb_device *udev,
1980 struct usb_host_endpoint **eps, unsigned int num_eps,
1981 unsigned int num_streams, gfp_t mem_flags)
1984 struct xhci_hcd *xhci;
1985 struct xhci_virt_device *vdev;
1986 struct xhci_command *config_cmd;
1987 unsigned int ep_index;
1988 unsigned int num_stream_ctxs;
1989 unsigned long flags;
1990 u32 changed_ep_bitmask = 0;
1995 /* Add one to the number of streams requested to account for
1996 * stream 0 that is reserved for xHCI usage.
1999 xhci = hcd_to_xhci(hcd);
2000 xhci_dbg(xhci, "Driver wants %u stream IDs (including stream 0).\n",
2003 config_cmd = xhci_alloc_command(xhci, true, true, mem_flags);
2005 xhci_dbg(xhci, "Could not allocate xHCI command structure.\n");
2009 /* Check to make sure all endpoints are not already configured for
2010 * streams. While we're at it, find the maximum number of streams that
2011 * all the endpoints will support and check for duplicate endpoints.
2013 spin_lock_irqsave(&xhci->lock, flags);
2014 ret = xhci_calculate_streams_and_bitmask(xhci, udev, eps,
2015 num_eps, &num_streams, &changed_ep_bitmask);
2017 xhci_free_command(xhci, config_cmd);
2018 spin_unlock_irqrestore(&xhci->lock, flags);
2021 if (num_streams <= 1) {
2022 xhci_warn(xhci, "WARN: endpoints can't handle "
2023 "more than one stream.\n");
2024 xhci_free_command(xhci, config_cmd);
2025 spin_unlock_irqrestore(&xhci->lock, flags);
2028 vdev = xhci->devs[udev->slot_id];
2029 /* Mark each endpoint as being in transistion, so
2030 * xhci_urb_enqueue() will reject all URBs.
2032 for (i = 0; i < num_eps; i++) {
2033 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
2034 vdev->eps[ep_index].ep_state |= EP_GETTING_STREAMS;
2036 spin_unlock_irqrestore(&xhci->lock, flags);
2038 /* Setup internal data structures and allocate HW data structures for
2039 * streams (but don't install the HW structures in the input context
2040 * until we're sure all memory allocation succeeded).
2042 xhci_calculate_streams_entries(xhci, &num_streams, &num_stream_ctxs);
2043 xhci_dbg(xhci, "Need %u stream ctx entries for %u stream IDs.\n",
2044 num_stream_ctxs, num_streams);
2046 for (i = 0; i < num_eps; i++) {
2047 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
2048 vdev->eps[ep_index].stream_info = xhci_alloc_stream_info(xhci,
2050 num_streams, mem_flags);
2051 if (!vdev->eps[ep_index].stream_info)
2053 /* Set maxPstreams in endpoint context and update deq ptr to
2054 * point to stream context array. FIXME
2058 /* Set up the input context for a configure endpoint command. */
2059 for (i = 0; i < num_eps; i++) {
2060 struct xhci_ep_ctx *ep_ctx;
2062 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
2063 ep_ctx = xhci_get_ep_ctx(xhci, config_cmd->in_ctx, ep_index);
2065 xhci_endpoint_copy(xhci, config_cmd->in_ctx,
2066 vdev->out_ctx, ep_index);
2067 xhci_setup_streams_ep_input_ctx(xhci, ep_ctx,
2068 vdev->eps[ep_index].stream_info);
2070 /* Tell the HW to drop its old copy of the endpoint context info
2071 * and add the updated copy from the input context.
2073 xhci_setup_input_ctx_for_config_ep(xhci, config_cmd->in_ctx,
2074 vdev->out_ctx, changed_ep_bitmask, changed_ep_bitmask);
2076 /* Issue and wait for the configure endpoint command */
2077 ret = xhci_configure_endpoint(xhci, udev, config_cmd,
2080 /* xHC rejected the configure endpoint command for some reason, so we
2081 * leave the old ring intact and free our internal streams data
2087 spin_lock_irqsave(&xhci->lock, flags);
2088 for (i = 0; i < num_eps; i++) {
2089 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
2090 vdev->eps[ep_index].ep_state &= ~EP_GETTING_STREAMS;
2091 xhci_dbg(xhci, "Slot %u ep ctx %u now has streams.\n",
2092 udev->slot_id, ep_index);
2093 vdev->eps[ep_index].ep_state |= EP_HAS_STREAMS;
2095 xhci_free_command(xhci, config_cmd);
2096 spin_unlock_irqrestore(&xhci->lock, flags);
2098 /* Subtract 1 for stream 0, which drivers can't use */
2099 return num_streams - 1;
2102 /* If it didn't work, free the streams! */
2103 for (i = 0; i < num_eps; i++) {
2104 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
2105 xhci_free_stream_info(xhci, vdev->eps[ep_index].stream_info);
2106 vdev->eps[ep_index].stream_info = NULL;
2107 /* FIXME Unset maxPstreams in endpoint context and
2108 * update deq ptr to point to normal string ring.
2110 vdev->eps[ep_index].ep_state &= ~EP_GETTING_STREAMS;
2111 vdev->eps[ep_index].ep_state &= ~EP_HAS_STREAMS;
2112 xhci_endpoint_zero(xhci, vdev, eps[i]);
2114 xhci_free_command(xhci, config_cmd);
2118 /* Transition the endpoint from using streams to being a "normal" endpoint
2121 * Modify the endpoint context state, submit a configure endpoint command,
2122 * and free all endpoint rings for streams if that completes successfully.
2124 int xhci_free_streams(struct usb_hcd *hcd, struct usb_device *udev,
2125 struct usb_host_endpoint **eps, unsigned int num_eps,
2129 struct xhci_hcd *xhci;
2130 struct xhci_virt_device *vdev;
2131 struct xhci_command *command;
2132 unsigned int ep_index;
2133 unsigned long flags;
2134 u32 changed_ep_bitmask;
2136 xhci = hcd_to_xhci(hcd);
2137 vdev = xhci->devs[udev->slot_id];
2139 /* Set up a configure endpoint command to remove the streams rings */
2140 spin_lock_irqsave(&xhci->lock, flags);
2141 changed_ep_bitmask = xhci_calculate_no_streams_bitmask(xhci,
2142 udev, eps, num_eps);
2143 if (changed_ep_bitmask == 0) {
2144 spin_unlock_irqrestore(&xhci->lock, flags);
2148 /* Use the xhci_command structure from the first endpoint. We may have
2149 * allocated too many, but the driver may call xhci_free_streams() for
2150 * each endpoint it grouped into one call to xhci_alloc_streams().
2152 ep_index = xhci_get_endpoint_index(&eps[0]->desc);
2153 command = vdev->eps[ep_index].stream_info->free_streams_command;
2154 for (i = 0; i < num_eps; i++) {
2155 struct xhci_ep_ctx *ep_ctx;
2157 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
2158 ep_ctx = xhci_get_ep_ctx(xhci, command->in_ctx, ep_index);
2159 xhci->devs[udev->slot_id]->eps[ep_index].ep_state |=
2160 EP_GETTING_NO_STREAMS;
2162 xhci_endpoint_copy(xhci, command->in_ctx,
2163 vdev->out_ctx, ep_index);
2164 xhci_setup_no_streams_ep_input_ctx(xhci, ep_ctx,
2165 &vdev->eps[ep_index]);
2167 xhci_setup_input_ctx_for_config_ep(xhci, command->in_ctx,
2168 vdev->out_ctx, changed_ep_bitmask, changed_ep_bitmask);
2169 spin_unlock_irqrestore(&xhci->lock, flags);
2171 /* Issue and wait for the configure endpoint command,
2172 * which must succeed.
2174 ret = xhci_configure_endpoint(xhci, udev, command,
2177 /* xHC rejected the configure endpoint command for some reason, so we
2178 * leave the streams rings intact.
2183 spin_lock_irqsave(&xhci->lock, flags);
2184 for (i = 0; i < num_eps; i++) {
2185 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
2186 xhci_free_stream_info(xhci, vdev->eps[ep_index].stream_info);
2187 vdev->eps[ep_index].stream_info = NULL;
2188 /* FIXME Unset maxPstreams in endpoint context and
2189 * update deq ptr to point to normal string ring.
2191 vdev->eps[ep_index].ep_state &= ~EP_GETTING_NO_STREAMS;
2192 vdev->eps[ep_index].ep_state &= ~EP_HAS_STREAMS;
2194 spin_unlock_irqrestore(&xhci->lock, flags);
2200 * This submits a Reset Device Command, which will set the device state to 0,
2201 * set the device address to 0, and disable all the endpoints except the default
2202 * control endpoint. The USB core should come back and call
2203 * xhci_address_device(), and then re-set up the configuration. If this is
2204 * called because of a usb_reset_and_verify_device(), then the old alternate
2205 * settings will be re-installed through the normal bandwidth allocation
2208 * Wait for the Reset Device command to finish. Remove all structures
2209 * associated with the endpoints that were disabled. Clear the input device
2210 * structure? Cache the rings? Reset the control endpoint 0 max packet size?
2212 * If the virt_dev to be reset does not exist or does not match the udev,
2213 * it means the device is lost, possibly due to the xHC restore error and
2214 * re-initialization during S3/S4. In this case, call xhci_alloc_dev() to
2215 * re-allocate the device.
2217 int xhci_discover_or_reset_device(struct usb_hcd *hcd, struct usb_device *udev)
2220 unsigned long flags;
2221 struct xhci_hcd *xhci;
2222 unsigned int slot_id;
2223 struct xhci_virt_device *virt_dev;
2224 struct xhci_command *reset_device_cmd;
2226 int last_freed_endpoint;
2228 ret = xhci_check_args(hcd, udev, NULL, 0, false, __func__);
2231 xhci = hcd_to_xhci(hcd);
2232 slot_id = udev->slot_id;
2233 virt_dev = xhci->devs[slot_id];
2235 xhci_dbg(xhci, "The device to be reset with slot ID %u does "
2236 "not exist. Re-allocate the device\n", slot_id);
2237 ret = xhci_alloc_dev(hcd, udev);
2244 if (virt_dev->udev != udev) {
2245 /* If the virt_dev and the udev does not match, this virt_dev
2246 * may belong to another udev.
2247 * Re-allocate the device.
2249 xhci_dbg(xhci, "The device to be reset with slot ID %u does "
2250 "not match the udev. Re-allocate the device\n",
2252 ret = xhci_alloc_dev(hcd, udev);
2259 xhci_dbg(xhci, "Resetting device with slot ID %u\n", slot_id);
2260 /* Allocate the command structure that holds the struct completion.
2261 * Assume we're in process context, since the normal device reset
2262 * process has to wait for the device anyway. Storage devices are
2263 * reset as part of error handling, so use GFP_NOIO instead of
2266 reset_device_cmd = xhci_alloc_command(xhci, false, true, GFP_NOIO);
2267 if (!reset_device_cmd) {
2268 xhci_dbg(xhci, "Couldn't allocate command structure.\n");
2272 /* Attempt to submit the Reset Device command to the command ring */
2273 spin_lock_irqsave(&xhci->lock, flags);
2274 reset_device_cmd->command_trb = xhci->cmd_ring->enqueue;
2275 list_add_tail(&reset_device_cmd->cmd_list, &virt_dev->cmd_list);
2276 ret = xhci_queue_reset_device(xhci, slot_id);
2278 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
2279 list_del(&reset_device_cmd->cmd_list);
2280 spin_unlock_irqrestore(&xhci->lock, flags);
2281 goto command_cleanup;
2283 xhci_ring_cmd_db(xhci);
2284 spin_unlock_irqrestore(&xhci->lock, flags);
2286 /* Wait for the Reset Device command to finish */
2287 timeleft = wait_for_completion_interruptible_timeout(
2288 reset_device_cmd->completion,
2289 USB_CTRL_SET_TIMEOUT);
2290 if (timeleft <= 0) {
2291 xhci_warn(xhci, "%s while waiting for reset device command\n",
2292 timeleft == 0 ? "Timeout" : "Signal");
2293 spin_lock_irqsave(&xhci->lock, flags);
2294 /* The timeout might have raced with the event ring handler, so
2295 * only delete from the list if the item isn't poisoned.
2297 if (reset_device_cmd->cmd_list.next != LIST_POISON1)
2298 list_del(&reset_device_cmd->cmd_list);
2299 spin_unlock_irqrestore(&xhci->lock, flags);
2301 goto command_cleanup;
2304 /* The Reset Device command can't fail, according to the 0.95/0.96 spec,
2305 * unless we tried to reset a slot ID that wasn't enabled,
2306 * or the device wasn't in the addressed or configured state.
2308 ret = reset_device_cmd->status;
2310 case COMP_EBADSLT: /* 0.95 completion code for bad slot ID */
2311 case COMP_CTX_STATE: /* 0.96 completion code for same thing */
2312 xhci_info(xhci, "Can't reset device (slot ID %u) in %s state\n",
2314 xhci_get_slot_state(xhci, virt_dev->out_ctx));
2315 xhci_info(xhci, "Not freeing device rings.\n");
2316 /* Don't treat this as an error. May change my mind later. */
2318 goto command_cleanup;
2320 xhci_dbg(xhci, "Successful reset device command.\n");
2323 if (xhci_is_vendor_info_code(xhci, ret))
2325 xhci_warn(xhci, "Unknown completion code %u for "
2326 "reset device command.\n", ret);
2328 goto command_cleanup;
2331 /* Everything but endpoint 0 is disabled, so free or cache the rings. */
2332 last_freed_endpoint = 1;
2333 for (i = 1; i < 31; ++i) {
2334 if (!virt_dev->eps[i].ring)
2336 xhci_free_or_cache_endpoint_ring(xhci, virt_dev, i);
2337 last_freed_endpoint = i;
2339 xhci_dbg(xhci, "Output context after successful reset device cmd:\n");
2340 xhci_dbg_ctx(xhci, virt_dev->out_ctx, last_freed_endpoint);
2344 xhci_free_command(xhci, reset_device_cmd);
2349 * At this point, the struct usb_device is about to go away, the device has
2350 * disconnected, and all traffic has been stopped and the endpoints have been
2351 * disabled. Free any HC data structures associated with that device.
2353 void xhci_free_dev(struct usb_hcd *hcd, struct usb_device *udev)
2355 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
2356 struct xhci_virt_device *virt_dev;
2357 unsigned long flags;
2361 ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
2365 virt_dev = xhci->devs[udev->slot_id];
2367 /* Stop any wayward timer functions (which may grab the lock) */
2368 for (i = 0; i < 31; ++i) {
2369 virt_dev->eps[i].ep_state &= ~EP_HALT_PENDING;
2370 del_timer_sync(&virt_dev->eps[i].stop_cmd_timer);
2373 spin_lock_irqsave(&xhci->lock, flags);
2374 /* Don't disable the slot if the host controller is dead. */
2375 state = xhci_readl(xhci, &xhci->op_regs->status);
2376 if (state == 0xffffffff || (xhci->xhc_state & XHCI_STATE_DYING)) {
2377 xhci_free_virt_device(xhci, udev->slot_id);
2378 spin_unlock_irqrestore(&xhci->lock, flags);
2382 if (xhci_queue_slot_control(xhci, TRB_DISABLE_SLOT, udev->slot_id)) {
2383 spin_unlock_irqrestore(&xhci->lock, flags);
2384 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
2387 xhci_ring_cmd_db(xhci);
2388 spin_unlock_irqrestore(&xhci->lock, flags);
2390 * Event command completion handler will free any data structures
2391 * associated with the slot. XXX Can free sleep?
2396 * Returns 0 if the xHC ran out of device slots, the Enable Slot command
2397 * timed out, or allocating memory failed. Returns 1 on success.
2399 int xhci_alloc_dev(struct usb_hcd *hcd, struct usb_device *udev)
2401 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
2402 unsigned long flags;
2406 spin_lock_irqsave(&xhci->lock, flags);
2407 ret = xhci_queue_slot_control(xhci, TRB_ENABLE_SLOT, 0);
2409 spin_unlock_irqrestore(&xhci->lock, flags);
2410 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
2413 xhci_ring_cmd_db(xhci);
2414 spin_unlock_irqrestore(&xhci->lock, flags);
2416 /* XXX: how much time for xHC slot assignment? */
2417 timeleft = wait_for_completion_interruptible_timeout(&xhci->addr_dev,
2418 USB_CTRL_SET_TIMEOUT);
2419 if (timeleft <= 0) {
2420 xhci_warn(xhci, "%s while waiting for a slot\n",
2421 timeleft == 0 ? "Timeout" : "Signal");
2422 /* FIXME cancel the enable slot request */
2426 if (!xhci->slot_id) {
2427 xhci_err(xhci, "Error while assigning device slot ID\n");
2430 /* xhci_alloc_virt_device() does not touch rings; no need to lock */
2431 if (!xhci_alloc_virt_device(xhci, xhci->slot_id, udev, GFP_KERNEL)) {
2432 /* Disable slot, if we can do it without mem alloc */
2433 xhci_warn(xhci, "Could not allocate xHCI USB device data structures\n");
2434 spin_lock_irqsave(&xhci->lock, flags);
2435 if (!xhci_queue_slot_control(xhci, TRB_DISABLE_SLOT, udev->slot_id))
2436 xhci_ring_cmd_db(xhci);
2437 spin_unlock_irqrestore(&xhci->lock, flags);
2440 udev->slot_id = xhci->slot_id;
2441 /* Is this a LS or FS device under a HS hub? */
2442 /* Hub or peripherial? */
2447 * Issue an Address Device command (which will issue a SetAddress request to
2449 * We should be protected by the usb_address0_mutex in khubd's hub_port_init, so
2450 * we should only issue and wait on one address command at the same time.
2452 * We add one to the device address issued by the hardware because the USB core
2453 * uses address 1 for the root hubs (even though they're not really devices).
2455 int xhci_address_device(struct usb_hcd *hcd, struct usb_device *udev)
2457 unsigned long flags;
2459 struct xhci_virt_device *virt_dev;
2461 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
2462 struct xhci_slot_ctx *slot_ctx;
2463 struct xhci_input_control_ctx *ctrl_ctx;
2466 if (!udev->slot_id) {
2467 xhci_dbg(xhci, "Bad Slot ID %d\n", udev->slot_id);
2471 virt_dev = xhci->devs[udev->slot_id];
2473 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
2475 * If this is the first Set Address since device plug-in or
2476 * virt_device realloaction after a resume with an xHCI power loss,
2477 * then set up the slot context.
2479 if (!slot_ctx->dev_info)
2480 xhci_setup_addressable_virt_dev(xhci, udev);
2481 /* Otherwise, update the control endpoint ring enqueue pointer. */
2483 xhci_copy_ep0_dequeue_into_input_ctx(xhci, udev);
2484 xhci_dbg(xhci, "Slot ID %d Input Context:\n", udev->slot_id);
2485 xhci_dbg_ctx(xhci, virt_dev->in_ctx, 2);
2487 spin_lock_irqsave(&xhci->lock, flags);
2488 ret = xhci_queue_address_device(xhci, virt_dev->in_ctx->dma,
2491 spin_unlock_irqrestore(&xhci->lock, flags);
2492 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
2495 xhci_ring_cmd_db(xhci);
2496 spin_unlock_irqrestore(&xhci->lock, flags);
2498 /* ctrl tx can take up to 5 sec; XXX: need more time for xHC? */
2499 timeleft = wait_for_completion_interruptible_timeout(&xhci->addr_dev,
2500 USB_CTRL_SET_TIMEOUT);
2501 /* FIXME: From section 4.3.4: "Software shall be responsible for timing
2502 * the SetAddress() "recovery interval" required by USB and aborting the
2503 * command on a timeout.
2505 if (timeleft <= 0) {
2506 xhci_warn(xhci, "%s while waiting for a slot\n",
2507 timeleft == 0 ? "Timeout" : "Signal");
2508 /* FIXME cancel the address device command */
2512 switch (virt_dev->cmd_status) {
2513 case COMP_CTX_STATE:
2515 xhci_err(xhci, "Setup ERROR: address device command for slot %d.\n",
2520 dev_warn(&udev->dev, "Device not responding to set address.\n");
2524 xhci_dbg(xhci, "Successful Address Device command\n");
2527 xhci_err(xhci, "ERROR: unexpected command completion "
2528 "code 0x%x.\n", virt_dev->cmd_status);
2529 xhci_dbg(xhci, "Slot ID %d Output Context:\n", udev->slot_id);
2530 xhci_dbg_ctx(xhci, virt_dev->out_ctx, 2);
2537 temp_64 = xhci_read_64(xhci, &xhci->op_regs->dcbaa_ptr);
2538 xhci_dbg(xhci, "Op regs DCBAA ptr = %#016llx\n", temp_64);
2539 xhci_dbg(xhci, "Slot ID %d dcbaa entry @%p = %#016llx\n",
2541 &xhci->dcbaa->dev_context_ptrs[udev->slot_id],
2542 (unsigned long long)
2543 xhci->dcbaa->dev_context_ptrs[udev->slot_id]);
2544 xhci_dbg(xhci, "Output Context DMA address = %#08llx\n",
2545 (unsigned long long)virt_dev->out_ctx->dma);
2546 xhci_dbg(xhci, "Slot ID %d Input Context:\n", udev->slot_id);
2547 xhci_dbg_ctx(xhci, virt_dev->in_ctx, 2);
2548 xhci_dbg(xhci, "Slot ID %d Output Context:\n", udev->slot_id);
2549 xhci_dbg_ctx(xhci, virt_dev->out_ctx, 2);
2551 * USB core uses address 1 for the roothubs, so we add one to the
2552 * address given back to us by the HC.
2554 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->out_ctx);
2555 /* Use kernel assigned address for devices; store xHC assigned
2556 * address locally. */
2557 virt_dev->address = (slot_ctx->dev_state & DEV_ADDR_MASK) + 1;
2558 /* Zero the input context control for later use */
2559 ctrl_ctx = xhci_get_input_control_ctx(xhci, virt_dev->in_ctx);
2560 ctrl_ctx->add_flags = 0;
2561 ctrl_ctx->drop_flags = 0;
2563 xhci_dbg(xhci, "Internal device address = %d\n", virt_dev->address);
2568 /* Once a hub descriptor is fetched for a device, we need to update the xHC's
2569 * internal data structures for the device.
2571 int xhci_update_hub_device(struct usb_hcd *hcd, struct usb_device *hdev,
2572 struct usb_tt *tt, gfp_t mem_flags)
2574 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
2575 struct xhci_virt_device *vdev;
2576 struct xhci_command *config_cmd;
2577 struct xhci_input_control_ctx *ctrl_ctx;
2578 struct xhci_slot_ctx *slot_ctx;
2579 unsigned long flags;
2580 unsigned think_time;
2583 /* Ignore root hubs */
2587 vdev = xhci->devs[hdev->slot_id];
2589 xhci_warn(xhci, "Cannot update hub desc for unknown device.\n");
2592 config_cmd = xhci_alloc_command(xhci, true, true, mem_flags);
2594 xhci_dbg(xhci, "Could not allocate xHCI command structure.\n");
2598 spin_lock_irqsave(&xhci->lock, flags);
2599 xhci_slot_copy(xhci, config_cmd->in_ctx, vdev->out_ctx);
2600 ctrl_ctx = xhci_get_input_control_ctx(xhci, config_cmd->in_ctx);
2601 ctrl_ctx->add_flags |= SLOT_FLAG;
2602 slot_ctx = xhci_get_slot_ctx(xhci, config_cmd->in_ctx);
2603 slot_ctx->dev_info |= DEV_HUB;
2605 slot_ctx->dev_info |= DEV_MTT;
2606 if (xhci->hci_version > 0x95) {
2607 xhci_dbg(xhci, "xHCI version %x needs hub "
2608 "TT think time and number of ports\n",
2609 (unsigned int) xhci->hci_version);
2610 slot_ctx->dev_info2 |= XHCI_MAX_PORTS(hdev->maxchild);
2611 /* Set TT think time - convert from ns to FS bit times.
2612 * 0 = 8 FS bit times, 1 = 16 FS bit times,
2613 * 2 = 24 FS bit times, 3 = 32 FS bit times.
2615 think_time = tt->think_time;
2616 if (think_time != 0)
2617 think_time = (think_time / 666) - 1;
2618 slot_ctx->tt_info |= TT_THINK_TIME(think_time);
2620 xhci_dbg(xhci, "xHCI version %x doesn't need hub "
2621 "TT think time or number of ports\n",
2622 (unsigned int) xhci->hci_version);
2624 slot_ctx->dev_state = 0;
2625 spin_unlock_irqrestore(&xhci->lock, flags);
2627 xhci_dbg(xhci, "Set up %s for hub device.\n",
2628 (xhci->hci_version > 0x95) ?
2629 "configure endpoint" : "evaluate context");
2630 xhci_dbg(xhci, "Slot %u Input Context:\n", hdev->slot_id);
2631 xhci_dbg_ctx(xhci, config_cmd->in_ctx, 0);
2633 /* Issue and wait for the configure endpoint or
2634 * evaluate context command.
2636 if (xhci->hci_version > 0x95)
2637 ret = xhci_configure_endpoint(xhci, hdev, config_cmd,
2640 ret = xhci_configure_endpoint(xhci, hdev, config_cmd,
2643 xhci_dbg(xhci, "Slot %u Output Context:\n", hdev->slot_id);
2644 xhci_dbg_ctx(xhci, vdev->out_ctx, 0);
2646 xhci_free_command(xhci, config_cmd);
2650 int xhci_get_frame(struct usb_hcd *hcd)
2652 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
2653 /* EHCI mods by the periodic size. Why? */
2654 return xhci_readl(xhci, &xhci->run_regs->microframe_index) >> 3;
2657 MODULE_DESCRIPTION(DRIVER_DESC);
2658 MODULE_AUTHOR(DRIVER_AUTHOR);
2659 MODULE_LICENSE("GPL");
2661 static int __init xhci_hcd_init(void)
2666 retval = xhci_register_pci();
2669 printk(KERN_DEBUG "Problem registering PCI driver.");
2674 * Check the compiler generated sizes of structures that must be laid
2675 * out in specific ways for hardware access.
2677 BUILD_BUG_ON(sizeof(struct xhci_doorbell_array) != 256*32/8);
2678 BUILD_BUG_ON(sizeof(struct xhci_slot_ctx) != 8*32/8);
2679 BUILD_BUG_ON(sizeof(struct xhci_ep_ctx) != 8*32/8);
2680 /* xhci_device_control has eight fields, and also
2681 * embeds one xhci_slot_ctx and 31 xhci_ep_ctx
2683 BUILD_BUG_ON(sizeof(struct xhci_stream_ctx) != 4*32/8);
2684 BUILD_BUG_ON(sizeof(union xhci_trb) != 4*32/8);
2685 BUILD_BUG_ON(sizeof(struct xhci_erst_entry) != 4*32/8);
2686 BUILD_BUG_ON(sizeof(struct xhci_cap_regs) != 7*32/8);
2687 BUILD_BUG_ON(sizeof(struct xhci_intr_reg) != 8*32/8);
2688 /* xhci_run_regs has eight fields and embeds 128 xhci_intr_regs */
2689 BUILD_BUG_ON(sizeof(struct xhci_run_regs) != (8+8*128)*32/8);
2690 BUILD_BUG_ON(sizeof(struct xhci_doorbell_array) != 256*32/8);
2693 module_init(xhci_hcd_init);
2695 static void __exit xhci_hcd_cleanup(void)
2698 xhci_unregister_pci();
2701 module_exit(xhci_hcd_cleanup);