2 * Texas Instruments DSPS platforms "glue layer"
4 * Copyright (C) 2012, by Texas Instruments
6 * Based on the am35x "glue layer" code.
8 * This file is part of the Inventra Controller Driver for Linux.
10 * The Inventra Controller Driver for Linux is free software; you
11 * can redistribute it and/or modify it under the terms of the GNU
12 * General Public License version 2 as published by the Free Software
15 * The Inventra Controller Driver for Linux is distributed in
16 * the hope that it will be useful, but WITHOUT ANY WARRANTY;
17 * without even the implied warranty of MERCHANTABILITY or
18 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
19 * License for more details.
21 * You should have received a copy of the GNU General Public License
22 * along with The Inventra Controller Driver for Linux ; if not,
23 * write to the Free Software Foundation, Inc., 59 Temple Place,
24 * Suite 330, Boston, MA 02111-1307 USA
26 * musb_dsps.c will be a common file for all the TI DSPS platforms
27 * such as dm64x, dm36x, dm35x, da8x, am35x and ti81x.
28 * For now only ti81x is using this and in future davinci.c, am35x.c
29 * da8xx.c would be merged to this file after testing.
32 #include <linux/init.h>
34 #include <linux/err.h>
35 #include <linux/platform_device.h>
36 #include <linux/dma-mapping.h>
37 #include <linux/pm_runtime.h>
38 #include <linux/module.h>
39 #include <linux/usb/usb_phy_gen_xceiv.h>
40 #include <linux/platform_data/usb-omap.h>
41 #include <linux/sizes.h>
44 #include <linux/of_device.h>
45 #include <linux/of_address.h>
46 #include <linux/of_irq.h>
47 #include <linux/usb/of.h>
49 #include "musb_core.h"
51 static const struct of_device_id musb_dsps_of_match[];
54 * avoid using musb_readx()/musb_writex() as glue layer should not be
55 * dependent on musb core layer symbols.
57 static inline u8 dsps_readb(const void __iomem *addr, unsigned offset)
58 { return __raw_readb(addr + offset); }
60 static inline u32 dsps_readl(const void __iomem *addr, unsigned offset)
61 { return __raw_readl(addr + offset); }
63 static inline void dsps_writeb(void __iomem *addr, unsigned offset, u8 data)
64 { __raw_writeb(data, addr + offset); }
66 static inline void dsps_writel(void __iomem *addr, unsigned offset, u32 data)
67 { __raw_writel(data, addr + offset); }
70 * DSPS musb wrapper register offset.
71 * FIXME: This should be expanded to have all the wrapper registers from TI DSPS
74 struct dsps_musb_wrapper {
87 /* bit positions for control */
90 /* bit positions for interrupt */
96 unsigned txep_shift:5;
100 unsigned rxep_shift:5;
104 /* bit positions for phy_utmi */
105 unsigned otg_disable:5;
107 /* bit positions for mode */
109 /* miscellaneous stuff */
114 * DSPS glue structure.
118 struct platform_device *musb; /* child musb pdev */
119 const struct dsps_musb_wrapper *wrp; /* wrapper register offsets */
120 struct timer_list timer; /* otg_workaround timer */
121 unsigned long last_timer; /* last timer data for each instance */
125 * dsps_musb_enable - enable interrupts
127 static void dsps_musb_enable(struct musb *musb)
129 struct device *dev = musb->controller;
130 struct platform_device *pdev = to_platform_device(dev->parent);
131 struct dsps_glue *glue = platform_get_drvdata(pdev);
132 const struct dsps_musb_wrapper *wrp = glue->wrp;
133 void __iomem *reg_base = musb->ctrl_base;
134 u32 epmask, coremask;
136 /* Workaround: setup IRQs through both register sets. */
137 epmask = ((musb->epmask & wrp->txep_mask) << wrp->txep_shift) |
138 ((musb->epmask & wrp->rxep_mask) << wrp->rxep_shift);
139 coremask = (wrp->usb_bitmap & ~MUSB_INTR_SOF);
141 dsps_writel(reg_base, wrp->epintr_set, epmask);
142 dsps_writel(reg_base, wrp->coreintr_set, coremask);
143 /* Force the DRVVBUS IRQ so we can start polling for ID change. */
144 dsps_writel(reg_base, wrp->coreintr_set,
145 (1 << wrp->drvvbus) << wrp->usb_shift);
149 * dsps_musb_disable - disable HDRC and flush interrupts
151 static void dsps_musb_disable(struct musb *musb)
153 struct device *dev = musb->controller;
154 struct platform_device *pdev = to_platform_device(dev->parent);
155 struct dsps_glue *glue = platform_get_drvdata(pdev);
156 const struct dsps_musb_wrapper *wrp = glue->wrp;
157 void __iomem *reg_base = musb->ctrl_base;
159 dsps_writel(reg_base, wrp->coreintr_clear, wrp->usb_bitmap);
160 dsps_writel(reg_base, wrp->epintr_clear,
161 wrp->txep_bitmap | wrp->rxep_bitmap);
162 dsps_writeb(musb->mregs, MUSB_DEVCTL, 0);
165 static void otg_timer(unsigned long _musb)
167 struct musb *musb = (void *)_musb;
168 void __iomem *mregs = musb->mregs;
169 struct device *dev = musb->controller;
170 struct dsps_glue *glue = dev_get_drvdata(dev->parent);
171 const struct dsps_musb_wrapper *wrp = glue->wrp;
176 * We poll because DSPS IP's won't expose several OTG-critical
177 * status change events (from the transceiver) otherwise.
179 devctl = dsps_readb(mregs, MUSB_DEVCTL);
180 dev_dbg(musb->controller, "Poll devctl %02x (%s)\n", devctl,
181 usb_otg_state_string(musb->xceiv->state));
183 spin_lock_irqsave(&musb->lock, flags);
184 switch (musb->xceiv->state) {
185 case OTG_STATE_A_WAIT_BCON:
186 devctl &= ~MUSB_DEVCTL_SESSION;
187 dsps_writeb(musb->mregs, MUSB_DEVCTL, devctl);
189 devctl = dsps_readb(musb->mregs, MUSB_DEVCTL);
190 if (devctl & MUSB_DEVCTL_BDEVICE) {
191 musb->xceiv->state = OTG_STATE_B_IDLE;
194 musb->xceiv->state = OTG_STATE_A_IDLE;
198 case OTG_STATE_A_WAIT_VFALL:
199 musb->xceiv->state = OTG_STATE_A_WAIT_VRISE;
200 dsps_writel(musb->ctrl_base, wrp->coreintr_set,
201 MUSB_INTR_VBUSERROR << wrp->usb_shift);
203 case OTG_STATE_B_IDLE:
204 devctl = dsps_readb(mregs, MUSB_DEVCTL);
205 if (devctl & MUSB_DEVCTL_BDEVICE)
206 mod_timer(&glue->timer,
207 jiffies + wrp->poll_seconds * HZ);
209 musb->xceiv->state = OTG_STATE_A_IDLE;
214 spin_unlock_irqrestore(&musb->lock, flags);
217 static void dsps_musb_try_idle(struct musb *musb, unsigned long timeout)
219 struct device *dev = musb->controller;
220 struct dsps_glue *glue = dev_get_drvdata(dev->parent);
223 timeout = jiffies + msecs_to_jiffies(3);
225 /* Never idle if active, or when VBUS timeout is not set as host */
226 if (musb->is_active || (musb->a_wait_bcon == 0 &&
227 musb->xceiv->state == OTG_STATE_A_WAIT_BCON)) {
228 dev_dbg(musb->controller, "%s active, deleting timer\n",
229 usb_otg_state_string(musb->xceiv->state));
230 del_timer(&glue->timer);
231 glue->last_timer = jiffies;
235 if (time_after(glue->last_timer, timeout) &&
236 timer_pending(&glue->timer)) {
237 dev_dbg(musb->controller,
238 "Longer idle timer already pending, ignoring...\n");
241 glue->last_timer = timeout;
243 dev_dbg(musb->controller, "%s inactive, starting idle timer for %u ms\n",
244 usb_otg_state_string(musb->xceiv->state),
245 jiffies_to_msecs(timeout - jiffies));
246 mod_timer(&glue->timer, timeout);
249 static irqreturn_t dsps_interrupt(int irq, void *hci)
251 struct musb *musb = hci;
252 void __iomem *reg_base = musb->ctrl_base;
253 struct device *dev = musb->controller;
254 struct dsps_glue *glue = dev_get_drvdata(dev->parent);
255 const struct dsps_musb_wrapper *wrp = glue->wrp;
257 irqreturn_t ret = IRQ_NONE;
260 spin_lock_irqsave(&musb->lock, flags);
262 /* Get endpoint interrupts */
263 epintr = dsps_readl(reg_base, wrp->epintr_status);
264 musb->int_rx = (epintr & wrp->rxep_bitmap) >> wrp->rxep_shift;
265 musb->int_tx = (epintr & wrp->txep_bitmap) >> wrp->txep_shift;
268 dsps_writel(reg_base, wrp->epintr_status, epintr);
270 /* Get usb core interrupts */
271 usbintr = dsps_readl(reg_base, wrp->coreintr_status);
272 if (!usbintr && !epintr)
275 musb->int_usb = (usbintr & wrp->usb_bitmap) >> wrp->usb_shift;
277 dsps_writel(reg_base, wrp->coreintr_status, usbintr);
279 dev_dbg(musb->controller, "usbintr (%x) epintr(%x)\n",
282 * DRVVBUS IRQs are the only proxy we have (a very poor one!) for
283 * DSPS IP's missing ID change IRQ. We need an ID change IRQ to
284 * switch appropriately between halves of the OTG state machine.
285 * Managing DEVCTL.SESSION per Mentor docs requires that we know its
286 * value but DEVCTL.BDEVICE is invalid without DEVCTL.SESSION set.
287 * Also, DRVVBUS pulses for SRP (but not at 5V) ...
289 if (is_host_active(musb) && usbintr & MUSB_INTR_BABBLE)
290 pr_info("CAUTION: musb: Babble Interrupt Occurred\n");
292 if (usbintr & ((1 << wrp->drvvbus) << wrp->usb_shift)) {
293 int drvvbus = dsps_readl(reg_base, wrp->status);
294 void __iomem *mregs = musb->mregs;
295 u8 devctl = dsps_readb(mregs, MUSB_DEVCTL);
298 err = musb->int_usb & MUSB_INTR_VBUSERROR;
301 * The Mentor core doesn't debounce VBUS as needed
302 * to cope with device connect current spikes. This
303 * means it's not uncommon for bus-powered devices
304 * to get VBUS errors during enumeration.
306 * This is a workaround, but newer RTL from Mentor
307 * seems to allow a better one: "re"-starting sessions
308 * without waiting for VBUS to stop registering in
311 musb->int_usb &= ~MUSB_INTR_VBUSERROR;
312 musb->xceiv->state = OTG_STATE_A_WAIT_VFALL;
313 mod_timer(&glue->timer,
314 jiffies + wrp->poll_seconds * HZ);
315 WARNING("VBUS error workaround (delay coming)\n");
316 } else if (drvvbus) {
318 musb->xceiv->otg->default_a = 1;
319 musb->xceiv->state = OTG_STATE_A_WAIT_VRISE;
320 del_timer(&glue->timer);
324 musb->xceiv->otg->default_a = 0;
325 musb->xceiv->state = OTG_STATE_B_IDLE;
328 /* NOTE: this must complete power-on within 100 ms. */
329 dev_dbg(musb->controller, "VBUS %s (%s)%s, devctl %02x\n",
330 drvvbus ? "on" : "off",
331 usb_otg_state_string(musb->xceiv->state),
337 if (musb->int_tx || musb->int_rx || musb->int_usb)
338 ret |= musb_interrupt(musb);
340 /* Poll for ID change */
341 if (musb->xceiv->state == OTG_STATE_B_IDLE)
342 mod_timer(&glue->timer, jiffies + wrp->poll_seconds * HZ);
344 spin_unlock_irqrestore(&musb->lock, flags);
349 static int dsps_musb_init(struct musb *musb)
351 struct device *dev = musb->controller;
352 struct dsps_glue *glue = dev_get_drvdata(dev->parent);
353 struct platform_device *parent = to_platform_device(dev->parent);
354 const struct dsps_musb_wrapper *wrp = glue->wrp;
355 void __iomem *reg_base;
359 r = platform_get_resource_byname(parent, IORESOURCE_MEM, "control");
363 reg_base = devm_ioremap_resource(dev, r);
364 if (IS_ERR(reg_base))
365 return PTR_ERR(reg_base);
366 musb->ctrl_base = reg_base;
368 /* NOP driver needs change if supporting dual instance */
369 musb->xceiv = devm_usb_get_phy_by_phandle(dev, "phys", 0);
370 if (IS_ERR(musb->xceiv))
371 return PTR_ERR(musb->xceiv);
373 /* Returns zero if e.g. not clocked */
374 rev = dsps_readl(reg_base, wrp->revision);
378 usb_phy_init(musb->xceiv);
379 setup_timer(&glue->timer, otg_timer, (unsigned long) musb);
382 dsps_writel(reg_base, wrp->control, (1 << wrp->reset));
384 musb->isr = dsps_interrupt;
386 /* reset the otgdisable bit, needed for host mode to work */
387 val = dsps_readl(reg_base, wrp->phy_utmi);
388 val &= ~(1 << wrp->otg_disable);
389 dsps_writel(musb->ctrl_base, wrp->phy_utmi, val);
394 static int dsps_musb_exit(struct musb *musb)
396 struct device *dev = musb->controller;
397 struct dsps_glue *glue = dev_get_drvdata(dev->parent);
399 del_timer_sync(&glue->timer);
401 usb_phy_shutdown(musb->xceiv);
405 static struct musb_platform_ops dsps_ops = {
406 .init = dsps_musb_init,
407 .exit = dsps_musb_exit,
409 .enable = dsps_musb_enable,
410 .disable = dsps_musb_disable,
412 .try_idle = dsps_musb_try_idle,
415 static u64 musb_dmamask = DMA_BIT_MASK(32);
417 static int get_int_prop(struct device_node *dn, const char *s)
422 ret = of_property_read_u32(dn, s, &val);
428 static int get_musb_port_mode(struct device *dev)
430 enum usb_dr_mode mode;
432 mode = of_usb_get_dr_mode(dev->of_node);
434 case USB_DR_MODE_HOST:
435 return MUSB_PORT_MODE_HOST;
437 case USB_DR_MODE_PERIPHERAL:
438 return MUSB_PORT_MODE_GADGET;
440 case USB_DR_MODE_UNKNOWN:
441 case USB_DR_MODE_OTG:
443 return MUSB_PORT_MODE_DUAL_ROLE;
447 static int dsps_create_musb_pdev(struct dsps_glue *glue,
448 struct platform_device *parent)
450 struct musb_hdrc_platform_data pdata;
451 struct resource resources[2];
452 struct resource *res;
453 struct device *dev = &parent->dev;
454 struct musb_hdrc_config *config;
455 struct platform_device *musb;
456 struct device_node *dn = parent->dev.of_node;
459 memset(resources, 0, sizeof(resources));
460 res = platform_get_resource_byname(parent, IORESOURCE_MEM, "mc");
462 dev_err(dev, "failed to get memory.\n");
467 res = platform_get_resource_byname(parent, IORESOURCE_IRQ, "mc");
469 dev_err(dev, "failed to get irq.\n");
474 /* allocate the child platform device */
475 musb = platform_device_alloc("musb-hdrc", PLATFORM_DEVID_AUTO);
477 dev_err(dev, "failed to allocate musb device\n");
481 musb->dev.parent = dev;
482 musb->dev.dma_mask = &musb_dmamask;
483 musb->dev.coherent_dma_mask = musb_dmamask;
484 musb->dev.of_node = of_node_get(dn);
488 ret = platform_device_add_resources(musb, resources,
489 ARRAY_SIZE(resources));
491 dev_err(dev, "failed to add resources\n");
495 config = devm_kzalloc(&parent->dev, sizeof(*config), GFP_KERNEL);
497 dev_err(dev, "failed to allocate musb hdrc config\n");
501 pdata.config = config;
502 pdata.platform_ops = &dsps_ops;
504 config->num_eps = get_int_prop(dn, "mentor,num-eps");
505 config->ram_bits = get_int_prop(dn, "mentor,ram-bits");
506 pdata.mode = get_musb_port_mode(dev);
507 /* DT keeps this entry in mA, musb expects it as per USB spec */
508 pdata.power = get_int_prop(dn, "mentor,power") / 2;
509 config->multipoint = of_property_read_bool(dn, "mentor,multipoint");
511 ret = platform_device_add_data(musb, &pdata, sizeof(pdata));
513 dev_err(dev, "failed to add platform_data\n");
517 ret = platform_device_add(musb);
519 dev_err(dev, "failed to register musb device\n");
525 platform_device_put(musb);
529 static int dsps_probe(struct platform_device *pdev)
531 const struct of_device_id *match;
532 const struct dsps_musb_wrapper *wrp;
533 struct dsps_glue *glue;
536 match = of_match_node(musb_dsps_of_match, pdev->dev.of_node);
538 dev_err(&pdev->dev, "fail to get matching of_match struct\n");
544 glue = kzalloc(sizeof(*glue), GFP_KERNEL);
546 dev_err(&pdev->dev, "unable to allocate glue memory\n");
550 glue->dev = &pdev->dev;
553 platform_set_drvdata(pdev, glue);
554 pm_runtime_enable(&pdev->dev);
556 ret = pm_runtime_get_sync(&pdev->dev);
558 dev_err(&pdev->dev, "pm_runtime_get_sync FAILED");
562 ret = dsps_create_musb_pdev(glue, pdev);
569 pm_runtime_put(&pdev->dev);
571 pm_runtime_disable(&pdev->dev);
576 static int dsps_remove(struct platform_device *pdev)
578 struct dsps_glue *glue = platform_get_drvdata(pdev);
580 platform_device_unregister(glue->musb);
582 /* disable usbss clocks */
583 pm_runtime_put(&pdev->dev);
584 pm_runtime_disable(&pdev->dev);
589 static const struct dsps_musb_wrapper am33xx_driver_data = {
594 .epintr_clear = 0x40,
595 .epintr_status = 0x30,
596 .coreintr_set = 0x3c,
597 .coreintr_clear = 0x44,
598 .coreintr_status = 0x34,
606 .usb_bitmap = (0x1ff << 0),
610 .txep_bitmap = (0xffff << 0),
613 .rxep_bitmap = (0xfffe << 16),
617 static const struct of_device_id musb_dsps_of_match[] = {
618 { .compatible = "ti,musb-am33xx",
619 .data = (void *) &am33xx_driver_data, },
622 MODULE_DEVICE_TABLE(of, musb_dsps_of_match);
624 static struct platform_driver dsps_usbss_driver = {
626 .remove = dsps_remove,
629 .of_match_table = of_match_ptr(musb_dsps_of_match),
633 MODULE_DESCRIPTION("TI DSPS MUSB Glue Layer");
634 MODULE_AUTHOR("Ravi B <ravibabu@ti.com>");
635 MODULE_AUTHOR("Ajay Kumar Gupta <ajay.gupta@ti.com>");
636 MODULE_LICENSE("GPL v2");
638 module_platform_driver(dsps_usbss_driver);