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1 /*
2  * Freescale i.MX23/i.MX28 LCDIF driver
3  *
4  * Copyright (C) 2011-2013 Marek Vasut <marex@denx.de>
5  *
6  * SPDX-License-Identifier:     GPL-2.0+
7  */
8 #include <common.h>
9 #include <malloc.h>
10 #include <video_fb.h>
11
12 #include <asm/arch/imx-regs.h>
13 #include <asm/arch/clock.h>
14 #include <asm/arch/sys_proto.h>
15 #include <asm/errno.h>
16 #include <asm/io.h>
17
18 #include "videomodes.h"
19
20 #define PS2KHZ(ps)      (1000000000UL / (ps))
21
22 static GraphicDevice panel;
23
24 /*
25  * DENX M28EVK:
26  * setenv videomode
27  * video=ctfb:x:800,y:480,depth:18,mode:0,pclk:30066,
28  *       le:0,ri:256,up:0,lo:45,hs:1,vs:1,sync:100663296,vmode:0
29  *
30  * Freescale mx23evk/mx28evk with a Seiko 4.3'' WVGA panel:
31  * setenv videomode
32  * video=ctfb:x:800,y:480,depth:24,mode:0,pclk:29851,
33  *       le:89,ri:164,up:23,lo:10,hs:10,vs:10,sync:0,vmode:0
34  */
35
36 static void mxs_lcd_init(GraphicDevice *panel,
37                         struct ctfb_res_modes *mode, int bpp)
38 {
39         struct mxs_lcdif_regs *regs = (struct mxs_lcdif_regs *)MXS_LCDIF_BASE;
40         uint32_t word_len = 0, bus_width = 0;
41         uint8_t valid_data = 0;
42
43         /* Kick in the LCDIF clock */
44         mxs_set_lcdclk(PS2KHZ(mode->pixclock));
45
46         /* Restart the LCDIF block */
47         mxs_reset_block(&regs->hw_lcdif_ctrl_reg);
48
49         switch (bpp) {
50         case 24:
51                 word_len = LCDIF_CTRL_WORD_LENGTH_24BIT;
52                 bus_width = LCDIF_CTRL_LCD_DATABUS_WIDTH_24BIT;
53                 valid_data = 0x7;
54                 break;
55         case 18:
56                 word_len = LCDIF_CTRL_WORD_LENGTH_24BIT;
57                 bus_width = LCDIF_CTRL_LCD_DATABUS_WIDTH_18BIT;
58                 valid_data = 0x7;
59                 break;
60         case 16:
61                 word_len = LCDIF_CTRL_WORD_LENGTH_16BIT;
62                 bus_width = LCDIF_CTRL_LCD_DATABUS_WIDTH_16BIT;
63                 valid_data = 0xf;
64                 break;
65         case 8:
66                 word_len = LCDIF_CTRL_WORD_LENGTH_8BIT;
67                 bus_width = LCDIF_CTRL_LCD_DATABUS_WIDTH_8BIT;
68                 valid_data = 0xf;
69                 break;
70         }
71
72         writel(bus_width | word_len | LCDIF_CTRL_DOTCLK_MODE |
73                 LCDIF_CTRL_BYPASS_COUNT | LCDIF_CTRL_LCDIF_MASTER,
74                 &regs->hw_lcdif_ctrl);
75
76         writel(valid_data << LCDIF_CTRL1_BYTE_PACKING_FORMAT_OFFSET,
77                 &regs->hw_lcdif_ctrl1);
78         writel((mode->yres << LCDIF_TRANSFER_COUNT_V_COUNT_OFFSET) | mode->xres,
79                 &regs->hw_lcdif_transfer_count);
80
81         writel(LCDIF_VDCTRL0_ENABLE_PRESENT | LCDIF_VDCTRL0_ENABLE_POL |
82                 LCDIF_VDCTRL0_VSYNC_PERIOD_UNIT |
83                 LCDIF_VDCTRL0_VSYNC_PULSE_WIDTH_UNIT |
84                 mode->vsync_len, &regs->hw_lcdif_vdctrl0);
85         writel(mode->upper_margin + mode->lower_margin +
86                 mode->vsync_len + mode->yres,
87                 &regs->hw_lcdif_vdctrl1);
88         writel((mode->hsync_len << LCDIF_VDCTRL2_HSYNC_PULSE_WIDTH_OFFSET) |
89                 (mode->left_margin + mode->right_margin +
90                 mode->hsync_len + mode->xres),
91                 &regs->hw_lcdif_vdctrl2);
92         writel(((mode->left_margin + mode->hsync_len) <<
93                 LCDIF_VDCTRL3_HORIZONTAL_WAIT_CNT_OFFSET) |
94                 (mode->upper_margin + mode->vsync_len),
95                 &regs->hw_lcdif_vdctrl3);
96         writel((0 << LCDIF_VDCTRL4_DOTCLK_DLY_SEL_OFFSET) | mode->xres,
97                 &regs->hw_lcdif_vdctrl4);
98
99         writel(panel->frameAdrs, &regs->hw_lcdif_cur_buf);
100         writel(panel->frameAdrs, &regs->hw_lcdif_next_buf);
101
102         /* Flush FIFO first */
103         writel(LCDIF_CTRL1_FIFO_CLEAR, &regs->hw_lcdif_ctrl1_set);
104
105         /* Sync signals ON */
106         setbits_le32(&regs->hw_lcdif_vdctrl4, LCDIF_VDCTRL4_SYNC_SIGNALS_ON);
107
108         /* FIFO cleared */
109         writel(LCDIF_CTRL1_FIFO_CLEAR, &regs->hw_lcdif_ctrl1_clr);
110
111         /* RUN! */
112         writel(LCDIF_CTRL_RUN, &regs->hw_lcdif_ctrl_set);
113 }
114
115 void *video_hw_init(void)
116 {
117         int bpp = -1;
118         char *penv;
119         void *fb;
120         struct ctfb_res_modes mode;
121
122         puts("Video: ");
123
124         /* Suck display configuration from "videomode" variable */
125         penv = getenv("videomode");
126         if (!penv) {
127                 puts("MXSFB: 'videomode' variable not set!\n");
128                 return NULL;
129         }
130
131         bpp = video_get_params(&mode, penv);
132
133         /* fill in Graphic device struct */
134         sprintf(panel.modeIdent, "%dx%dx%d",
135                         mode.xres, mode.yres, bpp);
136
137         panel.winSizeX = mode.xres;
138         panel.winSizeY = mode.yres;
139         panel.plnSizeX = mode.xres;
140         panel.plnSizeY = mode.yres;
141
142         switch (bpp) {
143         case 24:
144         case 18:
145                 panel.gdfBytesPP = 4;
146                 panel.gdfIndex = GDF_32BIT_X888RGB;
147                 break;
148         case 16:
149                 panel.gdfBytesPP = 2;
150                 panel.gdfIndex = GDF_16BIT_565RGB;
151                 break;
152         case 8:
153                 panel.gdfBytesPP = 1;
154                 panel.gdfIndex = GDF__8BIT_INDEX;
155                 break;
156         default:
157                 printf("MXSFB: Invalid BPP specified! (bpp = %i)\n", bpp);
158                 return NULL;
159         }
160
161         panel.memSize = mode.xres * mode.yres * panel.gdfBytesPP;
162
163         /* Allocate framebuffer */
164         fb = malloc(panel.memSize);
165         if (!fb) {
166                 printf("MXSFB: Error allocating framebuffer!\n");
167                 return NULL;
168         }
169
170         /* Wipe framebuffer */
171         memset(fb, 0, panel.memSize);
172
173         panel.frameAdrs = (u32)fb;
174
175         printf("%s\n", panel.modeIdent);
176
177         /* Start framebuffer */
178         mxs_lcd_init(&panel, &mode, bpp);
179
180         return (void *)&panel;
181 }