drivers/video/mxsfb.c

   1 /*
   2  * Freescale i.MX23/i.MX28 LCDIF driver
   3  *
   4  * Copyright (C) 2011-2013 Marek Vasut <marex@denx.de>
   5  *
   6  * SPDX-License-Identifier:     GPL-2.0+
   7  */
   8 #include <common.h>
   9 #include <malloc.h>
  10 #include <video_fb.h>
  11
  12 #include <asm/arch/imx-regs.h>
  13 #include <asm/arch/clock.h>
  14 #include <asm/arch/sys_proto.h>
  15 #include <asm/errno.h>
  16 #include <asm/io.h>
  17
  18 #include "videomodes.h"
  19
  20 #define PS2KHZ(ps)      (1000000000UL / (ps))
  21
  22 static GraphicDevice panel;
  23
  24 /**
  25  * mxsfb_system_setup() - Fine-tune LCDIF configuration
  26  *
  27  * This function is used to adjust the LCDIF configuration. This is usually
  28  * needed when driving the controller in System-Mode to operate an 8080 or
  29  * 6800 connected SmartLCD.
  30  */
  31 __weak void mxsfb_system_setup(void)
  32 {
  33 }
  34
  35 /*
  36  * DENX M28EVK:
  37  * setenv videomode
  38  * video=ctfb:x:800,y:480,depth:18,mode:0,pclk:30066,
  39  *       le:0,ri:256,up:0,lo:45,hs:1,vs:1,sync:100663296,vmode:0
  40  *
  41  * Freescale mx23evk/mx28evk with a Seiko 4.3'' WVGA panel:
  42  * setenv videomode
  43  * video=ctfb:x:800,y:480,depth:24,mode:0,pclk:29851,
  44  *       le:89,ri:164,up:23,lo:10,hs:10,vs:10,sync:0,vmode:0
  45  */
  46
  47 static void mxs_lcd_init(GraphicDevice *panel,
  48                         struct ctfb_res_modes *mode, int bpp)
  49 {
  50         struct mxs_lcdif_regs *regs = (struct mxs_lcdif_regs *)MXS_LCDIF_BASE;
  51         uint32_t word_len = 0, bus_width = 0;
  52         uint8_t valid_data = 0;
  53
  54         /* Kick in the LCDIF clock */
  55         mxs_set_lcdclk(PS2KHZ(mode->pixclock));
  56
  57         /* Restart the LCDIF block */
  58         mxs_reset_block(&regs->hw_lcdif_ctrl_reg);
  59
  60         switch (bpp) {
  61         case 24:
  62                 word_len = LCDIF_CTRL_WORD_LENGTH_24BIT;
  63                 bus_width = LCDIF_CTRL_LCD_DATABUS_WIDTH_24BIT;
  64                 valid_data = 0x7;
  65                 break;
  66         case 18:
  67                 word_len = LCDIF_CTRL_WORD_LENGTH_24BIT;
  68                 bus_width = LCDIF_CTRL_LCD_DATABUS_WIDTH_18BIT;
  69                 valid_data = 0x7;
  70                 break;
  71         case 16:
  72                 word_len = LCDIF_CTRL_WORD_LENGTH_16BIT;
  73                 bus_width = LCDIF_CTRL_LCD_DATABUS_WIDTH_16BIT;
  74                 valid_data = 0xf;
  75                 break;
  76         case 8:
  77                 word_len = LCDIF_CTRL_WORD_LENGTH_8BIT;
  78                 bus_width = LCDIF_CTRL_LCD_DATABUS_WIDTH_8BIT;
  79                 valid_data = 0xf;
  80                 break;
  81         }
  82
  83         writel(bus_width | word_len | LCDIF_CTRL_DOTCLK_MODE |
  84                 LCDIF_CTRL_BYPASS_COUNT | LCDIF_CTRL_LCDIF_MASTER,
  85                 &regs->hw_lcdif_ctrl);
  86
  87         writel(valid_data << LCDIF_CTRL1_BYTE_PACKING_FORMAT_OFFSET,
  88                 &regs->hw_lcdif_ctrl1);
  89
  90         mxsfb_system_setup();
  91
  92         writel((mode->yres << LCDIF_TRANSFER_COUNT_V_COUNT_OFFSET) | mode->xres,
  93                 &regs->hw_lcdif_transfer_count);
  94
  95         writel(LCDIF_VDCTRL0_ENABLE_PRESENT | LCDIF_VDCTRL0_ENABLE_POL |
  96                 LCDIF_VDCTRL0_VSYNC_PERIOD_UNIT |
  97                 LCDIF_VDCTRL0_VSYNC_PULSE_WIDTH_UNIT |
  98                 mode->vsync_len, &regs->hw_lcdif_vdctrl0);
  99         writel(mode->upper_margin + mode->lower_margin +
 100                 mode->vsync_len + mode->yres,
 101                 &regs->hw_lcdif_vdctrl1);
 102         writel((mode->hsync_len << LCDIF_VDCTRL2_HSYNC_PULSE_WIDTH_OFFSET) |
 103                 (mode->left_margin + mode->right_margin +
 104                 mode->hsync_len + mode->xres),
 105                 &regs->hw_lcdif_vdctrl2);
 106         writel(((mode->left_margin + mode->hsync_len) <<
 107                 LCDIF_VDCTRL3_HORIZONTAL_WAIT_CNT_OFFSET) |
 108                 (mode->upper_margin + mode->vsync_len),
 109                 &regs->hw_lcdif_vdctrl3);
 110         writel((0 << LCDIF_VDCTRL4_DOTCLK_DLY_SEL_OFFSET) | mode->xres,
 111                 &regs->hw_lcdif_vdctrl4);
 112
 113         writel(panel->frameAdrs, &regs->hw_lcdif_cur_buf);
 114         writel(panel->frameAdrs, &regs->hw_lcdif_next_buf);
 115
 116         /* Flush FIFO first */
 117         writel(LCDIF_CTRL1_FIFO_CLEAR, &regs->hw_lcdif_ctrl1_set);
 118
 119 #ifndef CONFIG_VIDEO_MXS_MODE_SYSTEM
 120         /* Sync signals ON */
 121         setbits_le32(&regs->hw_lcdif_vdctrl4, LCDIF_VDCTRL4_SYNC_SIGNALS_ON);
 122 #endif
 123
 124         /* FIFO cleared */
 125         writel(LCDIF_CTRL1_FIFO_CLEAR, &regs->hw_lcdif_ctrl1_clr);
 126
 127         /* RUN! */
 128         writel(LCDIF_CTRL_RUN, &regs->hw_lcdif_ctrl_set);
 129 }
 130
 131 void *video_hw_init(void)
 132 {
 133         int bpp = -1;
 134         char *penv;
 135         void *fb;
 136         struct ctfb_res_modes mode;
 137
 138         puts("Video: ");
 139
 140         /* Suck display configuration from "videomode" variable */
 141         penv = getenv("videomode");
 142         if (!penv) {
 143                 puts("MXSFB: 'videomode' variable not set!\n");
 144                 return NULL;
 145         }
 146
 147         bpp = video_get_params(&mode, penv);
 148
 149         /* fill in Graphic device struct */
 150         sprintf(panel.modeIdent, "%dx%dx%d",
 151                         mode.xres, mode.yres, bpp);
 152
 153         panel.winSizeX = mode.xres;
 154         panel.winSizeY = mode.yres;
 155         panel.plnSizeX = mode.xres;
 156         panel.plnSizeY = mode.yres;
 157
 158         switch (bpp) {
 159         case 24:
 160         case 18:
 161                 panel.gdfBytesPP = 4;
 162                 panel.gdfIndex = GDF_32BIT_X888RGB;
 163                 break;
 164         case 16:
 165                 panel.gdfBytesPP = 2;
 166                 panel.gdfIndex = GDF_16BIT_565RGB;
 167                 break;
 168         case 8:
 169                 panel.gdfBytesPP = 1;
 170                 panel.gdfIndex = GDF__8BIT_INDEX;
 171                 break;
 172         default:
 173                 printf("MXSFB: Invalid BPP specified! (bpp = %i)\n", bpp);
 174                 return NULL;
 175         }
 176
 177         panel.memSize = mode.xres * mode.yres * panel.gdfBytesPP;
 178
 179         /* Allocate framebuffer */
 180         fb = memalign(ARCH_DMA_MINALIGN,
 181                       roundup(panel.memSize, ARCH_DMA_MINALIGN));
 182         if (!fb) {
 183                 printf("MXSFB: Error allocating framebuffer!\n");
 184                 return NULL;
 185         }
 186
 187         /* Wipe framebuffer */
 188         memset(fb, 0, panel.memSize);
 189
 190         panel.frameAdrs = (u32)fb;
 191
 192         printf("%s\n", panel.modeIdent);
 193
 194         /* Start framebuffer */
 195         mxs_lcd_init(&panel, &mode, bpp);
 196
 197         return (void *)&panel;
 198 }