3 #include <linux/module.h>
4 #include <linux/delay.h>
5 #include <linux/slab.h>
6 #include <linux/gpio.h>
7 #include <linux/spi/spi.h>
10 #include <video/omapdss.h>
11 #include <video/omap-panel-data.h>
13 #define BLIZZARD_REV_CODE 0x00
14 #define BLIZZARD_CONFIG 0x02
15 #define BLIZZARD_PLL_DIV 0x04
16 #define BLIZZARD_PLL_LOCK_RANGE 0x06
17 #define BLIZZARD_PLL_CLOCK_SYNTH_0 0x08
18 #define BLIZZARD_PLL_CLOCK_SYNTH_1 0x0a
19 #define BLIZZARD_PLL_MODE 0x0c
20 #define BLIZZARD_CLK_SRC 0x0e
21 #define BLIZZARD_MEM_BANK0_ACTIVATE 0x10
22 #define BLIZZARD_MEM_BANK0_STATUS 0x14
23 #define BLIZZARD_PANEL_CONFIGURATION 0x28
24 #define BLIZZARD_HDISP 0x2a
25 #define BLIZZARD_HNDP 0x2c
26 #define BLIZZARD_VDISP0 0x2e
27 #define BLIZZARD_VDISP1 0x30
28 #define BLIZZARD_VNDP 0x32
29 #define BLIZZARD_HSW 0x34
30 #define BLIZZARD_VSW 0x38
31 #define BLIZZARD_DISPLAY_MODE 0x68
32 #define BLIZZARD_INPUT_WIN_X_START_0 0x6c
33 #define BLIZZARD_DATA_SOURCE_SELECT 0x8e
34 #define BLIZZARD_DISP_MEM_DATA_PORT 0x90
35 #define BLIZZARD_DISP_MEM_READ_ADDR0 0x92
36 #define BLIZZARD_POWER_SAVE 0xE6
37 #define BLIZZARD_NDISP_CTRL_STATUS 0xE8
39 /* Data source select */
41 #define BLIZZARD_SRC_WRITE_LCD_BACKGROUND 0x00
42 #define BLIZZARD_SRC_WRITE_LCD_DESTRUCTIVE 0x01
43 #define BLIZZARD_SRC_WRITE_OVERLAY_ENABLE 0x04
44 #define BLIZZARD_SRC_DISABLE_OVERLAY 0x05
46 #define BLIZZARD_SRC_WRITE_LCD 0x00
47 #define BLIZZARD_SRC_BLT_LCD 0x06
49 #define BLIZZARD_COLOR_RGB565 0x01
50 #define BLIZZARD_COLOR_YUV420 0x09
52 #define BLIZZARD_VERSION_S1D13745 0x01 /* Hailstorm */
53 #define BLIZZARD_VERSION_S1D13744 0x02 /* Blizzard */
55 #define MIPID_CMD_READ_DISP_ID 0x04
56 #define MIPID_CMD_READ_RED 0x06
57 #define MIPID_CMD_READ_GREEN 0x07
58 #define MIPID_CMD_READ_BLUE 0x08
59 #define MIPID_CMD_READ_DISP_STATUS 0x09
60 #define MIPID_CMD_RDDSDR 0x0F
61 #define MIPID_CMD_SLEEP_IN 0x10
62 #define MIPID_CMD_SLEEP_OUT 0x11
63 #define MIPID_CMD_DISP_OFF 0x28
64 #define MIPID_CMD_DISP_ON 0x29
66 static struct panel_drv_data {
69 struct omap_dss_device *dssdev;
70 struct spi_device *spidev;
77 struct panel_n8x0_data *get_board_data(const struct omap_dss_device *dssdev)
83 struct panel_drv_data *get_drv_data(const struct omap_dss_device *dssdev)
89 static inline void blizzard_cmd(u8 cmd)
91 omap_rfbi_write_command(&cmd, 1);
94 static inline void blizzard_write(u8 cmd, const u8 *buf, int len)
96 omap_rfbi_write_command(&cmd, 1);
97 omap_rfbi_write_data(buf, len);
100 static inline void blizzard_read(u8 cmd, u8 *buf, int len)
102 omap_rfbi_write_command(&cmd, 1);
103 omap_rfbi_read_data(buf, len);
106 static u8 blizzard_read_reg(u8 cmd)
109 blizzard_read(cmd, &data, 1);
113 static void blizzard_ctrl_setup_update(struct omap_dss_device *dssdev,
114 int x, int y, int w, int h)
116 struct panel_drv_data *ddata = get_drv_data(dssdev);
138 tmp[13] = x_end >> 8;
140 tmp[15] = y_end >> 8;
142 tmp[16] = BLIZZARD_COLOR_RGB565;
144 if (ddata->blizzard_ver == BLIZZARD_VERSION_S1D13745)
145 tmp[17] = BLIZZARD_SRC_WRITE_LCD_BACKGROUND;
147 tmp[17] = ddata->blizzard_ver == BLIZZARD_VERSION_S1D13744 ?
148 BLIZZARD_SRC_WRITE_LCD :
149 BLIZZARD_SRC_WRITE_LCD_DESTRUCTIVE;
151 omapdss_rfbi_set_pixel_size(dssdev, 16);
152 omapdss_rfbi_set_data_lines(dssdev, 8);
154 omap_rfbi_configure(dssdev);
156 blizzard_write(BLIZZARD_INPUT_WIN_X_START_0, tmp, 18);
158 omapdss_rfbi_set_pixel_size(dssdev, 16);
159 omapdss_rfbi_set_data_lines(dssdev, 16);
161 omap_rfbi_configure(dssdev);
164 static void mipid_transfer(struct spi_device *spi, int cmd, const u8 *wbuf,
165 int wlen, u8 *rbuf, int rlen)
167 struct spi_message m;
168 struct spi_transfer *x, xfer[4];
172 spi_message_init(&m);
174 memset(xfer, 0, sizeof(xfer));
179 x->bits_per_word = 9;
181 spi_message_add_tail(x, &m);
187 x->bits_per_word = 9;
188 spi_message_add_tail(x, &m);
195 spi_message_add_tail(x, &m);
198 /* Arrange for the extra clock before the first
201 x->bits_per_word = 9;
205 x->rx_buf = &rbuf[1];
207 spi_message_add_tail(x, &m);
211 r = spi_sync(spi, &m);
213 dev_dbg(&spi->dev, "spi_sync %d\n", r);
219 static inline void mipid_cmd(struct spi_device *spi, int cmd)
221 mipid_transfer(spi, cmd, NULL, 0, NULL, 0);
224 static inline void mipid_write(struct spi_device *spi,
225 int reg, const u8 *buf, int len)
227 mipid_transfer(spi, reg, buf, len, NULL, 0);
230 static inline void mipid_read(struct spi_device *spi,
231 int reg, u8 *buf, int len)
233 mipid_transfer(spi, reg, NULL, 0, buf, len);
236 static void set_data_lines(struct spi_device *spi, int data_lines)
240 switch (data_lines) {
252 mipid_write(spi, 0x3a, (u8 *)&par, 2);
255 static void send_init_string(struct spi_device *spi)
257 u16 initpar[] = { 0x0102, 0x0100, 0x0100 };
258 mipid_write(spi, 0xc2, (u8 *)initpar, sizeof(initpar));
261 static void send_display_on(struct spi_device *spi)
263 mipid_cmd(spi, MIPID_CMD_DISP_ON);
266 static void send_display_off(struct spi_device *spi)
268 mipid_cmd(spi, MIPID_CMD_DISP_OFF);
271 static void send_sleep_out(struct spi_device *spi)
273 mipid_cmd(spi, MIPID_CMD_SLEEP_OUT);
277 static void send_sleep_in(struct spi_device *spi)
279 mipid_cmd(spi, MIPID_CMD_SLEEP_IN);
283 static int n8x0_panel_power_on(struct omap_dss_device *dssdev)
286 struct panel_n8x0_data *bdata = get_board_data(dssdev);
287 struct panel_drv_data *ddata = get_drv_data(dssdev);
288 struct spi_device *spi = ddata->spidev;
291 const char *panel_name;
293 if (dssdev->state == OMAP_DSS_DISPLAY_ACTIVE)
296 gpio_direction_output(bdata->ctrl_pwrdown, 1);
298 omapdss_rfbi_set_size(dssdev, dssdev->panel.timings.x_res,
299 dssdev->panel.timings.y_res);
300 omapdss_rfbi_set_pixel_size(dssdev, dssdev->ctrl.pixel_size);
301 omapdss_rfbi_set_data_lines(dssdev, dssdev->phy.rfbi.data_lines);
302 omapdss_rfbi_set_interface_timings(dssdev, &dssdev->ctrl.rfbi_timings);
304 r = omapdss_rfbi_display_enable(dssdev);
308 rev = blizzard_read_reg(BLIZZARD_REV_CODE);
309 conf = blizzard_read_reg(BLIZZARD_CONFIG);
311 switch (rev & 0xfc) {
313 ddata->blizzard_ver = BLIZZARD_VERSION_S1D13744;
314 dev_info(dssdev->dev, "s1d13744 LCD controller rev %d "
315 "initialized (CNF pins %x)\n", rev & 0x03, conf & 0x07);
318 ddata->blizzard_ver = BLIZZARD_VERSION_S1D13745;
319 dev_info(dssdev->dev, "s1d13745 LCD controller rev %d "
320 "initialized (CNF pins %x)\n", rev & 0x03, conf & 0x07);
323 dev_err(dssdev->dev, "invalid s1d1374x revision %02x\n", rev);
330 gpio_direction_output(bdata->panel_reset, 1);
332 mipid_read(spi, MIPID_CMD_READ_DISP_ID, display_id, 3);
333 dev_dbg(&spi->dev, "MIPI display ID: %02x%02x%02x\n",
334 display_id[0], display_id[1], display_id[2]);
336 switch (display_id[0]) {
338 panel_name = "lph8923";
341 panel_name = "ls041y3";
344 dev_err(dssdev->dev, "invalid display ID 0x%x\n",
350 dev_info(dssdev->dev, "%s rev %02x LCD detected\n",
351 panel_name, display_id[1]);
354 send_init_string(spi);
355 set_data_lines(spi, 24);
356 send_display_on(spi);
362 * HACK: we should turn off the panel here, but there is some problem
363 * with the initialization sequence, and we fail to init the panel if we
366 /* gpio_direction_output(bdata->panel_reset, 0); */
368 omapdss_rfbi_display_disable(dssdev);
370 gpio_direction_output(bdata->ctrl_pwrdown, 0);
374 static void n8x0_panel_power_off(struct omap_dss_device *dssdev)
376 struct panel_n8x0_data *bdata = get_board_data(dssdev);
377 struct panel_drv_data *ddata = get_drv_data(dssdev);
378 struct spi_device *spi = ddata->spidev;
380 if (dssdev->state != OMAP_DSS_DISPLAY_ACTIVE)
383 send_display_off(spi);
387 * HACK: we should turn off the panel here, but there is some problem
388 * with the initialization sequence, and we fail to init the panel if we
391 /* gpio_direction_output(bdata->panel_reset, 0); */
392 gpio_direction_output(bdata->ctrl_pwrdown, 0);
393 omapdss_rfbi_display_disable(dssdev);
396 static const struct rfbi_timings n8x0_panel_timings = {
400 .we_off_time = 18000,
401 .we_cycle_time = 36000,
404 .re_off_time = 27000,
405 .re_cycle_time = 36000,
407 .access_time = 27000,
408 .cs_off_time = 36000,
413 static int n8x0_panel_probe(struct omap_dss_device *dssdev)
415 struct panel_n8x0_data *bdata = get_board_data(dssdev);
416 struct panel_drv_data *ddata;
419 dev_dbg(dssdev->dev, "probe\n");
424 s_drv_data.dssdev = dssdev;
428 mutex_init(&ddata->lock);
430 dssdev->panel.timings.x_res = 800;
431 dssdev->panel.timings.y_res = 480;
432 dssdev->ctrl.pixel_size = 16;
433 dssdev->ctrl.rfbi_timings = n8x0_panel_timings;
434 dssdev->caps = OMAP_DSS_DISPLAY_CAP_MANUAL_UPDATE;
436 if (gpio_is_valid(bdata->panel_reset)) {
437 r = devm_gpio_request_one(dssdev->dev, bdata->panel_reset,
438 GPIOF_OUT_INIT_LOW, "PANEL RESET");
443 if (gpio_is_valid(bdata->ctrl_pwrdown)) {
444 r = devm_gpio_request_one(dssdev->dev, bdata->ctrl_pwrdown,
445 GPIOF_OUT_INIT_LOW, "PANEL PWRDOWN");
453 static void n8x0_panel_remove(struct omap_dss_device *dssdev)
455 dev_dbg(dssdev->dev, "remove\n");
457 dev_set_drvdata(dssdev->dev, NULL);
460 static int n8x0_panel_enable(struct omap_dss_device *dssdev)
462 struct panel_drv_data *ddata = get_drv_data(dssdev);
465 dev_dbg(dssdev->dev, "enable\n");
467 mutex_lock(&ddata->lock);
471 r = n8x0_panel_power_on(dssdev);
476 mutex_unlock(&ddata->lock);
480 dssdev->state = OMAP_DSS_DISPLAY_ACTIVE;
482 mutex_unlock(&ddata->lock);
487 static void n8x0_panel_disable(struct omap_dss_device *dssdev)
489 struct panel_drv_data *ddata = get_drv_data(dssdev);
491 dev_dbg(dssdev->dev, "disable\n");
493 mutex_lock(&ddata->lock);
497 n8x0_panel_power_off(dssdev);
501 dssdev->state = OMAP_DSS_DISPLAY_DISABLED;
503 mutex_unlock(&ddata->lock);
506 static void n8x0_panel_get_resolution(struct omap_dss_device *dssdev,
507 u16 *xres, u16 *yres)
509 *xres = dssdev->panel.timings.x_res;
510 *yres = dssdev->panel.timings.y_res;
513 static void update_done(void *data)
518 static int n8x0_panel_update(struct omap_dss_device *dssdev,
519 u16 x, u16 y, u16 w, u16 h)
521 struct panel_drv_data *ddata = get_drv_data(dssdev);
524 dev_dbg(dssdev->dev, "update\n");
526 dw = dssdev->panel.timings.x_res;
527 dh = dssdev->panel.timings.y_res;
529 if (x != 0 || y != 0 || w != dw || h != dh) {
530 dev_err(dssdev->dev, "invalid update region %d, %d, %d, %d\n",
535 mutex_lock(&ddata->lock);
538 blizzard_ctrl_setup_update(dssdev, x, y, w, h);
540 omap_rfbi_update(dssdev, update_done, NULL);
542 mutex_unlock(&ddata->lock);
547 static int n8x0_panel_sync(struct omap_dss_device *dssdev)
549 struct panel_drv_data *ddata = get_drv_data(dssdev);
551 dev_dbg(dssdev->dev, "sync\n");
553 mutex_lock(&ddata->lock);
556 mutex_unlock(&ddata->lock);
561 static struct omap_dss_driver n8x0_panel_driver = {
562 .probe = n8x0_panel_probe,
563 .remove = n8x0_panel_remove,
565 .enable = n8x0_panel_enable,
566 .disable = n8x0_panel_disable,
568 .update = n8x0_panel_update,
569 .sync = n8x0_panel_sync,
571 .get_resolution = n8x0_panel_get_resolution,
572 .get_recommended_bpp = omapdss_default_get_recommended_bpp,
575 .name = "n8x0_panel",
576 .owner = THIS_MODULE,
582 static int mipid_spi_probe(struct spi_device *spi)
586 dev_dbg(&spi->dev, "mipid_spi_probe\n");
588 spi->mode = SPI_MODE_0;
590 s_drv_data.spidev = spi;
592 r = omap_dss_register_driver(&n8x0_panel_driver);
594 pr_err("n8x0_panel: dss driver registration failed\n");
599 static int mipid_spi_remove(struct spi_device *spi)
601 dev_dbg(&spi->dev, "mipid_spi_remove\n");
602 omap_dss_unregister_driver(&n8x0_panel_driver);
606 static struct spi_driver mipid_spi_driver = {
609 .owner = THIS_MODULE,
611 .probe = mipid_spi_probe,
612 .remove = mipid_spi_remove,
614 module_spi_driver(mipid_spi_driver);
616 MODULE_LICENSE("GPL");