2 * linux/drivers/video/omap2/dss/core.c
4 * Copyright (C) 2009 Nokia Corporation
5 * Author: Tomi Valkeinen <tomi.valkeinen@nokia.com>
7 * Some code and ideas taken from drivers/video/omap/ driver
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License version 2 as published by
12 * the Free Software Foundation.
14 * This program is distributed in the hope that it will be useful, but WITHOUT
15 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
16 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
19 * You should have received a copy of the GNU General Public License along with
20 * this program. If not, see <http://www.gnu.org/licenses/>.
23 #define DSS_SUBSYS_NAME "CORE"
25 #include <linux/kernel.h>
26 #include <linux/module.h>
27 #include <linux/clk.h>
28 #include <linux/err.h>
29 #include <linux/platform_device.h>
30 #include <linux/seq_file.h>
31 #include <linux/debugfs.h>
33 #include <linux/device.h>
34 #include <linux/regulator/consumer.h>
36 #include <plat/display.h>
37 #include <plat/clock.h>
40 #include "dss_features.h"
43 struct platform_device *pdev;
49 struct clk *dss_54m_fck;
50 struct clk *dss_96m_fck;
51 unsigned num_clks_enabled;
53 struct regulator *vdds_dsi_reg;
54 struct regulator *vdds_sdi_reg;
55 struct regulator *vdda_dac_reg;
58 static void dss_clk_enable_all_no_ctx(void);
59 static void dss_clk_disable_all_no_ctx(void);
60 static void dss_clk_enable_no_ctx(enum dss_clock clks);
61 static void dss_clk_disable_no_ctx(enum dss_clock clks);
63 static char *def_disp_name;
64 module_param_named(def_disp, def_disp_name, charp, 0);
65 MODULE_PARM_DESC(def_disp_name, "default display name");
68 unsigned int dss_debug;
69 module_param_named(debug, dss_debug, bool, 0644);
73 static int dss_get_ctx_id(void)
75 struct omap_dss_board_info *pdata = core.pdev->dev.platform_data;
78 if (!pdata->get_last_off_on_transaction_id)
80 r = pdata->get_last_off_on_transaction_id(&core.pdev->dev);
82 dev_err(&core.pdev->dev, "getting transaction ID failed, "
83 "will force context restore\n");
89 int dss_need_ctx_restore(void)
91 int id = dss_get_ctx_id();
93 if (id < 0 || id != core.ctx_id) {
94 DSSDBG("ctx id %d -> id %d\n",
103 static void save_all_ctx(void)
105 DSSDBG("save context\n");
107 dss_clk_enable_no_ctx(DSS_CLK_ICK | DSS_CLK_FCK1);
110 dispc_save_context();
111 #ifdef CONFIG_OMAP2_DSS_DSI
115 dss_clk_disable_no_ctx(DSS_CLK_ICK | DSS_CLK_FCK1);
118 static void restore_all_ctx(void)
120 DSSDBG("restore context\n");
122 dss_clk_enable_all_no_ctx();
124 dss_restore_context();
125 dispc_restore_context();
126 #ifdef CONFIG_OMAP2_DSS_DSI
127 dsi_restore_context();
130 dss_clk_disable_all_no_ctx();
133 #if defined(CONFIG_DEBUG_FS) && defined(CONFIG_OMAP2_DSS_DEBUG_SUPPORT)
135 static void core_dump_clocks(struct seq_file *s)
138 struct clk *clocks[5] = {
146 seq_printf(s, "- CORE -\n");
148 seq_printf(s, "internal clk count\t\t%u\n", core.num_clks_enabled);
150 for (i = 0; i < 5; i++) {
153 seq_printf(s, "%-15s\t%lu\t%d\n",
155 clk_get_rate(clocks[i]),
156 clocks[i]->usecount);
159 #endif /* defined(CONFIG_DEBUG_FS) && defined(CONFIG_OMAP2_DSS_DEBUG_SUPPORT) */
161 static int dss_get_clock(struct clk **clock, const char *clk_name)
165 clk = clk_get(&core.pdev->dev, clk_name);
168 DSSERR("can't get clock %s", clk_name);
174 DSSDBG("clk %s, rate %ld\n", clk_name, clk_get_rate(clk));
179 static int dss_get_clocks(void)
184 core.dss1_fck = NULL;
185 core.dss2_fck = NULL;
186 core.dss_54m_fck = NULL;
187 core.dss_96m_fck = NULL;
189 r = dss_get_clock(&core.dss_ick, "ick");
193 r = dss_get_clock(&core.dss1_fck, "dss1_fck");
197 r = dss_get_clock(&core.dss2_fck, "dss2_fck");
201 r = dss_get_clock(&core.dss_54m_fck, "tv_fck");
205 r = dss_get_clock(&core.dss_96m_fck, "video_fck");
213 clk_put(core.dss_ick);
215 clk_put(core.dss1_fck);
217 clk_put(core.dss2_fck);
218 if (core.dss_54m_fck)
219 clk_put(core.dss_54m_fck);
220 if (core.dss_96m_fck)
221 clk_put(core.dss_96m_fck);
226 static void dss_put_clocks(void)
228 if (core.dss_96m_fck)
229 clk_put(core.dss_96m_fck);
230 clk_put(core.dss_54m_fck);
231 clk_put(core.dss1_fck);
232 clk_put(core.dss2_fck);
233 clk_put(core.dss_ick);
236 unsigned long dss_clk_get_rate(enum dss_clock clk)
240 return clk_get_rate(core.dss_ick);
242 return clk_get_rate(core.dss1_fck);
244 return clk_get_rate(core.dss2_fck);
246 return clk_get_rate(core.dss_54m_fck);
248 return clk_get_rate(core.dss_96m_fck);
255 static unsigned count_clk_bits(enum dss_clock clks)
257 unsigned num_clks = 0;
259 if (clks & DSS_CLK_ICK)
261 if (clks & DSS_CLK_FCK1)
263 if (clks & DSS_CLK_FCK2)
265 if (clks & DSS_CLK_54M)
267 if (clks & DSS_CLK_96M)
273 static void dss_clk_enable_no_ctx(enum dss_clock clks)
275 unsigned num_clks = count_clk_bits(clks);
277 if (clks & DSS_CLK_ICK)
278 clk_enable(core.dss_ick);
279 if (clks & DSS_CLK_FCK1)
280 clk_enable(core.dss1_fck);
281 if (clks & DSS_CLK_FCK2)
282 clk_enable(core.dss2_fck);
283 if (clks & DSS_CLK_54M)
284 clk_enable(core.dss_54m_fck);
285 if (clks & DSS_CLK_96M)
286 clk_enable(core.dss_96m_fck);
288 core.num_clks_enabled += num_clks;
291 void dss_clk_enable(enum dss_clock clks)
293 bool check_ctx = core.num_clks_enabled == 0;
295 dss_clk_enable_no_ctx(clks);
297 if (check_ctx && cpu_is_omap34xx() && dss_need_ctx_restore())
301 static void dss_clk_disable_no_ctx(enum dss_clock clks)
303 unsigned num_clks = count_clk_bits(clks);
305 if (clks & DSS_CLK_ICK)
306 clk_disable(core.dss_ick);
307 if (clks & DSS_CLK_FCK1)
308 clk_disable(core.dss1_fck);
309 if (clks & DSS_CLK_FCK2)
310 clk_disable(core.dss2_fck);
311 if (clks & DSS_CLK_54M)
312 clk_disable(core.dss_54m_fck);
313 if (clks & DSS_CLK_96M)
314 clk_disable(core.dss_96m_fck);
316 core.num_clks_enabled -= num_clks;
319 void dss_clk_disable(enum dss_clock clks)
321 if (cpu_is_omap34xx()) {
322 unsigned num_clks = count_clk_bits(clks);
324 BUG_ON(core.num_clks_enabled < num_clks);
326 if (core.num_clks_enabled == num_clks)
330 dss_clk_disable_no_ctx(clks);
333 static void dss_clk_enable_all_no_ctx(void)
337 clks = DSS_CLK_ICK | DSS_CLK_FCK1 | DSS_CLK_FCK2 | DSS_CLK_54M;
338 if (cpu_is_omap34xx())
340 dss_clk_enable_no_ctx(clks);
343 static void dss_clk_disable_all_no_ctx(void)
347 clks = DSS_CLK_ICK | DSS_CLK_FCK1 | DSS_CLK_FCK2 | DSS_CLK_54M;
348 if (cpu_is_omap34xx())
350 dss_clk_disable_no_ctx(clks);
353 static void dss_clk_disable_all(void)
357 clks = DSS_CLK_ICK | DSS_CLK_FCK1 | DSS_CLK_FCK2 | DSS_CLK_54M;
358 if (cpu_is_omap34xx())
360 dss_clk_disable(clks);
365 struct regulator *dss_get_vdds_dsi(void)
367 struct regulator *reg;
369 if (core.vdds_dsi_reg != NULL)
370 return core.vdds_dsi_reg;
372 reg = regulator_get(&core.pdev->dev, "vdds_dsi");
374 core.vdds_dsi_reg = reg;
379 struct regulator *dss_get_vdds_sdi(void)
381 struct regulator *reg;
383 if (core.vdds_sdi_reg != NULL)
384 return core.vdds_sdi_reg;
386 reg = regulator_get(&core.pdev->dev, "vdds_sdi");
388 core.vdds_sdi_reg = reg;
393 struct regulator *dss_get_vdda_dac(void)
395 struct regulator *reg;
397 if (core.vdda_dac_reg != NULL)
398 return core.vdda_dac_reg;
400 reg = regulator_get(&core.pdev->dev, "vdda_dac");
402 core.vdda_dac_reg = reg;
408 #if defined(CONFIG_DEBUG_FS) && defined(CONFIG_OMAP2_DSS_DEBUG_SUPPORT)
409 static void dss_debug_dump_clocks(struct seq_file *s)
413 dispc_dump_clocks(s);
414 #ifdef CONFIG_OMAP2_DSS_DSI
419 static int dss_debug_show(struct seq_file *s, void *unused)
421 void (*func)(struct seq_file *) = s->private;
426 static int dss_debug_open(struct inode *inode, struct file *file)
428 return single_open(file, dss_debug_show, inode->i_private);
431 static const struct file_operations dss_debug_fops = {
432 .open = dss_debug_open,
435 .release = single_release,
438 static struct dentry *dss_debugfs_dir;
440 static int dss_initialize_debugfs(void)
442 dss_debugfs_dir = debugfs_create_dir("omapdss", NULL);
443 if (IS_ERR(dss_debugfs_dir)) {
444 int err = PTR_ERR(dss_debugfs_dir);
445 dss_debugfs_dir = NULL;
449 debugfs_create_file("clk", S_IRUGO, dss_debugfs_dir,
450 &dss_debug_dump_clocks, &dss_debug_fops);
452 #ifdef CONFIG_OMAP2_DSS_COLLECT_IRQ_STATS
453 debugfs_create_file("dispc_irq", S_IRUGO, dss_debugfs_dir,
454 &dispc_dump_irqs, &dss_debug_fops);
457 #if defined(CONFIG_OMAP2_DSS_DSI) && defined(CONFIG_OMAP2_DSS_COLLECT_IRQ_STATS)
458 debugfs_create_file("dsi_irq", S_IRUGO, dss_debugfs_dir,
459 &dsi_dump_irqs, &dss_debug_fops);
462 debugfs_create_file("dss", S_IRUGO, dss_debugfs_dir,
463 &dss_dump_regs, &dss_debug_fops);
464 debugfs_create_file("dispc", S_IRUGO, dss_debugfs_dir,
465 &dispc_dump_regs, &dss_debug_fops);
466 #ifdef CONFIG_OMAP2_DSS_RFBI
467 debugfs_create_file("rfbi", S_IRUGO, dss_debugfs_dir,
468 &rfbi_dump_regs, &dss_debug_fops);
470 #ifdef CONFIG_OMAP2_DSS_DSI
471 debugfs_create_file("dsi", S_IRUGO, dss_debugfs_dir,
472 &dsi_dump_regs, &dss_debug_fops);
474 #ifdef CONFIG_OMAP2_DSS_VENC
475 debugfs_create_file("venc", S_IRUGO, dss_debugfs_dir,
476 &venc_dump_regs, &dss_debug_fops);
481 static void dss_uninitialize_debugfs(void)
484 debugfs_remove_recursive(dss_debugfs_dir);
486 #else /* CONFIG_DEBUG_FS && CONFIG_OMAP2_DSS_DEBUG_SUPPORT */
487 static inline int dss_initialize_debugfs(void)
491 static inline void dss_uninitialize_debugfs(void)
494 #endif /* CONFIG_DEBUG_FS && CONFIG_OMAP2_DSS_DEBUG_SUPPORT */
496 /* PLATFORM DEVICE */
497 static int omap_dss_probe(struct platform_device *pdev)
499 struct omap_dss_board_info *pdata = pdev->dev.platform_data;
508 dss_init_overlay_managers(pdev);
509 dss_init_overlays(pdev);
511 r = dss_get_clocks();
515 dss_clk_enable_all_no_ctx();
517 core.ctx_id = dss_get_ctx_id();
518 DSSDBG("initial ctx id %u\n", core.ctx_id);
520 #ifdef CONFIG_FB_OMAP_BOOTLOADER_INIT
522 if (omap_readl(0x48050440) & 1) /* LCD enabled? */
526 r = dss_init(skip_init);
528 DSSERR("Failed to initialize DSS\n");
534 DSSERR("Failed to initialize rfbi\n");
540 DSSERR("Failed to initialize dpi\n");
546 DSSERR("Failed to initialize dispc\n");
552 DSSERR("Failed to initialize venc\n");
556 if (cpu_is_omap34xx()) {
557 r = sdi_init(skip_init);
559 DSSERR("Failed to initialize SDI\n");
565 DSSERR("Failed to initialize DSI\n");
570 r = dss_initialize_debugfs();
574 for (i = 0; i < pdata->num_devices; ++i) {
575 struct omap_dss_device *dssdev = pdata->devices[i];
577 r = omap_dss_register_device(dssdev);
579 DSSERR("device %d %s register failed %d\n", i,
580 dssdev->name ?: "unnamed", r);
583 omap_dss_unregister_device(pdata->devices[i]);
588 if (def_disp_name && strcmp(def_disp_name, dssdev->name) == 0)
589 pdata->default_device = dssdev;
592 dss_clk_disable_all();
597 dss_uninitialize_debugfs();
599 if (cpu_is_omap34xx())
602 if (cpu_is_omap34xx())
615 dss_clk_disable_all_no_ctx();
622 static int omap_dss_remove(struct platform_device *pdev)
624 struct omap_dss_board_info *pdata = pdev->dev.platform_data;
627 dss_uninitialize_debugfs();
633 if (cpu_is_omap34xx()) {
641 * As part of hwmod changes, DSS is not the only controller of dss
642 * clocks; hwmod framework itself will also enable clocks during hwmod
643 * init for dss, and autoidle is set in h/w for DSS. Hence, there's no
644 * need to disable clocks if their usecounts > 1.
646 WARN_ON(core.num_clks_enabled > 0);
650 dss_uninit_overlays(pdev);
651 dss_uninit_overlay_managers(pdev);
653 for (i = 0; i < pdata->num_devices; ++i)
654 omap_dss_unregister_device(pdata->devices[i]);
659 static void omap_dss_shutdown(struct platform_device *pdev)
661 DSSDBG("shutdown\n");
662 dss_disable_all_devices();
665 static int omap_dss_suspend(struct platform_device *pdev, pm_message_t state)
667 DSSDBG("suspend %d\n", state.event);
669 return dss_suspend_all_devices();
672 static int omap_dss_resume(struct platform_device *pdev)
676 return dss_resume_all_devices();
679 static struct platform_driver omap_dss_driver = {
680 .probe = omap_dss_probe,
681 .remove = omap_dss_remove,
682 .shutdown = omap_dss_shutdown,
683 .suspend = omap_dss_suspend,
684 .resume = omap_dss_resume,
687 .owner = THIS_MODULE,
692 static int dss_bus_match(struct device *dev, struct device_driver *driver)
694 struct omap_dss_device *dssdev = to_dss_device(dev);
696 DSSDBG("bus_match. dev %s/%s, drv %s\n",
697 dev_name(dev), dssdev->driver_name, driver->name);
699 return strcmp(dssdev->driver_name, driver->name) == 0;
702 static ssize_t device_name_show(struct device *dev,
703 struct device_attribute *attr, char *buf)
705 struct omap_dss_device *dssdev = to_dss_device(dev);
706 return snprintf(buf, PAGE_SIZE, "%s\n",
711 static struct device_attribute default_dev_attrs[] = {
712 __ATTR(name, S_IRUGO, device_name_show, NULL),
716 static ssize_t driver_name_show(struct device_driver *drv, char *buf)
718 struct omap_dss_driver *dssdrv = to_dss_driver(drv);
719 return snprintf(buf, PAGE_SIZE, "%s\n",
720 dssdrv->driver.name ?
721 dssdrv->driver.name : "");
723 static struct driver_attribute default_drv_attrs[] = {
724 __ATTR(name, S_IRUGO, driver_name_show, NULL),
728 static struct bus_type dss_bus_type = {
730 .match = dss_bus_match,
731 .dev_attrs = default_dev_attrs,
732 .drv_attrs = default_drv_attrs,
735 static void dss_bus_release(struct device *dev)
737 DSSDBG("bus_release\n");
740 static struct device dss_bus = {
741 .release = dss_bus_release,
744 struct bus_type *dss_get_bus(void)
746 return &dss_bus_type;
750 static int dss_driver_probe(struct device *dev)
753 struct omap_dss_driver *dssdrv = to_dss_driver(dev->driver);
754 struct omap_dss_device *dssdev = to_dss_device(dev);
755 struct omap_dss_board_info *pdata = core.pdev->dev.platform_data;
758 DSSDBG("driver_probe: dev %s/%s, drv %s\n",
759 dev_name(dev), dssdev->driver_name,
760 dssdrv->driver.name);
762 dss_init_device(core.pdev, dssdev);
764 force = pdata->default_device == dssdev;
765 dss_recheck_connections(dssdev, force);
767 r = dssdrv->probe(dssdev);
770 DSSERR("driver probe failed: %d\n", r);
771 dss_uninit_device(core.pdev, dssdev);
775 DSSDBG("probe done for device %s\n", dev_name(dev));
777 dssdev->driver = dssdrv;
782 static int dss_driver_remove(struct device *dev)
784 struct omap_dss_driver *dssdrv = to_dss_driver(dev->driver);
785 struct omap_dss_device *dssdev = to_dss_device(dev);
787 DSSDBG("driver_remove: dev %s/%s\n", dev_name(dev),
788 dssdev->driver_name);
790 dssdrv->remove(dssdev);
792 dss_uninit_device(core.pdev, dssdev);
794 dssdev->driver = NULL;
799 int omap_dss_register_driver(struct omap_dss_driver *dssdriver)
801 dssdriver->driver.bus = &dss_bus_type;
802 dssdriver->driver.probe = dss_driver_probe;
803 dssdriver->driver.remove = dss_driver_remove;
805 if (dssdriver->get_resolution == NULL)
806 dssdriver->get_resolution = omapdss_default_get_resolution;
807 if (dssdriver->get_recommended_bpp == NULL)
808 dssdriver->get_recommended_bpp =
809 omapdss_default_get_recommended_bpp;
811 return driver_register(&dssdriver->driver);
813 EXPORT_SYMBOL(omap_dss_register_driver);
815 void omap_dss_unregister_driver(struct omap_dss_driver *dssdriver)
817 driver_unregister(&dssdriver->driver);
819 EXPORT_SYMBOL(omap_dss_unregister_driver);
822 static void reset_device(struct device *dev, int check)
824 u8 *dev_p = (u8 *)dev;
825 u8 *dev_end = dev_p + sizeof(*dev);
828 saved_pdata = dev->platform_data;
831 * Check if there is any other setting than platform_data
832 * in struct device; warn that these will be reset by our
835 dev->platform_data = NULL;
836 while (dev_p < dev_end) {
838 WARN("%s: struct device fields will be "
846 memset(dev, 0, sizeof(*dev));
847 dev->platform_data = saved_pdata;
851 static void omap_dss_dev_release(struct device *dev)
853 reset_device(dev, 0);
856 int omap_dss_register_device(struct omap_dss_device *dssdev)
860 WARN_ON(!dssdev->driver_name);
862 reset_device(&dssdev->dev, 1);
863 dssdev->dev.bus = &dss_bus_type;
864 dssdev->dev.parent = &dss_bus;
865 dssdev->dev.release = omap_dss_dev_release;
866 dev_set_name(&dssdev->dev, "display%d", dev_num++);
867 return device_register(&dssdev->dev);
870 void omap_dss_unregister_device(struct omap_dss_device *dssdev)
872 device_unregister(&dssdev->dev);
876 static int omap_dss_bus_register(void)
880 r = bus_register(&dss_bus_type);
882 DSSERR("bus register failed\n");
886 dev_set_name(&dss_bus, "omapdss");
887 r = device_register(&dss_bus);
889 DSSERR("bus driver register failed\n");
890 bus_unregister(&dss_bus_type);
899 #ifdef CONFIG_OMAP2_DSS_MODULE
900 static void omap_dss_bus_unregister(void)
902 device_unregister(&dss_bus);
904 bus_unregister(&dss_bus_type);
907 static int __init omap_dss_init(void)
911 r = omap_dss_bus_register();
915 r = platform_driver_register(&omap_dss_driver);
917 omap_dss_bus_unregister();
924 static void __exit omap_dss_exit(void)
926 if (core.vdds_dsi_reg != NULL) {
927 regulator_put(core.vdds_dsi_reg);
928 core.vdds_dsi_reg = NULL;
931 if (core.vdds_sdi_reg != NULL) {
932 regulator_put(core.vdds_sdi_reg);
933 core.vdds_sdi_reg = NULL;
936 if (core.vdda_dac_reg != NULL) {
937 regulator_put(core.vdda_dac_reg);
938 core.vdda_dac_reg = NULL;
941 platform_driver_unregister(&omap_dss_driver);
943 omap_dss_bus_unregister();
946 module_init(omap_dss_init);
947 module_exit(omap_dss_exit);
949 static int __init omap_dss_init(void)
951 return omap_dss_bus_register();
954 static int __init omap_dss_init2(void)
956 return platform_driver_register(&omap_dss_driver);
959 core_initcall(omap_dss_init);
960 device_initcall(omap_dss_init2);
963 MODULE_AUTHOR("Tomi Valkeinen <tomi.valkeinen@nokia.com>");
964 MODULE_DESCRIPTION("OMAP2/3 Display Subsystem");
965 MODULE_LICENSE("GPL v2");