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Merge branch 'fbdev-next' of git://github.com/schandinat/linux-2.6
[mv-sheeva.git] / drivers / video / omap2 / dss / dpi.c
1 /*
2  * linux/drivers/video/omap2/dss/dpi.c
3  *
4  * Copyright (C) 2009 Nokia Corporation
5  * Author: Tomi Valkeinen <tomi.valkeinen@nokia.com>
6  *
7  * Some code and ideas taken from drivers/video/omap/ driver
8  * by Imre Deak.
9  *
10  * This program is free software; you can redistribute it and/or modify it
11  * under the terms of the GNU General Public License version 2 as published by
12  * the Free Software Foundation.
13  *
14  * This program is distributed in the hope that it will be useful, but WITHOUT
15  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
16  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
17  * more details.
18  *
19  * You should have received a copy of the GNU General Public License along with
20  * this program.  If not, see <http://www.gnu.org/licenses/>.
21  */
22
23 #define DSS_SUBSYS_NAME "DPI"
24
25 #include <linux/kernel.h>
26 #include <linux/delay.h>
27 #include <linux/err.h>
28 #include <linux/errno.h>
29 #include <linux/platform_device.h>
30 #include <linux/regulator/consumer.h>
31
32 #include <video/omapdss.h>
33 #include <plat/cpu.h>
34
35 #include "dss.h"
36
37 static struct {
38         struct regulator *vdds_dsi_reg;
39         struct platform_device *dsidev;
40 } dpi;
41
42 static struct platform_device *dpi_get_dsidev(enum omap_dss_clk_source clk)
43 {
44         int dsi_module;
45
46         dsi_module = clk == OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC ? 0 : 1;
47
48         return dsi_get_dsidev_from_id(dsi_module);
49 }
50
51 static bool dpi_use_dsi_pll(struct omap_dss_device *dssdev)
52 {
53         if (dssdev->clocks.dispc.dispc_fclk_src ==
54                         OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC ||
55                         dssdev->clocks.dispc.dispc_fclk_src ==
56                         OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DISPC ||
57                         dssdev->clocks.dispc.channel.lcd_clk_src ==
58                         OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC ||
59                         dssdev->clocks.dispc.channel.lcd_clk_src ==
60                         OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DISPC)
61                 return true;
62         else
63                 return false;
64 }
65
66 static int dpi_set_dsi_clk(struct omap_dss_device *dssdev, bool is_tft,
67                 unsigned long pck_req, unsigned long *fck, int *lck_div,
68                 int *pck_div)
69 {
70         struct dsi_clock_info dsi_cinfo;
71         struct dispc_clock_info dispc_cinfo;
72         int r;
73
74         r = dsi_pll_calc_clock_div_pck(dpi.dsidev, is_tft, pck_req,
75                         &dsi_cinfo, &dispc_cinfo);
76         if (r)
77                 return r;
78
79         r = dsi_pll_set_clock_div(dpi.dsidev, &dsi_cinfo);
80         if (r)
81                 return r;
82
83         dss_select_dispc_clk_source(dssdev->clocks.dispc.dispc_fclk_src);
84
85         r = dispc_mgr_set_clock_div(dssdev->manager->id, &dispc_cinfo);
86         if (r) {
87                 dss_select_dispc_clk_source(OMAP_DSS_CLK_SRC_FCK);
88                 return r;
89         }
90
91         *fck = dsi_cinfo.dsi_pll_hsdiv_dispc_clk;
92         *lck_div = dispc_cinfo.lck_div;
93         *pck_div = dispc_cinfo.pck_div;
94
95         return 0;
96 }
97
98 static int dpi_set_dispc_clk(struct omap_dss_device *dssdev, bool is_tft,
99                 unsigned long pck_req, unsigned long *fck, int *lck_div,
100                 int *pck_div)
101 {
102         struct dss_clock_info dss_cinfo;
103         struct dispc_clock_info dispc_cinfo;
104         int r;
105
106         r = dss_calc_clock_div(is_tft, pck_req, &dss_cinfo, &dispc_cinfo);
107         if (r)
108                 return r;
109
110         r = dss_set_clock_div(&dss_cinfo);
111         if (r)
112                 return r;
113
114         r = dispc_mgr_set_clock_div(dssdev->manager->id, &dispc_cinfo);
115         if (r)
116                 return r;
117
118         *fck = dss_cinfo.fck;
119         *lck_div = dispc_cinfo.lck_div;
120         *pck_div = dispc_cinfo.pck_div;
121
122         return 0;
123 }
124
125 static int dpi_set_mode(struct omap_dss_device *dssdev)
126 {
127         struct omap_video_timings *t = &dssdev->panel.timings;
128         int lck_div = 0, pck_div = 0;
129         unsigned long fck = 0;
130         unsigned long pck;
131         bool is_tft;
132         int r = 0;
133
134         dispc_mgr_set_pol_freq(dssdev->manager->id, dssdev->panel.config,
135                         dssdev->panel.acbi, dssdev->panel.acb);
136
137         is_tft = (dssdev->panel.config & OMAP_DSS_LCD_TFT) != 0;
138
139         if (dpi_use_dsi_pll(dssdev))
140                 r = dpi_set_dsi_clk(dssdev, is_tft, t->pixel_clock * 1000,
141                                 &fck, &lck_div, &pck_div);
142         else
143                 r = dpi_set_dispc_clk(dssdev, is_tft, t->pixel_clock * 1000,
144                                 &fck, &lck_div, &pck_div);
145         if (r)
146                 return r;
147
148         pck = fck / lck_div / pck_div / 1000;
149
150         if (pck != t->pixel_clock) {
151                 DSSWARN("Could not find exact pixel clock. "
152                                 "Requested %d kHz, got %lu kHz\n",
153                                 t->pixel_clock, pck);
154
155                 t->pixel_clock = pck;
156         }
157
158         dispc_mgr_set_lcd_timings(dssdev->manager->id, t);
159
160         return 0;
161 }
162
163 static void dpi_basic_init(struct omap_dss_device *dssdev)
164 {
165         bool is_tft;
166
167         is_tft = (dssdev->panel.config & OMAP_DSS_LCD_TFT) != 0;
168
169         dispc_mgr_set_io_pad_mode(DSS_IO_PAD_MODE_BYPASS);
170         dispc_mgr_enable_stallmode(dssdev->manager->id, false);
171
172         dispc_mgr_set_lcd_display_type(dssdev->manager->id, is_tft ?
173                         OMAP_DSS_LCD_DISPLAY_TFT : OMAP_DSS_LCD_DISPLAY_STN);
174         dispc_mgr_set_tft_data_lines(dssdev->manager->id,
175                         dssdev->phy.dpi.data_lines);
176 }
177
178 int omapdss_dpi_display_enable(struct omap_dss_device *dssdev)
179 {
180         int r;
181
182         if (dssdev->manager == NULL) {
183                 DSSERR("failed to enable display: no manager\n");
184                 return -ENODEV;
185         }
186
187         r = omap_dss_start_device(dssdev);
188         if (r) {
189                 DSSERR("failed to start device\n");
190                 goto err_start_dev;
191         }
192
193         if (cpu_is_omap34xx()) {
194                 r = regulator_enable(dpi.vdds_dsi_reg);
195                 if (r)
196                         goto err_reg_enable;
197         }
198
199         r = dss_runtime_get();
200         if (r)
201                 goto err_get_dss;
202
203         r = dispc_runtime_get();
204         if (r)
205                 goto err_get_dispc;
206
207         dpi_basic_init(dssdev);
208
209         if (dpi_use_dsi_pll(dssdev)) {
210                 r = dsi_runtime_get(dpi.dsidev);
211                 if (r)
212                         goto err_get_dsi;
213
214                 r = dsi_pll_init(dpi.dsidev, 0, 1);
215                 if (r)
216                         goto err_dsi_pll_init;
217         }
218
219         r = dpi_set_mode(dssdev);
220         if (r)
221                 goto err_set_mode;
222
223         mdelay(2);
224
225         dssdev->manager->enable(dssdev->manager);
226
227         return 0;
228
229 err_set_mode:
230         if (dpi_use_dsi_pll(dssdev))
231                 dsi_pll_uninit(dpi.dsidev, true);
232 err_dsi_pll_init:
233         if (dpi_use_dsi_pll(dssdev))
234                 dsi_runtime_put(dpi.dsidev);
235 err_get_dsi:
236         dispc_runtime_put();
237 err_get_dispc:
238         dss_runtime_put();
239 err_get_dss:
240         if (cpu_is_omap34xx())
241                 regulator_disable(dpi.vdds_dsi_reg);
242 err_reg_enable:
243         omap_dss_stop_device(dssdev);
244 err_start_dev:
245         return r;
246 }
247 EXPORT_SYMBOL(omapdss_dpi_display_enable);
248
249 void omapdss_dpi_display_disable(struct omap_dss_device *dssdev)
250 {
251         dssdev->manager->disable(dssdev->manager);
252
253         if (dpi_use_dsi_pll(dssdev)) {
254                 dss_select_dispc_clk_source(OMAP_DSS_CLK_SRC_FCK);
255                 dsi_pll_uninit(dpi.dsidev, true);
256                 dsi_runtime_put(dpi.dsidev);
257         }
258
259         dispc_runtime_put();
260         dss_runtime_put();
261
262         if (cpu_is_omap34xx())
263                 regulator_disable(dpi.vdds_dsi_reg);
264
265         omap_dss_stop_device(dssdev);
266 }
267 EXPORT_SYMBOL(omapdss_dpi_display_disable);
268
269 void dpi_set_timings(struct omap_dss_device *dssdev,
270                         struct omap_video_timings *timings)
271 {
272         int r;
273
274         DSSDBG("dpi_set_timings\n");
275         dssdev->panel.timings = *timings;
276         if (dssdev->state == OMAP_DSS_DISPLAY_ACTIVE) {
277                 r = dss_runtime_get();
278                 if (r)
279                         return;
280
281                 r = dispc_runtime_get();
282                 if (r) {
283                         dss_runtime_put();
284                         return;
285                 }
286
287                 dpi_set_mode(dssdev);
288                 dispc_mgr_go(dssdev->manager->id);
289
290                 dispc_runtime_put();
291                 dss_runtime_put();
292         }
293 }
294 EXPORT_SYMBOL(dpi_set_timings);
295
296 int dpi_check_timings(struct omap_dss_device *dssdev,
297                         struct omap_video_timings *timings)
298 {
299         bool is_tft;
300         int r;
301         int lck_div, pck_div;
302         unsigned long fck;
303         unsigned long pck;
304         struct dispc_clock_info dispc_cinfo;
305
306         if (!dispc_lcd_timings_ok(timings))
307                 return -EINVAL;
308
309         if (timings->pixel_clock == 0)
310                 return -EINVAL;
311
312         is_tft = (dssdev->panel.config & OMAP_DSS_LCD_TFT) != 0;
313
314         if (dpi_use_dsi_pll(dssdev)) {
315                 struct dsi_clock_info dsi_cinfo;
316                 r = dsi_pll_calc_clock_div_pck(dpi.dsidev, is_tft,
317                                 timings->pixel_clock * 1000,
318                                 &dsi_cinfo, &dispc_cinfo);
319
320                 if (r)
321                         return r;
322
323                 fck = dsi_cinfo.dsi_pll_hsdiv_dispc_clk;
324         } else {
325                 struct dss_clock_info dss_cinfo;
326                 r = dss_calc_clock_div(is_tft, timings->pixel_clock * 1000,
327                                 &dss_cinfo, &dispc_cinfo);
328
329                 if (r)
330                         return r;
331
332                 fck = dss_cinfo.fck;
333         }
334
335         lck_div = dispc_cinfo.lck_div;
336         pck_div = dispc_cinfo.pck_div;
337
338         pck = fck / lck_div / pck_div / 1000;
339
340         timings->pixel_clock = pck;
341
342         return 0;
343 }
344 EXPORT_SYMBOL(dpi_check_timings);
345
346 int dpi_init_display(struct omap_dss_device *dssdev)
347 {
348         DSSDBG("init_display\n");
349
350         if (cpu_is_omap34xx() && dpi.vdds_dsi_reg == NULL) {
351                 struct regulator *vdds_dsi;
352
353                 vdds_dsi = dss_get_vdds_dsi();
354
355                 if (IS_ERR(vdds_dsi)) {
356                         DSSERR("can't get VDDS_DSI regulator\n");
357                         return PTR_ERR(vdds_dsi);
358                 }
359
360                 dpi.vdds_dsi_reg = vdds_dsi;
361         }
362
363         if (dpi_use_dsi_pll(dssdev)) {
364                 enum omap_dss_clk_source dispc_fclk_src =
365                         dssdev->clocks.dispc.dispc_fclk_src;
366                 dpi.dsidev = dpi_get_dsidev(dispc_fclk_src);
367         }
368
369         return 0;
370 }
371
372 int dpi_init(void)
373 {
374         return 0;
375 }
376
377 void dpi_exit(void)
378 {
379 }
380