2 * linux/drivers/video/omap2/dss/dss.h
4 * Copyright (C) 2009 Nokia Corporation
5 * Author: Tomi Valkeinen <tomi.valkeinen@nokia.com>
7 * Some code and ideas taken from drivers/video/omap/ driver
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License version 2 as published by
12 * the Free Software Foundation.
14 * This program is distributed in the hope that it will be useful, but WITHOUT
15 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
16 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
19 * You should have received a copy of the GNU General Public License along with
20 * this program. If not, see <http://www.gnu.org/licenses/>.
26 #ifdef CONFIG_OMAP2_DSS_DEBUG_SUPPORT
31 extern bool dss_debug;
32 #ifdef DSS_SUBSYS_NAME
33 #define DSSDBG(format, ...) \
35 printk(KERN_DEBUG "omapdss " DSS_SUBSYS_NAME ": " format, \
38 #define DSSDBG(format, ...) \
40 printk(KERN_DEBUG "omapdss: " format, ## __VA_ARGS__)
43 #ifdef DSS_SUBSYS_NAME
44 #define DSSDBGF(format, ...) \
46 printk(KERN_DEBUG "omapdss " DSS_SUBSYS_NAME \
47 ": %s(" format ")\n", \
51 #define DSSDBGF(format, ...) \
53 printk(KERN_DEBUG "omapdss: " \
54 ": %s(" format ")\n", \
60 #define DSSDBG(format, ...)
61 #define DSSDBGF(format, ...)
65 #ifdef DSS_SUBSYS_NAME
66 #define DSSERR(format, ...) \
67 printk(KERN_ERR "omapdss " DSS_SUBSYS_NAME " error: " format, \
70 #define DSSERR(format, ...) \
71 printk(KERN_ERR "omapdss error: " format, ## __VA_ARGS__)
74 #ifdef DSS_SUBSYS_NAME
75 #define DSSINFO(format, ...) \
76 printk(KERN_INFO "omapdss " DSS_SUBSYS_NAME ": " format, \
79 #define DSSINFO(format, ...) \
80 printk(KERN_INFO "omapdss: " format, ## __VA_ARGS__)
83 #ifdef DSS_SUBSYS_NAME
84 #define DSSWARN(format, ...) \
85 printk(KERN_WARNING "omapdss " DSS_SUBSYS_NAME ": " format, \
88 #define DSSWARN(format, ...) \
89 printk(KERN_WARNING "omapdss: " format, ## __VA_ARGS__)
92 /* OMAP TRM gives bitfields as start:end, where start is the higher bit
93 number. For example 7:0 */
94 #define FLD_MASK(start, end) (((1 << ((start) - (end) + 1)) - 1) << (end))
95 #define FLD_VAL(val, start, end) (((val) << (end)) & FLD_MASK(start, end))
96 #define FLD_GET(val, start, end) (((val) & FLD_MASK(start, end)) >> (end))
97 #define FLD_MOD(orig, val, start, end) \
98 (((orig) & ~FLD_MASK(start, end)) | FLD_VAL(val, start, end))
100 enum dss_io_pad_mode {
101 DSS_IO_PAD_MODE_RESET,
102 DSS_IO_PAD_MODE_RFBI,
103 DSS_IO_PAD_MODE_BYPASS,
106 enum dss_hdmi_venc_clk_source_select {
111 enum dss_dsi_content_type {
113 DSS_DSI_CONTENT_GENERIC,
116 struct dss_clock_info {
117 /* rates that we get with dividers below */
124 struct dispc_clock_info {
125 /* rates that we get with dividers below */
134 struct dsi_clock_info {
135 /* rates that we get with dividers below */
137 unsigned long clkin4ddr;
139 unsigned long dsi_pll_hsdiv_dispc_clk; /* OMAP3: DSI1_PLL_CLK
140 * OMAP4: PLLx_CLK1 */
141 unsigned long dsi_pll_hsdiv_dsi_clk; /* OMAP3: DSI2_PLL_CLK
142 * OMAP4: PLLx_CLK2 */
143 unsigned long lp_clk;
148 u16 regm_dispc; /* OMAP3: REGM3
150 u16 regm_dsi; /* OMAP3: REGM4
161 struct dss_lcd_mgr_config {
162 enum dss_io_pad_mode io_pad_mode;
167 struct dispc_clock_info clock_info;
169 int video_port_width;
171 int lcden_sig_polarity;
175 struct platform_device;
178 const char *dss_get_default_display_name(void);
179 struct bus_type *dss_get_bus(void);
180 struct regulator *dss_get_vdds_dsi(void);
181 struct regulator *dss_get_vdds_sdi(void);
182 int dss_get_ctx_loss_count(struct device *dev);
183 int dss_dsi_enable_pads(int dsi_id, unsigned lane_mask);
184 void dss_dsi_disable_pads(int dsi_id, unsigned lane_mask);
185 int dss_set_min_bus_tput(struct device *dev, unsigned long tput);
186 int dss_debugfs_create_file(const char *name, void (*write)(struct seq_file *));
188 struct omap_dss_device *dss_alloc_and_init_device(struct device *parent);
189 int dss_add_device(struct omap_dss_device *dssdev);
190 void dss_unregister_device(struct omap_dss_device *dssdev);
191 void dss_unregister_child_devices(struct device *parent);
192 void dss_put_device(struct omap_dss_device *dssdev);
193 void dss_copy_device_pdata(struct omap_dss_device *dst,
194 const struct omap_dss_device *src);
197 void dss_apply_init(void);
198 int dss_mgr_wait_for_go(struct omap_overlay_manager *mgr);
199 int dss_mgr_wait_for_go_ovl(struct omap_overlay *ovl);
200 void dss_mgr_start_update(struct omap_overlay_manager *mgr);
201 int omap_dss_mgr_apply(struct omap_overlay_manager *mgr);
203 int dss_mgr_enable(struct omap_overlay_manager *mgr);
204 void dss_mgr_disable(struct omap_overlay_manager *mgr);
205 int dss_mgr_set_info(struct omap_overlay_manager *mgr,
206 struct omap_overlay_manager_info *info);
207 void dss_mgr_get_info(struct omap_overlay_manager *mgr,
208 struct omap_overlay_manager_info *info);
209 int dss_mgr_set_device(struct omap_overlay_manager *mgr,
210 struct omap_dss_device *dssdev);
211 int dss_mgr_unset_device(struct omap_overlay_manager *mgr);
212 int dss_mgr_set_output(struct omap_overlay_manager *mgr,
213 struct omap_dss_output *output);
214 int dss_mgr_unset_output(struct omap_overlay_manager *mgr);
215 void dss_mgr_set_timings(struct omap_overlay_manager *mgr,
216 const struct omap_video_timings *timings);
217 void dss_mgr_set_lcd_config(struct omap_overlay_manager *mgr,
218 const struct dss_lcd_mgr_config *config);
219 const struct omap_video_timings *dss_mgr_get_timings(struct omap_overlay_manager *mgr);
221 bool dss_ovl_is_enabled(struct omap_overlay *ovl);
222 int dss_ovl_enable(struct omap_overlay *ovl);
223 int dss_ovl_disable(struct omap_overlay *ovl);
224 int dss_ovl_set_info(struct omap_overlay *ovl,
225 struct omap_overlay_info *info);
226 void dss_ovl_get_info(struct omap_overlay *ovl,
227 struct omap_overlay_info *info);
228 int dss_ovl_set_manager(struct omap_overlay *ovl,
229 struct omap_overlay_manager *mgr);
230 int dss_ovl_unset_manager(struct omap_overlay *ovl);
233 void dss_register_output(struct omap_dss_output *out);
234 void dss_unregister_output(struct omap_dss_output *out);
235 struct omap_dss_output *omapdss_get_output_from_dssdev(struct omap_dss_device *dssdev);
238 int dss_suspend_all_devices(void);
239 int dss_resume_all_devices(void);
240 void dss_disable_all_devices(void);
242 int dss_init_device(struct platform_device *pdev,
243 struct omap_dss_device *dssdev);
244 void dss_uninit_device(struct platform_device *pdev,
245 struct omap_dss_device *dssdev);
248 int dss_init_overlay_managers(struct platform_device *pdev);
249 void dss_uninit_overlay_managers(struct platform_device *pdev);
250 int dss_mgr_simple_check(struct omap_overlay_manager *mgr,
251 const struct omap_overlay_manager_info *info);
252 int dss_mgr_check_timings(struct omap_overlay_manager *mgr,
253 const struct omap_video_timings *timings);
254 int dss_mgr_check(struct omap_overlay_manager *mgr,
255 struct omap_overlay_manager_info *info,
256 const struct omap_video_timings *mgr_timings,
257 const struct dss_lcd_mgr_config *config,
258 struct omap_overlay_info **overlay_infos);
260 static inline bool dss_mgr_is_lcd(enum omap_channel id)
262 if (id == OMAP_DSS_CHANNEL_LCD || id == OMAP_DSS_CHANNEL_LCD2 ||
263 id == OMAP_DSS_CHANNEL_LCD3)
269 int dss_manager_kobj_init(struct omap_overlay_manager *mgr,
270 struct platform_device *pdev);
271 void dss_manager_kobj_uninit(struct omap_overlay_manager *mgr);
274 void dss_init_overlays(struct platform_device *pdev);
275 void dss_uninit_overlays(struct platform_device *pdev);
276 void dss_overlay_setup_dispc_manager(struct omap_overlay_manager *mgr);
277 int dss_ovl_simple_check(struct omap_overlay *ovl,
278 const struct omap_overlay_info *info);
279 int dss_ovl_check(struct omap_overlay *ovl, struct omap_overlay_info *info,
280 const struct omap_video_timings *mgr_timings);
281 bool dss_ovl_use_replication(struct dss_lcd_mgr_config config,
282 enum omap_color_mode mode);
283 int dss_overlay_kobj_init(struct omap_overlay *ovl,
284 struct platform_device *pdev);
285 void dss_overlay_kobj_uninit(struct omap_overlay *ovl);
288 int dss_init_platform_driver(void) __init;
289 void dss_uninit_platform_driver(void);
291 int dss_dpi_select_source(enum omap_channel channel);
292 void dss_select_hdmi_venc_clk_source(enum dss_hdmi_venc_clk_source_select);
293 enum dss_hdmi_venc_clk_source_select dss_get_hdmi_venc_clk_source(void);
294 const char *dss_get_generic_clk_source_name(enum omap_dss_clk_source clk_src);
295 void dss_dump_clocks(struct seq_file *s);
297 #if defined(CONFIG_DEBUG_FS) && defined(CONFIG_OMAP2_DSS_DEBUG_SUPPORT)
298 void dss_debug_dump_clocks(struct seq_file *s);
301 void dss_sdi_init(int datapairs);
302 int dss_sdi_enable(void);
303 void dss_sdi_disable(void);
305 void dss_select_dispc_clk_source(enum omap_dss_clk_source clk_src);
306 void dss_select_dsi_clk_source(int dsi_module,
307 enum omap_dss_clk_source clk_src);
308 void dss_select_lcd_clk_source(enum omap_channel channel,
309 enum omap_dss_clk_source clk_src);
310 enum omap_dss_clk_source dss_get_dispc_clk_source(void);
311 enum omap_dss_clk_source dss_get_dsi_clk_source(int dsi_module);
312 enum omap_dss_clk_source dss_get_lcd_clk_source(enum omap_channel channel);
314 void dss_set_venc_output(enum omap_dss_venc_type type);
315 void dss_set_dac_pwrdn_bgz(bool enable);
317 unsigned long dss_get_dpll4_rate(void);
318 int dss_set_clock_div(struct dss_clock_info *cinfo);
319 int dss_calc_clock_div(unsigned long req_pck, struct dss_clock_info *dss_cinfo,
320 struct dispc_clock_info *dispc_cinfo);
323 int sdi_init_platform_driver(void) __init;
324 void sdi_uninit_platform_driver(void) __exit;
327 #ifdef CONFIG_OMAP2_DSS_DSI
330 struct file_operations;
332 int dsi_init_platform_driver(void) __init;
333 void dsi_uninit_platform_driver(void) __exit;
335 int dsi_runtime_get(struct platform_device *dsidev);
336 void dsi_runtime_put(struct platform_device *dsidev);
338 void dsi_dump_clocks(struct seq_file *s);
340 void dsi_irq_handler(void);
341 u8 dsi_get_pixel_size(enum omap_dss_dsi_pixel_format fmt);
343 unsigned long dsi_get_pll_hsdiv_dispc_rate(struct platform_device *dsidev);
344 int dsi_pll_set_clock_div(struct platform_device *dsidev,
345 struct dsi_clock_info *cinfo);
346 int dsi_pll_calc_clock_div_pck(struct platform_device *dsidev,
347 unsigned long req_pck, struct dsi_clock_info *cinfo,
348 struct dispc_clock_info *dispc_cinfo);
349 int dsi_pll_init(struct platform_device *dsidev, bool enable_hsclk,
351 void dsi_pll_uninit(struct platform_device *dsidev, bool disconnect_lanes);
352 void dsi_wait_pll_hsdiv_dispc_active(struct platform_device *dsidev);
353 void dsi_wait_pll_hsdiv_dsi_active(struct platform_device *dsidev);
354 struct platform_device *dsi_get_dsidev_from_id(int module);
356 static inline int dsi_runtime_get(struct platform_device *dsidev)
360 static inline void dsi_runtime_put(struct platform_device *dsidev)
363 static inline u8 dsi_get_pixel_size(enum omap_dss_dsi_pixel_format fmt)
365 WARN("%s: DSI not compiled in, returning pixel_size as 0\n", __func__);
368 static inline unsigned long dsi_get_pll_hsdiv_dispc_rate(struct platform_device *dsidev)
370 WARN("%s: DSI not compiled in, returning rate as 0\n", __func__);
373 static inline int dsi_pll_set_clock_div(struct platform_device *dsidev,
374 struct dsi_clock_info *cinfo)
376 WARN("%s: DSI not compiled in\n", __func__);
379 static inline int dsi_pll_calc_clock_div_pck(struct platform_device *dsidev,
380 unsigned long req_pck,
381 struct dsi_clock_info *dsi_cinfo,
382 struct dispc_clock_info *dispc_cinfo)
384 WARN("%s: DSI not compiled in\n", __func__);
387 static inline int dsi_pll_init(struct platform_device *dsidev,
388 bool enable_hsclk, bool enable_hsdiv)
390 WARN("%s: DSI not compiled in\n", __func__);
393 static inline void dsi_pll_uninit(struct platform_device *dsidev,
394 bool disconnect_lanes)
397 static inline void dsi_wait_pll_hsdiv_dispc_active(struct platform_device *dsidev)
400 static inline void dsi_wait_pll_hsdiv_dsi_active(struct platform_device *dsidev)
403 static inline struct platform_device *dsi_get_dsidev_from_id(int module)
405 WARN("%s: DSI not compiled in, returning platform device as NULL\n",
412 int dpi_init_platform_driver(void) __init;
413 void dpi_uninit_platform_driver(void) __exit;
416 int dispc_init_platform_driver(void) __init;
417 void dispc_uninit_platform_driver(void) __exit;
418 void dispc_dump_clocks(struct seq_file *s);
419 void dispc_irq_handler(void);
421 int dispc_runtime_get(void);
422 void dispc_runtime_put(void);
424 void dispc_enable_sidle(void);
425 void dispc_disable_sidle(void);
427 void dispc_lcd_enable_signal_polarity(bool act_high);
428 void dispc_lcd_enable_signal(bool enable);
429 void dispc_pck_free_enable(bool enable);
430 void dispc_enable_fifomerge(bool enable);
431 void dispc_enable_gamma_table(bool enable);
432 void dispc_set_loadmode(enum omap_dss_load_mode mode);
434 bool dispc_mgr_timings_ok(enum omap_channel channel,
435 const struct omap_video_timings *timings);
436 unsigned long dispc_fclk_rate(void);
437 void dispc_find_clk_divs(unsigned long req_pck, unsigned long fck,
438 struct dispc_clock_info *cinfo);
439 int dispc_calc_clock_rates(unsigned long dispc_fclk_rate,
440 struct dispc_clock_info *cinfo);
443 void dispc_ovl_set_fifo_threshold(enum omap_plane plane, u32 low, u32 high);
444 void dispc_ovl_compute_fifo_thresholds(enum omap_plane plane,
445 u32 *fifo_low, u32 *fifo_high, bool use_fifomerge,
447 int dispc_ovl_setup(enum omap_plane plane, const struct omap_overlay_info *oi,
448 bool replication, const struct omap_video_timings *mgr_timings,
450 int dispc_ovl_enable(enum omap_plane plane, bool enable);
451 void dispc_ovl_set_channel_out(enum omap_plane plane,
452 enum omap_channel channel);
454 void dispc_mgr_enable_fifohandcheck(enum omap_channel channel, bool enable);
455 u32 dispc_mgr_get_vsync_irq(enum omap_channel channel);
456 u32 dispc_mgr_get_framedone_irq(enum omap_channel channel);
457 bool dispc_mgr_go_busy(enum omap_channel channel);
458 void dispc_mgr_go(enum omap_channel channel);
459 bool dispc_mgr_is_enabled(enum omap_channel channel);
460 void dispc_mgr_enable(enum omap_channel channel, bool enable);
461 bool dispc_mgr_is_channel_enabled(enum omap_channel channel);
462 void dispc_mgr_set_io_pad_mode(enum dss_io_pad_mode mode);
463 void dispc_mgr_enable_stallmode(enum omap_channel channel, bool enable);
464 void dispc_mgr_set_tft_data_lines(enum omap_channel channel, u8 data_lines);
465 void dispc_mgr_set_lcd_type_tft(enum omap_channel channel);
466 void dispc_mgr_set_timings(enum omap_channel channel,
467 struct omap_video_timings *timings);
468 unsigned long dispc_mgr_lclk_rate(enum omap_channel channel);
469 unsigned long dispc_mgr_pclk_rate(enum omap_channel channel);
470 unsigned long dispc_core_clk_rate(void);
471 void dispc_mgr_set_clock_div(enum omap_channel channel,
472 struct dispc_clock_info *cinfo);
473 int dispc_mgr_get_clock_div(enum omap_channel channel,
474 struct dispc_clock_info *cinfo);
475 void dispc_mgr_setup(enum omap_channel channel,
476 struct omap_overlay_manager_info *info);
479 #ifdef CONFIG_OMAP2_DSS_VENC
480 int venc_init_platform_driver(void) __init;
481 void venc_uninit_platform_driver(void) __exit;
482 unsigned long venc_get_pixel_clock(void);
484 static inline unsigned long venc_get_pixel_clock(void)
486 WARN("%s: VENC not compiled in, returning pclk as 0\n", __func__);
490 int omapdss_venc_display_enable(struct omap_dss_device *dssdev);
491 void omapdss_venc_display_disable(struct omap_dss_device *dssdev);
492 void omapdss_venc_set_timings(struct omap_dss_device *dssdev,
493 struct omap_video_timings *timings);
494 int omapdss_venc_check_timings(struct omap_dss_device *dssdev,
495 struct omap_video_timings *timings);
496 u32 omapdss_venc_get_wss(struct omap_dss_device *dssdev);
497 int omapdss_venc_set_wss(struct omap_dss_device *dssdev, u32 wss);
498 void omapdss_venc_set_type(struct omap_dss_device *dssdev,
499 enum omap_dss_venc_type type);
500 void omapdss_venc_invert_vid_out_polarity(struct omap_dss_device *dssdev,
501 bool invert_polarity);
502 int venc_panel_init(void);
503 void venc_panel_exit(void);
506 #ifdef CONFIG_OMAP4_DSS_HDMI
507 int hdmi_init_platform_driver(void) __init;
508 void hdmi_uninit_platform_driver(void) __exit;
509 unsigned long hdmi_get_pixel_clock(void);
511 static inline unsigned long hdmi_get_pixel_clock(void)
513 WARN("%s: HDMI not compiled in, returning pclk as 0\n", __func__);
517 int omapdss_hdmi_display_enable(struct omap_dss_device *dssdev);
518 void omapdss_hdmi_display_disable(struct omap_dss_device *dssdev);
519 void omapdss_hdmi_display_set_timing(struct omap_dss_device *dssdev,
520 struct omap_video_timings *timings);
521 int omapdss_hdmi_display_check_timing(struct omap_dss_device *dssdev,
522 struct omap_video_timings *timings);
523 int omapdss_hdmi_read_edid(u8 *buf, int len);
524 bool omapdss_hdmi_detect(void);
525 int hdmi_panel_init(void);
526 void hdmi_panel_exit(void);
527 #ifdef CONFIG_OMAP4_DSS_HDMI_AUDIO
528 int hdmi_audio_enable(void);
529 void hdmi_audio_disable(void);
530 int hdmi_audio_start(void);
531 void hdmi_audio_stop(void);
532 bool hdmi_mode_has_audio(void);
533 int hdmi_audio_config(struct omap_dss_audio *audio);
537 int rfbi_init_platform_driver(void) __init;
538 void rfbi_uninit_platform_driver(void) __exit;
541 #ifdef CONFIG_OMAP2_DSS_COLLECT_IRQ_STATS
542 static inline void dss_collect_irq_stats(u32 irqstatus, unsigned *irq_arr)
545 for (b = 0; b < 32; ++b) {
546 if (irqstatus & (1 << b))