drivers/video/s6e8ax0.c

   1 /*
   2  * Copyright (C) 2012 Samsung Electronics
   3  *
   4  * Author: Donghwa Lee <dh09.lee@samsung.com>
   5  *
   6  * This program is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU General Public License as
   8  * published by the Free Software Foundation; either version 2 of
   9  * the License, or (at your option) any later version.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, write to the Free Software
  18  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  19  * MA 02111-1307 USA
  20  */
  21
  22 #include <common.h>
  23 #include <asm/arch/mipi_dsim.h>
  24
  25 #include "exynos_mipi_dsi_lowlevel.h"
  26 #include "exynos_mipi_dsi_common.h"
  27
  28 static void s6e8ax0_panel_cond(struct mipi_dsim_device *dsim_dev)
  29 {
  30         struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
  31         const unsigned char data_to_send[] = {
  32                 0xf8, 0x3d, 0x35, 0x00, 0x00, 0x00, 0x8d, 0x00, 0x4c,
  33                 0x6e, 0x10, 0x27, 0x7d, 0x3f, 0x10, 0x00, 0x00, 0x20,
  34                 0x04, 0x08, 0x6e, 0x00, 0x00, 0x00, 0x02, 0x08, 0x08,
  35                 0x23, 0x23, 0xc0, 0xc8, 0x08, 0x48, 0xc1, 0x00, 0xc3,
  36                 0xff, 0xff, 0xc8
  37         };
  38
  39         ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
  40                         (unsigned int)data_to_send, ARRAY_SIZE(data_to_send));
  41 }
  42
  43 static void s6e8ax0_display_cond(struct mipi_dsim_device *dsim_dev)
  44 {
  45         struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
  46         const unsigned char data_to_send[] = {
  47                 0xf2, 0x80, 0x03, 0x0d
  48         };
  49
  50         ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
  51                         (unsigned int)data_to_send,
  52                         ARRAY_SIZE(data_to_send));
  53 }
  54
  55 static void s6e8ax0_gamma_cond(struct mipi_dsim_device *dsim_dev)
  56 {
  57         struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
  58         /* 7500K 2.2 Set (M3, 300cd) */
  59         const unsigned char data_to_send[] = {
  60                 0xfa, 0x01, 0x0f, 0x00, 0x0f, 0xda, 0xc0, 0xe4, 0xc8,
  61                 0xc8, 0xc6, 0xd3, 0xd6, 0xd0, 0xab, 0xb2, 0xa6, 0xbf,
  62                 0xc2, 0xb9, 0x00, 0x93, 0x00, 0x86, 0x00, 0xd1
  63         };
  64
  65         ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
  66                         (unsigned int)data_to_send,
  67                         ARRAY_SIZE(data_to_send));
  68 }
  69
  70 static void s6e8ax0_gamma_update(struct mipi_dsim_device *dsim_dev)
  71 {
  72         struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
  73
  74         ops->cmd_write(dsim_dev, MIPI_DSI_DCS_SHORT_WRITE_PARAM, 0xf7, 0x3);
  75 }
  76
  77 static void s6e8ax0_etc_source_control(struct mipi_dsim_device *dsim_dev)
  78 {
  79         struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
  80         const unsigned char data_to_send[] = {
  81                 0xf6, 0x00, 0x02, 0x00
  82         };
  83
  84         ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
  85                         (unsigned int)data_to_send,
  86                         ARRAY_SIZE(data_to_send));
  87 }
  88
  89 static void s6e8ax0_etc_pentile_control(struct mipi_dsim_device *dsim_dev)
  90 {
  91         struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
  92         const unsigned char data_to_send[] = {
  93                 0xb6, 0x0c, 0x02, 0x03, 0x32, 0xff, 0x44, 0x44, 0xc0,
  94                 0x00
  95         };
  96
  97         ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
  98                         (unsigned int)data_to_send,
  99                         ARRAY_SIZE(data_to_send));
 100 }
 101
 102 static void s6e8ax0_etc_mipi_control1(struct mipi_dsim_device *dsim_dev)
 103 {
 104         struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
 105         const unsigned char data_to_send[] = {
 106                 0xe1, 0x10, 0x1c, 0x17, 0x08, 0x1d
 107         };
 108
 109         ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
 110                         (unsigned int)data_to_send,
 111                         ARRAY_SIZE(data_to_send));
 112 }
 113
 114 static void s6e8ax0_etc_mipi_control2(struct mipi_dsim_device *dsim_dev)
 115 {
 116         struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
 117         const unsigned char data_to_send[] = {
 118                 0xe2, 0xed, 0x07, 0xc3, 0x13, 0x0d, 0x03
 119         };
 120
 121         ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
 122                         (unsigned int)data_to_send,
 123                         ARRAY_SIZE(data_to_send));
 124 }
 125
 126 static void s6e8ax0_etc_power_control(struct mipi_dsim_device *dsim_dev)
 127 {
 128         struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
 129         const unsigned char data_to_send[] = {
 130                 0xf4, 0xcf, 0x0a, 0x12, 0x10, 0x19, 0x33, 0x02
 131         };
 132
 133         ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
 134                 (unsigned int)data_to_send, ARRAY_SIZE(data_to_send));
 135 }
 136
 137 static void s6e8ax0_etc_mipi_control3(struct mipi_dsim_device *dsim_dev)
 138 {
 139         struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
 140
 141         ops->cmd_write(dsim_dev, MIPI_DSI_DCS_SHORT_WRITE_PARAM, 0xe3, 0x40);
 142 }
 143
 144 static void s6e8ax0_etc_mipi_control4(struct mipi_dsim_device *dsim_dev)
 145 {
 146         struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
 147         const unsigned char data_to_send[] = {
 148                 0xe4, 0x00, 0x00, 0x14, 0x80, 0x00, 0x00, 0x00
 149         };
 150
 151         ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
 152                 (unsigned int)data_to_send, ARRAY_SIZE(data_to_send));
 153 }
 154
 155 static void s6e8ax0_elvss_set(struct mipi_dsim_device *dsim_dev)
 156 {
 157         struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
 158         const unsigned char data_to_send[] = {
 159                 0xb1, 0x04, 0x00
 160         };
 161
 162         ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
 163                         (unsigned int)data_to_send,
 164                         ARRAY_SIZE(data_to_send));
 165 }
 166
 167 static void s6e8ax0_display_on(struct mipi_dsim_device *dsim_dev)
 168 {
 169         struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
 170
 171         ops->cmd_write(dsim_dev,
 172                 MIPI_DSI_DCS_SHORT_WRITE, 0x29, 0x00);
 173 }
 174
 175 static void s6e8ax0_sleep_out(struct mipi_dsim_device *dsim_dev)
 176 {
 177         struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
 178
 179         ops->cmd_write(dsim_dev,
 180                 MIPI_DSI_DCS_SHORT_WRITE, 0x11, 0x00);
 181 }
 182
 183 static void s6e8ax0_apply_level1_key(struct mipi_dsim_device *dsim_dev)
 184 {
 185         struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
 186         const unsigned char data_to_send[] = {
 187                 0xf0, 0x5a, 0x5a
 188         };
 189
 190         ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
 191                 (unsigned int)data_to_send, ARRAY_SIZE(data_to_send));
 192 }
 193
 194 static void s6e8ax0_apply_mtp_key(struct mipi_dsim_device *dsim_dev)
 195 {
 196         struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
 197         const unsigned char data_to_send[] = {
 198                 0xf1, 0x5a, 0x5a
 199         };
 200
 201         ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
 202                 (unsigned int)data_to_send, ARRAY_SIZE(data_to_send));
 203 }
 204
 205 static void s6e8ax0_panel_init(struct mipi_dsim_device *dsim_dev)
 206 {
 207         /*
 208          * in case of setting gamma and panel condition at first,
 209          * it shuold be setting like below.
 210          * set_gamma() -> set_panel_condition()
 211          */
 212
 213         s6e8ax0_apply_level1_key(dsim_dev);
 214         s6e8ax0_apply_mtp_key(dsim_dev);
 215
 216         s6e8ax0_sleep_out(dsim_dev);
 217         mdelay(5);
 218         s6e8ax0_panel_cond(dsim_dev);
 219         s6e8ax0_display_cond(dsim_dev);
 220         s6e8ax0_gamma_cond(dsim_dev);
 221         s6e8ax0_gamma_update(dsim_dev);
 222
 223         s6e8ax0_etc_source_control(dsim_dev);
 224         s6e8ax0_elvss_set(dsim_dev);
 225         s6e8ax0_etc_pentile_control(dsim_dev);
 226         s6e8ax0_etc_mipi_control1(dsim_dev);
 227         s6e8ax0_etc_mipi_control2(dsim_dev);
 228         s6e8ax0_etc_power_control(dsim_dev);
 229         s6e8ax0_etc_mipi_control3(dsim_dev);
 230         s6e8ax0_etc_mipi_control4(dsim_dev);
 231 }
 232
 233 static int s6e8ax0_panel_set(struct mipi_dsim_device *dsim_dev)
 234 {
 235         s6e8ax0_panel_init(dsim_dev);
 236
 237         return 0;
 238 }
 239
 240 static void s6e8ax0_display_enable(struct mipi_dsim_device *dsim_dev)
 241 {
 242         s6e8ax0_display_on(dsim_dev);
 243 }
 244
 245 static struct mipi_dsim_lcd_driver s6e8ax0_dsim_ddi_driver = {
 246         .name = "s6e8ax0",
 247         .id = -1,
 248
 249         .mipi_panel_init = s6e8ax0_panel_set,
 250         .mipi_display_on = s6e8ax0_display_enable,
 251 };
 252
 253 void s6e8ax0_init(void)
 254 {
 255         exynos_mipi_dsi_register_lcd_driver(&s6e8ax0_dsim_ddi_driver);
 256 }