2 * linux/drivers/video/sa1100fb.c
4 * Copyright (C) 1999 Eric A. Thomas
5 * Based on acornfb.c Copyright (C) Russell King.
7 * This file is subject to the terms and conditions of the GNU General Public
8 * License. See the file COPYING in the main directory of this archive for
11 * StrongARM 1100 LCD Controller Frame Buffer Driver
13 * Please direct your questions and comments on this driver to the following
16 * linux-arm-kernel@lists.arm.linux.org.uk
18 * Clean patches should be sent to the ARM Linux Patch System. Please see the
19 * following web page for more information:
21 * http://www.arm.linux.org.uk/developer/patches/info.shtml
26 * - With the Neponset plugged into an Assabet, LCD powerdown
27 * doesn't work (LCD stays powered up). Therefore we shouldn't
29 * - We don't limit the CPU clock rate nor the mode selection
30 * according to the available SDRAM bandwidth.
33 * - Linear grayscale palettes and the kernel.
34 * Such code does not belong in the kernel. The kernel frame buffer
35 * drivers do not expect a linear colourmap, but a colourmap based on
36 * the VT100 standard mapping.
38 * If your _userspace_ requires a linear colourmap, then the setup of
39 * such a colourmap belongs _in userspace_, not in the kernel. Code
40 * to set the colourmap correctly from user space has been sent to
41 * David Neuer. It's around 8 lines of C code, plus another 4 to
42 * detect if we are using grayscale.
44 * - The following must never be specified in a panel definition:
45 * LCCR0_LtlEnd, LCCR3_PixClkDiv, LCCR3_VrtSnchL, LCCR3_HorSnchL
47 * - The following should be specified:
48 * either LCCR0_Color or LCCR0_Mono
49 * either LCCR0_Sngl or LCCR0_Dual
50 * either LCCR0_Act or LCCR0_Pas
51 * either LCCR3_OutEnH or LCCD3_OutEnL
52 * either LCCR3_PixRsEdg or LCCR3_PixFlEdg
53 * either LCCR3_ACBsDiv or LCCR3_ACBsCntOff
57 * - Driver appears to be working for Brutus 320x200x8bpp mode. Other
58 * resolutions are working, but only the 8bpp mode is supported.
59 * Changes need to be made to the palette encode and decode routines
60 * to support 4 and 16 bpp modes.
61 * Driver is not designed to be a module. The FrameBuffer is statically
62 * allocated since dynamic allocation of a 300k buffer cannot be
66 * - FrameBuffer memory is now allocated at run-time when the
67 * driver is initialized.
69 * 2000/04/10: Nicolas Pitre <nico@fluxnic.net>
70 * - Big cleanup for dynamic selection of machine type at run time.
72 * 2000/07/19: Jamey Hicks <jamey@crl.dec.com>
73 * - Support for Bitsy aka Compaq iPAQ H3600 added.
75 * 2000/08/07: Tak-Shing Chan <tchan.rd@idthk.com>
76 * Jeff Sutherland <jsutherland@accelent.com>
77 * - Resolved an issue caused by a change made to the Assabet's PLD
78 * earlier this year which broke the framebuffer driver for newer
79 * Phase 4 Assabets. Some other parameters were changed to optimize
80 * for the Sharp display.
82 * 2000/08/09: Kunihiko IMAI <imai@vasara.co.jp>
83 * - XP860 support added
85 * 2000/08/19: Mark Huang <mhuang@livetoy.com>
86 * - Allows standard options to be passed on the kernel command line
87 * for most common passive displays.
90 * - s/save_flags_cli/local_irq_save/
91 * - remove unneeded extra save_flags_cli in sa1100fb_enable_lcd_controller
93 * 2000/10/10: Erik Mouw <J.A.K.Mouw@its.tudelft.nl>
94 * - Updated LART stuff. Fixed some minor bugs.
96 * 2000/10/30: Murphy Chen <murphy@mail.dialogue.com.tw>
97 * - Pangolin support added
99 * 2000/10/31: Roman Jordan <jor@hoeft-wessel.de>
100 * - Huw Webpanel support added
102 * 2000/11/23: Eric Peng <ericpeng@coventive.com>
105 * 2001/02/07: Jamey Hicks <jamey.hicks@compaq.com>
106 * Cliff Brake <cbrake@accelent.com>
107 * - Added PM callback
109 * 2001/05/26: <rmk@arm.linux.org.uk>
110 * - Fix 16bpp so that (a) we use the right colours rather than some
111 * totally random colour depending on what was in page 0, and (b)
112 * we don't de-reference a NULL pointer.
113 * - remove duplicated implementation of consistent_alloc()
114 * - convert dma address types to dma_addr_t
115 * - remove unused 'montype' stuff
116 * - remove redundant zero inits of init_var after the initial
118 * - remove allow_modeset (acornfb idea does not belong here)
120 * 2001/05/28: <rmk@arm.linux.org.uk>
121 * - massive cleanup - move machine dependent data into structures
122 * - I've left various #warnings in - if you see one, and know
123 * the hardware concerned, please get in contact with me.
125 * 2001/05/31: <rmk@arm.linux.org.uk>
126 * - Fix LCCR1 HSW value, fix all machine type specifications to
127 * keep values in line. (Please check your machine type specs)
129 * 2001/06/10: <rmk@arm.linux.org.uk>
130 * - Fiddle with the LCD controller from task context only; mainly
131 * so that we can run with interrupts on, and sleep.
132 * - Convert #warnings into #errors. No pain, no gain. ;)
134 * 2001/06/14: <rmk@arm.linux.org.uk>
135 * - Make the palette BPS value for 12bpp come out correctly.
136 * - Take notice of "greyscale" on any colour depth.
137 * - Make truecolor visuals use the RGB channel encoding information.
139 * 2001/07/02: <rmk@arm.linux.org.uk>
140 * - Fix colourmap problems.
142 * 2001/07/13: <abraham@2d3d.co.za>
143 * - Added support for the ICP LCD-Kit01 on LART. This LCD is
144 * manufactured by Prime View, model no V16C6448AB
146 * 2001/07/23: <rmk@arm.linux.org.uk>
147 * - Hand merge version from handhelds.org CVS tree. See patch
148 * notes for 595/1 for more information.
149 * - Drop 12bpp (it's 16bpp with different colour register mappings).
150 * - This hardware can not do direct colour. Therefore we don't
153 * 2001/07/27: <rmk@arm.linux.org.uk>
154 * - Halve YRES on dual scan LCDs.
156 * 2001/08/22: <rmk@arm.linux.org.uk>
157 * - Add b/w iPAQ pixclock value.
159 * 2001/10/12: <rmk@arm.linux.org.uk>
160 * - Add patch 681/1 and clean up stork definitions.
163 #include <linux/module.h>
164 #include <linux/kernel.h>
165 #include <linux/sched.h>
166 #include <linux/errno.h>
167 #include <linux/string.h>
168 #include <linux/interrupt.h>
169 #include <linux/slab.h>
170 #include <linux/mm.h>
171 #include <linux/fb.h>
172 #include <linux/delay.h>
173 #include <linux/init.h>
174 #include <linux/ioport.h>
175 #include <linux/cpufreq.h>
176 #include <linux/platform_device.h>
177 #include <linux/dma-mapping.h>
178 #include <linux/mutex.h>
179 #include <linux/io.h>
181 #include <video/sa1100fb.h>
183 #include <mach/hardware.h>
184 #include <asm/mach-types.h>
185 #include <mach/assabet.h>
186 #include <mach/shannon.h>
189 * Complain if VAR is out of range.
193 #undef ASSABET_PAL_VIDEO
195 #include "sa1100fb.h"
197 static const struct sa1100fb_rgb rgb_4 = {
198 .red = { .offset = 0, .length = 4, },
199 .green = { .offset = 0, .length = 4, },
200 .blue = { .offset = 0, .length = 4, },
201 .transp = { .offset = 0, .length = 0, },
204 static const struct sa1100fb_rgb rgb_8 = {
205 .red = { .offset = 0, .length = 8, },
206 .green = { .offset = 0, .length = 8, },
207 .blue = { .offset = 0, .length = 8, },
208 .transp = { .offset = 0, .length = 0, },
211 static const struct sa1100fb_rgb def_rgb_16 = {
212 .red = { .offset = 11, .length = 5, },
213 .green = { .offset = 5, .length = 6, },
214 .blue = { .offset = 0, .length = 5, },
215 .transp = { .offset = 0, .length = 0, },
220 static int sa1100fb_activate_var(struct fb_var_screeninfo *var, struct sa1100fb_info *);
221 static void set_ctrlr_state(struct sa1100fb_info *fbi, u_int state);
223 static inline void sa1100fb_schedule_work(struct sa1100fb_info *fbi, u_int state)
227 local_irq_save(flags);
229 * We need to handle two requests being made at the same time.
230 * There are two important cases:
231 * 1. When we are changing VT (C_REENABLE) while unblanking (C_ENABLE)
232 * We must perform the unblanking, which will do our REENABLE for us.
233 * 2. When we are blanking, but immediately unblank before we have
234 * blanked. We do the "REENABLE" thing here as well, just to be sure.
236 if (fbi->task_state == C_ENABLE && state == C_REENABLE)
238 if (fbi->task_state == C_DISABLE && state == C_ENABLE)
241 if (state != (u_int)-1) {
242 fbi->task_state = state;
243 schedule_work(&fbi->task);
245 local_irq_restore(flags);
248 static inline u_int chan_to_field(u_int chan, struct fb_bitfield *bf)
251 chan >>= 16 - bf->length;
252 return chan << bf->offset;
256 * Convert bits-per-pixel to a hardware palette PBS value.
258 static inline u_int palette_pbs(struct fb_var_screeninfo *var)
261 switch (var->bits_per_pixel) {
262 case 4: ret = 0 << 12; break;
263 case 8: ret = 1 << 12; break;
264 case 16: ret = 2 << 12; break;
270 sa1100fb_setpalettereg(u_int regno, u_int red, u_int green, u_int blue,
271 u_int trans, struct fb_info *info)
273 struct sa1100fb_info *fbi = (struct sa1100fb_info *)info;
276 if (regno < fbi->palette_size) {
277 val = ((red >> 4) & 0xf00);
278 val |= ((green >> 8) & 0x0f0);
279 val |= ((blue >> 12) & 0x00f);
282 val |= palette_pbs(&fbi->fb.var);
284 fbi->palette_cpu[regno] = val;
291 sa1100fb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
292 u_int trans, struct fb_info *info)
294 struct sa1100fb_info *fbi = (struct sa1100fb_info *)info;
299 * If inverse mode was selected, invert all the colours
300 * rather than the register number. The register number
301 * is what you poke into the framebuffer to produce the
302 * colour you requested.
304 if (fbi->cmap_inverse) {
306 green = 0xffff - green;
307 blue = 0xffff - blue;
311 * If greyscale is true, then we convert the RGB value
312 * to greyscale no mater what visual we are using.
314 if (fbi->fb.var.grayscale)
315 red = green = blue = (19595 * red + 38470 * green +
318 switch (fbi->fb.fix.visual) {
319 case FB_VISUAL_TRUECOLOR:
321 * 12 or 16-bit True Colour. We encode the RGB value
322 * according to the RGB bitfield information.
325 u32 *pal = fbi->fb.pseudo_palette;
327 val = chan_to_field(red, &fbi->fb.var.red);
328 val |= chan_to_field(green, &fbi->fb.var.green);
329 val |= chan_to_field(blue, &fbi->fb.var.blue);
336 case FB_VISUAL_STATIC_PSEUDOCOLOR:
337 case FB_VISUAL_PSEUDOCOLOR:
338 ret = sa1100fb_setpalettereg(regno, red, green, blue, trans, info);
345 #ifdef CONFIG_CPU_FREQ
347 * sa1100fb_display_dma_period()
348 * Calculate the minimum period (in picoseconds) between two DMA
349 * requests for the LCD controller. If we hit this, it means we're
350 * doing nothing but LCD DMA.
352 static inline unsigned int sa1100fb_display_dma_period(struct fb_var_screeninfo *var)
355 * Period = pixclock * bits_per_byte * bytes_per_transfer
356 * / memory_bits_per_pixel;
358 return var->pixclock * 8 * 16 / var->bits_per_pixel;
363 * sa1100fb_check_var():
364 * Round up in the following order: bits_per_pixel, xres,
365 * yres, xres_virtual, yres_virtual, xoffset, yoffset, grayscale,
366 * bitfields, horizontal timing, vertical timing.
369 sa1100fb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
371 struct sa1100fb_info *fbi = (struct sa1100fb_info *)info;
374 if (var->xres < MIN_XRES)
375 var->xres = MIN_XRES;
376 if (var->yres < MIN_YRES)
377 var->yres = MIN_YRES;
378 if (var->xres > fbi->max_xres)
379 var->xres = fbi->max_xres;
380 if (var->yres > fbi->max_yres)
381 var->yres = fbi->max_yres;
382 var->xres_virtual = max(var->xres_virtual, var->xres);
383 var->yres_virtual = max(var->yres_virtual, var->yres);
385 dev_dbg(fbi->dev, "var->bits_per_pixel=%d\n", var->bits_per_pixel);
386 switch (var->bits_per_pixel) {
401 * Copy the RGB parameters for this display
402 * from the machine specific parameters.
404 var->red = fbi->rgb[rgbidx]->red;
405 var->green = fbi->rgb[rgbidx]->green;
406 var->blue = fbi->rgb[rgbidx]->blue;
407 var->transp = fbi->rgb[rgbidx]->transp;
409 dev_dbg(fbi->dev, "RGBT length = %d:%d:%d:%d\n",
410 var->red.length, var->green.length, var->blue.length,
413 dev_dbg(fbi->dev, "RGBT offset = %d:%d:%d:%d\n",
414 var->red.offset, var->green.offset, var->blue.offset,
417 #ifdef CONFIG_CPU_FREQ
418 dev_dbg(fbi->dev, "dma period = %d ps, clock = %d kHz\n",
419 sa1100fb_display_dma_period(var),
420 cpufreq_get(smp_processor_id()));
426 static void sa1100fb_set_visual(struct sa1100fb_info *fbi, u32 visual)
428 if (fbi->inf->set_visual)
429 fbi->inf->set_visual(visual);
433 * sa1100fb_set_par():
434 * Set the user defined part of the display for the specified console
436 static int sa1100fb_set_par(struct fb_info *info)
438 struct sa1100fb_info *fbi = (struct sa1100fb_info *)info;
439 struct fb_var_screeninfo *var = &info->var;
440 unsigned long palette_mem_size;
442 dev_dbg(fbi->dev, "set_par\n");
444 if (var->bits_per_pixel == 16)
445 fbi->fb.fix.visual = FB_VISUAL_TRUECOLOR;
446 else if (!fbi->cmap_static)
447 fbi->fb.fix.visual = FB_VISUAL_PSEUDOCOLOR;
450 * Some people have weird ideas about wanting static
451 * pseudocolor maps. I suspect their user space
452 * applications are broken.
454 fbi->fb.fix.visual = FB_VISUAL_STATIC_PSEUDOCOLOR;
457 fbi->fb.fix.line_length = var->xres_virtual *
458 var->bits_per_pixel / 8;
459 fbi->palette_size = var->bits_per_pixel == 8 ? 256 : 16;
461 palette_mem_size = fbi->palette_size * sizeof(u16);
463 dev_dbg(fbi->dev, "palette_mem_size = 0x%08lx\n", palette_mem_size);
465 fbi->palette_cpu = (u16 *)(fbi->map_cpu + PAGE_SIZE - palette_mem_size);
466 fbi->palette_dma = fbi->map_dma + PAGE_SIZE - palette_mem_size;
469 * Set (any) board control register to handle new color depth
471 sa1100fb_set_visual(fbi, fbi->fb.fix.visual);
472 sa1100fb_activate_var(var, fbi);
479 sa1100fb_set_cmap(struct fb_cmap *cmap, int kspc, int con,
480 struct fb_info *info)
482 struct sa1100fb_info *fbi = (struct sa1100fb_info *)info;
485 * Make sure the user isn't doing something stupid.
487 if (!kspc && (fbi->fb.var.bits_per_pixel == 16 || fbi->cmap_static))
490 return gen_set_cmap(cmap, kspc, con, info);
495 * Formal definition of the VESA spec:
497 * This refers to the state of the display when it is in full operation
499 * This defines an optional operating state of minimal power reduction with
500 * the shortest recovery time
502 * This refers to a level of power management in which substantial power
503 * reduction is achieved by the display. The display can have a longer
504 * recovery time from this state than from the Stand-by state
506 * This indicates that the display is consuming the lowest level of power
507 * and is non-operational. Recovery from this state may optionally require
508 * the user to manually power on the monitor
510 * Now, the fbdev driver adds an additional state, (blank), where they
511 * turn off the video (maybe by colormap tricks), but don't mess with the
512 * video itself: think of it semantically between on and Stand-By.
514 * So here's what we should do in our fbdev blank routine:
516 * VESA_NO_BLANKING (mode 0) Video on, front/back light on
517 * VESA_VSYNC_SUSPEND (mode 1) Video on, front/back light off
518 * VESA_HSYNC_SUSPEND (mode 2) Video on, front/back light off
519 * VESA_POWERDOWN (mode 3) Video off, front/back light off
521 * This will match the matrox implementation.
525 * Blank the display by setting all palette values to zero. Note, the
526 * 12 and 16 bpp modes don't really use the palette, so this will not
527 * blank the display in all modes.
529 static int sa1100fb_blank(int blank, struct fb_info *info)
531 struct sa1100fb_info *fbi = (struct sa1100fb_info *)info;
534 dev_dbg(fbi->dev, "sa1100fb_blank: blank=%d\n", blank);
537 case FB_BLANK_POWERDOWN:
538 case FB_BLANK_VSYNC_SUSPEND:
539 case FB_BLANK_HSYNC_SUSPEND:
540 case FB_BLANK_NORMAL:
541 if (fbi->fb.fix.visual == FB_VISUAL_PSEUDOCOLOR ||
542 fbi->fb.fix.visual == FB_VISUAL_STATIC_PSEUDOCOLOR)
543 for (i = 0; i < fbi->palette_size; i++)
544 sa1100fb_setpalettereg(i, 0, 0, 0, 0, info);
545 sa1100fb_schedule_work(fbi, C_DISABLE);
548 case FB_BLANK_UNBLANK:
549 if (fbi->fb.fix.visual == FB_VISUAL_PSEUDOCOLOR ||
550 fbi->fb.fix.visual == FB_VISUAL_STATIC_PSEUDOCOLOR)
551 fb_set_cmap(&fbi->fb.cmap, info);
552 sa1100fb_schedule_work(fbi, C_ENABLE);
557 static int sa1100fb_mmap(struct fb_info *info,
558 struct vm_area_struct *vma)
560 struct sa1100fb_info *fbi = (struct sa1100fb_info *)info;
561 unsigned long start, len, off = vma->vm_pgoff << PAGE_SHIFT;
563 if (off < info->fix.smem_len) {
564 vma->vm_pgoff += 1; /* skip over the palette */
565 return dma_mmap_writecombine(fbi->dev, vma, fbi->map_cpu,
566 fbi->map_dma, fbi->map_size);
569 start = info->fix.mmio_start;
570 len = PAGE_ALIGN((start & ~PAGE_MASK) + info->fix.mmio_len);
572 if ((vma->vm_end - vma->vm_start + off) > len)
575 off += start & PAGE_MASK;
576 vma->vm_pgoff = off >> PAGE_SHIFT;
577 vma->vm_flags |= VM_IO;
578 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
579 return io_remap_pfn_range(vma, vma->vm_start, off >> PAGE_SHIFT,
580 vma->vm_end - vma->vm_start,
584 static struct fb_ops sa1100fb_ops = {
585 .owner = THIS_MODULE,
586 .fb_check_var = sa1100fb_check_var,
587 .fb_set_par = sa1100fb_set_par,
588 // .fb_set_cmap = sa1100fb_set_cmap,
589 .fb_setcolreg = sa1100fb_setcolreg,
590 .fb_fillrect = cfb_fillrect,
591 .fb_copyarea = cfb_copyarea,
592 .fb_imageblit = cfb_imageblit,
593 .fb_blank = sa1100fb_blank,
594 .fb_mmap = sa1100fb_mmap,
598 * Calculate the PCD value from the clock rate (in picoseconds).
599 * We take account of the PPCR clock setting.
601 static inline unsigned int get_pcd(unsigned int pixclock, unsigned int cpuclock)
603 unsigned int pcd = cpuclock / 100;
608 return pcd + 1; /* make up for integer math truncations */
612 * sa1100fb_activate_var():
613 * Configures LCD Controller based on entries in var parameter. Settings are
614 * only written to the controller if changes were made.
616 static int sa1100fb_activate_var(struct fb_var_screeninfo *var, struct sa1100fb_info *fbi)
618 struct sa1100fb_lcd_reg new_regs;
619 u_int half_screen_size, yres, pcd;
622 dev_dbg(fbi->dev, "Configuring SA1100 LCD\n");
624 dev_dbg(fbi->dev, "var: xres=%d hslen=%d lm=%d rm=%d\n",
625 var->xres, var->hsync_len,
626 var->left_margin, var->right_margin);
627 dev_dbg(fbi->dev, "var: yres=%d vslen=%d um=%d bm=%d\n",
628 var->yres, var->vsync_len,
629 var->upper_margin, var->lower_margin);
632 if (var->xres < 16 || var->xres > 1024)
633 dev_err(fbi->dev, "%s: invalid xres %d\n",
634 fbi->fb.fix.id, var->xres);
635 if (var->hsync_len < 1 || var->hsync_len > 64)
636 dev_err(fbi->dev, "%s: invalid hsync_len %d\n",
637 fbi->fb.fix.id, var->hsync_len);
638 if (var->left_margin < 1 || var->left_margin > 255)
639 dev_err(fbi->dev, "%s: invalid left_margin %d\n",
640 fbi->fb.fix.id, var->left_margin);
641 if (var->right_margin < 1 || var->right_margin > 255)
642 dev_err(fbi->dev, "%s: invalid right_margin %d\n",
643 fbi->fb.fix.id, var->right_margin);
644 if (var->yres < 1 || var->yres > 1024)
645 dev_err(fbi->dev, "%s: invalid yres %d\n",
646 fbi->fb.fix.id, var->yres);
647 if (var->vsync_len < 1 || var->vsync_len > 64)
648 dev_err(fbi->dev, "%s: invalid vsync_len %d\n",
649 fbi->fb.fix.id, var->vsync_len);
650 if (var->upper_margin < 0 || var->upper_margin > 255)
651 dev_err(fbi->dev, "%s: invalid upper_margin %d\n",
652 fbi->fb.fix.id, var->upper_margin);
653 if (var->lower_margin < 0 || var->lower_margin > 255)
654 dev_err(fbi->dev, "%s: invalid lower_margin %d\n",
655 fbi->fb.fix.id, var->lower_margin);
658 new_regs.lccr0 = fbi->lccr0 |
659 LCCR0_LEN | LCCR0_LDM | LCCR0_BAM |
660 LCCR0_ERM | LCCR0_LtlEnd | LCCR0_DMADel(0);
663 LCCR1_DisWdth(var->xres) +
664 LCCR1_HorSnchWdth(var->hsync_len) +
665 LCCR1_BegLnDel(var->left_margin) +
666 LCCR1_EndLnDel(var->right_margin);
669 * If we have a dual scan LCD, then we need to halve
670 * the YRES parameter.
673 if (fbi->lccr0 & LCCR0_Dual)
677 LCCR2_DisHght(yres) +
678 LCCR2_VrtSnchWdth(var->vsync_len) +
679 LCCR2_BegFrmDel(var->upper_margin) +
680 LCCR2_EndFrmDel(var->lower_margin);
682 pcd = get_pcd(var->pixclock, cpufreq_get(0));
683 new_regs.lccr3 = LCCR3_PixClkDiv(pcd) | fbi->lccr3 |
684 (var->sync & FB_SYNC_HOR_HIGH_ACT ? LCCR3_HorSnchH : LCCR3_HorSnchL) |
685 (var->sync & FB_SYNC_VERT_HIGH_ACT ? LCCR3_VrtSnchH : LCCR3_VrtSnchL);
687 dev_dbg(fbi->dev, "nlccr0 = 0x%08lx\n", new_regs.lccr0);
688 dev_dbg(fbi->dev, "nlccr1 = 0x%08lx\n", new_regs.lccr1);
689 dev_dbg(fbi->dev, "nlccr2 = 0x%08lx\n", new_regs.lccr2);
690 dev_dbg(fbi->dev, "nlccr3 = 0x%08lx\n", new_regs.lccr3);
692 half_screen_size = var->bits_per_pixel;
693 half_screen_size = half_screen_size * var->xres * var->yres / 16;
695 /* Update shadow copy atomically */
696 local_irq_save(flags);
697 fbi->dbar1 = fbi->palette_dma;
698 fbi->dbar2 = fbi->screen_dma + half_screen_size;
700 fbi->reg_lccr0 = new_regs.lccr0;
701 fbi->reg_lccr1 = new_regs.lccr1;
702 fbi->reg_lccr2 = new_regs.lccr2;
703 fbi->reg_lccr3 = new_regs.lccr3;
704 local_irq_restore(flags);
707 * Only update the registers if the controller is enabled
708 * and something has changed.
710 if ((LCCR0 != fbi->reg_lccr0) || (LCCR1 != fbi->reg_lccr1) ||
711 (LCCR2 != fbi->reg_lccr2) || (LCCR3 != fbi->reg_lccr3) ||
712 (DBAR1 != fbi->dbar1) || (DBAR2 != fbi->dbar2))
713 sa1100fb_schedule_work(fbi, C_REENABLE);
719 * NOTE! The following functions are purely helpers for set_ctrlr_state.
720 * Do not call them directly; set_ctrlr_state does the correct serialisation
721 * to ensure that things happen in the right way 100% of time time.
724 static inline void __sa1100fb_backlight_power(struct sa1100fb_info *fbi, int on)
726 dev_dbg(fbi->dev, "backlight o%s\n", on ? "n" : "ff");
728 if (fbi->inf->backlight_power)
729 fbi->inf->backlight_power(on);
732 static inline void __sa1100fb_lcd_power(struct sa1100fb_info *fbi, int on)
734 dev_dbg(fbi->dev, "LCD power o%s\n", on ? "n" : "ff");
736 if (fbi->inf->lcd_power)
737 fbi->inf->lcd_power(on);
740 static void sa1100fb_setup_gpio(struct sa1100fb_info *fbi)
745 * Enable GPIO<9:2> for LCD use if:
746 * 1. Active display, or
747 * 2. Color Dual Passive display
749 * see table 11.8 on page 11-27 in the SA1100 manual
752 * SA1110 spec update nr. 25 says we can and should
753 * clear LDD15 to 12 for 4 or 8bpp modes with active
756 if ((fbi->reg_lccr0 & LCCR0_CMS) == LCCR0_Color &&
757 (fbi->reg_lccr0 & (LCCR0_Dual|LCCR0_Act)) != 0) {
758 mask = GPIO_LDD11 | GPIO_LDD10 | GPIO_LDD9 | GPIO_LDD8;
760 if (fbi->fb.var.bits_per_pixel > 8 ||
761 (fbi->reg_lccr0 & (LCCR0_Dual|LCCR0_Act)) == LCCR0_Dual)
762 mask |= GPIO_LDD15 | GPIO_LDD14 | GPIO_LDD13 | GPIO_LDD12;
772 static void sa1100fb_enable_controller(struct sa1100fb_info *fbi)
774 dev_dbg(fbi->dev, "Enabling LCD controller\n");
777 * Make sure the mode bits are present in the first palette entry
779 fbi->palette_cpu[0] &= 0xcfff;
780 fbi->palette_cpu[0] |= palette_pbs(&fbi->fb.var);
782 /* Sequence from 11.7.10 */
783 LCCR3 = fbi->reg_lccr3;
784 LCCR2 = fbi->reg_lccr2;
785 LCCR1 = fbi->reg_lccr1;
786 LCCR0 = fbi->reg_lccr0 & ~LCCR0_LEN;
791 if (machine_is_shannon()) {
792 GPDR |= SHANNON_GPIO_DISP_EN;
793 GPSR |= SHANNON_GPIO_DISP_EN;
796 dev_dbg(fbi->dev, "DBAR1 = 0x%08lx\n", DBAR1);
797 dev_dbg(fbi->dev, "DBAR2 = 0x%08lx\n", DBAR2);
798 dev_dbg(fbi->dev, "LCCR0 = 0x%08lx\n", LCCR0);
799 dev_dbg(fbi->dev, "LCCR1 = 0x%08lx\n", LCCR1);
800 dev_dbg(fbi->dev, "LCCR2 = 0x%08lx\n", LCCR2);
801 dev_dbg(fbi->dev, "LCCR3 = 0x%08lx\n", LCCR3);
804 static void sa1100fb_disable_controller(struct sa1100fb_info *fbi)
806 DECLARE_WAITQUEUE(wait, current);
808 dev_dbg(fbi->dev, "Disabling LCD controller\n");
810 if (machine_is_shannon()) {
811 GPCR |= SHANNON_GPIO_DISP_EN;
814 set_current_state(TASK_UNINTERRUPTIBLE);
815 add_wait_queue(&fbi->ctrlr_wait, &wait);
817 LCSR = 0xffffffff; /* Clear LCD Status Register */
818 LCCR0 &= ~LCCR0_LDM; /* Enable LCD Disable Done Interrupt */
819 LCCR0 &= ~LCCR0_LEN; /* Disable LCD Controller */
821 schedule_timeout(20 * HZ / 1000);
822 remove_wait_queue(&fbi->ctrlr_wait, &wait);
826 * sa1100fb_handle_irq: Handle 'LCD DONE' interrupts.
828 static irqreturn_t sa1100fb_handle_irq(int irq, void *dev_id)
830 struct sa1100fb_info *fbi = dev_id;
831 unsigned int lcsr = LCSR;
833 if (lcsr & LCSR_LDD) {
835 wake_up(&fbi->ctrlr_wait);
843 * This function must be called from task context only, since it will
844 * sleep when disabling the LCD controller, or if we get two contending
845 * processes trying to alter state.
847 static void set_ctrlr_state(struct sa1100fb_info *fbi, u_int state)
851 mutex_lock(&fbi->ctrlr_lock);
853 old_state = fbi->state;
856 * Hack around fbcon initialisation.
858 if (old_state == C_STARTUP && state == C_REENABLE)
862 case C_DISABLE_CLKCHANGE:
864 * Disable controller for clock change. If the
865 * controller is already disabled, then do nothing.
867 if (old_state != C_DISABLE && old_state != C_DISABLE_PM) {
869 sa1100fb_disable_controller(fbi);
878 if (old_state != C_DISABLE) {
881 __sa1100fb_backlight_power(fbi, 0);
882 if (old_state != C_DISABLE_CLKCHANGE)
883 sa1100fb_disable_controller(fbi);
884 __sa1100fb_lcd_power(fbi, 0);
888 case C_ENABLE_CLKCHANGE:
890 * Enable the controller after clock change. Only
891 * do this if we were disabled for the clock change.
893 if (old_state == C_DISABLE_CLKCHANGE) {
894 fbi->state = C_ENABLE;
895 sa1100fb_enable_controller(fbi);
901 * Re-enable the controller only if it was already
902 * enabled. This is so we reprogram the control
905 if (old_state == C_ENABLE) {
906 sa1100fb_disable_controller(fbi);
907 sa1100fb_setup_gpio(fbi);
908 sa1100fb_enable_controller(fbi);
914 * Re-enable the controller after PM. This is not
915 * perfect - think about the case where we were doing
916 * a clock change, and we suspended half-way through.
918 if (old_state != C_DISABLE_PM)
924 * Power up the LCD screen, enable controller, and
925 * turn on the backlight.
927 if (old_state != C_ENABLE) {
928 fbi->state = C_ENABLE;
929 sa1100fb_setup_gpio(fbi);
930 __sa1100fb_lcd_power(fbi, 1);
931 sa1100fb_enable_controller(fbi);
932 __sa1100fb_backlight_power(fbi, 1);
936 mutex_unlock(&fbi->ctrlr_lock);
940 * Our LCD controller task (which is called when we blank or unblank)
943 static void sa1100fb_task(struct work_struct *w)
945 struct sa1100fb_info *fbi = container_of(w, struct sa1100fb_info, task);
946 u_int state = xchg(&fbi->task_state, -1);
948 set_ctrlr_state(fbi, state);
951 #ifdef CONFIG_CPU_FREQ
953 * Calculate the minimum DMA period over all displays that we own.
954 * This, together with the SDRAM bandwidth defines the slowest CPU
955 * frequency that can be selected.
957 static unsigned int sa1100fb_min_dma_period(struct sa1100fb_info *fbi)
960 unsigned int min_period = (unsigned int)-1;
963 for (i = 0; i < MAX_NR_CONSOLES; i++) {
964 struct display *disp = &fb_display[i];
968 * Do we own this display?
970 if (disp->fb_info != &fbi->fb)
974 * Ok, calculate its DMA period
976 period = sa1100fb_display_dma_period(&disp->var);
977 if (period < min_period)
984 * FIXME: we need to verify _all_ consoles.
986 return sa1100fb_display_dma_period(&fbi->fb.var);
991 * CPU clock speed change handler. We need to adjust the LCD timing
992 * parameters when the CPU clock is adjusted by the power management
996 sa1100fb_freq_transition(struct notifier_block *nb, unsigned long val,
999 struct sa1100fb_info *fbi = TO_INF(nb, freq_transition);
1000 struct cpufreq_freqs *f = data;
1004 case CPUFREQ_PRECHANGE:
1005 set_ctrlr_state(fbi, C_DISABLE_CLKCHANGE);
1008 case CPUFREQ_POSTCHANGE:
1009 pcd = get_pcd(fbi->fb.var.pixclock, f->new);
1010 fbi->reg_lccr3 = (fbi->reg_lccr3 & ~0xff) | LCCR3_PixClkDiv(pcd);
1011 set_ctrlr_state(fbi, C_ENABLE_CLKCHANGE);
1018 sa1100fb_freq_policy(struct notifier_block *nb, unsigned long val,
1021 struct sa1100fb_info *fbi = TO_INF(nb, freq_policy);
1022 struct cpufreq_policy *policy = data;
1025 case CPUFREQ_ADJUST:
1026 case CPUFREQ_INCOMPATIBLE:
1027 dev_dbg(fbi->dev, "min dma period: %d ps, "
1028 "new clock %d kHz\n", sa1100fb_min_dma_period(fbi),
1030 /* todo: fill in min/max values */
1032 case CPUFREQ_NOTIFY:
1034 /* todo: panic if min/max values aren't fulfilled
1035 * [can't really happen unless there's a bug in the
1036 * CPU policy verififcation process *
1046 * Power management hooks. Note that we won't be called from IRQ context,
1047 * unlike the blank functions above, so we may sleep.
1049 static int sa1100fb_suspend(struct platform_device *dev, pm_message_t state)
1051 struct sa1100fb_info *fbi = platform_get_drvdata(dev);
1053 set_ctrlr_state(fbi, C_DISABLE_PM);
1057 static int sa1100fb_resume(struct platform_device *dev)
1059 struct sa1100fb_info *fbi = platform_get_drvdata(dev);
1061 set_ctrlr_state(fbi, C_ENABLE_PM);
1065 #define sa1100fb_suspend NULL
1066 #define sa1100fb_resume NULL
1070 * sa1100fb_map_video_memory():
1071 * Allocates the DRAM memory for the frame buffer. This buffer is
1072 * remapped into a non-cached, non-buffered, memory region to
1073 * allow palette and pixel writes to occur without flushing the
1074 * cache. Once this area is remapped, all virtual memory
1075 * access to the video memory should occur at the new region.
1077 static int __devinit sa1100fb_map_video_memory(struct sa1100fb_info *fbi)
1080 * We reserve one page for the palette, plus the size
1081 * of the framebuffer.
1083 fbi->map_size = PAGE_ALIGN(fbi->fb.fix.smem_len + PAGE_SIZE);
1084 fbi->map_cpu = dma_alloc_writecombine(fbi->dev, fbi->map_size,
1085 &fbi->map_dma, GFP_KERNEL);
1088 fbi->fb.screen_base = fbi->map_cpu + PAGE_SIZE;
1089 fbi->screen_dma = fbi->map_dma + PAGE_SIZE;
1091 * FIXME: this is actually the wrong thing to place in
1092 * smem_start. But fbdev suffers from the problem that
1093 * it needs an API which doesn't exist (in this case,
1094 * dma_writecombine_mmap)
1096 fbi->fb.fix.smem_start = fbi->screen_dma;
1099 return fbi->map_cpu ? 0 : -ENOMEM;
1102 /* Fake monspecs to fill in fbinfo structure */
1103 static struct fb_monspecs monspecs __devinitdata = {
1111 static struct sa1100fb_info * __devinit sa1100fb_init_fbinfo(struct device *dev)
1113 struct sa1100fb_mach_info *inf = dev->platform_data;
1114 struct sa1100fb_info *fbi;
1117 fbi = kmalloc(sizeof(struct sa1100fb_info) + sizeof(u32) * 16,
1122 memset(fbi, 0, sizeof(struct sa1100fb_info));
1125 strcpy(fbi->fb.fix.id, SA1100_NAME);
1127 fbi->fb.fix.type = FB_TYPE_PACKED_PIXELS;
1128 fbi->fb.fix.type_aux = 0;
1129 fbi->fb.fix.xpanstep = 0;
1130 fbi->fb.fix.ypanstep = 0;
1131 fbi->fb.fix.ywrapstep = 0;
1132 fbi->fb.fix.accel = FB_ACCEL_NONE;
1134 fbi->fb.var.nonstd = 0;
1135 fbi->fb.var.activate = FB_ACTIVATE_NOW;
1136 fbi->fb.var.height = -1;
1137 fbi->fb.var.width = -1;
1138 fbi->fb.var.accel_flags = 0;
1139 fbi->fb.var.vmode = FB_VMODE_NONINTERLACED;
1141 fbi->fb.fbops = &sa1100fb_ops;
1142 fbi->fb.flags = FBINFO_DEFAULT;
1143 fbi->fb.monspecs = monspecs;
1144 fbi->fb.pseudo_palette = (fbi + 1);
1146 fbi->rgb[RGB_4] = &rgb_4;
1147 fbi->rgb[RGB_8] = &rgb_8;
1148 fbi->rgb[RGB_16] = &def_rgb_16;
1151 * People just don't seem to get this. We don't support
1152 * anything but correct entries now, so panic if someone
1153 * does something stupid.
1155 if (inf->lccr3 & (LCCR3_VrtSnchL|LCCR3_HorSnchL|0xff) ||
1157 panic("sa1100fb error: invalid LCCR3 fields set or zero "
1160 fbi->max_xres = inf->xres;
1161 fbi->fb.var.xres = inf->xres;
1162 fbi->fb.var.xres_virtual = inf->xres;
1163 fbi->max_yres = inf->yres;
1164 fbi->fb.var.yres = inf->yres;
1165 fbi->fb.var.yres_virtual = inf->yres;
1166 fbi->max_bpp = inf->bpp;
1167 fbi->fb.var.bits_per_pixel = inf->bpp;
1168 fbi->fb.var.pixclock = inf->pixclock;
1169 fbi->fb.var.hsync_len = inf->hsync_len;
1170 fbi->fb.var.left_margin = inf->left_margin;
1171 fbi->fb.var.right_margin = inf->right_margin;
1172 fbi->fb.var.vsync_len = inf->vsync_len;
1173 fbi->fb.var.upper_margin = inf->upper_margin;
1174 fbi->fb.var.lower_margin = inf->lower_margin;
1175 fbi->fb.var.sync = inf->sync;
1176 fbi->fb.var.grayscale = inf->cmap_greyscale;
1177 fbi->cmap_inverse = inf->cmap_inverse;
1178 fbi->cmap_static = inf->cmap_static;
1179 fbi->lccr0 = inf->lccr0;
1180 fbi->lccr3 = inf->lccr3;
1181 fbi->state = C_STARTUP;
1182 fbi->task_state = (u_char)-1;
1183 fbi->fb.fix.smem_len = fbi->max_xres * fbi->max_yres *
1187 /* Copy the RGB bitfield overrides */
1188 for (i = 0; i < NR_RGB; i++)
1190 fbi->rgb[i] = inf->rgb[i];
1192 init_waitqueue_head(&fbi->ctrlr_wait);
1193 INIT_WORK(&fbi->task, sa1100fb_task);
1194 mutex_init(&fbi->ctrlr_lock);
1199 static int __devinit sa1100fb_probe(struct platform_device *pdev)
1201 struct sa1100fb_info *fbi;
1204 if (!pdev->dev.platform_data) {
1205 dev_err(&pdev->dev, "no platform LCD data\n");
1209 irq = platform_get_irq(pdev, 0);
1213 if (!request_mem_region(0xb0100000, 0x10000, "LCD"))
1216 fbi = sa1100fb_init_fbinfo(&pdev->dev);
1221 /* Initialize video memory */
1222 ret = sa1100fb_map_video_memory(fbi);
1226 ret = request_irq(irq, sa1100fb_handle_irq, 0, "LCD", fbi);
1228 dev_err(&pdev->dev, "request_irq failed: %d\n", ret);
1232 #ifdef ASSABET_PAL_VIDEO
1233 if (machine_is_assabet())
1234 ASSABET_BCR_clear(ASSABET_BCR_LCD_ON);
1238 * This makes sure that our colour bitfield
1239 * descriptors are correctly initialised.
1241 sa1100fb_check_var(&fbi->fb.var, &fbi->fb);
1243 platform_set_drvdata(pdev, fbi);
1245 ret = register_framebuffer(&fbi->fb);
1249 #ifdef CONFIG_CPU_FREQ
1250 fbi->freq_transition.notifier_call = sa1100fb_freq_transition;
1251 fbi->freq_policy.notifier_call = sa1100fb_freq_policy;
1252 cpufreq_register_notifier(&fbi->freq_transition, CPUFREQ_TRANSITION_NOTIFIER);
1253 cpufreq_register_notifier(&fbi->freq_policy, CPUFREQ_POLICY_NOTIFIER);
1256 /* This driver cannot be unloaded at the moment */
1262 platform_set_drvdata(pdev, NULL);
1264 release_mem_region(0xb0100000, 0x10000);
1268 static struct platform_driver sa1100fb_driver = {
1269 .probe = sa1100fb_probe,
1270 .suspend = sa1100fb_suspend,
1271 .resume = sa1100fb_resume,
1273 .name = "sa11x0-fb",
1274 .owner = THIS_MODULE,
1278 int __init sa1100fb_init(void)
1280 if (fb_get_options("sa1100fb", NULL))
1283 return platform_driver_register(&sa1100fb_driver);
1286 int __init sa1100fb_setup(char *options)
1291 if (!options || !*options)
1294 while ((this_opt = strsep(&options, ",")) != NULL) {
1296 if (!strncmp(this_opt, "bpp:", 4))
1297 current_par.max_bpp =
1298 simple_strtoul(this_opt + 4, NULL, 0);
1300 if (!strncmp(this_opt, "lccr0:", 6))
1302 simple_strtoul(this_opt + 6, NULL, 0);
1303 if (!strncmp(this_opt, "lccr1:", 6)) {
1305 simple_strtoul(this_opt + 6, NULL, 0);
1306 current_par.max_xres =
1307 (lcd_shadow.lccr1 & 0x3ff) + 16;
1309 if (!strncmp(this_opt, "lccr2:", 6)) {
1311 simple_strtoul(this_opt + 6, NULL, 0);
1312 current_par.max_yres =
1314 lccr0 & LCCR0_SDS) ? ((lcd_shadow.
1317 2 : ((lcd_shadow.lccr2 & 0x3ff) + 1);
1319 if (!strncmp(this_opt, "lccr3:", 6))
1321 simple_strtoul(this_opt + 6, NULL, 0);
1327 module_init(sa1100fb_init);
1328 MODULE_DESCRIPTION("StrongARM-1100/1110 framebuffer driver");
1329 MODULE_LICENSE("GPL");