2 * Renesas SH-mobile MIPI DSI support
4 * Copyright (C) 2010 Guennadi Liakhovetski <g.liakhovetski@gmx.de>
6 * This is free software; you can redistribute it and/or modify
7 * it under the terms of version 2 of the GNU General Public License as
8 * published by the Free Software Foundation.
11 #include <linux/clk.h>
12 #include <linux/delay.h>
13 #include <linux/init.h>
15 #include <linux/platform_device.h>
16 #include <linux/pm_runtime.h>
17 #include <linux/slab.h>
18 #include <linux/string.h>
19 #include <linux/types.h>
20 #include <linux/module.h>
22 #include <video/mipi_display.h>
23 #include <video/sh_mipi_dsi.h>
24 #include <video/sh_mobile_lcdc.h>
26 #define SYSCTRL 0x0000
27 #define SYSCONF 0x0004
29 #define RESREQSET0 0x0018
30 #define RESREQSET1 0x001c
31 #define HSTTOVSET 0x0020
32 #define LPRTOVSET 0x0024
33 #define TATOVSET 0x0028
34 #define PRTOVSET 0x002c
35 #define DSICTRL 0x0030
36 #define DSIINTE 0x0060
37 #define PHYCTRL 0x0070
39 /* relative to linkbase */
44 #define CMTSRTREQ 0x0070
45 #define CMTSRTCTR 0x00d0
47 /* E.g., sh7372 has 2 MIPI-DSIs - one for each LCDC */
48 #define MAX_SH_MIPI_DSI 2
52 void __iomem *linkbase;
57 void *next_board_data;
58 void (*next_display_on)(void *board_data, struct fb_info *info);
59 void (*next_display_off)(void *board_data);
62 static struct sh_mipi *mipi_dsi[MAX_SH_MIPI_DSI];
64 /* Protect the above array */
65 static DEFINE_MUTEX(array_lock);
67 static struct sh_mipi *sh_mipi_by_handle(int handle)
69 if (handle >= ARRAY_SIZE(mipi_dsi) || handle < 0)
72 return mipi_dsi[handle];
75 static int sh_mipi_send_short(struct sh_mipi *mipi, u8 dsi_cmd,
78 u32 data = (dsi_cmd << 24) | (cmd << 16) | (param << 8);
81 /* transmit a short packet to LCD panel */
82 iowrite32(1 | data, mipi->linkbase + CMTSRTCTR);
83 iowrite32(1, mipi->linkbase + CMTSRTREQ);
85 while ((ioread32(mipi->linkbase + CMTSRTREQ) & 1) && --cnt)
88 return cnt ? 0 : -ETIMEDOUT;
91 #define LCD_CHAN2MIPI(c) ((c) < LCDC_CHAN_MAINLCD || (c) > LCDC_CHAN_SUBLCD ? \
94 static int sh_mipi_dcs(int handle, u8 cmd)
96 struct sh_mipi *mipi = sh_mipi_by_handle(LCD_CHAN2MIPI(handle));
99 return sh_mipi_send_short(mipi, MIPI_DSI_DCS_SHORT_WRITE, cmd, 0);
102 static int sh_mipi_dcs_param(int handle, u8 cmd, u8 param)
104 struct sh_mipi *mipi = sh_mipi_by_handle(LCD_CHAN2MIPI(handle));
107 return sh_mipi_send_short(mipi, MIPI_DSI_DCS_SHORT_WRITE_PARAM, cmd,
111 static void sh_mipi_dsi_enable(struct sh_mipi *mipi, bool enable)
114 * enable LCDC data tx, transition to LPS after completion of each HS
117 iowrite32(0x00000002 | enable, mipi->linkbase + DTCTR);
120 static void sh_mipi_shutdown(struct platform_device *pdev)
122 struct sh_mipi *mipi = platform_get_drvdata(pdev);
124 sh_mipi_dsi_enable(mipi, false);
127 static void mipi_display_on(void *arg, struct fb_info *info)
129 struct sh_mipi *mipi = arg;
131 pm_runtime_get_sync(mipi->dev);
132 sh_mipi_dsi_enable(mipi, true);
134 if (mipi->next_display_on)
135 mipi->next_display_on(mipi->next_board_data, info);
138 static void mipi_display_off(void *arg)
140 struct sh_mipi *mipi = arg;
142 if (mipi->next_display_off)
143 mipi->next_display_off(mipi->next_board_data);
145 sh_mipi_dsi_enable(mipi, false);
146 pm_runtime_put(mipi->dev);
149 static int __init sh_mipi_setup(struct sh_mipi *mipi,
150 struct sh_mipi_dsi_info *pdata)
152 void __iomem *base = mipi->base;
153 struct sh_mobile_lcdc_chan_cfg *ch = pdata->lcd_chan;
154 u32 pctype, datatype, pixfmt, linelength, vmctr2 = 0x00e00000;
158 * Select data format. MIPI DSI is not hot-pluggable, so, we just use
159 * the default videomode. If this ever becomes a problem, We'll have to
160 * move this to mipi_display_on() above and use info->var.xres
162 switch (pdata->data_format) {
165 datatype = MIPI_DSI_PACKED_PIXEL_STREAM_24;
166 pixfmt = MIPI_DCS_PIXEL_FMT_24BIT;
167 linelength = ch->lcd_cfg[0].xres * 3;
172 datatype = MIPI_DSI_PACKED_PIXEL_STREAM_16;
173 pixfmt = MIPI_DCS_PIXEL_FMT_16BIT;
174 linelength = ch->lcd_cfg[0].xres * 2;
179 datatype = MIPI_DSI_PIXEL_STREAM_3BYTE_18;
180 pixfmt = MIPI_DCS_PIXEL_FMT_24BIT;
181 linelength = ch->lcd_cfg[0].xres * 3;
186 datatype = MIPI_DSI_PACKED_PIXEL_STREAM_18;
187 pixfmt = MIPI_DCS_PIXEL_FMT_18BIT;
188 linelength = (ch->lcd_cfg[0].xres * 18 + 7) / 8;
193 datatype = MIPI_DSI_PACKED_PIXEL_STREAM_24;
194 pixfmt = MIPI_DCS_PIXEL_FMT_24BIT;
195 linelength = ch->lcd_cfg[0].xres * 3;
200 datatype = MIPI_DSI_PACKED_PIXEL_STREAM_16;
201 pixfmt = MIPI_DCS_PIXEL_FMT_16BIT;
202 linelength = ch->lcd_cfg[0].xres * 2;
207 datatype = MIPI_DSI_PIXEL_STREAM_3BYTE_18;
208 pixfmt = MIPI_DCS_PIXEL_FMT_24BIT;
209 linelength = ch->lcd_cfg[0].xres * 3;
214 datatype = MIPI_DSI_PACKED_PIXEL_STREAM_18;
215 pixfmt = MIPI_DCS_PIXEL_FMT_18BIT;
216 linelength = (ch->lcd_cfg[0].xres * 18 + 7) / 8;
221 datatype = MIPI_DSI_PACKED_PIXEL_STREAM_YCBCR16;
222 pixfmt = MIPI_DCS_PIXEL_FMT_16BIT;
223 linelength = ch->lcd_cfg[0].xres * 2;
228 datatype = MIPI_DSI_PACKED_PIXEL_STREAM_YCBCR16;
229 pixfmt = MIPI_DCS_PIXEL_FMT_16BIT;
230 linelength = ch->lcd_cfg[0].xres * 2;
235 datatype = MIPI_DSI_PACKED_PIXEL_STREAM_YCBCR12;
236 pixfmt = MIPI_DCS_PIXEL_FMT_12BIT;
237 linelength = (ch->lcd_cfg[0].xres * 12 + 7) / 8;
242 datatype = MIPI_DSI_PACKED_PIXEL_STREAM_YCBCR12;
243 pixfmt = MIPI_DCS_PIXEL_FMT_12BIT;
244 /* Length of U/V line */
245 linelength = (ch->lcd_cfg[0].xres + 1) / 2;
252 if ((yuv && ch->interface_type != YUV422) ||
253 (!yuv && ch->interface_type != RGB24))
257 iowrite32(0x00000001, base + SYSCTRL);
258 /* Hold reset for 100 cycles of the slowest of bus, HS byte and LP clock */
260 iowrite32(0x00000000, base + SYSCTRL);
265 * Default = ULPS enable |
266 * Contention detection enabled |
267 * EoT packet transmission enable |
270 * additionally enable first two lanes
272 iowrite32(0x00003703, base + SYSCONF);
280 iowrite32(0x70003332, base + TIMSET);
281 /* no responses requested */
282 iowrite32(0x00000000, base + RESREQSET0);
283 /* request response to packets of type 0x28 */
284 iowrite32(0x00000100, base + RESREQSET1);
285 /* High-speed transmission timeout, default 0xffffffff */
286 iowrite32(0x0fffffff, base + HSTTOVSET);
287 /* LP reception timeout, default 0xffffffff */
288 iowrite32(0x0fffffff, base + LPRTOVSET);
289 /* Turn-around timeout, default 0xffffffff */
290 iowrite32(0x0fffffff, base + TATOVSET);
291 /* Peripheral reset timeout, default 0xffffffff */
292 iowrite32(0x0fffffff, base + PRTOVSET);
293 /* Enable timeout counters */
294 iowrite32(0x00000f00, base + DSICTRL);
295 /* Interrupts not used, disable all */
296 iowrite32(0, base + DSIINTE);
298 iowrite32(0x00000001, base + PHYCTRL);
300 /* Deassert resets, power on, set multiplier */
301 iowrite32(0x03070b01, base + PHYCTRL);
306 * Enable transmission of all packets,
307 * transmit LPS after each HS packet completion
309 iowrite32(0x00000006, mipi->linkbase + DTCTR);
310 /* VSYNC width = 2 (<< 17) */
311 iowrite32((ch->lcd_cfg[0].vsync_len << pdata->vsynw_offset) |
312 (pdata->clksrc << 16) | (pctype << 12) | datatype,
313 mipi->linkbase + VMCTR1);
316 * Non-burst mode with sync pulses: VSE and HSE are output,
317 * HSA period allowed, no commands in LP
319 if (pdata->flags & SH_MIPI_DSI_HSABM)
321 if (pdata->flags & SH_MIPI_DSI_HSPBM)
323 iowrite32(vmctr2, mipi->linkbase + VMCTR2);
326 * 0x660 = 1632 bytes per line (RGB24, 544 pixels: see
327 * sh_mobile_lcdc_info.ch[0].lcd_cfg[0].xres), HSALEN = 1 - default
328 * (unused if VMCTR2[HSABM] = 0)
330 iowrite32(1 | (linelength << 16), mipi->linkbase + VMLEN1);
334 /* setup LCD panel */
336 /* cf. drivers/video/omap/lcd_mipid.c */
337 sh_mipi_dcs(ch->chan, MIPI_DCS_EXIT_SLEEP_MODE);
340 * [7] - Page Address Mode
341 * [6] - Column Address Mode
342 * [5] - Page / Column Address Mode
343 * [4] - Display Device Line Refresh Order
344 * [3] - RGB/BGR Order
345 * [2] - Display Data Latch Data Order
346 * [1] - Flip Horizontal
347 * [0] - Flip Vertical
349 sh_mipi_dcs_param(ch->chan, MIPI_DCS_SET_ADDRESS_MODE, 0x00);
350 /* cf. set_data_lines() */
351 sh_mipi_dcs_param(ch->chan, MIPI_DCS_SET_PIXEL_FORMAT,
353 sh_mipi_dcs(ch->chan, MIPI_DCS_SET_DISPLAY_ON);
358 static int __init sh_mipi_probe(struct platform_device *pdev)
360 struct sh_mipi *mipi;
361 struct sh_mipi_dsi_info *pdata = pdev->dev.platform_data;
362 struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
363 struct resource *res2 = platform_get_resource(pdev, IORESOURCE_MEM, 1);
364 unsigned long rate, f_current;
365 int idx = pdev->id, ret;
366 char dsip_clk[] = "dsi.p_clk";
368 if (!res || !res2 || idx >= ARRAY_SIZE(mipi_dsi) || !pdata)
371 mutex_lock(&array_lock);
373 for (idx = 0; idx < ARRAY_SIZE(mipi_dsi) && mipi_dsi[idx]; idx++)
376 if (idx == ARRAY_SIZE(mipi_dsi)) {
381 mipi = kzalloc(sizeof(*mipi), GFP_KERNEL);
387 if (!request_mem_region(res->start, resource_size(res), pdev->name)) {
388 dev_err(&pdev->dev, "MIPI register region already claimed\n");
393 mipi->base = ioremap(res->start, resource_size(res));
399 if (!request_mem_region(res2->start, resource_size(res2), pdev->name)) {
400 dev_err(&pdev->dev, "MIPI register region 2 already claimed\n");
405 mipi->linkbase = ioremap(res2->start, resource_size(res2));
406 if (!mipi->linkbase) {
411 mipi->dev = &pdev->dev;
413 mipi->dsit_clk = clk_get(&pdev->dev, "dsit_clk");
414 if (IS_ERR(mipi->dsit_clk)) {
415 ret = PTR_ERR(mipi->dsit_clk);
419 f_current = clk_get_rate(mipi->dsit_clk);
420 /* 80MHz required by the datasheet */
421 rate = clk_round_rate(mipi->dsit_clk, 80000000);
422 if (rate > 0 && rate != f_current)
423 ret = clk_set_rate(mipi->dsit_clk, rate);
429 dev_dbg(&pdev->dev, "DSI-T clk %lu -> %lu\n", f_current, rate);
431 sprintf(dsip_clk, "dsi%1.1dp_clk", idx);
432 mipi->dsip_clk = clk_get(&pdev->dev, dsip_clk);
433 if (IS_ERR(mipi->dsip_clk)) {
434 ret = PTR_ERR(mipi->dsip_clk);
438 f_current = clk_get_rate(mipi->dsip_clk);
439 /* Between 10 and 50MHz */
440 rate = clk_round_rate(mipi->dsip_clk, 24000000);
441 if (rate > 0 && rate != f_current)
442 ret = clk_set_rate(mipi->dsip_clk, rate);
448 dev_dbg(&pdev->dev, "DSI-P clk %lu -> %lu\n", f_current, rate);
452 ret = clk_enable(mipi->dsit_clk);
456 ret = clk_enable(mipi->dsip_clk);
460 mipi_dsi[idx] = mipi;
462 pm_runtime_enable(&pdev->dev);
463 pm_runtime_resume(&pdev->dev);
465 ret = sh_mipi_setup(mipi, pdata);
469 mutex_unlock(&array_lock);
470 platform_set_drvdata(pdev, mipi);
472 /* Save original LCDC callbacks */
473 mipi->next_board_data = pdata->lcd_chan->board_cfg.board_data;
474 mipi->next_display_on = pdata->lcd_chan->board_cfg.display_on;
475 mipi->next_display_off = pdata->lcd_chan->board_cfg.display_off;
477 /* Set up LCDC callbacks */
478 pdata->lcd_chan->board_cfg.board_data = mipi;
479 pdata->lcd_chan->board_cfg.display_on = mipi_display_on;
480 pdata->lcd_chan->board_cfg.display_off = mipi_display_off;
481 pdata->lcd_chan->board_cfg.owner = THIS_MODULE;
486 mipi_dsi[idx] = NULL;
487 pm_runtime_disable(&pdev->dev);
488 clk_disable(mipi->dsip_clk);
490 clk_disable(mipi->dsit_clk);
493 clk_put(mipi->dsip_clk);
496 clk_put(mipi->dsit_clk);
498 iounmap(mipi->linkbase);
500 release_mem_region(res2->start, resource_size(res2));
504 release_mem_region(res->start, resource_size(res));
509 mutex_unlock(&array_lock);
514 static int __exit sh_mipi_remove(struct platform_device *pdev)
516 struct sh_mipi_dsi_info *pdata = pdev->dev.platform_data;
517 struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
518 struct resource *res2 = platform_get_resource(pdev, IORESOURCE_MEM, 1);
519 struct sh_mipi *mipi = platform_get_drvdata(pdev);
522 mutex_lock(&array_lock);
524 for (i = 0; i < ARRAY_SIZE(mipi_dsi) && mipi_dsi[i] != mipi; i++)
527 if (i == ARRAY_SIZE(mipi_dsi)) {
534 mutex_unlock(&array_lock);
539 pdata->lcd_chan->board_cfg.owner = NULL;
540 pdata->lcd_chan->board_cfg.display_on = NULL;
541 pdata->lcd_chan->board_cfg.display_off = NULL;
542 pdata->lcd_chan->board_cfg.board_data = NULL;
544 pm_runtime_disable(&pdev->dev);
545 clk_disable(mipi->dsip_clk);
546 clk_disable(mipi->dsit_clk);
547 clk_put(mipi->dsit_clk);
548 clk_put(mipi->dsip_clk);
549 iounmap(mipi->linkbase);
551 release_mem_region(res2->start, resource_size(res2));
554 release_mem_region(res->start, resource_size(res));
555 platform_set_drvdata(pdev, NULL);
561 static struct platform_driver sh_mipi_driver = {
562 .remove = __exit_p(sh_mipi_remove),
563 .shutdown = sh_mipi_shutdown,
565 .name = "sh-mipi-dsi",
569 static int __init sh_mipi_init(void)
571 return platform_driver_probe(&sh_mipi_driver, sh_mipi_probe);
573 module_init(sh_mipi_init);
575 static void __exit sh_mipi_exit(void)
577 platform_driver_unregister(&sh_mipi_driver);
579 module_exit(sh_mipi_exit);
581 MODULE_AUTHOR("Guennadi Liakhovetski <g.liakhovetski@gmx.de>");
582 MODULE_DESCRIPTION("SuperH / ARM-shmobile MIPI DSI driver");
583 MODULE_LICENSE("GPL v2");