5 * Author: Hannu Mallat <hmallat@cc.hut.fi>
7 * Copyright © 1999 Hannu Mallat
10 * Created : Thu Sep 23 18:17:43 1999, hmallat
11 * Last modified: Tue Nov 2 21:19:47 1999, hmallat
13 * Lots of the information here comes from the Daryll Strauss' Banshee
14 * patches to the XF86 server, and the rest comes from the 3dfx
15 * Banshee specification. I'm very much indebted to Daryll for his
16 * work on the X server.
18 * Voodoo3 support was contributed Harold Oga. Lots of additions
19 * (proper acceleration, 24 bpp, hardware cursor) and bug fixes by Attila
20 * Kesmarki. Thanks guys!
22 * Voodoo1 and Voodoo2 support aren't relevant to this driver as they
23 * behave very differently from the Voodoo3/4/5. For anyone wanting to
24 * use frame buffer on the Voodoo1/2, see the sstfb driver (which is
25 * located at http://www.sourceforge.net/projects/sstfb).
27 * While I _am_ grateful to 3Dfx for releasing the specs for Banshee,
28 * I do wish the next version is a bit more complete. Without the XF86
29 * patches I couldn't have gotten even this far... for instance, the
30 * extensions to the VGA register set go completely unmentioned in the
31 * spec! Also, lots of references are made to the 'SST core', but no
32 * spec is publicly available, AFAIK.
34 * The structure of this driver comes pretty much from the Permedia
35 * driver by Ilario Nardinocchi, which in turn is based on skeletonfb.
38 * - support for 16/32 bpp needs fixing (funky bootup penguin)
39 * - multihead support (basically need to support an array of fb_infos)
40 * - support other architectures (PPC, Alpha); does the fact that the VGA
41 * core can be accessed only thru I/O (not memory mapped) complicate
46 * 0.1.4 (released 2002-05-28) ported over to new fbdev api by James Simmons
48 * 0.1.3 (released 1999-11-02) added Attila's panning support, code
49 * reorg, hwcursor address page size alignment
50 * (for mmaping both frame buffer and regs),
51 * and my changes to get rid of hardcoded
52 * VGA i/o register locations (uses PCI
53 * configuration info now)
54 * 0.1.2 (released 1999-10-19) added Attila Kesmarki's bug fixes and
56 * 0.1.1 (released 1999-10-07) added Voodoo3 support by Harold Oga.
57 * 0.1.0 (released 1999-10-06) initial version
61 #include <linux/module.h>
62 #include <linux/kernel.h>
63 #include <linux/errno.h>
64 #include <linux/string.h>
66 #include <linux/slab.h>
67 #include <linux/delay.h>
68 #include <linux/interrupt.h>
70 #include <linux/init.h>
71 #include <linux/pci.h>
72 #include <linux/nvram.h>
74 #include <linux/timer.h>
75 #include <linux/spinlock.h>
77 #include <video/tdfx.h>
81 #define DPRINTK(a,b...) printk(KERN_DEBUG "fb: %s: " a, __FUNCTION__ , ## b)
83 #define DPRINTK(a,b...)
86 #define BANSHEE_MAX_PIXCLOCK 270000
87 #define VOODOO3_MAX_PIXCLOCK 300000
88 #define VOODOO5_MAX_PIXCLOCK 350000
90 static struct fb_fix_screeninfo tdfx_fix __devinitdata = {
92 .type = FB_TYPE_PACKED_PIXELS,
93 .visual = FB_VISUAL_PSEUDOCOLOR,
96 .accel = FB_ACCEL_3DFX_BANSHEE
99 static struct fb_var_screeninfo tdfx_var __devinitdata = {
100 /* "640x480, 8 bpp @ 60 Hz */
104 .yres_virtual = 1024,
109 .activate = FB_ACTIVATE_NOW,
112 .accel_flags = FB_ACCELF_TEXT,
120 .vmode = FB_VMODE_NONINTERLACED
124 * PCI driver prototypes
126 static int __devinit tdfxfb_probe(struct pci_dev *pdev,
127 const struct pci_device_id *id);
128 static void __devexit tdfxfb_remove(struct pci_dev *pdev);
130 static struct pci_device_id tdfxfb_id_table[] = {
131 { PCI_VENDOR_ID_3DFX, PCI_DEVICE_ID_3DFX_BANSHEE,
132 PCI_ANY_ID, PCI_ANY_ID, PCI_BASE_CLASS_DISPLAY << 16,
134 { PCI_VENDOR_ID_3DFX, PCI_DEVICE_ID_3DFX_VOODOO3,
135 PCI_ANY_ID, PCI_ANY_ID, PCI_BASE_CLASS_DISPLAY << 16,
137 { PCI_VENDOR_ID_3DFX, PCI_DEVICE_ID_3DFX_VOODOO5,
138 PCI_ANY_ID, PCI_ANY_ID, PCI_BASE_CLASS_DISPLAY << 16,
143 static struct pci_driver tdfxfb_driver = {
145 .id_table = tdfxfb_id_table,
146 .probe = tdfxfb_probe,
147 .remove = __devexit_p(tdfxfb_remove),
150 MODULE_DEVICE_TABLE(pci, tdfxfb_id_table);
155 static int nopan = 0;
156 static int nowrap = 1; // not implemented (yet)
157 static char *mode_option __devinitdata = NULL;
159 /* -------------------------------------------------------------------------
160 * Hardware-specific funcions
161 * ------------------------------------------------------------------------- */
164 static inline u8 vga_inb(struct tdfx_par *par, u32 reg)
169 static inline void vga_outb(struct tdfx_par *par, u32 reg, u8 val)
174 static inline u8 vga_inb(struct tdfx_par *par, u32 reg)
176 return inb(par->iobase + reg - 0x300);
178 static inline void vga_outb(struct tdfx_par *par, u32 reg, u8 val)
180 outb(val, par->iobase + reg - 0x300);
184 static inline void gra_outb(struct tdfx_par *par, u32 idx, u8 val)
186 vga_outb(par, GRA_I, idx);
187 vga_outb(par, GRA_D, val);
190 static inline void seq_outb(struct tdfx_par *par, u32 idx, u8 val)
192 vga_outb(par, SEQ_I, idx);
193 vga_outb(par, SEQ_D, val);
196 static inline u8 seq_inb(struct tdfx_par *par, u32 idx)
198 vga_outb(par, SEQ_I, idx);
199 return vga_inb(par, SEQ_D);
202 static inline void crt_outb(struct tdfx_par *par, u32 idx, u8 val)
204 vga_outb(par, CRT_I, idx);
205 vga_outb(par, CRT_D, val);
208 static inline u8 crt_inb(struct tdfx_par *par, u32 idx)
210 vga_outb(par, CRT_I, idx);
211 return vga_inb(par, CRT_D);
214 static inline void att_outb(struct tdfx_par *par, u32 idx, u8 val)
218 tmp = vga_inb(par, IS1_R);
219 vga_outb(par, ATT_IW, idx);
220 vga_outb(par, ATT_IW, val);
223 static inline void vga_disable_video(struct tdfx_par *par)
227 s = seq_inb(par, 0x01) | 0x20;
228 seq_outb(par, 0x00, 0x01);
229 seq_outb(par, 0x01, s);
230 seq_outb(par, 0x00, 0x03);
233 static inline void vga_enable_video(struct tdfx_par *par)
237 s = seq_inb(par, 0x01) & 0xdf;
238 seq_outb(par, 0x00, 0x01);
239 seq_outb(par, 0x01, s);
240 seq_outb(par, 0x00, 0x03);
243 static inline void vga_enable_palette(struct tdfx_par *par)
246 vga_outb(par, ATT_IW, 0x20);
249 static inline u32 tdfx_inl(struct tdfx_par *par, unsigned int reg)
251 return readl(par->regbase_virt + reg);
254 static inline void tdfx_outl(struct tdfx_par *par, unsigned int reg, u32 val)
256 writel(val, par->regbase_virt + reg);
259 static inline void banshee_make_room(struct tdfx_par *par, int size)
261 /* Note: The Voodoo3's onboard FIFO has 32 slots. This loop
262 * won't quit if you ask for more. */
263 while ((tdfx_inl(par, STATUS) & 0x1f) < size - 1) ;
266 static int banshee_wait_idle(struct fb_info *info)
268 struct tdfx_par *par = info->par;
271 banshee_make_room(par, 1);
272 tdfx_outl(par, COMMAND_3D, COMMAND_3D_NOP);
275 i = (tdfx_inl(par, STATUS) & STATUS_BUSY) ? 0 : i + 1;
283 * Set the color of a palette entry in 8bpp mode
285 static inline void do_setpalentry(struct tdfx_par *par, unsigned regno, u32 c)
287 banshee_make_room(par, 2);
288 tdfx_outl(par, DACADDR, regno);
289 tdfx_outl(par, DACDATA, c);
292 static u32 do_calc_pll(int freq, int *freq_out)
294 int m, n, k, best_m, best_n, best_k, best_error;
298 best_n = best_m = best_k = 0;
300 for (k = 3; k >= 0; k--) {
301 for (m = 63; m >= 0; m--) {
303 * Estimate value of n that produces target frequency
304 * with current m and k
306 int n_estimated = (freq * (m + 2) * (1 << k) / fref) - 2;
308 /* Search neighborhood of estimated n */
309 for (n = max(0, n_estimated - 1);
310 n <= min(255, n_estimated + 1); n++) {
312 * Calculate PLL freqency with current m, k and
315 int f = fref * (n + 2) / (m + 2) / (1 << k);
316 int error = abs(f - freq);
319 * If this is the closest we've come to the
320 * target frequency then remember n, m and k
322 if (error < best_error) {
335 *freq_out = fref * (n + 2) / (m + 2) / (1 << k);
337 return (n << 8) | (m << 2) | k;
340 static void do_write_regs(struct fb_info *info, struct banshee_reg *reg)
342 struct tdfx_par *par = info->par;
345 banshee_wait_idle(info);
347 tdfx_outl(par, MISCINIT1, tdfx_inl(par, MISCINIT1) | 0x01);
349 crt_outb(par, 0x11, crt_inb(par, 0x11) & 0x7f); /* CRT unprotect */
351 banshee_make_room(par, 3);
352 tdfx_outl(par, VGAINIT1, reg->vgainit1 & 0x001FFFFF);
353 tdfx_outl(par, VIDPROCCFG, reg->vidcfg & ~0x00000001);
355 tdfx_outl(par, PLLCTRL1, reg->mempll);
356 tdfx_outl(par, PLLCTRL2, reg->gfxpll);
358 tdfx_outl(par, PLLCTRL0, reg->vidpll);
360 vga_outb(par, MISC_W, reg->misc[0x00] | 0x01);
362 for (i = 0; i < 5; i++)
363 seq_outb(par, i, reg->seq[i]);
365 for (i = 0; i < 25; i++)
366 crt_outb(par, i, reg->crt[i]);
368 for (i = 0; i < 9; i++)
369 gra_outb(par, i, reg->gra[i]);
371 for (i = 0; i < 21; i++)
372 att_outb(par, i, reg->att[i]);
374 crt_outb(par, 0x1a, reg->ext[0]);
375 crt_outb(par, 0x1b, reg->ext[1]);
377 vga_enable_palette(par);
378 vga_enable_video(par);
380 banshee_make_room(par, 11);
381 tdfx_outl(par, VGAINIT0, reg->vgainit0);
382 tdfx_outl(par, DACMODE, reg->dacmode);
383 tdfx_outl(par, VIDDESKSTRIDE, reg->stride);
384 tdfx_outl(par, HWCURPATADDR, 0);
386 tdfx_outl(par, VIDSCREENSIZE, reg->screensize);
387 tdfx_outl(par, VIDDESKSTART, reg->startaddr);
388 tdfx_outl(par, VIDPROCCFG, reg->vidcfg);
389 tdfx_outl(par, VGAINIT1, reg->vgainit1);
390 tdfx_outl(par, MISCINIT0, reg->miscinit0);
392 banshee_make_room(par, 8);
393 tdfx_outl(par, SRCBASE, reg->srcbase);
394 tdfx_outl(par, DSTBASE, reg->dstbase);
395 tdfx_outl(par, COMMANDEXTRA_2D, 0);
396 tdfx_outl(par, CLIP0MIN, 0);
397 tdfx_outl(par, CLIP0MAX, 0x0fff0fff);
398 tdfx_outl(par, CLIP1MIN, 0);
399 tdfx_outl(par, CLIP1MAX, 0x0fff0fff);
400 tdfx_outl(par, SRCXY, 0);
402 banshee_wait_idle(info);
405 static unsigned long do_lfb_size(struct tdfx_par *par, unsigned short dev_id)
412 int chip_size; /* in MB */
416 draminit0 = tdfx_inl(par, DRAMINIT0);
417 draminit1 = tdfx_inl(par, DRAMINIT1);
419 num_chips = (draminit0 & DRAMINIT0_SGRAM_NUM) ? 8 : 4;
421 if (dev_id < PCI_DEVICE_ID_3DFX_VOODOO5) {
422 /* Banshee/Voodoo3 */
423 has_sgram = draminit1 & DRAMINIT1_MEM_SDRAM;
426 chip_size = (draminit0 & DRAMINIT0_SGRAM_TYPE) ? 2 : 1;
430 chip_size = 1 << ((draminit0 & DRAMINIT0_SGRAM_TYPE_MASK) >> DRAMINIT0_SGRAM_TYPE_SHIFT);
432 lfbsize = num_chips * chip_size * 1024 * 1024;
434 /* disable block writes for SDRAM */
435 miscinit1 = tdfx_inl(par, MISCINIT1);
436 miscinit1 |= has_sgram ? 0 : MISCINIT1_2DBLOCK_DIS;
437 miscinit1 |= MISCINIT1_CLUT_INV;
439 banshee_make_room(par, 1);
440 tdfx_outl(par, MISCINIT1, miscinit1);
444 /* ------------------------------------------------------------------------- */
446 static int tdfxfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
448 struct tdfx_par *par = info->par;
451 if (var->bits_per_pixel != 8 && var->bits_per_pixel != 16 &&
452 var->bits_per_pixel != 24 && var->bits_per_pixel != 32) {
453 DPRINTK("depth not supported: %u\n", var->bits_per_pixel);
457 if (var->xres != var->xres_virtual)
458 var->xres_virtual = var->xres;
460 if (var->yres > var->yres_virtual)
461 var->yres_virtual = var->yres;
464 DPRINTK("xoffset not supported\n");
468 /* Banshee doesn't support interlace, but Voodoo4/5 and probably Voodoo3 do. */
469 /* no direct information about device id now? use max_pixclock for this... */
470 if (((var->vmode & FB_VMODE_MASK) == FB_VMODE_INTERLACED) &&
471 (par->max_pixclock < VOODOO3_MAX_PIXCLOCK)) {
472 DPRINTK("interlace not supported\n");
476 var->xres = (var->xres + 15) & ~15; /* could sometimes be 8 */
477 lpitch = var->xres * ((var->bits_per_pixel + 7) >> 3);
479 if (var->xres < 320 || var->xres > 2048) {
480 DPRINTK("width not supported: %u\n", var->xres);
484 if (var->yres < 200 || var->yres > 2048) {
485 DPRINTK("height not supported: %u\n", var->yres);
489 if (lpitch * var->yres_virtual > info->fix.smem_len) {
490 var->yres_virtual = info->fix.smem_len / lpitch;
491 if (var->yres_virtual < var->yres) {
492 DPRINTK("no memory for screen (%ux%ux%u)\n",
493 var->xres, var->yres_virtual,
494 var->bits_per_pixel);
499 if (PICOS2KHZ(var->pixclock) > par->max_pixclock) {
500 DPRINTK("pixclock too high (%ldKHz)\n",
501 PICOS2KHZ(var->pixclock));
505 var->transp.offset = 0;
506 var->transp.length = 0;
507 switch (var->bits_per_pixel) {
509 var->red.length = var->green.length = var->blue.length = 8;
512 var->red.offset = 11;
514 var->green.offset = 5;
515 var->green.length = 6;
516 var->blue.offset = 0;
517 var->blue.length = 5;
520 var->transp.offset = 24;
521 var->transp.length = 8;
523 var->red.offset = 16;
524 var->green.offset = 8;
525 var->blue.offset = 0;
526 var->red.length = var->green.length = var->blue.length = 8;
529 var->height = var->width = -1;
531 var->accel_flags = FB_ACCELF_TEXT;
533 DPRINTK("Checking graphics mode at %dx%d depth %d\n",
534 var->xres, var->yres, var->bits_per_pixel);
538 static int tdfxfb_set_par(struct fb_info *info)
540 struct tdfx_par *par = info->par;
541 u32 hdispend, hsyncsta, hsyncend, htotal;
542 u32 hd, hs, he, ht, hbs, hbe;
543 u32 vd, vs, ve, vt, vbs, vbe;
544 struct banshee_reg reg;
550 memset(®, 0, sizeof(reg));
551 cpp = (info->var.bits_per_pixel + 7) / 8;
553 reg.vidcfg = VIDCFG_VIDPROC_ENABLE | VIDCFG_DESK_ENABLE |
555 ((cpp - 1) << VIDCFG_PIXFMT_SHIFT) |
556 (cpp != 1 ? VIDCFG_CLUT_BYPASS : 0);
559 freq = PICOS2KHZ(info->var.pixclock);
562 reg.vidcfg &= ~VIDCFG_2X;
564 hdispend = info->var.xres;
565 hsyncsta = hdispend + info->var.right_margin;
566 hsyncend = hsyncsta + info->var.hsync_len;
567 htotal = hsyncend + info->var.left_margin;
569 if (freq > par->max_pixclock / 2) {
570 freq = freq > par->max_pixclock ? par->max_pixclock : freq;
571 reg.dacmode |= DACMODE_2X;
572 reg.vidcfg |= VIDCFG_2X;
579 hd = wd = (hdispend >> 3) - 1;
580 hs = (hsyncsta >> 3) - 1;
581 he = (hsyncend >> 3) - 1;
582 ht = (htotal >> 3) - 1;
586 if ((info->var.vmode & FB_VMODE_MASK) == FB_VMODE_DOUBLE) {
587 vbs = vd = (info->var.yres << 1) - 1;
588 vs = vd + (info->var.lower_margin << 1);
589 ve = vs + (info->var.vsync_len << 1);
590 vbe = vt = ve + (info->var.upper_margin << 1) - 1;
592 vbs = vd = info->var.yres - 1;
593 vs = vd + info->var.lower_margin;
594 ve = vs + info->var.vsync_len;
595 vbe = vt = ve + info->var.upper_margin - 1;
598 /* this is all pretty standard VGA register stuffing */
599 reg.misc[0x00] = 0x0f |
600 (info->var.xres < 400 ? 0xa0 :
601 info->var.xres < 480 ? 0x60 :
602 info->var.xres < 768 ? 0xe0 : 0x20);
604 reg.gra[0x00] = 0x00;
605 reg.gra[0x01] = 0x00;
606 reg.gra[0x02] = 0x00;
607 reg.gra[0x03] = 0x00;
608 reg.gra[0x04] = 0x00;
609 reg.gra[0x05] = 0x40;
610 reg.gra[0x06] = 0x05;
611 reg.gra[0x07] = 0x0f;
612 reg.gra[0x08] = 0xff;
614 reg.att[0x00] = 0x00;
615 reg.att[0x01] = 0x01;
616 reg.att[0x02] = 0x02;
617 reg.att[0x03] = 0x03;
618 reg.att[0x04] = 0x04;
619 reg.att[0x05] = 0x05;
620 reg.att[0x06] = 0x06;
621 reg.att[0x07] = 0x07;
622 reg.att[0x08] = 0x08;
623 reg.att[0x09] = 0x09;
624 reg.att[0x0a] = 0x0a;
625 reg.att[0x0b] = 0x0b;
626 reg.att[0x0c] = 0x0c;
627 reg.att[0x0d] = 0x0d;
628 reg.att[0x0e] = 0x0e;
629 reg.att[0x0f] = 0x0f;
630 reg.att[0x10] = 0x41;
631 reg.att[0x11] = 0x00;
632 reg.att[0x12] = 0x0f;
633 reg.att[0x13] = 0x00;
634 reg.att[0x14] = 0x00;
636 reg.seq[0x00] = 0x03;
637 reg.seq[0x01] = 0x01; /* fixme: clkdiv2? */
638 reg.seq[0x02] = 0x0f;
639 reg.seq[0x03] = 0x00;
640 reg.seq[0x04] = 0x0e;
642 reg.crt[0x00] = ht - 4;
645 reg.crt[0x03] = 0x80 | (hbe & 0x1f);
647 reg.crt[0x05] = ((hbe & 0x20) << 2) | (he & 0x1f);
649 reg.crt[0x07] = ((vs & 0x200) >> 2) |
650 ((vd & 0x200) >> 3) |
651 ((vt & 0x200) >> 4) | 0x10 |
652 ((vbs & 0x100) >> 5) |
653 ((vs & 0x100) >> 6) |
654 ((vd & 0x100) >> 7) |
656 reg.crt[0x08] = 0x00;
657 reg.crt[0x09] = 0x40 | ((vbs & 0x200) >> 4);
658 reg.crt[0x0a] = 0x00;
659 reg.crt[0x0b] = 0x00;
660 reg.crt[0x0c] = 0x00;
661 reg.crt[0x0d] = 0x00;
662 reg.crt[0x0e] = 0x00;
663 reg.crt[0x0f] = 0x00;
665 reg.crt[0x11] = (ve & 0x0f) | 0x20;
668 reg.crt[0x14] = 0x00;
670 reg.crt[0x16] = vbe + 1;
671 reg.crt[0x17] = 0xc3;
672 reg.crt[0x18] = 0xff;
674 /* Banshee's nonvga stuff */
675 reg.ext[0x00] = (((ht & 0x100) >> 8) |
676 ((hd & 0x100) >> 6) |
677 ((hbs & 0x100) >> 4) |
678 ((hbe & 0x40) >> 1) |
679 ((hs & 0x100) >> 2) |
681 reg.ext[0x01] = (((vt & 0x400) >> 10) |
682 ((vd & 0x400) >> 8) |
683 ((vbs & 0x400) >> 6) |
684 ((vbe & 0x400) >> 4));
686 reg.vgainit0 = VGAINIT0_8BIT_DAC |
687 VGAINIT0_EXT_ENABLE |
688 VGAINIT0_WAKEUP_3C3 |
689 VGAINIT0_ALT_READBACK |
690 VGAINIT0_EXTSHIFTOUT;
691 reg.vgainit1 = tdfx_inl(par, VGAINIT1) & 0x1fffff;
696 reg.cursc1 = 0xffffff;
698 reg.stride = info->var.xres * cpp;
699 reg.startaddr = par->baseline * reg.stride;
700 reg.srcbase = reg.startaddr;
701 reg.dstbase = reg.startaddr;
704 freq = PICOS2KHZ(info->var.pixclock);
706 reg.dacmode &= ~DACMODE_2X;
707 reg.vidcfg &= ~VIDCFG_2X;
708 if (freq > par->max_pixclock / 2) {
709 freq = freq > par->max_pixclock ? par->max_pixclock : freq;
710 reg.dacmode |= DACMODE_2X;
711 reg.vidcfg |= VIDCFG_2X;
713 reg.vidpll = do_calc_pll(freq, &fout);
715 reg.mempll = do_calc_pll(..., &fout);
716 reg.gfxpll = do_calc_pll(..., &fout);
719 if ((info->var.vmode & FB_VMODE_MASK) == FB_VMODE_DOUBLE) {
720 reg.screensize = info->var.xres | (info->var.yres << 13);
721 reg.vidcfg |= VIDCFG_HALF_MODE;
722 reg.crt[0x09] |= 0x80;
724 reg.screensize = info->var.xres | (info->var.yres << 12);
725 reg.vidcfg &= ~VIDCFG_HALF_MODE;
727 if ((info->var.vmode & FB_VMODE_MASK) == FB_VMODE_INTERLACED)
728 reg.vidcfg |= VIDCFG_INTERLACE;
729 reg.miscinit0 = tdfx_inl(par, MISCINIT0);
731 #if defined(__BIG_ENDIAN)
732 switch (info->var.bits_per_pixel) {
735 reg.miscinit0 &= ~(1 << 30);
736 reg.miscinit0 &= ~(1 << 31);
739 reg.miscinit0 |= (1 << 30);
740 reg.miscinit0 |= (1 << 31);
743 reg.miscinit0 |= (1 << 30);
744 reg.miscinit0 &= ~(1 << 31);
748 do_write_regs(info, ®);
750 /* Now change fb_fix_screeninfo according to changes in par */
751 info->fix.line_length =
752 info->var.xres * ((info->var.bits_per_pixel + 7) >> 3);
753 info->fix.visual = (info->var.bits_per_pixel == 8)
754 ? FB_VISUAL_PSEUDOCOLOR
755 : FB_VISUAL_TRUECOLOR;
756 DPRINTK("Graphics mode is now set at %dx%d depth %d\n",
757 info->var.xres, info->var.yres, info->var.bits_per_pixel);
761 /* A handy macro shamelessly pinched from matroxfb */
762 #define CNVT_TOHW(val, width) ((((val)<<(width))+0x7FFF-(val))>>16)
764 static int tdfxfb_setcolreg(unsigned regno, unsigned red, unsigned green,
765 unsigned blue, unsigned transp,
766 struct fb_info *info)
768 struct tdfx_par *par = info->par;
771 if (regno >= info->cmap.len || regno > 255)
774 switch (info->fix.visual) {
775 case FB_VISUAL_PSEUDOCOLOR:
776 rgbcol =(((u32)red & 0xff00) << 8) |
777 (((u32)green & 0xff00) << 0) |
778 (((u32)blue & 0xff00) >> 8);
779 do_setpalentry(par, regno, rgbcol);
781 /* Truecolor has no hardware color palettes. */
782 case FB_VISUAL_TRUECOLOR:
784 rgbcol = (CNVT_TOHW(red, info->var.red.length) <<
785 info->var.red.offset) |
786 (CNVT_TOHW(green, info->var.green.length) <<
787 info->var.green.offset) |
788 (CNVT_TOHW(blue, info->var.blue.length) <<
789 info->var.blue.offset) |
790 (CNVT_TOHW(transp, info->var.transp.length) <<
791 info->var.transp.offset);
792 par->palette[regno] = rgbcol;
797 DPRINTK("bad depth %u\n", info->var.bits_per_pixel);
804 /* 0 unblank, 1 blank, 2 no vsync, 3 no hsync, 4 off */
805 static int tdfxfb_blank(int blank, struct fb_info *info)
807 struct tdfx_par *par = info->par;
808 u32 dacmode, state = 0, vgablank = 0;
810 dacmode = tdfx_inl(par, DACMODE);
813 case FB_BLANK_UNBLANK: /* Screen: On; HSync: On, VSync: On */
817 case FB_BLANK_NORMAL: /* Screen: Off; HSync: On, VSync: On */
821 case FB_BLANK_VSYNC_SUSPEND: /* Screen: Off; HSync: On, VSync: Off */
825 case FB_BLANK_HSYNC_SUSPEND: /* Screen: Off; HSync: Off, VSync: On */
829 case FB_BLANK_POWERDOWN: /* Screen: Off; HSync: Off, VSync: Off */
830 state = BIT(1) | BIT(3);
835 dacmode &= ~(BIT(1) | BIT(3));
837 banshee_make_room(par, 1);
838 tdfx_outl(par, DACMODE, dacmode);
840 vga_disable_video(par);
842 vga_enable_video(par);
847 * Set the starting position of the visible screen to var->yoffset
849 static int tdfxfb_pan_display(struct fb_var_screeninfo *var,
850 struct fb_info *info)
852 struct tdfx_par *par = info->par;
855 if (nopan || var->xoffset || (var->yoffset > var->yres_virtual))
857 if ((var->yoffset + var->yres > var->yres_virtual && nowrap))
860 addr = var->yoffset * info->fix.line_length;
861 banshee_make_room(par, 1);
862 tdfx_outl(par, VIDDESKSTART, addr);
864 info->var.xoffset = var->xoffset;
865 info->var.yoffset = var->yoffset;
869 #ifdef CONFIG_FB_3DFX_ACCEL
871 * FillRect 2D command (solidfill or invert (via ROP_XOR))
873 static void tdfxfb_fillrect(struct fb_info *info,
874 const struct fb_fillrect *rect)
876 struct tdfx_par *par = info->par;
877 u32 bpp = info->var.bits_per_pixel;
878 u32 stride = info->fix.line_length;
879 u32 fmt= stride | ((bpp + ((bpp == 8) ? 0 : 8)) << 13);
885 if (rect->rop == ROP_COPY)
886 tdfx_rop = TDFX_ROP_COPY;
888 tdfx_rop = TDFX_ROP_XOR;
890 /* asume always rect->height < 4096 */
891 if (dy + rect->height > 4095) {
892 dstbase = stride * dy;
895 /* asume always rect->width < 4096 */
896 if (dx + rect->width > 4095) {
897 dstbase += dx * bpp >> 3;
900 banshee_make_room(par, 6);
901 tdfx_outl(par, DSTFORMAT, fmt);
902 if (info->fix.visual == FB_VISUAL_PSEUDOCOLOR) {
903 tdfx_outl(par, COLORFORE, rect->color);
904 } else { /* FB_VISUAL_TRUECOLOR */
905 tdfx_outl(par, COLORFORE, par->palette[rect->color]);
907 tdfx_outl(par, COMMAND_2D, COMMAND_2D_FILLRECT | (tdfx_rop << 24));
908 tdfx_outl(par, DSTBASE, dstbase);
909 tdfx_outl(par, DSTSIZE, rect->width | (rect->height << 16));
910 tdfx_outl(par, LAUNCH_2D, dx | (dy << 16));
914 * Screen-to-Screen BitBlt 2D command (for the bmove fb op.)
916 static void tdfxfb_copyarea(struct fb_info *info,
917 const struct fb_copyarea *area)
919 struct tdfx_par *par = info->par;
920 u32 sx = area->sx, sy = area->sy, dx = area->dx, dy = area->dy;
921 u32 bpp = info->var.bits_per_pixel;
922 u32 stride = info->fix.line_length;
923 u32 blitcmd = COMMAND_2D_S2S_BITBLT | (TDFX_ROP_COPY << 24);
924 u32 fmt = stride | ((bpp + ((bpp == 8) ? 0 : 8)) << 13);
928 /* asume always area->height < 4096 */
929 if (sy + area->height > 4095) {
930 srcbase = stride * sy;
933 /* asume always area->width < 4096 */
934 if (sx + area->width > 4095) {
935 srcbase += sx * bpp >> 3;
938 /* asume always area->height < 4096 */
939 if (dy + area->height > 4095) {
940 dstbase = stride * dy;
943 /* asume always area->width < 4096 */
944 if (dx + area->width > 4095) {
945 dstbase += dx * bpp >> 3;
950 if (area->sx <= area->dx) {
953 sx += area->width - 1;
954 dx += area->width - 1;
956 if (area->sy <= area->dy) {
959 sy += area->height - 1;
960 dy += area->height - 1;
963 banshee_make_room(par, 8);
965 tdfx_outl(par, SRCFORMAT, fmt);
966 tdfx_outl(par, DSTFORMAT, fmt);
967 tdfx_outl(par, COMMAND_2D, blitcmd);
968 tdfx_outl(par, DSTSIZE, area->width | (area->height << 16));
969 tdfx_outl(par, DSTXY, dx | (dy << 16));
970 tdfx_outl(par, SRCBASE, srcbase);
971 tdfx_outl(par, DSTBASE, dstbase);
972 tdfx_outl(par, LAUNCH_2D, sx | (sy << 16));
975 static void tdfxfb_imageblit(struct fb_info *info, const struct fb_image *image)
977 struct tdfx_par *par = info->par;
978 int size = image->height * ((image->width * image->depth + 7) >> 3);
980 int i, stride = info->fix.line_length;
981 u32 bpp = info->var.bits_per_pixel;
982 u32 dstfmt = stride | ((bpp + ((bpp == 8) ? 0 : 8)) << 13);
983 u8 *chardata = (u8 *) image->data;
989 if (image->depth != 1) {
990 //banshee_make_room(par, 6 + ((size + 3) >> 2));
991 //srcfmt = stride | ((bpp+((bpp==8) ? 0 : 8)) << 13) | 0x400000;
992 cfb_imageblit(info, image);
995 banshee_make_room(par, 9);
996 switch (info->fix.visual) {
997 case FB_VISUAL_PSEUDOCOLOR:
998 tdfx_outl(par, COLORFORE, image->fg_color);
999 tdfx_outl(par, COLORBACK, image->bg_color);
1001 case FB_VISUAL_TRUECOLOR:
1003 tdfx_outl(par, COLORFORE,
1004 par->palette[image->fg_color]);
1005 tdfx_outl(par, COLORBACK,
1006 par->palette[image->bg_color]);
1009 srcfmt = 0x400000 | BIT(20);
1013 /* asume always image->height < 4096 */
1014 if (dy + image->height > 4095) {
1015 dstbase = stride * dy;
1018 /* asume always image->width < 4096 */
1019 if (dx + image->width > 4095) {
1020 dstbase += dx * bpp >> 3;
1024 tdfx_outl(par, DSTBASE, dstbase);
1025 tdfx_outl(par, SRCXY, 0);
1026 tdfx_outl(par, DSTXY, dx | (dy << 16));
1027 tdfx_outl(par, COMMAND_2D, COMMAND_2D_H2S_BITBLT | (TDFX_ROP_COPY << 24));
1028 tdfx_outl(par, SRCFORMAT, srcfmt);
1029 tdfx_outl(par, DSTFORMAT, dstfmt);
1030 tdfx_outl(par, DSTSIZE, image->width | (image->height << 16));
1032 /* A count of how many free FIFO entries we've requested.
1033 * When this goes negative, we need to request more. */
1036 /* Send four bytes at a time of data */
1037 for (i = (size >> 2); i > 0; i--) {
1038 if (--fifo_free < 0) {
1040 banshee_make_room(par, fifo_free);
1042 tdfx_outl(par, LAUNCH_2D, *(u32*)chardata);
1046 /* Send the leftovers now */
1047 banshee_make_room(par, 3);
1053 tdfx_outl(par, LAUNCH_2D, *chardata);
1056 tdfx_outl(par, LAUNCH_2D, *(u16*)chardata);
1059 tdfx_outl(par, LAUNCH_2D,
1060 *(u16*)chardata | ((chardata[3]) << 24));
1064 #endif /* CONFIG_FB_3DFX_ACCEL */
1066 #ifdef TDFX_HARDWARE_CURSOR
1067 static int tdfxfb_cursor(struct fb_info *info, struct fb_cursor *cursor)
1069 struct tdfx_par *par = info->par;
1070 unsigned long flags;
1073 * If the cursor is not be changed this means either we want the
1074 * current cursor state (if enable is set) or we want to query what
1075 * we can do with the cursor (if enable is not set)
1080 /* Too large of a cursor :-( */
1081 if (cursor->image.width > 64 || cursor->image.height > 64)
1085 * If we are going to be changing things we should disable
1088 if (info->cursor.enable) {
1089 spin_lock_irqsave(&par->DAClock, flags);
1090 info->cursor.enable = 0;
1091 del_timer(&(par->hwcursor.timer));
1092 tdfx_outl(par, VIDPROCCFG, par->hwcursor.disable);
1093 spin_unlock_irqrestore(&par->DAClock, flags);
1096 /* Disable the Cursor */
1097 if ((cursor->set && FB_CUR_SETCUR) && !cursor->enable)
1100 /* fix cursor color - XFree86 forgets to restore it properly */
1101 if (cursor->set && FB_CUR_SETCMAP) {
1102 struct fb_cmap cmap = cursor->image.cmap;
1103 unsigned long bg_color, fg_color;
1105 cmap.len = 2; /* Voodoo 3+ only support 2 color cursors */
1106 fg_color = ((cmap.red[cmap.start] << 16) |
1107 (cmap.green[cmap.start] << 8) |
1108 (cmap.blue[cmap.start]));
1109 bg_color = ((cmap.red[cmap.start + 1] << 16) |
1110 (cmap.green[cmap.start + 1] << 8) |
1111 (cmap.blue[cmap.start + 1]));
1112 fb_copy_cmap(&cmap, &info->cursor.image.cmap);
1113 spin_lock_irqsave(&par->DAClock, flags);
1114 banshee_make_room(par, 2);
1115 tdfx_outl(par, HWCURC0, bg_color);
1116 tdfx_outl(par, HWCURC1, fg_color);
1117 spin_unlock_irqrestore(&par->DAClock, flags);
1120 if (cursor->set && FB_CUR_SETPOS) {
1123 x = cursor->image.dx;
1124 y = cursor->image.dy;
1125 y -= info->var.yoffset;
1126 info->cursor.image.dx = x;
1127 info->cursor.image.dy = y;
1130 spin_lock_irqsave(&par->DAClock, flags);
1131 banshee_make_room(par, 1);
1132 tdfx_outl(par, HWCURLOC, (y << 16) + x);
1133 spin_unlock_irqrestore(&par->DAClock, flags);
1136 /* Not supported so we fake it */
1137 if (cursor->set && FB_CUR_SETHOT) {
1138 info->cursor.hot.x = cursor->hot.x;
1139 info->cursor.hot.y = cursor->hot.y;
1142 if (cursor->set && FB_CUR_SETSHAPE) {
1144 * Voodoo 3 and above cards use 2 monochrome cursor patterns.
1145 * The reason is so the card can fetch 8 words at a time
1146 * and are stored on chip for use for the next 8 scanlines.
1147 * This reduces the number of times for access to draw the
1148 * cursor for each screen refresh.
1149 * Each pattern is a bitmap of 64 bit wide and 64 bit high
1150 * (total of 8192 bits or 1024 Kbytes). The two patterns are
1151 * stored in such a way that pattern 0 always resides in the
1152 * lower half (least significant 64 bits) of a 128 bit word
1153 * and pattern 1 the upper half. If you examine the data of
1154 * the cursor image the graphics card uses then from the
1155 * begining you see line one of pattern 0, line one of
1156 * pattern 1, line two of pattern 0, line two of pattern 1,
1157 * etc etc. The linear stride for the cursor is always 16 bytes
1158 * (128 bits) which is the maximum cursor width times two for
1159 * the two monochrome patterns.
1161 u8 *cursorbase = (u8 *)info->cursor.image.data;
1162 char *bitmap = (char *)cursor->image.data;
1163 char *mask = (char *)cursor->mask;
1166 for (i = 0; i < 64; i++) {
1167 if (i < cursor->image.height) {
1168 j = (cursor->image.width + 7) >> 3;
1171 for (; j > 0; j--) {
1172 /* Pattern 0. Copy the cursor bitmap to it */
1173 fb_writeb(*bitmap, cursorbase + h);
1175 /* Pattern 1. Copy the cursor mask to it */
1176 fb_writeb(*mask, cursorbase + h + 8);
1180 for (; k > 0; k--) {
1181 fb_writeb(0, cursorbase + h);
1182 fb_writeb(~0, cursorbase + h + 8);
1186 fb_writel(0, cursorbase + h);
1187 fb_writel(0, cursorbase + h + 4);
1188 fb_writel(~0, cursorbase + h + 8);
1189 fb_writel(~0, cursorbase + h + 12);
1194 /* Turn the cursor on */
1196 info->cursor = *cursor;
1197 mod_timer(&par->hwcursor.timer, jiffies + HZ / 2);
1198 spin_lock_irqsave(&par->DAClock, flags);
1199 banshee_make_room(par, 1);
1200 tdfx_outl(par, VIDPROCCFG, par->hwcursor.enable);
1201 spin_unlock_irqrestore(&par->DAClock, flags);
1206 static struct fb_ops tdfxfb_ops = {
1207 .owner = THIS_MODULE,
1208 .fb_check_var = tdfxfb_check_var,
1209 .fb_set_par = tdfxfb_set_par,
1210 .fb_setcolreg = tdfxfb_setcolreg,
1211 .fb_blank = tdfxfb_blank,
1212 .fb_pan_display = tdfxfb_pan_display,
1213 .fb_sync = banshee_wait_idle,
1214 #ifdef CONFIG_FB_3DFX_ACCEL
1215 .fb_fillrect = tdfxfb_fillrect,
1216 .fb_copyarea = tdfxfb_copyarea,
1217 .fb_imageblit = tdfxfb_imageblit,
1219 .fb_fillrect = cfb_fillrect,
1220 .fb_copyarea = cfb_copyarea,
1221 .fb_imageblit = cfb_imageblit,
1226 * tdfxfb_probe - Device Initializiation
1228 * @pdev: PCI Device to initialize
1229 * @id: PCI Device ID
1231 * Initializes and allocates resources for PCI device @pdev.
1234 static int __devinit tdfxfb_probe(struct pci_dev *pdev,
1235 const struct pci_device_id *id)
1237 struct tdfx_par *default_par;
1238 struct fb_info *info;
1241 if ((err = pci_enable_device(pdev))) {
1242 printk(KERN_WARNING "tdfxfb: Can't enable pdev: %d\n", err);
1246 info = framebuffer_alloc(sizeof(struct tdfx_par), &pdev->dev);
1251 default_par = info->par;
1253 /* Configure the default fb_fix_screeninfo first */
1254 switch (pdev->device) {
1255 case PCI_DEVICE_ID_3DFX_BANSHEE:
1256 strcat(tdfx_fix.id, " Banshee");
1257 default_par->max_pixclock = BANSHEE_MAX_PIXCLOCK;
1259 case PCI_DEVICE_ID_3DFX_VOODOO3:
1260 strcat(tdfx_fix.id, " Voodoo3");
1261 default_par->max_pixclock = VOODOO3_MAX_PIXCLOCK;
1263 case PCI_DEVICE_ID_3DFX_VOODOO5:
1264 strcat(tdfx_fix.id, " Voodoo5");
1265 default_par->max_pixclock = VOODOO5_MAX_PIXCLOCK;
1269 tdfx_fix.mmio_start = pci_resource_start(pdev, 0);
1270 tdfx_fix.mmio_len = pci_resource_len(pdev, 0);
1271 if (!request_mem_region(tdfx_fix.mmio_start, tdfx_fix.mmio_len,
1273 printk(KERN_WARNING "tdfxfb: Can't reserve regbase\n");
1277 default_par->regbase_virt =
1278 ioremap_nocache(tdfx_fix.mmio_start, tdfx_fix.mmio_len);
1279 if (!default_par->regbase_virt) {
1280 printk("fb: Can't remap %s register area.\n", tdfx_fix.id);
1281 goto out_err_regbase;
1284 tdfx_fix.smem_start = pci_resource_start(pdev, 1);
1285 if (!(tdfx_fix.smem_len = do_lfb_size(default_par, pdev->device))) {
1286 printk("fb: Can't count %s memory.\n", tdfx_fix.id);
1287 goto out_err_regbase;
1290 if (!request_mem_region(tdfx_fix.smem_start,
1291 pci_resource_len(pdev, 1), "tdfx smem")) {
1292 printk(KERN_WARNING "tdfxfb: Can't reserve smem\n");
1293 goto out_err_regbase;
1296 info->screen_base = ioremap_nocache(tdfx_fix.smem_start,
1298 if (!info->screen_base) {
1299 printk("fb: Can't remap %s framebuffer.\n", tdfx_fix.id);
1300 goto out_err_screenbase;
1303 default_par->iobase = pci_resource_start(pdev, 2);
1305 if (!request_region(pci_resource_start(pdev, 2),
1306 pci_resource_len(pdev, 2), "tdfx iobase")) {
1307 printk(KERN_WARNING "tdfxfb: Can't reserve iobase\n");
1308 goto out_err_screenbase;
1311 printk("fb: %s memory = %dK\n", tdfx_fix.id, tdfx_fix.smem_len >> 10);
1313 tdfx_fix.ypanstep = nopan ? 0 : 1;
1314 tdfx_fix.ywrapstep = nowrap ? 0 : 1;
1316 info->fbops = &tdfxfb_ops;
1317 info->fix = tdfx_fix;
1318 info->pseudo_palette = default_par->palette;
1319 info->flags = FBINFO_DEFAULT | FBINFO_HWACCEL_YPAN;
1320 #ifdef CONFIG_FB_3DFX_ACCEL
1321 info->flags |= FBINFO_HWACCEL_FILLRECT |
1322 FBINFO_HWACCEL_COPYAREA |
1323 FBINFO_HWACCEL_IMAGEBLIT |
1328 mode_option = "640x480@60";
1330 err = fb_find_mode(&info->var, info, mode_option, NULL, 0, NULL, 8);
1331 if (!err || err == 4)
1332 info->var = tdfx_var;
1334 /* maximize virtual vertical length */
1335 lpitch = info->var.xres_virtual * ((info->var.bits_per_pixel + 7) >> 3);
1336 info->var.yres_virtual = info->fix.smem_len / lpitch;
1337 if (info->var.yres_virtual < info->var.yres)
1338 goto out_err_iobase;
1340 if (fb_alloc_cmap(&info->cmap, 256, 0) < 0) {
1341 printk(KERN_WARNING "tdfxfb: Can't allocate color map\n");
1342 goto out_err_iobase;
1345 if (register_framebuffer(info) < 0) {
1346 printk("tdfxfb: can't register framebuffer\n");
1347 fb_dealloc_cmap(&info->cmap);
1348 goto out_err_iobase;
1353 pci_set_drvdata(pdev, info);
1357 release_mem_region(pci_resource_start(pdev, 2),
1358 pci_resource_len(pdev, 2));
1360 if (info->screen_base)
1361 iounmap(info->screen_base);
1362 release_mem_region(tdfx_fix.smem_start, pci_resource_len(pdev, 1));
1365 * Cleanup after anything that was remapped/allocated.
1367 if (default_par->regbase_virt)
1368 iounmap(default_par->regbase_virt);
1369 release_mem_region(tdfx_fix.mmio_start, tdfx_fix.mmio_len);
1371 framebuffer_release(info);
1376 static void tdfxfb_setup(char *options)
1380 if (!options || !*options)
1383 while ((this_opt = strsep(&options, ",")) != NULL) {
1386 if (!strcmp(this_opt, "nopan")) {
1388 } else if (!strcmp(this_opt, "nowrap")) {
1391 mode_option = this_opt;
1398 * tdfxfb_remove - Device removal
1400 * @pdev: PCI Device to cleanup
1402 * Releases all resources allocated during the course of the driver's
1403 * lifetime for the PCI device @pdev.
1406 static void __devexit tdfxfb_remove(struct pci_dev *pdev)
1408 struct fb_info *info = pci_get_drvdata(pdev);
1409 struct tdfx_par *par = info->par;
1411 unregister_framebuffer(info);
1412 iounmap(par->regbase_virt);
1413 iounmap(info->screen_base);
1415 /* Clean up after reserved regions */
1416 release_region(pci_resource_start(pdev, 2),
1417 pci_resource_len(pdev, 2));
1418 release_mem_region(pci_resource_start(pdev, 1),
1419 pci_resource_len(pdev, 1));
1420 release_mem_region(pci_resource_start(pdev, 0),
1421 pci_resource_len(pdev, 0));
1422 pci_set_drvdata(pdev, NULL);
1423 framebuffer_release(info);
1426 static int __init tdfxfb_init(void)
1429 char *option = NULL;
1431 if (fb_get_options("tdfxfb", &option))
1434 tdfxfb_setup(option);
1436 return pci_register_driver(&tdfxfb_driver);
1439 static void __exit tdfxfb_exit(void)
1441 pci_unregister_driver(&tdfxfb_driver);
1444 MODULE_AUTHOR("Hannu Mallat <hmallat@cc.hut.fi>");
1445 MODULE_DESCRIPTION("3Dfx framebuffer device driver");
1446 MODULE_LICENSE("GPL");
1448 module_init(tdfxfb_init);
1449 module_exit(tdfxfb_exit);